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patch-tn7dsl_c 20 KB

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  1. --- sangam-atm-1.0.orig/tn7dsl.c 2007-01-04 09:04:14.000000000 +0100
  2. +++ sangam-atm-1.0/tn7dsl.c 2010-03-06 12:40:16.000000000 +0100
  3. @@ -94,7 +94,6 @@
  4. * 1/02/07 JZ CQ11054: Data Precision and Range Changes for TR-069 Conformance
  5. * UR8_MERGE_END CQ11054*
  6. *********************************************************************************************/
  7. -#include <linux/config.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. @@ -102,8 +101,6 @@
  12. #include <linux/delay.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/smp_lock.h>
  15. -#include <asm/io.h>
  16. -#include <asm/mips-boards/prom.h>
  17. #include <linux/proc_fs.h>
  18. #include <linux/string.h>
  19. #include <linux/ctype.h>
  20. @@ -111,6 +108,18 @@
  21. #include <linux/timer.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/file.h>
  24. +#include <linux/firmware.h>
  25. +#include <linux/version.h>
  26. +
  27. +#include <asm/io.h>
  28. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)
  29. +#include <asm/ar7/ar7.h>
  30. +#include <asm/ar7/prom.h>
  31. +#else
  32. +#include <asm/mach-ar7/ar7.h>
  33. +#include <asm/mach-ar7/prom.h>
  34. +#endif
  35. +
  36. /* Modules specific header files */
  37. #include "tn7atm.h"
  38. #include "tn7api.h"
  39. @@ -133,6 +142,27 @@
  40. #define NEW_TRAINING_VAL_T1413 128
  41. #define NEW_TRAINING_VAL_MMODE 255
  42. +extern char *mp_modulation;
  43. +extern int mp_fine_gain_control;
  44. +extern int mp_fine_gain_value;
  45. +extern int mp_enable_margin_retrain;
  46. +extern int mp_margin_threshold;
  47. +extern int mp_enable_rate_adapt;
  48. +extern int mp_powercutback;
  49. +extern int mp_trellis;
  50. +extern int mp_bitswap;
  51. +extern int mp_maximum_bits_per_carrier;
  52. +extern int mp_maximum_interleave_depth;
  53. +extern int mp_pair_selection;
  54. +extern int mp_dgas_polarity;
  55. +extern int mp_los_alarm;
  56. +extern char *mp_eoc_vendor_id;
  57. +extern int mp_eoc_vendor_revision;
  58. +extern char *mp_eoc_vendor_serialnum;
  59. +extern char *mp_invntry_vernum;
  60. +extern int mp_dsl_bit_tmode;
  61. +extern int mp_high_precision;
  62. +
  63. int testflag1 = 0;
  64. extern int __guDbgLevel;
  65. extern sar_stat_t sarStat;
  66. @@ -173,7 +203,6 @@ led_reg_t ledreg[2];
  67. static struct led_funcs ledreg[2];
  68. #endif
  69. -#define DEV_DSLMOD 1
  70. #define MAX_STR_SIZE 256
  71. #define DSL_MOD_SIZE 256
  72. @@ -299,7 +328,7 @@ static PITIDSLHW_T pIhw;
  73. static volatile int bshutdown;
  74. static char info[MAX_STR_SIZE];
  75. /* Used for DSL Polling enable */
  76. -static DECLARE_MUTEX_LOCKED (adsl_sem_overlay);
  77. +static struct semaphore adsl_sem_overlay;
  78. //kthread_t overlay_thread;
  79. /* end of module wide declars */
  80. @@ -309,8 +338,7 @@ static void tn7dsl_chng_modulation(void*
  81. static unsigned int tn7dsl_set_modulation(void* data, int flag);
  82. static void tn7dsl_ctrl_fineGain(int value);
  83. static void tn7dsl_set_fineGainValue(int value);
  84. -static int dslmod_sysctl (ctl_table * ctl, int write, struct file *filp,
  85. - void *buffer, size_t * lenp);
  86. +static int dslmod_sysctl (ctl_table * ctl, int write, void *buffer, size_t * lenp, loff_t *ppos);
  87. static void tn7dsl_register_dslss_led(void);
  88. void tn7dsl_dslmod_sysctl_register(void);
  89. void tn7dsl_dslmod_sysctl_unregister(void);
  90. @@ -323,6 +351,14 @@ static int tn7dsl_proc_snr_print (char *
  91. #define gDot1(a) ((a>0)?(a%10):((-a)%10))
  92. // UR8_MERGE_END CQ11054*
  93. +int avalanche_request_intr_pacing(int irq_nr, unsigned int blk_num,
  94. + unsigned int pace_value)
  95. +{
  96. + printk("avalanche_request_pacing(%d, %u, %u); // not implemented\n", irq_nr, blk_num, pace_value);
  97. + return 0;
  98. +}
  99. +
  100. +
  101. int os_atoi(const char *pStr)
  102. {
  103. int MulNeg = (*pStr == '-' ? -1 : 1);
  104. @@ -359,39 +395,6 @@ void dprintf (int uDbgLevel, char *szFmt
  105. #endif
  106. }
  107. -int strcmp(const char *s1, const char *s2)
  108. -{
  109. -
  110. - int size = strlen(s1);
  111. -
  112. - return(strncmp(s1, s2, size));
  113. -}
  114. -
  115. -int strncmp(const char *s1, const char *s2, size_t size)
  116. -{
  117. - int i = 0;
  118. - int max_size = (int)size;
  119. -
  120. - while((s1[i] != 0) && i < max_size)
  121. - {
  122. - if(s2[i] == 0)
  123. - {
  124. - return -1;
  125. - }
  126. - if(s1[i] != s2[i])
  127. - {
  128. - return 1;
  129. - }
  130. - i++;
  131. - }
  132. - if(s2[i] != 0)
  133. - {
  134. - return 1;
  135. - }
  136. -
  137. - return 0;
  138. -}
  139. -
  140. // * UR8_MERGE_START CQ10640 Jack Zhang
  141. int tn7dsl_dump_dsp_memory(char *input_str) //cph99
  142. {
  143. @@ -441,101 +444,79 @@ unsigned int shim_osGetCpuFrequency(void
  144. return CpuFrequency;
  145. }
  146. -int shim_osLoadFWImage(unsigned char *ptr)
  147. +static void avsar_release(struct device *dev)
  148. {
  149. - unsigned int bytesRead;
  150. - mm_segment_t oldfs;
  151. - static struct file *filp;
  152. - unsigned int imageLength=0x5ffff;
  153. -
  154. -
  155. - dgprintf(4, "tn7dsl_read_dsp()\n");
  156. -
  157. - dgprintf(4,"open file %s\n", DSP_FIRMWARE_PATH);
  158. -
  159. - filp=filp_open(DSP_FIRMWARE_PATH,00,O_RDONLY);
  160. - if(filp ==NULL)
  161. - {
  162. - printk("Failed: Could not open DSP binary file\n");
  163. - return -1;
  164. - }
  165. -
  166. - if (filp->f_dentry != NULL)
  167. - {
  168. - if (filp->f_dentry->d_inode != NULL)
  169. - {
  170. - printk ("DSP binary filesize = %d bytes\n",
  171. - (int) filp->f_dentry->d_inode->i_size);
  172. - imageLength = (unsigned int)filp->f_dentry->d_inode->i_size + 0x200;
  173. - }
  174. - }
  175. -
  176. - if (filp->f_op->read==NULL)
  177. - return -1; /* File(system) doesn't allow reads */
  178. -
  179. - /*
  180. - * Disable parameter checking
  181. - */
  182. - oldfs = get_fs();
  183. - set_fs(KERNEL_DS);
  184. -
  185. - /*
  186. - * Now read bytes from postion "StartPos"
  187. - */
  188. - filp->f_pos = 0;
  189. -
  190. - bytesRead = filp->f_op->read(filp,ptr,imageLength,&filp->f_pos);
  191. -
  192. - dgprintf(4,"file length = %d\n", bytesRead);
  193. -
  194. - set_fs(oldfs);
  195. -
  196. - /*
  197. - * Close the file
  198. - */
  199. - fput(filp);
  200. -
  201. - return bytesRead;
  202. + printk(KERN_DEBUG "avsar firmware released\n");
  203. }
  204. +static struct device avsar = {
  205. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
  206. + .bus_id = "vlynq",
  207. +#endif
  208. + .release = avsar_release,
  209. +};
  210. -unsigned int shim_read_overlay_page (void *ptr, unsigned int secOffset,
  211. - unsigned int secLength)
  212. +int shim_osLoadFWImage(unsigned char *ptr)
  213. {
  214. - unsigned int bytesRead;
  215. - mm_segment_t oldfs;
  216. - struct file *filp;
  217. -
  218. - dgprintf(4,"shim_read_overlay_page\n");
  219. - //dgprintf(4,"sec offset=%d, sec length =%d\n", secOffset, secLength);
  220. + const struct firmware *fw_entry;
  221. + size_t size;
  222. - filp=filp_open(DSP_FIRMWARE_PATH,00,O_RDONLY);
  223. - if(filp ==NULL)
  224. - {
  225. - printk("Failed: Could not open DSP binary file\n");
  226. - return -1;
  227. - }
  228. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
  229. + dev_set_name(&avsar, "avsar");
  230. +#endif
  231. + printk("requesting firmware image \"ar0700xx.bin\"\n");
  232. + if(device_register(&avsar) < 0) {
  233. + printk(KERN_ERR
  234. + "avsar: device_register fails\n");
  235. + return -1;
  236. + }
  237. - if (filp->f_op->read==NULL)
  238. - return -1; /* File(system) doesn't allow reads */
  239. + if(request_firmware(&fw_entry, "ar0700xx.bin", &avsar)) {
  240. + printk(KERN_ERR
  241. + "avsar: Firmware not available\n");
  242. + device_unregister(&avsar);
  243. + return -1;
  244. + }
  245. + size = fw_entry->size;
  246. + device_unregister(&avsar);
  247. + if(size > 0x5ffff) {
  248. + printk(KERN_ERR
  249. + "avsar: Firmware too big (%d bytes)\n", size);
  250. + release_firmware(fw_entry);
  251. + return -1;
  252. + }
  253. + memcpy(ptr, fw_entry->data, size);
  254. + release_firmware(fw_entry);
  255. + return size;
  256. +}
  257. - /*
  258. - * Now read bytes from postion "StartPos"
  259. - */
  260. +unsigned int shim_read_overlay_page(void *ptr, unsigned int secOffset, unsigned int secLength)
  261. +{
  262. + const struct firmware *fw_entry;
  263. - if(filp->f_op->llseek)
  264. - filp->f_op->llseek(filp,secOffset, 0);
  265. - oldfs = get_fs();
  266. - set_fs(KERNEL_DS);
  267. - filp->f_pos = secOffset;
  268. - bytesRead = filp->f_op->read(filp,ptr,secLength,&filp->f_pos);
  269. + printk("requesting firmware image \"ar0700xx.bin\"\n");
  270. + if(device_register(&avsar) < 0) {
  271. + printk(KERN_ERR
  272. + "avsar: device_register fails\n");
  273. + return -1;
  274. + }
  275. - set_fs(oldfs);
  276. - /*
  277. - * Close the file
  278. - */
  279. - fput(filp);
  280. - return bytesRead;
  281. + if(request_firmware(&fw_entry, "ar0700xx.bin", &avsar)) {
  282. + printk(KERN_ERR
  283. + "avsar: Firmware not available\n");
  284. + device_unregister(&avsar);
  285. + return -1;
  286. + }
  287. + device_unregister(&avsar);
  288. + if(fw_entry->size > secLength) {
  289. + printk(KERN_ERR
  290. + "avsar: Firmware too big (%d bytes)\n", fw_entry->size);
  291. + release_firmware(fw_entry);
  292. + return -1;
  293. + }
  294. + memcpy(ptr + secOffset, fw_entry->data, secLength);
  295. + release_firmware(fw_entry);
  296. + return secLength;
  297. }
  298. int shim_osLoadDebugFWImage(unsigned char *ptr)
  299. @@ -2834,7 +2815,6 @@ static int tn7dsl_set_dsl(void)
  300. int value;
  301. int i, offset[2]={4,11},oamFeature=0;
  302. char tmp[4];
  303. - char dspVer[10];
  304. // OAM Feature Configuration
  305. dslhal_api_dspInterfaceRead (pIhw, (unsigned int) pIhw->pmainAddr, 2,
  306. @@ -2845,98 +2825,82 @@ static int tn7dsl_set_dsl(void)
  307. (unsigned int *) &offset,
  308. (unsigned char *) &oamFeature, 4);
  309. - /* Do only if we are in the new Base PSP 7.4.*/
  310. - #if ((PSP_VERSION_MAJOR == 7) && (PSP_VERSION_MINOR == 4))
  311. - /* Check to see if we are operating in the new bit mode. */
  312. - ptr = prom_getenv("DSL_BIT_TMODE");
  313. - if (ptr)
  314. - {
  315. - /* If we are see if this is the first time the user has upgraded. */
  316. - ptr = prom_getenv("DSL_UPG_DONE");
  317. - if(!ptr)
  318. - {
  319. - /* If it is the first time the user is upgrading, then make sure that
  320. - we clear the modulation environment variable, as this could potentially
  321. - not have the same meaning in the new mode.
  322. - */
  323. - prom_unsetenv("modulation");
  324. - prom_setenv("DSL_UPG_DONE", "1");
  325. - }
  326. - }
  327. - #endif
  328. -
  329. // modulation
  330. ptr = prom_getenv("modulation");
  331. - if (ptr)
  332. + if (ptr || mp_modulation != NULL)
  333. {
  334. - tn7dsl_set_modulation(ptr, FALSE);
  335. + tn7dsl_set_modulation(mp_modulation == NULL ? ptr : mp_modulation, FALSE);
  336. }
  337. // Fine Gains
  338. ptr = prom_getenv("fine_gain_control");
  339. - if (ptr)
  340. + if (ptr || mp_fine_gain_control != -1)
  341. {
  342. - value = os_atoi(ptr);
  343. + value = mp_fine_gain_control == -1 ? os_atoi(ptr) : mp_fine_gain_control;
  344. tn7dsl_ctrl_fineGain(value);
  345. }
  346. ptr = NULL;
  347. ptr = prom_getenv("fine_gain_value");
  348. - if(ptr)
  349. - tn7dsl_set_fineGainValue(os_atoh(ptr));
  350. + if(ptr || mp_fine_gain_value != -1)
  351. + tn7dsl_set_fineGainValue(mp_fine_gain_value == -1 ? os_atoh(ptr) : mp_fine_gain_value);
  352. // margin retrain
  353. ptr = NULL;
  354. ptr = prom_getenv("enable_margin_retrain");
  355. - if(ptr)
  356. + value = mp_enable_margin_retrain == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_enable_margin_retrain;
  357. +
  358. + if (value == 1)
  359. {
  360. - value = os_atoi(ptr);
  361. - if(value == 1)
  362. + dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
  363. + bMarginRetrainEnable = 1;
  364. + //printk("enable showtime margin monitor.\n");
  365. +
  366. + ptr = NULL;
  367. + ptr = prom_getenv("margin_threshold");
  368. + value = mp_margin_threshold == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_margin_threshold;
  369. +
  370. + if(value >= 0)
  371. {
  372. - dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
  373. - bMarginRetrainEnable = 1;
  374. - //printk("enable showtime margin monitor.\n");
  375. - ptr = NULL;
  376. - ptr = prom_getenv("margin_threshold");
  377. - if(ptr)
  378. - {
  379. - value = os_atoi(ptr);
  380. - //printk("Set margin threshold to %d x 0.5 db\n",value);
  381. - if(value >= 0)
  382. - {
  383. - dslhal_api_setMarginThreshold(pIhw, value);
  384. - bMarginThConfig=1;
  385. - }
  386. - }
  387. + dslhal_api_setMarginThreshold(pIhw, value);
  388. + bMarginThConfig=1;
  389. }
  390. }
  391. // rate adapt
  392. ptr = NULL;
  393. ptr = prom_getenv("enable_rate_adapt");
  394. - if(ptr)
  395. + if(ptr || mp_enable_rate_adapt != -1)
  396. {
  397. - dslhal_api_setRateAdaptFlag(pIhw, os_atoi(ptr));
  398. + dslhal_api_setRateAdaptFlag(pIhw, mp_enable_rate_adapt == -1 ? os_atoi(ptr) : mp_enable_rate_adapt);
  399. + }
  400. +
  401. + // set powercutback
  402. + ptr = NULL;
  403. + ptr = prom_getenv("powercutback");
  404. + if(ptr || mp_powercutback != -1)
  405. + {
  406. + dslhal_advcfg_onOffPcb(pIhw, mp_powercutback == -1 ? os_atoi(ptr) : mp_powercutback);
  407. }
  408. // trellis
  409. ptr = NULL;
  410. ptr = prom_getenv("trellis");
  411. - if(ptr)
  412. + if(ptr || mp_trellis != -1)
  413. {
  414. - dslhal_api_setTrellisFlag(pIhw, os_atoi(ptr));
  415. - trellis = os_atoi(ptr);
  416. + trellis = mp_trellis == -1 ? os_atoi(ptr) : mp_trellis;
  417. + dslhal_api_setTrellisFlag(pIhw, trellis);
  418. //printk("trellis=%d\n");
  419. }
  420. // bitswap
  421. ptr = NULL;
  422. ptr = prom_getenv("bitswap");
  423. - if(ptr)
  424. + if(ptr || mp_bitswap != -1)
  425. {
  426. int offset[2] = {33, 0};
  427. unsigned int bitswap;
  428. - bitswap = os_atoi(ptr);
  429. + bitswap = mp_bitswap == -1 ? os_atoi(ptr) : mp_bitswap;
  430. tn7dsl_generic_read(2, offset);
  431. dslReg &= dslhal_support_byteSwap32(0xFFFFFF00);
  432. @@ -2954,46 +2918,47 @@ static int tn7dsl_set_dsl(void)
  433. // maximum bits per carrier
  434. ptr = NULL;
  435. ptr = prom_getenv("maximum_bits_per_carrier");
  436. - if(ptr)
  437. + if(ptr || mp_maximum_bits_per_carrier != -1)
  438. {
  439. - dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, os_atoi(ptr));
  440. + dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, mp_maximum_bits_per_carrier == -1 ? os_atoi(ptr) : mp_maximum_bits_per_carrier);
  441. }
  442. // maximum interleave depth
  443. ptr = NULL;
  444. ptr = prom_getenv("maximum_interleave_depth");
  445. - if(ptr)
  446. + if(ptr || mp_maximum_interleave_depth != -1)
  447. {
  448. - dslhal_api_setMaxInterleaverDepth(pIhw, os_atoi(ptr));
  449. + dslhal_api_setMaxInterleaverDepth(pIhw, mp_maximum_interleave_depth == -1 ? os_atoi(ptr) : mp_maximum_interleave_depth);
  450. }
  451. // inner and outer pairs
  452. ptr = NULL;
  453. ptr = prom_getenv("pair_selection");
  454. - if(ptr)
  455. + if(ptr || mp_pair_selection != -1)
  456. {
  457. - dslhal_api_selectInnerOuterPair(pIhw, os_atoi(ptr));
  458. + dslhal_api_selectInnerOuterPair(pIhw, mp_pair_selection == -1 ? os_atoi(ptr) : mp_pair_selection);
  459. }
  460. ptr = NULL;
  461. ptr = prom_getenv("dgas_polarity");
  462. - if(ptr)
  463. + if(ptr || mp_dgas_polarity != -1)
  464. {
  465. dslhal_api_configureDgaspLpr(pIhw, 1, 1);
  466. - dslhal_api_configureDgaspLpr(pIhw, 0, os_atoi(ptr));
  467. + dslhal_api_configureDgaspLpr(pIhw, 0, mp_dgas_polarity == -1 ? os_atoi(ptr) : mp_dgas_polarity);
  468. }
  469. ptr = NULL;
  470. ptr = prom_getenv("los_alarm");
  471. - if(ptr)
  472. + if(ptr || mp_los_alarm != -1)
  473. {
  474. - dslhal_api_disableLosAlarm(pIhw, os_atoi(ptr));
  475. + dslhal_api_disableLosAlarm(pIhw, mp_los_alarm == -1 ? os_atoi(ptr) : mp_los_alarm);
  476. }
  477. ptr = NULL;
  478. ptr = prom_getenv("eoc_vendor_id");
  479. - if(ptr)
  480. + if(ptr || mp_eoc_vendor_id != NULL)
  481. {
  482. + ptr = mp_eoc_vendor_id == NULL ? ptr : mp_eoc_vendor_id;
  483. for(i=0;i<8;i++)
  484. {
  485. tmp[0]=ptr[i*2];
  486. @@ -3018,26 +2983,26 @@ static int tn7dsl_set_dsl(void)
  487. }
  488. ptr = NULL;
  489. ptr = prom_getenv("eoc_vendor_revision");
  490. - if(ptr)
  491. + if(ptr || mp_eoc_vendor_revision != -1)
  492. {
  493. - value = os_atoi(ptr);
  494. + value = mp_eoc_vendor_revision == -1 ? os_atoi(ptr) : mp_eoc_vendor_revision;
  495. //printk("eoc rev=%d\n", os_atoi(ptr));
  496. dslhal_api_setEocRevisionNumber(pIhw, (char *)&value);
  497. }
  498. ptr = NULL;
  499. ptr = prom_getenv("eoc_vendor_serialnum");
  500. - if(ptr)
  501. + if(ptr || mp_eoc_vendor_serialnum != NULL)
  502. {
  503. - dslhal_api_setEocSerialNumber(pIhw, ptr);
  504. + dslhal_api_setEocSerialNumber(pIhw, mp_eoc_vendor_serialnum == NULL ? ptr : mp_eoc_vendor_serialnum);
  505. }
  506. // CQ10037 Added invntry_vernum environment variable to be able to set version number in ADSL2, ADSL2+ modes.
  507. ptr = NULL;
  508. ptr = prom_getenv("invntry_vernum");
  509. - if(ptr)
  510. + if(ptr || mp_invntry_vernum != NULL)
  511. {
  512. - dslhal_api_setEocRevisionNumber(pIhw, ptr);
  513. + dslhal_api_setEocRevisionNumber(pIhw, mp_invntry_vernum == NULL ? ptr : mp_invntry_vernum);
  514. }
  515. return 0;
  516. @@ -3064,6 +3029,7 @@ int tn7dsl_init(void *priv)
  517. int high_precision_selected = 0;
  518. // UR8_MERGE_END CQ11054*
  519. + sema_init(&adsl_sem_overlay, 0);
  520. /*
  521. * start dsl
  522. */
  523. @@ -3081,7 +3047,7 @@ int tn7dsl_init(void *priv)
  524. * backward compatibility.
  525. */
  526. cp = prom_getenv("DSL_BIT_TMODE");
  527. - if (cp)
  528. + if (cp || mp_dsl_bit_tmode != -1)
  529. {
  530. printk("%s : env var DSL_BIT_TMODE is set\n", __FUNCTION__);
  531. /*
  532. @@ -3110,9 +3076,9 @@ int tn7dsl_init(void *priv)
  533. // UR8_MERGE_START CQ11054 Jack Zhang
  534. cp = prom_getenv("high_precision");
  535. - if (cp)
  536. + if (cp || mp_high_precision != -1)
  537. {
  538. - high_precision_selected = os_atoi(cp);
  539. + high_precision_selected = mp_high_precision == -1 ? os_atoi(cp) : mp_high_precision;
  540. }
  541. if ( high_precision_selected)
  542. {
  543. @@ -3419,8 +3385,7 @@ unsigned int tn7dsl_get_memory(unsigned
  544. -static int dslmod_sysctl(ctl_table *ctl, int write, struct file * filp,
  545. - void *buffer, size_t *lenp)
  546. +static int dslmod_sysctl(ctl_table *ctl, int write, void *buffer, size_t *lenp, loff_t *ppos)
  547. {
  548. char *ptr;
  549. int ret, len = 0;
  550. @@ -3432,7 +3397,7 @@ static int dslmod_sysctl(ctl_table *ctl,
  551. char mod_req[16] = { '\t' };
  552. char fst_byt;
  553. - if (!*lenp || (filp->f_pos && !write))
  554. + if (!*lenp || (!*ppos && !write))
  555. {
  556. *lenp = 0;
  557. return 0;
  558. @@ -3442,11 +3407,10 @@ static int dslmod_sysctl(ctl_table *ctl,
  559. */
  560. if(write)
  561. {
  562. - ret = proc_dostring(ctl, write, filp, buffer, lenp);
  563. + ret = proc_dostring(ctl, write, buffer, lenp, ppos);
  564. - switch (ctl->ctl_name)
  565. + if (strcmp(ctl->procname, "dslmod") == 0)
  566. {
  567. - case DEV_DSLMOD:
  568. ptr = strpbrk(info, " \t");
  569. strcpy(mod_req, info);
  570. @@ -3456,7 +3420,7 @@ static int dslmod_sysctl(ctl_table *ctl,
  571. if (!strcmp (info, "dspfreq"))
  572. {
  573. printk("dsp_freq = %d\n", SAR_FREQUNCY * 4);
  574. - break;
  575. + return 0;
  576. }
  577. else if (!strncmp(info,"nohost", 6))
  578. {
  579. @@ -3481,14 +3445,14 @@ static int dslmod_sysctl(ctl_table *ctl,
  580. i, curr_setting.phyEnableDisableWord,
  581. i, curr_setting.phyControlWord);
  582. }
  583. - break;
  584. + return 0;
  585. }
  586. // * UR8_MERGE_START CQ10880 Jack Zhang
  587. else if (!strcmp(info,"dsp_l3msg"))
  588. {
  589. //printk("dsp_l3msg sent to DSP\n");
  590. dslhal_api_sendL3Command(pIhw);
  591. - break;
  592. + return 0;
  593. }
  594. // * UR8_MERGE_END CQ10880*
  595. @@ -3503,51 +3467,57 @@ static int dslmod_sysctl(ctl_table *ctl,
  596. if( fst_byt == 'S') type = type | (1 << 1);
  597. ret = tn7sar_oam_generation (pIhw->pOsContext, chan, type, vpi, vci, timeout);
  598. break;
  599. -
  600. - case 'F':
  601. + case 'F':
  602. chan = tn7dsl_process_txflush_string (&queue, mod_req);
  603. if (chan < 16)
  604. tn7sar_tx_flush (pIhw->pOsContext, chan, queue, 0);
  605. break;
  606. case 'D':
  607. -// * UR8_MERGE_START CQ10640 Jack Zhang
  608. - if (mod_req[0]=='d') //cph99
  609. + if (mod_req[0]=='d')
  610. tn7dsl_dump_dsp_memory (&mod_req[1]);
  611. else
  612. tn7dsl_dump_memory (&mod_req[1]);
  613. -// * UR8_MERGE_END CQ10640*
  614. - break;
  615. + break;
  616. case 'W':
  617. tn7dsl_write_memory(&mod_req[1]);
  618. break;
  619. default:
  620. tn7dsl_chng_modulation (info);
  621. }
  622. - }
  623. + }
  624. }
  625. else
  626. {
  627. len += sprintf(info+len, mod_req);
  628. - ret = proc_dostring(ctl, write, filp, buffer, lenp);
  629. + ret = proc_dostring(ctl, write, buffer, lenp, ppos);
  630. }
  631. return ret;
  632. }
  633. ctl_table dslmod_table[] = {
  634. - {DEV_DSLMOD, "dslmod", info, DSL_MOD_SIZE, 0644, NULL, &dslmod_sysctl}
  635. - ,
  636. - {0}
  637. - };
  638. + {
  639. + .procname = "dslmod",
  640. + .data = info,
  641. + .maxlen = DSL_MOD_SIZE,
  642. + .mode = 0644,
  643. + .proc_handler = &dslmod_sysctl
  644. + },
  645. + { }
  646. +};
  647. /* Make sure that /proc/sys/dev is there */
  648. ctl_table dslmod_root_table[] = {
  649. #ifdef CONFIG_PROC_FS
  650. - {CTL_DEV, "dev", NULL, 0, 0555, dslmod_table}
  651. - ,
  652. + {
  653. + .procname = "dev",
  654. + .maxlen = 0,
  655. + .mode = 0555,
  656. + .child = dslmod_table,
  657. + },
  658. #endif /* CONFIG_PROC_FS */
  659. - {0}
  660. - };
  661. + { }
  662. +};
  663. static struct ctl_table_header *dslmod_sysctl_header;
  664. @@ -3558,8 +3528,7 @@ void tn7dsl_dslmod_sysctl_register(void)
  665. if (initialized == 1)
  666. return;
  667. - dslmod_sysctl_header = register_sysctl_table(dslmod_root_table, 1);
  668. - dslmod_root_table->child->de->owner = THIS_MODULE;
  669. + dslmod_sysctl_header = register_sysctl_table(dslmod_root_table);
  670. /*
  671. * set the defaults
  672. @@ -4821,4 +4790,4 @@ int tn7dsl_proc_PMDus(char* buf, char **
  673. }
  674. #endif //NO_ADV_STATS
  675. #endif //TR69_PMD_IN
  676. -// * UR8_MERGE_END CQ11057 *
  677. \ No newline at end of file
  678. +// * UR8_MERGE_END CQ11057 *