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-/* sim.cfg -- Simulator configuration script file
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- Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org
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-
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-This file is part of OpenRISC 1000 Architectural Simulator.
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-It contains the default configuration and help about configuring
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-the simulator.
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-
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-This program is free software; you can redistribute it and/or modify
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-it under the terms of the GNU General Public License as published by
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-the Free Software Foundation; either version 2 of the License, or
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-(at your option) any later version.
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-
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-This program is distributed in the hope that it will be useful,
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-but WITHOUT ANY WARRANTY; without even the implied warranty of
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-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-GNU General Public License for more details.
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-
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-You should have received a copy of the GNU General Public License
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-along with this program; if not, write to the Free Software
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-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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-
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-
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-/* INTRODUCTION
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-
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- The ork1sim has various parameters, that are set in configuration files
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- like this one. The user can switch between configurations at startup by
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- specifying the required configuration file with the -f <filename.cfg> option.
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- If no configuration file is specified or1ksim searches for the default
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- configuration file sim.cfg. First it searches for './sim.cfg'. If this
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- file is not found, it searches for '~/or1k/sim.cfg'. If this file is
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- not found too, it reverts to the built-in default configuration.
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-
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- NOTE: Users should not rely on the built-in configuration, since the
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- default configuration may differ between version.
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- Rather create a configuration file that sets all critical values.
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-
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- This file may contain (standard C) comments only - no // support.
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-
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- Configure files may be be included, using:
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- include "file_name_to_include"
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-
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- Like normal configuration files, the included file is divided into
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- sections. Each section is described in detail also.
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-
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- Some section have subsections. One example of such a subsection is:
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-
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- device <index>
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- instance specific parameters...
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- enddevice
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-
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- which creates a device instance.
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-*/
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-
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-
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-/* MEMORY SECTION
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-
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- This section specifies how the memory is generated and the blocks
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- it consists of.
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-
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- type = random/unknown/pattern
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- Specifies the initial memory values.
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- 'random' generates random memory using seed 'random_seed'.
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- 'pattern' fills memory with 'pattern'.
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- 'unknown' does not specify how memory should be generated,
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- leaving the memory in a undefined state. This is the fastest
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- option.
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-
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- random_seed = <value>
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- random seed for randomizer, used if type = 'random'.
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-
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- pattern = <value>
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- pattern to fill memory, used if type = 'pattern'.
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-
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- nmemories = <value>
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- number of memory instances connected
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-
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- baseaddr = <hex_value>
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- memory start address
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-
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- size = <hex_value>
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- memory size
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-
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- name = "<string>"
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- memory block name
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-
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- ce = <value>
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- chip enable index of the memory instance
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-
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- mc = <value>
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- memory controller this memory is connected to
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-
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- delayr = <value>
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- cycles, required for read access, -1 if instance does not support reading
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-
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- delayw = <value>
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- cycles, required for write access, -1 if instance does not support writing
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-
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- log = "<filename>"
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- filename, where to log memory accesses to, no log, if log command is not specified
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-*/
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-
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-
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-section memory
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- /*random_seed = 12345
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- type = random*/
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- pattern = 0x00
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- type = unknown /* Fastest */
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-
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- name = "FLASH"
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- ce = 0
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- mc = 0
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- baseaddr = 0xf0000000
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- size = 0x01000000
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- delayr = 1
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- delayw = -1
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-end
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-
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-section memory
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- /*random_seed = 12345
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- type = random*/
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- pattern = 0x00
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- type = unknown /* Fastest */
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-
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- name = "RAM"
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- ce = 1
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- mc = 0
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- baseaddr = 0x00000000
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- size = 0x04000000
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- delayr = 1
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- delayw = 1
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-end
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-
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-section memory
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- /*random_seed = 12345
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- type = random*/
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- pattern = 0x00
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- type = unknown /* Fastest */
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-
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- name = "SRAM"
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- mc = 0
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- ce = 2
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- baseaddr = 0xa4000000
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- size = 0x00100000
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- delayr = 1
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- delayw = 2
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-end
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-
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-
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-/* IMMU SECTION
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-
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- This section configures the Instruction Memory Manangement Unit
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-
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- enabled = 0/1
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- '0': disabled
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- '1': enabled
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- (NOTE: UPR bit is set)
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-
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- nsets = <value>
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- number of ITLB sets; must be power of two
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-
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- nways = <value>
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- number of ITLB ways
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-
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- pagesize = <value>
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- instruction page size; must be power of two
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-
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- entrysize = <value>
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- instruction entry size in bytes
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-
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- ustates = <value>
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- number of ITLB usage states (2, 3, 4 etc., max is 4)
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-
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- hitdelay = <value>
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- number of cycles immu hit costs
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-
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- missdelay = <value>
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- number of cycles immu miss costs
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-*/
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-
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-section immu
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- enabled = 1
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- nsets = 64
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- nways = 1
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- pagesize = 8192
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- hitdelay = 0
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- missdelay = 0
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-end
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-
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-
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-/* DMMU SECTION
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-
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- This section configures the Data Memory Manangement Unit
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-
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- enabled = 0/1
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- '0': disabled
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- '1': enabled
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- (NOTE: UPR bit is set)
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-
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- nsets = <value>
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- number of DTLB sets; must be power of two
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-
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- nways = <value>
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- number of DTLB ways
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-
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- pagesize = <value>
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- data page size; must be power of two
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-
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- entrysize = <value>
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- data entry size in bytes
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-
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- ustates = <value>
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- number of DTLB usage states (2, 3, 4 etc., max is 4)
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-
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- hitdelay = <value>
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- number of cycles dmmu hit costs
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-
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- missdelay = <value>
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- number of cycles dmmu miss costs
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-*/
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-
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-section dmmu
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- enabled = 1
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- nsets = 64
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- nways = 1
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- pagesize = 8192
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- hitdelay = 0
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- missdelay = 0
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-end
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-
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-
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-/* IC SECTION
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-
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- This section configures the Instruction Cache
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-
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- enabled = 0/1
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- '0': disabled
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- '1': enabled
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- (NOTE: UPR bit is set)
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-
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- nsets = <value>
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- number of IC sets; must be power of two
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-
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- nways = <value>
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- number of IC ways
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-
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- blocksize = <value>
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- IC block size in bytes; must be power of two
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-
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- ustates = <value>
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- number of IC usage states (2, 3, 4 etc., max is 4)
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-
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- hitdelay = <value>
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- number of cycles ic hit costs
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-
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- missdelay = <value>
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- number of cycles ic miss costs
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-*/
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-
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-section ic
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- enabled = 0
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- nsets = 512
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- nways = 1
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- blocksize = 16
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- hitdelay = 1
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- missdelay = 1
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-end
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-
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-
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-/* DC SECTION
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-
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- This section configures the Data Cache
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-
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- enabled = 0/1
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- '0': disabled
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- '1': enabled
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- (NOTE: UPR bit is set)
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-
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- nsets = <value>
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- number of DC sets; must be power of two
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-
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- nways = <value>
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- number of DC ways
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-
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- blocksize = <value>
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- DC block size in bytes; must be power of two
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-
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- ustates = <value>
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- number of DC usage states (2, 3, 4 etc., max is 4)
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-
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- load_hitdelay = <value>
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- number of cycles dc load hit costs
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-
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- load_missdelay = <value>
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- number of cycles dc load miss costs
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-
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- store_hitdelay = <value>
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- number of cycles dc load hit costs
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-
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- store_missdelay = <value>
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- number of cycles dc load miss costs
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-*/
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-
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-section dc
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- enabled = 0
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- nsets = 512
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- nways = 1
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- blocksize = 16
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- load_hitdelay = 1
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- load_missdelay = 1
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- store_hitdelay = 1
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- store_missdelay = 1
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-end
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-
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-
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-/* SIM SECTION
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-
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- This section specifies how or1ksim should behave.
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-
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- verbose = 0/1
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- '0': don't print extra messages
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- '1': print extra messages
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-
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- debug = 0-9
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- 0 : no debug messages
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- 1-9: debug message level.
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- higher numbers produce more messages
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-
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- profile = 0/1
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- '0': don't generate profiling file 'sim.profile'
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- '1': don't generate profiling file 'sim.profile'
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-
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- prof_fn = "<filename>"
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- optional filename for the profiling file.
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- valid only if 'profile' is set
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-
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- mprofile = 0/1
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- '0': don't generate memory profiling file 'sim.mprofile'
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- '1': generate memory profiling file 'sim.mprofile'
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-
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- mprof_fn = "<filename>"
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- optional filename for the memory profiling file.
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- valid only if 'mprofile' is set
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-
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- history = 0/1
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- '0': don't track execution flow
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- '1': track execution flow
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- Execution flow can be tracked for the simulator's
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- 'hist' command. Useful for back-trace debugging.
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-
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- iprompt = 0/1
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- '0': start in <not interactive prompt> (so what do we start in ???)
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- '1': start in interactive prompt.
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-
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- exe_log = 0/1
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- '0': don't generate execution log.
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- '1': generate execution log.
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-
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- exe_log = default/hardware/simple/software
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- type of execution log, default is used when not specified
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-
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- exe_log_start = <value>
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- index of first instruction to start logging, default = 0
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-
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- exe_log_end = <value>
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- index of last instruction to end logging; not limited, if omitted
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-
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- exe_log_marker = <value>
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- <value> specifies number of instructions before horizontal marker is
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- printed; if zero, markers are disabled (default)
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-
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- exe_log_fn = "<filename>"
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- filename for the exection log file.
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- valid only if 'exe_log' is set
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-
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- clkcycle = <value>[ps|ns|us|ms]
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- specifies time measurement for one cycle
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-*/
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-
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-section sim
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- verbose = 1
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- debug = 0
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- profile = 0
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- history = 0
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-
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- clkcycle = 10ns
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-end
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-
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-
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-/* SECTION VAPI
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-
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- This section configures the Verification API, used for Advanced
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- Core Verification.
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-
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- enabled = 0/1
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- '0': disbable VAPI server
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- '1': enable/start VAPI server
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-
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- server_port = <value>
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- TCP/IP port to start VAPI server on
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-
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- log_enabled = 0/1
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- '0': disable VAPI requests logging
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- '1': enable VAPI requests logging
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-
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- hide_device_id = 0/1
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- '0': don't log device id (for compatability with old version)
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- '1': log device id
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-
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-
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- vapi_fn = <filename>
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- filename for the log file.
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- valid only if log_enabled is set
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-*/
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-
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-section VAPI
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- enabled = 0
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- server_port = 9998
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- log_enabled = 0
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- vapi_log_fn = "vapi.log"
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-end
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-
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-
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-/* CPU SECTION
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-
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- This section specifies various CPU parameters.
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-
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- ver = <value>
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- rev = <value>
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- specifies version and revision of the CPU used
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-
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- upr = <value>
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- changes the upr register
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-
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- sr = <value>
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- sets the initial Supervision Register value
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- supervisor mode (SM) and fixed one (FO) set = 0x8001
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- exception prefix high (EPH, vectors@0xf0000000) = 0x4000
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- together, (SM | FO | EPH) = 0xc001
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- superscalar = 0/1
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- '0': CPU is scalar
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- '1': CPU is superscalar
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- (modify cpu/or32/execute.c to tune superscalar model)
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-
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- hazards = 0/1
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- '0': don't track data hazards in superscalar CPU
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- '1': track data hazards in superscalar CPU
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- If tracked, data hazards can be displayed using the
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- simulator's 'r' command.
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-
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- dependstats = 0/1
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- '0': don't calculate inter-instruction dependencies.
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- '1': calculate inter-instruction dependencies.
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- If calculated, inter-instruction dependencies can be
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- displayed using the simulator's 'stat' command.
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-
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- sbuf_len = <value>
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- length of store buffer (<= 256), 0 = disabled
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-*/
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-
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-section cpu
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- ver = 0x12
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- cfg = 0x00
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- rev = 0x01
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- sr = 0x8001 /*SPR_SR_FO | SPR_SR_SM | SPR_SR_EPH */
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- /* upr = */
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- superscalar = 0
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- hazards = 0
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- dependstats = 0
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- sbuf_len = 0
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-end
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-
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-
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-/* PM SECTION
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-
|
|
|
- This section specifies Power Management parameters
|
|
|
-
|
|
|
- enabled = 0/1
|
|
|
- '0': disable power management
|
|
|
- '1': enable power management
|
|
|
-*/
|
|
|
-
|
|
|
-section pm
|
|
|
- enabled = 0
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* BPB SECTION
|
|
|
-
|
|
|
- This section specifies how branch prediction should behave.
|
|
|
-
|
|
|
- enabled = 0/1
|
|
|
- '0': disable branch prediction
|
|
|
- '1': enable branch prediction
|
|
|
-
|
|
|
- btic = 0/1
|
|
|
- '0': disable branch target instruction cache model
|
|
|
- '1': enable branch target instruction cache model
|
|
|
-
|
|
|
- sbp_bf_fwd = 0/1
|
|
|
- Static branch prediction for 'l.bf'
|
|
|
- '0': don't use forward prediction
|
|
|
- '1': use forward prediction
|
|
|
-
|
|
|
- sbp_bnf_fwd = 0/1
|
|
|
- Static branch prediction for 'l.bnf'
|
|
|
- '0': don't use forward prediction
|
|
|
- '1': use forward prediction
|
|
|
-
|
|
|
- hitdelay = <value>
|
|
|
- number of cycles bpb hit costs
|
|
|
-
|
|
|
- missdelay = <value>
|
|
|
- number of cycles bpb miss costs
|
|
|
-*/
|
|
|
-
|
|
|
-section bpb
|
|
|
- enabled = 0
|
|
|
- btic = 0
|
|
|
- sbp_bf_fwd = 0
|
|
|
- sbp_bnf_fwd = 0
|
|
|
- hitdelay = 0
|
|
|
- missdelay = 0
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* DEBUG SECTION
|
|
|
-
|
|
|
- This sections specifies how the debug unit should behave.
|
|
|
-
|
|
|
- enabled = 0/1
|
|
|
- '0': disable debug unit
|
|
|
- '1': enable debug unit
|
|
|
-
|
|
|
- gdb_enabled = 0/1
|
|
|
- '0': don't start gdb server
|
|
|
- '1': start gdb server at port 'server_port'
|
|
|
-
|
|
|
- server_port = <value>
|
|
|
- TCP/IP port to start gdb server on
|
|
|
- valid only if gdb_enabled is set
|
|
|
-
|
|
|
- vapi_id = <hex_value>
|
|
|
- Used to create "fake" vapi log file containing the JTAG proxy messages.
|
|
|
-*/
|
|
|
-section debug
|
|
|
- enabled = 0
|
|
|
-/* gdb_enabled = 0 */
|
|
|
-/* server_port = 9999*/
|
|
|
- rsp_enabled = 1
|
|
|
- rsp_port = 50001
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* MC SECTION
|
|
|
-
|
|
|
- This section configures the memory controller
|
|
|
-
|
|
|
- enabled = 0/1
|
|
|
- '0': disable memory controller
|
|
|
- '1': enable memory controller
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first MC register
|
|
|
-
|
|
|
- POC = <hex_value>
|
|
|
- Power On Configuration register
|
|
|
-
|
|
|
- index = <value>
|
|
|
- Index of this memory controller amongst all the memory controllers
|
|
|
-*/
|
|
|
-
|
|
|
-section mc
|
|
|
- enabled = 0
|
|
|
- baseaddr = 0x93000000
|
|
|
- POC = 0x00000008 /* Power on configuration register */
|
|
|
- index = 0
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* UART SECTION
|
|
|
-
|
|
|
- This section configures the UARTs
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first UART register for this device
|
|
|
-
|
|
|
-
|
|
|
- channel = <channeltype>:<args>
|
|
|
-
|
|
|
- The channel parameter indicates the source of received UART characters
|
|
|
- and the sink for transmitted UART characters.
|
|
|
-
|
|
|
- The <channeltype> can be either "file", "xterm", "tcp", "fd", or "tty"
|
|
|
- (without quotes).
|
|
|
-
|
|
|
- A) To send/receive characters from a pair of files, use a file
|
|
|
- channel:
|
|
|
-
|
|
|
- channel=file:<rxfile>,<txfile>
|
|
|
-
|
|
|
- B) To create an interactive terminal window, use an xterm channel:
|
|
|
-
|
|
|
- channel=xterm:[<xterm_arg>]*
|
|
|
-
|
|
|
- C) To create a bidirectional tcp socket which one could, for example,
|
|
|
- access via telnet, use a tcp channel:
|
|
|
-
|
|
|
- channel=tcp:<port number>
|
|
|
-
|
|
|
- D) To cause the UART to read/write from existing numeric file
|
|
|
- descriptors, use an fd channel:
|
|
|
-
|
|
|
- channel=fd:<rx file descriptor num>,<tx file descriptor num>
|
|
|
-
|
|
|
- E) To connect the UART to a physical serial port, create a tty
|
|
|
- channel:
|
|
|
-
|
|
|
- channel=tty:device=/dev/ttyS0,baud=9600
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- irq number for this device
|
|
|
-
|
|
|
- 16550 = 0/1
|
|
|
- '0': this device is a UART16450
|
|
|
- '1': this device is a UART16550
|
|
|
-
|
|
|
- jitter = <value>
|
|
|
- in msecs... time to block, -1 to disable it
|
|
|
-
|
|
|
- vapi_id = <hex_value>
|
|
|
- VAPI id of this instance
|
|
|
-*/
|
|
|
-
|
|
|
-section uart
|
|
|
- enabled = 1
|
|
|
- baseaddr = 0x90000000
|
|
|
- irq = 2
|
|
|
- /* channel = "file:uart0.rx,uart0.tx" */
|
|
|
- channel = "tcp:10084"
|
|
|
- /*channel = "xterm:"*/
|
|
|
- jitter = -1 /* async behaviour */
|
|
|
- 16550 = 1
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* DMA SECTION
|
|
|
-
|
|
|
- This section configures the DMAs
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first DMA register for this device
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- irq number for this device
|
|
|
-
|
|
|
- vapi_id = <hex_value>
|
|
|
- VAPI id of this instance
|
|
|
-*/
|
|
|
-
|
|
|
-section dma
|
|
|
- enabled = 1
|
|
|
- baseaddr = 0x9a000000
|
|
|
- irq = 11
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* ETHERNET SECTION
|
|
|
-
|
|
|
- This section configures the ETHERNETs
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first ethernet register for this device
|
|
|
-
|
|
|
- dma = <value>
|
|
|
- which controller is this ethernet "connected" to
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- ethernet mac IRQ level
|
|
|
-
|
|
|
- rtx_type = <value>
|
|
|
- use 0 - file interface, 1 - socket interface
|
|
|
-
|
|
|
- rx_channel = <value>
|
|
|
- DMA channel used for RX
|
|
|
-
|
|
|
- tx_channel = <value>
|
|
|
- DMA channel used for TX
|
|
|
-
|
|
|
- rxfile = "<filename>"
|
|
|
- filename, where to read data from
|
|
|
-
|
|
|
- txfile = "<filename>"
|
|
|
- filename, where to write data to
|
|
|
-
|
|
|
- sockif = "<ifacename>"
|
|
|
- interface name of ethernet socket
|
|
|
-
|
|
|
- vapi_id = <hex_value>
|
|
|
- VAPI id of this instance
|
|
|
-*/
|
|
|
-
|
|
|
-section ethernet
|
|
|
- enabled = 1
|
|
|
- baseaddr = 0x92000000
|
|
|
- /* dma = 0 */
|
|
|
- irq = 4
|
|
|
- rtx_type = "tap"
|
|
|
- tap_dev = "tap0"
|
|
|
- /* tx_channel = 0 */
|
|
|
- /* rx_channel = 1 */
|
|
|
- rxfile = "eth0.rx"
|
|
|
- txfile = "eth0.tx"
|
|
|
- sockif = "eth0"
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* GPIO SECTION
|
|
|
-
|
|
|
- This section configures the GPIOs
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first GPIO register for this device
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- irq number for this device
|
|
|
-
|
|
|
- base_vapi_id = <hex_value>
|
|
|
- first VAPI id of this instance
|
|
|
- GPIO uses 8 consecutive VAPI IDs
|
|
|
-*/
|
|
|
-
|
|
|
-section gpio
|
|
|
- enabled = 0
|
|
|
- baseaddr = 0x91000000
|
|
|
- irq = 3
|
|
|
- base_vapi_id = 0x0200
|
|
|
-end
|
|
|
-
|
|
|
-/* VGA SECTION
|
|
|
-
|
|
|
- This section configures the VGA/LCD controller
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first VGA register
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- irq number for this device
|
|
|
-
|
|
|
- refresh_rate = <value>
|
|
|
- number of cycles between screen dumps
|
|
|
-
|
|
|
- filename = "<filename>"
|
|
|
- template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
|
|
-*/
|
|
|
-
|
|
|
-section vga
|
|
|
- enabled = 0
|
|
|
- baseaddr = 0x97100000
|
|
|
- irq = 8
|
|
|
- refresh_rate = 100000
|
|
|
- filename = "primary"
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* TICK TIMER SECTION
|
|
|
-
|
|
|
- This section configures tick timer
|
|
|
-
|
|
|
- enabled = 0/1
|
|
|
- whether tick timer is enabled
|
|
|
-*/
|
|
|
-
|
|
|
-section pic
|
|
|
- enabled = 1
|
|
|
- edge_trigger = 1
|
|
|
-end
|
|
|
-
|
|
|
-/* FB SECTION
|
|
|
-
|
|
|
- This section configures the frame buffer
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- base address of frame buffer
|
|
|
-
|
|
|
- paladdr = <hex_value>
|
|
|
- base address of first palette entry
|
|
|
-
|
|
|
- refresh_rate = <value>
|
|
|
- number of cycles between screen dumps
|
|
|
-
|
|
|
- filename = "<filename>"
|
|
|
- template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
|
|
-*/
|
|
|
-
|
|
|
-section fb
|
|
|
- enabled = 0
|
|
|
- baseaddr = 0x97000000
|
|
|
- refresh_rate = 1000000
|
|
|
- filename = "primary"
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* KBD SECTION
|
|
|
-
|
|
|
- This section configures the PS/2 compatible keyboard
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- base address of the keyboard device
|
|
|
-
|
|
|
- rxfile = "<filename>"
|
|
|
- filename, where to read data from
|
|
|
-*/
|
|
|
-
|
|
|
-section kbd
|
|
|
- enabled = 0
|
|
|
- irq = 5
|
|
|
- baseaddr = 0x94000000
|
|
|
- rxfile = "kbd.rx"
|
|
|
-end
|
|
|
-
|
|
|
-
|
|
|
-/* ATA SECTION
|
|
|
-
|
|
|
- This section configures the ATA/ATAPI host controller
|
|
|
-
|
|
|
- baseaddr = <hex_value>
|
|
|
- address of first ATA register
|
|
|
-
|
|
|
- enabled = <0|1>
|
|
|
- Enable/disable the peripheral. By default if it is enabled.
|
|
|
-
|
|
|
- irq = <value>
|
|
|
- irq number for this device
|
|
|
-
|
|
|
- debug = <value>
|
|
|
- debug level for ata models.
|
|
|
- 0: no debug messages
|
|
|
- 1: verbose messages
|
|
|
- 3: normal messages (more messages than verbose)
|
|
|
- 5: debug messages (normal debug messages)
|
|
|
- 7: flow control messages (debug statemachine flows)
|
|
|
- 9: low priority message (display everything the code does)
|
|
|
-
|
|
|
- dev_type0/1 = <value>
|
|
|
- ata device 0 type
|
|
|
- 0: NO_CONNeCT: none (not connected)
|
|
|
- 1: FILE : simulated harddisk
|
|
|
- 2: LOCAL : local system harddisk
|
|
|
-
|
|
|
- dev_file0/1 = "<filename>"
|
|
|
- filename for simulated ATA device
|
|
|
- valid only if dev_type0 == 1
|
|
|
-
|
|
|
- dev_size0/1 = <value>
|
|
|
- size of simulated hard-disk (in MBytes)
|
|
|
- valid only if dev_type0 == 1
|
|
|
-
|
|
|
- dev_packet0/1 = <value>
|
|
|
- 0: simulated ATA device does NOT implement PACKET command feature set
|
|
|
- 1: simulated ATA device does implement PACKET command feature set
|
|
|
-
|
|
|
- FIXME: irq number
|
|
|
-*/
|
|
|
-
|
|
|
-section ata
|
|
|
- enabled = 0
|
|
|
- baseaddr = 0x9e000000
|
|
|
- irq = 15
|
|
|
-
|
|
|
-end
|
Waldemar Brodkorb