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@@ -0,0 +1,283 @@
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+diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.c gcc-10.3.0/gcc/config/sparc/sparc.c
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+--- gcc-10.3.0.orig/gcc/config/sparc/sparc.c 2021-04-08 13:56:28.201742273 +0200
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++++ gcc-10.3.0/gcc/config/sparc/sparc.c 2022-01-24 10:19:53.724121161 +0100
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+@@ -4157,6 +4157,13 @@
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+ static bool
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+ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
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+ {
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++ /* After IRA has run in PIC mode, it is too late to put anything into the
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++ constant pool if the PIC register hasn't already been initialized. */
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++ if ((lra_in_progress || reload_in_progress)
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++ && flag_pic
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++ && !crtl->uses_pic_offset_table)
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++ return true;
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++
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+ switch (GET_CODE (x))
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+ {
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+ case CONST_INT:
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+@@ -4192,11 +4199,9 @@
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+ }
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+
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+ /* Global Offset Table support. */
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+-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
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+-static GTY(()) rtx got_register_rtx = NULL_RTX;
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+ static GTY(()) rtx got_helper_rtx = NULL_RTX;
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+-
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+-static GTY(()) bool got_helper_needed = false;
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++static GTY(()) rtx got_register_rtx = NULL_RTX;
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++static GTY(()) rtx got_symbol_rtx = NULL_RTX;
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+
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+ /* Return the SYMBOL_REF for the Global Offset Table. */
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+
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+@@ -4209,6 +4214,27 @@
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+ return got_symbol_rtx;
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+ }
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+
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++#ifdef HAVE_GAS_HIDDEN
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++# define USE_HIDDEN_LINKONCE 1
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++#else
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++# define USE_HIDDEN_LINKONCE 0
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++#endif
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++
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++static void
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++get_pc_thunk_name (char name[32], unsigned int regno)
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++{
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++ const char *reg_name = reg_names[regno];
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++
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++ /* Skip the leading '%' as that cannot be used in a
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++ symbol name. */
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++ reg_name += 1;
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++
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++ if (USE_HIDDEN_LINKONCE)
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++ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
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++ else
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++ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
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++}
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++
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+ /* Wrapper around the load_pcrel_sym{si,di} patterns. */
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+
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+ static rtx
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+@@ -4228,78 +4254,30 @@
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+ return insn;
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+ }
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+
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+-/* Output the load_pcrel_sym{si,di} patterns. */
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+-
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+-const char *
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+-output_load_pcrel_sym (rtx *operands)
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+-{
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+- if (flag_delayed_branch)
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+- {
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+- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
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+- output_asm_insn ("call\t%a2", operands);
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+- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
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+- }
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+- else
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+- {
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+- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
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+- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
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+- output_asm_insn ("call\t%a2", operands);
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+- output_asm_insn (" nop", NULL);
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+- }
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+-
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+- if (operands[2] == got_helper_rtx)
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+- got_helper_needed = true;
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+-
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+- return "";
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+-}
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+-
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+-#ifdef HAVE_GAS_HIDDEN
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+-# define USE_HIDDEN_LINKONCE 1
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+-#else
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+-# define USE_HIDDEN_LINKONCE 0
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+-#endif
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+-
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+ /* Emit code to load the GOT register. */
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+
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+ void
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+ load_got_register (void)
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+ {
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+- rtx insn;
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++ if (!got_register_rtx)
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++ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
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+
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+ if (TARGET_VXWORKS_RTP)
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+- {
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+- if (!got_register_rtx)
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+- got_register_rtx = pic_offset_table_rtx;
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+-
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+- insn = gen_vxworks_load_got ();
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+- }
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++ emit_insn (gen_vxworks_load_got ());
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+ else
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+ {
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+- if (!got_register_rtx)
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+- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
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+-
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+ /* The GOT symbol is subject to a PC-relative relocation so we need a
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+ helper function to add the PC value and thus get the final value. */
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+ if (!got_helper_rtx)
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+ {
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+ char name[32];
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+-
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+- /* Skip the leading '%' as that cannot be used in a symbol name. */
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+- if (USE_HIDDEN_LINKONCE)
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+- sprintf (name, "__sparc_get_pc_thunk.%s",
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+- reg_names[REGNO (got_register_rtx)] + 1);
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+- else
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+- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
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+- REGNO (got_register_rtx));
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+-
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++ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
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+ got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
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+ }
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+
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+- insn
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+- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
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++ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
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++ got_helper_rtx));
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+ }
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+-
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+- emit_insn (insn);
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+ }
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+
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+ /* Ensure that we are not using patterns that are not OK with PIC. */
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+@@ -5464,7 +5442,7 @@
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+ return true;
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+
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+ /* GOT register (%l7) if needed. */
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+- if (got_register_rtx && regno == REGNO (got_register_rtx))
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++ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
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+ return true;
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+
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+ /* If the function accesses prior frames, the frame pointer and the return
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+@@ -12507,9 +12485,10 @@
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+ sparc_file_end (void)
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+ {
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+ /* If we need to emit the special GOT helper function, do so now. */
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+- if (got_helper_needed)
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++ if (got_helper_rtx)
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+ {
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+ const char *name = XSTR (got_helper_rtx, 0);
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++ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
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+ #ifdef DWARF2_UNWIND_INFO
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+ bool do_cfi;
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+ #endif
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+@@ -12546,22 +12525,17 @@
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+ #ifdef DWARF2_UNWIND_INFO
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+ do_cfi = dwarf2out_do_cfi_asm ();
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+ if (do_cfi)
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+- output_asm_insn (".cfi_startproc", NULL);
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++ fprintf (asm_out_file, "\t.cfi_startproc\n");
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+ #endif
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+ if (flag_delayed_branch)
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+- {
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+- output_asm_insn ("jmp\t%%o7+8", NULL);
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+- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
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+- }
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++ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
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++ reg_name, reg_name);
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+ else
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+- {
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+- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
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+- output_asm_insn ("jmp\t%%o7+8", NULL);
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+- output_asm_insn (" nop", NULL);
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+- }
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++ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
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++ reg_name, reg_name);
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+ #ifdef DWARF2_UNWIND_INFO
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+ if (do_cfi)
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+- output_asm_insn (".cfi_endproc", NULL);
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++ fprintf (asm_out_file, "\t.cfi_endproc\n");
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+ #endif
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+ }
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+
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+@@ -13056,10 +13030,7 @@
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+ edge entry_edge;
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+ rtx_insn *seq;
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+
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+- /* In PIC mode, we need to always initialize the PIC register if optimization
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+- is enabled, because we are called from IRA and LRA may later force things
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+- to the constant pool for optimization purposes. */
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+- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
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++ if (!crtl->uses_pic_offset_table)
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+ return;
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+
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+ start_sequence ();
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+diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.md gcc-10.3.0/gcc/config/sparc/sparc.md
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+--- gcc-10.3.0.orig/gcc/config/sparc/sparc.md 2021-04-08 13:56:28.205742322 +0200
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++++ gcc-10.3.0/gcc/config/sparc/sparc.md 2022-01-24 10:19:54.504102046 +0100
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+@@ -1601,7 +1601,10 @@
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+ (clobber (reg:P O7_REG))]
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+ "REGNO (operands[0]) == INTVAL (operands[3])"
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+ {
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+- return output_load_pcrel_sym (operands);
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++ if (flag_delayed_branch)
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++ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
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++ else
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++ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
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+ }
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+ [(set (attr "type") (const_string "multi"))
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+ (set (attr "length")
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+diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h gcc-10.3.0/gcc/config/sparc/sparc-protos.h
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+--- gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h 2021-04-08 13:56:28.201742273 +0200
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++++ gcc-10.3.0/gcc/config/sparc/sparc-protos.h 2022-01-24 10:19:54.548100968 +0100
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+@@ -69,7 +69,6 @@
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+ extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
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+ extern int sparc_split_reg_reg_legitimate (rtx, rtx);
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+ extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
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+-extern const char *output_load_pcrel_sym (rtx *);
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+ extern const char *output_ubranch (rtx, rtx_insn *);
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+ extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
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+ extern const char *output_return (rtx_insn *);
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+diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
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+--- gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 2021-04-08 13:56:28.929751064 +0200
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++++ gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 1970-01-01 01:00:00.000000000 +0100
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+@@ -1,14 +0,0 @@
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+-/* PR target/92095 */
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+-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
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+-
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+-typedef union {
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+- double a;
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+- int b[2];
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+-} c;
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+-
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+-double d(int e)
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+-{
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+- c f;
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+- (&f)->b[0] = 15728640;
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+- return e ? -(&f)->a : (&f)->a;
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+-}
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+diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c
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+--- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c 2021-04-08 13:56:29.453757389 +0200
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++++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c 2022-01-24 10:19:54.688097536 +0100
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+@@ -1,6 +1,6 @@
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+ /* { dg-do compile } */
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+ /* { dg-require-effective-target lp64 } */
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+-/* { dg-options "-O -fno-pie" } */
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++/* { dg-options "-O" } */
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+
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+ #include <stdbool.h>
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+ #include <stdint.h>
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+diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c
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+--- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c 2021-04-08 13:56:29.453757389 +0200
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++++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c 2022-01-24 10:19:55.336081656 +0100
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+@@ -1,6 +1,6 @@
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+ /* { dg-do compile } */
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+ /* { dg-require-effective-target lp64 } */
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+-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
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++/* { dg-options "-O -mno-vis3 -mno-vis4" } */
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+
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+ #include <stdbool.h>
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+ #include <stdint.h>
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+diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c
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+--- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c 2021-04-08 13:56:29.453757389 +0200
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++++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c 2022-01-24 10:19:55.336081656 +0100
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+@@ -1,6 +1,6 @@
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+ /* { dg-do compile } */
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+ /* { dg-require-effective-target lp64 } */
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+-/* { dg-options "-O -fno-pie -mvis3" } */
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++/* { dg-options "-O -mvis3" } */
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+
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+ #include <stdbool.h>
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+ #include <stdint.h>
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