qemu.dts 1.6 KB

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  1. /dts-v1/;
  2. / {
  3. model = "qemu.csky";
  4. compatible = "csky";
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. memory {
  8. device_type = "memory";
  9. reg = <0x0 0x40000000>;
  10. };
  11. soc {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. compatible = "simple-bus";
  15. ranges;
  16. intc: interrupt-controller {
  17. compatible = "csky,intc-v1";
  18. reg = <0xfffff000 0x1000>;
  19. interrupt-controller;
  20. #interrupt-cells = <1>;
  21. };
  22. /* clockevent */
  23. timer0 {
  24. compatible = "snps,dw-apb-timer";
  25. reg = <0xffffd000 0x1000>;
  26. clocks = <&dummy_apb>;
  27. clock-names = "timer";
  28. interrupts = <1>;
  29. interrupt-parent = <&intc>;
  30. };
  31. /* clocksource */
  32. timer1 {
  33. compatible = "snps,dw-apb-timer";
  34. reg = <0xffffd014 0x800>;
  35. clocks = <&dummy_apb>;
  36. clock-names = "timer";
  37. interrupts = <2>;
  38. interrupt-parent = <&intc>;
  39. };
  40. serial0 {
  41. compatible = "ns16550a";
  42. reg = <0xffffe000 0x1000>;
  43. interrupt-parent = <&intc>;
  44. interrupts = <3>;
  45. clocks = <&dummy_apb>;
  46. baud = <115200>;
  47. reg-shift = <2>;
  48. reg-io-width = <1>;
  49. };
  50. dummy_apb: apb-clock {
  51. compatible = "fixed-clock";
  52. clock-frequency = <40000000>;
  53. clock-output-names = "dummy_apb";
  54. #clock-cells = <0>;
  55. };
  56. gmac: ethernet {
  57. compatible = "snps,dwmac";
  58. reg = <0xffffa000 0x2000>;
  59. interrupt-parent = <&intc>;
  60. interrupts = <4>;
  61. interrupt-names = "macirq";
  62. clocks = <&dummy_apb>;
  63. clock-names = "stmmaceth";
  64. phy-mode = "mii";
  65. snps,pbl = <32>;
  66. snps,fixed-burst;
  67. };
  68. qemu-exit {
  69. compatible = "csky,qemu-exit";
  70. reg = <0xffffc000 0x1000>;
  71. };
  72. };
  73. chosen {
  74. bootargs = "console=ttyS0,115200 rdinit=/sbin/init root=/dev/ram0";
  75. };
  76. };