sm7xx-fb.patch 53 KB

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  1. diff -Nur linux-3.17.7.orig/drivers/staging/Kconfig linux-3.17.7/drivers/staging/Kconfig
  2. --- linux-3.17.7.orig/drivers/staging/Kconfig 2014-12-16 11:37:26.000000000 -0600
  3. +++ linux-3.17.7/drivers/staging/Kconfig 2014-12-26 11:10:09.700350770 -0600
  4. @@ -64,6 +64,8 @@
  5. source "drivers/staging/iio/Kconfig"
  6. +source "drivers/staging/sm7xxfb/Kconfig"
  7. +
  8. source "drivers/staging/xgifb/Kconfig"
  9. source "drivers/staging/emxx_udc/Kconfig"
  10. diff -Nur linux-3.17.7.orig/drivers/staging/Makefile linux-3.17.7/drivers/staging/Makefile
  11. --- linux-3.17.7.orig/drivers/staging/Makefile 2014-12-16 11:37:26.000000000 -0600
  12. +++ linux-3.17.7/drivers/staging/Makefile 2014-12-26 11:09:30.844351126 -0600
  13. @@ -27,6 +27,7 @@
  14. obj-$(CONFIG_VME_BUS) += vme/
  15. obj-$(CONFIG_IIO) += iio/
  16. obj-$(CONFIG_FB_XGI) += xgifb/
  17. +obj-$(CONFIG_FB_SM7XX) += sm7xxfb/
  18. obj-$(CONFIG_USB_EMXX) += emxx_udc/
  19. obj-$(CONFIG_BCM_WIMAX) += bcm/
  20. obj-$(CONFIG_FT1000) += ft1000/
  21. diff -Nur linux-3.17.7.orig/drivers/staging/sm7xxfb/Kconfig linux-3.17.7/drivers/staging/sm7xxfb/Kconfig
  22. --- linux-3.17.7.orig/drivers/staging/sm7xxfb/Kconfig 1969-12-31 18:00:00.000000000 -0600
  23. +++ linux-3.17.7/drivers/staging/sm7xxfb/Kconfig 2014-12-26 11:08:55.868351446 -0600
  24. @@ -0,0 +1,13 @@
  25. +config FB_SM7XX
  26. + tristate "Silicon Motion SM7XX framebuffer support"
  27. + depends on FB && PCI
  28. + select FB_CFB_FILLRECT
  29. + select FB_CFB_COPYAREA
  30. + select FB_CFB_IMAGEBLIT
  31. + help
  32. + Frame buffer driver for the Silicon Motion SM710, SM712, SM721
  33. + and SM722 chips.
  34. +
  35. + This driver is also available as a module. The module will be
  36. + called sm7xxfb. If you want to compile it as a module, say M
  37. + here and read <file:Documentation/kbuild/modules.txt>.
  38. diff -Nur linux-3.17.7.orig/drivers/staging/sm7xxfb/Makefile linux-3.17.7/drivers/staging/sm7xxfb/Makefile
  39. --- linux-3.17.7.orig/drivers/staging/sm7xxfb/Makefile 1969-12-31 18:00:00.000000000 -0600
  40. +++ linux-3.17.7/drivers/staging/sm7xxfb/Makefile 2014-12-26 11:08:55.868351446 -0600
  41. @@ -0,0 +1 @@
  42. +obj-$(CONFIG_FB_SM7XX) += sm7xxfb.o
  43. diff -Nur linux-3.17.7.orig/drivers/staging/sm7xxfb/sm7xxfb.c linux-3.17.7/drivers/staging/sm7xxfb/sm7xxfb.c
  44. --- linux-3.17.7.orig/drivers/staging/sm7xxfb/sm7xxfb.c 1969-12-31 18:00:00.000000000 -0600
  45. +++ linux-3.17.7/drivers/staging/sm7xxfb/sm7xxfb.c 2014-12-26 11:08:55.872351446 -0600
  46. @@ -0,0 +1,1026 @@
  47. +/*
  48. + * Silicon Motion SM7XX frame buffer device
  49. + *
  50. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  51. + * Authors: Ge Wang, gewang@siliconmotion.com
  52. + * Boyod boyod.yang@siliconmotion.com.cn
  53. + *
  54. + * Copyright (C) 2009 Lemote, Inc.
  55. + * Author: Wu Zhangjin, wuzhangjin@gmail.com
  56. + *
  57. + * Copyright (C) 2011 Igalia, S.L.
  58. + * Author: Javier M. Mellid <jmunhoz@igalia.com>
  59. + *
  60. + * This file is subject to the terms and conditions of the GNU General Public
  61. + * License. See the file COPYING in the main directory of this archive for
  62. + * more details.
  63. + *
  64. + * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
  65. + */
  66. +
  67. +#include <linux/io.h>
  68. +#include <linux/fb.h>
  69. +#include <linux/pci.h>
  70. +#include <linux/init.h>
  71. +#include <linux/slab.h>
  72. +#include <linux/uaccess.h>
  73. +#include <linux/module.h>
  74. +#include <linux/console.h>
  75. +#include <linux/screen_info.h>
  76. +
  77. +#ifdef CONFIG_PM
  78. +#include <linux/pm.h>
  79. +#endif
  80. +
  81. +#include "sm7xx.h"
  82. +
  83. +/*
  84. +* Private structure
  85. +*/
  86. +struct smtcfb_info {
  87. + struct pci_dev *pdev;
  88. + struct fb_info fb;
  89. + u16 chip_id;
  90. + u8 chip_rev_id;
  91. +
  92. + void __iomem *lfb; /* linear frame buffer */
  93. + void __iomem *dp_regs; /* drawing processor control regs */
  94. + void __iomem *vp_regs; /* video processor control regs */
  95. + void __iomem *cp_regs; /* capture processor control regs */
  96. + void __iomem *mmio; /* memory map IO port */
  97. +
  98. + u_int width;
  99. + u_int height;
  100. + u_int hz;
  101. +
  102. + u32 colreg[17];
  103. +};
  104. +
  105. +void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
  106. +
  107. +static struct fb_var_screeninfo smtcfb_var = {
  108. + .xres = 1024,
  109. + .yres = 600,
  110. + .xres_virtual = 1024,
  111. + .yres_virtual = 600,
  112. + .bits_per_pixel = 16,
  113. + .red = {16, 8, 0},
  114. + .green = {8, 8, 0},
  115. + .blue = {0, 8, 0},
  116. + .activate = FB_ACTIVATE_NOW,
  117. + .height = -1,
  118. + .width = -1,
  119. + .vmode = FB_VMODE_NONINTERLACED,
  120. + .nonstd = 0,
  121. + .accel_flags = FB_ACCELF_TEXT,
  122. +};
  123. +
  124. +static struct fb_fix_screeninfo smtcfb_fix = {
  125. + .id = "smXXXfb",
  126. + .type = FB_TYPE_PACKED_PIXELS,
  127. + .visual = FB_VISUAL_TRUECOLOR,
  128. + .line_length = 800 * 3,
  129. + .accel = FB_ACCEL_SMI_LYNX,
  130. + .type_aux = 0,
  131. + .xpanstep = 0,
  132. + .ypanstep = 0,
  133. + .ywrapstep = 0,
  134. +};
  135. +
  136. +struct vesa_mode {
  137. + char index[6];
  138. + u16 lfb_width;
  139. + u16 lfb_height;
  140. + u16 lfb_depth;
  141. +};
  142. +
  143. +static struct vesa_mode vesa_mode_table[] = {
  144. + {"0x301", 640, 480, 8},
  145. + {"0x303", 800, 600, 8},
  146. + {"0x305", 1024, 768, 8},
  147. + {"0x307", 1280, 1024, 8},
  148. +
  149. + {"0x311", 640, 480, 16},
  150. + {"0x314", 800, 600, 16},
  151. + {"0x317", 1024, 768, 16},
  152. + {"0x31A", 1280, 1024, 16},
  153. +
  154. + {"0x312", 640, 480, 24},
  155. + {"0x315", 800, 600, 24},
  156. + {"0x318", 1024, 768, 24},
  157. + {"0x31B", 1280, 1024, 24},
  158. +};
  159. +
  160. +struct screen_info smtc_scr_info;
  161. +
  162. +/* process command line options, get vga parameter */
  163. +static int __init sm7xx_vga_setup(char *options)
  164. +{
  165. + int i;
  166. +
  167. + if (!options || !*options)
  168. + return -EINVAL;
  169. +
  170. + smtc_scr_info.lfb_width = 0;
  171. + smtc_scr_info.lfb_height = 0;
  172. + smtc_scr_info.lfb_depth = 0;
  173. +
  174. + pr_debug("sm7xx_vga_setup = %s\n", options);
  175. +
  176. + for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
  177. + if (strstr(options, vesa_mode_table[i].index)) {
  178. + smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
  179. + smtc_scr_info.lfb_height =
  180. + vesa_mode_table[i].lfb_height;
  181. + smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
  182. + return 0;
  183. + }
  184. + }
  185. +
  186. + return -1;
  187. +}
  188. +__setup("vga=", sm7xx_vga_setup);
  189. +
  190. +static void sm712_setpalette(int regno, unsigned red, unsigned green,
  191. + unsigned blue, struct fb_info *info)
  192. +{
  193. + /* set bit 5:4 = 01 (write LCD RAM only) */
  194. + smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
  195. +
  196. + smtc_mmiowb(regno, dac_reg);
  197. + smtc_mmiowb(red >> 10, dac_val);
  198. + smtc_mmiowb(green >> 10, dac_val);
  199. + smtc_mmiowb(blue >> 10, dac_val);
  200. +}
  201. +
  202. +/* chan_to_field
  203. + *
  204. + * convert a colour value into a field position
  205. + *
  206. + * from pxafb.c
  207. + */
  208. +
  209. +static inline unsigned int chan_to_field(unsigned int chan,
  210. + struct fb_bitfield *bf)
  211. +{
  212. + chan &= 0xffff;
  213. + chan >>= 16 - bf->length;
  214. + return chan << bf->offset;
  215. +}
  216. +
  217. +static int smtc_blank(int blank_mode, struct fb_info *info)
  218. +{
  219. + /* clear DPMS setting */
  220. + switch (blank_mode) {
  221. + case FB_BLANK_UNBLANK:
  222. + /* Screen On: HSync: On, VSync : On */
  223. + smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  224. + smtc_seqw(0x6a, 0x16);
  225. + smtc_seqw(0x6b, 0x02);
  226. + smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
  227. + smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  228. + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  229. + smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  230. + smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
  231. + break;
  232. + case FB_BLANK_NORMAL:
  233. + /* Screen Off: HSync: On, VSync : On Soft blank */
  234. + smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  235. + smtc_seqw(0x6a, 0x16);
  236. + smtc_seqw(0x6b, 0x02);
  237. + smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  238. + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  239. + smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  240. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  241. + break;
  242. + case FB_BLANK_VSYNC_SUSPEND:
  243. + /* Screen On: HSync: On, VSync : Off */
  244. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  245. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  246. + smtc_seqw(0x6a, 0x0c);
  247. + smtc_seqw(0x6b, 0x02);
  248. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  249. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
  250. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
  251. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  252. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  253. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  254. + break;
  255. + case FB_BLANK_HSYNC_SUSPEND:
  256. + /* Screen On: HSync: Off, VSync : On */
  257. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  258. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  259. + smtc_seqw(0x6a, 0x0c);
  260. + smtc_seqw(0x6b, 0x02);
  261. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  262. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
  263. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  264. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  265. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  266. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  267. + break;
  268. + case FB_BLANK_POWERDOWN:
  269. + /* Screen On: HSync: Off, VSync : Off */
  270. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  271. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  272. + smtc_seqw(0x6a, 0x0c);
  273. + smtc_seqw(0x6b, 0x02);
  274. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  275. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
  276. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  277. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  278. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  279. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  280. + break;
  281. + default:
  282. + return -EINVAL;
  283. + }
  284. +
  285. + return 0;
  286. +}
  287. +
  288. +static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
  289. + unsigned blue, unsigned trans, struct fb_info *info)
  290. +{
  291. + struct smtcfb_info *sfb;
  292. + u32 val;
  293. +
  294. + sfb = info->par;
  295. +
  296. + if (regno > 255)
  297. + return 1;
  298. +
  299. + switch (sfb->fb.fix.visual) {
  300. + case FB_VISUAL_DIRECTCOLOR:
  301. + case FB_VISUAL_TRUECOLOR:
  302. + /*
  303. + * 16/32 bit true-colour, use pseudo-palette for 16 base color
  304. + */
  305. + if (regno < 16) {
  306. + if (sfb->fb.var.bits_per_pixel == 16) {
  307. + u32 *pal = sfb->fb.pseudo_palette;
  308. + val = chan_to_field(red, &sfb->fb.var.red);
  309. + val |= chan_to_field(green, &sfb->fb.var.green);
  310. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  311. +#ifdef __BIG_ENDIAN
  312. + pal[regno] =
  313. + ((red & 0xf800) >> 8) |
  314. + ((green & 0xe000) >> 13) |
  315. + ((green & 0x1c00) << 3) |
  316. + ((blue & 0xf800) >> 3);
  317. +#else
  318. + pal[regno] = val;
  319. +#endif
  320. + } else {
  321. + u32 *pal = sfb->fb.pseudo_palette;
  322. + val = chan_to_field(red, &sfb->fb.var.red);
  323. + val |= chan_to_field(green, &sfb->fb.var.green);
  324. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  325. +#ifdef __BIG_ENDIAN
  326. + val =
  327. + (val & 0xff00ff00 >> 8) |
  328. + (val & 0x00ff00ff << 8);
  329. +#endif
  330. + pal[regno] = val;
  331. + }
  332. + }
  333. + break;
  334. +
  335. + case FB_VISUAL_PSEUDOCOLOR:
  336. + /* color depth 8 bit */
  337. + sm712_setpalette(regno, red, green, blue, info);
  338. + break;
  339. +
  340. + default:
  341. + return 1; /* unknown type */
  342. + }
  343. +
  344. + return 0;
  345. +
  346. +}
  347. +
  348. +#ifdef __BIG_ENDIAN
  349. +static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
  350. + count, loff_t *ppos)
  351. +{
  352. + unsigned long p = *ppos;
  353. +
  354. + u32 *buffer, *dst;
  355. + u32 __iomem *src;
  356. + int c, i, cnt = 0, err = 0;
  357. + unsigned long total_size;
  358. +
  359. + if (!info || !info->screen_base)
  360. + return -ENODEV;
  361. +
  362. + if (info->state != FBINFO_STATE_RUNNING)
  363. + return -EPERM;
  364. +
  365. + total_size = info->screen_size;
  366. +
  367. + if (total_size == 0)
  368. + total_size = info->fix.smem_len;
  369. +
  370. + if (p >= total_size)
  371. + return 0;
  372. +
  373. + if (count >= total_size)
  374. + count = total_size;
  375. +
  376. + if (count + p > total_size)
  377. + count = total_size - p;
  378. +
  379. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  380. + if (!buffer)
  381. + return -ENOMEM;
  382. +
  383. + src = (u32 __iomem *) (info->screen_base + p);
  384. +
  385. + if (info->fbops->fb_sync)
  386. + info->fbops->fb_sync(info);
  387. +
  388. + while (count) {
  389. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  390. + dst = buffer;
  391. + for (i = c >> 2; i--;) {
  392. + *dst = fb_readl(src++);
  393. + *dst =
  394. + (*dst & 0xff00ff00 >> 8) |
  395. + (*dst & 0x00ff00ff << 8);
  396. + dst++;
  397. + }
  398. + if (c & 3) {
  399. + u8 *dst8 = (u8 *) dst;
  400. + u8 __iomem *src8 = (u8 __iomem *) src;
  401. +
  402. + for (i = c & 3; i--;) {
  403. + if (i & 1) {
  404. + *dst8++ = fb_readb(++src8);
  405. + } else {
  406. + *dst8++ = fb_readb(--src8);
  407. + src8 += 2;
  408. + }
  409. + }
  410. + src = (u32 __iomem *) src8;
  411. + }
  412. +
  413. + if (copy_to_user(buf, buffer, c)) {
  414. + err = -EFAULT;
  415. + break;
  416. + }
  417. + *ppos += c;
  418. + buf += c;
  419. + cnt += c;
  420. + count -= c;
  421. + }
  422. +
  423. + kfree(buffer);
  424. +
  425. + return (err) ? err : cnt;
  426. +}
  427. +
  428. +static ssize_t
  429. +smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
  430. + loff_t *ppos)
  431. +{
  432. + unsigned long p = *ppos;
  433. +
  434. + u32 *buffer, *src;
  435. + u32 __iomem *dst;
  436. + int c, i, cnt = 0, err = 0;
  437. + unsigned long total_size;
  438. +
  439. + if (!info || !info->screen_base)
  440. + return -ENODEV;
  441. +
  442. + if (info->state != FBINFO_STATE_RUNNING)
  443. + return -EPERM;
  444. +
  445. + total_size = info->screen_size;
  446. +
  447. + if (total_size == 0)
  448. + total_size = info->fix.smem_len;
  449. +
  450. + if (p > total_size)
  451. + return -EFBIG;
  452. +
  453. + if (count > total_size) {
  454. + err = -EFBIG;
  455. + count = total_size;
  456. + }
  457. +
  458. + if (count + p > total_size) {
  459. + if (!err)
  460. + err = -ENOSPC;
  461. +
  462. + count = total_size - p;
  463. + }
  464. +
  465. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  466. + if (!buffer)
  467. + return -ENOMEM;
  468. +
  469. + dst = (u32 __iomem *) (info->screen_base + p);
  470. +
  471. + if (info->fbops->fb_sync)
  472. + info->fbops->fb_sync(info);
  473. +
  474. + while (count) {
  475. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  476. + src = buffer;
  477. +
  478. + if (copy_from_user(src, buf, c)) {
  479. + err = -EFAULT;
  480. + break;
  481. + }
  482. +
  483. + for (i = c >> 2; i--;) {
  484. + fb_writel((*src & 0xff00ff00 >> 8) |
  485. + (*src & 0x00ff00ff << 8), dst++);
  486. + src++;
  487. + }
  488. + if (c & 3) {
  489. + u8 *src8 = (u8 *) src;
  490. + u8 __iomem *dst8 = (u8 __iomem *) dst;
  491. +
  492. + for (i = c & 3; i--;) {
  493. + if (i & 1) {
  494. + fb_writeb(*src8++, ++dst8);
  495. + } else {
  496. + fb_writeb(*src8++, --dst8);
  497. + dst8 += 2;
  498. + }
  499. + }
  500. + dst = (u32 __iomem *) dst8;
  501. + }
  502. +
  503. + *ppos += c;
  504. + buf += c;
  505. + cnt += c;
  506. + count -= c;
  507. + }
  508. +
  509. + kfree(buffer);
  510. +
  511. + return (cnt) ? cnt : err;
  512. +}
  513. +#endif /* ! __BIG_ENDIAN */
  514. +
  515. +static void sm7xx_set_timing(struct smtcfb_info *sfb)
  516. +{
  517. + int i = 0, j = 0;
  518. + u32 m_nScreenStride;
  519. +
  520. + dev_dbg(&sfb->pdev->dev,
  521. + "sfb->width=%d sfb->height=%d sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
  522. + sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
  523. +
  524. + for (j = 0; j < numVGAModes; j++) {
  525. + if (VGAMode[j].mmSizeX == sfb->width &&
  526. + VGAMode[j].mmSizeY == sfb->height &&
  527. + VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
  528. + VGAMode[j].hz == sfb->hz) {
  529. +
  530. + dev_dbg(&sfb->pdev->dev,
  531. + "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
  532. + VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
  533. + VGAMode[j].bpp, VGAMode[j].hz);
  534. +
  535. + dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
  536. +
  537. + smtc_mmiowb(0x0, 0x3c6);
  538. +
  539. + smtc_seqw(0, 0x1);
  540. +
  541. + smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
  542. +
  543. + /* init SEQ register SR00 - SR04 */
  544. + for (i = 0; i < SIZE_SR00_SR04; i++)
  545. + smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
  546. +
  547. + /* init SEQ register SR10 - SR24 */
  548. + for (i = 0; i < SIZE_SR10_SR24; i++)
  549. + smtc_seqw(i + 0x10,
  550. + VGAMode[j].Init_SR10_SR24[i]);
  551. +
  552. + /* init SEQ register SR30 - SR75 */
  553. + for (i = 0; i < SIZE_SR30_SR75; i++)
  554. + if ((i + 0x30) != 0x62 &&
  555. + (i + 0x30) != 0x6a &&
  556. + (i + 0x30) != 0x6b)
  557. + smtc_seqw(i + 0x30,
  558. + VGAMode[j].Init_SR30_SR75[i]);
  559. +
  560. + /* init SEQ register SR80 - SR93 */
  561. + for (i = 0; i < SIZE_SR80_SR93; i++)
  562. + smtc_seqw(i + 0x80,
  563. + VGAMode[j].Init_SR80_SR93[i]);
  564. +
  565. + /* init SEQ register SRA0 - SRAF */
  566. + for (i = 0; i < SIZE_SRA0_SRAF; i++)
  567. + smtc_seqw(i + 0xa0,
  568. + VGAMode[j].Init_SRA0_SRAF[i]);
  569. +
  570. + /* init Graphic register GR00 - GR08 */
  571. + for (i = 0; i < SIZE_GR00_GR08; i++)
  572. + smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
  573. +
  574. + /* init Attribute register AR00 - AR14 */
  575. + for (i = 0; i < SIZE_AR00_AR14; i++)
  576. + smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
  577. +
  578. + /* init CRTC register CR00 - CR18 */
  579. + for (i = 0; i < SIZE_CR00_CR18; i++)
  580. + smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
  581. +
  582. + /* init CRTC register CR30 - CR4D */
  583. + for (i = 0; i < SIZE_CR30_CR4D; i++)
  584. + smtc_crtcw(i + 0x30,
  585. + VGAMode[j].Init_CR30_CR4D[i]);
  586. +
  587. + /* init CRTC register CR90 - CRA7 */
  588. + for (i = 0; i < SIZE_CR90_CRA7; i++)
  589. + smtc_crtcw(i + 0x90,
  590. + VGAMode[j].Init_CR90_CRA7[i]);
  591. + }
  592. + }
  593. + smtc_mmiowb(0x67, 0x3c2);
  594. +
  595. + /* set VPR registers */
  596. + writel(0x0, sfb->vp_regs + 0x0C);
  597. + writel(0x0, sfb->vp_regs + 0x40);
  598. +
  599. + /* set data width */
  600. + m_nScreenStride =
  601. + (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
  602. + switch (sfb->fb.var.bits_per_pixel) {
  603. + case 8:
  604. + writel(0x0, sfb->vp_regs + 0x0);
  605. + break;
  606. + case 16:
  607. + writel(0x00020000, sfb->vp_regs + 0x0);
  608. + break;
  609. + case 24:
  610. + writel(0x00040000, sfb->vp_regs + 0x0);
  611. + break;
  612. + case 32:
  613. + writel(0x00030000, sfb->vp_regs + 0x0);
  614. + break;
  615. + }
  616. + writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
  617. + sfb->vp_regs + 0x10);
  618. +
  619. +}
  620. +
  621. +static void smtc_set_timing(struct smtcfb_info *sfb)
  622. +{
  623. + switch (sfb->chip_id) {
  624. + case 0x710:
  625. + case 0x712:
  626. + case 0x720:
  627. + sm7xx_set_timing(sfb);
  628. + break;
  629. + }
  630. +}
  631. +
  632. +static void smtcfb_setmode(struct smtcfb_info *sfb)
  633. +{
  634. + switch (sfb->fb.var.bits_per_pixel) {
  635. + case 32:
  636. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  637. + sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
  638. + sfb->fb.var.red.length = 8;
  639. + sfb->fb.var.green.length = 8;
  640. + sfb->fb.var.blue.length = 8;
  641. + sfb->fb.var.red.offset = 16;
  642. + sfb->fb.var.green.offset = 8;
  643. + sfb->fb.var.blue.offset = 0;
  644. + break;
  645. + case 24:
  646. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  647. + sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
  648. + sfb->fb.var.red.length = 8;
  649. + sfb->fb.var.green.length = 8;
  650. + sfb->fb.var.blue.length = 8;
  651. + sfb->fb.var.red.offset = 16;
  652. + sfb->fb.var.green.offset = 8;
  653. + sfb->fb.var.blue.offset = 0;
  654. + break;
  655. + case 8:
  656. + sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  657. + sfb->fb.fix.line_length = sfb->fb.var.xres;
  658. + sfb->fb.var.red.length = 3;
  659. + sfb->fb.var.green.length = 3;
  660. + sfb->fb.var.blue.length = 2;
  661. + sfb->fb.var.red.offset = 5;
  662. + sfb->fb.var.green.offset = 2;
  663. + sfb->fb.var.blue.offset = 0;
  664. + break;
  665. + case 16:
  666. + default:
  667. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  668. + sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
  669. + sfb->fb.var.red.length = 5;
  670. + sfb->fb.var.green.length = 6;
  671. + sfb->fb.var.blue.length = 5;
  672. + sfb->fb.var.red.offset = 11;
  673. + sfb->fb.var.green.offset = 5;
  674. + sfb->fb.var.blue.offset = 0;
  675. + break;
  676. + }
  677. +
  678. + sfb->width = sfb->fb.var.xres;
  679. + sfb->height = sfb->fb.var.yres;
  680. + sfb->hz = 60;
  681. + smtc_set_timing(sfb);
  682. +}
  683. +
  684. +static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  685. +{
  686. + /* sanity checks */
  687. + if (var->xres_virtual < var->xres)
  688. + var->xres_virtual = var->xres;
  689. +
  690. + if (var->yres_virtual < var->yres)
  691. + var->yres_virtual = var->yres;
  692. +
  693. + /* set valid default bpp */
  694. + if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
  695. + (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
  696. + var->bits_per_pixel = 16;
  697. +
  698. + return 0;
  699. +}
  700. +
  701. +static int smtc_set_par(struct fb_info *info)
  702. +{
  703. + smtcfb_setmode(info->par);
  704. +
  705. + return 0;
  706. +}
  707. +
  708. +static struct fb_ops smtcfb_ops = {
  709. + .owner = THIS_MODULE,
  710. + .fb_check_var = smtc_check_var,
  711. + .fb_set_par = smtc_set_par,
  712. + .fb_setcolreg = smtc_setcolreg,
  713. + .fb_blank = smtc_blank,
  714. + .fb_fillrect = cfb_fillrect,
  715. + .fb_imageblit = cfb_imageblit,
  716. + .fb_copyarea = cfb_copyarea,
  717. +#ifdef __BIG_ENDIAN
  718. + .fb_read = smtcfb_read,
  719. + .fb_write = smtcfb_write,
  720. +#endif
  721. +};
  722. +
  723. +/*
  724. + * alloc struct smtcfb_info and assign default values
  725. + */
  726. +static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
  727. +{
  728. + struct smtcfb_info *sfb;
  729. +
  730. + sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
  731. +
  732. + if (!sfb)
  733. + return NULL;
  734. +
  735. + sfb->pdev = pdev;
  736. +
  737. + sfb->fb.flags = FBINFO_FLAG_DEFAULT;
  738. + sfb->fb.fbops = &smtcfb_ops;
  739. + sfb->fb.fix = smtcfb_fix;
  740. + sfb->fb.var = smtcfb_var;
  741. + sfb->fb.pseudo_palette = sfb->colreg;
  742. + sfb->fb.par = sfb;
  743. +
  744. + return sfb;
  745. +}
  746. +
  747. +/*
  748. + * free struct smtcfb_info
  749. + */
  750. +static void smtc_free_fb_info(struct smtcfb_info *sfb)
  751. +{
  752. + kfree(sfb);
  753. +}
  754. +
  755. +/*
  756. + * Unmap in the memory mapped IO registers
  757. + */
  758. +
  759. +static void smtc_unmap_mmio(struct smtcfb_info *sfb)
  760. +{
  761. + if (sfb && smtc_RegBaseAddress)
  762. + smtc_RegBaseAddress = NULL;
  763. +}
  764. +
  765. +/*
  766. + * Map in the screen memory
  767. + */
  768. +
  769. +static int smtc_map_smem(struct smtcfb_info *sfb,
  770. + struct pci_dev *pdev, u_long smem_len)
  771. +{
  772. +
  773. + sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
  774. +
  775. +#ifdef __BIG_ENDIAN
  776. + if (sfb->fb.var.bits_per_pixel == 32)
  777. + sfb->fb.fix.smem_start += 0x800000;
  778. +#endif
  779. +
  780. + sfb->fb.fix.smem_len = smem_len;
  781. +
  782. + sfb->fb.screen_base = sfb->lfb;
  783. +
  784. + if (!sfb->fb.screen_base) {
  785. + dev_err(&pdev->dev,
  786. + "%s: unable to map screen memory\n", sfb->fb.fix.id);
  787. + return -ENOMEM;
  788. + }
  789. +
  790. + return 0;
  791. +}
  792. +
  793. +/*
  794. + * Unmap in the screen memory
  795. + *
  796. + */
  797. +static void smtc_unmap_smem(struct smtcfb_info *sfb)
  798. +{
  799. + if (sfb && sfb->fb.screen_base) {
  800. + iounmap(sfb->fb.screen_base);
  801. + sfb->fb.screen_base = NULL;
  802. + }
  803. +}
  804. +
  805. +/*
  806. + * We need to wake up the device and make sure its in linear memory mode.
  807. + */
  808. +static inline void sm7xx_init_hw(void)
  809. +{
  810. + outb_p(0x18, 0x3c4);
  811. + outb_p(0x11, 0x3c5);
  812. +}
  813. +
  814. +static int smtcfb_pci_probe(struct pci_dev *pdev,
  815. + const struct pci_device_id *ent)
  816. +{
  817. + struct smtcfb_info *sfb;
  818. + u_long smem_size = 0x00800000; /* default 8MB */
  819. + int err;
  820. + unsigned long mmio_base;
  821. +
  822. + dev_info(&pdev->dev, "Silicon Motion display driver.");
  823. +
  824. + err = pci_enable_device(pdev); /* enable SMTC chip */
  825. + if (err)
  826. + return err;
  827. +
  828. + sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
  829. +
  830. + sfb = smtc_alloc_fb_info(pdev);
  831. +
  832. + if (!sfb) {
  833. + err = -ENOMEM;
  834. + goto failed_free;
  835. + }
  836. +
  837. + sfb->chip_id = ent->device;
  838. +
  839. + pci_set_drvdata(pdev, sfb);
  840. +
  841. + sm7xx_init_hw();
  842. +
  843. + /* get mode parameter from smtc_scr_info */
  844. + if (smtc_scr_info.lfb_width != 0) {
  845. + sfb->fb.var.xres = smtc_scr_info.lfb_width;
  846. + sfb->fb.var.yres = smtc_scr_info.lfb_height;
  847. + sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
  848. + } else {
  849. + /* default resolution 1024x600 16bit mode */
  850. + sfb->fb.var.xres = SCREEN_X_RES;
  851. + sfb->fb.var.yres = SCREEN_Y_RES;
  852. + sfb->fb.var.bits_per_pixel = SCREEN_BPP;
  853. + }
  854. +
  855. +#ifdef __BIG_ENDIAN
  856. + if (sfb->fb.var.bits_per_pixel == 24)
  857. + sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
  858. +#endif
  859. + /* Map address and memory detection */
  860. + mmio_base = pci_resource_start(pdev, 0);
  861. + pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
  862. +
  863. + switch (sfb->chip_id) {
  864. + case 0x710:
  865. + case 0x712:
  866. + sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
  867. + sfb->fb.fix.mmio_len = 0x00400000;
  868. + smem_size = SM712_VIDEOMEMORYSIZE;
  869. +#ifdef __BIG_ENDIAN
  870. + sfb->lfb = ioremap(mmio_base, 0x00c00000);
  871. +#else
  872. + sfb->lfb = ioremap(mmio_base, 0x00800000);
  873. +#endif
  874. + sfb->mmio = (smtc_RegBaseAddress =
  875. + sfb->lfb + 0x00700000);
  876. + sfb->dp_regs = sfb->lfb + 0x00408000;
  877. + sfb->vp_regs = sfb->lfb + 0x0040c000;
  878. +#ifdef __BIG_ENDIAN
  879. + if (sfb->fb.var.bits_per_pixel == 32) {
  880. + sfb->lfb += 0x800000;
  881. + dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
  882. + }
  883. +#endif
  884. + if (!smtc_RegBaseAddress) {
  885. + dev_err(&pdev->dev,
  886. + "%s: unable to map memory mapped IO!",
  887. + sfb->fb.fix.id);
  888. + err = -ENOMEM;
  889. + goto failed_fb;
  890. + }
  891. +
  892. + /* set MCLK = 14.31818 * (0x16 / 0x2) */
  893. + smtc_seqw(0x6a, 0x16);
  894. + smtc_seqw(0x6b, 0x02);
  895. + smtc_seqw(0x62, 0x3e);
  896. + /* enable PCI burst */
  897. + smtc_seqw(0x17, 0x20);
  898. + /* enable word swap */
  899. +#ifdef __BIG_ENDIAN
  900. + if (sfb->fb.var.bits_per_pixel == 32)
  901. + smtc_seqw(0x17, 0x30);
  902. +#endif
  903. + break;
  904. + case 0x720:
  905. + sfb->fb.fix.mmio_start = mmio_base;
  906. + sfb->fb.fix.mmio_len = 0x00200000;
  907. + smem_size = SM722_VIDEOMEMORYSIZE;
  908. + sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
  909. + sfb->lfb = sfb->dp_regs + 0x00200000;
  910. + sfb->mmio = (smtc_RegBaseAddress =
  911. + sfb->dp_regs + 0x000c0000);
  912. + sfb->vp_regs = sfb->dp_regs + 0x800;
  913. +
  914. + smtc_seqw(0x62, 0xff);
  915. + smtc_seqw(0x6a, 0x0d);
  916. + smtc_seqw(0x6b, 0x02);
  917. + break;
  918. + default:
  919. + dev_err(&pdev->dev,
  920. + "No valid Silicon Motion display chip was detected!");
  921. +
  922. + goto failed_fb;
  923. + }
  924. +
  925. + /* can support 32 bpp */
  926. + if (15 == sfb->fb.var.bits_per_pixel)
  927. + sfb->fb.var.bits_per_pixel = 16;
  928. +
  929. + sfb->fb.var.xres_virtual = sfb->fb.var.xres;
  930. + sfb->fb.var.yres_virtual = sfb->fb.var.yres;
  931. + err = smtc_map_smem(sfb, pdev, smem_size);
  932. + if (err)
  933. + goto failed;
  934. +
  935. + smtcfb_setmode(sfb);
  936. +
  937. + err = register_framebuffer(&sfb->fb);
  938. + if (err < 0)
  939. + goto failed;
  940. +
  941. + dev_info(&pdev->dev,
  942. + "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
  943. + sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
  944. + sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
  945. +
  946. + return 0;
  947. +
  948. +failed:
  949. + dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
  950. +
  951. + smtc_unmap_smem(sfb);
  952. + smtc_unmap_mmio(sfb);
  953. +failed_fb:
  954. + smtc_free_fb_info(sfb);
  955. +
  956. +failed_free:
  957. + pci_disable_device(pdev);
  958. +
  959. + return err;
  960. +}
  961. +
  962. +/*
  963. + * 0x710 (LynxEM)
  964. + * 0x712 (LynxEM+)
  965. + * 0x720 (Lynx3DM, Lynx3DM+)
  966. + */
  967. +static const struct pci_device_id smtcfb_pci_table[] = {
  968. + { PCI_DEVICE(0x126f, 0x710), },
  969. + { PCI_DEVICE(0x126f, 0x712), },
  970. + { PCI_DEVICE(0x126f, 0x720), },
  971. + {0,}
  972. +};
  973. +
  974. +static void smtcfb_pci_remove(struct pci_dev *pdev)
  975. +{
  976. + struct smtcfb_info *sfb;
  977. +
  978. + sfb = pci_get_drvdata(pdev);
  979. + smtc_unmap_smem(sfb);
  980. + smtc_unmap_mmio(sfb);
  981. + unregister_framebuffer(&sfb->fb);
  982. + smtc_free_fb_info(sfb);
  983. +}
  984. +
  985. +#ifdef CONFIG_PM
  986. +static int smtcfb_pci_suspend(struct device *device)
  987. +{
  988. + struct pci_dev *pdev = to_pci_dev(device);
  989. + struct smtcfb_info *sfb;
  990. +
  991. + sfb = pci_get_drvdata(pdev);
  992. +
  993. + /* set the hw in sleep mode use external clock and self memory refresh
  994. + * so that we can turn off internal PLLs later on
  995. + */
  996. + smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
  997. + smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
  998. +
  999. + console_lock();
  1000. + fb_set_suspend(&sfb->fb, 1);
  1001. + console_unlock();
  1002. +
  1003. + /* additionally turn off all function blocks including internal PLLs */
  1004. + smtc_seqw(0x21, 0xff);
  1005. +
  1006. + return 0;
  1007. +}
  1008. +
  1009. +static int smtcfb_pci_resume(struct device *device)
  1010. +{
  1011. + struct pci_dev *pdev = to_pci_dev(device);
  1012. + struct smtcfb_info *sfb;
  1013. +
  1014. + sfb = pci_get_drvdata(pdev);
  1015. +
  1016. + /* reinit hardware */
  1017. + sm7xx_init_hw();
  1018. + switch (sfb->chip_id) {
  1019. + case 0x710:
  1020. + case 0x712:
  1021. + /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1022. + smtc_seqw(0x6a, 0x16);
  1023. + smtc_seqw(0x6b, 0x02);
  1024. + smtc_seqw(0x62, 0x3e);
  1025. + /* enable PCI burst */
  1026. + smtc_seqw(0x17, 0x20);
  1027. +#ifdef __BIG_ENDIAN
  1028. + if (sfb->fb.var.bits_per_pixel == 32)
  1029. + smtc_seqw(0x17, 0x30);
  1030. +#endif
  1031. + break;
  1032. + case 0x720:
  1033. + smtc_seqw(0x62, 0xff);
  1034. + smtc_seqw(0x6a, 0x0d);
  1035. + smtc_seqw(0x6b, 0x02);
  1036. + break;
  1037. + }
  1038. +
  1039. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
  1040. + smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
  1041. +
  1042. + smtcfb_setmode(sfb);
  1043. +
  1044. + console_lock();
  1045. + fb_set_suspend(&sfb->fb, 0);
  1046. + console_unlock();
  1047. +
  1048. + return 0;
  1049. +}
  1050. +
  1051. +static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
  1052. +#define SM7XX_PM_OPS (&sm7xx_pm_ops)
  1053. +
  1054. +#else /* !CONFIG_PM */
  1055. +
  1056. +#define SM7XX_PM_OPS NULL
  1057. +
  1058. +#endif /* !CONFIG_PM */
  1059. +
  1060. +static struct pci_driver smtcfb_driver = {
  1061. + .name = "smtcfb",
  1062. + .id_table = smtcfb_pci_table,
  1063. + .probe = smtcfb_pci_probe,
  1064. + .remove = smtcfb_pci_remove,
  1065. + .driver.pm = SM7XX_PM_OPS,
  1066. +};
  1067. +
  1068. +module_pci_driver(smtcfb_driver);
  1069. +
  1070. +MODULE_AUTHOR("Siliconmotion ");
  1071. +MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
  1072. +MODULE_LICENSE("GPL");
  1073. diff -Nur linux-3.17.7.orig/drivers/staging/sm7xxfb/sm7xx.h linux-3.17.7/drivers/staging/sm7xxfb/sm7xx.h
  1074. --- linux-3.17.7.orig/drivers/staging/sm7xxfb/sm7xx.h 1969-12-31 18:00:00.000000000 -0600
  1075. +++ linux-3.17.7/drivers/staging/sm7xxfb/sm7xx.h 2014-12-26 11:08:55.872351446 -0600
  1076. @@ -0,0 +1,779 @@
  1077. +/*
  1078. + * Silicon Motion SM712 frame buffer device
  1079. + *
  1080. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  1081. + * Authors: Ge Wang, gewang@siliconmotion.com
  1082. + * Boyod boyod.yang@siliconmotion.com.cn
  1083. + *
  1084. + * Copyright (C) 2009 Lemote, Inc.
  1085. + * Author: Wu Zhangjin, wuzhangjin@gmail.com
  1086. + *
  1087. + * This file is subject to the terms and conditions of the GNU General Public
  1088. + * License. See the file COPYING in the main directory of this archive for
  1089. + * more details.
  1090. + */
  1091. +
  1092. +#define NR_PALETTE 256
  1093. +
  1094. +#define FB_ACCEL_SMI_LYNX 88
  1095. +
  1096. +#define SCREEN_X_RES 1024
  1097. +#define SCREEN_Y_RES 600
  1098. +#define SCREEN_BPP 16
  1099. +
  1100. +/*Assume SM712 graphics chip has 4MB VRAM */
  1101. +#define SM712_VIDEOMEMORYSIZE 0x00400000
  1102. +/*Assume SM722 graphics chip has 8MB VRAM */
  1103. +#define SM722_VIDEOMEMORYSIZE 0x00800000
  1104. +
  1105. +#define dac_reg (0x3c8)
  1106. +#define dac_val (0x3c9)
  1107. +
  1108. +extern void __iomem *smtc_RegBaseAddress;
  1109. +#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
  1110. +#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
  1111. +#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
  1112. +
  1113. +#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
  1114. +#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
  1115. +#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
  1116. +
  1117. +#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
  1118. +#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
  1119. +#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
  1120. +#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
  1121. +#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
  1122. +#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
  1123. +#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
  1124. +#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
  1125. +#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
  1126. +#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
  1127. +#define SIZE_VPR (0x6C + 1)
  1128. +#define SIZE_DPR (0x44 + 1)
  1129. +
  1130. +static inline void smtc_crtcw(int reg, int val)
  1131. +{
  1132. + smtc_mmiowb(reg, 0x3d4);
  1133. + smtc_mmiowb(val, 0x3d5);
  1134. +}
  1135. +
  1136. +static inline unsigned int smtc_crtcr(int reg)
  1137. +{
  1138. + smtc_mmiowb(reg, 0x3d4);
  1139. + return smtc_mmiorb(0x3d5);
  1140. +}
  1141. +
  1142. +static inline void smtc_grphw(int reg, int val)
  1143. +{
  1144. + smtc_mmiowb(reg, 0x3ce);
  1145. + smtc_mmiowb(val, 0x3cf);
  1146. +}
  1147. +
  1148. +static inline unsigned int smtc_grphr(int reg)
  1149. +{
  1150. + smtc_mmiowb(reg, 0x3ce);
  1151. + return smtc_mmiorb(0x3cf);
  1152. +}
  1153. +
  1154. +static inline void smtc_attrw(int reg, int val)
  1155. +{
  1156. + smtc_mmiorb(0x3da);
  1157. + smtc_mmiowb(reg, 0x3c0);
  1158. + smtc_mmiorb(0x3c1);
  1159. + smtc_mmiowb(val, 0x3c0);
  1160. +}
  1161. +
  1162. +static inline void smtc_seqw(int reg, int val)
  1163. +{
  1164. + smtc_mmiowb(reg, 0x3c4);
  1165. + smtc_mmiowb(val, 0x3c5);
  1166. +}
  1167. +
  1168. +static inline unsigned int smtc_seqr(int reg)
  1169. +{
  1170. + smtc_mmiowb(reg, 0x3c4);
  1171. + return smtc_mmiorb(0x3c5);
  1172. +}
  1173. +
  1174. +/* The next structure holds all information relevant for a specific video mode.
  1175. + */
  1176. +
  1177. +struct ModeInit {
  1178. + int mmSizeX;
  1179. + int mmSizeY;
  1180. + int bpp;
  1181. + int hz;
  1182. + unsigned char Init_MISC;
  1183. + unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
  1184. + unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
  1185. + unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
  1186. + unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
  1187. + unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
  1188. + unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
  1189. + unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
  1190. + unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
  1191. + unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
  1192. + unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
  1193. +};
  1194. +
  1195. +/**********************************************************************
  1196. + SM712 Mode table.
  1197. + **********************************************************************/
  1198. +struct ModeInit VGAMode[] = {
  1199. + {
  1200. + /* mode#0: 640 x 480 16Bpp 60Hz */
  1201. + 640, 480, 16, 60,
  1202. + /* Init_MISC */
  1203. + 0xE3,
  1204. + { /* Init_SR0_SR4 */
  1205. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1206. + },
  1207. + { /* Init_SR10_SR24 */
  1208. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1209. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1210. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1211. + },
  1212. + { /* Init_SR30_SR75 */
  1213. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1214. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1215. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1216. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1217. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1218. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1219. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1220. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1221. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1222. + },
  1223. + { /* Init_SR80_SR93 */
  1224. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1225. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1226. + 0x00, 0x00, 0x00, 0x00,
  1227. + },
  1228. + { /* Init_SRA0_SRAF */
  1229. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1230. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1231. + },
  1232. + { /* Init_GR00_GR08 */
  1233. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1234. + 0xFF,
  1235. + },
  1236. + { /* Init_AR00_AR14 */
  1237. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1238. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1239. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1240. + },
  1241. + { /* Init_CR00_CR18 */
  1242. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1243. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1244. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1245. + 0xFF,
  1246. + },
  1247. + { /* Init_CR30_CR4D */
  1248. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1249. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1250. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1251. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1252. + },
  1253. + { /* Init_CR90_CRA7 */
  1254. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1255. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1256. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1257. + },
  1258. + },
  1259. + {
  1260. + /* mode#1: 640 x 480 24Bpp 60Hz */
  1261. + 640, 480, 24, 60,
  1262. + /* Init_MISC */
  1263. + 0xE3,
  1264. + { /* Init_SR0_SR4 */
  1265. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1266. + },
  1267. + { /* Init_SR10_SR24 */
  1268. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1269. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1270. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1271. + },
  1272. + { /* Init_SR30_SR75 */
  1273. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1274. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1275. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1276. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1277. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1278. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1279. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1280. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1281. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1282. + },
  1283. + { /* Init_SR80_SR93 */
  1284. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1285. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1286. + 0x00, 0x00, 0x00, 0x00,
  1287. + },
  1288. + { /* Init_SRA0_SRAF */
  1289. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1290. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1291. + },
  1292. + { /* Init_GR00_GR08 */
  1293. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1294. + 0xFF,
  1295. + },
  1296. + { /* Init_AR00_AR14 */
  1297. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1298. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1299. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1300. + },
  1301. + { /* Init_CR00_CR18 */
  1302. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1303. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1304. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1305. + 0xFF,
  1306. + },
  1307. + { /* Init_CR30_CR4D */
  1308. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1309. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1310. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1311. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1312. + },
  1313. + { /* Init_CR90_CRA7 */
  1314. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1315. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1316. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1317. + },
  1318. + },
  1319. + {
  1320. + /* mode#0: 640 x 480 32Bpp 60Hz */
  1321. + 640, 480, 32, 60,
  1322. + /* Init_MISC */
  1323. + 0xE3,
  1324. + { /* Init_SR0_SR4 */
  1325. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1326. + },
  1327. + { /* Init_SR10_SR24 */
  1328. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1329. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1330. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1331. + },
  1332. + { /* Init_SR30_SR75 */
  1333. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1334. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1335. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1336. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1337. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1338. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1339. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1340. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1341. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1342. + },
  1343. + { /* Init_SR80_SR93 */
  1344. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1345. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1346. + 0x00, 0x00, 0x00, 0x00,
  1347. + },
  1348. + { /* Init_SRA0_SRAF */
  1349. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1350. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1351. + },
  1352. + { /* Init_GR00_GR08 */
  1353. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1354. + 0xFF,
  1355. + },
  1356. + { /* Init_AR00_AR14 */
  1357. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1358. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1359. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1360. + },
  1361. + { /* Init_CR00_CR18 */
  1362. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1363. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1364. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1365. + 0xFF,
  1366. + },
  1367. + { /* Init_CR30_CR4D */
  1368. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1369. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1370. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1371. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1372. + },
  1373. + { /* Init_CR90_CRA7 */
  1374. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1375. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1376. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1377. + },
  1378. + },
  1379. +
  1380. + { /* mode#2: 800 x 600 16Bpp 60Hz */
  1381. + 800, 600, 16, 60,
  1382. + /* Init_MISC */
  1383. + 0x2B,
  1384. + { /* Init_SR0_SR4 */
  1385. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1386. + },
  1387. + { /* Init_SR10_SR24 */
  1388. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1389. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1390. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1391. + },
  1392. + { /* Init_SR30_SR75 */
  1393. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  1394. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  1395. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  1396. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  1397. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1398. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  1399. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1400. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1401. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  1402. + },
  1403. + { /* Init_SR80_SR93 */
  1404. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  1405. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  1406. + 0x00, 0x00, 0x00, 0x00,
  1407. + },
  1408. + { /* Init_SRA0_SRAF */
  1409. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1410. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1411. + },
  1412. + { /* Init_GR00_GR08 */
  1413. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1414. + 0xFF,
  1415. + },
  1416. + { /* Init_AR00_AR14 */
  1417. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1418. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1419. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1420. + },
  1421. + { /* Init_CR00_CR18 */
  1422. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1423. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1424. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1425. + 0xFF,
  1426. + },
  1427. + { /* Init_CR30_CR4D */
  1428. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1429. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1430. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1431. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1432. + },
  1433. + { /* Init_CR90_CRA7 */
  1434. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1435. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1436. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1437. + },
  1438. + },
  1439. + { /* mode#3: 800 x 600 24Bpp 60Hz */
  1440. + 800, 600, 24, 60,
  1441. + 0x2B,
  1442. + { /* Init_SR0_SR4 */
  1443. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1444. + },
  1445. + { /* Init_SR10_SR24 */
  1446. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1447. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1448. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1449. + },
  1450. + { /* Init_SR30_SR75 */
  1451. + 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
  1452. + 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
  1453. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1454. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
  1455. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1456. + 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
  1457. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1458. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1459. + 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
  1460. + },
  1461. + { /* Init_SR80_SR93 */
  1462. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
  1463. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
  1464. + 0x00, 0x00, 0x00, 0x00,
  1465. + },
  1466. + { /* Init_SRA0_SRAF */
  1467. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1468. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1469. + },
  1470. + { /* Init_GR00_GR08 */
  1471. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1472. + 0xFF,
  1473. + },
  1474. + { /* Init_AR00_AR14 */
  1475. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1476. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1477. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1478. + },
  1479. + { /* Init_CR00_CR18 */
  1480. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1481. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1482. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1483. + 0xFF,
  1484. + },
  1485. + { /* Init_CR30_CR4D */
  1486. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1487. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1488. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1489. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1490. + },
  1491. + { /* Init_CR90_CRA7 */
  1492. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1493. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1494. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1495. + },
  1496. + },
  1497. + { /* mode#7: 800 x 600 32Bpp 60Hz */
  1498. + 800, 600, 32, 60,
  1499. + /* Init_MISC */
  1500. + 0x2B,
  1501. + { /* Init_SR0_SR4 */
  1502. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1503. + },
  1504. + { /* Init_SR10_SR24 */
  1505. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1506. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1507. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1508. + },
  1509. + { /* Init_SR30_SR75 */
  1510. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  1511. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  1512. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  1513. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  1514. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1515. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  1516. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1517. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1518. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  1519. + },
  1520. + { /* Init_SR80_SR93 */
  1521. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  1522. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  1523. + 0x00, 0x00, 0x00, 0x00,
  1524. + },
  1525. + { /* Init_SRA0_SRAF */
  1526. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1527. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1528. + },
  1529. + { /* Init_GR00_GR08 */
  1530. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1531. + 0xFF,
  1532. + },
  1533. + { /* Init_AR00_AR14 */
  1534. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1535. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1536. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1537. + },
  1538. + { /* Init_CR00_CR18 */
  1539. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1540. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1541. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1542. + 0xFF,
  1543. + },
  1544. + { /* Init_CR30_CR4D */
  1545. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1546. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1547. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1548. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1549. + },
  1550. + { /* Init_CR90_CRA7 */
  1551. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1552. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1553. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1554. + },
  1555. + },
  1556. + /* We use 1024x768 table to light 1024x600 panel for lemote */
  1557. + { /* mode#4: 1024 x 600 16Bpp 60Hz */
  1558. + 1024, 600, 16, 60,
  1559. + /* Init_MISC */
  1560. + 0xEB,
  1561. + { /* Init_SR0_SR4 */
  1562. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1563. + },
  1564. + { /* Init_SR10_SR24 */
  1565. + 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
  1566. + 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1567. + 0xC4, 0x30, 0x02, 0x00, 0x01,
  1568. + },
  1569. + { /* Init_SR30_SR75 */
  1570. + 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
  1571. + 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
  1572. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1573. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
  1574. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1575. + 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
  1576. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1577. + 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
  1578. + 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
  1579. + },
  1580. + { /* Init_SR80_SR93 */
  1581. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1582. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1583. + 0x00, 0x00, 0x00, 0x00,
  1584. + },
  1585. + { /* Init_SRA0_SRAF */
  1586. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1587. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1588. + },
  1589. + { /* Init_GR00_GR08 */
  1590. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1591. + 0xFF,
  1592. + },
  1593. + { /* Init_AR00_AR14 */
  1594. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1595. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1596. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1597. + },
  1598. + { /* Init_CR00_CR18 */
  1599. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1600. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1601. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1602. + 0xFF,
  1603. + },
  1604. + { /* Init_CR30_CR4D */
  1605. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1606. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1607. + 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
  1608. + 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
  1609. + },
  1610. + { /* Init_CR90_CRA7 */
  1611. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1612. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1613. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1614. + },
  1615. + },
  1616. + { /* mode#5: 1024 x 768 24Bpp 60Hz */
  1617. + 1024, 768, 24, 60,
  1618. + /* Init_MISC */
  1619. + 0xEB,
  1620. + { /* Init_SR0_SR4 */
  1621. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1622. + },
  1623. + { /* Init_SR10_SR24 */
  1624. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1625. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1626. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1627. + },
  1628. + { /* Init_SR30_SR75 */
  1629. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1630. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1631. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1632. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1633. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1634. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1635. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1636. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  1637. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1638. + },
  1639. + { /* Init_SR80_SR93 */
  1640. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1641. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1642. + 0x00, 0x00, 0x00, 0x00,
  1643. + },
  1644. + { /* Init_SRA0_SRAF */
  1645. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1646. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1647. + },
  1648. + { /* Init_GR00_GR08 */
  1649. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1650. + 0xFF,
  1651. + },
  1652. + { /* Init_AR00_AR14 */
  1653. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1654. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1655. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1656. + },
  1657. + { /* Init_CR00_CR18 */
  1658. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1659. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1660. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1661. + 0xFF,
  1662. + },
  1663. + { /* Init_CR30_CR4D */
  1664. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1665. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1666. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  1667. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  1668. + },
  1669. + { /* Init_CR90_CRA7 */
  1670. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1671. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1672. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1673. + },
  1674. + },
  1675. + { /* mode#4: 1024 x 768 32Bpp 60Hz */
  1676. + 1024, 768, 32, 60,
  1677. + /* Init_MISC */
  1678. + 0xEB,
  1679. + { /* Init_SR0_SR4 */
  1680. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1681. + },
  1682. + { /* Init_SR10_SR24 */
  1683. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1684. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1685. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1686. + },
  1687. + { /* Init_SR30_SR75 */
  1688. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1689. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1690. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1691. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1692. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1693. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1694. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1695. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  1696. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1697. + },
  1698. + { /* Init_SR80_SR93 */
  1699. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1700. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1701. + 0x00, 0x00, 0x00, 0x00,
  1702. + },
  1703. + { /* Init_SRA0_SRAF */
  1704. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1705. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1706. + },
  1707. + { /* Init_GR00_GR08 */
  1708. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1709. + 0xFF,
  1710. + },
  1711. + { /* Init_AR00_AR14 */
  1712. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1713. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1714. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1715. + },
  1716. + { /* Init_CR00_CR18 */
  1717. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1718. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1719. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1720. + 0xFF,
  1721. + },
  1722. + { /* Init_CR30_CR4D */
  1723. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1724. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1725. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  1726. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  1727. + },
  1728. + { /* Init_CR90_CRA7 */
  1729. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1730. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1731. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1732. + },
  1733. + },
  1734. + { /* mode#6: 320 x 240 16Bpp 60Hz */
  1735. + 320, 240, 16, 60,
  1736. + /* Init_MISC */
  1737. + 0xEB,
  1738. + { /* Init_SR0_SR4 */
  1739. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1740. + },
  1741. + { /* Init_SR10_SR24 */
  1742. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1743. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1744. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1745. + },
  1746. + { /* Init_SR30_SR75 */
  1747. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1748. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1749. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1750. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1751. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1752. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1753. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1754. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  1755. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1756. + },
  1757. + { /* Init_SR80_SR93 */
  1758. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1759. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1760. + 0x00, 0x00, 0x00, 0x00,
  1761. + },
  1762. + { /* Init_SRA0_SRAF */
  1763. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1764. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1765. + },
  1766. + { /* Init_GR00_GR08 */
  1767. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1768. + 0xFF,
  1769. + },
  1770. + { /* Init_AR00_AR14 */
  1771. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1772. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1773. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1774. + },
  1775. + { /* Init_CR00_CR18 */
  1776. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1777. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1778. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1779. + 0xFF,
  1780. + },
  1781. + { /* Init_CR30_CR4D */
  1782. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1783. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1784. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  1785. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  1786. + },
  1787. + { /* Init_CR90_CRA7 */
  1788. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1789. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1790. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1791. + },
  1792. + },
  1793. +
  1794. + { /* mode#8: 320 x 240 32Bpp 60Hz */
  1795. + 320, 240, 32, 60,
  1796. + /* Init_MISC */
  1797. + 0xEB,
  1798. + { /* Init_SR0_SR4 */
  1799. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1800. + },
  1801. + { /* Init_SR10_SR24 */
  1802. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1803. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1804. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1805. + },
  1806. + { /* Init_SR30_SR75 */
  1807. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1808. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1809. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1810. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1811. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1812. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1813. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1814. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  1815. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1816. + },
  1817. + { /* Init_SR80_SR93 */
  1818. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1819. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1820. + 0x00, 0x00, 0x00, 0x00,
  1821. + },
  1822. + { /* Init_SRA0_SRAF */
  1823. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1824. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1825. + },
  1826. + { /* Init_GR00_GR08 */
  1827. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1828. + 0xFF,
  1829. + },
  1830. + { /* Init_AR00_AR14 */
  1831. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1832. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1833. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1834. + },
  1835. + { /* Init_CR00_CR18 */
  1836. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1837. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1838. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1839. + 0xFF,
  1840. + },
  1841. + { /* Init_CR30_CR4D */
  1842. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1843. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1844. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  1845. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  1846. + },
  1847. + { /* Init_CR90_CRA7 */
  1848. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1849. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1850. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1851. + },
  1852. + },
  1853. +};
  1854. +
  1855. +#define numVGAModes ARRAY_SIZE(VGAMode)
  1856. diff -Nur linux-3.17.7.orig/drivers/staging/sm7xxfb/TODO linux-3.17.7/drivers/staging/sm7xxfb/TODO
  1857. --- linux-3.17.7.orig/drivers/staging/sm7xxfb/TODO 1969-12-31 18:00:00.000000000 -0600
  1858. +++ linux-3.17.7/drivers/staging/sm7xxfb/TODO 2014-12-26 11:08:55.876351446 -0600
  1859. @@ -0,0 +1,9 @@
  1860. +TODO:
  1861. +- Dual head support
  1862. +- 2D acceleration support
  1863. +- use kernel coding style
  1864. +- refine the code and remove unused code
  1865. +- move it to drivers/video/sm7xxfb.c
  1866. +
  1867. +Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
  1868. +Teddy Wang <teddy.wang@siliconmotion.com.cn>.