zboot-brcm-reloc.patch 7.7 KB

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  1. --- /dev/null Thu Jan 6 02:10:11 2011
  2. +++ linux-2.6.36/arch/mips/boot/compressed/invcache.S Thu Jan 6 01:32:57 2011
  3. @@ -0,0 +1,132 @@
  4. +/*-
  5. + * written 2011 by Thorsten Glaser <tg@mirbsd.org> based on
  6. + * code from LZMA-Loader with the following copyright note:
  7. + * Copyright 2005 Oleg I. Vdovikin <oleg@cs.msu.su>
  8. + * cache manipulation adapted from Broadcom code
  9. + * idea taken from original bunzip2 decompressor code
  10. + * Copyright 2004 Manuel Novoa III <mjn3@codepoet.org>
  11. + */
  12. +
  13. +/*
  14. + * This file is supposed to be #include’d where it’s
  15. + * needed; we will not trash s0, s1, s2, s3.
  16. + */
  17. +
  18. +#define KSEG0 0x80000000
  19. +
  20. +#define C0_CONFIG $16
  21. +#define C0_TAGLO $28
  22. +#define C0_TAGHI $29
  23. +
  24. +#define CONF1_DA_SHIFT 7 /* D$ associativity */
  25. +#define CONF1_DA_MASK 0x00000380
  26. +#define CONF1_DA_BASE 1
  27. +#define CONF1_DL_SHIFT 10 /* D$ line size */
  28. +#define CONF1_DL_MASK 0x00001c00
  29. +#define CONF1_DL_BASE 2
  30. +#define CONF1_DS_SHIFT 13 /* D$ sets/way */
  31. +#define CONF1_DS_MASK 0x0000e000
  32. +#define CONF1_DS_BASE 64
  33. +#define CONF1_IA_SHIFT 16 /* I$ associativity */
  34. +#define CONF1_IA_MASK 0x00070000
  35. +#define CONF1_IA_BASE 1
  36. +#define CONF1_IL_SHIFT 19 /* I$ line size */
  37. +#define CONF1_IL_MASK 0x00380000
  38. +#define CONF1_IL_BASE 2
  39. +#define CONF1_IS_SHIFT 22 /* Instruction cache sets/way */
  40. +#define CONF1_IS_MASK 0x01c00000
  41. +#define CONF1_IS_BASE 64
  42. +
  43. +#define Index_Invalidate_I 0x00
  44. +#define Index_Writeback_Inv_D 0x01
  45. +
  46. + /* Get cache sizes */
  47. + .set mips32
  48. + mfc0 s4,C0_CONFIG,1
  49. + .set mips0
  50. +
  51. + li s5,CONF1_DL_MASK
  52. + and s5,s4
  53. + beq s5,zero,2f
  54. + nop
  55. +
  56. + srl s5,CONF1_DL_SHIFT
  57. + li t0,CONF1_DL_BASE
  58. + sll s5,t0,s5 /* s5 has D$ cache line size */
  59. +
  60. + li s6,CONF1_DA_MASK
  61. + and s6,s4
  62. + srl s6,CONF1_DA_SHIFT
  63. + addiu s6,CONF1_DA_BASE /* s6 now has D$ associativity */
  64. +
  65. + li t0,CONF1_DS_MASK
  66. + and t0,s4
  67. + srl t0,CONF1_DS_SHIFT
  68. + li s7,CONF1_DS_BASE
  69. + sll s7,s7,t0 /* s7 has D$ sets per way */
  70. +
  71. + multu s6,s7 /* sets/way * associativity */
  72. + mflo t0 /* total cache lines */
  73. +
  74. + multu s5,t0 /* D$ linesize * lines */
  75. + mflo s6 /* s6 is now D$ size in bytes */
  76. +
  77. + /* Initilize the D$: */
  78. + mtc0 zero,C0_TAGLO
  79. + mtc0 zero,C0_TAGHI
  80. +
  81. + li t0,KSEG0 /* Just an address for the first $ line */
  82. + addu t1,t0,s6 /* + size of cache == end */
  83. +
  84. + .set mips3
  85. +1: cache Index_Writeback_Inv_D,0(t0)
  86. + .set mips0
  87. + bne t0,t1,1b
  88. + addu t0,s5
  89. +
  90. +2:
  91. + /* Now we get to do it all again for the I$ */
  92. +
  93. + move s7,zero /* just in case there is no icache */
  94. + move t8,zero
  95. +
  96. + li t0,CONF1_IL_MASK
  97. + and t0,s4
  98. + beq t0,zero,3f
  99. + nop
  100. +
  101. + srl t0,CONF1_IL_SHIFT
  102. + li s7,CONF1_IL_BASE
  103. + sll s7,t0 /* s7 has I$ cache line size */
  104. +
  105. + li t0,CONF1_IA_MASK
  106. + and t0,s4
  107. + srl t0,CONF1_IA_SHIFT
  108. + addiu t8,t0,CONF1_IA_BASE /* t8 now has I$ associativity */
  109. +
  110. + li t0,CONF1_IS_MASK
  111. + and t0,s4
  112. + srl t0,CONF1_IS_SHIFT
  113. + li t9,CONF1_IS_BASE
  114. + sll t9,t0 /* t9 has I$ sets per way */
  115. +
  116. + multu t8,t9 /* sets/way * associativity */
  117. + mflo t0 /* t8 is now total cache lines */
  118. +
  119. + multu s7,t0 /* I$ linesize * lines */
  120. + mflo t8 /* t8 is cache size in bytes */
  121. +
  122. + /* Initilize the I$: */
  123. + mtc0 zero,C0_TAGLO
  124. + mtc0 zero,C0_TAGHI
  125. +
  126. + li t0,KSEG0 /* Just an address for the first $ line */
  127. + addu t1,t0,t8 /* + size of cache == end */
  128. +
  129. + .set mips3
  130. +1: cache Index_Invalidate_I,0(t0)
  131. + .set mips0
  132. + bne t0,t1,1b
  133. + addu t0,s7
  134. +
  135. +3:
  136. --- /dev/null Thu Jan 6 00:14:18 2011
  137. +++ linux-2.6.36/arch/mips/boot/compressed/selfreloc.lds.S Wed Jan 5 23:52:43 2011
  138. @@ -0,0 +1,39 @@
  139. +/*-
  140. + * written 2010 by Thorsten Glaser <tg@debian.org> based on
  141. + * arch/mips/kernel/vmlinux.lds and arch/mips/boot/compressed/ld.script
  142. + */
  143. +
  144. +#include <asm/asm-offsets.h>
  145. +#include <asm/page.h>
  146. +#include <asm-generic/vmlinux.lds.h>
  147. +
  148. +#undef mips
  149. +#define mips mips
  150. +OUTPUT_ARCH(mips)
  151. +ENTRY(selfreloc_start)
  152. +PHDRS {
  153. + text PT_LOAD FLAGS(7); /* RWX */
  154. +}
  155. +SECTIONS
  156. +{
  157. + . = VMLINUX_LOAD_ADDRESS;
  158. + .text : {
  159. + *(.text)
  160. + *(.text.*)
  161. + *(.rodata)
  162. + *(.rodata.*)
  163. + *(.data)
  164. + *(.data.*)
  165. + *(.bss)
  166. + *(.bss.*)
  167. + } :text
  168. + /DISCARD/ : {
  169. + *(.MIPS.options)
  170. + *(.options)
  171. + *(.pdr)
  172. + *(.reginfo)
  173. + *(.comment)
  174. + *(.note)
  175. + *(.gnu.attributes)
  176. + }
  177. +}
  178. --- /dev/null Thu Jan 6 02:10:14 2011
  179. +++ linux-2.6.36/arch/mips/boot/compressed/selfreloc.S Thu Jan 6 01:21:44 2011
  180. @@ -0,0 +1,60 @@
  181. +/*-
  182. + * written 2011 by Thorsten Glaser <tg@freewrt.org> based on
  183. + * arch/mips/boot/compressed/head.S and code from LZMA-Loader
  184. + */
  185. +
  186. +#include <asm/asm.h>
  187. +#include <asm/regdef.h>
  188. +
  189. + .set noreorder
  190. + .cprestore
  191. +
  192. + .text
  193. + LEAF(selfreloc_start)
  194. +selfreloc_start:
  195. + /* Save boot rom start args */
  196. + move s0, a0
  197. + move s1, a1
  198. + move s2, a2
  199. + move s3, a3
  200. +
  201. + /* Copy code to the correct place */
  202. + PTR_LI a0, VMLINUZ_LOAD_ADDRESS
  203. + PTR_LA a1, imgbeg
  204. + PTR_LA a2, imgend
  205. +1: lw t0, 0(a1)
  206. + sw t0, 0(a0)
  207. + add a1, 4
  208. + add a0, 4
  209. + blt a1, a2, 1b
  210. + nop
  211. +
  212. + /*
  213. + * At this point we need to invalidate dcache and
  214. + * icache before jumping to the new code
  215. + */
  216. +/* #include "invcache.S" // since this may work only on brcm? */
  217. +
  218. + /* Restore boot rom start args */
  219. + move a0, s0
  220. + move a1, s1
  221. + move a2, s2
  222. + move a3, s3
  223. +
  224. + /* Jump to the code at its new location */
  225. + PTR_LI k0, VMLINUZ_LOAD_ADDRESS
  226. + jr k0
  227. + nop
  228. +
  229. + /* Just in case we come back… */
  230. +3:
  231. + b 3b
  232. + nop
  233. + END(selfreloc_start)
  234. +
  235. + .globl imgbeg
  236. + .p2align 2
  237. +imgbeg: .incbin "vmlinuz.bin"
  238. + .globl imgend
  239. + .p2align 2
  240. +imgend:
  241. --- linux-2.6.36/arch/mips/boot/compressed/Makefile~ Wed Jan 5 21:26:40 2011
  242. +++ linux-2.6.36/arch/mips/boot/compressed/Makefile Wed Jan 5 23:35:58 2011
  243. @@ -62,8 +62,13 @@ $(obj)/piggy.o: $(obj)/dummy.o $(obj)/vm
  244. # Calculate the load address of the compressed kernel image
  245. hostprogs-y := calc_vmlinuz_load_addr
  246. +ifdef CONFIG_BCM47XX
  247. +# XXX just after CFE, just pray the address is static
  248. +VMLINUZ_LOAD_ADDRESS = 0xffffffff80480000
  249. +else
  250. VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
  251. $(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
  252. +endif
  253. vmlinuzobjs-y += $(obj)/piggy.o
  254. @@ -106,4 +107,12 @@ OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFL
  255. vmlinuz.srec: vmlinuz
  256. $(call cmd,objcopy)
  257. -clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec}
  258. +AFLAGS_selfreloc.o := -DVMLINUZ_LOAD_ADDRESS=$(VMLINUZ_LOAD_ADDRESS)
  259. +arch/mips/boot/compressed/selfreloc.o: arch/mips/boot/compressed/selfreloc.S vmlinuz.bin arch/mips/boot/compressed/invcache.S
  260. +
  261. +CPPFLAGS_selfreloc.lds := $(KBUILD_CFLAGS)
  262. +
  263. +vmlinub.elf: arch/mips/boot/compressed/selfreloc.o arch/mips/boot/compressed/selfreloc.lds
  264. + $(LD) $(LDFLAGS) -T arch/mips/boot/compressed/selfreloc.lds arch/mips/boot/compressed/selfreloc.o -o $@
  265. +
  266. +clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec} $(objtree)/vmlinub.elf $(objtree)/arch/mips/boot/compressed/selfreloc.{o,lds}
  267. --- linux-2.6.36/arch/mips/Makefile~ Wed Jan 5 20:26:12 2011
  268. +++ linux-2.6.36/arch/mips/Makefile Wed Jan 5 22:41:38 2011
  269. @@ -79,6 +79,7 @@ endif
  270. all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32)
  271. all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64)
  272. all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
  273. +all-$(CONFIG_BCM47XX) += vmlinub.elf
  274. #
  275. # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
  276. @@ -285,7 +286,7 @@ vmlinux.bin vmlinux.ecoff vmlinux.srec:
  277. $(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) arch/mips/boot/$@
  278. # boot/compressed
  279. -vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec: $(vmlinux-32) FORCE
  280. +vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec vmlinub.elf: $(vmlinux-32) FORCE
  281. $(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
  282. VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $@
  283. @@ -322,6 +323,7 @@ define archhelp
  284. echo ' vmlinuz.ecoff - ECOFF zboot image'
  285. echo ' vmlinuz.bin - Raw binary zboot image'
  286. echo ' vmlinuz.srec - SREC zboot image'
  287. + echo ' vmlinub.elf - ELF self-relocating zboot image'
  288. echo
  289. echo ' These will be default as apropriate for a configured platform.'
  290. endef