revert.sparc 9.2 KB

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  1. diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.c gcc-10.3.0/gcc/config/sparc/sparc.c
  2. --- gcc-10.3.0.orig/gcc/config/sparc/sparc.c 2021-04-08 13:56:28.201742273 +0200
  3. +++ gcc-10.3.0/gcc/config/sparc/sparc.c 2022-01-24 10:19:53.724121161 +0100
  4. @@ -4157,6 +4157,13 @@
  5. static bool
  6. sparc_cannot_force_const_mem (machine_mode mode, rtx x)
  7. {
  8. + /* After IRA has run in PIC mode, it is too late to put anything into the
  9. + constant pool if the PIC register hasn't already been initialized. */
  10. + if ((lra_in_progress || reload_in_progress)
  11. + && flag_pic
  12. + && !crtl->uses_pic_offset_table)
  13. + return true;
  14. +
  15. switch (GET_CODE (x))
  16. {
  17. case CONST_INT:
  18. @@ -4192,11 +4199,9 @@
  19. }
  20. /* Global Offset Table support. */
  21. -static GTY(()) rtx got_symbol_rtx = NULL_RTX;
  22. -static GTY(()) rtx got_register_rtx = NULL_RTX;
  23. static GTY(()) rtx got_helper_rtx = NULL_RTX;
  24. -
  25. -static GTY(()) bool got_helper_needed = false;
  26. +static GTY(()) rtx got_register_rtx = NULL_RTX;
  27. +static GTY(()) rtx got_symbol_rtx = NULL_RTX;
  28. /* Return the SYMBOL_REF for the Global Offset Table. */
  29. @@ -4209,6 +4214,27 @@
  30. return got_symbol_rtx;
  31. }
  32. +#ifdef HAVE_GAS_HIDDEN
  33. +# define USE_HIDDEN_LINKONCE 1
  34. +#else
  35. +# define USE_HIDDEN_LINKONCE 0
  36. +#endif
  37. +
  38. +static void
  39. +get_pc_thunk_name (char name[32], unsigned int regno)
  40. +{
  41. + const char *reg_name = reg_names[regno];
  42. +
  43. + /* Skip the leading '%' as that cannot be used in a
  44. + symbol name. */
  45. + reg_name += 1;
  46. +
  47. + if (USE_HIDDEN_LINKONCE)
  48. + sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
  49. + else
  50. + ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
  51. +}
  52. +
  53. /* Wrapper around the load_pcrel_sym{si,di} patterns. */
  54. static rtx
  55. @@ -4228,78 +4254,30 @@
  56. return insn;
  57. }
  58. -/* Output the load_pcrel_sym{si,di} patterns. */
  59. -
  60. -const char *
  61. -output_load_pcrel_sym (rtx *operands)
  62. -{
  63. - if (flag_delayed_branch)
  64. - {
  65. - output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
  66. - output_asm_insn ("call\t%a2", operands);
  67. - output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
  68. - }
  69. - else
  70. - {
  71. - output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
  72. - output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
  73. - output_asm_insn ("call\t%a2", operands);
  74. - output_asm_insn (" nop", NULL);
  75. - }
  76. -
  77. - if (operands[2] == got_helper_rtx)
  78. - got_helper_needed = true;
  79. -
  80. - return "";
  81. -}
  82. -
  83. -#ifdef HAVE_GAS_HIDDEN
  84. -# define USE_HIDDEN_LINKONCE 1
  85. -#else
  86. -# define USE_HIDDEN_LINKONCE 0
  87. -#endif
  88. -
  89. /* Emit code to load the GOT register. */
  90. void
  91. load_got_register (void)
  92. {
  93. - rtx insn;
  94. + if (!got_register_rtx)
  95. + got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
  96. if (TARGET_VXWORKS_RTP)
  97. - {
  98. - if (!got_register_rtx)
  99. - got_register_rtx = pic_offset_table_rtx;
  100. -
  101. - insn = gen_vxworks_load_got ();
  102. - }
  103. + emit_insn (gen_vxworks_load_got ());
  104. else
  105. {
  106. - if (!got_register_rtx)
  107. - got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
  108. -
  109. /* The GOT symbol is subject to a PC-relative relocation so we need a
  110. helper function to add the PC value and thus get the final value. */
  111. if (!got_helper_rtx)
  112. {
  113. char name[32];
  114. -
  115. - /* Skip the leading '%' as that cannot be used in a symbol name. */
  116. - if (USE_HIDDEN_LINKONCE)
  117. - sprintf (name, "__sparc_get_pc_thunk.%s",
  118. - reg_names[REGNO (got_register_rtx)] + 1);
  119. - else
  120. - ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
  121. - REGNO (got_register_rtx));
  122. -
  123. + get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
  124. got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
  125. }
  126. - insn
  127. - = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
  128. + emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
  129. + got_helper_rtx));
  130. }
  131. -
  132. - emit_insn (insn);
  133. }
  134. /* Ensure that we are not using patterns that are not OK with PIC. */
  135. @@ -5464,7 +5442,7 @@
  136. return true;
  137. /* GOT register (%l7) if needed. */
  138. - if (got_register_rtx && regno == REGNO (got_register_rtx))
  139. + if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
  140. return true;
  141. /* If the function accesses prior frames, the frame pointer and the return
  142. @@ -12507,9 +12485,10 @@
  143. sparc_file_end (void)
  144. {
  145. /* If we need to emit the special GOT helper function, do so now. */
  146. - if (got_helper_needed)
  147. + if (got_helper_rtx)
  148. {
  149. const char *name = XSTR (got_helper_rtx, 0);
  150. + const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
  151. #ifdef DWARF2_UNWIND_INFO
  152. bool do_cfi;
  153. #endif
  154. @@ -12546,22 +12525,17 @@
  155. #ifdef DWARF2_UNWIND_INFO
  156. do_cfi = dwarf2out_do_cfi_asm ();
  157. if (do_cfi)
  158. - output_asm_insn (".cfi_startproc", NULL);
  159. + fprintf (asm_out_file, "\t.cfi_startproc\n");
  160. #endif
  161. if (flag_delayed_branch)
  162. - {
  163. - output_asm_insn ("jmp\t%%o7+8", NULL);
  164. - output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
  165. - }
  166. + fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
  167. + reg_name, reg_name);
  168. else
  169. - {
  170. - output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
  171. - output_asm_insn ("jmp\t%%o7+8", NULL);
  172. - output_asm_insn (" nop", NULL);
  173. - }
  174. + fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
  175. + reg_name, reg_name);
  176. #ifdef DWARF2_UNWIND_INFO
  177. if (do_cfi)
  178. - output_asm_insn (".cfi_endproc", NULL);
  179. + fprintf (asm_out_file, "\t.cfi_endproc\n");
  180. #endif
  181. }
  182. @@ -13056,10 +13030,7 @@
  183. edge entry_edge;
  184. rtx_insn *seq;
  185. - /* In PIC mode, we need to always initialize the PIC register if optimization
  186. - is enabled, because we are called from IRA and LRA may later force things
  187. - to the constant pool for optimization purposes. */
  188. - if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
  189. + if (!crtl->uses_pic_offset_table)
  190. return;
  191. start_sequence ();
  192. diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.md gcc-10.3.0/gcc/config/sparc/sparc.md
  193. --- gcc-10.3.0.orig/gcc/config/sparc/sparc.md 2021-04-08 13:56:28.205742322 +0200
  194. +++ gcc-10.3.0/gcc/config/sparc/sparc.md 2022-01-24 10:19:54.504102046 +0100
  195. @@ -1601,7 +1601,10 @@
  196. (clobber (reg:P O7_REG))]
  197. "REGNO (operands[0]) == INTVAL (operands[3])"
  198. {
  199. - return output_load_pcrel_sym (operands);
  200. + if (flag_delayed_branch)
  201. + return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
  202. + else
  203. + return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
  204. }
  205. [(set (attr "type") (const_string "multi"))
  206. (set (attr "length")
  207. diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h gcc-10.3.0/gcc/config/sparc/sparc-protos.h
  208. --- gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h 2021-04-08 13:56:28.201742273 +0200
  209. +++ gcc-10.3.0/gcc/config/sparc/sparc-protos.h 2022-01-24 10:19:54.548100968 +0100
  210. @@ -69,7 +69,6 @@
  211. extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
  212. extern int sparc_split_reg_reg_legitimate (rtx, rtx);
  213. extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
  214. -extern const char *output_load_pcrel_sym (rtx *);
  215. extern const char *output_ubranch (rtx, rtx_insn *);
  216. extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
  217. extern const char *output_return (rtx_insn *);
  218. diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
  219. --- gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 2021-04-08 13:56:28.929751064 +0200
  220. +++ gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 1970-01-01 01:00:00.000000000 +0100
  221. @@ -1,14 +0,0 @@
  222. -/* PR target/92095 */
  223. -/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
  224. -
  225. -typedef union {
  226. - double a;
  227. - int b[2];
  228. -} c;
  229. -
  230. -double d(int e)
  231. -{
  232. - c f;
  233. - (&f)->b[0] = 15728640;
  234. - return e ? -(&f)->a : (&f)->a;
  235. -}
  236. diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c
  237. --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c 2021-04-08 13:56:29.453757389 +0200
  238. +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c 2022-01-24 10:19:54.688097536 +0100
  239. @@ -1,6 +1,6 @@
  240. /* { dg-do compile } */
  241. /* { dg-require-effective-target lp64 } */
  242. -/* { dg-options "-O -fno-pie" } */
  243. +/* { dg-options "-O" } */
  244. #include <stdbool.h>
  245. #include <stdint.h>
  246. diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c
  247. --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c 2021-04-08 13:56:29.453757389 +0200
  248. +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c 2022-01-24 10:19:55.336081656 +0100
  249. @@ -1,6 +1,6 @@
  250. /* { dg-do compile } */
  251. /* { dg-require-effective-target lp64 } */
  252. -/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
  253. +/* { dg-options "-O -mno-vis3 -mno-vis4" } */
  254. #include <stdbool.h>
  255. #include <stdint.h>
  256. diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c
  257. --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c 2021-04-08 13:56:29.453757389 +0200
  258. +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c 2022-01-24 10:19:55.336081656 +0100
  259. @@ -1,6 +1,6 @@
  260. /* { dg-do compile } */
  261. /* { dg-require-effective-target lp64 } */
  262. -/* { dg-options "-O -fno-pie -mvis3" } */
  263. +/* { dg-options "-O -mvis3" } */
  264. #include <stdbool.h>
  265. #include <stdint.h>