sm7xx-fb.patch 59 KB

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  1. diff -Nur linux-3.18.12.orig/drivers/staging/Kconfig linux-3.18.12/drivers/staging/Kconfig
  2. --- linux-3.18.12.orig/drivers/staging/Kconfig 2015-04-20 14:48:02.000000000 -0500
  3. +++ linux-3.18.12/drivers/staging/Kconfig 2015-05-02 10:04:55.623427001 -0500
  4. @@ -58,6 +58,8 @@
  5. source "drivers/staging/iio/Kconfig"
  6. +source "drivers/staging/sm7xxfb/Kconfig"
  7. +
  8. source "drivers/staging/xgifb/Kconfig"
  9. source "drivers/staging/emxx_udc/Kconfig"
  10. diff -Nur linux-3.18.12.orig/drivers/staging/Kconfig.orig linux-3.18.12/drivers/staging/Kconfig.orig
  11. --- linux-3.18.12.orig/drivers/staging/Kconfig.orig 1969-12-31 18:00:00.000000000 -0600
  12. +++ linux-3.18.12/drivers/staging/Kconfig.orig 2015-04-20 14:48:02.000000000 -0500
  13. @@ -0,0 +1,111 @@
  14. +menuconfig STAGING
  15. + bool "Staging drivers"
  16. + default n
  17. + ---help---
  18. + This option allows you to select a number of drivers that are
  19. + not of the "normal" Linux kernel quality level. These drivers
  20. + are placed here in order to get a wider audience to make use of
  21. + them. Please note that these drivers are under heavy
  22. + development, may or may not work, and may contain userspace
  23. + interfaces that most likely will be changed in the near
  24. + future.
  25. +
  26. + Using any of these drivers will taint your kernel which might
  27. + affect support options from both the community, and various
  28. + commercial support organizations.
  29. +
  30. + If you wish to work on these drivers, to help improve them, or
  31. + to report problems you have with them, please see the
  32. + driver_name.README file in the drivers/staging/ directory to
  33. + see what needs to be worked on, and who to contact.
  34. +
  35. + If in doubt, say N here.
  36. +
  37. +
  38. +if STAGING
  39. +
  40. +source "drivers/staging/slicoss/Kconfig"
  41. +
  42. +source "drivers/staging/wlan-ng/Kconfig"
  43. +
  44. +source "drivers/staging/comedi/Kconfig"
  45. +
  46. +source "drivers/staging/olpc_dcon/Kconfig"
  47. +
  48. +source "drivers/staging/panel/Kconfig"
  49. +
  50. +source "drivers/staging/rtl8192u/Kconfig"
  51. +
  52. +source "drivers/staging/rtl8192e/Kconfig"
  53. +
  54. +source "drivers/staging/rtl8712/Kconfig"
  55. +
  56. +source "drivers/staging/rtl8188eu/Kconfig"
  57. +
  58. +source "drivers/staging/rtl8723au/Kconfig"
  59. +
  60. +source "drivers/staging/rts5208/Kconfig"
  61. +
  62. +source "drivers/staging/line6/Kconfig"
  63. +
  64. +source "drivers/staging/octeon/Kconfig"
  65. +
  66. +source "drivers/staging/octeon-usb/Kconfig"
  67. +
  68. +source "drivers/staging/vt6655/Kconfig"
  69. +
  70. +source "drivers/staging/vt6656/Kconfig"
  71. +
  72. +source "drivers/staging/iio/Kconfig"
  73. +
  74. +source "drivers/staging/xgifb/Kconfig"
  75. +
  76. +source "drivers/staging/emxx_udc/Kconfig"
  77. +
  78. +source "drivers/staging/bcm/Kconfig"
  79. +
  80. +source "drivers/staging/ft1000/Kconfig"
  81. +
  82. +source "drivers/staging/speakup/Kconfig"
  83. +
  84. +source "drivers/staging/cptm1217/Kconfig"
  85. +
  86. +source "drivers/staging/ste_rmi4/Kconfig"
  87. +
  88. +source "drivers/staging/nvec/Kconfig"
  89. +
  90. +source "drivers/staging/media/Kconfig"
  91. +
  92. +source "drivers/staging/android/Kconfig"
  93. +
  94. +source "drivers/staging/board/Kconfig"
  95. +
  96. +source "drivers/staging/ozwpan/Kconfig"
  97. +
  98. +source "drivers/staging/gdm72xx/Kconfig"
  99. +
  100. +source "drivers/staging/gdm724x/Kconfig"
  101. +
  102. +source "drivers/staging/imx-drm/Kconfig"
  103. +
  104. +source "drivers/staging/fwserial/Kconfig"
  105. +
  106. +source "drivers/staging/goldfish/Kconfig"
  107. +
  108. +source "drivers/staging/netlogic/Kconfig"
  109. +
  110. +source "drivers/staging/mt29f_spinand/Kconfig"
  111. +
  112. +source "drivers/staging/lustre/Kconfig"
  113. +
  114. +source "drivers/staging/dgnc/Kconfig"
  115. +
  116. +source "drivers/staging/dgap/Kconfig"
  117. +
  118. +source "drivers/staging/gs_fpgaboot/Kconfig"
  119. +
  120. +source "drivers/staging/skein/Kconfig"
  121. +
  122. +source "drivers/staging/unisys/Kconfig"
  123. +
  124. +endif # STAGING
  125. diff -Nur linux-3.18.12.orig/drivers/staging/Makefile linux-3.18.12/drivers/staging/Makefile
  126. --- linux-3.18.12.orig/drivers/staging/Makefile 2015-04-20 14:48:02.000000000 -0500
  127. +++ linux-3.18.12/drivers/staging/Makefile 2015-05-02 10:04:55.623427001 -0500
  128. @@ -24,6 +24,7 @@
  129. obj-$(CONFIG_VME_BUS) += vme/
  130. obj-$(CONFIG_IIO) += iio/
  131. obj-$(CONFIG_FB_XGI) += xgifb/
  132. +obj-$(CONFIG_FB_SM7XX) += sm7xxfb/
  133. obj-$(CONFIG_USB_EMXX) += emxx_udc/
  134. obj-$(CONFIG_BCM_WIMAX) += bcm/
  135. obj-$(CONFIG_FT1000) += ft1000/
  136. diff -Nur linux-3.18.12.orig/drivers/staging/Makefile.orig linux-3.18.12/drivers/staging/Makefile.orig
  137. --- linux-3.18.12.orig/drivers/staging/Makefile.orig 1969-12-31 18:00:00.000000000 -0600
  138. +++ linux-3.18.12/drivers/staging/Makefile.orig 2015-04-20 14:48:02.000000000 -0500
  139. @@ -0,0 +1,48 @@
  140. +# Makefile for staging directory
  141. +
  142. +# fix for build system bug...
  143. +obj-$(CONFIG_STAGING) += staging.o
  144. +
  145. +obj-y += media/
  146. +obj-$(CONFIG_SLICOSS) += slicoss/
  147. +obj-$(CONFIG_PRISM2_USB) += wlan-ng/
  148. +obj-$(CONFIG_COMEDI) += comedi/
  149. +obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
  150. +obj-$(CONFIG_PANEL) += panel/
  151. +obj-$(CONFIG_RTL8192U) += rtl8192u/
  152. +obj-$(CONFIG_RTL8192E) += rtl8192e/
  153. +obj-$(CONFIG_R8712U) += rtl8712/
  154. +obj-$(CONFIG_R8188EU) += rtl8188eu/
  155. +obj-$(CONFIG_R8723AU) += rtl8723au/
  156. +obj-$(CONFIG_RTS5208) += rts5208/
  157. +obj-$(CONFIG_LINE6_USB) += line6/
  158. +obj-$(CONFIG_NETLOGIC_XLR_NET) += netlogic/
  159. +obj-$(CONFIG_OCTEON_ETHERNET) += octeon/
  160. +obj-$(CONFIG_OCTEON_USB) += octeon-usb/
  161. +obj-$(CONFIG_VT6655) += vt6655/
  162. +obj-$(CONFIG_VT6656) += vt6656/
  163. +obj-$(CONFIG_VME_BUS) += vme/
  164. +obj-$(CONFIG_IIO) += iio/
  165. +obj-$(CONFIG_FB_XGI) += xgifb/
  166. +obj-$(CONFIG_USB_EMXX) += emxx_udc/
  167. +obj-$(CONFIG_BCM_WIMAX) += bcm/
  168. +obj-$(CONFIG_FT1000) += ft1000/
  169. +obj-$(CONFIG_SPEAKUP) += speakup/
  170. +obj-$(CONFIG_TOUCHSCREEN_CLEARPAD_TM1217) += cptm1217/
  171. +obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += ste_rmi4/
  172. +obj-$(CONFIG_MFD_NVEC) += nvec/
  173. +obj-$(CONFIG_ANDROID) += android/
  174. +obj-$(CONFIG_STAGING_BOARD) += board/
  175. +obj-$(CONFIG_USB_WPAN_HCD) += ozwpan/
  176. +obj-$(CONFIG_WIMAX_GDM72XX) += gdm72xx/
  177. +obj-$(CONFIG_LTE_GDM724X) += gdm724x/
  178. +obj-$(CONFIG_DRM_IMX) += imx-drm/
  179. +obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/
  180. +obj-$(CONFIG_GOLDFISH) += goldfish/
  181. +obj-$(CONFIG_LUSTRE_FS) += lustre/
  182. +obj-$(CONFIG_DGNC) += dgnc/
  183. +obj-$(CONFIG_DGAP) += dgap/
  184. +obj-$(CONFIG_MTD_SPINAND_MT29F) += mt29f_spinand/
  185. +obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/
  186. +obj-$(CONFIG_CRYPTO_SKEIN) += skein/
  187. +obj-$(CONFIG_UNISYSSPAR) += unisys/
  188. diff -Nur linux-3.18.12.orig/drivers/staging/sm7xxfb/Kconfig linux-3.18.12/drivers/staging/sm7xxfb/Kconfig
  189. --- linux-3.18.12.orig/drivers/staging/sm7xxfb/Kconfig 1969-12-31 18:00:00.000000000 -0600
  190. +++ linux-3.18.12/drivers/staging/sm7xxfb/Kconfig 2015-05-02 10:04:55.623427001 -0500
  191. @@ -0,0 +1,13 @@
  192. +config FB_SM7XX
  193. + tristate "Silicon Motion SM7XX framebuffer support"
  194. + depends on FB && PCI
  195. + select FB_CFB_FILLRECT
  196. + select FB_CFB_COPYAREA
  197. + select FB_CFB_IMAGEBLIT
  198. + help
  199. + Frame buffer driver for the Silicon Motion SM710, SM712, SM721
  200. + and SM722 chips.
  201. +
  202. + This driver is also available as a module. The module will be
  203. + called sm7xxfb. If you want to compile it as a module, say M
  204. + here and read <file:Documentation/kbuild/modules.txt>.
  205. diff -Nur linux-3.18.12.orig/drivers/staging/sm7xxfb/Makefile linux-3.18.12/drivers/staging/sm7xxfb/Makefile
  206. --- linux-3.18.12.orig/drivers/staging/sm7xxfb/Makefile 1969-12-31 18:00:00.000000000 -0600
  207. +++ linux-3.18.12/drivers/staging/sm7xxfb/Makefile 2015-05-02 10:04:55.623427001 -0500
  208. @@ -0,0 +1 @@
  209. +obj-$(CONFIG_FB_SM7XX) += sm7xxfb.o
  210. diff -Nur linux-3.18.12.orig/drivers/staging/sm7xxfb/sm7xxfb.c linux-3.18.12/drivers/staging/sm7xxfb/sm7xxfb.c
  211. --- linux-3.18.12.orig/drivers/staging/sm7xxfb/sm7xxfb.c 1969-12-31 18:00:00.000000000 -0600
  212. +++ linux-3.18.12/drivers/staging/sm7xxfb/sm7xxfb.c 2015-05-02 10:04:55.627427001 -0500
  213. @@ -0,0 +1,1026 @@
  214. +/*
  215. + * Silicon Motion SM7XX frame buffer device
  216. + *
  217. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  218. + * Authors: Ge Wang, gewang@siliconmotion.com
  219. + * Boyod boyod.yang@siliconmotion.com.cn
  220. + *
  221. + * Copyright (C) 2009 Lemote, Inc.
  222. + * Author: Wu Zhangjin, wuzhangjin@gmail.com
  223. + *
  224. + * Copyright (C) 2011 Igalia, S.L.
  225. + * Author: Javier M. Mellid <jmunhoz@igalia.com>
  226. + *
  227. + * This file is subject to the terms and conditions of the GNU General Public
  228. + * License. See the file COPYING in the main directory of this archive for
  229. + * more details.
  230. + *
  231. + * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
  232. + */
  233. +
  234. +#include <linux/io.h>
  235. +#include <linux/fb.h>
  236. +#include <linux/pci.h>
  237. +#include <linux/init.h>
  238. +#include <linux/slab.h>
  239. +#include <linux/uaccess.h>
  240. +#include <linux/module.h>
  241. +#include <linux/console.h>
  242. +#include <linux/screen_info.h>
  243. +
  244. +#ifdef CONFIG_PM
  245. +#include <linux/pm.h>
  246. +#endif
  247. +
  248. +#include "sm7xx.h"
  249. +
  250. +/*
  251. +* Private structure
  252. +*/
  253. +struct smtcfb_info {
  254. + struct pci_dev *pdev;
  255. + struct fb_info fb;
  256. + u16 chip_id;
  257. + u8 chip_rev_id;
  258. +
  259. + void __iomem *lfb; /* linear frame buffer */
  260. + void __iomem *dp_regs; /* drawing processor control regs */
  261. + void __iomem *vp_regs; /* video processor control regs */
  262. + void __iomem *cp_regs; /* capture processor control regs */
  263. + void __iomem *mmio; /* memory map IO port */
  264. +
  265. + u_int width;
  266. + u_int height;
  267. + u_int hz;
  268. +
  269. + u32 colreg[17];
  270. +};
  271. +
  272. +void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
  273. +
  274. +static struct fb_var_screeninfo smtcfb_var = {
  275. + .xres = 1024,
  276. + .yres = 600,
  277. + .xres_virtual = 1024,
  278. + .yres_virtual = 600,
  279. + .bits_per_pixel = 16,
  280. + .red = {16, 8, 0},
  281. + .green = {8, 8, 0},
  282. + .blue = {0, 8, 0},
  283. + .activate = FB_ACTIVATE_NOW,
  284. + .height = -1,
  285. + .width = -1,
  286. + .vmode = FB_VMODE_NONINTERLACED,
  287. + .nonstd = 0,
  288. + .accel_flags = FB_ACCELF_TEXT,
  289. +};
  290. +
  291. +static struct fb_fix_screeninfo smtcfb_fix = {
  292. + .id = "smXXXfb",
  293. + .type = FB_TYPE_PACKED_PIXELS,
  294. + .visual = FB_VISUAL_TRUECOLOR,
  295. + .line_length = 800 * 3,
  296. + .accel = FB_ACCEL_SMI_LYNX,
  297. + .type_aux = 0,
  298. + .xpanstep = 0,
  299. + .ypanstep = 0,
  300. + .ywrapstep = 0,
  301. +};
  302. +
  303. +struct vesa_mode {
  304. + char index[6];
  305. + u16 lfb_width;
  306. + u16 lfb_height;
  307. + u16 lfb_depth;
  308. +};
  309. +
  310. +static struct vesa_mode vesa_mode_table[] = {
  311. + {"0x301", 640, 480, 8},
  312. + {"0x303", 800, 600, 8},
  313. + {"0x305", 1024, 768, 8},
  314. + {"0x307", 1280, 1024, 8},
  315. +
  316. + {"0x311", 640, 480, 16},
  317. + {"0x314", 800, 600, 16},
  318. + {"0x317", 1024, 768, 16},
  319. + {"0x31A", 1280, 1024, 16},
  320. +
  321. + {"0x312", 640, 480, 24},
  322. + {"0x315", 800, 600, 24},
  323. + {"0x318", 1024, 768, 24},
  324. + {"0x31B", 1280, 1024, 24},
  325. +};
  326. +
  327. +struct screen_info smtc_scr_info;
  328. +
  329. +/* process command line options, get vga parameter */
  330. +static int __init sm7xx_vga_setup(char *options)
  331. +{
  332. + int i;
  333. +
  334. + if (!options || !*options)
  335. + return -EINVAL;
  336. +
  337. + smtc_scr_info.lfb_width = 0;
  338. + smtc_scr_info.lfb_height = 0;
  339. + smtc_scr_info.lfb_depth = 0;
  340. +
  341. + pr_debug("sm7xx_vga_setup = %s\n", options);
  342. +
  343. + for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
  344. + if (strstr(options, vesa_mode_table[i].index)) {
  345. + smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
  346. + smtc_scr_info.lfb_height =
  347. + vesa_mode_table[i].lfb_height;
  348. + smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
  349. + return 0;
  350. + }
  351. + }
  352. +
  353. + return -1;
  354. +}
  355. +__setup("vga=", sm7xx_vga_setup);
  356. +
  357. +static void sm712_setpalette(int regno, unsigned red, unsigned green,
  358. + unsigned blue, struct fb_info *info)
  359. +{
  360. + /* set bit 5:4 = 01 (write LCD RAM only) */
  361. + smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
  362. +
  363. + smtc_mmiowb(regno, dac_reg);
  364. + smtc_mmiowb(red >> 10, dac_val);
  365. + smtc_mmiowb(green >> 10, dac_val);
  366. + smtc_mmiowb(blue >> 10, dac_val);
  367. +}
  368. +
  369. +/* chan_to_field
  370. + *
  371. + * convert a colour value into a field position
  372. + *
  373. + * from pxafb.c
  374. + */
  375. +
  376. +static inline unsigned int chan_to_field(unsigned int chan,
  377. + struct fb_bitfield *bf)
  378. +{
  379. + chan &= 0xffff;
  380. + chan >>= 16 - bf->length;
  381. + return chan << bf->offset;
  382. +}
  383. +
  384. +static int smtc_blank(int blank_mode, struct fb_info *info)
  385. +{
  386. + /* clear DPMS setting */
  387. + switch (blank_mode) {
  388. + case FB_BLANK_UNBLANK:
  389. + /* Screen On: HSync: On, VSync : On */
  390. + smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  391. + smtc_seqw(0x6a, 0x16);
  392. + smtc_seqw(0x6b, 0x02);
  393. + smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
  394. + smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  395. + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  396. + smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  397. + smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
  398. + break;
  399. + case FB_BLANK_NORMAL:
  400. + /* Screen Off: HSync: On, VSync : On Soft blank */
  401. + smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  402. + smtc_seqw(0x6a, 0x16);
  403. + smtc_seqw(0x6b, 0x02);
  404. + smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  405. + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  406. + smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  407. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  408. + break;
  409. + case FB_BLANK_VSYNC_SUSPEND:
  410. + /* Screen On: HSync: On, VSync : Off */
  411. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  412. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  413. + smtc_seqw(0x6a, 0x0c);
  414. + smtc_seqw(0x6b, 0x02);
  415. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  416. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
  417. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
  418. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  419. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  420. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  421. + break;
  422. + case FB_BLANK_HSYNC_SUSPEND:
  423. + /* Screen On: HSync: Off, VSync : On */
  424. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  425. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  426. + smtc_seqw(0x6a, 0x0c);
  427. + smtc_seqw(0x6b, 0x02);
  428. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  429. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
  430. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  431. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  432. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  433. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  434. + break;
  435. + case FB_BLANK_POWERDOWN:
  436. + /* Screen On: HSync: Off, VSync : Off */
  437. + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  438. + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  439. + smtc_seqw(0x6a, 0x0c);
  440. + smtc_seqw(0x6b, 0x02);
  441. + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  442. + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
  443. + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  444. + smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  445. + smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  446. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  447. + break;
  448. + default:
  449. + return -EINVAL;
  450. + }
  451. +
  452. + return 0;
  453. +}
  454. +
  455. +static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
  456. + unsigned blue, unsigned trans, struct fb_info *info)
  457. +{
  458. + struct smtcfb_info *sfb;
  459. + u32 val;
  460. +
  461. + sfb = info->par;
  462. +
  463. + if (regno > 255)
  464. + return 1;
  465. +
  466. + switch (sfb->fb.fix.visual) {
  467. + case FB_VISUAL_DIRECTCOLOR:
  468. + case FB_VISUAL_TRUECOLOR:
  469. + /*
  470. + * 16/32 bit true-colour, use pseudo-palette for 16 base color
  471. + */
  472. + if (regno < 16) {
  473. + if (sfb->fb.var.bits_per_pixel == 16) {
  474. + u32 *pal = sfb->fb.pseudo_palette;
  475. + val = chan_to_field(red, &sfb->fb.var.red);
  476. + val |= chan_to_field(green, &sfb->fb.var.green);
  477. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  478. +#ifdef __BIG_ENDIAN
  479. + pal[regno] =
  480. + ((red & 0xf800) >> 8) |
  481. + ((green & 0xe000) >> 13) |
  482. + ((green & 0x1c00) << 3) |
  483. + ((blue & 0xf800) >> 3);
  484. +#else
  485. + pal[regno] = val;
  486. +#endif
  487. + } else {
  488. + u32 *pal = sfb->fb.pseudo_palette;
  489. + val = chan_to_field(red, &sfb->fb.var.red);
  490. + val |= chan_to_field(green, &sfb->fb.var.green);
  491. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  492. +#ifdef __BIG_ENDIAN
  493. + val =
  494. + (val & 0xff00ff00 >> 8) |
  495. + (val & 0x00ff00ff << 8);
  496. +#endif
  497. + pal[regno] = val;
  498. + }
  499. + }
  500. + break;
  501. +
  502. + case FB_VISUAL_PSEUDOCOLOR:
  503. + /* color depth 8 bit */
  504. + sm712_setpalette(regno, red, green, blue, info);
  505. + break;
  506. +
  507. + default:
  508. + return 1; /* unknown type */
  509. + }
  510. +
  511. + return 0;
  512. +
  513. +}
  514. +
  515. +#ifdef __BIG_ENDIAN
  516. +static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
  517. + count, loff_t *ppos)
  518. +{
  519. + unsigned long p = *ppos;
  520. +
  521. + u32 *buffer, *dst;
  522. + u32 __iomem *src;
  523. + int c, i, cnt = 0, err = 0;
  524. + unsigned long total_size;
  525. +
  526. + if (!info || !info->screen_base)
  527. + return -ENODEV;
  528. +
  529. + if (info->state != FBINFO_STATE_RUNNING)
  530. + return -EPERM;
  531. +
  532. + total_size = info->screen_size;
  533. +
  534. + if (total_size == 0)
  535. + total_size = info->fix.smem_len;
  536. +
  537. + if (p >= total_size)
  538. + return 0;
  539. +
  540. + if (count >= total_size)
  541. + count = total_size;
  542. +
  543. + if (count + p > total_size)
  544. + count = total_size - p;
  545. +
  546. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  547. + if (!buffer)
  548. + return -ENOMEM;
  549. +
  550. + src = (u32 __iomem *) (info->screen_base + p);
  551. +
  552. + if (info->fbops->fb_sync)
  553. + info->fbops->fb_sync(info);
  554. +
  555. + while (count) {
  556. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  557. + dst = buffer;
  558. + for (i = c >> 2; i--;) {
  559. + *dst = fb_readl(src++);
  560. + *dst =
  561. + (*dst & 0xff00ff00 >> 8) |
  562. + (*dst & 0x00ff00ff << 8);
  563. + dst++;
  564. + }
  565. + if (c & 3) {
  566. + u8 *dst8 = (u8 *) dst;
  567. + u8 __iomem *src8 = (u8 __iomem *) src;
  568. +
  569. + for (i = c & 3; i--;) {
  570. + if (i & 1) {
  571. + *dst8++ = fb_readb(++src8);
  572. + } else {
  573. + *dst8++ = fb_readb(--src8);
  574. + src8 += 2;
  575. + }
  576. + }
  577. + src = (u32 __iomem *) src8;
  578. + }
  579. +
  580. + if (copy_to_user(buf, buffer, c)) {
  581. + err = -EFAULT;
  582. + break;
  583. + }
  584. + *ppos += c;
  585. + buf += c;
  586. + cnt += c;
  587. + count -= c;
  588. + }
  589. +
  590. + kfree(buffer);
  591. +
  592. + return (err) ? err : cnt;
  593. +}
  594. +
  595. +static ssize_t
  596. +smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
  597. + loff_t *ppos)
  598. +{
  599. + unsigned long p = *ppos;
  600. +
  601. + u32 *buffer, *src;
  602. + u32 __iomem *dst;
  603. + int c, i, cnt = 0, err = 0;
  604. + unsigned long total_size;
  605. +
  606. + if (!info || !info->screen_base)
  607. + return -ENODEV;
  608. +
  609. + if (info->state != FBINFO_STATE_RUNNING)
  610. + return -EPERM;
  611. +
  612. + total_size = info->screen_size;
  613. +
  614. + if (total_size == 0)
  615. + total_size = info->fix.smem_len;
  616. +
  617. + if (p > total_size)
  618. + return -EFBIG;
  619. +
  620. + if (count > total_size) {
  621. + err = -EFBIG;
  622. + count = total_size;
  623. + }
  624. +
  625. + if (count + p > total_size) {
  626. + if (!err)
  627. + err = -ENOSPC;
  628. +
  629. + count = total_size - p;
  630. + }
  631. +
  632. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  633. + if (!buffer)
  634. + return -ENOMEM;
  635. +
  636. + dst = (u32 __iomem *) (info->screen_base + p);
  637. +
  638. + if (info->fbops->fb_sync)
  639. + info->fbops->fb_sync(info);
  640. +
  641. + while (count) {
  642. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  643. + src = buffer;
  644. +
  645. + if (copy_from_user(src, buf, c)) {
  646. + err = -EFAULT;
  647. + break;
  648. + }
  649. +
  650. + for (i = c >> 2; i--;) {
  651. + fb_writel((*src & 0xff00ff00 >> 8) |
  652. + (*src & 0x00ff00ff << 8), dst++);
  653. + src++;
  654. + }
  655. + if (c & 3) {
  656. + u8 *src8 = (u8 *) src;
  657. + u8 __iomem *dst8 = (u8 __iomem *) dst;
  658. +
  659. + for (i = c & 3; i--;) {
  660. + if (i & 1) {
  661. + fb_writeb(*src8++, ++dst8);
  662. + } else {
  663. + fb_writeb(*src8++, --dst8);
  664. + dst8 += 2;
  665. + }
  666. + }
  667. + dst = (u32 __iomem *) dst8;
  668. + }
  669. +
  670. + *ppos += c;
  671. + buf += c;
  672. + cnt += c;
  673. + count -= c;
  674. + }
  675. +
  676. + kfree(buffer);
  677. +
  678. + return (cnt) ? cnt : err;
  679. +}
  680. +#endif /* ! __BIG_ENDIAN */
  681. +
  682. +static void sm7xx_set_timing(struct smtcfb_info *sfb)
  683. +{
  684. + int i = 0, j = 0;
  685. + u32 m_nScreenStride;
  686. +
  687. + dev_dbg(&sfb->pdev->dev,
  688. + "sfb->width=%d sfb->height=%d sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
  689. + sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
  690. +
  691. + for (j = 0; j < numVGAModes; j++) {
  692. + if (VGAMode[j].mmSizeX == sfb->width &&
  693. + VGAMode[j].mmSizeY == sfb->height &&
  694. + VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
  695. + VGAMode[j].hz == sfb->hz) {
  696. +
  697. + dev_dbg(&sfb->pdev->dev,
  698. + "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
  699. + VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
  700. + VGAMode[j].bpp, VGAMode[j].hz);
  701. +
  702. + dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
  703. +
  704. + smtc_mmiowb(0x0, 0x3c6);
  705. +
  706. + smtc_seqw(0, 0x1);
  707. +
  708. + smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
  709. +
  710. + /* init SEQ register SR00 - SR04 */
  711. + for (i = 0; i < SIZE_SR00_SR04; i++)
  712. + smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
  713. +
  714. + /* init SEQ register SR10 - SR24 */
  715. + for (i = 0; i < SIZE_SR10_SR24; i++)
  716. + smtc_seqw(i + 0x10,
  717. + VGAMode[j].Init_SR10_SR24[i]);
  718. +
  719. + /* init SEQ register SR30 - SR75 */
  720. + for (i = 0; i < SIZE_SR30_SR75; i++)
  721. + if ((i + 0x30) != 0x62 &&
  722. + (i + 0x30) != 0x6a &&
  723. + (i + 0x30) != 0x6b)
  724. + smtc_seqw(i + 0x30,
  725. + VGAMode[j].Init_SR30_SR75[i]);
  726. +
  727. + /* init SEQ register SR80 - SR93 */
  728. + for (i = 0; i < SIZE_SR80_SR93; i++)
  729. + smtc_seqw(i + 0x80,
  730. + VGAMode[j].Init_SR80_SR93[i]);
  731. +
  732. + /* init SEQ register SRA0 - SRAF */
  733. + for (i = 0; i < SIZE_SRA0_SRAF; i++)
  734. + smtc_seqw(i + 0xa0,
  735. + VGAMode[j].Init_SRA0_SRAF[i]);
  736. +
  737. + /* init Graphic register GR00 - GR08 */
  738. + for (i = 0; i < SIZE_GR00_GR08; i++)
  739. + smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
  740. +
  741. + /* init Attribute register AR00 - AR14 */
  742. + for (i = 0; i < SIZE_AR00_AR14; i++)
  743. + smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
  744. +
  745. + /* init CRTC register CR00 - CR18 */
  746. + for (i = 0; i < SIZE_CR00_CR18; i++)
  747. + smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
  748. +
  749. + /* init CRTC register CR30 - CR4D */
  750. + for (i = 0; i < SIZE_CR30_CR4D; i++)
  751. + smtc_crtcw(i + 0x30,
  752. + VGAMode[j].Init_CR30_CR4D[i]);
  753. +
  754. + /* init CRTC register CR90 - CRA7 */
  755. + for (i = 0; i < SIZE_CR90_CRA7; i++)
  756. + smtc_crtcw(i + 0x90,
  757. + VGAMode[j].Init_CR90_CRA7[i]);
  758. + }
  759. + }
  760. + smtc_mmiowb(0x67, 0x3c2);
  761. +
  762. + /* set VPR registers */
  763. + writel(0x0, sfb->vp_regs + 0x0C);
  764. + writel(0x0, sfb->vp_regs + 0x40);
  765. +
  766. + /* set data width */
  767. + m_nScreenStride =
  768. + (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
  769. + switch (sfb->fb.var.bits_per_pixel) {
  770. + case 8:
  771. + writel(0x0, sfb->vp_regs + 0x0);
  772. + break;
  773. + case 16:
  774. + writel(0x00020000, sfb->vp_regs + 0x0);
  775. + break;
  776. + case 24:
  777. + writel(0x00040000, sfb->vp_regs + 0x0);
  778. + break;
  779. + case 32:
  780. + writel(0x00030000, sfb->vp_regs + 0x0);
  781. + break;
  782. + }
  783. + writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
  784. + sfb->vp_regs + 0x10);
  785. +
  786. +}
  787. +
  788. +static void smtc_set_timing(struct smtcfb_info *sfb)
  789. +{
  790. + switch (sfb->chip_id) {
  791. + case 0x710:
  792. + case 0x712:
  793. + case 0x720:
  794. + sm7xx_set_timing(sfb);
  795. + break;
  796. + }
  797. +}
  798. +
  799. +static void smtcfb_setmode(struct smtcfb_info *sfb)
  800. +{
  801. + switch (sfb->fb.var.bits_per_pixel) {
  802. + case 32:
  803. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  804. + sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
  805. + sfb->fb.var.red.length = 8;
  806. + sfb->fb.var.green.length = 8;
  807. + sfb->fb.var.blue.length = 8;
  808. + sfb->fb.var.red.offset = 16;
  809. + sfb->fb.var.green.offset = 8;
  810. + sfb->fb.var.blue.offset = 0;
  811. + break;
  812. + case 24:
  813. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  814. + sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
  815. + sfb->fb.var.red.length = 8;
  816. + sfb->fb.var.green.length = 8;
  817. + sfb->fb.var.blue.length = 8;
  818. + sfb->fb.var.red.offset = 16;
  819. + sfb->fb.var.green.offset = 8;
  820. + sfb->fb.var.blue.offset = 0;
  821. + break;
  822. + case 8:
  823. + sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  824. + sfb->fb.fix.line_length = sfb->fb.var.xres;
  825. + sfb->fb.var.red.length = 3;
  826. + sfb->fb.var.green.length = 3;
  827. + sfb->fb.var.blue.length = 2;
  828. + sfb->fb.var.red.offset = 5;
  829. + sfb->fb.var.green.offset = 2;
  830. + sfb->fb.var.blue.offset = 0;
  831. + break;
  832. + case 16:
  833. + default:
  834. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  835. + sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
  836. + sfb->fb.var.red.length = 5;
  837. + sfb->fb.var.green.length = 6;
  838. + sfb->fb.var.blue.length = 5;
  839. + sfb->fb.var.red.offset = 11;
  840. + sfb->fb.var.green.offset = 5;
  841. + sfb->fb.var.blue.offset = 0;
  842. + break;
  843. + }
  844. +
  845. + sfb->width = sfb->fb.var.xres;
  846. + sfb->height = sfb->fb.var.yres;
  847. + sfb->hz = 60;
  848. + smtc_set_timing(sfb);
  849. +}
  850. +
  851. +static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  852. +{
  853. + /* sanity checks */
  854. + if (var->xres_virtual < var->xres)
  855. + var->xres_virtual = var->xres;
  856. +
  857. + if (var->yres_virtual < var->yres)
  858. + var->yres_virtual = var->yres;
  859. +
  860. + /* set valid default bpp */
  861. + if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
  862. + (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
  863. + var->bits_per_pixel = 16;
  864. +
  865. + return 0;
  866. +}
  867. +
  868. +static int smtc_set_par(struct fb_info *info)
  869. +{
  870. + smtcfb_setmode(info->par);
  871. +
  872. + return 0;
  873. +}
  874. +
  875. +static struct fb_ops smtcfb_ops = {
  876. + .owner = THIS_MODULE,
  877. + .fb_check_var = smtc_check_var,
  878. + .fb_set_par = smtc_set_par,
  879. + .fb_setcolreg = smtc_setcolreg,
  880. + .fb_blank = smtc_blank,
  881. + .fb_fillrect = cfb_fillrect,
  882. + .fb_imageblit = cfb_imageblit,
  883. + .fb_copyarea = cfb_copyarea,
  884. +#ifdef __BIG_ENDIAN
  885. + .fb_read = smtcfb_read,
  886. + .fb_write = smtcfb_write,
  887. +#endif
  888. +};
  889. +
  890. +/*
  891. + * alloc struct smtcfb_info and assign default values
  892. + */
  893. +static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
  894. +{
  895. + struct smtcfb_info *sfb;
  896. +
  897. + sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
  898. +
  899. + if (!sfb)
  900. + return NULL;
  901. +
  902. + sfb->pdev = pdev;
  903. +
  904. + sfb->fb.flags = FBINFO_FLAG_DEFAULT;
  905. + sfb->fb.fbops = &smtcfb_ops;
  906. + sfb->fb.fix = smtcfb_fix;
  907. + sfb->fb.var = smtcfb_var;
  908. + sfb->fb.pseudo_palette = sfb->colreg;
  909. + sfb->fb.par = sfb;
  910. +
  911. + return sfb;
  912. +}
  913. +
  914. +/*
  915. + * free struct smtcfb_info
  916. + */
  917. +static void smtc_free_fb_info(struct smtcfb_info *sfb)
  918. +{
  919. + kfree(sfb);
  920. +}
  921. +
  922. +/*
  923. + * Unmap in the memory mapped IO registers
  924. + */
  925. +
  926. +static void smtc_unmap_mmio(struct smtcfb_info *sfb)
  927. +{
  928. + if (sfb && smtc_RegBaseAddress)
  929. + smtc_RegBaseAddress = NULL;
  930. +}
  931. +
  932. +/*
  933. + * Map in the screen memory
  934. + */
  935. +
  936. +static int smtc_map_smem(struct smtcfb_info *sfb,
  937. + struct pci_dev *pdev, u_long smem_len)
  938. +{
  939. +
  940. + sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
  941. +
  942. +#ifdef __BIG_ENDIAN
  943. + if (sfb->fb.var.bits_per_pixel == 32)
  944. + sfb->fb.fix.smem_start += 0x800000;
  945. +#endif
  946. +
  947. + sfb->fb.fix.smem_len = smem_len;
  948. +
  949. + sfb->fb.screen_base = sfb->lfb;
  950. +
  951. + if (!sfb->fb.screen_base) {
  952. + dev_err(&pdev->dev,
  953. + "%s: unable to map screen memory\n", sfb->fb.fix.id);
  954. + return -ENOMEM;
  955. + }
  956. +
  957. + return 0;
  958. +}
  959. +
  960. +/*
  961. + * Unmap in the screen memory
  962. + *
  963. + */
  964. +static void smtc_unmap_smem(struct smtcfb_info *sfb)
  965. +{
  966. + if (sfb && sfb->fb.screen_base) {
  967. + iounmap(sfb->fb.screen_base);
  968. + sfb->fb.screen_base = NULL;
  969. + }
  970. +}
  971. +
  972. +/*
  973. + * We need to wake up the device and make sure its in linear memory mode.
  974. + */
  975. +static inline void sm7xx_init_hw(void)
  976. +{
  977. + outb_p(0x18, 0x3c4);
  978. + outb_p(0x11, 0x3c5);
  979. +}
  980. +
  981. +static int smtcfb_pci_probe(struct pci_dev *pdev,
  982. + const struct pci_device_id *ent)
  983. +{
  984. + struct smtcfb_info *sfb;
  985. + u_long smem_size = 0x00800000; /* default 8MB */
  986. + int err;
  987. + unsigned long mmio_base;
  988. +
  989. + dev_info(&pdev->dev, "Silicon Motion display driver.");
  990. +
  991. + err = pci_enable_device(pdev); /* enable SMTC chip */
  992. + if (err)
  993. + return err;
  994. +
  995. + sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
  996. +
  997. + sfb = smtc_alloc_fb_info(pdev);
  998. +
  999. + if (!sfb) {
  1000. + err = -ENOMEM;
  1001. + goto failed_free;
  1002. + }
  1003. +
  1004. + sfb->chip_id = ent->device;
  1005. +
  1006. + pci_set_drvdata(pdev, sfb);
  1007. +
  1008. + sm7xx_init_hw();
  1009. +
  1010. + /* get mode parameter from smtc_scr_info */
  1011. + if (smtc_scr_info.lfb_width != 0) {
  1012. + sfb->fb.var.xres = smtc_scr_info.lfb_width;
  1013. + sfb->fb.var.yres = smtc_scr_info.lfb_height;
  1014. + sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
  1015. + } else {
  1016. + /* default resolution 1024x600 16bit mode */
  1017. + sfb->fb.var.xres = SCREEN_X_RES;
  1018. + sfb->fb.var.yres = SCREEN_Y_RES;
  1019. + sfb->fb.var.bits_per_pixel = SCREEN_BPP;
  1020. + }
  1021. +
  1022. +#ifdef __BIG_ENDIAN
  1023. + if (sfb->fb.var.bits_per_pixel == 24)
  1024. + sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
  1025. +#endif
  1026. + /* Map address and memory detection */
  1027. + mmio_base = pci_resource_start(pdev, 0);
  1028. + pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
  1029. +
  1030. + switch (sfb->chip_id) {
  1031. + case 0x710:
  1032. + case 0x712:
  1033. + sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
  1034. + sfb->fb.fix.mmio_len = 0x00400000;
  1035. + smem_size = SM712_VIDEOMEMORYSIZE;
  1036. +#ifdef __BIG_ENDIAN
  1037. + sfb->lfb = ioremap(mmio_base, 0x00c00000);
  1038. +#else
  1039. + sfb->lfb = ioremap(mmio_base, 0x00800000);
  1040. +#endif
  1041. + sfb->mmio = (smtc_RegBaseAddress =
  1042. + sfb->lfb + 0x00700000);
  1043. + sfb->dp_regs = sfb->lfb + 0x00408000;
  1044. + sfb->vp_regs = sfb->lfb + 0x0040c000;
  1045. +#ifdef __BIG_ENDIAN
  1046. + if (sfb->fb.var.bits_per_pixel == 32) {
  1047. + sfb->lfb += 0x800000;
  1048. + dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
  1049. + }
  1050. +#endif
  1051. + if (!smtc_RegBaseAddress) {
  1052. + dev_err(&pdev->dev,
  1053. + "%s: unable to map memory mapped IO!",
  1054. + sfb->fb.fix.id);
  1055. + err = -ENOMEM;
  1056. + goto failed_fb;
  1057. + }
  1058. +
  1059. + /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1060. + smtc_seqw(0x6a, 0x16);
  1061. + smtc_seqw(0x6b, 0x02);
  1062. + smtc_seqw(0x62, 0x3e);
  1063. + /* enable PCI burst */
  1064. + smtc_seqw(0x17, 0x20);
  1065. + /* enable word swap */
  1066. +#ifdef __BIG_ENDIAN
  1067. + if (sfb->fb.var.bits_per_pixel == 32)
  1068. + smtc_seqw(0x17, 0x30);
  1069. +#endif
  1070. + break;
  1071. + case 0x720:
  1072. + sfb->fb.fix.mmio_start = mmio_base;
  1073. + sfb->fb.fix.mmio_len = 0x00200000;
  1074. + smem_size = SM722_VIDEOMEMORYSIZE;
  1075. + sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
  1076. + sfb->lfb = sfb->dp_regs + 0x00200000;
  1077. + sfb->mmio = (smtc_RegBaseAddress =
  1078. + sfb->dp_regs + 0x000c0000);
  1079. + sfb->vp_regs = sfb->dp_regs + 0x800;
  1080. +
  1081. + smtc_seqw(0x62, 0xff);
  1082. + smtc_seqw(0x6a, 0x0d);
  1083. + smtc_seqw(0x6b, 0x02);
  1084. + break;
  1085. + default:
  1086. + dev_err(&pdev->dev,
  1087. + "No valid Silicon Motion display chip was detected!");
  1088. +
  1089. + goto failed_fb;
  1090. + }
  1091. +
  1092. + /* can support 32 bpp */
  1093. + if (15 == sfb->fb.var.bits_per_pixel)
  1094. + sfb->fb.var.bits_per_pixel = 16;
  1095. +
  1096. + sfb->fb.var.xres_virtual = sfb->fb.var.xres;
  1097. + sfb->fb.var.yres_virtual = sfb->fb.var.yres;
  1098. + err = smtc_map_smem(sfb, pdev, smem_size);
  1099. + if (err)
  1100. + goto failed;
  1101. +
  1102. + smtcfb_setmode(sfb);
  1103. +
  1104. + err = register_framebuffer(&sfb->fb);
  1105. + if (err < 0)
  1106. + goto failed;
  1107. +
  1108. + dev_info(&pdev->dev,
  1109. + "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
  1110. + sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
  1111. + sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
  1112. +
  1113. + return 0;
  1114. +
  1115. +failed:
  1116. + dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
  1117. +
  1118. + smtc_unmap_smem(sfb);
  1119. + smtc_unmap_mmio(sfb);
  1120. +failed_fb:
  1121. + smtc_free_fb_info(sfb);
  1122. +
  1123. +failed_free:
  1124. + pci_disable_device(pdev);
  1125. +
  1126. + return err;
  1127. +}
  1128. +
  1129. +/*
  1130. + * 0x710 (LynxEM)
  1131. + * 0x712 (LynxEM+)
  1132. + * 0x720 (Lynx3DM, Lynx3DM+)
  1133. + */
  1134. +static const struct pci_device_id smtcfb_pci_table[] = {
  1135. + { PCI_DEVICE(0x126f, 0x710), },
  1136. + { PCI_DEVICE(0x126f, 0x712), },
  1137. + { PCI_DEVICE(0x126f, 0x720), },
  1138. + {0,}
  1139. +};
  1140. +
  1141. +static void smtcfb_pci_remove(struct pci_dev *pdev)
  1142. +{
  1143. + struct smtcfb_info *sfb;
  1144. +
  1145. + sfb = pci_get_drvdata(pdev);
  1146. + smtc_unmap_smem(sfb);
  1147. + smtc_unmap_mmio(sfb);
  1148. + unregister_framebuffer(&sfb->fb);
  1149. + smtc_free_fb_info(sfb);
  1150. +}
  1151. +
  1152. +#ifdef CONFIG_PM
  1153. +static int smtcfb_pci_suspend(struct device *device)
  1154. +{
  1155. + struct pci_dev *pdev = to_pci_dev(device);
  1156. + struct smtcfb_info *sfb;
  1157. +
  1158. + sfb = pci_get_drvdata(pdev);
  1159. +
  1160. + /* set the hw in sleep mode use external clock and self memory refresh
  1161. + * so that we can turn off internal PLLs later on
  1162. + */
  1163. + smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
  1164. + smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
  1165. +
  1166. + console_lock();
  1167. + fb_set_suspend(&sfb->fb, 1);
  1168. + console_unlock();
  1169. +
  1170. + /* additionally turn off all function blocks including internal PLLs */
  1171. + smtc_seqw(0x21, 0xff);
  1172. +
  1173. + return 0;
  1174. +}
  1175. +
  1176. +static int smtcfb_pci_resume(struct device *device)
  1177. +{
  1178. + struct pci_dev *pdev = to_pci_dev(device);
  1179. + struct smtcfb_info *sfb;
  1180. +
  1181. + sfb = pci_get_drvdata(pdev);
  1182. +
  1183. + /* reinit hardware */
  1184. + sm7xx_init_hw();
  1185. + switch (sfb->chip_id) {
  1186. + case 0x710:
  1187. + case 0x712:
  1188. + /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1189. + smtc_seqw(0x6a, 0x16);
  1190. + smtc_seqw(0x6b, 0x02);
  1191. + smtc_seqw(0x62, 0x3e);
  1192. + /* enable PCI burst */
  1193. + smtc_seqw(0x17, 0x20);
  1194. +#ifdef __BIG_ENDIAN
  1195. + if (sfb->fb.var.bits_per_pixel == 32)
  1196. + smtc_seqw(0x17, 0x30);
  1197. +#endif
  1198. + break;
  1199. + case 0x720:
  1200. + smtc_seqw(0x62, 0xff);
  1201. + smtc_seqw(0x6a, 0x0d);
  1202. + smtc_seqw(0x6b, 0x02);
  1203. + break;
  1204. + }
  1205. +
  1206. + smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
  1207. + smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
  1208. +
  1209. + smtcfb_setmode(sfb);
  1210. +
  1211. + console_lock();
  1212. + fb_set_suspend(&sfb->fb, 0);
  1213. + console_unlock();
  1214. +
  1215. + return 0;
  1216. +}
  1217. +
  1218. +static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
  1219. +#define SM7XX_PM_OPS (&sm7xx_pm_ops)
  1220. +
  1221. +#else /* !CONFIG_PM */
  1222. +
  1223. +#define SM7XX_PM_OPS NULL
  1224. +
  1225. +#endif /* !CONFIG_PM */
  1226. +
  1227. +static struct pci_driver smtcfb_driver = {
  1228. + .name = "smtcfb",
  1229. + .id_table = smtcfb_pci_table,
  1230. + .probe = smtcfb_pci_probe,
  1231. + .remove = smtcfb_pci_remove,
  1232. + .driver.pm = SM7XX_PM_OPS,
  1233. +};
  1234. +
  1235. +module_pci_driver(smtcfb_driver);
  1236. +
  1237. +MODULE_AUTHOR("Siliconmotion ");
  1238. +MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
  1239. +MODULE_LICENSE("GPL");
  1240. diff -Nur linux-3.18.12.orig/drivers/staging/sm7xxfb/sm7xx.h linux-3.18.12/drivers/staging/sm7xxfb/sm7xx.h
  1241. --- linux-3.18.12.orig/drivers/staging/sm7xxfb/sm7xx.h 1969-12-31 18:00:00.000000000 -0600
  1242. +++ linux-3.18.12/drivers/staging/sm7xxfb/sm7xx.h 2015-05-02 10:04:55.627427001 -0500
  1243. @@ -0,0 +1,779 @@
  1244. +/*
  1245. + * Silicon Motion SM712 frame buffer device
  1246. + *
  1247. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  1248. + * Authors: Ge Wang, gewang@siliconmotion.com
  1249. + * Boyod boyod.yang@siliconmotion.com.cn
  1250. + *
  1251. + * Copyright (C) 2009 Lemote, Inc.
  1252. + * Author: Wu Zhangjin, wuzhangjin@gmail.com
  1253. + *
  1254. + * This file is subject to the terms and conditions of the GNU General Public
  1255. + * License. See the file COPYING in the main directory of this archive for
  1256. + * more details.
  1257. + */
  1258. +
  1259. +#define NR_PALETTE 256
  1260. +
  1261. +#define FB_ACCEL_SMI_LYNX 88
  1262. +
  1263. +#define SCREEN_X_RES 1024
  1264. +#define SCREEN_Y_RES 600
  1265. +#define SCREEN_BPP 16
  1266. +
  1267. +/*Assume SM712 graphics chip has 4MB VRAM */
  1268. +#define SM712_VIDEOMEMORYSIZE 0x00400000
  1269. +/*Assume SM722 graphics chip has 8MB VRAM */
  1270. +#define SM722_VIDEOMEMORYSIZE 0x00800000
  1271. +
  1272. +#define dac_reg (0x3c8)
  1273. +#define dac_val (0x3c9)
  1274. +
  1275. +extern void __iomem *smtc_RegBaseAddress;
  1276. +#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
  1277. +#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
  1278. +#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
  1279. +
  1280. +#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
  1281. +#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
  1282. +#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
  1283. +
  1284. +#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
  1285. +#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
  1286. +#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
  1287. +#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
  1288. +#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
  1289. +#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
  1290. +#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
  1291. +#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
  1292. +#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
  1293. +#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
  1294. +#define SIZE_VPR (0x6C + 1)
  1295. +#define SIZE_DPR (0x44 + 1)
  1296. +
  1297. +static inline void smtc_crtcw(int reg, int val)
  1298. +{
  1299. + smtc_mmiowb(reg, 0x3d4);
  1300. + smtc_mmiowb(val, 0x3d5);
  1301. +}
  1302. +
  1303. +static inline unsigned int smtc_crtcr(int reg)
  1304. +{
  1305. + smtc_mmiowb(reg, 0x3d4);
  1306. + return smtc_mmiorb(0x3d5);
  1307. +}
  1308. +
  1309. +static inline void smtc_grphw(int reg, int val)
  1310. +{
  1311. + smtc_mmiowb(reg, 0x3ce);
  1312. + smtc_mmiowb(val, 0x3cf);
  1313. +}
  1314. +
  1315. +static inline unsigned int smtc_grphr(int reg)
  1316. +{
  1317. + smtc_mmiowb(reg, 0x3ce);
  1318. + return smtc_mmiorb(0x3cf);
  1319. +}
  1320. +
  1321. +static inline void smtc_attrw(int reg, int val)
  1322. +{
  1323. + smtc_mmiorb(0x3da);
  1324. + smtc_mmiowb(reg, 0x3c0);
  1325. + smtc_mmiorb(0x3c1);
  1326. + smtc_mmiowb(val, 0x3c0);
  1327. +}
  1328. +
  1329. +static inline void smtc_seqw(int reg, int val)
  1330. +{
  1331. + smtc_mmiowb(reg, 0x3c4);
  1332. + smtc_mmiowb(val, 0x3c5);
  1333. +}
  1334. +
  1335. +static inline unsigned int smtc_seqr(int reg)
  1336. +{
  1337. + smtc_mmiowb(reg, 0x3c4);
  1338. + return smtc_mmiorb(0x3c5);
  1339. +}
  1340. +
  1341. +/* The next structure holds all information relevant for a specific video mode.
  1342. + */
  1343. +
  1344. +struct ModeInit {
  1345. + int mmSizeX;
  1346. + int mmSizeY;
  1347. + int bpp;
  1348. + int hz;
  1349. + unsigned char Init_MISC;
  1350. + unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
  1351. + unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
  1352. + unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
  1353. + unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
  1354. + unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
  1355. + unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
  1356. + unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
  1357. + unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
  1358. + unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
  1359. + unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
  1360. +};
  1361. +
  1362. +/**********************************************************************
  1363. + SM712 Mode table.
  1364. + **********************************************************************/
  1365. +struct ModeInit VGAMode[] = {
  1366. + {
  1367. + /* mode#0: 640 x 480 16Bpp 60Hz */
  1368. + 640, 480, 16, 60,
  1369. + /* Init_MISC */
  1370. + 0xE3,
  1371. + { /* Init_SR0_SR4 */
  1372. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1373. + },
  1374. + { /* Init_SR10_SR24 */
  1375. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1376. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1377. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1378. + },
  1379. + { /* Init_SR30_SR75 */
  1380. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1381. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1382. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1383. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1384. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1385. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1386. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1387. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1388. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1389. + },
  1390. + { /* Init_SR80_SR93 */
  1391. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1392. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1393. + 0x00, 0x00, 0x00, 0x00,
  1394. + },
  1395. + { /* Init_SRA0_SRAF */
  1396. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1397. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1398. + },
  1399. + { /* Init_GR00_GR08 */
  1400. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1401. + 0xFF,
  1402. + },
  1403. + { /* Init_AR00_AR14 */
  1404. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1405. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1406. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1407. + },
  1408. + { /* Init_CR00_CR18 */
  1409. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1410. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1411. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1412. + 0xFF,
  1413. + },
  1414. + { /* Init_CR30_CR4D */
  1415. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1416. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1417. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1418. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1419. + },
  1420. + { /* Init_CR90_CRA7 */
  1421. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1422. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1423. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1424. + },
  1425. + },
  1426. + {
  1427. + /* mode#1: 640 x 480 24Bpp 60Hz */
  1428. + 640, 480, 24, 60,
  1429. + /* Init_MISC */
  1430. + 0xE3,
  1431. + { /* Init_SR0_SR4 */
  1432. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1433. + },
  1434. + { /* Init_SR10_SR24 */
  1435. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1436. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1437. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1438. + },
  1439. + { /* Init_SR30_SR75 */
  1440. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1441. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1442. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1443. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1444. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1445. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1446. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1447. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1448. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1449. + },
  1450. + { /* Init_SR80_SR93 */
  1451. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1452. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1453. + 0x00, 0x00, 0x00, 0x00,
  1454. + },
  1455. + { /* Init_SRA0_SRAF */
  1456. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1457. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1458. + },
  1459. + { /* Init_GR00_GR08 */
  1460. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1461. + 0xFF,
  1462. + },
  1463. + { /* Init_AR00_AR14 */
  1464. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1465. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1466. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1467. + },
  1468. + { /* Init_CR00_CR18 */
  1469. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1470. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1471. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1472. + 0xFF,
  1473. + },
  1474. + { /* Init_CR30_CR4D */
  1475. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1476. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1477. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1478. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1479. + },
  1480. + { /* Init_CR90_CRA7 */
  1481. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1482. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1483. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1484. + },
  1485. + },
  1486. + {
  1487. + /* mode#0: 640 x 480 32Bpp 60Hz */
  1488. + 640, 480, 32, 60,
  1489. + /* Init_MISC */
  1490. + 0xE3,
  1491. + { /* Init_SR0_SR4 */
  1492. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1493. + },
  1494. + { /* Init_SR10_SR24 */
  1495. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1496. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1497. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1498. + },
  1499. + { /* Init_SR30_SR75 */
  1500. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  1501. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  1502. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1503. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  1504. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  1505. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  1506. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1507. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  1508. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  1509. + },
  1510. + { /* Init_SR80_SR93 */
  1511. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  1512. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  1513. + 0x00, 0x00, 0x00, 0x00,
  1514. + },
  1515. + { /* Init_SRA0_SRAF */
  1516. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1517. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  1518. + },
  1519. + { /* Init_GR00_GR08 */
  1520. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1521. + 0xFF,
  1522. + },
  1523. + { /* Init_AR00_AR14 */
  1524. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1525. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1526. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1527. + },
  1528. + { /* Init_CR00_CR18 */
  1529. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  1530. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1531. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  1532. + 0xFF,
  1533. + },
  1534. + { /* Init_CR30_CR4D */
  1535. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  1536. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  1537. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  1538. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  1539. + },
  1540. + { /* Init_CR90_CRA7 */
  1541. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  1542. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  1543. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  1544. + },
  1545. + },
  1546. +
  1547. + { /* mode#2: 800 x 600 16Bpp 60Hz */
  1548. + 800, 600, 16, 60,
  1549. + /* Init_MISC */
  1550. + 0x2B,
  1551. + { /* Init_SR0_SR4 */
  1552. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1553. + },
  1554. + { /* Init_SR10_SR24 */
  1555. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1556. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1557. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1558. + },
  1559. + { /* Init_SR30_SR75 */
  1560. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  1561. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  1562. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  1563. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  1564. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1565. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  1566. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1567. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1568. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  1569. + },
  1570. + { /* Init_SR80_SR93 */
  1571. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  1572. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  1573. + 0x00, 0x00, 0x00, 0x00,
  1574. + },
  1575. + { /* Init_SRA0_SRAF */
  1576. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1577. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1578. + },
  1579. + { /* Init_GR00_GR08 */
  1580. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1581. + 0xFF,
  1582. + },
  1583. + { /* Init_AR00_AR14 */
  1584. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1585. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1586. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1587. + },
  1588. + { /* Init_CR00_CR18 */
  1589. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1590. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1591. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1592. + 0xFF,
  1593. + },
  1594. + { /* Init_CR30_CR4D */
  1595. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1596. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1597. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1598. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1599. + },
  1600. + { /* Init_CR90_CRA7 */
  1601. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1602. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1603. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1604. + },
  1605. + },
  1606. + { /* mode#3: 800 x 600 24Bpp 60Hz */
  1607. + 800, 600, 24, 60,
  1608. + 0x2B,
  1609. + { /* Init_SR0_SR4 */
  1610. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1611. + },
  1612. + { /* Init_SR10_SR24 */
  1613. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1614. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1615. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1616. + },
  1617. + { /* Init_SR30_SR75 */
  1618. + 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
  1619. + 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
  1620. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1621. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
  1622. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1623. + 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
  1624. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1625. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1626. + 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
  1627. + },
  1628. + { /* Init_SR80_SR93 */
  1629. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
  1630. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
  1631. + 0x00, 0x00, 0x00, 0x00,
  1632. + },
  1633. + { /* Init_SRA0_SRAF */
  1634. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1635. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1636. + },
  1637. + { /* Init_GR00_GR08 */
  1638. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1639. + 0xFF,
  1640. + },
  1641. + { /* Init_AR00_AR14 */
  1642. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1643. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1644. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1645. + },
  1646. + { /* Init_CR00_CR18 */
  1647. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1648. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1649. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1650. + 0xFF,
  1651. + },
  1652. + { /* Init_CR30_CR4D */
  1653. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1654. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1655. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1656. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1657. + },
  1658. + { /* Init_CR90_CRA7 */
  1659. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1660. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1661. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1662. + },
  1663. + },
  1664. + { /* mode#7: 800 x 600 32Bpp 60Hz */
  1665. + 800, 600, 32, 60,
  1666. + /* Init_MISC */
  1667. + 0x2B,
  1668. + { /* Init_SR0_SR4 */
  1669. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1670. + },
  1671. + { /* Init_SR10_SR24 */
  1672. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  1673. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1674. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1675. + },
  1676. + { /* Init_SR30_SR75 */
  1677. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  1678. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  1679. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  1680. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  1681. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  1682. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  1683. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1684. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  1685. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  1686. + },
  1687. + { /* Init_SR80_SR93 */
  1688. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  1689. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  1690. + 0x00, 0x00, 0x00, 0x00,
  1691. + },
  1692. + { /* Init_SRA0_SRAF */
  1693. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  1694. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  1695. + },
  1696. + { /* Init_GR00_GR08 */
  1697. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1698. + 0xFF,
  1699. + },
  1700. + { /* Init_AR00_AR14 */
  1701. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1702. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1703. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1704. + },
  1705. + { /* Init_CR00_CR18 */
  1706. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  1707. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1708. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  1709. + 0xFF,
  1710. + },
  1711. + { /* Init_CR30_CR4D */
  1712. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  1713. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  1714. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  1715. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  1716. + },
  1717. + { /* Init_CR90_CRA7 */
  1718. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  1719. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  1720. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  1721. + },
  1722. + },
  1723. + /* We use 1024x768 table to light 1024x600 panel for lemote */
  1724. + { /* mode#4: 1024 x 600 16Bpp 60Hz */
  1725. + 1024, 600, 16, 60,
  1726. + /* Init_MISC */
  1727. + 0xEB,
  1728. + { /* Init_SR0_SR4 */
  1729. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  1730. + },
  1731. + { /* Init_SR10_SR24 */
  1732. + 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
  1733. + 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1734. + 0xC4, 0x30, 0x02, 0x00, 0x01,
  1735. + },
  1736. + { /* Init_SR30_SR75 */
  1737. + 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
  1738. + 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
  1739. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1740. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
  1741. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1742. + 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
  1743. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1744. + 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
  1745. + 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
  1746. + },
  1747. + { /* Init_SR80_SR93 */
  1748. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1749. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1750. + 0x00, 0x00, 0x00, 0x00,
  1751. + },
  1752. + { /* Init_SRA0_SRAF */
  1753. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1754. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1755. + },
  1756. + { /* Init_GR00_GR08 */
  1757. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1758. + 0xFF,
  1759. + },
  1760. + { /* Init_AR00_AR14 */
  1761. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1762. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1763. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1764. + },
  1765. + { /* Init_CR00_CR18 */
  1766. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1767. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1768. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1769. + 0xFF,
  1770. + },
  1771. + { /* Init_CR30_CR4D */
  1772. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1773. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1774. + 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
  1775. + 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
  1776. + },
  1777. + { /* Init_CR90_CRA7 */
  1778. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1779. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1780. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1781. + },
  1782. + },
  1783. + { /* mode#5: 1024 x 768 24Bpp 60Hz */
  1784. + 1024, 768, 24, 60,
  1785. + /* Init_MISC */
  1786. + 0xEB,
  1787. + { /* Init_SR0_SR4 */
  1788. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1789. + },
  1790. + { /* Init_SR10_SR24 */
  1791. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1792. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1793. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  1794. + },
  1795. + { /* Init_SR30_SR75 */
  1796. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1797. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1798. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1799. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1800. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1801. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1802. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1803. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  1804. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1805. + },
  1806. + { /* Init_SR80_SR93 */
  1807. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1808. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1809. + 0x00, 0x00, 0x00, 0x00,
  1810. + },
  1811. + { /* Init_SRA0_SRAF */
  1812. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1813. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1814. + },
  1815. + { /* Init_GR00_GR08 */
  1816. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1817. + 0xFF,
  1818. + },
  1819. + { /* Init_AR00_AR14 */
  1820. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1821. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1822. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1823. + },
  1824. + { /* Init_CR00_CR18 */
  1825. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1826. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1827. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1828. + 0xFF,
  1829. + },
  1830. + { /* Init_CR30_CR4D */
  1831. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1832. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1833. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  1834. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  1835. + },
  1836. + { /* Init_CR90_CRA7 */
  1837. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1838. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1839. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1840. + },
  1841. + },
  1842. + { /* mode#4: 1024 x 768 32Bpp 60Hz */
  1843. + 1024, 768, 32, 60,
  1844. + /* Init_MISC */
  1845. + 0xEB,
  1846. + { /* Init_SR0_SR4 */
  1847. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1848. + },
  1849. + { /* Init_SR10_SR24 */
  1850. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1851. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1852. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1853. + },
  1854. + { /* Init_SR30_SR75 */
  1855. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1856. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1857. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1858. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1859. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1860. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1861. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1862. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  1863. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1864. + },
  1865. + { /* Init_SR80_SR93 */
  1866. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1867. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1868. + 0x00, 0x00, 0x00, 0x00,
  1869. + },
  1870. + { /* Init_SRA0_SRAF */
  1871. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1872. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1873. + },
  1874. + { /* Init_GR00_GR08 */
  1875. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1876. + 0xFF,
  1877. + },
  1878. + { /* Init_AR00_AR14 */
  1879. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1880. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1881. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1882. + },
  1883. + { /* Init_CR00_CR18 */
  1884. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1885. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1886. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1887. + 0xFF,
  1888. + },
  1889. + { /* Init_CR30_CR4D */
  1890. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1891. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1892. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  1893. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  1894. + },
  1895. + { /* Init_CR90_CRA7 */
  1896. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1897. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1898. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1899. + },
  1900. + },
  1901. + { /* mode#6: 320 x 240 16Bpp 60Hz */
  1902. + 320, 240, 16, 60,
  1903. + /* Init_MISC */
  1904. + 0xEB,
  1905. + { /* Init_SR0_SR4 */
  1906. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1907. + },
  1908. + { /* Init_SR10_SR24 */
  1909. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1910. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1911. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1912. + },
  1913. + { /* Init_SR30_SR75 */
  1914. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1915. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1916. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1917. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1918. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1919. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1920. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1921. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  1922. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1923. + },
  1924. + { /* Init_SR80_SR93 */
  1925. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1926. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1927. + 0x00, 0x00, 0x00, 0x00,
  1928. + },
  1929. + { /* Init_SRA0_SRAF */
  1930. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1931. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1932. + },
  1933. + { /* Init_GR00_GR08 */
  1934. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1935. + 0xFF,
  1936. + },
  1937. + { /* Init_AR00_AR14 */
  1938. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1939. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  1940. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  1941. + },
  1942. + { /* Init_CR00_CR18 */
  1943. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  1944. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  1945. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  1946. + 0xFF,
  1947. + },
  1948. + { /* Init_CR30_CR4D */
  1949. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  1950. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  1951. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  1952. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  1953. + },
  1954. + { /* Init_CR90_CRA7 */
  1955. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  1956. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  1957. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  1958. + },
  1959. + },
  1960. +
  1961. + { /* mode#8: 320 x 240 32Bpp 60Hz */
  1962. + 320, 240, 32, 60,
  1963. + /* Init_MISC */
  1964. + 0xEB,
  1965. + { /* Init_SR0_SR4 */
  1966. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  1967. + },
  1968. + { /* Init_SR10_SR24 */
  1969. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  1970. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  1971. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  1972. + },
  1973. + { /* Init_SR30_SR75 */
  1974. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  1975. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  1976. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  1977. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  1978. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  1979. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  1980. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  1981. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  1982. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  1983. + },
  1984. + { /* Init_SR80_SR93 */
  1985. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  1986. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  1987. + 0x00, 0x00, 0x00, 0x00,
  1988. + },
  1989. + { /* Init_SRA0_SRAF */
  1990. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  1991. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  1992. + },
  1993. + { /* Init_GR00_GR08 */
  1994. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  1995. + 0xFF,
  1996. + },
  1997. + { /* Init_AR00_AR14 */
  1998. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  1999. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  2000. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  2001. + },
  2002. + { /* Init_CR00_CR18 */
  2003. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  2004. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  2005. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  2006. + 0xFF,
  2007. + },
  2008. + { /* Init_CR30_CR4D */
  2009. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  2010. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  2011. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  2012. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  2013. + },
  2014. + { /* Init_CR90_CRA7 */
  2015. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  2016. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  2017. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  2018. + },
  2019. + },
  2020. +};
  2021. +
  2022. +#define numVGAModes ARRAY_SIZE(VGAMode)
  2023. diff -Nur linux-3.18.12.orig/drivers/staging/sm7xxfb/TODO linux-3.18.12/drivers/staging/sm7xxfb/TODO
  2024. --- linux-3.18.12.orig/drivers/staging/sm7xxfb/TODO 1969-12-31 18:00:00.000000000 -0600
  2025. +++ linux-3.18.12/drivers/staging/sm7xxfb/TODO 2015-05-02 10:04:55.627427001 -0500
  2026. @@ -0,0 +1,9 @@
  2027. +TODO:
  2028. +- Dual head support
  2029. +- 2D acceleration support
  2030. +- use kernel coding style
  2031. +- refine the code and remove unused code
  2032. +- move it to drivers/video/sm7xxfb.c
  2033. +
  2034. +Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
  2035. +Teddy Wang <teddy.wang@siliconmotion.com.cn>.
  2036. diff -Nur linux-3.18.12.orig/drivers/video/fbdev/core/fbmem.c linux-3.18.12/drivers/video/fbdev/core/fbmem.c
  2037. --- linux-3.18.12.orig/drivers/video/fbdev/core/fbmem.c 2015-04-20 14:48:02.000000000 -0500
  2038. +++ linux-3.18.12/drivers/video/fbdev/core/fbmem.c 2015-05-02 10:10:42.831427001 -0500
  2039. @@ -1251,15 +1251,6 @@
  2040. u16 reserved[3];
  2041. };
  2042. -struct fb_cmap32 {
  2043. - u32 start;
  2044. - u32 len;
  2045. - compat_caddr_t red;
  2046. - compat_caddr_t green;
  2047. - compat_caddr_t blue;
  2048. - compat_caddr_t transp;
  2049. -};
  2050. -
  2051. static int fb_getput_cmap(struct fb_info *info, unsigned int cmd,
  2052. unsigned long arg)
  2053. {