riscv32.patch 9.7 KB

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  1. # --- T2-COPYRIGHT-NOTE-BEGIN ---
  2. # T2 SDE: package/*/strace/riscv32.patch
  3. # Copyright (C) 2021 - 2022 The T2 SDE Project
  4. #
  5. # This Copyright note is generated by scripts/Create-CopyPatch,
  6. # more information can be found in the files COPYING and README.
  7. #
  8. # This patch file is dual-licensed. It is available under the license the
  9. # patched project is licensed under, as long as it is an OpenSource license
  10. # as defined at http://www.opensource.org/ (e.g. BSD, X11) or under the terms
  11. # of the GNU General Public License version 2 as used by the T2 SDE.
  12. # --- T2-COPYRIGHT-NOTE-END ---
  13. Signed-off-by: Alistair Francis <alistair.francis at wdc.com>
  14. ---
  15. Makefile.am | 20 ++++++++--------
  16. configure.ac | 6 ++++-
  17. dist/INSTALL | 2 +-
  18. src/linux/{riscv64 => riscv}/arch_defs_.h | 16 +++++++++++++
  19. src/linux/{riscv64 => riscv}/arch_regs.c | 0
  20. src/linux/riscv/asm_stat.h | 26 +++++++++++++++++++++
  21. src/linux/{riscv64 => riscv}/get_error.c | 0
  22. src/linux/{riscv64 => riscv}/get_scno.c | 0
  23. src/linux/{riscv64 => riscv}/get_syscall_args.c | 0
  24. src/linux/{riscv64 => riscv}/ioctls_arch0.h | 0
  25. src/linux/riscv/ioctls_inc0.h | 7 ++++++
  26. src/linux/{riscv64 => riscv}/raw_syscall.h | 0
  27. src/linux/{riscv64 => riscv}/set_error.c | 0
  28. src/linux/{riscv64 => riscv}/set_scno.c | 0
  29. src/linux/{riscv64 => riscv}/syscallent.h | 8 ++++++-
  30. src/linux/riscv64/ioctls_inc0.h | 1 -
  31. src/riscv.c | 4 ++--
  32. 17 files changed, 74 insertions(+), 16 deletions(-)
  33. create mode 100644 src/linux/riscv/arch_defs_.h
  34. rename src/linux/{riscv64 => src/riscv}/arch_regs.c (100%)
  35. create mode 100644 src/linux/riscv/asm_stat.h
  36. rename src/linux/{riscv64 => src/riscv}/get_error.c (100%)
  37. rename src/linux/{riscv64 => src/riscv}/get_scno.c (100%)
  38. rename src/linux/{riscv64 => src/riscv}/get_syscall_args.c (100%)
  39. rename src/linux/{riscv64 => src/riscv}/ioctls_arch0.h (100%)
  40. create mode 100644 src/linux/riscv/ioctls_inc0.h
  41. rename src/linux/{riscv64 => src/riscv}/raw_syscall.h (100%)
  42. rename src/linux/{riscv64 => src/riscv}/set_error.c (100%)
  43. rename src/linux/{riscv64 => src/riscv}/set_scno.c (100%)
  44. rename src/linux/{riscv64 => src/riscv}/syscallent.h (64%)
  45. delete mode 100644 src/linux/riscv64/ioctls_inc0.h
  46. diff --git a/Makefile.am b/Makefile.am
  47. index 9c62218f..4955654b 100644
  48. --- a/src/Makefile.am
  49. +++ b/src/Makefile.am
  50. @@ -802,19 +802,19 @@ extrA_DIST =
  51. linux/powerpc64le/set_scno.c \
  52. linux/powerpc64le/syscallent.h \
  53. linux/powerpc64le/userent.h \
  54. - linux/riscv64/arch_defs_.h \
  55. - linux/riscv64/arch_prstatus_regset.c \
  56. - linux/riscv64/arch_prstatus_regset.h \
  57. - linux/riscv64/arch_regs.c \
  58. - linux/riscv64/get_error.c \
  59. - linux/riscv64/get_scno.c \
  60. - linux/riscv64/get_syscall_args.c \
  61. - linux/riscv64/ioctls_arch0.h \
  62. - linux/riscv64/ioctls_inc0.h \
  63. - linux/riscv64/raw_syscall.h \
  64. - linux/riscv64/set_error.c \
  65. - linux/riscv64/set_scno.c \
  66. - linux/riscv64/syscallent.h \
  67. + linux/riscv/arch_defs_.h \
  68. + linux/riscv/arch_prstatus_regset.c \
  69. + linux/riscv/arch_prstatus_regset.h \
  70. + linux/riscv/arch_regs.c \
  71. + linux/riscv/get_error.c \
  72. + linux/riscv/get_scno.c \
  73. + linux/riscv/get_syscall_args.c \
  74. + linux/riscv/ioctls_arch0.h \
  75. + linux/riscv/ioctls_inc0.h \
  76. + linux/riscv/raw_syscall.h \
  77. + linux/riscv/set_error.c \
  78. + linux/riscv/set_scno.c \
  79. + linux/riscv/syscallent.h \
  80. linux/s390/arch_defs_.h \
  81. linux/s390/arch_prstatus_regset.c \
  82. linux/s390/arch_prstatus_regset.h \
  83. diff --git a/configure.ac b/configure.ac
  84. index dd4f13f4..4a53681c 100644
  85. --- a/configure.ac
  86. +++ b/configure.ac
  87. @@ -157,9 +157,12 @@
  88. esac
  89. fi
  90. ;;
  91. +riscv32*)
  92. + arch=riscv
  93. + AC_DEFINE([RISCV32], 1, [Define for the RISC-V 32-bit architecture])
  94. + ;;
  95. riscv64*)
  96. - arch=riscv64
  97. - karch=riscv
  98. + arch=riscv
  99. AC_DEFINE([RISCV64], 1, [Define for the RISC-V 64-bit architecture])
  100. ;;
  101. s390)
  102. diff --git a/dist/INSTALL b/dist/INSTALL
  103. index 0d22512b..19e059cf 100644
  104. --- a/INSTALL
  105. +++ b/INSTALL
  106. @@ -63,7 +63,7 @@ Taking the aforementioned into account, there are the following requirements:
  107. - gawk (at least version 3)
  108. - Ability to compile for m32 personality (on architectures where it is supported)
  109. - - On x86_64, x32, powerpc64, sparc64, riscv64, tile64: gcc -m32
  110. + - On x86_64, x32, powerpc64, sparc64, riscv32, riscv64, tile64: gcc -m32
  111. - s390x: gcc -m31
  112. - AArch64: a separate compiler for armv7 EABI
  113. - See information about configuration in "1.3.2. AArch64: AArch32 support"
  114. diff --git a/src/linux/riscv64/arch_defs_.h b/src/linux/riscv/arch_defs_.h
  115. similarity index 20%
  116. rename from src/linux/riscv64/arch_defs_.h
  117. rename to src/linux/riscv/arch_defs_.h
  118. index 0d22512b..19e059cf 100644
  119. --- a/src/linux/riscv64/arch_defs_.h
  120. +++ b/src/linux/riscv/arch_defs_.h
  121. @@ -1 +1,8 @@
  122. -#define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV64, 0 }
  123. +#if defined(RISCV32)
  124. +# define ARCH_TIMESIZE 64
  125. +# define HAVE_ARCH_TIME32_SYSCALLS 0
  126. +# define HAVE_ARCH_OLD_TIME64_SYSCALLS 0
  127. +# define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV32, 0 }
  128. +#else
  129. +# define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV64, 0 }
  130. +#endif
  131. diff --git a/src/linux/riscv64/arch_regs.c b/src/linux/riscv/arch_regs.c
  132. similarity index 100%
  133. rename from src/linux/riscv64/arch_regs.c
  134. rename to src/linux/riscv/arch_regs.c
  135. diff --git a/src/linux/riscv/asm_stat.h b/src/linux/riscv/asm_stat.h
  136. new file mode 100644
  137. index 00000000..73341454
  138. --- /dev/null
  139. +++ b/src/linux/riscv/asm_stat.h
  140. @@ -0,0 +1,26 @@
  141. +/*
  142. + * Copyright (c) 2020 The strace developers.
  143. + * All rights reserved.
  144. + *
  145. + * SPDX-License-Identifier: LGPL-2.1-or-later
  146. + */
  147. +
  148. +#ifndef STRACE_RISCV_ASM_STAT_H
  149. +# define STRACE_RISCV_ASM_STAT_H
  150. +
  151. +# include "linux/generic/asm_stat.h"
  152. +
  153. +# if defined(RISCV32)
  154. +# undef dev_t
  155. +# undef ino_t
  156. +# undef off64_t
  157. +# undef off_t
  158. +# undef time_t
  159. +
  160. +# define dev_t __kernel_loff_t
  161. +# define ino_t __kernel_loff_t
  162. +# define off64_t __kernel_off64_t
  163. +# define off_t __kernel_off64_t
  164. +# define time_t __kernel_time64_t
  165. +# endif /* defined(RISCV32) */
  166. +#endif /* !STRACE_RISCV_ASM_STAT_H */
  167. diff --git a/src/linux/riscv64/arch_prstatus_regset.h b/src/linux/riscv/arch_prstatus_regset.h
  168. similarity index 100%
  169. rename from src/linux/riscv64/arch_prstatus_regset.h
  170. rename to src/linux/riscv/arch_prstatus_regset.h
  171. diff --git a/src/linux/riscv64/arch_prstatus_regset.c b/src/linux/riscv/arch_prstatus_regset.c
  172. similarity index 100%
  173. rename from src/linux/riscv64/arch_prstatus_regset.c
  174. rename to src/linux/riscv/arch_prstatus_regset.c
  175. diff --git a/src/linux/riscv64/get_error.c b/src/linux/riscv/get_error.c
  176. similarity index 100%
  177. rename from src/linux/riscv64/get_error.c
  178. rename to src/linux/riscv/get_error.c
  179. diff --git a/src/linux/riscv64/get_scno.c b/src/linux/riscv/get_scno.c
  180. similarity index 100%
  181. rename from src/linux/riscv64/get_scno.c
  182. rename to src/linux/riscv/get_scno.c
  183. diff --git a/src/linux/riscv64/get_syscall_args.c b/src/linux/riscv/get_syscall_args.c
  184. similarity index 100%
  185. rename from src/linux/riscv64/get_syscall_args.c
  186. rename to src/linux/riscv/get_syscall_args.c
  187. diff --git a/src/linux/riscv64/ioctls_arch0.h b/src/linux/riscv/ioctls_arch0.h
  188. similarity index 100%
  189. rename from src/linux/riscv64/ioctls_arch0.h
  190. rename to src/linux/riscv/ioctls_arch0.h
  191. diff --git a/src/linux/riscv/ioctls_inc0.h b/src/linux/riscv/ioctls_inc0.h
  192. new file mode 100644
  193. index 00000000..cc39332f
  194. --- /dev/null
  195. +++ b/src/linux/riscv/ioctls_inc0.h
  196. @@ -0,0 +1,7 @@
  197. +#if defined(RISCV64)
  198. +# include "../64/ioctls_inc.h"
  199. +#elif defined(RISCV32)
  200. +# include "../32/ioctls_inc.h"
  201. +#else
  202. +# error "Unsupported RISC-V xlen"
  203. +#endif
  204. diff --git a/src/linux/riscv64/raw_syscall.h b/src/linux/riscv/raw_syscall.h
  205. similarity index 100%
  206. rename from src/linux/riscv64/raw_syscall.h
  207. rename to src/linux/riscv/raw_syscall.h
  208. diff --git a/src/linux/riscv64/set_error.c b/src/linux/riscv/set_error.c
  209. similarity index 100%
  210. rename from src/linux/riscv64/set_error.c
  211. rename to src/linux/riscv/set_error.c
  212. diff --git a/src/linux/riscv64/set_scno.c b/src/linux/riscv/set_scno.c
  213. similarity index 100%
  214. rename from src/linux/riscv64/set_scno.c
  215. rename to src/linux/riscv/set_scno.c
  216. diff --git a/src/linux/riscv64/syscallent.h b/src/linux/riscv/syscallent.h
  217. similarity index 64%
  218. rename from src/linux/riscv64/syscallent.h
  219. rename to src/linux/riscv/syscallent.h
  220. index 60c6ce58..c8fb3b8f 100644
  221. --- a/src/linux/riscv64/syscallent.h
  222. +++ b/src/linux/riscv/syscallent.h
  223. @@ -5,7 +5,13 @@
  224. * SPDX-License-Identifier: LGPL-2.1-or-later
  225. */
  226. -#include "../64/syscallent.h"
  227. +#if defined(RISCV64)
  228. +# include "../64/syscallent.h"
  229. +#elif defined(RISCV32)
  230. +# include "../32/syscallent.h"
  231. +#else
  232. +# error "Unsupported RISC-V xlen"
  233. +#endif
  234. /* #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) */
  235. [259] = { 3, TM, SEN(riscv_flush_icache), "riscv_flush_icache" },
  236. diff --git a/src/linux/riscv64/ioctls_inc0.h b/src/linux/riscv64/ioctls_inc0.h
  237. deleted file mode 100644
  238. index f9939faa..00000000
  239. --- a/src/linux/riscv64/ioctls_inc0.h
  240. +++ /dev/null
  241. @@ -1 +0,0 @@
  242. -#include "../64/ioctls_inc.h"
  243. diff --git a/riscv.c b/riscv.c
  244. index 825eb293..20094ba5 100644
  245. --- a/src/riscv.c
  246. +++ b/src/riscv.c
  247. @@ -9,7 +9,7 @@
  248. #include "defs.h"
  249. -#ifdef RISCV64
  250. +#if defined(RISCV64) || defined(RISCV32)
  251. # include "xlat/riscv_flush_icache_flags.h"
  252. @@ -30,4 +30,4 @@ SYS_FUNC(riscv_flush_icache)
  253. return RVAL_DECODED;
  254. }
  255. -#endif /* RISCV64 */
  256. +#endif /* defined(RISCV64) || defined(RISCV32) */
  257. --
  258. 2.25.0
  259. --- strace-5.10/src/config.h.in.vanilla 2021-02-13 16:11:28.950662094 +0100
  260. +++ strace-5.10/src/config.h.in 2021-02-13 16:12:01.681663752 +0100
  261. @@ -3776,6 +3779,9 @@
  262. /* Define for the little endian PowerPC64 architecture. */
  263. #undef POWERPC64LE
  264. +/* Define for the RISC-V 32-bit architecture */
  265. +#undef RISCV32
  266. +
  267. /* Define for the RISC-V 64-bit architecture */
  268. #undef RISCV64