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- From 6df2a016c0c8a3d0933ef33dd192ea6606b115e3 Mon Sep 17 00:00:00 2001
- From: Aurelien Jarno <aurelien@aurel32.net>
- Date: Wed, 26 Jan 2022 18:14:42 +0100
- Subject: riscv: fix build with binutils 2.38
- From version 2.38, binutils default to ISA spec version 20191213. This
- means that the csr read/write (csrr*/csrw*) instructions and fence.i
- instruction has separated from the `I` extension, become two standalone
- extensions: Zicsr and Zifencei. As the kernel uses those instruction,
- this causes the following build failure:
- CC arch/riscv/kernel/vdso/vgettimeofday.o
- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages:
- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
- The fix is to specify those extensions explicitely in -march. However as
- older binutils version do not support this, we first need to detect
- that.
- Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
- Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
- Cc: stable@vger.kernel.org
- Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
- ---
- arch/riscv/Makefile | 6 ++++++
- 1 file changed, 6 insertions(+)
- (limited to 'arch/riscv')
- diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
- index 8a107ed18b0dc..7d81102cffd48 100644
- --- a/arch/riscv/Makefile
- +++ b/arch/riscv/Makefile
- @@ -50,6 +50,12 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
- riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
- riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
- riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
- +
- +# Newer binutils versions default to ISA spec version 20191213 which moves some
- +# instructions from the I extension to the Zicsr and Zifencei extensions.
- +toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
- +riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
- +
- KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
- KBUILD_AFLAGS += -march=$(riscv-march-y)
-
- --
- cgit
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