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Patch from Atsushi Nemoto (with some additions):

Current uClibc contains only one fpu_control.h and it is i386 version.
This is a patch to use platform specific fpu_control.h.  All new files
come from glibc 2.3.2.  This patch is against 0.9.21 but also can be
applied to CVS as is.
Eric Andersen 20 năm trước cách đây
mục cha
commit
027d12aeef

+ 1 - 0
libc/sysdeps/linux/alpha/Makefile

@@ -54,6 +54,7 @@ $(COBJS): %.o : %.c
 	$(STRIPTOOL) -x -R .note -R .comment $*.o
 
 headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/alpha/fpu_control.h .
 
 
 clean:

+ 106 - 0
libc/sysdeps/linux/alpha/fpu_control.h

@@ -0,0 +1,106 @@
+/* FPU control word bits.  Alpha-mapped-to-Intel version.
+   Copyright (C) 1996, 1998, 2000, 2002 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Olaf Flebbe.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _ALPHA_FPU_CONTROL_H
+#define _ALPHA_FPU_CONTROL_H
+
+/*
+ * Since many programs seem to hardcode the values passed to __setfpucw()
+ * (rather than using the manifest constants) we emulate the x87 interface
+ * here (at least where this makes sense).
+ *
+ *     15-13    12  11-10  9-8     7-6     5    4    3    2    1    0
+ * | reserved | IC | RC  | PC | reserved | PM | UM | OM | ZM | DM | IM
+ *
+ * IM: Invalid operation mask
+ * DM: Denormalized operand mask
+ * ZM: Zero-divide mask
+ * OM: Overflow mask
+ * UM: Underflow mask
+ * PM: Precision (inexact result) mask
+ *
+ * Mask bit is 1 means no interrupt.
+ *
+ * PC: Precision control
+ * 11 - round to extended precision
+ * 10 - round to double precision
+ * 00 - round to single precision
+ *
+ * RC: Rounding control
+ * 00 - rounding to nearest
+ * 01 - rounding down (toward - infinity)
+ * 10 - rounding up (toward + infinity)
+ * 11 - rounding toward zero
+ *
+ * IC: Infinity control
+ * That is for 8087 and 80287 only.
+ *
+ * The hardware default is 0x037f. I choose 0x1372.
+ */
+
+#include <features.h>
+
+/* masking of interrupts */
+#define _FPU_MASK_IM  0x01
+#define _FPU_MASK_DM  0x02
+#define _FPU_MASK_ZM  0x04
+#define _FPU_MASK_OM  0x08
+#define _FPU_MASK_UM  0x10
+#define _FPU_MASK_PM  0x20
+
+/* precision control -- without effect on Alpha */
+#define _FPU_EXTENDED 0x300   /* RECOMMENDED */
+#define _FPU_DOUBLE   0x200
+#define _FPU_SINGLE   0x0     /* DO NOT USE */
+
+/*
+ * rounding control---notice that on the Alpha this affects only
+ * instructions with the dynamic rounding mode qualifier (/d).
+ */
+#define _FPU_RC_NEAREST 0x000 /* RECOMMENDED */
+#define _FPU_RC_DOWN    0x400
+#define _FPU_RC_UP      0x800
+#define _FPU_RC_ZERO    0xC00
+
+#define _FPU_RESERVED 0xF0C0  /* Reserved bits in cw */
+
+
+/* Now two recommended cw */
+
+/* Linux default:
+     - extended precision
+     - rounding to positive infinity.  There is no /p instruction
+       qualifier.  By setting the dynamic rounding mode to +infinity,
+       one can use /d to get round to +infinity with no extra overhead
+       (so long as the default isn't changed, of course...)
+     - no exceptions enabled.  */
+
+#define _FPU_DEFAULT  0x137f
+
+/* IEEE:  same as above. */
+#define _FPU_IEEE     0x137f
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t;
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif	/* _ALPHA_FPU_CONTROL */

+ 1 - 0
libc/sysdeps/linux/arm/Makefile

@@ -62,6 +62,7 @@ gcrt1.o: $(CRT0_DEPS)
 endif
 
 headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/arm/fpu_control.h .
 
 
 clean:

+ 102 - 0
libc/sysdeps/linux/arm/fpu_control.h

@@ -0,0 +1,102 @@
+/* FPU control word definitions.  ARM version.
+   Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* We have a slight terminology confusion here.  On the ARM, the register
+ * we're interested in is actually the FPU status word - the FPU control
+ * word is something different (which is implementation-defined and only
+ * accessible from supervisor mode.)
+ *
+ * The FPSR looks like this:
+ *
+ *     31-24        23-16          15-8              7-0
+ * | system ID | trap enable | system control | exception flags |
+ *
+ * We ignore the system ID bits; for interest's sake they are:
+ *
+ *  0000	"old" FPE
+ *  1000	FPPC hardware
+ *  0001	FPE 400
+ *  1001	FPA hardware
+ *
+ * The trap enable and exception flags are both structured like this:
+ *
+ *     7 - 5     4     3     2     1     0
+ * | reserved | INX | UFL | OFL | DVZ | IVO |
+ *
+ * where a `1' bit in the enable byte means that the trap can occur, and
+ * a `1' bit in the flags byte means the exception has occurred.
+ *
+ * The exceptions are:
+ *
+ *  IVO - invalid operation
+ *  DVZ - divide by zero
+ *  OFL - overflow
+ *  UFL - underflow
+ *  INX - inexact (do not use; implementations differ)
+ *
+ * The system control byte looks like this:
+ *
+ *     7-5      4    3    2    1    0
+ * | reserved | AC | EP | SO | NE | ND |
+ *
+ * where the bits mean
+ *
+ *  ND - no denormalised numbers (force them all to zero)
+ *  NE - enable NaN exceptions
+ *  SO - synchronous operation
+ *  EP - use expanded packed-decimal format
+ *  AC - use alternate definition for C flag on compare operations
+ */
+
+/* masking of interrupts */
+#define _FPU_MASK_IM	0x00010000	/* invalid operation */
+#define _FPU_MASK_ZM	0x00020000	/* divide by zero */
+#define _FPU_MASK_OM	0x00040000	/* overflow */
+#define _FPU_MASK_UM	0x00080000	/* underflow */
+#define _FPU_MASK_PM	0x00100000	/* inexact */
+#define _FPU_MASK_DM	0x00000000	/* denormalized operation */
+
+/* The system id bytes cannot be changed.
+   Only the bottom 5 bits in the trap enable byte can be changed.
+   Only the bottom 5 bits in the system control byte can be changed.
+   Only the bottom 5 bits in the exception flags are used.
+   The exception flags are set by the fpu, but can be zeroed by the user. */
+#define _FPU_RESERVED	0xffe0e0e0	/* These bits are reserved.  */
+
+/* The fdlibm code requires strict IEEE double precision arithmetic,
+   no interrupts for exceptions, rounding to nearest.  Changing the
+   rounding mode will break long double I/O.  Turn on the AC bit,
+   the compiler generates code that assumes it is on.  */
+#define _FPU_DEFAULT	0x00001000	/* Default value.  */
+#define _FPU_IEEE	0x001f1000	/* Default + exceptions enabled. */
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("rfs %0" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("wfs %0" : : "r" (cw))
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */

+ 4 - 1
libc/sysdeps/linux/common/Makefile

@@ -54,7 +54,7 @@ endif
 
 OBJ=$(COBJS) $(MOBJ)
 
-all: $(STR_SYSCALLS) $(OBJ) $(LIBC)
+all: $(STR_SYSCALLS) $(OBJ) $(LIBC) headers
 
 $(LIBC): ar-target
 
@@ -98,6 +98,9 @@ $(TOPDIR)lib/crtn.o:
 	$(AR) $(ARFLAGS) $(TOPDIR)lib/crtn.o
 endif
 
+headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/common/fpu_control.h .
+
 clean:
 	rm -f *.[oa] *~ core crt[in].* *.S
 

+ 39 - 0
libc/sysdeps/linux/common/fpu_control.h

@@ -0,0 +1,39 @@
+/* FPU control word definitions.  Stub version.
+   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+#define _FPU_RESERVED 0xffffffff    /* These bits are reserved and not changed.  */
+
+/* The fdlibm code requires no interrupts for exceptions.  Don't
+   change the rounding mode, it would break long double I/O!  */
+#define _FPU_DEFAULT  0x00000000 /* Default value.  */
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) 0
+#define _FPU_SETCW(cw) do { } while (0)
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */

+ 1 - 0
libc/sysdeps/linux/i386/Makefile

@@ -65,6 +65,7 @@ gcrt1.o: $(CRT0_DEPS)
 endif
 
 headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/i386/fpu_control.h .
 
 
 clean:

+ 98 - 0
libc/sysdeps/linux/i386/fpu_control.h

@@ -0,0 +1,98 @@
+/* FPU control word bits.  i387 version.
+   Copyright (C) 1993,1995,1996,1997,1998,2000,2001 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Olaf Flebbe.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H	1
+
+/* Here is the dirty part. Set up your 387 through the control word
+ * (cw) register.
+ *
+ *     15-13    12  11-10  9-8     7-6     5    4    3    2    1    0
+ * | reserved | IC | RC  | PC | reserved | PM | UM | OM | ZM | DM | IM
+ *
+ * IM: Invalid operation mask
+ * DM: Denormalized operand mask
+ * ZM: Zero-divide mask
+ * OM: Overflow mask
+ * UM: Underflow mask
+ * PM: Precision (inexact result) mask
+ *
+ * Mask bit is 1 means no interrupt.
+ *
+ * PC: Precision control
+ * 11 - round to extended precision
+ * 10 - round to double precision
+ * 00 - round to single precision
+ *
+ * RC: Rounding control
+ * 00 - rounding to nearest
+ * 01 - rounding down (toward - infinity)
+ * 10 - rounding up (toward + infinity)
+ * 11 - rounding toward zero
+ *
+ * IC: Infinity control
+ * That is for 8087 and 80287 only.
+ *
+ * The hardware default is 0x037f which we use.
+ */
+
+#include <features.h>
+
+/* masking of interrupts */
+#define _FPU_MASK_IM  0x01
+#define _FPU_MASK_DM  0x02
+#define _FPU_MASK_ZM  0x04
+#define _FPU_MASK_OM  0x08
+#define _FPU_MASK_UM  0x10
+#define _FPU_MASK_PM  0x20
+
+/* precision control */
+#define _FPU_EXTENDED 0x300	/* libm requires double extended precision.  */
+#define _FPU_DOUBLE   0x200
+#define _FPU_SINGLE   0x0
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x0    /* RECOMMENDED */
+#define _FPU_RC_DOWN    0x400
+#define _FPU_RC_UP      0x800
+#define _FPU_RC_ZERO    0xC00
+
+#define _FPU_RESERVED 0xF0C0  /* Reserved bits in cw */
+
+
+/* The fdlibm code requires strict IEEE double precision arithmetic,
+   and no interrupts for exceptions, rounding to nearest.  */
+
+#define _FPU_DEFAULT  0x037f
+
+/* IEEE:  same as above.  */
+#define _FPU_IEEE     0x037f
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__HI__)));
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("fnstcw %0" : "=m" (*&cw))
+#define _FPU_SETCW(cw) __asm__ ("fldcw %0" : : "m" (*&cw))
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif	/* fpu_control.h */

+ 1 - 0
libc/sysdeps/linux/m68k/Makefile

@@ -65,6 +65,7 @@ ifneq ($(strip $(HAVE_ELF)),y)
 	echo "Working around compiler bug in the m68k-pic-coff toolchain"
 	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/m68k/float.h .
 endif
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/m68k/fpu_control.h .
 
 
 clean:

+ 69 - 0
libc/sysdeps/linux/m68k/fpu_control.h

@@ -0,0 +1,69 @@
+/* FPU control word definitions.  PowerPC version.
+   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x00   /* RECOMMENDED */
+#define _FPU_RC_DOWN    0x03
+#define _FPU_RC_UP      0x02
+#define _FPU_RC_ZERO    0x01
+
+#define _FPU_MASK_NI  0x04 /* non-ieee mode */
+
+/* masking of interrupts */
+#define _FPU_MASK_ZM  0x10 /* zero divide */
+#define _FPU_MASK_OM  0x40 /* overflow */
+#define _FPU_MASK_UM  0x20 /* underflow */
+#define _FPU_MASK_XM  0x08 /* inexact */
+#define _FPU_MASK_IM  0x80 /* invalid operation */
+
+#define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
+
+/* The fdlibm code requires no interrupts for exceptions.  */
+#define _FPU_DEFAULT  0x00000000 /* Default value.  */
+
+/* IEEE:  same as above, but (some) exceptions;
+   we leave the 'inexact' exception off.
+ */
+#define _FPU_IEEE     0x000000f0
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(__cw) ( { \
+  union { double d; fpu_control_t cw[2]; } \
+    tmp __attribute__ ((__aligned__(8))); \
+  __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
+  (__cw)=tmp.cw[1]; \
+  tmp.cw[1]; } )
+#define _FPU_SETCW(__cw) { \
+  union { double d; fpu_control_t cw[2]; } \
+    tmp __attribute__ ((__aligned__(8))); \
+  tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
+  tmp.cw[1] = __cw; \
+  __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
+}
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */

+ 1 - 0
libc/sysdeps/linux/mips/Makefile

@@ -55,6 +55,7 @@ $(COBJS): %.o : %.c
 headers:
 	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/mips/sgidefs.h .
 #	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/mips/regdef.h .
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/mips/fpu_control.h .
 
 clean:
 	rm -f *.[oa] *~ core

+ 98 - 0
libc/sysdeps/linux/mips/fpu_control.h

@@ -0,0 +1,98 @@
+/* FPU control word bits.  Mips version.
+   Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Olaf Flebbe and Ralf Baechle.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* MIPS FPU floating point control register bits.
+ *
+ * 31-25  -> floating point conditions code bits 7-1.  These bits are only
+ *           available in MIPS IV.
+ * 24     -> flush denormalized results to zero instead of
+ *           causing unimplemented operation exception.  This bit is only
+ *           available for MIPS III and newer.
+ * 23     -> Condition bit
+ * 22-18  -> reserved (read as 0, write with 0)
+ * 17     -> cause bit for unimplemented operation
+ * 16     -> cause bit for invalid exception
+ * 15     -> cause bit for division by zero exception
+ * 14     -> cause bit for overflow exception
+ * 13     -> cause bit for underflow exception
+ * 12     -> cause bit for inexact exception
+ * 11     -> enable exception for invalid exception
+ * 10     -> enable exception for division by zero exception
+ *  9     -> enable exception for overflow exception
+ *  8     -> enable exception for underflow exception
+ *  7     -> enable exception for inexact exception
+ *  6     -> flag invalid exception
+ *  5     -> flag division by zero exception
+ *  4     -> flag overflow exception
+ *  3     -> flag underflow exception
+ *  2     -> flag inexact exception
+ *  1-0   -> rounding control
+ *
+ *
+ * Rounding Control:
+ * 00 - rounding to nearest (RN)
+ * 01 - rounding toward zero (RZ)
+ * 10 - rounding (up) toward plus infinity (RP)
+ * 11 - rounding (down)toward minus infinity (RM)
+ */
+
+#include <features.h>
+
+/* masking of interrupts */
+#define _FPU_MASK_V     0x0800  /* Invalid operation */
+#define _FPU_MASK_Z     0x0400  /* Division by zero  */
+#define _FPU_MASK_O     0x0200  /* Overflow          */
+#define _FPU_MASK_U     0x0100  /* Underflow         */
+#define _FPU_MASK_I     0x0080  /* Inexact operation */
+
+/* flush denormalized numbers to zero */
+#define _FPU_FLUSH_TZ   0x1000000
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
+#define _FPU_RC_ZERO    0x1
+#define _FPU_RC_UP      0x2
+#define _FPU_RC_DOWN    0x3
+
+#define _FPU_RESERVED 0xfe3c0000  /* Reserved bits in cw */
+
+
+/* The fdlibm code requires strict IEEE double precision arithmetic,
+   and no interrupts for exceptions, rounding to nearest.  */
+
+#define _FPU_DEFAULT  0x00000000
+
+/* IEEE:  same as above, but exceptions */
+#define _FPU_IEEE     0x00000F80
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif	/* fpu_control.h */

+ 1 - 1
libc/sysdeps/linux/powerpc/Makefile

@@ -65,7 +65,7 @@ gcrt1.o: $(CRT0_DEPS)
 endif
 
 headers:
-
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/powerpc/fpu_control.h .
 
 clean:
 	rm -f *.[oa] *~ core

+ 69 - 0
libc/sysdeps/linux/powerpc/fpu_control.h

@@ -0,0 +1,69 @@
+/* FPU control word definitions.  PowerPC version.
+   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x00   /* RECOMMENDED */
+#define _FPU_RC_DOWN    0x03
+#define _FPU_RC_UP      0x02
+#define _FPU_RC_ZERO    0x01
+
+#define _FPU_MASK_NI  0x04 /* non-ieee mode */
+
+/* masking of interrupts */
+#define _FPU_MASK_ZM  0x10 /* zero divide */
+#define _FPU_MASK_OM  0x40 /* overflow */
+#define _FPU_MASK_UM  0x20 /* underflow */
+#define _FPU_MASK_XM  0x08 /* inexact */
+#define _FPU_MASK_IM  0x80 /* invalid operation */
+
+#define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
+
+/* The fdlibm code requires no interrupts for exceptions.  */
+#define _FPU_DEFAULT  0x00000000 /* Default value.  */
+
+/* IEEE:  same as above, but (some) exceptions;
+   we leave the 'inexact' exception off.
+ */
+#define _FPU_IEEE     0x000000f0
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(__cw) ( { \
+  union { double d; fpu_control_t cw[2]; } \
+    tmp __attribute__ ((__aligned__(8))); \
+  __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
+  (__cw)=tmp.cw[1]; \
+  tmp.cw[1]; } )
+#define _FPU_SETCW(__cw) { \
+  union { double d; fpu_control_t cw[2]; } \
+    tmp __attribute__ ((__aligned__(8))); \
+  tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
+  tmp.cw[1] = __cw; \
+  __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
+}
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */

+ 1 - 0
libc/sysdeps/linux/sh/Makefile

@@ -64,6 +64,7 @@ gcrt1.o: $(CRT0_DEPS)
 endif
 
 headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/sh/fpu_control.h .
 
 clean:
 	rm -f *.[oa] *~ core

+ 56 - 0
libc/sysdeps/linux/sh/fpu_control.h

@@ -0,0 +1,56 @@
+/* FPU control word definitions.  SH version.
+   Copyright (C) 1999, 2000 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* masking of interrupts */
+#define _FPU_MASK_VM	0x0800	/* Invalid operation */
+#define _FPU_MASK_ZM	0x0400	/* Division by zero  */
+#define _FPU_MASK_OM	0x0200	/* Overflow	     */
+#define _FPU_MASK_UM	0x0100	/* Underflow	     */
+#define _FPU_MASK_IM	0x0080	/* Inexact operation */
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x0	/* RECOMMENDED */
+#define _FPU_RC_ZERO	0x1
+
+#define _FPU_RESERVED 0xffc00000  /* These bits are reserved.  */
+
+/* The fdlibm code requires strict IEEE double precision arithmetic,
+   and no interrupts for exceptions, rounding to nearest.  */
+#define _FPU_DEFAULT	0x00080000 /* Default value.  */
+#define _FPU_IEEE	0x00080f80 /* Default + exceptions enabled. */
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("sts fpscr,%0" : "=r" (cw))
+
+#if defined __GNUC__
+#define _FPU_SETCW(cw) __set_fpscr ((cw))
+#else
+#define _FPU_SETCW(cw) __asm__ ("lds %0,fpscr" : : "r" (cw))
+#endif
+
+/* Default control word set at startup.	 */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */

+ 1 - 0
libc/sysdeps/linux/sparc/Makefile

@@ -55,6 +55,7 @@ $(COBJS): %.o : %.c
 	$(STRIPTOOL) -x -R .note -R .comment $*.o
 
 headers:
+	cd $(TOPDIR)/include && ln -fs ../libc/sysdeps/linux/sparc/fpu_control.h .
 
 clean:
 	rm -f *.[oa] *~ core

+ 73 - 0
libc/sysdeps/linux/sparc/fpu_control.h

@@ -0,0 +1,73 @@
+/* FPU control word bits.  SPARC version.
+   Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Miguel de Icaza
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H	1
+
+
+#include <features.h>
+#include <bits/wordsize.h>
+
+/* masking of interrupts */
+#define _FPU_MASK_IM  0x08000000
+#define _FPU_MASK_OM  0x04000000
+#define _FPU_MASK_UM  0x02000000
+#define _FPU_MASK_ZM  0x01000000
+#define _FPU_MASK_PM  0x00800000
+
+/* precision control */
+#define _FPU_EXTENDED 0x00000000     /* RECOMMENDED */
+#define _FPU_DOUBLE   0x20000000
+#define _FPU_80BIT    0x30000000
+#define _FPU_SINGLE   0x10000000     /* DO NOT USE */
+
+/* rounding control / Sparc */
+#define _FPU_RC_DOWN    0xc0000000
+#define _FPU_RC_UP      0x80000000
+#define _FPU_RC_ZERO    0x40000000
+#define _FPU_RC_NEAREST 0x0        /* RECOMMENDED */
+
+#define _FPU_RESERVED   0x30300000  /* Reserved bits in cw */
+
+
+/* Now two recommended cw */
+
+/* Linux and IEEE default:
+     - extended precision
+     - rounding to nearest
+     - no exceptions  */
+#define _FPU_DEFAULT  0x0
+#define _FPU_IEEE     0x0
+
+/* Type of the control word.  */
+typedef unsigned long int fpu_control_t;
+
+#if __WORDSIZE == 64
+# define _FPU_GETCW(cw) __asm__ ("stx %%fsr,%0" : "=m" (*&cw))
+# define _FPU_SETCW(cw) __asm__ ("ldx %0,%%fsr" : : "m" (*&cw))
+#else
+# define _FPU_GETCW(cw) __asm__ ("st %%fsr,%0" : "=m" (*&cw))
+# define _FPU_SETCW(cw) __asm__ ("ld %0,%%fsr" : : "m" (*&cw))
+#endif
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif	/* fpu_control.h */