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arm: Replace deprecated asm instructions for ARMv8 AArch32

ARMv8 has particular restrictions which coprocessor can be used and as
such these instructions, which were likely used for backwards
compatibility purposes, cannot be used on ARMv8. We solve this by
checking for ARMv8 and then using the corresponding mnemonics which were
placed in comments alongside the instructions causing issues.

Fixes the following errors:

.../setjmp.S:59:6: error: invalid operand for instruction
 stc p11, cr8, [r12], #68
     ^
.../setjmp.S:62:6: error: invalid operand for instruction
 mrc p10, 7, r2, cr1, cr0, 0
     ^
.../__longjmp.S:69:6: error: invalid operand for instruction
 ldc p11, cr8, [r12], #68
     ^
.../__longjmp.S:73:6: error: invalid operand for instruction
 mcr p10, 7, r1, cr1, cr0, 0
     ^

Signed-off-by: Marcus Haehnel <marcus.haehnel@kernkonzept.com>
Valentin Gehrke 9 months ago
parent
commit
1d8ade50e8
2 changed files with 16 additions and 0 deletions
  1. 8 0
      libc/sysdeps/linux/arm/__longjmp.S
  2. 8 0
      libc/sysdeps/linux/arm/setjmp.S

+ 8 - 0
libc/sysdeps/linux/arm/__longjmp.S

@@ -64,6 +64,13 @@ __longjmp:
 
 #if defined __UCLIBC_HAS_FLOATS__ && ! defined __UCLIBC_HAS_SOFT_FLOAT__
 #ifdef __VFP_FP__
+#  if __ARM_ARCH >= 8
+	/* Restore the VFP registers.  */
+	fldmiax ip!, {d8-d15}
+	/* Restore the floating-point status register.  */
+	ldr     r1, [ip], #4
+	fmxr    fpscr, r1
+#  else
 	/* Restore the VFP registers.  */
 	/* Following instruction is fldmiax ip!, {d8-d15}.  */
 	ldc	p11, cr8, [r12], #68
@@ -71,6 +78,7 @@ __longjmp:
 	ldr     r1, [ip], #4
 	/* Following instruction is fmxr fpscr, r1.  */
 	mcr	p10, 7, r1, cr1, cr0, 0
+#  endif
 # elif defined __MAVERICK__
 	cfldrd	mvd4,  [ip], #8 ; nop
 	cfldrd	mvd5,  [ip], #8 ; nop

+ 8 - 0
libc/sysdeps/linux/arm/setjmp.S

@@ -54,6 +54,13 @@ __sigsetjmp:
 #endif
 #if defined __UCLIBC_HAS_FLOATS__ && ! defined __UCLIBC_HAS_SOFT_FLOAT__
 # ifdef __VFP_FP__
+#  if __ARM_ARCH >= 8
+	/* Store the VFP registers.  */
+	fstmiax ip!, {d8-d15}
+	/* Store the floating-point status register.  */
+	fmrx    r2, fpscr
+	str     r2, [ip], #4
+#  else
 	/* Store the VFP registers.  */
 	/* Following instruction is fstmiax ip!, {d8-d15}.  */
 	stc	p11, cr8, [r12], #68
@@ -61,6 +68,7 @@ __sigsetjmp:
 	/* Following instruction is fmrx r2, fpscr.  */
 	mrc	p10, 7, r2, cr1, cr0, 0
 	str	r2, [ip], #4
+#  endif
 # elif defined __MAVERICK__
 	cfstrd	mvd4,  [ip], #8 ; nop
 	cfstrd	mvd5,  [ip], #8 ; nop