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@@ -22,12 +22,15 @@
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#define _PT_MACHINE_H 1
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#define _PT_MACHINE_H 1
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#ifndef PT_EI
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#ifndef PT_EI
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-# define PT_EI extern inline
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+# if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)
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+# define PT_EI static inline __attribute__((always_inline))
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+# else
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+# define PT_EI extern inline __attribute__((always_inline))
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+# endif
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#endif
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#endif
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-extern long int testandset (int *spinlock);
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+#include <asm/fixed_code.h>
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-#include <asm/unistd.h>
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/* Spinlock implementation; required. */
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/* Spinlock implementation; required. */
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/* The semantics of the TESTSET instruction cannot be guaranteed. We cannot
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/* The semantics of the TESTSET instruction cannot be guaranteed. We cannot
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easily move all locks used by linux kernel to non-cacheable memory.
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easily move all locks used by linux kernel to non-cacheable memory.
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@@ -38,13 +41,38 @@ extern long int testandset (int *spinlock);
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PT_EI long int
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PT_EI long int
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testandset (int *spinlock)
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testandset (int *spinlock)
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{
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{
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- long int res;
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- asm volatile ("R0 = %2; P0 = %4; EXCPT 0; %0 = R0;"
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- : "=d" (res), "=m" (*spinlock)
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- : "d" (spinlock), "m" (*spinlock),
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- "ida" (__NR_bfin_spinlock)
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- :"R0", "P0", "cc");
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- return res;
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+ long int res;
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+
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+ __asm__ __volatile__ (
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+ "CALL (%4);"
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+ : "=q0" (res), "=m" (*spinlock)
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+ : "qA" (spinlock), "m" (*spinlock), "a" (ATOMIC_XCHG32), "q1" (1)
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+ : "RETS", "cc", "memory");
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+
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+ return res;
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}
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}
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+#define HAS_COMPARE_AND_SWAP
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+PT_EI int
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+__compare_and_swap (long int *p, long int oldval, long int newval)
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+{
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+ long int readval;
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+ __asm__ __volatile__ (
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+ "CALL (%5);"
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+ : "=q0" (readval), "=m" (*p)
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+ : "qA" (p),
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+ "q1" (oldval),
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+ "q2" (newval),
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+ "a" (ATOMIC_CAS32),
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+ "m" (*p)
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+ : "RETS", "memory", "cc");
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+ return readval == oldval;
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+}
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+
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+#ifdef SHARED
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+# define PTHREAD_STATIC_FN_REQUIRE(name)
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+#else
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+# define PTHREAD_STATIC_FN_REQUIRE(name) __asm (".globl " "_"#name);
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+#endif
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+
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#endif /* pt-machine.h */
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#endif /* pt-machine.h */
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