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+/* Atomic operations. sparc32 version.
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+ Copyright (C) 2003, 2004, 2006 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+ Contributed by Jakub Jelinek <jakub@redhat.com>, 2003.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, write to the Free
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+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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+ 02111-1307 USA. */
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+
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+#ifndef _BITS_ATOMIC_H
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+#define _BITS_ATOMIC_H 1
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+
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+#include <stdint.h>
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+
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+typedef int8_t atomic8_t;
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+typedef uint8_t uatomic8_t;
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+typedef int_fast8_t atomic_fast8_t;
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+typedef uint_fast8_t uatomic_fast8_t;
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+
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+typedef int16_t atomic16_t;
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+typedef uint16_t uatomic16_t;
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+typedef int_fast16_t atomic_fast16_t;
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+typedef uint_fast16_t uatomic_fast16_t;
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+
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+typedef int32_t atomic32_t;
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+typedef uint32_t uatomic32_t;
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+typedef int_fast32_t atomic_fast32_t;
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+typedef uint_fast32_t uatomic_fast32_t;
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+
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+typedef int64_t atomic64_t;
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+typedef uint64_t uatomic64_t;
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+typedef int_fast64_t atomic_fast64_t;
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+typedef uint_fast64_t uatomic_fast64_t;
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+
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+typedef intptr_t atomicptr_t;
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+typedef uintptr_t uatomicptr_t;
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+typedef intmax_t atomic_max_t;
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+typedef uintmax_t uatomic_max_t;
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+
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+
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+/* We have no compare and swap, just test and set.
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+ The following implementation contends on 64 global locks
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+ per library and assumes no variable will be accessed using atomic.h
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+ macros from two different libraries. */
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+
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+__make_section_unallocated
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+ (".gnu.linkonce.b.__sparc32_atomic_locks, \"aw\", %nobits");
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+
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+volatile unsigned char __sparc32_atomic_locks[64]
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+ __attribute__ ((nocommon, section (".gnu.linkonce.b.__sparc32_atomic_locks"
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+ __sec_comment),
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+ visibility ("hidden")));
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+
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+#define __sparc32_atomic_do_lock(addr) \
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+ do \
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+ { \
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+ unsigned int __old_lock; \
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+ unsigned int __idx = (((long) addr >> 2) ^ ((long) addr >> 12)) \
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+ & 63; \
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+ do \
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+ __asm __volatile ("ldstub %1, %0" \
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+ : "=r" (__old_lock), \
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+ "=m" (__sparc32_atomic_locks[__idx]) \
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+ : "m" (__sparc32_atomic_locks[__idx]) \
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+ : "memory"); \
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+ while (__old_lock); \
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+ } \
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+ while (0)
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+
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+#define __sparc32_atomic_do_unlock(addr) \
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+ do \
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+ { \
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+ __sparc32_atomic_locks[(((long) addr >> 2) \
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+ ^ ((long) addr >> 12)) & 63] = 0; \
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+ __asm __volatile ("" ::: "memory"); \
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+ } \
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+ while (0)
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+
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+#define __sparc32_atomic_do_lock24(addr) \
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+ do \
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+ { \
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+ unsigned int __old_lock; \
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+ do \
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+ __asm __volatile ("ldstub %1, %0" \
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+ : "=r" (__old_lock), "=m" (*(addr)) \
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+ : "m" (*(addr)) \
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+ : "memory"); \
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+ while (__old_lock); \
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+ } \
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+ while (0)
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+
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+#define __sparc32_atomic_do_unlock24(addr) \
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+ do \
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+ { \
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+ *(char *) (addr) = 0; \
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+ __asm __volatile ("" ::: "memory"); \
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+ } \
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+ while (0)
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+
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+
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+#ifndef SHARED
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+# define __v9_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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+({ \
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+ register __typeof (*(mem)) __acev_tmp __asm ("%g6"); \
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+ register __typeof (mem) __acev_mem __asm ("%g1") = (mem); \
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+ register __typeof (*(mem)) __acev_oldval __asm ("%g5"); \
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+ __acev_tmp = (newval); \
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+ __acev_oldval = (oldval); \
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+ /* .word 0xcde05005 is cas [%g1], %g5, %g6. Can't use cas here though, \
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+ because as will then mark the object file as V8+ arch. */ \
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+ __asm __volatile (".word 0xcde05005" \
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+ : "+r" (__acev_tmp), "=m" (*__acev_mem) \
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+ : "r" (__acev_oldval), "m" (*__acev_mem), \
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+ "r" (__acev_mem) : "memory"); \
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+ __acev_tmp; })
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+#endif
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+
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+/* The only basic operation needed is compare and exchange. */
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+#define __v7_compare_and_exchange_val_acq(mem, newval, oldval) \
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+ ({ __typeof (mem) __acev_memp = (mem); \
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+ __typeof (*mem) __acev_ret; \
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+ __typeof (*mem) __acev_newval = (newval); \
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+ \
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+ __sparc32_atomic_do_lock (__acev_memp); \
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+ __acev_ret = *__acev_memp; \
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+ if (__acev_ret == (oldval)) \
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+ *__acev_memp = __acev_newval; \
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+ __sparc32_atomic_do_unlock (__acev_memp); \
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+ __acev_ret; })
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+
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+#define __v7_compare_and_exchange_bool_acq(mem, newval, oldval) \
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+ ({ __typeof (mem) __aceb_memp = (mem); \
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+ int __aceb_ret; \
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+ __typeof (*mem) __aceb_newval = (newval); \
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+ \
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+ __sparc32_atomic_do_lock (__aceb_memp); \
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+ __aceb_ret = 0; \
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+ if (*__aceb_memp == (oldval)) \
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+ *__aceb_memp = __aceb_newval; \
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+ else \
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+ __aceb_ret = 1; \
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+ __sparc32_atomic_do_unlock (__aceb_memp); \
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+ __aceb_ret; })
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+
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+#define __v7_exchange_acq(mem, newval) \
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+ ({ __typeof (mem) __acev_memp = (mem); \
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+ __typeof (*mem) __acev_ret; \
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+ __typeof (*mem) __acev_newval = (newval); \
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+ \
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+ __sparc32_atomic_do_lock (__acev_memp); \
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+ __acev_ret = *__acev_memp; \
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+ *__acev_memp = __acev_newval; \
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+ __sparc32_atomic_do_unlock (__acev_memp); \
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+ __acev_ret; })
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+
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+#define __v7_exchange_and_add(mem, value) \
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+ ({ __typeof (mem) __acev_memp = (mem); \
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+ __typeof (*mem) __acev_ret; \
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+ \
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+ __sparc32_atomic_do_lock (__acev_memp); \
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+ __acev_ret = *__acev_memp; \
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+ *__acev_memp = __acev_ret + (value); \
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+ __sparc32_atomic_do_unlock (__acev_memp); \
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+ __acev_ret; })
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+
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+/* Special versions, which guarantee that top 8 bits of all values
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+ are cleared and use those bits as the ldstub lock. */
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+#define __v7_compare_and_exchange_val_24_acq(mem, newval, oldval) \
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+ ({ __typeof (mem) __acev_memp = (mem); \
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+ __typeof (*mem) __acev_ret; \
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+ __typeof (*mem) __acev_newval = (newval); \
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+ \
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+ __sparc32_atomic_do_lock24 (__acev_memp); \
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+ __acev_ret = *__acev_memp & 0xffffff; \
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+ if (__acev_ret == (oldval)) \
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+ *__acev_memp = __acev_newval; \
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+ else \
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+ __sparc32_atomic_do_unlock24 (__acev_memp); \
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+ __asm __volatile ("" ::: "memory"); \
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+ __acev_ret; })
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+
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+#define __v7_exchange_24_rel(mem, newval) \
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+ ({ __typeof (mem) __acev_memp = (mem); \
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+ __typeof (*mem) __acev_ret; \
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+ __typeof (*mem) __acev_newval = (newval); \
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+ \
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+ __sparc32_atomic_do_lock24 (__acev_memp); \
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+ __acev_ret = *__acev_memp & 0xffffff; \
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+ *__acev_memp = __acev_newval; \
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+ __asm __volatile ("" ::: "memory"); \
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+ __acev_ret; })
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+
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+#ifdef SHARED
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+
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+/* When dynamically linked, we assume pre-v9 libraries are only ever
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+ used on pre-v9 CPU. */
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+# define __atomic_is_v9 0
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+
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+# define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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+ __v7_compare_and_exchange_val_acq (mem, newval, oldval)
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+
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+# define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
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+ __v7_compare_and_exchange_bool_acq (mem, newval, oldval)
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+
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+# define atomic_exchange_acq(mem, newval) \
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+ __v7_exchange_acq (mem, newval)
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+
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+# define atomic_exchange_and_add(mem, value) \
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+ __v7_exchange_and_add (mem, value)
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+
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+# define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
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+ ({ \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ __v7_compare_and_exchange_val_24_acq (mem, newval, oldval); })
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+
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+# define atomic_exchange_24_rel(mem, newval) \
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+ ({ \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ __v7_exchange_24_rel (mem, newval); })
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+
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+#else
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+
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+
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+
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+/*
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+ Here's what we'd like to do:
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+
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+ In libc.a/libpthread.a etc. we don't know if we'll be run on
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+ pre-v9 or v9 CPU. To be interoperable with dynamically linked
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+ apps on v9 CPUs e.g. with process shared primitives, use cas insn
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+ on v9 CPUs and ldstub on pre-v9.
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+
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+ However, we have no good way to test at run time that I know of,
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+ so resort to the lowest common denominator (v7 ops) -austinf
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+ */
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+#define __atomic_is_v9 0
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+
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+# define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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+ ({ \
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+ __typeof (*mem) __acev_wret; \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ if (__atomic_is_v9) \
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+ __acev_wret \
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+ = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
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+ else \
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+ __acev_wret \
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+ = __v7_compare_and_exchange_val_acq (mem, newval, oldval); \
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+ __acev_wret; })
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+
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+# define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
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+ ({ \
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+ int __acev_wret; \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ if (__atomic_is_v9) \
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+ { \
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+ __typeof (oldval) __acev_woldval = (oldval); \
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+ __acev_wret \
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+ = __v9_compare_and_exchange_val_32_acq (mem, newval, \
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+ __acev_woldval) \
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+ != __acev_woldval; \
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+ } \
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+ else \
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+ __acev_wret \
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+ = __v7_compare_and_exchange_bool_acq (mem, newval, oldval); \
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+ __acev_wret; })
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+
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+# define atomic_exchange_rel(mem, newval) \
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+ ({ \
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+ __typeof (*mem) __acev_wret; \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ if (__atomic_is_v9) \
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+ { \
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+ __typeof (mem) __acev_wmemp = (mem); \
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+ __typeof (*(mem)) __acev_wval = (newval); \
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+ do \
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+ __acev_wret = *__acev_wmemp; \
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+ while (__builtin_expect \
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+ (__v9_compare_and_exchange_val_32_acq (__acev_wmemp,\
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+ __acev_wval, \
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+ __acev_wret) \
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+ != __acev_wret, 0)); \
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+ } \
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+ else \
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+ __acev_wret = __v7_exchange_acq (mem, newval); \
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+ __acev_wret; })
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+
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+# define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
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+ ({ \
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+ __typeof (*mem) __acev_wret; \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ if (__atomic_is_v9) \
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+ __acev_wret \
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+ = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
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+ else \
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+ __acev_wret \
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+ = __v7_compare_and_exchange_val_24_acq (mem, newval, oldval);\
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+ __acev_wret; })
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+
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+# define atomic_exchange_24_rel(mem, newval) \
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+ ({ \
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+ __typeof (*mem) __acev_w24ret; \
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+ if (sizeof (*mem) != 4) \
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+ abort (); \
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+ if (__atomic_is_v9) \
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+ __acev_w24ret = atomic_exchange_rel (mem, newval); \
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+ else \
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+ __acev_w24ret = __v7_exchange_24_rel (mem, newval); \
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+ __acev_w24ret; })
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+
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+#endif
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+
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+#endif /* bits/atomic.h */
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Austin Foxley