mips: sync header with glibc

Fixes following compile error, when UCLIBC_HAS_CONTEXT_FUNCS is enabled
on a mips64 build:

  CC libc/sysdeps/linux/common/_exit.os
libc/sysdeps/linux/mips/swapcontext.S: Assembler messages:
libc/sysdeps/linux/mips/swapcontext.S:110: Error: Illegal operands `s.d fs6,(30*8+296)($4)'
libc/sysdeps/linux/mips/swapcontext.S:111: Error: Illegal operands `s.d fs7,(31*8+296)($4)'
libc/sysdeps/linux/mips/swapcontext.S:149: Error: Illegal operands `l.d fs6,(30*8+296)($2)'
libc/sysdeps/linux/mips/swapcontext.S:150: Error: Illegal operands `l.d fs7,(31*8+296)($2)'

Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

libc/sysdeps/linux/mips/sys/fpregdef.h

@@ -1,4 +1,4 @@
-/* Copyright (C) 1991, 92, 94, 95, 96, 97, 98 Free Software Foundation, Inc.
+/* Copyright (C) 1991-2015 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -12,25 +12,56 @@
    Lesser General Public License for more details.
 
    You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
+   License along with the GNU C Library.  If not, see
    <http://www.gnu.org/licenses/>.  */
 
 #ifndef _SYS_FPREGDEF_H
 #define _SYS_FPREGDEF_H
 
-/*
- * These definitions only cover the R3000-ish 16/32 register model.
- * But we're trying to be R3000 friendly anyway ...
- */
-#define fv0	$f0      /* return value */
-#define fv0f	$f1
+/* Commonalities first, individualities next...  */
+
+#define fv0	$f0	/* return value */
 #define fv1	$f2
+
+#if _MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIN32
+#define fs0	$f20	/* callee saved */
+#define fs1	$f22
+#define fs2	$f24
+#define fs3	$f26
+#define fs4	$f28
+#define fs5	$f30
+#endif /* _MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIN32 */
+
+#if _MIPS_SIM == _ABI64 || _MIPS_SIM == _ABIN32
+#define fa0	$f12	/* argument registers */
+#define fa1	$f13
+#define fa2	$f14
+#define fa3	$f15
+#define fa4	$f16
+#define fa5	$f17
+#define fa6	$f18
+#define fa7	$f19
+
+#define ft0	$f4	/* caller saved */
+#define ft1	$f5
+#define ft2	$f6
+#define ft3	$f7
+#define ft4	$f8
+#define ft5	$f9
+#define ft6	$f10
+#define ft7	$f11
+#endif /* _MIPS_SIM == _ABI64 || _MIPS_SIM == _ABIN32 */
+
+#if _MIPS_SIM == _ABIO32
+#define fv0f	$f1	/* return value, high part */
 #define fv1f	$f3
-#define fa0	$f12     /* argument registers */
+
+#define fa0	$f12	/* argument registers */
 #define fa0f	$f13
 #define fa1	$f14
 #define fa1f	$f15
-#define ft0	$f4      /* caller saved */
+
+#define ft0	$f4	/* caller saved */
 #define ft0f	$f5
 #define ft1	$f6
 #define ft1f	$f7
@@ -42,19 +73,44 @@
 #define ft4f	$f17
 #define ft5	$f18
 #define ft5f	$f19
-#define fs0	$f20     /* callee saved */
-#define fs0f	$f21
-#define fs1	$f22
+
+#define fs0f	$f21	/* callee saved, high part */
 #define fs1f	$f23
-#define fs2	$f24
 #define fs2f	$f25
-#define fs3	$f26
 #define fs3f	$f27
-#define fs4	$f28
 #define fs4f	$f29
-#define fs5	$f30
 #define fs5f	$f31
+#endif /* _MIPS_SIM == _ABIO32 */
+
+#if _MIPS_SIM == _ABI64
+#define ft8	$f20	/* caller saved */
+#define ft9	$f21
+#define ft10	$f22
+#define ft11	$f23
+#define ft12	$f1
+#define ft13	$f3
+
+#define fs0	$f24	/* callee saved */
+#define fs1	$f25
+#define fs2	$f26
+#define fs3	$f27
+#define fs4	$f28
+#define fs5	$f29
+#define fs6	$f30
+#define fs7	$f31
+#endif /* _MIPS_SIM == _ABI64 */
+
+#if _MIPS_SIM == _ABIN32
+#define ft8	$f21	/* caller saved */
+#define ft9	$f23
+#define ft10	$f25
+#define ft11	$f27
+#define ft12	$f29
+#define ft13	$f31
+#define ft14	$f1
+#define ft15	$f3
+#endif /* _MIPS_SIM == _ABIN32 */
 
-#define fcr31	$31      /* FPU status register */
+#define fcr31	$31	/* FPU status register */
 
 #endif /* sys/fpregdef.h */