More mips support from sjhill

ldso/ldso/ldso.c

@@ -223,7 +223,7 @@ DL_BOOT(unsigned long args)
 	/* First obtain the information on the stack that tells us more about
 	   what binary is loaded, where it is loaded, etc, etc */
 	GET_ARGV(aux_dat, args);
-#if defined(__arm__)
+#if defined(__arm__) || defined(__mips__)
 	aux_dat += 1;
 #endif
 	argc = *(aux_dat - 1);
@@ -259,7 +259,7 @@ DL_BOOT(unsigned long args)
 	/* Check the ELF header to make sure everything looks ok.  */
 	if (!header || header->e_ident[EI_CLASS] != ELFCLASS32 ||
 		header->e_ident[EI_VERSION] != EV_CURRENT
-#ifndef __powerpc__
+#if !defined(__powerpc__) && !defined(__mips__)
 		|| _dl_strncmp((void *) header, ELFMAGIC, SELFMAG) != 0
 #endif
 		) {
@@ -286,6 +286,8 @@ DL_BOOT(unsigned long args)
   __asm__("\tmov %0, r10\n\t":"=r"(got));
 #elif defined(__powerpc__)
   __asm__("\tbl _GLOBAL_OFFSET_TABLE_-4@local\n\t":"=l"(got));
+#elif defined(__mips__)
+  __asm__("\tmove %0, $28\n\t":"=r"(got));
 #else
 	/* Do things the slow way in C */
 	{

ldso/ldso/mips/boot1_arch.h

@@ -0,0 +1,32 @@
+/* Any assmbly language/system dependent hacks needed to setup boot1.c so it
+ * will work as expected and cope with whatever platform specific wierdness is
+ * needed for this architecture.  See arm/boot1_arch.h for an example of what
+ * can be done.
+ */
+
+asm("
+	.text
+	.globl _dl_boot
+_dl_boot:
+	.set noreorder
+	bltzal $0, 0f
+	nop
+0:	.cpload $31
+	.set reorder
+	# i386 ABI book says that the first entry of GOT holds
+	# the address of the dynamic structure. Though MIPS ABI
+	# doesn't say nothing about this, I emulate this here.
+	la $4, _DYNAMIC
+	# Subtract OFFSET_GP_GOT
+	sw $4, -0x7ff0($28)
+	move $4, $29
+	la $8, coff
+	bltzal $8, coff
+coff:	subu $8, $31, $8
+	la $25, _dl_boot2
+	addu $25, $8
+	jalr $25
+");
+
+#define _dl_boot _dl_boot2
+#define DL_BOOT(X)   static void __attribute__ ((unused)) _dl_boot (X)

ldso/ldso/mips/dl-startup.h

@@ -0,0 +1,32 @@
+/* Any assmbly language/system dependent hacks needed to setup boot1.c so it
+ * will work as expected and cope with whatever platform specific wierdness is
+ * needed for this architecture.  See arm/boot1_arch.h for an example of what
+ * can be done.
+ */
+
+asm("
+	.text
+	.globl _dl_boot
+_dl_boot:
+	.set noreorder
+	bltzal $0, 0f
+	nop
+0:	.cpload $31
+	.set reorder
+	# i386 ABI book says that the first entry of GOT holds
+	# the address of the dynamic structure. Though MIPS ABI
+	# doesn't say nothing about this, I emulate this here.
+	la $4, _DYNAMIC
+	# Subtract OFFSET_GP_GOT
+	sw $4, -0x7ff0($28)
+	move $4, $29
+	la $8, coff
+	bltzal $8, coff
+coff:	subu $8, $31, $8
+	la $25, _dl_boot2
+	addu $25, $8
+	jalr $25
+");
+
+#define _dl_boot _dl_boot2
+#define DL_BOOT(X)   static void __attribute__ ((unused)) _dl_boot (X)

ldso/ldso/mips/dl-syscalls.h

@@ -4,6 +4,12 @@
  * Linux/MIPS 2.4.17 version kernel.
  */
 
+#ifndef _SYS_STAT_H
+#define _SYS_STAT_H
+
+#define new_stat stat
+#include <asm/stat.h>
+
 #define __NR_SYSCALL_BASE		4000
 
 #define __NR_exit			(__NR_SYSCALL_BASE +   1)
@@ -135,3 +141,5 @@ type name(atype a, btype b, ctype c, dtype d) \
 		return (type) __v0; \
 	return (type) -1; \
 }
+
+#endif

ldso/ldso/mips/ld_syscalls.h

@@ -4,6 +4,12 @@
  * Linux/MIPS 2.4.17 version kernel.
  */
 
+#ifndef _SYS_STAT_H
+#define _SYS_STAT_H
+
+#define new_stat stat
+#include <asm/stat.h>
+
 #define __NR_SYSCALL_BASE		4000
 
 #define __NR_exit			(__NR_SYSCALL_BASE +   1)
@@ -135,3 +141,5 @@ type name(atype a, btype b, ctype c, dtype d) \
 		return (type) __v0; \
 	return (type) -1; \
 }
+
+#endif