atomic.h 12 KB

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  1. /* Copyright (C) 2003 Free Software Foundation, Inc.
  2. This file is part of the GNU C Library.
  3. The GNU C Library is free software; you can redistribute it and/or
  4. modify it under the terms of the GNU Lesser General Public
  5. License as published by the Free Software Foundation; either
  6. version 2.1 of the License, or (at your option) any later version.
  7. The GNU C Library is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  10. Lesser General Public License for more details.
  11. You should have received a copy of the GNU Lesser General Public
  12. License along with the GNU C Library; if not, write to the Free
  13. Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  14. 02111-1307 USA. */
  15. #include <stdint.h>
  16. typedef int8_t atomic8_t;
  17. typedef uint8_t uatomic8_t;
  18. typedef int_fast8_t atomic_fast8_t;
  19. typedef uint_fast8_t uatomic_fast8_t;
  20. typedef int16_t atomic16_t;
  21. typedef uint16_t uatomic16_t;
  22. typedef int_fast16_t atomic_fast16_t;
  23. typedef uint_fast16_t uatomic_fast16_t;
  24. typedef int32_t atomic32_t;
  25. typedef uint32_t uatomic32_t;
  26. typedef int_fast32_t atomic_fast32_t;
  27. typedef uint_fast32_t uatomic_fast32_t;
  28. typedef int64_t atomic64_t;
  29. typedef uint64_t uatomic64_t;
  30. typedef int_fast64_t atomic_fast64_t;
  31. typedef uint_fast64_t uatomic_fast64_t;
  32. typedef intptr_t atomicptr_t;
  33. typedef uintptr_t uatomicptr_t;
  34. typedef intmax_t atomic_max_t;
  35. typedef uintmax_t uatomic_max_t;
  36. #ifdef UP
  37. # define __MB /* nothing */
  38. #else
  39. # define __MB " mb\n"
  40. #endif
  41. /* Compare and exchange. For all of the "xxx" routines, we expect a
  42. "__prev" and a "__cmp" variable to be provided by the enclosing scope,
  43. in which values are returned. */
  44. #define __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2) \
  45. ({ \
  46. unsigned long __tmp, __snew, __addr64; \
  47. __asm__ __volatile__ ( \
  48. mb1 \
  49. " andnot %[__addr8],7,%[__addr64]\n" \
  50. " insbl %[__new],%[__addr8],%[__snew]\n" \
  51. "1: ldq_l %[__tmp],0(%[__addr64])\n" \
  52. " extbl %[__tmp],%[__addr8],%[__prev]\n" \
  53. " cmpeq %[__prev],%[__old],%[__cmp]\n" \
  54. " beq %[__cmp],2f\n" \
  55. " mskbl %[__tmp],%[__addr8],%[__tmp]\n" \
  56. " or %[__snew],%[__tmp],%[__tmp]\n" \
  57. " stq_c %[__tmp],0(%[__addr64])\n" \
  58. " beq %[__tmp],1b\n" \
  59. mb2 \
  60. "2:" \
  61. : [__prev] "=&r" (__prev), \
  62. [__snew] "=&r" (__snew), \
  63. [__tmp] "=&r" (__tmp), \
  64. [__cmp] "=&r" (__cmp), \
  65. [__addr64] "=&r" (__addr64) \
  66. : [__addr8] "r" (mem), \
  67. [__old] "Ir" ((uint64_t)(uint8_t)(uint64_t)(old)), \
  68. [__new] "r" (new) \
  69. : "memory"); \
  70. })
  71. #define __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2) \
  72. ({ \
  73. unsigned long __tmp, __snew, __addr64; \
  74. __asm__ __volatile__ ( \
  75. mb1 \
  76. " andnot %[__addr16],7,%[__addr64]\n" \
  77. " inswl %[__new],%[__addr16],%[__snew]\n" \
  78. "1: ldq_l %[__tmp],0(%[__addr64])\n" \
  79. " extwl %[__tmp],%[__addr16],%[__prev]\n" \
  80. " cmpeq %[__prev],%[__old],%[__cmp]\n" \
  81. " beq %[__cmp],2f\n" \
  82. " mskwl %[__tmp],%[__addr16],%[__tmp]\n" \
  83. " or %[__snew],%[__tmp],%[__tmp]\n" \
  84. " stq_c %[__tmp],0(%[__addr64])\n" \
  85. " beq %[__tmp],1b\n" \
  86. mb2 \
  87. "2:" \
  88. : [__prev] "=&r" (__prev), \
  89. [__snew] "=&r" (__snew), \
  90. [__tmp] "=&r" (__tmp), \
  91. [__cmp] "=&r" (__cmp), \
  92. [__addr64] "=&r" (__addr64) \
  93. : [__addr16] "r" (mem), \
  94. [__old] "Ir" ((uint64_t)(uint16_t)(uint64_t)(old)), \
  95. [__new] "r" (new) \
  96. : "memory"); \
  97. })
  98. #define __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2) \
  99. ({ \
  100. __asm__ __volatile__ ( \
  101. mb1 \
  102. "1: ldl_l %[__prev],%[__mem]\n" \
  103. " cmpeq %[__prev],%[__old],%[__cmp]\n" \
  104. " beq %[__cmp],2f\n" \
  105. " mov %[__new],%[__cmp]\n" \
  106. " stl_c %[__cmp],%[__mem]\n" \
  107. " beq %[__cmp],1b\n" \
  108. mb2 \
  109. "2:" \
  110. : [__prev] "=&r" (__prev), \
  111. [__cmp] "=&r" (__cmp) \
  112. : [__mem] "m" (*(mem)), \
  113. [__old] "Ir" ((uint64_t)(atomic32_t)(uint64_t)(old)), \
  114. [__new] "Ir" (new) \
  115. : "memory"); \
  116. })
  117. #define __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2) \
  118. ({ \
  119. __asm__ __volatile__ ( \
  120. mb1 \
  121. "1: ldq_l %[__prev],%[__mem]\n" \
  122. " cmpeq %[__prev],%[__old],%[__cmp]\n" \
  123. " beq %[__cmp],2f\n" \
  124. " mov %[__new],%[__cmp]\n" \
  125. " stq_c %[__cmp],%[__mem]\n" \
  126. " beq %[__cmp],1b\n" \
  127. mb2 \
  128. "2:" \
  129. : [__prev] "=&r" (__prev), \
  130. [__cmp] "=&r" (__cmp) \
  131. : [__mem] "m" (*(mem)), \
  132. [__old] "Ir" ((uint64_t)(old)), \
  133. [__new] "Ir" (new) \
  134. : "memory"); \
  135. })
  136. /* For all "bool" routines, we return FALSE if exchange succesful. */
  137. #define __arch_compare_and_exchange_bool_8_int(mem, new, old, mb1, mb2) \
  138. ({ unsigned long __prev; int __cmp; \
  139. __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2); \
  140. !__cmp; })
  141. #define __arch_compare_and_exchange_bool_16_int(mem, new, old, mb1, mb2) \
  142. ({ unsigned long __prev; int __cmp; \
  143. __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2); \
  144. !__cmp; })
  145. #define __arch_compare_and_exchange_bool_32_int(mem, new, old, mb1, mb2) \
  146. ({ unsigned long __prev; int __cmp; \
  147. __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2); \
  148. !__cmp; })
  149. #define __arch_compare_and_exchange_bool_64_int(mem, new, old, mb1, mb2) \
  150. ({ unsigned long __prev; int __cmp; \
  151. __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2); \
  152. !__cmp; })
  153. /* For all "val" routines, return the old value whether exchange
  154. successful or not. */
  155. #define __arch_compare_and_exchange_val_8_int(mem, new, old, mb1, mb2) \
  156. ({ unsigned long __prev; int __cmp; \
  157. __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2); \
  158. (__typeof (*mem))__prev; })
  159. #define __arch_compare_and_exchange_val_16_int(mem, new, old, mb1, mb2) \
  160. ({ unsigned long __prev; int __cmp; \
  161. __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2); \
  162. (__typeof (*mem))__prev; })
  163. #define __arch_compare_and_exchange_val_32_int(mem, new, old, mb1, mb2) \
  164. ({ unsigned long __prev; int __cmp; \
  165. __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2); \
  166. (__typeof (*mem))__prev; })
  167. #define __arch_compare_and_exchange_val_64_int(mem, new, old, mb1, mb2) \
  168. ({ unsigned long __prev; int __cmp; \
  169. __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2); \
  170. (__typeof (*mem))__prev; })
  171. /* Compare and exchange with "acquire" semantics, ie barrier after. */
  172. #define atomic_compare_and_exchange_bool_acq(mem, new, old) \
  173. __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
  174. mem, new, old, "", __MB)
  175. #define atomic_compare_and_exchange_val_acq(mem, new, old) \
  176. __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
  177. mem, new, old, "", __MB)
  178. /* Compare and exchange with "release" semantics, ie barrier before. */
  179. #define atomic_compare_and_exchange_bool_rel(mem, new, old) \
  180. __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
  181. mem, new, old, __MB, "")
  182. #define atomic_compare_and_exchange_val_rel(mem, new, old) \
  183. __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
  184. mem, new, old, __MB, "")
  185. /* Atomically store value and return the previous value. */
  186. #define __arch_exchange_8_int(mem, value, mb1, mb2) \
  187. ({ \
  188. unsigned long __ret, __tmp, __addr64, __sval; \
  189. __asm__ __volatile__ ( \
  190. mb1 \
  191. " andnot %[__addr8],7,%[__addr64]\n" \
  192. " insbl %[__value],%[__addr8],%[__sval]\n" \
  193. "1: ldq_l %[__tmp],0(%[__addr64])\n" \
  194. " extbl %[__tmp],%[__addr8],%[__ret]\n" \
  195. " mskbl %[__tmp],%[__addr8],%[__tmp]\n" \
  196. " or %[__sval],%[__tmp],%[__tmp]\n" \
  197. " stq_c %[__tmp],0(%[__addr64])\n" \
  198. " beq %[__tmp],1b\n" \
  199. mb2 \
  200. : [__ret] "=&r" (__ret), \
  201. [__sval] "=&r" (__sval), \
  202. [__tmp] "=&r" (__tmp), \
  203. [__addr64] "=&r" (__addr64) \
  204. : [__addr8] "r" (mem), \
  205. [__value] "r" (value) \
  206. : "memory"); \
  207. __ret; })
  208. #define __arch_exchange_16_int(mem, value, mb1, mb2) \
  209. ({ \
  210. unsigned long __ret, __tmp, __addr64, __sval; \
  211. __asm__ __volatile__ ( \
  212. mb1 \
  213. " andnot %[__addr16],7,%[__addr64]\n" \
  214. " inswl %[__value],%[__addr16],%[__sval]\n" \
  215. "1: ldq_l %[__tmp],0(%[__addr64])\n" \
  216. " extwl %[__tmp],%[__addr16],%[__ret]\n" \
  217. " mskwl %[__tmp],%[__addr16],%[__tmp]\n" \
  218. " or %[__sval],%[__tmp],%[__tmp]\n" \
  219. " stq_c %[__tmp],0(%[__addr64])\n" \
  220. " beq %[__tmp],1b\n" \
  221. mb2 \
  222. : [__ret] "=&r" (__ret), \
  223. [__sval] "=&r" (__sval), \
  224. [__tmp] "=&r" (__tmp), \
  225. [__addr64] "=&r" (__addr64) \
  226. : [__addr16] "r" (mem), \
  227. [__value] "r" (value) \
  228. : "memory"); \
  229. __ret; })
  230. #define __arch_exchange_32_int(mem, value, mb1, mb2) \
  231. ({ \
  232. signed int __ret, __tmp; \
  233. __asm__ __volatile__ ( \
  234. mb1 \
  235. "1: ldl_l %[__ret],%[__mem]\n" \
  236. " mov %[__val],%[__tmp]\n" \
  237. " stl_c %[__tmp],%[__mem]\n" \
  238. " beq %[__tmp],1b\n" \
  239. mb2 \
  240. : [__ret] "=&r" (__ret), \
  241. [__tmp] "=&r" (__tmp) \
  242. : [__mem] "m" (*(mem)), \
  243. [__val] "Ir" (value) \
  244. : "memory"); \
  245. __ret; })
  246. #define __arch_exchange_64_int(mem, value, mb1, mb2) \
  247. ({ \
  248. unsigned long __ret, __tmp; \
  249. __asm__ __volatile__ ( \
  250. mb1 \
  251. "1: ldq_l %[__ret],%[__mem]\n" \
  252. " mov %[__val],%[__tmp]\n" \
  253. " stq_c %[__tmp],%[__mem]\n" \
  254. " beq %[__tmp],1b\n" \
  255. mb2 \
  256. : [__ret] "=&r" (__ret), \
  257. [__tmp] "=&r" (__tmp) \
  258. : [__mem] "m" (*(mem)), \
  259. [__val] "Ir" (value) \
  260. : "memory"); \
  261. __ret; })
  262. #define atomic_exchange_acq(mem, value) \
  263. __atomic_val_bysize (__arch_exchange, int, mem, value, "", __MB)
  264. #define atomic_exchange_rel(mem, value) \
  265. __atomic_val_bysize (__arch_exchange, int, mem, value, __MB, "")
  266. /* Atomically add value and return the previous (unincremented) value. */
  267. #define __arch_exchange_and_add_8_int(mem, value, mb1, mb2) \
  268. ({ __builtin_trap (); 0; })
  269. #define __arch_exchange_and_add_16_int(mem, value, mb1, mb2) \
  270. ({ __builtin_trap (); 0; })
  271. #define __arch_exchange_and_add_32_int(mem, value, mb1, mb2) \
  272. ({ \
  273. signed int __ret, __tmp; \
  274. __asm__ __volatile__ ( \
  275. mb1 \
  276. "1: ldl_l %[__ret],%[__mem]\n" \
  277. " addl %[__ret],%[__val],%[__tmp]\n" \
  278. " stl_c %[__tmp],%[__mem]\n" \
  279. " beq %[__tmp],1b\n" \
  280. mb2 \
  281. : [__ret] "=&r" (__ret), \
  282. [__tmp] "=&r" (__tmp) \
  283. : [__mem] "m" (*(mem)), \
  284. [__val] "Ir" ((signed int)(value)) \
  285. : "memory"); \
  286. __ret; })
  287. #define __arch_exchange_and_add_64_int(mem, value, mb1, mb2) \
  288. ({ \
  289. unsigned long __ret, __tmp; \
  290. __asm__ __volatile__ ( \
  291. mb1 \
  292. "1: ldq_l %[__ret],%[__mem]\n" \
  293. " addq %[__ret],%[__val],%[__tmp]\n" \
  294. " stq_c %[__tmp],%[__mem]\n" \
  295. " beq %[__tmp],1b\n" \
  296. mb2 \
  297. : [__ret] "=&r" (__ret), \
  298. [__tmp] "=&r" (__tmp) \
  299. : [__mem] "m" (*(mem)), \
  300. [__val] "Ir" ((unsigned long)(value)) \
  301. : "memory"); \
  302. __ret; })
  303. /* ??? Barrier semantics for atomic_exchange_and_add appear to be
  304. undefined. Use full barrier for now, as that's safe. */
  305. #define atomic_exchange_and_add(mem, value) \
  306. __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, __MB, __MB)
  307. /* ??? Blah, I'm lazy. Implement these later. Can do better than the
  308. compare-and-exchange loop provided by generic code.
  309. #define atomic_decrement_if_positive(mem)
  310. #define atomic_bit_test_set(mem, bit)
  311. */
  312. #ifndef UP
  313. # define atomic_full_barrier() __asm__ ("mb" : : : "memory");
  314. # define atomic_read_barrier() __asm__ ("mb" : : : "memory");
  315. # define atomic_write_barrier() __asm__ ("wmb" : : : "memory");
  316. #endif