fpu_control.h 3.6 KB

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  1. /* FPU control word bits. Mips version.
  2. Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
  3. This file is part of the GNU C Library.
  4. Contributed by Olaf Flebbe and Ralf Baechle.
  5. The GNU C Library is free software; you can redistribute it and/or
  6. modify it under the terms of the GNU Lesser General Public
  7. License as published by the Free Software Foundation; either
  8. version 2.1 of the License, or (at your option) any later version.
  9. The GNU C Library is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. Lesser General Public License for more details.
  13. You should have received a copy of the GNU Lesser General Public
  14. License along with the GNU C Library; if not, write to the Free
  15. Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  16. 02111-1307 USA. */
  17. #ifndef _FPU_CONTROL_H
  18. #define _FPU_CONTROL_H
  19. /* MIPS FPU floating point control register bits.
  20. *
  21. * 31-25 -> floating point conditions code bits 7-1. These bits are only
  22. * available in MIPS IV.
  23. * 24 -> flush denormalized results to zero instead of
  24. * causing unimplemented operation exception. This bit is only
  25. * available for MIPS III and newer.
  26. * 23 -> Condition bit
  27. * 22-18 -> reserved (read as 0, write with 0)
  28. * 17 -> cause bit for unimplemented operation
  29. * 16 -> cause bit for invalid exception
  30. * 15 -> cause bit for division by zero exception
  31. * 14 -> cause bit for overflow exception
  32. * 13 -> cause bit for underflow exception
  33. * 12 -> cause bit for inexact exception
  34. * 11 -> enable exception for invalid exception
  35. * 10 -> enable exception for division by zero exception
  36. * 9 -> enable exception for overflow exception
  37. * 8 -> enable exception for underflow exception
  38. * 7 -> enable exception for inexact exception
  39. * 6 -> flag invalid exception
  40. * 5 -> flag division by zero exception
  41. * 4 -> flag overflow exception
  42. * 3 -> flag underflow exception
  43. * 2 -> flag inexact exception
  44. * 1-0 -> rounding control
  45. *
  46. *
  47. * Rounding Control:
  48. * 00 - rounding to nearest (RN)
  49. * 01 - rounding toward zero (RZ)
  50. * 10 - rounding (up) toward plus infinity (RP)
  51. * 11 - rounding (down)toward minus infinity (RM)
  52. */
  53. #include <features.h>
  54. /* masking of interrupts */
  55. #define _FPU_MASK_V 0x0800 /* Invalid operation */
  56. #define _FPU_MASK_Z 0x0400 /* Division by zero */
  57. #define _FPU_MASK_O 0x0200 /* Overflow */
  58. #define _FPU_MASK_U 0x0100 /* Underflow */
  59. #define _FPU_MASK_I 0x0080 /* Inexact operation */
  60. /* flush denormalized numbers to zero */
  61. #define _FPU_FLUSH_TZ 0x1000000
  62. /* rounding control */
  63. #define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */
  64. #define _FPU_RC_ZERO 0x1
  65. #define _FPU_RC_UP 0x2
  66. #define _FPU_RC_DOWN 0x3
  67. #define _FPU_RESERVED 0xfe3c0000 /* Reserved bits in cw */
  68. /* The fdlibm code requires strict IEEE double precision arithmetic,
  69. and no interrupts for exceptions, rounding to nearest. */
  70. #define _FPU_DEFAULT 0x00000000
  71. /* IEEE: same as above, but exceptions */
  72. #define _FPU_IEEE 0x00000F80
  73. /* Type of the control word. */
  74. typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
  75. /* Macros for accessing the hardware control word. */
  76. #define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
  77. #define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
  78. /* Default control word set at startup. */
  79. extern fpu_control_t __fpu_control;
  80. #endif /* fpu_control.h */