posix_fadvise64.c 1.6 KB

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  1. /*
  2. * posix_fadvise64() for uClibc
  3. * http://www.opengroup.org/onlinepubs/009695399/functions/posix_fadvise.html
  4. *
  5. * Copyright (C) 2000-2006 Erik Andersen <andersen@uclibc.org>
  6. *
  7. * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
  8. */
  9. #include <_lfs_64.h>
  10. #include <sys/syscall.h>
  11. #include <bits/wordsize.h>
  12. #ifdef __NR_arm_fadvise64_64
  13. # define __NR_fadvise64_64 __NR_arm_fadvise64_64
  14. #endif
  15. #if defined __NR_fadvise64_64 && __WORDSIZE == 32
  16. # include <fcntl.h>
  17. # include <endian.h>
  18. int posix_fadvise64(int fd, off64_t offset, off64_t len, int advice)
  19. {
  20. int ret;
  21. INTERNAL_SYSCALL_DECL (err);
  22. /* ARM has always been funky. */
  23. #if defined (__arm__) || defined (__nds32__) || defined (__csky__) || \
  24. (defined(__UCLIBC_SYSCALL_ALIGN_64BIT__) && (defined(__powerpc__) || defined(__xtensa__)))
  25. /* arch with 64-bit data in even reg alignment #1: [powerpc/xtensa]
  26. * custom syscall handler (rearranges @advice to avoid register hole punch) */
  27. ret = INTERNAL_SYSCALL (fadvise64_64, err, 6, fd, advice,
  28. OFF64_HI_LO (offset), OFF64_HI_LO (len));
  29. #elif defined(__UCLIBC_SYSCALL_ALIGN_64BIT__)
  30. /* arch with 64-bit data in even reg alignment #2: [arcv2/others-in-future]
  31. * stock syscall handler in kernel (reg hole punched) */
  32. ret = INTERNAL_SYSCALL (fadvise64_64, err, 7, fd, 0,
  33. OFF64_HI_LO (offset), OFF64_HI_LO (len),
  34. advice);
  35. # else
  36. ret = INTERNAL_SYSCALL (fadvise64_64, err, 6, fd,
  37. OFF64_HI_LO (offset), OFF64_HI_LO (len),
  38. advice);
  39. # endif
  40. if (INTERNAL_SYSCALL_ERROR_P (ret, err))
  41. return INTERNAL_SYSCALL_ERRNO (ret, err);
  42. return 0;
  43. }
  44. #endif