posix_fadvise64.c 1.6 KB

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  1. /* vi: set sw=4 ts=4: */
  2. /*
  3. * posix_fadvise64() for uClibc
  4. * http://www.opengroup.org/onlinepubs/009695399/functions/posix_fadvise.html
  5. *
  6. * Copyright (C) 2000-2006 Erik Andersen <andersen@uclibc.org>
  7. *
  8. * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
  9. */
  10. #include <_lfs_64.h>
  11. #include <sys/syscall.h>
  12. #include <bits/wordsize.h>
  13. #ifdef __NR_arm_fadvise64_64
  14. # define __NR_fadvise64_64 __NR_arm_fadvise64_64
  15. #endif
  16. #if defined __NR_fadvise64_64 && __WORDSIZE == 32
  17. # include <fcntl.h>
  18. # include <endian.h>
  19. int posix_fadvise64(int fd, off64_t offset, off64_t len, int advice)
  20. {
  21. int ret;
  22. INTERNAL_SYSCALL_DECL (err);
  23. /* ARM has always been funky. */
  24. #if defined (__arm__) || defined (__nds32__) || \
  25. (defined(__UCLIBC_SYSCALL_ALIGN_64BIT__) && (defined(__powerpc__) || defined(__xtensa__)))
  26. /* arch with 64-bit data in even reg alignment #1: [powerpc/xtensa]
  27. * custom syscall handler (rearranges @advice to avoid register hole punch) */
  28. ret = INTERNAL_SYSCALL (fadvise64_64, err, 6, fd, advice,
  29. OFF64_HI_LO (offset), OFF64_HI_LO (len));
  30. #elif defined(__UCLIBC_SYSCALL_ALIGN_64BIT__)
  31. /* arch with 64-bit data in even reg alignment #2: [arcv2/others-in-future]
  32. * stock syscall handler in kernel (reg hole punched) */
  33. ret = INTERNAL_SYSCALL (fadvise64_64, err, 7, fd, 0,
  34. OFF64_HI_LO (offset), OFF64_HI_LO (len),
  35. advice);
  36. # else
  37. ret = INTERNAL_SYSCALL (fadvise64_64, err, 6, fd,
  38. OFF64_HI_LO (offset), OFF64_HI_LO (len),
  39. advice);
  40. # endif
  41. if (INTERNAL_SYSCALL_ERROR_P (ret, err))
  42. return INTERNAL_SYSCALL_ERRNO (ret, err);
  43. return 0;
  44. }
  45. #endif