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- #ifndef _MIPS_BITS_ATOMIC_H
- #define _MIPS_BITS_ATOMIC_H 1
- #include <inttypes.h>
- #include <sgidefs.h>
- typedef int32_t atomic32_t;
- typedef uint32_t uatomic32_t;
- typedef int_fast32_t atomic_fast32_t;
- typedef uint_fast32_t uatomic_fast32_t;
- typedef int64_t atomic64_t;
- typedef uint64_t uatomic64_t;
- typedef int_fast64_t atomic_fast64_t;
- typedef uint_fast64_t uatomic_fast64_t;
- typedef intptr_t atomicptr_t;
- typedef uintptr_t uatomicptr_t;
- typedef intmax_t atomic_max_t;
- typedef uintmax_t uatomic_max_t;
- #if _MIPS_SIM == _ABIO32 && __mips < 2
- #define MIPS_PUSH_MIPS2 ".set mips2\n\t"
- #else
- #define MIPS_PUSH_MIPS2
- #endif
- #ifndef MIPS_SYNC
- # define MIPS_SYNC sync
- #endif
- #ifdef _MIPS_ARCH_R10000
- #define R10K_BEQZ_INSN "beqzl"
- #else
- #define R10K_BEQZ_INSN "beqz"
- #endif
- #define MIPS_SYNC_STR_2(X) #X
- #define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
- #define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
- #define __arch_compare_and_exchange_xxx_8_int(mem, newval, oldval, rel, acq) \
- (abort (), __prev = 0, __cmp = 0)
- #define __arch_compare_and_exchange_xxx_16_int(mem, newval, oldval, rel, acq) \
- (abort (), __prev = 0, __cmp = 0)
- #define __arch_compare_and_exchange_xxx_32_int(mem, newval, oldval, rel, acq) \
- __asm__ __volatile__ ( \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\t" \
- "ll %0,%5\n\t" \
- "move %1,$0\n\t" \
- "bne %0,%3,2f\n\t" \
- "move %1,%4\n\t" \
- "sc %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (oldval), "r" (newval), "m" (*mem) \
- : "memory")
- #if _MIPS_SIM == _ABIO32
- #define __arch_compare_and_exchange_xxx_64_int(mem, newval, oldval, rel, acq) \
- (abort (), __prev = 0, __cmp = 0)
- #else
- #define __arch_compare_and_exchange_xxx_64_int(mem, newval, oldval, rel, acq) \
- __asm__ __volatile__ ("\n" \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\t" \
- "lld %0,%5\n\t" \
- "move %1,$0\n\t" \
- "bne %0,%3,2f\n\t" \
- "move %1,%4\n\t" \
- "scd %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (oldval), "r" (newval), "m" (*mem) \
- : "memory")
- #endif
- #define __arch_compare_and_exchange_bool_8_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp; \
- __arch_compare_and_exchange_xxx_8_int(mem, new, old, rel, acq); \
- !__cmp; })
- #define __arch_compare_and_exchange_bool_16_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp; \
- __arch_compare_and_exchange_xxx_16_int(mem, new, old, rel, acq); \
- !__cmp; })
- #define __arch_compare_and_exchange_bool_32_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp; \
- __arch_compare_and_exchange_xxx_32_int(mem, new, old, rel, acq); \
- !__cmp; })
- #define __arch_compare_and_exchange_bool_64_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp; \
- __arch_compare_and_exchange_xxx_64_int(mem, new, old, rel, acq); \
- !__cmp; })
- #define __arch_compare_and_exchange_val_8_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp attribute_unused; \
- __arch_compare_and_exchange_xxx_8_int(mem, new, old, rel, acq); \
- (__typeof (*mem))__prev; })
- #define __arch_compare_and_exchange_val_16_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp attribute_unused; \
- __arch_compare_and_exchange_xxx_16_int(mem, new, old, rel, acq); \
- (__typeof (*mem))__prev; })
- #define __arch_compare_and_exchange_val_32_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp attribute_unused; \
- __arch_compare_and_exchange_xxx_32_int(mem, new, old, rel, acq); \
- (__typeof (*mem))__prev; })
- #define __arch_compare_and_exchange_val_64_int(mem, new, old, rel, acq) \
- ({ __typeof (*mem) __prev attribute_unused; int __cmp attribute_unused; \
- __arch_compare_and_exchange_xxx_64_int(mem, new, old, rel, acq); \
- (__typeof (*mem))__prev; })
- #define atomic_compare_and_exchange_bool_acq(mem, new, old) \
- __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
- mem, new, old, "", MIPS_SYNC_STR)
- #define atomic_compare_and_exchange_val_acq(mem, new, old) \
- __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
- mem, new, old, "", MIPS_SYNC_STR)
- #define atomic_compare_and_exchange_bool_rel(mem, new, old) \
- __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
- mem, new, old, MIPS_SYNC_STR, "")
- #define atomic_compare_and_exchange_val_rel(mem, new, old) \
- __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
- mem, new, old, MIPS_SYNC_STR, "")
- #define __arch_exchange_xxx_8_int(mem, newval, rel, acq) \
- (abort (), 0)
- #define __arch_exchange_xxx_16_int(mem, newval, rel, acq) \
- (abort (), 0)
- #define __arch_exchange_xxx_32_int(mem, newval, rel, acq) \
- ({ __typeof (*mem) __prev; int __cmp; \
- __asm__ __volatile__ ("\n" \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\t" \
- "ll %0,%4\n\t" \
- "move %1,%3\n\t" \
- "sc %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (newval), "m" (*mem) \
- : "memory"); \
- __prev; })
- #if _MIPS_SIM == _ABIO32
- #define __arch_exchange_xxx_64_int(mem, newval, rel, acq) \
- (abort (), 0)
- #else
- #define __arch_exchange_xxx_64_int(mem, newval, rel, acq) \
- ({ __typeof (*mem) __prev; int __cmp; \
- __asm__ __volatile__ ("\n" \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\n" \
- "lld %0,%4\n\t" \
- "move %1,%3\n\t" \
- "scd %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (newval), "m" (*mem) \
- : "memory"); \
- __prev; })
- #endif
- #define atomic_exchange_acq(mem, value) \
- __atomic_val_bysize (__arch_exchange_xxx, int, mem, value, "", MIPS_SYNC_STR)
- #define atomic_exchange_rel(mem, value) \
- __atomic_val_bysize (__arch_exchange_xxx, int, mem, value, MIPS_SYNC_STR, "")
- #define __arch_exchange_and_add_8_int(mem, newval, rel, acq) \
- (abort (), (__typeof(*mem)) 0)
- #define __arch_exchange_and_add_16_int(mem, newval, rel, acq) \
- (abort (), (__typeof(*mem)) 0)
- #define __arch_exchange_and_add_32_int(mem, value, rel, acq) \
- ({ __typeof (*mem) __prev; int __cmp; \
- __asm__ __volatile__ ("\n" \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\t" \
- "ll %0,%4\n\t" \
- "addu %1,%0,%3\n\t" \
- "sc %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (value), "m" (*mem) \
- : "memory"); \
- __prev; })
- #if _MIPS_SIM == _ABIO32
- #define __arch_exchange_and_add_64_int(mem, value, rel, acq) \
- (abort (), (__typeof(*mem)) 0)
- #else
- #define __arch_exchange_and_add_64_int(mem, value, rel, acq) \
- ({ __typeof (*mem) __prev; int __cmp; \
- __asm__ __volatile__ ( \
- ".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- rel "\n" \
- "1:\t" \
- "lld %0,%4\n\t" \
- "daddu %1,%0,%3\n\t" \
- "scd %1,%2\n\t" \
- R10K_BEQZ_INSN" %1,1b\n" \
- acq "\n\t" \
- ".set pop\n" \
- "2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
- : "r" (value), "m" (*mem) \
- : "memory"); \
- __prev; })
- #endif
- #define atomic_exchange_and_add(mem, value) \
- __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \
- MIPS_SYNC_STR, MIPS_SYNC_STR)
- #define atomic_full_barrier() \
- __asm__ __volatile__ (".set push\n\t" \
- MIPS_PUSH_MIPS2 \
- MIPS_SYNC_STR "\n\t" \
- ".set pop" : : : "memory")
- #endif
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