umul.S 4.6 KB

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  1. /*
  2. * Unsigned multiply. Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the
  3. * upper 32 bits of the 64-bit product).
  4. *
  5. * This code optimizes short (less than 13-bit) multiplies. Short
  6. * multiplies require 25 instruction cycles, and long ones require
  7. * 45 instruction cycles.
  8. *
  9. * On return, overflow has occurred (%o1 is not zero) if and only if
  10. * the Z condition code is clear, allowing, e.g., the following:
  11. *
  12. * call .umul
  13. * nop
  14. * bnz overflow (or tnz)
  15. */
  16. #include <sysdep.h>
  17. .global .umul;
  18. .align 4;
  19. .type .umul ,@function;
  20. .umul:
  21. or %o0, %o1, %o4
  22. mov %o0, %y ! multiplier -> Y
  23. andncc %o4, 0xfff, %g0 ! test bits 12..31 of *both* args
  24. be .Lmul_shortway ! if zero, can do it the short way
  25. andcc %g0, %g0, %o4 ! zero the partial product; clear N & V
  26. /*
  27. * Long multiply. 32 steps, followed by a final shift step.
  28. */
  29. mulscc %o4, %o1, %o4 ! 1
  30. mulscc %o4, %o1, %o4 ! 2
  31. mulscc %o4, %o1, %o4 ! 3
  32. mulscc %o4, %o1, %o4 ! 4
  33. mulscc %o4, %o1, %o4 ! 5
  34. mulscc %o4, %o1, %o4 ! 6
  35. mulscc %o4, %o1, %o4 ! 7
  36. mulscc %o4, %o1, %o4 ! 8
  37. mulscc %o4, %o1, %o4 ! 9
  38. mulscc %o4, %o1, %o4 ! 10
  39. mulscc %o4, %o1, %o4 ! 11
  40. mulscc %o4, %o1, %o4 ! 12
  41. mulscc %o4, %o1, %o4 ! 13
  42. mulscc %o4, %o1, %o4 ! 14
  43. mulscc %o4, %o1, %o4 ! 15
  44. mulscc %o4, %o1, %o4 ! 16
  45. mulscc %o4, %o1, %o4 ! 17
  46. mulscc %o4, %o1, %o4 ! 18
  47. mulscc %o4, %o1, %o4 ! 19
  48. mulscc %o4, %o1, %o4 ! 20
  49. mulscc %o4, %o1, %o4 ! 21
  50. mulscc %o4, %o1, %o4 ! 22
  51. mulscc %o4, %o1, %o4 ! 23
  52. mulscc %o4, %o1, %o4 ! 24
  53. mulscc %o4, %o1, %o4 ! 25
  54. mulscc %o4, %o1, %o4 ! 26
  55. mulscc %o4, %o1, %o4 ! 27
  56. mulscc %o4, %o1, %o4 ! 28
  57. mulscc %o4, %o1, %o4 ! 29
  58. mulscc %o4, %o1, %o4 ! 30
  59. mulscc %o4, %o1, %o4 ! 31
  60. mulscc %o4, %o1, %o4 ! 32
  61. mulscc %o4, %g0, %o4 ! final shift
  62. /*
  63. * Normally, with the shift-and-add approach, if both numbers are
  64. * positive you get the correct result. With 32-bit two's-complement
  65. * numbers, -x is represented as
  66. *
  67. * x 32
  68. * ( 2 - ------ ) mod 2 * 2
  69. * 32
  70. * 2
  71. *
  72. * (the `mod 2' subtracts 1 from 1.bbbb). To avoid lots of 2^32s,
  73. * we can treat this as if the radix point were just to the left
  74. * of the sign bit (multiply by 2^32), and get
  75. *
  76. * -x = (2 - x) mod 2
  77. *
  78. * Then, ignoring the `mod 2's for convenience:
  79. *
  80. * x * y = xy
  81. * -x * y = 2y - xy
  82. * x * -y = 2x - xy
  83. * -x * -y = 4 - 2x - 2y + xy
  84. *
  85. * For signed multiplies, we subtract (x << 32) from the partial
  86. * product to fix this problem for negative multipliers (see mul.s).
  87. * Because of the way the shift into the partial product is calculated
  88. * (N xor V), this term is automatically removed for the multiplicand,
  89. * so we don't have to adjust.
  90. *
  91. * But for unsigned multiplies, the high order bit wasn't a sign bit,
  92. * and the correction is wrong. So for unsigned multiplies where the
  93. * high order bit is one, we end up with xy - (y << 32). To fix it
  94. * we add y << 32.
  95. */
  96. #if 0
  97. tst %o1
  98. bl,a 1f ! if %o1 < 0 (high order bit = 1),
  99. add %o4, %o0, %o4 ! %o4 += %o0 (add y to upper half)
  100. 1: rd %y, %o0 ! get lower half of product
  101. retl
  102. addcc %o4, %g0, %o1 ! put upper half in place and set Z for %o1==0
  103. #else
  104. /* Faster code from tege@sics.se. */
  105. sra %o1, 31, %o2 ! make mask from sign bit
  106. and %o0, %o2, %o2 ! %o2 = 0 or %o0, depending on sign of %o1
  107. rd %y, %o0 ! get lower half of product
  108. retl
  109. addcc %o4, %o2, %o1 ! add compensation and put upper half in place
  110. #endif
  111. .Lmul_shortway:
  112. /*
  113. * Short multiply. 12 steps, followed by a final shift step.
  114. * The resulting bits are off by 12 and (32-12) = 20 bit positions,
  115. * but there is no problem with %o0 being negative (unlike above),
  116. * and overflow is impossible (the answer is at most 24 bits long).
  117. */
  118. mulscc %o4, %o1, %o4 ! 1
  119. mulscc %o4, %o1, %o4 ! 2
  120. mulscc %o4, %o1, %o4 ! 3
  121. mulscc %o4, %o1, %o4 ! 4
  122. mulscc %o4, %o1, %o4 ! 5
  123. mulscc %o4, %o1, %o4 ! 6
  124. mulscc %o4, %o1, %o4 ! 7
  125. mulscc %o4, %o1, %o4 ! 8
  126. mulscc %o4, %o1, %o4 ! 9
  127. mulscc %o4, %o1, %o4 ! 10
  128. mulscc %o4, %o1, %o4 ! 11
  129. mulscc %o4, %o1, %o4 ! 12
  130. mulscc %o4, %g0, %o4 ! final shift
  131. /*
  132. * %o4 has 20 of the bits that should be in the result; %y has
  133. * the bottom 12 (as %y's top 12). That is:
  134. *
  135. * %o4 %y
  136. * +----------------+----------------+
  137. * | -12- | -20- | -12- | -20- |
  138. * +------(---------+------)---------+
  139. * -----result-----
  140. *
  141. * The 12 bits of %o4 left of the `result' area are all zero;
  142. * in fact, all top 20 bits of %o4 are zero.
  143. */
  144. rd %y, %o5
  145. sll %o4, 12, %o0 ! shift middle bits left 12
  146. srl %o5, 20, %o5 ! shift low bits right 20
  147. or %o5, %o0, %o0
  148. retl
  149. addcc %g0, %g0, %o1 ! %o1 = zero, and set Z
  150. .size .umul , . -.umul