umul.S 4.5 KB

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  1. /*
  2. * Unsigned multiply. Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the
  3. * upper 32 bits of the 64-bit product).
  4. *
  5. * This code optimizes short (less than 13-bit) multiplies. Short
  6. * multiplies require 25 instruction cycles, and long ones require
  7. * 45 instruction cycles.
  8. *
  9. * On return, overflow has occurred (%o1 is not zero) if and only if
  10. * the Z condition code is clear, allowing, e.g., the following:
  11. *
  12. * call .umul
  13. * nop
  14. * bnz overflow (or tnz)
  15. */
  16. #include "DEFS.h"
  17. FUNC(.umul)
  18. or %o0, %o1, %o4
  19. mov %o0, %y ! multiplier -> Y
  20. andncc %o4, 0xfff, %g0 ! test bits 12..31 of *both* args
  21. be Lmul_shortway ! if zero, can do it the short way
  22. andcc %g0, %g0, %o4 ! zero the partial product and clear N and V
  23. /*
  24. * Long multiply. 32 steps, followed by a final shift step.
  25. */
  26. mulscc %o4, %o1, %o4 ! 1
  27. mulscc %o4, %o1, %o4 ! 2
  28. mulscc %o4, %o1, %o4 ! 3
  29. mulscc %o4, %o1, %o4 ! 4
  30. mulscc %o4, %o1, %o4 ! 5
  31. mulscc %o4, %o1, %o4 ! 6
  32. mulscc %o4, %o1, %o4 ! 7
  33. mulscc %o4, %o1, %o4 ! 8
  34. mulscc %o4, %o1, %o4 ! 9
  35. mulscc %o4, %o1, %o4 ! 10
  36. mulscc %o4, %o1, %o4 ! 11
  37. mulscc %o4, %o1, %o4 ! 12
  38. mulscc %o4, %o1, %o4 ! 13
  39. mulscc %o4, %o1, %o4 ! 14
  40. mulscc %o4, %o1, %o4 ! 15
  41. mulscc %o4, %o1, %o4 ! 16
  42. mulscc %o4, %o1, %o4 ! 17
  43. mulscc %o4, %o1, %o4 ! 18
  44. mulscc %o4, %o1, %o4 ! 19
  45. mulscc %o4, %o1, %o4 ! 20
  46. mulscc %o4, %o1, %o4 ! 21
  47. mulscc %o4, %o1, %o4 ! 22
  48. mulscc %o4, %o1, %o4 ! 23
  49. mulscc %o4, %o1, %o4 ! 24
  50. mulscc %o4, %o1, %o4 ! 25
  51. mulscc %o4, %o1, %o4 ! 26
  52. mulscc %o4, %o1, %o4 ! 27
  53. mulscc %o4, %o1, %o4 ! 28
  54. mulscc %o4, %o1, %o4 ! 29
  55. mulscc %o4, %o1, %o4 ! 30
  56. mulscc %o4, %o1, %o4 ! 31
  57. mulscc %o4, %o1, %o4 ! 32
  58. mulscc %o4, %g0, %o4 ! final shift
  59. /*
  60. * Normally, with the shift-and-add approach, if both numbers are
  61. * positive you get the correct result. With 32-bit two's-complement
  62. * numbers, -x is represented as
  63. *
  64. * x 32
  65. * ( 2 - ------ ) mod 2 * 2
  66. * 32
  67. * 2
  68. *
  69. * (the `mod 2' subtracts 1 from 1.bbbb). To avoid lots of 2^32s,
  70. * we can treat this as if the radix point were just to the left
  71. * of the sign bit (multiply by 2^32), and get
  72. *
  73. * -x = (2 - x) mod 2
  74. *
  75. * Then, ignoring the `mod 2's for convenience:
  76. *
  77. * x * y = xy
  78. * -x * y = 2y - xy
  79. * x * -y = 2x - xy
  80. * -x * -y = 4 - 2x - 2y + xy
  81. *
  82. * For signed multiplies, we subtract (x << 32) from the partial
  83. * product to fix this problem for negative multipliers (see mul.s).
  84. * Because of the way the shift into the partial product is calculated
  85. * (N xor V), this term is automatically removed for the multiplicand,
  86. * so we don't have to adjust.
  87. *
  88. * But for unsigned multiplies, the high order bit wasn't a sign bit,
  89. * and the correction is wrong. So for unsigned multiplies where the
  90. * high order bit is one, we end up with xy - (y << 32). To fix it
  91. * we add y << 32.
  92. */
  93. #if 0
  94. tst %o1
  95. bl,a 1f ! if %o1 < 0 (high order bit = 1),
  96. add %o4, %o0, %o4 ! %o4 += %o0 (add y to upper half)
  97. 1: rd %y, %o0 ! get lower half of product
  98. retl
  99. addcc %o4, %g0, %o1 ! put upper half in place and set Z for %o1==0
  100. #else
  101. /* Faster code from tege@sics.se. */
  102. sra %o1, 31, %o2 ! make mask from sign bit
  103. and %o0, %o2, %o2 ! %o2 = 0 or %o0, depending on sign of %o1
  104. rd %y, %o0 ! get lower half of product
  105. retl
  106. addcc %o4, %o2, %o1 ! add compensation and put upper half in place
  107. #endif
  108. Lmul_shortway:
  109. /*
  110. * Short multiply. 12 steps, followed by a final shift step.
  111. * The resulting bits are off by 12 and (32-12) = 20 bit positions,
  112. * but there is no problem with %o0 being negative (unlike above),
  113. * and overflow is impossible (the answer is at most 24 bits long).
  114. */
  115. mulscc %o4, %o1, %o4 ! 1
  116. mulscc %o4, %o1, %o4 ! 2
  117. mulscc %o4, %o1, %o4 ! 3
  118. mulscc %o4, %o1, %o4 ! 4
  119. mulscc %o4, %o1, %o4 ! 5
  120. mulscc %o4, %o1, %o4 ! 6
  121. mulscc %o4, %o1, %o4 ! 7
  122. mulscc %o4, %o1, %o4 ! 8
  123. mulscc %o4, %o1, %o4 ! 9
  124. mulscc %o4, %o1, %o4 ! 10
  125. mulscc %o4, %o1, %o4 ! 11
  126. mulscc %o4, %o1, %o4 ! 12
  127. mulscc %o4, %g0, %o4 ! final shift
  128. /*
  129. * %o4 has 20 of the bits that should be in the result; %y has
  130. * the bottom 12 (as %y's top 12). That is:
  131. *
  132. * %o4 %y
  133. * +----------------+----------------+
  134. * | -12- | -20- | -12- | -20- |
  135. * +------(---------+------)---------+
  136. * -----result-----
  137. *
  138. * The 12 bits of %o4 left of the `result' area are all zero;
  139. * in fact, all top 20 bits of %o4 are zero.
  140. */
  141. rd %y, %o5
  142. sll %o4, 12, %o0 ! shift middle bits left 12
  143. srl %o5, 20, %o5 ! shift low bits right 20
  144. or %o5, %o0, %o0
  145. retl
  146. addcc %g0, %g0, %o1 ! %o1 = zero, and set Z