fpu_control.h 3.1 KB

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  1. /* FPU control word definitions. PowerPC and PowerPC e500 versions.
  2. Copyright (C) 1996, 1997, 1998, 2004 Free Software Foundation, Inc.
  3. This file is part of the GNU C Library.
  4. e500 parts contributed by Aldy Hernandez <aldy@redhat.com>.
  5. The GNU C Library is free software; you can redistribute it and/or
  6. modify it under the terms of the GNU Lesser General Public
  7. License as published by the Free Software Foundation; either
  8. version 2.1 of the License, or (at your option) any later version.
  9. The GNU C Library is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. Lesser General Public License for more details.
  13. You should have received a copy of the GNU Lesser General Public
  14. License along with the GNU C Library; if not, write to the Free
  15. Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  16. 02111-1307 USA. */
  17. #ifndef _FPU_CONTROL_H
  18. #define _FPU_CONTROL_H
  19. #include <features.h>
  20. /* rounding control */
  21. #define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */
  22. #define _FPU_RC_DOWN 0x03
  23. #define _FPU_RC_UP 0x02
  24. #define _FPU_RC_ZERO 0x01
  25. #define _FPU_MASK_NI 0x04 /* non-ieee mode */
  26. /* masking of interrupts */
  27. #define _FPU_MASK_ZM 0x10 /* zero divide */
  28. #define _FPU_MASK_OM 0x40 /* overflow */
  29. #define _FPU_MASK_UM 0x20 /* underflow */
  30. #define _FPU_MASK_XM 0x08 /* inexact */
  31. #define _FPU_MASK_IM 0x80 /* invalid operation */
  32. /* The fdlibm code requires no interrupts for exceptions. */
  33. #define _FPU_DEFAULT 0x00000000 /* Default value. */
  34. /* Type of the control word. */
  35. typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
  36. #ifdef __CONFIG_E500__
  37. #define _FPU_RESERVED 0xff3fff7f /* These bits are reserved are not changed. */
  38. /* IEEE: same as above, but (some) exceptions;
  39. we leave the 'inexact' exception off.
  40. */
  41. #define _FPU_IEEE 0x000003c0
  42. /* Macros for accessing the hardware control word. */
  43. #define _FPU_GETCW(__cw) ({ \
  44. unsigned int env; \
  45. asm volatile ("mfspefscr %0" : "=r" (env)); \
  46. (__cw) = env; })
  47. #define _FPU_SETCW(__cw) ({ \
  48. unsigned int env = __cw; \
  49. asm volatile ("mtspefscr %0" : : "r" (env)); })
  50. #else
  51. #define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
  52. /* IEEE: same as above, but (some) exceptions;
  53. we leave the 'inexact' exception off.
  54. */
  55. #define _FPU_IEEE 0x000000f0
  56. /* Macros for accessing the hardware control word. */
  57. #define _FPU_GETCW(__cw) ( { \
  58. union { double d; fpu_control_t cw[2]; } \
  59. tmp __attribute__ ((__aligned__(8))); \
  60. __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
  61. (__cw)=tmp.cw[1]; \
  62. tmp.cw[1]; } )
  63. #define _FPU_SETCW(__cw) { \
  64. union { double d; fpu_control_t cw[2]; } \
  65. tmp __attribute__ ((__aligned__(8))); \
  66. tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
  67. tmp.cw[1] = __cw; \
  68. __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
  69. }
  70. #endif /* __CONFIG_E500__ */
  71. #if 0
  72. /* Default control word set at startup. */
  73. extern fpu_control_t __fpu_control;
  74. #endif
  75. #endif /* _FPU_CONTROL_H */