fpu_control.h 3.1 KB

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  1. /* FPU control word definitions. PowerPC and PowerPC e500 versions.
  2. Copyright (C) 1996, 1997, 1998, 2004 Free Software Foundation, Inc.
  3. This file is part of the GNU C Library.
  4. e500 parts contributed by Aldy Hernandez <aldy@redhat.com>.
  5. The GNU C Library is free software; you can redistribute it and/or
  6. modify it under the terms of the GNU Lesser General Public
  7. License as published by the Free Software Foundation; either
  8. version 2.1 of the License, or (at your option) any later version.
  9. The GNU C Library is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. Lesser General Public License for more details.
  13. You should have received a copy of the GNU Lesser General Public
  14. License along with the GNU C Library; if not, see
  15. <http://www.gnu.org/licenses/>. */
  16. #ifndef _FPU_CONTROL_H
  17. #define _FPU_CONTROL_H
  18. #include <features.h>
  19. /* rounding control */
  20. #define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */
  21. #define _FPU_RC_DOWN 0x03
  22. #define _FPU_RC_UP 0x02
  23. #define _FPU_RC_ZERO 0x01
  24. #define _FPU_MASK_NI 0x04 /* non-ieee mode */
  25. /* masking of interrupts */
  26. #define _FPU_MASK_ZM 0x10 /* zero divide */
  27. #define _FPU_MASK_OM 0x40 /* overflow */
  28. #define _FPU_MASK_UM 0x20 /* underflow */
  29. #define _FPU_MASK_XM 0x08 /* inexact */
  30. #define _FPU_MASK_IM 0x80 /* invalid operation */
  31. /* The fdlibm code requires no interrupts for exceptions. */
  32. #define _FPU_DEFAULT 0x00000000 /* Default value. */
  33. /* Type of the control word. */
  34. typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
  35. #ifdef __CONFIG_E500__
  36. #define _FPU_RESERVED 0xff3fff7f /* These bits are reserved are not changed. */
  37. /* IEEE: same as above, but (some) exceptions;
  38. we leave the 'inexact' exception off.
  39. */
  40. #define _FPU_IEEE 0x000003c0
  41. /* Macros for accessing the hardware control word. */
  42. #define _FPU_GETCW(__cw) ({ \
  43. unsigned int env; \
  44. __asm__ __volatile__ ("mfspefscr %0" : "=r" (env)); \
  45. (__cw) = env; })
  46. #define _FPU_SETCW(__cw) ({ \
  47. unsigned int env = __cw; \
  48. __asm__ __volatile__ ("mtspefscr %0" : : "r" (env)); })
  49. #else
  50. #define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
  51. /* IEEE: same as above, but (some) exceptions;
  52. we leave the 'inexact' exception off.
  53. */
  54. #define _FPU_IEEE 0x000000f0
  55. /* Macros for accessing the hardware control word. */
  56. #define _FPU_GETCW(__cw) ( { \
  57. union { double d; fpu_control_t cw[2]; } \
  58. tmp __attribute__ ((__aligned__(8))); \
  59. __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
  60. (__cw)=tmp.cw[1]; \
  61. tmp.cw[1]; } )
  62. #define _FPU_SETCW(__cw) { \
  63. union { double d; fpu_control_t cw[2]; } \
  64. tmp __attribute__ ((__aligned__(8))); \
  65. tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
  66. tmp.cw[1] = __cw; \
  67. __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
  68. }
  69. #endif /* __CONFIG_E500__ */
  70. #if 0
  71. /* Default control word set at startup. */
  72. extern fpu_control_t __fpu_control;
  73. #endif
  74. #endif /* _FPU_CONTROL_H */