atomic.h 13 KB

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  1. /* Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
  2. This file is part of the GNU C Library.
  3. Contributed by Ulrich Drepper <drepper@redhat.com>, 2002.
  4. The GNU C Library is free software; you can redistribute it and/or
  5. modify it under the terms of the GNU Lesser General Public
  6. License as published by the Free Software Foundation; either
  7. version 2.1 of the License, or (at your option) any later version.
  8. The GNU C Library is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. Lesser General Public License for more details.
  12. You should have received a copy of the GNU Lesser General Public
  13. License along with the GNU C Library; if not, write to the Free
  14. Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  15. 02111-1307 USA. */
  16. #include <stdint.h>
  17. typedef int8_t atomic8_t;
  18. typedef uint8_t uatomic8_t;
  19. typedef int_fast8_t atomic_fast8_t;
  20. typedef uint_fast8_t uatomic_fast8_t;
  21. typedef int16_t atomic16_t;
  22. typedef uint16_t uatomic16_t;
  23. typedef int_fast16_t atomic_fast16_t;
  24. typedef uint_fast16_t uatomic_fast16_t;
  25. typedef int32_t atomic32_t;
  26. typedef uint32_t uatomic32_t;
  27. typedef int_fast32_t atomic_fast32_t;
  28. typedef uint_fast32_t uatomic_fast32_t;
  29. typedef int64_t atomic64_t;
  30. typedef uint64_t uatomic64_t;
  31. typedef int_fast64_t atomic_fast64_t;
  32. typedef uint_fast64_t uatomic_fast64_t;
  33. typedef intptr_t atomicptr_t;
  34. typedef uintptr_t uatomicptr_t;
  35. typedef intmax_t atomic_max_t;
  36. typedef uintmax_t uatomic_max_t;
  37. #ifndef LOCK_PREFIX
  38. # ifdef UP
  39. # define LOCK_PREFIX /* nothing */
  40. # else
  41. # define LOCK_PREFIX "lock;"
  42. # endif
  43. #endif
  44. #define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
  45. ({ __typeof (*mem) ret; \
  46. __asm __volatile (LOCK_PREFIX "cmpxchgb %b2, %1" \
  47. : "=a" (ret), "=m" (*mem) \
  48. : "q" (newval), "m" (*mem), "0" (oldval)); \
  49. ret; })
  50. #define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
  51. ({ __typeof (*mem) ret; \
  52. __asm __volatile (LOCK_PREFIX "cmpxchgw %w2, %1" \
  53. : "=a" (ret), "=m" (*mem) \
  54. : "r" (newval), "m" (*mem), "0" (oldval)); \
  55. ret; })
  56. #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
  57. ({ __typeof (*mem) ret; \
  58. __asm __volatile (LOCK_PREFIX "cmpxchgl %2, %1" \
  59. : "=a" (ret), "=m" (*mem) \
  60. : "r" (newval), "m" (*mem), "0" (oldval)); \
  61. ret; })
  62. /* XXX We do not really need 64-bit compare-and-exchange. At least
  63. not in the moment. Using it would mean causing portability
  64. problems since not many other 32-bit architectures have support for
  65. such an operation. So don't define any code for now. If it is
  66. really going to be used the code below can be used on Intel Pentium
  67. and later, but NOT on i486. */
  68. #if 1
  69. # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
  70. ({ __typeof (*mem) ret = *(mem); abort (); ret = (newval); ret = (oldval); })
  71. #else
  72. # ifdef __PIC__
  73. # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
  74. ({ __typeof (*mem) ret; \
  75. __asm __volatile ("xchgl %2, %%ebx\n\t" \
  76. LOCK_PREFIX "cmpxchg8b %1\n\t" \
  77. "xchgl %2, %%ebx" \
  78. : "=A" (ret), "=m" (*mem) \
  79. : "DS" (((unsigned long long int) (newval)) \
  80. & 0xffffffff), \
  81. "c" (((unsigned long long int) (newval)) >> 32), \
  82. "m" (*mem), "a" (((unsigned long long int) (oldval)) \
  83. & 0xffffffff), \
  84. "d" (((unsigned long long int) (oldval)) >> 32)); \
  85. ret; })
  86. # else
  87. # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
  88. ({ __typeof (*mem) ret; \
  89. __asm __volatile (LOCK_PREFIX "cmpxchg8b %1" \
  90. : "=A" (ret), "=m" (*mem) \
  91. : "b" (((unsigned long long int) (newval)) \
  92. & 0xffffffff), \
  93. "c" (((unsigned long long int) (newval)) >> 32), \
  94. "m" (*mem), "a" (((unsigned long long int) (oldval)) \
  95. & 0xffffffff), \
  96. "d" (((unsigned long long int) (oldval)) >> 32)); \
  97. ret; })
  98. # endif
  99. #endif
  100. /* Note that we need no lock prefix. */
  101. #define atomic_exchange_acq(mem, newvalue) \
  102. ({ __typeof (*mem) result; \
  103. if (sizeof (*mem) == 1) \
  104. __asm __volatile ("xchgb %b0, %1" \
  105. : "=r" (result), "=m" (*mem) \
  106. : "0" (newvalue), "m" (*mem)); \
  107. else if (sizeof (*mem) == 2) \
  108. __asm __volatile ("xchgw %w0, %1" \
  109. : "=r" (result), "=m" (*mem) \
  110. : "0" (newvalue), "m" (*mem)); \
  111. else if (sizeof (*mem) == 4) \
  112. __asm __volatile ("xchgl %0, %1" \
  113. : "=r" (result), "=m" (*mem) \
  114. : "0" (newvalue), "m" (*mem)); \
  115. else \
  116. { \
  117. result = 0; \
  118. abort (); \
  119. } \
  120. result; })
  121. #define atomic_exchange_and_add(mem, value) \
  122. ({ __typeof (*mem) __result; \
  123. __typeof (value) __addval = (value); \
  124. if (sizeof (*mem) == 1) \
  125. __asm __volatile (LOCK_PREFIX "xaddb %b0, %1" \
  126. : "=r" (__result), "=m" (*mem) \
  127. : "0" (__addval), "m" (*mem)); \
  128. else if (sizeof (*mem) == 2) \
  129. __asm __volatile (LOCK_PREFIX "xaddw %w0, %1" \
  130. : "=r" (__result), "=m" (*mem) \
  131. : "0" (__addval), "m" (*mem)); \
  132. else if (sizeof (*mem) == 4) \
  133. __asm __volatile (LOCK_PREFIX "xaddl %0, %1" \
  134. : "=r" (__result), "=m" (*mem) \
  135. : "0" (__addval), "m" (*mem)); \
  136. else \
  137. { \
  138. __typeof (mem) __memp = (mem); \
  139. __typeof (*mem) __tmpval; \
  140. __result = *__memp; \
  141. do \
  142. __tmpval = __result; \
  143. while ((__result = __arch_compare_and_exchange_val_64_acq \
  144. (__memp, __result + __addval, __result)) == __tmpval); \
  145. } \
  146. __result; })
  147. #define atomic_add(mem, value) \
  148. (void) ({ if (__builtin_constant_p (value) && (value) == 1) \
  149. atomic_increment (mem); \
  150. else if (__builtin_constant_p (value) && (value) == -1) \
  151. atomic_decrement (mem); \
  152. else if (sizeof (*mem) == 1) \
  153. __asm __volatile (LOCK_PREFIX "addb %b1, %0" \
  154. : "=m" (*mem) \
  155. : "ir" (value), "m" (*mem)); \
  156. else if (sizeof (*mem) == 2) \
  157. __asm __volatile (LOCK_PREFIX "addw %w1, %0" \
  158. : "=m" (*mem) \
  159. : "ir" (value), "m" (*mem)); \
  160. else if (sizeof (*mem) == 4) \
  161. __asm __volatile (LOCK_PREFIX "addl %1, %0" \
  162. : "=m" (*mem) \
  163. : "ir" (value), "m" (*mem)); \
  164. else \
  165. { \
  166. __typeof (value) __addval = (value); \
  167. __typeof (mem) __memp = (mem); \
  168. __typeof (*mem) __oldval = *__memp; \
  169. __typeof (*mem) __tmpval; \
  170. do \
  171. __tmpval = __oldval; \
  172. while ((__oldval = __arch_compare_and_exchange_val_64_acq \
  173. (__memp, __oldval + __addval, __oldval)) == __tmpval); \
  174. } \
  175. })
  176. #define atomic_add_negative(mem, value) \
  177. ({ unsigned char __result; \
  178. if (sizeof (*mem) == 1) \
  179. __asm __volatile (LOCK_PREFIX "addb %b2, %0; sets %1" \
  180. : "=m" (*mem), "=qm" (__result) \
  181. : "iq" (value), "m" (*mem)); \
  182. else if (sizeof (*mem) == 2) \
  183. __asm __volatile (LOCK_PREFIX "addw %w2, %0; sets %1" \
  184. : "=m" (*mem), "=qm" (__result) \
  185. : "ir" (value), "m" (*mem)); \
  186. else if (sizeof (*mem) == 4) \
  187. __asm __volatile (LOCK_PREFIX "addl %2, %0; sets %1" \
  188. : "=m" (*mem), "=qm" (__result) \
  189. : "ir" (value), "m" (*mem)); \
  190. else \
  191. abort (); \
  192. __result; })
  193. #define atomic_add_zero(mem, value) \
  194. ({ unsigned char __result; \
  195. if (sizeof (*mem) == 1) \
  196. __asm __volatile (LOCK_PREFIX "addb %b2, %0; setz %1" \
  197. : "=m" (*mem), "=qm" (__result) \
  198. : "ir" (value), "m" (*mem)); \
  199. else if (sizeof (*mem) == 2) \
  200. __asm __volatile (LOCK_PREFIX "addw %w2, %0; setz %1" \
  201. : "=m" (*mem), "=qm" (__result) \
  202. : "ir" (value), "m" (*mem)); \
  203. else if (sizeof (*mem) == 4) \
  204. __asm __volatile (LOCK_PREFIX "addl %2, %0; setz %1" \
  205. : "=m" (*mem), "=qm" (__result) \
  206. : "ir" (value), "m" (*mem)); \
  207. else \
  208. abort (); \
  209. __result; })
  210. #define atomic_increment(mem) \
  211. (void) ({ if (sizeof (*mem) == 1) \
  212. __asm __volatile (LOCK_PREFIX "incb %b0" \
  213. : "=m" (*mem) \
  214. : "m" (*mem)); \
  215. else if (sizeof (*mem) == 2) \
  216. __asm __volatile (LOCK_PREFIX "incw %w0" \
  217. : "=m" (*mem) \
  218. : "m" (*mem)); \
  219. else if (sizeof (*mem) == 4) \
  220. __asm __volatile (LOCK_PREFIX "incl %0" \
  221. : "=m" (*mem) \
  222. : "m" (*mem)); \
  223. else \
  224. { \
  225. __typeof (mem) __memp = (mem); \
  226. __typeof (*mem) __oldval = *__memp; \
  227. __typeof (*mem) __tmpval; \
  228. do \
  229. __tmpval = __oldval; \
  230. while ((__oldval = __arch_compare_and_exchange_val_64_acq \
  231. (__memp, __oldval + 1, __oldval)) == __tmpval); \
  232. } \
  233. })
  234. #define atomic_increment_and_test(mem) \
  235. ({ unsigned char __result; \
  236. if (sizeof (*mem) == 1) \
  237. __asm __volatile (LOCK_PREFIX "incb %0; sete %b1" \
  238. : "=m" (*mem), "=qm" (__result) \
  239. : "m" (*mem)); \
  240. else if (sizeof (*mem) == 2) \
  241. __asm __volatile (LOCK_PREFIX "incw %0; sete %w1" \
  242. : "=m" (*mem), "=qm" (__result) \
  243. : "m" (*mem)); \
  244. else if (sizeof (*mem) == 4) \
  245. __asm __volatile (LOCK_PREFIX "incl %0; sete %1" \
  246. : "=m" (*mem), "=qm" (__result) \
  247. : "m" (*mem)); \
  248. else \
  249. abort (); \
  250. __result; })
  251. #define atomic_decrement(mem) \
  252. (void) ({ if (sizeof (*mem) == 1) \
  253. __asm __volatile (LOCK_PREFIX "decb %b0" \
  254. : "=m" (*mem) \
  255. : "m" (*mem)); \
  256. else if (sizeof (*mem) == 2) \
  257. __asm __volatile (LOCK_PREFIX "decw %w0" \
  258. : "=m" (*mem) \
  259. : "m" (*mem)); \
  260. else if (sizeof (*mem) == 4) \
  261. __asm __volatile (LOCK_PREFIX "decl %0" \
  262. : "=m" (*mem) \
  263. : "m" (*mem)); \
  264. else \
  265. { \
  266. __typeof (mem) __memp = (mem); \
  267. __typeof (*mem) __oldval = *__memp; \
  268. __typeof (*mem) __tmpval; \
  269. do \
  270. __tmpval = __oldval; \
  271. while ((__oldval = __arch_compare_and_exchange_val_64_acq \
  272. (__memp, __oldval - 1, __oldval)) == __tmpval); \
  273. } \
  274. })
  275. #define atomic_decrement_and_test(mem) \
  276. ({ unsigned char __result; \
  277. if (sizeof (*mem) == 1) \
  278. __asm __volatile (LOCK_PREFIX "decb %b0; sete %1" \
  279. : "=m" (*mem), "=qm" (__result) \
  280. : "m" (*mem)); \
  281. else if (sizeof (*mem) == 2) \
  282. __asm __volatile (LOCK_PREFIX "decw %w0; sete %1" \
  283. : "=m" (*mem), "=qm" (__result) \
  284. : "m" (*mem)); \
  285. else if (sizeof (*mem) == 4) \
  286. __asm __volatile (LOCK_PREFIX "decl %0; sete %1" \
  287. : "=m" (*mem), "=qm" (__result) \
  288. : "m" (*mem)); \
  289. else \
  290. abort (); \
  291. __result; })
  292. #define atomic_bit_set(mem, bit) \
  293. (void) ({ if (sizeof (*mem) == 1) \
  294. __asm __volatile (LOCK_PREFIX "orb %b2, %0" \
  295. : "=m" (*mem) \
  296. : "m" (*mem), "ir" (1 << (bit))); \
  297. else if (sizeof (*mem) == 2) \
  298. __asm __volatile (LOCK_PREFIX "orw %w2, %0" \
  299. : "=m" (*mem) \
  300. : "m" (*mem), "ir" (1 << (bit))); \
  301. else if (sizeof (*mem) == 4) \
  302. __asm __volatile (LOCK_PREFIX "orl %2, %0" \
  303. : "=m" (*mem) \
  304. : "m" (*mem), "ir" (1 << (bit))); \
  305. else \
  306. abort (); \
  307. })
  308. #define atomic_bit_test_set(mem, bit) \
  309. ({ unsigned char __result; \
  310. if (sizeof (*mem) == 1) \
  311. __asm __volatile (LOCK_PREFIX "btsb %3, %1; setc %0" \
  312. : "=q" (__result), "=m" (*mem) \
  313. : "m" (*mem), "ir" (bit)); \
  314. else if (sizeof (*mem) == 2) \
  315. __asm __volatile (LOCK_PREFIX "btsw %3, %1; setc %0" \
  316. : "=q" (__result), "=m" (*mem) \
  317. : "m" (*mem), "ir" (bit)); \
  318. else if (sizeof (*mem) == 4) \
  319. __asm __volatile (LOCK_PREFIX "btsl %3, %1; setc %0" \
  320. : "=q" (__result), "=m" (*mem) \
  321. : "m" (*mem), "ir" (bit)); \
  322. else \
  323. abort (); \
  324. __result; })
  325. #define atomic_delay() asm ("rep; nop")