fpu_control.h 6.2 KB

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  1. /* FPU control word bits. C-SKY version.
  2. Copyright (C) 2018-2025 Free Software Foundation, Inc.
  3. The GNU C Library is free software; you can redistribute it and/or
  4. modify it under the terms of the GNU Lesser General Public
  5. License as published by the Free Software Foundation; either
  6. version 2.1 of the License, or (at your option) any later version.
  7. The GNU C Library is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  10. Lesser General Public License for more details.
  11. You should have received a copy of the GNU Lesser General Public
  12. License along with the GNU C Library. If not, see
  13. <https://www.gnu.org/licenses/>. */
  14. #ifndef _FPU_CONTROL_H
  15. #define _FPU_CONTROL_H
  16. /* C-SKY FPU floating point control register bits.
  17. 31-28 -> Reserved (read as 0, write with 0).
  18. 27 -> 0: Flush denormalized results to zero.
  19. 1: Flush denormalized results to signed minimal normal number.
  20. 26 -> Reserved (read as 0, write with 0).
  21. 25-24 -> Rounding control.
  22. 23-6 -> Reserved (read as 0, write with 0).
  23. 5 -> Enable exception for input denormalized exception.
  24. 4 -> Enable exception for inexact exception.
  25. 3 -> Enable exception for underflow exception.
  26. 2 -> Enable exception for overflow exception.
  27. 1 -> Enable exception for division by zero exception.
  28. 0 -> Enable exception for invalid operation exception.
  29. Rounding Control:
  30. 00 - Rounding to nearest (RN).
  31. 01 - Rounding toward zero (RZ).
  32. 10 - Rounding (up) toward plus infinity (RP).
  33. 11 - Rounding (down)toward minus infinity (RM).
  34. C-SKY FPU floating point exception status register bits.
  35. 15 -> Accumulate bit for any exception.
  36. 14 -> Reserved (read as 0, write with 0).
  37. 13 -> Cause bit for input denormalized exception.
  38. 12 -> Cause bit for inexact exception.
  39. 11 -> Cause bit for underflow exception.
  40. 10 -> Cause bit for overflow exception.
  41. 9 -> Cause bit for division by zero exception.
  42. 8 -> Cause bit for invalid operation exception.
  43. 7 -> Flag bit for any exception.
  44. 6 -> Reserved (read as 0, write with 0).
  45. 5 -> Flag exception for input denormalized exception.
  46. 4 -> Flag exception for inexact exception.
  47. 3 -> Flag exception for underflow exception.
  48. 2 -> Flag exception for overflow exception.
  49. 1 -> Flag exception for division by zero exception.
  50. 0 -> Flag exception for invalid operation exception. */
  51. #include <features.h>
  52. #ifdef __csky_soft_float__
  53. # define _FPU_RESERVED 0xffffffff
  54. # define _FPU_DEFAULT 0x00000000
  55. typedef unsigned int fpu_control_t;
  56. # define _FPU_GETCW(cw) (cw) = 0
  57. # define _FPU_SETCW(cw) (void) (cw)
  58. # define _FPU_GETFPSR(cw) (cw) = 0
  59. # define _FPU_SETFPSR(cw) (void) (cw)
  60. extern fpu_control_t __fpu_control;
  61. #else /* __csky_soft_float__ */
  62. /* Masking of interrupts. */
  63. # define _FPU_MASK_IDE (1 << 5) /* Input denormalized exception. */
  64. # define _FPU_MASK_IXE (1 << 4) /* Inexact exception. */
  65. # define _FPU_MASK_UFE (1 << 3) /* Underflow exception. */
  66. # define _FPU_MASK_OFE (1 << 2) /* Overflow exception. */
  67. # define _FPU_MASK_DZE (1 << 1) /* Division by zero exception. */
  68. # define _FPU_MASK_IOE (1 << 0) /* Invalid operation exception. */
  69. # define _FPU_MASK_FEA (1 << 15) /* Case for any exception. */
  70. # define _FPU_MASK_FEC (1 << 7) /* Flag for any exception. */
  71. /* Flush denormalized numbers to zero. */
  72. # define _FPU_FLUSH_TZ 0x8000000
  73. /* Rounding control. */
  74. # define _FPU_RC_NEAREST (0x0 << 24) /* RECOMMENDED. */
  75. # define _FPU_RC_ZERO (0x1 << 24)
  76. # define _FPU_RC_UP (0x2 << 24)
  77. # define _FPU_RC_DOWN (0x3 << 24)
  78. # define _FPU_RESERVED 0xf460ffc0 /* Reserved bits in cw. */
  79. # define _FPU_FPSR_RESERVED 0xffff4040
  80. /* The fdlibm code requires strict IEEE double precision arithmetic,
  81. and no interrupts for exceptions, rounding to nearest. */
  82. # define _FPU_DEFAULT 0x00000000
  83. # define _FPU_FPSR_DEFAULT 0x00000000
  84. /* IEEE: same as above, but exceptions. */
  85. # define _FPU_FPCR_IEEE 0x0000001F
  86. # define _FPU_FPSR_IEEE 0x00000000
  87. /* Type of the control word. */
  88. typedef unsigned int fpu_control_t;
  89. /* Macros for accessing the hardware control word. */
  90. # if (__CSKY__ == 2)
  91. # define _FPU_GETCW(cw) __asm__ volatile ("mfcr %0, cr<1, 2>" : "=a" (cw))
  92. # define _FPU_SETCW(cw) __asm__ volatile ("mtcr %0, cr<1, 2>" : : "a" (cw))
  93. # define _FPU_GETFPSR(cw) __asm__ volatile ("mfcr %0, cr<2, 2>" : "=a" (cw))
  94. # define _FPU_SETFPSR(cw) __asm__ volatile ("mtcr %0, cr<2, 2>" : : "a" (cw))
  95. # else
  96. # define _FPU_GETCW(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \
  97. " btsti %0, 31 \n" \
  98. " bt 1b \n" \
  99. " cprcr %0, cpcr1\n" : "=b" (cw))
  100. # define _FPU_SETCW(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \
  101. " btsti r7, 31 \n" \
  102. " bt 1b \n" \
  103. " cpwcr %0, cpcr1 \n" \
  104. : : "b" (cw) : "r7")
  105. # define _FPU_GETFPSR(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \
  106. " btsti %0, 31 \n" \
  107. " bt 1b \n" \
  108. " cprcr %0, cpcr4\n" : "=b" (cw))
  109. # define _FPU_SETFPSR(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \
  110. " btsti r7, 31 \n" \
  111. " bt 1b \n" \
  112. " cpwcr %0, cpcr4 \n" \
  113. : : "b" (cw) : "r7")
  114. # endif /* __CSKY__ != 2 */
  115. /* Default control word set at startup. */
  116. extern fpu_control_t __fpu_control;
  117. #endif /* !__csky_soft_float__ */
  118. #endif /* fpu_control.h */