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yeelong.patch 1.6 MB

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  1. diff -Nur linux-2.6.30.5.orig/arch/mips/configs/fulong_defconfig linux-2.6.30.5/arch/mips/configs/fulong_defconfig
  2. --- linux-2.6.30.5.orig/arch/mips/configs/fulong_defconfig 2009-08-16 23:19:38.000000000 +0200
  3. +++ linux-2.6.30.5/arch/mips/configs/fulong_defconfig 1970-01-01 01:00:00.000000000 +0100
  4. @@ -1,1912 +0,0 @@
  5. -#
  6. -# Automatically generated make config: don't edit
  7. -# Linux kernel version: 2.6.28-rc6
  8. -# Fri Nov 28 17:53:48 2008
  9. -#
  10. -CONFIG_MIPS=y
  11. -
  12. -#
  13. -# Machine selection
  14. -#
  15. -# CONFIG_MACH_ALCHEMY is not set
  16. -# CONFIG_BASLER_EXCITE is not set
  17. -# CONFIG_BCM47XX is not set
  18. -# CONFIG_MIPS_COBALT is not set
  19. -# CONFIG_MACH_DECSTATION is not set
  20. -# CONFIG_MACH_JAZZ is not set
  21. -# CONFIG_LASAT is not set
  22. -CONFIG_LEMOTE_FULONG=y
  23. -# CONFIG_MIPS_MALTA is not set
  24. -# CONFIG_MIPS_SIM is not set
  25. -# CONFIG_MACH_EMMA is not set
  26. -# CONFIG_MACH_VR41XX is not set
  27. -# CONFIG_NXP_STB220 is not set
  28. -# CONFIG_NXP_STB225 is not set
  29. -# CONFIG_PNX8550_JBS is not set
  30. -# CONFIG_PNX8550_STB810 is not set
  31. -# CONFIG_PMC_MSP is not set
  32. -# CONFIG_PMC_YOSEMITE is not set
  33. -# CONFIG_SGI_IP22 is not set
  34. -# CONFIG_SGI_IP27 is not set
  35. -# CONFIG_SGI_IP28 is not set
  36. -# CONFIG_SGI_IP32 is not set
  37. -# CONFIG_SIBYTE_CRHINE is not set
  38. -# CONFIG_SIBYTE_CARMEL is not set
  39. -# CONFIG_SIBYTE_CRHONE is not set
  40. -# CONFIG_SIBYTE_RHONE is not set
  41. -# CONFIG_SIBYTE_SWARM is not set
  42. -# CONFIG_SIBYTE_LITTLESUR is not set
  43. -# CONFIG_SIBYTE_SENTOSA is not set
  44. -# CONFIG_SIBYTE_BIGSUR is not set
  45. -# CONFIG_SNI_RM is not set
  46. -# CONFIG_MACH_TX39XX is not set
  47. -# CONFIG_MACH_TX49XX is not set
  48. -# CONFIG_MIKROTIK_RB532 is not set
  49. -# CONFIG_WR_PPMC is not set
  50. -CONFIG_RWSEM_GENERIC_SPINLOCK=y
  51. -# CONFIG_ARCH_HAS_ILOG2_U32 is not set
  52. -# CONFIG_ARCH_HAS_ILOG2_U64 is not set
  53. -CONFIG_ARCH_SUPPORTS_OPROFILE=y
  54. -CONFIG_GENERIC_FIND_NEXT_BIT=y
  55. -CONFIG_GENERIC_HWEIGHT=y
  56. -CONFIG_GENERIC_CALIBRATE_DELAY=y
  57. -CONFIG_GENERIC_CLOCKEVENTS=y
  58. -CONFIG_GENERIC_TIME=y
  59. -CONFIG_GENERIC_CMOS_UPDATE=y
  60. -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
  61. -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
  62. -CONFIG_CEVT_R4K=y
  63. -CONFIG_CSRC_R4K=y
  64. -CONFIG_DMA_NONCOHERENT=y
  65. -CONFIG_DMA_NEED_PCI_MAP_STATE=y
  66. -CONFIG_EARLY_PRINTK=y
  67. -CONFIG_SYS_HAS_EARLY_PRINTK=y
  68. -# CONFIG_HOTPLUG_CPU is not set
  69. -CONFIG_I8259=y
  70. -# CONFIG_NO_IOPORT is not set
  71. -CONFIG_GENERIC_ISA_DMA=y
  72. -CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
  73. -# CONFIG_CPU_BIG_ENDIAN is not set
  74. -CONFIG_CPU_LITTLE_ENDIAN=y
  75. -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
  76. -CONFIG_IRQ_CPU=y
  77. -CONFIG_BOOT_ELF32=y
  78. -CONFIG_MIPS_L1_CACHE_SHIFT=5
  79. -CONFIG_HAVE_STD_PC_SERIAL_PORT=y
  80. -
  81. -#
  82. -# CPU selection
  83. -#
  84. -CONFIG_CPU_LOONGSON2=y
  85. -# CONFIG_CPU_MIPS32_R1 is not set
  86. -# CONFIG_CPU_MIPS32_R2 is not set
  87. -# CONFIG_CPU_MIPS64_R1 is not set
  88. -# CONFIG_CPU_MIPS64_R2 is not set
  89. -# CONFIG_CPU_R3000 is not set
  90. -# CONFIG_CPU_TX39XX is not set
  91. -# CONFIG_CPU_VR41XX is not set
  92. -# CONFIG_CPU_R4300 is not set
  93. -# CONFIG_CPU_R4X00 is not set
  94. -# CONFIG_CPU_TX49XX is not set
  95. -# CONFIG_CPU_R5000 is not set
  96. -# CONFIG_CPU_R5432 is not set
  97. -# CONFIG_CPU_R5500 is not set
  98. -# CONFIG_CPU_R6000 is not set
  99. -# CONFIG_CPU_NEVADA is not set
  100. -# CONFIG_CPU_R8000 is not set
  101. -# CONFIG_CPU_R10000 is not set
  102. -# CONFIG_CPU_RM7000 is not set
  103. -# CONFIG_CPU_RM9000 is not set
  104. -# CONFIG_CPU_SB1 is not set
  105. -CONFIG_SYS_HAS_CPU_LOONGSON2=y
  106. -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
  107. -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
  108. -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
  109. -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
  110. -
  111. -#
  112. -# Kernel type
  113. -#
  114. -# CONFIG_32BIT is not set
  115. -CONFIG_64BIT=y
  116. -# CONFIG_PAGE_SIZE_4KB is not set
  117. -# CONFIG_PAGE_SIZE_8KB is not set
  118. -CONFIG_PAGE_SIZE_16KB=y
  119. -# CONFIG_PAGE_SIZE_64KB is not set
  120. -CONFIG_BOARD_SCACHE=y
  121. -CONFIG_MIPS_MT_DISABLED=y
  122. -# CONFIG_MIPS_MT_SMP is not set
  123. -# CONFIG_MIPS_MT_SMTC is not set
  124. -CONFIG_CPU_HAS_WB=y
  125. -CONFIG_CPU_HAS_SYNC=y
  126. -CONFIG_GENERIC_HARDIRQS=y
  127. -CONFIG_GENERIC_IRQ_PROBE=y
  128. -CONFIG_CPU_SUPPORTS_HIGHMEM=y
  129. -CONFIG_SYS_SUPPORTS_HIGHMEM=y
  130. -CONFIG_ARCH_FLATMEM_ENABLE=y
  131. -CONFIG_ARCH_POPULATES_NODE_MAP=y
  132. -CONFIG_ARCH_SPARSEMEM_ENABLE=y
  133. -CONFIG_SELECT_MEMORY_MODEL=y
  134. -CONFIG_FLATMEM_MANUAL=y
  135. -# CONFIG_DISCONTIGMEM_MANUAL is not set
  136. -# CONFIG_SPARSEMEM_MANUAL is not set
  137. -CONFIG_FLATMEM=y
  138. -CONFIG_FLAT_NODE_MEM_MAP=y
  139. -CONFIG_SPARSEMEM_STATIC=y
  140. -CONFIG_PAGEFLAGS_EXTENDED=y
  141. -CONFIG_SPLIT_PTLOCK_CPUS=4
  142. -CONFIG_RESOURCES_64BIT=y
  143. -CONFIG_PHYS_ADDR_T_64BIT=y
  144. -CONFIG_ZONE_DMA_FLAG=0
  145. -CONFIG_VIRT_TO_BUS=y
  146. -CONFIG_UNEVICTABLE_LRU=y
  147. -CONFIG_TICK_ONESHOT=y
  148. -CONFIG_NO_HZ=y
  149. -CONFIG_HIGH_RES_TIMERS=y
  150. -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
  151. -# CONFIG_HZ_48 is not set
  152. -# CONFIG_HZ_100 is not set
  153. -# CONFIG_HZ_128 is not set
  154. -CONFIG_HZ_250=y
  155. -# CONFIG_HZ_256 is not set
  156. -# CONFIG_HZ_1000 is not set
  157. -# CONFIG_HZ_1024 is not set
  158. -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
  159. -CONFIG_HZ=250
  160. -# CONFIG_PREEMPT_NONE is not set
  161. -CONFIG_PREEMPT_VOLUNTARY=y
  162. -# CONFIG_PREEMPT is not set
  163. -# CONFIG_KEXEC is not set
  164. -CONFIG_SECCOMP=y
  165. -CONFIG_LOCKDEP_SUPPORT=y
  166. -CONFIG_STACKTRACE_SUPPORT=y
  167. -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
  168. -
  169. -#
  170. -# General setup
  171. -#
  172. -CONFIG_EXPERIMENTAL=y
  173. -CONFIG_BROKEN_ON_SMP=y
  174. -CONFIG_INIT_ENV_ARG_LIMIT=32
  175. -CONFIG_LOCALVERSION="lm32"
  176. -# CONFIG_LOCALVERSION_AUTO is not set
  177. -CONFIG_SWAP=y
  178. -CONFIG_SYSVIPC=y
  179. -CONFIG_SYSVIPC_SYSCTL=y
  180. -CONFIG_POSIX_MQUEUE=y
  181. -CONFIG_BSD_PROCESS_ACCT=y
  182. -# CONFIG_BSD_PROCESS_ACCT_V3 is not set
  183. -# CONFIG_TASKSTATS is not set
  184. -# CONFIG_AUDIT is not set
  185. -CONFIG_IKCONFIG=y
  186. -CONFIG_IKCONFIG_PROC=y
  187. -CONFIG_LOG_BUF_SHIFT=14
  188. -# CONFIG_CGROUPS is not set
  189. -# CONFIG_GROUP_SCHED is not set
  190. -CONFIG_SYSFS_DEPRECATED=y
  191. -CONFIG_SYSFS_DEPRECATED_V2=y
  192. -# CONFIG_RELAY is not set
  193. -CONFIG_NAMESPACES=y
  194. -# CONFIG_UTS_NS is not set
  195. -# CONFIG_IPC_NS is not set
  196. -CONFIG_USER_NS=y
  197. -CONFIG_PID_NS=y
  198. -# CONFIG_BLK_DEV_INITRD is not set
  199. -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
  200. -CONFIG_SYSCTL=y
  201. -CONFIG_EMBEDDED=y
  202. -CONFIG_SYSCTL_SYSCALL=y
  203. -CONFIG_KALLSYMS=y
  204. -# CONFIG_KALLSYMS_EXTRA_PASS is not set
  205. -CONFIG_HOTPLUG=y
  206. -CONFIG_PRINTK=y
  207. -CONFIG_BUG=y
  208. -CONFIG_ELF_CORE=y
  209. -# CONFIG_PCSPKR_PLATFORM is not set
  210. -# CONFIG_COMPAT_BRK is not set
  211. -CONFIG_BASE_FULL=y
  212. -CONFIG_FUTEX=y
  213. -CONFIG_ANON_INODES=y
  214. -CONFIG_EPOLL=y
  215. -CONFIG_SIGNALFD=y
  216. -CONFIG_TIMERFD=y
  217. -CONFIG_EVENTFD=y
  218. -CONFIG_SHMEM=y
  219. -CONFIG_AIO=y
  220. -CONFIG_VM_EVENT_COUNTERS=y
  221. -CONFIG_PCI_QUIRKS=y
  222. -CONFIG_SLAB=y
  223. -# CONFIG_SLUB is not set
  224. -# CONFIG_SLOB is not set
  225. -CONFIG_PROFILING=y
  226. -# CONFIG_MARKERS is not set
  227. -CONFIG_OPROFILE=m
  228. -CONFIG_HAVE_OPROFILE=y
  229. -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
  230. -CONFIG_SLABINFO=y
  231. -CONFIG_RT_MUTEXES=y
  232. -# CONFIG_TINY_SHMEM is not set
  233. -CONFIG_BASE_SMALL=0
  234. -CONFIG_MODULES=y
  235. -# CONFIG_MODULE_FORCE_LOAD is not set
  236. -CONFIG_MODULE_UNLOAD=y
  237. -CONFIG_MODULE_FORCE_UNLOAD=y
  238. -# CONFIG_MODVERSIONS is not set
  239. -# CONFIG_MODULE_SRCVERSION_ALL is not set
  240. -CONFIG_KMOD=y
  241. -CONFIG_BLOCK=y
  242. -# CONFIG_BLK_DEV_IO_TRACE is not set
  243. -CONFIG_BLK_DEV_BSG=y
  244. -# CONFIG_BLK_DEV_INTEGRITY is not set
  245. -CONFIG_BLOCK_COMPAT=y
  246. -
  247. -#
  248. -# IO Schedulers
  249. -#
  250. -CONFIG_IOSCHED_NOOP=y
  251. -CONFIG_IOSCHED_AS=y
  252. -CONFIG_IOSCHED_DEADLINE=y
  253. -CONFIG_IOSCHED_CFQ=y
  254. -# CONFIG_DEFAULT_AS is not set
  255. -# CONFIG_DEFAULT_DEADLINE is not set
  256. -CONFIG_DEFAULT_CFQ=y
  257. -# CONFIG_DEFAULT_NOOP is not set
  258. -CONFIG_DEFAULT_IOSCHED="cfq"
  259. -CONFIG_CLASSIC_RCU=y
  260. -CONFIG_FREEZER=y
  261. -
  262. -#
  263. -# Bus options (PCI, PCMCIA, EISA, ISA, TC)
  264. -#
  265. -CONFIG_HW_HAS_PCI=y
  266. -CONFIG_PCI=y
  267. -CONFIG_PCI_DOMAINS=y
  268. -# CONFIG_ARCH_SUPPORTS_MSI is not set
  269. -CONFIG_PCI_LEGACY=y
  270. -CONFIG_ISA=y
  271. -CONFIG_MMU=y
  272. -# CONFIG_PCCARD is not set
  273. -# CONFIG_HOTPLUG_PCI is not set
  274. -
  275. -#
  276. -# Executable file formats
  277. -#
  278. -CONFIG_BINFMT_ELF=y
  279. -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
  280. -# CONFIG_HAVE_AOUT is not set
  281. -CONFIG_BINFMT_MISC=y
  282. -CONFIG_MIPS32_COMPAT=y
  283. -CONFIG_COMPAT=y
  284. -CONFIG_SYSVIPC_COMPAT=y
  285. -CONFIG_MIPS32_O32=y
  286. -CONFIG_MIPS32_N32=y
  287. -CONFIG_BINFMT_ELF32=y
  288. -
  289. -#
  290. -# Power management options
  291. -#
  292. -CONFIG_ARCH_SUSPEND_POSSIBLE=y
  293. -CONFIG_PM=y
  294. -# CONFIG_PM_DEBUG is not set
  295. -CONFIG_PM_SLEEP=y
  296. -CONFIG_SUSPEND=y
  297. -CONFIG_SUSPEND_FREEZER=y
  298. -CONFIG_NET=y
  299. -
  300. -#
  301. -# Networking options
  302. -#
  303. -CONFIG_PACKET=y
  304. -CONFIG_PACKET_MMAP=y
  305. -CONFIG_UNIX=y
  306. -CONFIG_XFRM=y
  307. -# CONFIG_XFRM_USER is not set
  308. -# CONFIG_XFRM_SUB_POLICY is not set
  309. -# CONFIG_XFRM_MIGRATE is not set
  310. -# CONFIG_XFRM_STATISTICS is not set
  311. -# CONFIG_NET_KEY is not set
  312. -CONFIG_INET=y
  313. -CONFIG_IP_MULTICAST=y
  314. -# CONFIG_IP_ADVANCED_ROUTER is not set
  315. -CONFIG_IP_FIB_HASH=y
  316. -CONFIG_IP_PNP=y
  317. -# CONFIG_IP_PNP_DHCP is not set
  318. -CONFIG_IP_PNP_BOOTP=y
  319. -# CONFIG_IP_PNP_RARP is not set
  320. -CONFIG_NET_IPIP=m
  321. -CONFIG_NET_IPGRE=m
  322. -CONFIG_NET_IPGRE_BROADCAST=y
  323. -# CONFIG_IP_MROUTE is not set
  324. -# CONFIG_ARPD is not set
  325. -# CONFIG_SYN_COOKIES is not set
  326. -# CONFIG_INET_AH is not set
  327. -# CONFIG_INET_ESP is not set
  328. -# CONFIG_INET_IPCOMP is not set
  329. -# CONFIG_INET_XFRM_TUNNEL is not set
  330. -CONFIG_INET_TUNNEL=m
  331. -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
  332. -# CONFIG_INET_XFRM_MODE_TUNNEL is not set
  333. -CONFIG_INET_XFRM_MODE_BEET=y
  334. -# CONFIG_INET_LRO is not set
  335. -# CONFIG_INET_DIAG is not set
  336. -# CONFIG_TCP_CONG_ADVANCED is not set
  337. -CONFIG_TCP_CONG_CUBIC=y
  338. -CONFIG_DEFAULT_TCP_CONG="cubic"
  339. -# CONFIG_TCP_MD5SIG is not set
  340. -# CONFIG_IPV6 is not set
  341. -# CONFIG_NETWORK_SECMARK is not set
  342. -CONFIG_NETFILTER=y
  343. -# CONFIG_NETFILTER_DEBUG is not set
  344. -CONFIG_NETFILTER_ADVANCED=y
  345. -
  346. -#
  347. -# Core Netfilter Configuration
  348. -#
  349. -CONFIG_NETFILTER_NETLINK=m
  350. -CONFIG_NETFILTER_NETLINK_QUEUE=m
  351. -CONFIG_NETFILTER_NETLINK_LOG=m
  352. -# CONFIG_NF_CONNTRACK is not set
  353. -CONFIG_NETFILTER_XTABLES=m
  354. -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
  355. -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
  356. -CONFIG_NETFILTER_XT_TARGET_MARK=m
  357. -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
  358. -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
  359. -CONFIG_NETFILTER_XT_TARGET_RATEEST=m
  360. -CONFIG_NETFILTER_XT_TARGET_TRACE=m
  361. -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
  362. -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
  363. -CONFIG_NETFILTER_XT_MATCH_COMMENT=m
  364. -CONFIG_NETFILTER_XT_MATCH_DCCP=m
  365. -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
  366. -CONFIG_NETFILTER_XT_MATCH_ESP=m
  367. -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
  368. -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
  369. -CONFIG_NETFILTER_XT_MATCH_LENGTH=m
  370. -CONFIG_NETFILTER_XT_MATCH_LIMIT=m
  371. -CONFIG_NETFILTER_XT_MATCH_MAC=m
  372. -CONFIG_NETFILTER_XT_MATCH_MARK=m
  373. -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
  374. -CONFIG_NETFILTER_XT_MATCH_OWNER=m
  375. -# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
  376. -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
  377. -CONFIG_NETFILTER_XT_MATCH_QUOTA=m
  378. -CONFIG_NETFILTER_XT_MATCH_RATEEST=m
  379. -CONFIG_NETFILTER_XT_MATCH_REALM=m
  380. -CONFIG_NETFILTER_XT_MATCH_RECENT=m
  381. -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
  382. -CONFIG_NETFILTER_XT_MATCH_SCTP=m
  383. -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
  384. -CONFIG_NETFILTER_XT_MATCH_STRING=m
  385. -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
  386. -CONFIG_NETFILTER_XT_MATCH_TIME=m
  387. -CONFIG_NETFILTER_XT_MATCH_U32=m
  388. -# CONFIG_IP_VS is not set
  389. -
  390. -#
  391. -# IP: Netfilter Configuration
  392. -#
  393. -# CONFIG_NF_DEFRAG_IPV4 is not set
  394. -CONFIG_IP_NF_QUEUE=m
  395. -CONFIG_IP_NF_IPTABLES=m
  396. -CONFIG_IP_NF_MATCH_ADDRTYPE=m
  397. -CONFIG_IP_NF_MATCH_AH=m
  398. -CONFIG_IP_NF_MATCH_ECN=m
  399. -CONFIG_IP_NF_MATCH_TTL=m
  400. -CONFIG_IP_NF_FILTER=m
  401. -CONFIG_IP_NF_TARGET_REJECT=m
  402. -CONFIG_IP_NF_TARGET_LOG=m
  403. -CONFIG_IP_NF_TARGET_ULOG=m
  404. -CONFIG_IP_NF_MANGLE=m
  405. -CONFIG_IP_NF_TARGET_ECN=m
  406. -CONFIG_IP_NF_TARGET_TTL=m
  407. -CONFIG_IP_NF_RAW=m
  408. -CONFIG_IP_NF_ARPTABLES=m
  409. -CONFIG_IP_NF_ARPFILTER=m
  410. -CONFIG_IP_NF_ARP_MANGLE=m
  411. -# CONFIG_IP_DCCP is not set
  412. -# CONFIG_IP_SCTP is not set
  413. -# CONFIG_TIPC is not set
  414. -# CONFIG_ATM is not set
  415. -# CONFIG_BRIDGE is not set
  416. -# CONFIG_NET_DSA is not set
  417. -# CONFIG_VLAN_8021Q is not set
  418. -# CONFIG_DECNET is not set
  419. -# CONFIG_LLC2 is not set
  420. -# CONFIG_IPX is not set
  421. -# CONFIG_ATALK is not set
  422. -# CONFIG_X25 is not set
  423. -# CONFIG_LAPB is not set
  424. -# CONFIG_ECONET is not set
  425. -# CONFIG_WAN_ROUTER is not set
  426. -# CONFIG_NET_SCHED is not set
  427. -CONFIG_NET_CLS_ROUTE=y
  428. -
  429. -#
  430. -# Network testing
  431. -#
  432. -# CONFIG_NET_PKTGEN is not set
  433. -# CONFIG_HAMRADIO is not set
  434. -# CONFIG_CAN is not set
  435. -# CONFIG_IRDA is not set
  436. -# CONFIG_BT is not set
  437. -# CONFIG_AF_RXRPC is not set
  438. -CONFIG_PHONET=m
  439. -CONFIG_WIRELESS=y
  440. -# CONFIG_CFG80211 is not set
  441. -CONFIG_WIRELESS_OLD_REGULATORY=y
  442. -CONFIG_WIRELESS_EXT=y
  443. -CONFIG_WIRELESS_EXT_SYSFS=y
  444. -# CONFIG_MAC80211 is not set
  445. -CONFIG_IEEE80211=m
  446. -# CONFIG_IEEE80211_DEBUG is not set
  447. -CONFIG_IEEE80211_CRYPT_WEP=m
  448. -# CONFIG_IEEE80211_CRYPT_CCMP is not set
  449. -# CONFIG_IEEE80211_CRYPT_TKIP is not set
  450. -# CONFIG_RFKILL is not set
  451. -CONFIG_NET_9P=m
  452. -# CONFIG_NET_9P_DEBUG is not set
  453. -
  454. -#
  455. -# Device Drivers
  456. -#
  457. -
  458. -#
  459. -# Generic Driver Options
  460. -#
  461. -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  462. -CONFIG_STANDALONE=y
  463. -CONFIG_PREVENT_FIRMWARE_BUILD=y
  464. -CONFIG_FW_LOADER=m
  465. -CONFIG_FIRMWARE_IN_KERNEL=y
  466. -CONFIG_EXTRA_FIRMWARE=""
  467. -# CONFIG_SYS_HYPERVISOR is not set
  468. -# CONFIG_CONNECTOR is not set
  469. -CONFIG_MTD=m
  470. -# CONFIG_MTD_DEBUG is not set
  471. -# CONFIG_MTD_CONCAT is not set
  472. -# CONFIG_MTD_PARTITIONS is not set
  473. -
  474. -#
  475. -# User Modules And Translation Layers
  476. -#
  477. -CONFIG_MTD_CHAR=m
  478. -CONFIG_MTD_BLKDEVS=m
  479. -CONFIG_MTD_BLOCK=m
  480. -# CONFIG_MTD_BLOCK_RO is not set
  481. -# CONFIG_FTL is not set
  482. -# CONFIG_NFTL is not set
  483. -# CONFIG_INFTL is not set
  484. -# CONFIG_RFD_FTL is not set
  485. -# CONFIG_SSFDC is not set
  486. -# CONFIG_MTD_OOPS is not set
  487. -
  488. -#
  489. -# RAM/ROM/Flash chip drivers
  490. -#
  491. -CONFIG_MTD_CFI=m
  492. -CONFIG_MTD_JEDECPROBE=m
  493. -CONFIG_MTD_GEN_PROBE=m
  494. -CONFIG_MTD_CFI_ADV_OPTIONS=y
  495. -CONFIG_MTD_CFI_NOSWAP=y
  496. -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
  497. -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
  498. -# CONFIG_MTD_CFI_GEOMETRY is not set
  499. -CONFIG_MTD_MAP_BANK_WIDTH_1=y
  500. -CONFIG_MTD_MAP_BANK_WIDTH_2=y
  501. -CONFIG_MTD_MAP_BANK_WIDTH_4=y
  502. -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
  503. -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
  504. -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
  505. -CONFIG_MTD_CFI_I1=y
  506. -CONFIG_MTD_CFI_I2=y
  507. -# CONFIG_MTD_CFI_I4 is not set
  508. -# CONFIG_MTD_CFI_I8 is not set
  509. -# CONFIG_MTD_OTP is not set
  510. -# CONFIG_MTD_CFI_INTELEXT is not set
  511. -CONFIG_MTD_CFI_AMDSTD=m
  512. -CONFIG_MTD_CFI_STAA=m
  513. -CONFIG_MTD_CFI_UTIL=m
  514. -# CONFIG_MTD_RAM is not set
  515. -# CONFIG_MTD_ROM is not set
  516. -# CONFIG_MTD_ABSENT is not set
  517. -
  518. -#
  519. -# Mapping drivers for chip access
  520. -#
  521. -# CONFIG_MTD_COMPLEX_MAPPINGS is not set
  522. -CONFIG_MTD_PHYSMAP=m
  523. -CONFIG_MTD_PHYSMAP_START=0x1fc00000
  524. -CONFIG_MTD_PHYSMAP_LEN=0x80000
  525. -CONFIG_MTD_PHYSMAP_BANKWIDTH=1
  526. -# CONFIG_MTD_INTEL_VR_NOR is not set
  527. -# CONFIG_MTD_PLATRAM is not set
  528. -
  529. -#
  530. -# Self-contained MTD device drivers
  531. -#
  532. -# CONFIG_MTD_PMC551 is not set
  533. -# CONFIG_MTD_SLRAM is not set
  534. -# CONFIG_MTD_PHRAM is not set
  535. -# CONFIG_MTD_MTDRAM is not set
  536. -# CONFIG_MTD_BLOCK2MTD is not set
  537. -
  538. -#
  539. -# Disk-On-Chip Device Drivers
  540. -#
  541. -# CONFIG_MTD_DOC2000 is not set
  542. -# CONFIG_MTD_DOC2001 is not set
  543. -# CONFIG_MTD_DOC2001PLUS is not set
  544. -# CONFIG_MTD_NAND is not set
  545. -# CONFIG_MTD_ONENAND is not set
  546. -
  547. -#
  548. -# UBI - Unsorted block images
  549. -#
  550. -# CONFIG_MTD_UBI is not set
  551. -# CONFIG_PARPORT is not set
  552. -# CONFIG_PNP is not set
  553. -CONFIG_BLK_DEV=y
  554. -# CONFIG_BLK_CPQ_DA is not set
  555. -# CONFIG_BLK_CPQ_CISS_DA is not set
  556. -# CONFIG_BLK_DEV_DAC960 is not set
  557. -# CONFIG_BLK_DEV_UMEM is not set
  558. -# CONFIG_BLK_DEV_COW_COMMON is not set
  559. -CONFIG_BLK_DEV_LOOP=y
  560. -CONFIG_BLK_DEV_CRYPTOLOOP=m
  561. -# CONFIG_BLK_DEV_NBD is not set
  562. -# CONFIG_BLK_DEV_SX8 is not set
  563. -# CONFIG_BLK_DEV_UB is not set
  564. -CONFIG_BLK_DEV_RAM=m
  565. -CONFIG_BLK_DEV_RAM_COUNT=16
  566. -CONFIG_BLK_DEV_RAM_SIZE=4096
  567. -# CONFIG_BLK_DEV_XIP is not set
  568. -CONFIG_CDROM_PKTCDVD=m
  569. -CONFIG_CDROM_PKTCDVD_BUFFERS=8
  570. -# CONFIG_CDROM_PKTCDVD_WCACHE is not set
  571. -CONFIG_ATA_OVER_ETH=m
  572. -# CONFIG_BLK_DEV_HD is not set
  573. -# CONFIG_MISC_DEVICES is not set
  574. -CONFIG_HAVE_IDE=y
  575. -CONFIG_IDE=y
  576. -
  577. -#
  578. -# Please see Documentation/ide/ide.txt for help/info on IDE drives
  579. -#
  580. -CONFIG_IDE_TIMINGS=y
  581. -CONFIG_IDE_ATAPI=y
  582. -# CONFIG_BLK_DEV_IDE_SATA is not set
  583. -CONFIG_IDE_GD=y
  584. -CONFIG_IDE_GD_ATA=y
  585. -# CONFIG_IDE_GD_ATAPI is not set
  586. -CONFIG_BLK_DEV_IDECD=y
  587. -CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
  588. -# CONFIG_BLK_DEV_IDETAPE is not set
  589. -CONFIG_BLK_DEV_IDESCSI=y
  590. -CONFIG_IDE_TASK_IOCTL=y
  591. -CONFIG_IDE_PROC_FS=y
  592. -
  593. -#
  594. -# IDE chipset support/bugfixes
  595. -#
  596. -CONFIG_IDE_GENERIC=y
  597. -# CONFIG_BLK_DEV_PLATFORM is not set
  598. -CONFIG_BLK_DEV_IDEDMA_SFF=y
  599. -
  600. -#
  601. -# PCI IDE chipsets support
  602. -#
  603. -CONFIG_BLK_DEV_IDEPCI=y
  604. -CONFIG_IDEPCI_PCIBUS_ORDER=y
  605. -# CONFIG_BLK_DEV_OFFBOARD is not set
  606. -CONFIG_BLK_DEV_GENERIC=y
  607. -# CONFIG_BLK_DEV_OPTI621 is not set
  608. -CONFIG_BLK_DEV_IDEDMA_PCI=y
  609. -# CONFIG_BLK_DEV_AEC62XX is not set
  610. -# CONFIG_BLK_DEV_ALI15X3 is not set
  611. -# CONFIG_BLK_DEV_AMD74XX is not set
  612. -# CONFIG_BLK_DEV_CMD64X is not set
  613. -# CONFIG_BLK_DEV_TRIFLEX is not set
  614. -# CONFIG_BLK_DEV_CS5520 is not set
  615. -# CONFIG_BLK_DEV_CS5530 is not set
  616. -# CONFIG_BLK_DEV_HPT366 is not set
  617. -# CONFIG_BLK_DEV_JMICRON is not set
  618. -# CONFIG_BLK_DEV_SC1200 is not set
  619. -# CONFIG_BLK_DEV_PIIX is not set
  620. -# CONFIG_BLK_DEV_IT8213 is not set
  621. -# CONFIG_BLK_DEV_IT821X is not set
  622. -# CONFIG_BLK_DEV_NS87415 is not set
  623. -# CONFIG_BLK_DEV_PDC202XX_OLD is not set
  624. -# CONFIG_BLK_DEV_PDC202XX_NEW is not set
  625. -# CONFIG_BLK_DEV_SVWKS is not set
  626. -# CONFIG_BLK_DEV_SIIMAGE is not set
  627. -# CONFIG_BLK_DEV_SLC90E66 is not set
  628. -# CONFIG_BLK_DEV_TRM290 is not set
  629. -CONFIG_BLK_DEV_VIA82CXXX=y
  630. -# CONFIG_BLK_DEV_TC86C001 is not set
  631. -
  632. -#
  633. -# Other IDE chipsets support
  634. -#
  635. -
  636. -#
  637. -# Note: most of these also require special kernel boot parameters
  638. -#
  639. -# CONFIG_BLK_DEV_4DRIVES is not set
  640. -# CONFIG_BLK_DEV_ALI14XX is not set
  641. -# CONFIG_BLK_DEV_DTC2278 is not set
  642. -# CONFIG_BLK_DEV_HT6560B is not set
  643. -# CONFIG_BLK_DEV_QD65XX is not set
  644. -# CONFIG_BLK_DEV_UMC8672 is not set
  645. -CONFIG_BLK_DEV_IDEDMA=y
  646. -
  647. -#
  648. -# SCSI device support
  649. -#
  650. -# CONFIG_RAID_ATTRS is not set
  651. -CONFIG_SCSI=y
  652. -CONFIG_SCSI_DMA=y
  653. -# CONFIG_SCSI_TGT is not set
  654. -# CONFIG_SCSI_NETLINK is not set
  655. -CONFIG_SCSI_PROC_FS=y
  656. -
  657. -#
  658. -# SCSI support type (disk, tape, CD-ROM)
  659. -#
  660. -CONFIG_BLK_DEV_SD=y
  661. -# CONFIG_CHR_DEV_ST is not set
  662. -# CONFIG_CHR_DEV_OSST is not set
  663. -CONFIG_BLK_DEV_SR=y
  664. -CONFIG_BLK_DEV_SR_VENDOR=y
  665. -CONFIG_CHR_DEV_SG=y
  666. -# CONFIG_CHR_DEV_SCH is not set
  667. -
  668. -#
  669. -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
  670. -#
  671. -# CONFIG_SCSI_MULTI_LUN is not set
  672. -CONFIG_SCSI_CONSTANTS=y
  673. -# CONFIG_SCSI_LOGGING is not set
  674. -# CONFIG_SCSI_SCAN_ASYNC is not set
  675. -CONFIG_SCSI_WAIT_SCAN=m
  676. -
  677. -#
  678. -# SCSI Transports
  679. -#
  680. -# CONFIG_SCSI_SPI_ATTRS is not set
  681. -# CONFIG_SCSI_FC_ATTRS is not set
  682. -# CONFIG_SCSI_ISCSI_ATTRS is not set
  683. -# CONFIG_SCSI_SAS_ATTRS is not set
  684. -# CONFIG_SCSI_SAS_LIBSAS is not set
  685. -# CONFIG_SCSI_SRP_ATTRS is not set
  686. -# CONFIG_SCSI_LOWLEVEL is not set
  687. -# CONFIG_SCSI_DH is not set
  688. -# CONFIG_ATA is not set
  689. -# CONFIG_MD is not set
  690. -# CONFIG_FUSION is not set
  691. -
  692. -#
  693. -# IEEE 1394 (FireWire) support
  694. -#
  695. -
  696. -#
  697. -# Enable only one of the two stacks, unless you know what you are doing
  698. -#
  699. -# CONFIG_FIREWIRE is not set
  700. -# CONFIG_IEEE1394 is not set
  701. -# CONFIG_I2O is not set
  702. -CONFIG_NETDEVICES=y
  703. -# CONFIG_DUMMY is not set
  704. -# CONFIG_BONDING is not set
  705. -CONFIG_MACVLAN=m
  706. -# CONFIG_EQUALIZER is not set
  707. -# CONFIG_TUN is not set
  708. -CONFIG_VETH=m
  709. -# CONFIG_ARCNET is not set
  710. -CONFIG_PHYLIB=m
  711. -
  712. -#
  713. -# MII PHY device drivers
  714. -#
  715. -CONFIG_MARVELL_PHY=m
  716. -CONFIG_DAVICOM_PHY=m
  717. -CONFIG_QSEMI_PHY=m
  718. -CONFIG_LXT_PHY=m
  719. -CONFIG_CICADA_PHY=m
  720. -# CONFIG_VITESSE_PHY is not set
  721. -# CONFIG_SMSC_PHY is not set
  722. -# CONFIG_BROADCOM_PHY is not set
  723. -# CONFIG_ICPLUS_PHY is not set
  724. -# CONFIG_REALTEK_PHY is not set
  725. -# CONFIG_MDIO_BITBANG is not set
  726. -CONFIG_NET_ETHERNET=y
  727. -CONFIG_MII=y
  728. -# CONFIG_AX88796 is not set
  729. -# CONFIG_HAPPYMEAL is not set
  730. -# CONFIG_SUNGEM is not set
  731. -# CONFIG_CASSINI is not set
  732. -# CONFIG_NET_VENDOR_3COM is not set
  733. -# CONFIG_NET_VENDOR_SMC is not set
  734. -# CONFIG_SMC91X is not set
  735. -# CONFIG_DM9000 is not set
  736. -# CONFIG_NET_VENDOR_RACAL is not set
  737. -# CONFIG_NET_TULIP is not set
  738. -# CONFIG_AT1700 is not set
  739. -# CONFIG_DEPCA is not set
  740. -# CONFIG_HP100 is not set
  741. -# CONFIG_NET_ISA is not set
  742. -# CONFIG_IBM_NEW_EMAC_ZMII is not set
  743. -# CONFIG_IBM_NEW_EMAC_RGMII is not set
  744. -# CONFIG_IBM_NEW_EMAC_TAH is not set
  745. -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
  746. -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
  747. -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
  748. -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
  749. -CONFIG_NET_PCI=y
  750. -# CONFIG_PCNET32 is not set
  751. -# CONFIG_AMD8111_ETH is not set
  752. -# CONFIG_ADAPTEC_STARFIRE is not set
  753. -# CONFIG_AC3200 is not set
  754. -# CONFIG_APRICOT is not set
  755. -# CONFIG_B44 is not set
  756. -# CONFIG_FORCEDETH is not set
  757. -# CONFIG_CS89x0 is not set
  758. -# CONFIG_TC35815 is not set
  759. -# CONFIG_EEPRO100 is not set
  760. -# CONFIG_E100 is not set
  761. -# CONFIG_FEALNX is not set
  762. -# CONFIG_NATSEMI is not set
  763. -# CONFIG_NE2K_PCI is not set
  764. -# CONFIG_8139CP is not set
  765. -CONFIG_8139TOO=y
  766. -# CONFIG_8139TOO_PIO is not set
  767. -# CONFIG_8139TOO_TUNE_TWISTER is not set
  768. -# CONFIG_8139TOO_8129 is not set
  769. -# CONFIG_8139_OLD_RX_RESET is not set
  770. -# CONFIG_R6040 is not set
  771. -# CONFIG_SIS900 is not set
  772. -# CONFIG_EPIC100 is not set
  773. -# CONFIG_SUNDANCE is not set
  774. -# CONFIG_TLAN is not set
  775. -# CONFIG_VIA_RHINE is not set
  776. -# CONFIG_SC92031 is not set
  777. -# CONFIG_ATL2 is not set
  778. -CONFIG_NETDEV_1000=y
  779. -# CONFIG_ACENIC is not set
  780. -# CONFIG_DL2K is not set
  781. -# CONFIG_E1000 is not set
  782. -# CONFIG_E1000E is not set
  783. -# CONFIG_IP1000 is not set
  784. -# CONFIG_IGB is not set
  785. -# CONFIG_NS83820 is not set
  786. -# CONFIG_HAMACHI is not set
  787. -# CONFIG_YELLOWFIN is not set
  788. -# CONFIG_R8169 is not set
  789. -# CONFIG_SIS190 is not set
  790. -# CONFIG_SKGE is not set
  791. -# CONFIG_SKY2 is not set
  792. -# CONFIG_VIA_VELOCITY is not set
  793. -# CONFIG_TIGON3 is not set
  794. -# CONFIG_BNX2 is not set
  795. -# CONFIG_QLA3XXX is not set
  796. -# CONFIG_ATL1 is not set
  797. -# CONFIG_ATL1E is not set
  798. -# CONFIG_JME is not set
  799. -CONFIG_NETDEV_10000=y
  800. -# CONFIG_CHELSIO_T1 is not set
  801. -# CONFIG_CHELSIO_T3 is not set
  802. -# CONFIG_ENIC is not set
  803. -# CONFIG_IXGBE is not set
  804. -# CONFIG_IXGB is not set
  805. -# CONFIG_S2IO is not set
  806. -# CONFIG_MYRI10GE is not set
  807. -# CONFIG_NETXEN_NIC is not set
  808. -# CONFIG_NIU is not set
  809. -# CONFIG_MLX4_EN is not set
  810. -# CONFIG_MLX4_CORE is not set
  811. -# CONFIG_TEHUTI is not set
  812. -# CONFIG_BNX2X is not set
  813. -# CONFIG_QLGE is not set
  814. -# CONFIG_SFC is not set
  815. -# CONFIG_TR is not set
  816. -
  817. -#
  818. -# Wireless LAN
  819. -#
  820. -# CONFIG_WLAN_PRE80211 is not set
  821. -# CONFIG_WLAN_80211 is not set
  822. -# CONFIG_IWLWIFI_LEDS is not set
  823. -
  824. -#
  825. -# USB Network Adapters
  826. -#
  827. -# CONFIG_USB_CATC is not set
  828. -# CONFIG_USB_KAWETH is not set
  829. -# CONFIG_USB_PEGASUS is not set
  830. -# CONFIG_USB_RTL8150 is not set
  831. -# CONFIG_USB_USBNET is not set
  832. -# CONFIG_WAN is not set
  833. -# CONFIG_FDDI is not set
  834. -# CONFIG_HIPPI is not set
  835. -CONFIG_PPP=m
  836. -CONFIG_PPP_MULTILINK=y
  837. -CONFIG_PPP_FILTER=y
  838. -CONFIG_PPP_ASYNC=m
  839. -CONFIG_PPP_SYNC_TTY=m
  840. -CONFIG_PPP_DEFLATE=m
  841. -CONFIG_PPP_BSDCOMP=m
  842. -CONFIG_PPP_MPPE=m
  843. -CONFIG_PPPOE=m
  844. -CONFIG_PPPOL2TP=m
  845. -CONFIG_SLIP=m
  846. -CONFIG_SLIP_COMPRESSED=y
  847. -CONFIG_SLHC=m
  848. -CONFIG_SLIP_SMART=y
  849. -CONFIG_SLIP_MODE_SLIP6=y
  850. -CONFIG_NET_FC=y
  851. -# CONFIG_NETCONSOLE is not set
  852. -# CONFIG_NETPOLL is not set
  853. -# CONFIG_NET_POLL_CONTROLLER is not set
  854. -# CONFIG_ISDN is not set
  855. -# CONFIG_PHONE is not set
  856. -
  857. -#
  858. -# Input device support
  859. -#
  860. -CONFIG_INPUT=y
  861. -CONFIG_INPUT_FF_MEMLESS=y
  862. -# CONFIG_INPUT_POLLDEV is not set
  863. -
  864. -#
  865. -# Userland interfaces
  866. -#
  867. -CONFIG_INPUT_MOUSEDEV=y
  868. -CONFIG_INPUT_MOUSEDEV_PSAUX=y
  869. -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
  870. -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
  871. -# CONFIG_INPUT_JOYDEV is not set
  872. -# CONFIG_INPUT_EVDEV is not set
  873. -# CONFIG_INPUT_EVBUG is not set
  874. -
  875. -#
  876. -# Input Device Drivers
  877. -#
  878. -CONFIG_INPUT_KEYBOARD=y
  879. -CONFIG_KEYBOARD_ATKBD=m
  880. -# CONFIG_KEYBOARD_SUNKBD is not set
  881. -# CONFIG_KEYBOARD_LKKBD is not set
  882. -# CONFIG_KEYBOARD_XTKBD is not set
  883. -# CONFIG_KEYBOARD_NEWTON is not set
  884. -# CONFIG_KEYBOARD_STOWAWAY is not set
  885. -CONFIG_INPUT_MOUSE=y
  886. -CONFIG_MOUSE_PS2=y
  887. -CONFIG_MOUSE_PS2_ALPS=y
  888. -CONFIG_MOUSE_PS2_LOGIPS2PP=y
  889. -CONFIG_MOUSE_PS2_SYNAPTICS=y
  890. -CONFIG_MOUSE_PS2_LIFEBOOK=y
  891. -CONFIG_MOUSE_PS2_TRACKPOINT=y
  892. -# CONFIG_MOUSE_PS2_ELANTECH is not set
  893. -# CONFIG_MOUSE_PS2_TOUCHKIT is not set
  894. -CONFIG_MOUSE_SERIAL=y
  895. -# CONFIG_MOUSE_APPLETOUCH is not set
  896. -# CONFIG_MOUSE_BCM5974 is not set
  897. -# CONFIG_MOUSE_INPORT is not set
  898. -# CONFIG_MOUSE_LOGIBM is not set
  899. -# CONFIG_MOUSE_PC110PAD is not set
  900. -# CONFIG_MOUSE_VSXXXAA is not set
  901. -# CONFIG_INPUT_JOYSTICK is not set
  902. -# CONFIG_INPUT_TABLET is not set
  903. -# CONFIG_INPUT_TOUCHSCREEN is not set
  904. -# CONFIG_INPUT_MISC is not set
  905. -
  906. -#
  907. -# Hardware I/O ports
  908. -#
  909. -CONFIG_SERIO=y
  910. -CONFIG_SERIO_I8042=y
  911. -CONFIG_SERIO_SERPORT=y
  912. -# CONFIG_SERIO_PCIPS2 is not set
  913. -CONFIG_SERIO_LIBPS2=y
  914. -# CONFIG_SERIO_RAW is not set
  915. -# CONFIG_GAMEPORT is not set
  916. -
  917. -#
  918. -# Character devices
  919. -#
  920. -CONFIG_VT=y
  921. -CONFIG_CONSOLE_TRANSLATIONS=y
  922. -CONFIG_VT_CONSOLE=y
  923. -CONFIG_HW_CONSOLE=y
  924. -# CONFIG_VT_HW_CONSOLE_BINDING is not set
  925. -CONFIG_DEVKMEM=y
  926. -# CONFIG_SERIAL_NONSTANDARD is not set
  927. -# CONFIG_NOZOMI is not set
  928. -
  929. -#
  930. -# Serial drivers
  931. -#
  932. -CONFIG_SERIAL_8250=y
  933. -CONFIG_SERIAL_8250_CONSOLE=y
  934. -CONFIG_SERIAL_8250_PCI=y
  935. -CONFIG_SERIAL_8250_NR_UARTS=2
  936. -CONFIG_SERIAL_8250_RUNTIME_UARTS=2
  937. -# CONFIG_SERIAL_8250_EXTENDED is not set
  938. -
  939. -#
  940. -# Non-8250 serial port support
  941. -#
  942. -CONFIG_SERIAL_CORE=y
  943. -CONFIG_SERIAL_CORE_CONSOLE=y
  944. -# CONFIG_SERIAL_JSM is not set
  945. -CONFIG_UNIX98_PTYS=y
  946. -CONFIG_LEGACY_PTYS=y
  947. -CONFIG_LEGACY_PTY_COUNT=256
  948. -# CONFIG_IPMI_HANDLER is not set
  949. -CONFIG_HW_RANDOM=y
  950. -# CONFIG_DTLK is not set
  951. -# CONFIG_R3964 is not set
  952. -# CONFIG_APPLICOM is not set
  953. -# CONFIG_RAW_DRIVER is not set
  954. -# CONFIG_TCG_TPM is not set
  955. -CONFIG_DEVPORT=y
  956. -CONFIG_I2C=m
  957. -CONFIG_I2C_BOARDINFO=y
  958. -CONFIG_I2C_CHARDEV=m
  959. -CONFIG_I2C_HELPER_AUTO=y
  960. -
  961. -#
  962. -# I2C Hardware Bus support
  963. -#
  964. -
  965. -#
  966. -# PC SMBus host controller drivers
  967. -#
  968. -# CONFIG_I2C_ALI1535 is not set
  969. -# CONFIG_I2C_ALI1563 is not set
  970. -# CONFIG_I2C_ALI15X3 is not set
  971. -# CONFIG_I2C_AMD756 is not set
  972. -# CONFIG_I2C_AMD8111 is not set
  973. -# CONFIG_I2C_I801 is not set
  974. -# CONFIG_I2C_ISCH is not set
  975. -# CONFIG_I2C_PIIX4 is not set
  976. -# CONFIG_I2C_NFORCE2 is not set
  977. -# CONFIG_I2C_SIS5595 is not set
  978. -# CONFIG_I2C_SIS630 is not set
  979. -# CONFIG_I2C_SIS96X is not set
  980. -# CONFIG_I2C_VIA is not set
  981. -CONFIG_I2C_VIAPRO=m
  982. -
  983. -#
  984. -# I2C system bus drivers (mostly embedded / system-on-chip)
  985. -#
  986. -# CONFIG_I2C_OCORES is not set
  987. -# CONFIG_I2C_SIMTEC is not set
  988. -
  989. -#
  990. -# External I2C/SMBus adapter drivers
  991. -#
  992. -# CONFIG_I2C_PARPORT_LIGHT is not set
  993. -# CONFIG_I2C_TAOS_EVM is not set
  994. -# CONFIG_I2C_TINY_USB is not set
  995. -
  996. -#
  997. -# Graphics adapter I2C/DDC channel drivers
  998. -#
  999. -# CONFIG_I2C_VOODOO3 is not set
  1000. -
  1001. -#
  1002. -# Other I2C/SMBus bus drivers
  1003. -#
  1004. -# CONFIG_I2C_ELEKTOR is not set
  1005. -# CONFIG_I2C_PCA_ISA is not set
  1006. -# CONFIG_I2C_PCA_PLATFORM is not set
  1007. -# CONFIG_I2C_STUB is not set
  1008. -
  1009. -#
  1010. -# Miscellaneous I2C Chip support
  1011. -#
  1012. -# CONFIG_DS1682 is not set
  1013. -# CONFIG_EEPROM_AT24 is not set
  1014. -# CONFIG_EEPROM_LEGACY is not set
  1015. -# CONFIG_SENSORS_PCF8574 is not set
  1016. -# CONFIG_PCF8575 is not set
  1017. -# CONFIG_SENSORS_PCA9539 is not set
  1018. -# CONFIG_SENSORS_PCF8591 is not set
  1019. -# CONFIG_SENSORS_MAX6875 is not set
  1020. -# CONFIG_SENSORS_TSL2550 is not set
  1021. -# CONFIG_I2C_DEBUG_CORE is not set
  1022. -# CONFIG_I2C_DEBUG_ALGO is not set
  1023. -# CONFIG_I2C_DEBUG_BUS is not set
  1024. -# CONFIG_I2C_DEBUG_CHIP is not set
  1025. -# CONFIG_SPI is not set
  1026. -# CONFIG_W1 is not set
  1027. -# CONFIG_POWER_SUPPLY is not set
  1028. -# CONFIG_HWMON is not set
  1029. -# CONFIG_THERMAL is not set
  1030. -# CONFIG_THERMAL_HWMON is not set
  1031. -# CONFIG_WATCHDOG is not set
  1032. -CONFIG_SSB_POSSIBLE=y
  1033. -
  1034. -#
  1035. -# Sonics Silicon Backplane
  1036. -#
  1037. -# CONFIG_SSB is not set
  1038. -
  1039. -#
  1040. -# Multifunction device drivers
  1041. -#
  1042. -# CONFIG_MFD_CORE is not set
  1043. -# CONFIG_MFD_SM501 is not set
  1044. -# CONFIG_HTC_PASIC3 is not set
  1045. -# CONFIG_MFD_TMIO is not set
  1046. -# CONFIG_MFD_WM8400 is not set
  1047. -# CONFIG_MFD_WM8350_I2C is not set
  1048. -# CONFIG_REGULATOR is not set
  1049. -
  1050. -#
  1051. -# Multimedia devices
  1052. -#
  1053. -
  1054. -#
  1055. -# Multimedia core support
  1056. -#
  1057. -CONFIG_VIDEO_DEV=m
  1058. -CONFIG_VIDEO_V4L2_COMMON=m
  1059. -CONFIG_VIDEO_ALLOW_V4L1=y
  1060. -CONFIG_VIDEO_V4L1_COMPAT=y
  1061. -# CONFIG_DVB_CORE is not set
  1062. -CONFIG_VIDEO_MEDIA=m
  1063. -
  1064. -#
  1065. -# Multimedia drivers
  1066. -#
  1067. -CONFIG_MEDIA_ATTACH=y
  1068. -CONFIG_MEDIA_TUNER=m
  1069. -CONFIG_MEDIA_TUNER_CUSTOMIZE=y
  1070. -CONFIG_MEDIA_TUNER_SIMPLE=m
  1071. -CONFIG_MEDIA_TUNER_TDA8290=m
  1072. -CONFIG_MEDIA_TUNER_TDA827X=m
  1073. -CONFIG_MEDIA_TUNER_TDA18271=m
  1074. -CONFIG_MEDIA_TUNER_TDA9887=m
  1075. -CONFIG_MEDIA_TUNER_TEA5761=m
  1076. -CONFIG_MEDIA_TUNER_TEA5767=m
  1077. -CONFIG_MEDIA_TUNER_MT20XX=m
  1078. -CONFIG_MEDIA_TUNER_MT2060=m
  1079. -CONFIG_MEDIA_TUNER_MT2266=m
  1080. -CONFIG_MEDIA_TUNER_MT2131=m
  1081. -CONFIG_MEDIA_TUNER_QT1010=m
  1082. -CONFIG_MEDIA_TUNER_XC2028=m
  1083. -CONFIG_MEDIA_TUNER_XC5000=m
  1084. -CONFIG_MEDIA_TUNER_MXL5005S=m
  1085. -CONFIG_MEDIA_TUNER_MXL5007T=m
  1086. -CONFIG_VIDEO_V4L2=m
  1087. -CONFIG_VIDEO_V4L1=m
  1088. -CONFIG_VIDEOBUF_GEN=m
  1089. -CONFIG_VIDEOBUF_VMALLOC=m
  1090. -CONFIG_VIDEOBUF_DMA_CONTIG=m
  1091. -CONFIG_VIDEO_CAPTURE_DRIVERS=y
  1092. -# CONFIG_VIDEO_ADV_DEBUG is not set
  1093. -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
  1094. -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
  1095. -# CONFIG_VIDEO_VIVI is not set
  1096. -# CONFIG_VIDEO_BT848 is not set
  1097. -# CONFIG_VIDEO_PMS is not set
  1098. -# CONFIG_VIDEO_CPIA is not set
  1099. -# CONFIG_VIDEO_CPIA2 is not set
  1100. -# CONFIG_VIDEO_SAA5246A is not set
  1101. -# CONFIG_VIDEO_SAA5249 is not set
  1102. -# CONFIG_VIDEO_STRADIS is not set
  1103. -# CONFIG_VIDEO_SAA7134 is not set
  1104. -# CONFIG_VIDEO_MXB is not set
  1105. -# CONFIG_VIDEO_HEXIUM_ORION is not set
  1106. -# CONFIG_VIDEO_HEXIUM_GEMINI is not set
  1107. -# CONFIG_VIDEO_CX88 is not set
  1108. -# CONFIG_VIDEO_IVTV is not set
  1109. -# CONFIG_VIDEO_CAFE_CCIC is not set
  1110. -CONFIG_SOC_CAMERA=m
  1111. -CONFIG_SOC_CAMERA_MT9M001=m
  1112. -CONFIG_SOC_CAMERA_MT9M111=m
  1113. -CONFIG_SOC_CAMERA_MT9V022=m
  1114. -CONFIG_SOC_CAMERA_PLATFORM=m
  1115. -CONFIG_VIDEO_SH_MOBILE_CEU=m
  1116. -CONFIG_V4L_USB_DRIVERS=y
  1117. -CONFIG_USB_VIDEO_CLASS=m
  1118. -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
  1119. -CONFIG_USB_GSPCA=m
  1120. -CONFIG_USB_M5602=m
  1121. -CONFIG_USB_GSPCA_CONEX=m
  1122. -CONFIG_USB_GSPCA_ETOMS=m
  1123. -CONFIG_USB_GSPCA_FINEPIX=m
  1124. -CONFIG_USB_GSPCA_MARS=m
  1125. -CONFIG_USB_GSPCA_OV519=m
  1126. -CONFIG_USB_GSPCA_PAC207=m
  1127. -CONFIG_USB_GSPCA_PAC7311=m
  1128. -CONFIG_USB_GSPCA_SONIXB=m
  1129. -CONFIG_USB_GSPCA_SONIXJ=m
  1130. -CONFIG_USB_GSPCA_SPCA500=m
  1131. -CONFIG_USB_GSPCA_SPCA501=m
  1132. -CONFIG_USB_GSPCA_SPCA505=m
  1133. -CONFIG_USB_GSPCA_SPCA506=m
  1134. -CONFIG_USB_GSPCA_SPCA508=m
  1135. -CONFIG_USB_GSPCA_SPCA561=m
  1136. -CONFIG_USB_GSPCA_STK014=m
  1137. -CONFIG_USB_GSPCA_SUNPLUS=m
  1138. -CONFIG_USB_GSPCA_T613=m
  1139. -CONFIG_USB_GSPCA_TV8532=m
  1140. -CONFIG_USB_GSPCA_VC032X=m
  1141. -CONFIG_USB_GSPCA_ZC3XX=m
  1142. -# CONFIG_VIDEO_PVRUSB2 is not set
  1143. -# CONFIG_VIDEO_EM28XX is not set
  1144. -# CONFIG_VIDEO_USBVISION is not set
  1145. -CONFIG_VIDEO_USBVIDEO=m
  1146. -CONFIG_USB_VICAM=m
  1147. -CONFIG_USB_IBMCAM=m
  1148. -CONFIG_USB_KONICAWC=m
  1149. -CONFIG_USB_QUICKCAM_MESSENGER=m
  1150. -CONFIG_USB_ET61X251=m
  1151. -# CONFIG_VIDEO_OVCAMCHIP is not set
  1152. -CONFIG_USB_OV511=m
  1153. -CONFIG_USB_SE401=m
  1154. -CONFIG_USB_SN9C102=m
  1155. -CONFIG_USB_STV680=m
  1156. -CONFIG_USB_ZC0301=m
  1157. -CONFIG_USB_PWC=m
  1158. -# CONFIG_USB_PWC_DEBUG is not set
  1159. -# CONFIG_USB_ZR364XX is not set
  1160. -CONFIG_USB_STKWEBCAM=m
  1161. -CONFIG_USB_S2255=m
  1162. -CONFIG_RADIO_ADAPTERS=y
  1163. -# CONFIG_RADIO_CADET is not set
  1164. -# CONFIG_RADIO_RTRACK is not set
  1165. -# CONFIG_RADIO_RTRACK2 is not set
  1166. -# CONFIG_RADIO_AZTECH is not set
  1167. -# CONFIG_RADIO_GEMTEK is not set
  1168. -# CONFIG_RADIO_GEMTEK_PCI is not set
  1169. -# CONFIG_RADIO_MAXIRADIO is not set
  1170. -# CONFIG_RADIO_MAESTRO is not set
  1171. -# CONFIG_RADIO_SF16FMI is not set
  1172. -# CONFIG_RADIO_SF16FMR2 is not set
  1173. -# CONFIG_RADIO_TERRATEC is not set
  1174. -# CONFIG_RADIO_TRUST is not set
  1175. -# CONFIG_RADIO_TYPHOON is not set
  1176. -# CONFIG_RADIO_ZOLTRIX is not set
  1177. -# CONFIG_USB_DSBR is not set
  1178. -CONFIG_USB_SI470X=m
  1179. -CONFIG_USB_MR800=m
  1180. -CONFIG_DAB=y
  1181. -# CONFIG_USB_DABUSB is not set
  1182. -
  1183. -#
  1184. -# Graphics support
  1185. -#
  1186. -# CONFIG_DRM is not set
  1187. -# CONFIG_VGASTATE is not set
  1188. -CONFIG_VIDEO_OUTPUT_CONTROL=m
  1189. -CONFIG_FB=y
  1190. -# CONFIG_FIRMWARE_EDID is not set
  1191. -# CONFIG_FB_DDC is not set
  1192. -# CONFIG_FB_BOOT_VESA_SUPPORT is not set
  1193. -CONFIG_FB_CFB_FILLRECT=y
  1194. -CONFIG_FB_CFB_COPYAREA=y
  1195. -CONFIG_FB_CFB_IMAGEBLIT=y
  1196. -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
  1197. -# CONFIG_FB_SYS_FILLRECT is not set
  1198. -# CONFIG_FB_SYS_COPYAREA is not set
  1199. -# CONFIG_FB_SYS_IMAGEBLIT is not set
  1200. -# CONFIG_FB_FOREIGN_ENDIAN is not set
  1201. -# CONFIG_FB_SYS_FOPS is not set
  1202. -# CONFIG_FB_SVGALIB is not set
  1203. -# CONFIG_FB_MACMODES is not set
  1204. -CONFIG_FB_BACKLIGHT=y
  1205. -CONFIG_FB_MODE_HELPERS=y
  1206. -# CONFIG_FB_TILEBLITTING is not set
  1207. -
  1208. -#
  1209. -# Frame buffer hardware drivers
  1210. -#
  1211. -# CONFIG_FB_CIRRUS is not set
  1212. -# CONFIG_FB_PM2 is not set
  1213. -# CONFIG_FB_CYBER2000 is not set
  1214. -# CONFIG_FB_ASILIANT is not set
  1215. -# CONFIG_FB_IMSTT is not set
  1216. -# CONFIG_FB_S1D13XXX is not set
  1217. -# CONFIG_FB_NVIDIA is not set
  1218. -# CONFIG_FB_RIVA is not set
  1219. -# CONFIG_FB_MATROX is not set
  1220. -CONFIG_FB_RADEON=y
  1221. -# CONFIG_FB_RADEON_I2C is not set
  1222. -CONFIG_FB_RADEON_BACKLIGHT=y
  1223. -# CONFIG_FB_RADEON_DEBUG is not set
  1224. -# CONFIG_FB_ATY128 is not set
  1225. -# CONFIG_FB_ATY is not set
  1226. -# CONFIG_FB_S3 is not set
  1227. -# CONFIG_FB_SAVAGE is not set
  1228. -# CONFIG_FB_SIS is not set
  1229. -# CONFIG_FB_VIA is not set
  1230. -# CONFIG_FB_NEOMAGIC is not set
  1231. -# CONFIG_FB_KYRO is not set
  1232. -# CONFIG_FB_3DFX is not set
  1233. -# CONFIG_FB_VOODOO1 is not set
  1234. -# CONFIG_FB_VT8623 is not set
  1235. -# CONFIG_FB_TRIDENT is not set
  1236. -# CONFIG_FB_ARK is not set
  1237. -# CONFIG_FB_PM3 is not set
  1238. -# CONFIG_FB_CARMINE is not set
  1239. -# CONFIG_FB_VIRTUAL is not set
  1240. -# CONFIG_FB_METRONOME is not set
  1241. -# CONFIG_FB_MB862XX is not set
  1242. -CONFIG_BACKLIGHT_LCD_SUPPORT=y
  1243. -CONFIG_LCD_CLASS_DEVICE=m
  1244. -# CONFIG_LCD_ILI9320 is not set
  1245. -# CONFIG_LCD_PLATFORM is not set
  1246. -CONFIG_BACKLIGHT_CLASS_DEVICE=y
  1247. -# CONFIG_BACKLIGHT_CORGI is not set
  1248. -
  1249. -#
  1250. -# Display device support
  1251. -#
  1252. -# CONFIG_DISPLAY_SUPPORT is not set
  1253. -
  1254. -#
  1255. -# Console display driver support
  1256. -#
  1257. -# CONFIG_VGA_CONSOLE is not set
  1258. -# CONFIG_MDA_CONSOLE is not set
  1259. -CONFIG_DUMMY_CONSOLE=y
  1260. -CONFIG_FRAMEBUFFER_CONSOLE=y
  1261. -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
  1262. -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
  1263. -# CONFIG_FONTS is not set
  1264. -CONFIG_FONT_8x8=y
  1265. -CONFIG_FONT_8x16=y
  1266. -# CONFIG_LOGO is not set
  1267. -CONFIG_SOUND=y
  1268. -CONFIG_SOUND_OSS_CORE=y
  1269. -CONFIG_SND=m
  1270. -CONFIG_SND_TIMER=m
  1271. -CONFIG_SND_PCM=m
  1272. -CONFIG_SND_RAWMIDI=m
  1273. -CONFIG_SND_SEQUENCER=m
  1274. -CONFIG_SND_SEQ_DUMMY=m
  1275. -CONFIG_SND_OSSEMUL=y
  1276. -CONFIG_SND_MIXER_OSS=m
  1277. -CONFIG_SND_PCM_OSS=m
  1278. -CONFIG_SND_PCM_OSS_PLUGINS=y
  1279. -CONFIG_SND_SEQUENCER_OSS=y
  1280. -# CONFIG_SND_DYNAMIC_MINORS is not set
  1281. -CONFIG_SND_SUPPORT_OLD_API=y
  1282. -CONFIG_SND_VERBOSE_PROCFS=y
  1283. -# CONFIG_SND_VERBOSE_PRINTK is not set
  1284. -# CONFIG_SND_DEBUG is not set
  1285. -CONFIG_SND_VMASTER=y
  1286. -CONFIG_SND_MPU401_UART=m
  1287. -CONFIG_SND_AC97_CODEC=m
  1288. -CONFIG_SND_DRIVERS=y
  1289. -# CONFIG_SND_DUMMY is not set
  1290. -# CONFIG_SND_VIRMIDI is not set
  1291. -# CONFIG_SND_MTPAV is not set
  1292. -# CONFIG_SND_SERIAL_U16550 is not set
  1293. -# CONFIG_SND_MPU401 is not set
  1294. -# CONFIG_SND_AC97_POWER_SAVE is not set
  1295. -CONFIG_SND_PCI=y
  1296. -# CONFIG_SND_AD1889 is not set
  1297. -# CONFIG_SND_ALS300 is not set
  1298. -# CONFIG_SND_ALI5451 is not set
  1299. -# CONFIG_SND_ATIIXP is not set
  1300. -# CONFIG_SND_ATIIXP_MODEM is not set
  1301. -# CONFIG_SND_AU8810 is not set
  1302. -# CONFIG_SND_AU8820 is not set
  1303. -# CONFIG_SND_AU8830 is not set
  1304. -# CONFIG_SND_AW2 is not set
  1305. -# CONFIG_SND_AZT3328 is not set
  1306. -# CONFIG_SND_BT87X is not set
  1307. -# CONFIG_SND_CA0106 is not set
  1308. -# CONFIG_SND_CMIPCI is not set
  1309. -# CONFIG_SND_OXYGEN is not set
  1310. -# CONFIG_SND_CS4281 is not set
  1311. -# CONFIG_SND_CS46XX is not set
  1312. -# CONFIG_SND_DARLA20 is not set
  1313. -# CONFIG_SND_GINA20 is not set
  1314. -# CONFIG_SND_LAYLA20 is not set
  1315. -# CONFIG_SND_DARLA24 is not set
  1316. -# CONFIG_SND_GINA24 is not set
  1317. -# CONFIG_SND_LAYLA24 is not set
  1318. -# CONFIG_SND_MONA is not set
  1319. -# CONFIG_SND_MIA is not set
  1320. -# CONFIG_SND_ECHO3G is not set
  1321. -# CONFIG_SND_INDIGO is not set
  1322. -# CONFIG_SND_INDIGOIO is not set
  1323. -# CONFIG_SND_INDIGODJ is not set
  1324. -# CONFIG_SND_EMU10K1 is not set
  1325. -# CONFIG_SND_EMU10K1X is not set
  1326. -# CONFIG_SND_ENS1370 is not set
  1327. -# CONFIG_SND_ENS1371 is not set
  1328. -# CONFIG_SND_ES1938 is not set
  1329. -# CONFIG_SND_ES1968 is not set
  1330. -# CONFIG_SND_FM801 is not set
  1331. -# CONFIG_SND_HDA_INTEL is not set
  1332. -# CONFIG_SND_HDSP is not set
  1333. -# CONFIG_SND_HDSPM is not set
  1334. -# CONFIG_SND_HIFIER is not set
  1335. -# CONFIG_SND_ICE1712 is not set
  1336. -# CONFIG_SND_ICE1724 is not set
  1337. -# CONFIG_SND_INTEL8X0 is not set
  1338. -# CONFIG_SND_INTEL8X0M is not set
  1339. -# CONFIG_SND_KORG1212 is not set
  1340. -# CONFIG_SND_MAESTRO3 is not set
  1341. -# CONFIG_SND_MIXART is not set
  1342. -# CONFIG_SND_NM256 is not set
  1343. -# CONFIG_SND_PCXHR is not set
  1344. -# CONFIG_SND_RIPTIDE is not set
  1345. -# CONFIG_SND_RME32 is not set
  1346. -# CONFIG_SND_RME96 is not set
  1347. -# CONFIG_SND_RME9652 is not set
  1348. -# CONFIG_SND_SONICVIBES is not set
  1349. -# CONFIG_SND_TRIDENT is not set
  1350. -CONFIG_SND_VIA82XX=m
  1351. -# CONFIG_SND_VIA82XX_MODEM is not set
  1352. -# CONFIG_SND_VIRTUOSO is not set
  1353. -# CONFIG_SND_VX222 is not set
  1354. -# CONFIG_SND_YMFPCI is not set
  1355. -CONFIG_SND_MIPS=y
  1356. -CONFIG_SND_USB=y
  1357. -# CONFIG_SND_USB_AUDIO is not set
  1358. -# CONFIG_SND_USB_CAIAQ is not set
  1359. -# CONFIG_SND_SOC is not set
  1360. -# CONFIG_SOUND_PRIME is not set
  1361. -CONFIG_AC97_BUS=m
  1362. -CONFIG_HID_SUPPORT=y
  1363. -CONFIG_HID=y
  1364. -# CONFIG_HID_DEBUG is not set
  1365. -CONFIG_HIDRAW=y
  1366. -
  1367. -#
  1368. -# USB Input Devices
  1369. -#
  1370. -CONFIG_USB_HID=m
  1371. -CONFIG_HID_PID=y
  1372. -CONFIG_USB_HIDDEV=y
  1373. -
  1374. -#
  1375. -# USB HID Boot Protocol drivers
  1376. -#
  1377. -# CONFIG_USB_KBD is not set
  1378. -# CONFIG_USB_MOUSE is not set
  1379. -
  1380. -#
  1381. -# Special HID drivers
  1382. -#
  1383. -CONFIG_HID_COMPAT=y
  1384. -CONFIG_HID_A4TECH=m
  1385. -CONFIG_HID_APPLE=m
  1386. -CONFIG_HID_BELKIN=m
  1387. -CONFIG_HID_BRIGHT=m
  1388. -CONFIG_HID_CHERRY=m
  1389. -CONFIG_HID_CHICONY=m
  1390. -CONFIG_HID_CYPRESS=m
  1391. -CONFIG_HID_DELL=m
  1392. -CONFIG_HID_EZKEY=m
  1393. -CONFIG_HID_GYRATION=m
  1394. -CONFIG_HID_LOGITECH=m
  1395. -CONFIG_LOGITECH_FF=y
  1396. -CONFIG_LOGIRUMBLEPAD2_FF=y
  1397. -CONFIG_HID_MICROSOFT=m
  1398. -CONFIG_HID_MONTEREY=m
  1399. -CONFIG_HID_PANTHERLORD=m
  1400. -# CONFIG_PANTHERLORD_FF is not set
  1401. -CONFIG_HID_PETALYNX=m
  1402. -CONFIG_HID_SAMSUNG=m
  1403. -CONFIG_HID_SONY=m
  1404. -CONFIG_HID_SUNPLUS=m
  1405. -# CONFIG_THRUSTMASTER_FF is not set
  1406. -CONFIG_ZEROPLUS_FF=m
  1407. -CONFIG_USB_SUPPORT=y
  1408. -CONFIG_USB_ARCH_HAS_HCD=y
  1409. -CONFIG_USB_ARCH_HAS_OHCI=y
  1410. -CONFIG_USB_ARCH_HAS_EHCI=y
  1411. -CONFIG_USB=y
  1412. -# CONFIG_USB_DEBUG is not set
  1413. -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
  1414. -
  1415. -#
  1416. -# Miscellaneous USB options
  1417. -#
  1418. -CONFIG_USB_DEVICEFS=y
  1419. -# CONFIG_USB_DEVICE_CLASS is not set
  1420. -# CONFIG_USB_DYNAMIC_MINORS is not set
  1421. -# CONFIG_USB_SUSPEND is not set
  1422. -# CONFIG_USB_OTG is not set
  1423. -CONFIG_USB_OTG_WHITELIST=y
  1424. -# CONFIG_USB_OTG_BLACKLIST_HUB is not set
  1425. -# CONFIG_USB_MON is not set
  1426. -# CONFIG_USB_WUSB is not set
  1427. -CONFIG_USB_WUSB_CBAF=m
  1428. -# CONFIG_USB_WUSB_CBAF_DEBUG is not set
  1429. -
  1430. -#
  1431. -# USB Host Controller Drivers
  1432. -#
  1433. -CONFIG_USB_C67X00_HCD=m
  1434. -CONFIG_USB_EHCI_HCD=y
  1435. -CONFIG_USB_EHCI_ROOT_HUB_TT=y
  1436. -CONFIG_USB_EHCI_TT_NEWSCHED=y
  1437. -# CONFIG_USB_ISP116X_HCD is not set
  1438. -CONFIG_USB_ISP1760_HCD=m
  1439. -CONFIG_USB_OHCI_HCD=y
  1440. -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
  1441. -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
  1442. -CONFIG_USB_OHCI_LITTLE_ENDIAN=y
  1443. -CONFIG_USB_UHCI_HCD=m
  1444. -# CONFIG_USB_SL811_HCD is not set
  1445. -CONFIG_USB_R8A66597_HCD=m
  1446. -# CONFIG_USB_WHCI_HCD is not set
  1447. -# CONFIG_USB_HWA_HCD is not set
  1448. -
  1449. -#
  1450. -# USB Device Class drivers
  1451. -#
  1452. -CONFIG_USB_ACM=y
  1453. -CONFIG_USB_PRINTER=y
  1454. -CONFIG_USB_WDM=m
  1455. -CONFIG_USB_TMC=m
  1456. -
  1457. -#
  1458. -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
  1459. -#
  1460. -
  1461. -#
  1462. -# see USB_STORAGE Help for more information
  1463. -#
  1464. -CONFIG_USB_STORAGE=y
  1465. -# CONFIG_USB_STORAGE_DEBUG is not set
  1466. -# CONFIG_USB_STORAGE_DATAFAB is not set
  1467. -# CONFIG_USB_STORAGE_FREECOM is not set
  1468. -# CONFIG_USB_STORAGE_ISD200 is not set
  1469. -# CONFIG_USB_STORAGE_DPCM is not set
  1470. -# CONFIG_USB_STORAGE_USBAT is not set
  1471. -# CONFIG_USB_STORAGE_SDDR09 is not set
  1472. -# CONFIG_USB_STORAGE_SDDR55 is not set
  1473. -# CONFIG_USB_STORAGE_JUMPSHOT is not set
  1474. -# CONFIG_USB_STORAGE_ALAUDA is not set
  1475. -CONFIG_USB_STORAGE_ONETOUCH=y
  1476. -# CONFIG_USB_STORAGE_KARMA is not set
  1477. -CONFIG_USB_STORAGE_CYPRESS_ATACB=y
  1478. -CONFIG_USB_LIBUSUAL=y
  1479. -
  1480. -#
  1481. -# USB Imaging devices
  1482. -#
  1483. -# CONFIG_USB_MDC800 is not set
  1484. -# CONFIG_USB_MICROTEK is not set
  1485. -
  1486. -#
  1487. -# USB port drivers
  1488. -#
  1489. -# CONFIG_USB_SERIAL is not set
  1490. -
  1491. -#
  1492. -# USB Miscellaneous drivers
  1493. -#
  1494. -# CONFIG_USB_EMI62 is not set
  1495. -# CONFIG_USB_EMI26 is not set
  1496. -# CONFIG_USB_ADUTUX is not set
  1497. -CONFIG_USB_SEVSEG=m
  1498. -# CONFIG_USB_RIO500 is not set
  1499. -# CONFIG_USB_LEGOTOWER is not set
  1500. -# CONFIG_USB_LCD is not set
  1501. -# CONFIG_USB_BERRY_CHARGE is not set
  1502. -# CONFIG_USB_LED is not set
  1503. -# CONFIG_USB_CYPRESS_CY7C63 is not set
  1504. -# CONFIG_USB_CYTHERM is not set
  1505. -# CONFIG_USB_PHIDGET is not set
  1506. -# CONFIG_USB_IDMOUSE is not set
  1507. -# CONFIG_USB_FTDI_ELAN is not set
  1508. -# CONFIG_USB_APPLEDISPLAY is not set
  1509. -# CONFIG_USB_SISUSBVGA is not set
  1510. -# CONFIG_USB_LD is not set
  1511. -# CONFIG_USB_TRANCEVIBRATOR is not set
  1512. -# CONFIG_USB_IOWARRIOR is not set
  1513. -# CONFIG_USB_TEST is not set
  1514. -CONFIG_USB_ISIGHTFW=m
  1515. -CONFIG_USB_VST=m
  1516. -# CONFIG_USB_GADGET is not set
  1517. -# CONFIG_UWB is not set
  1518. -# CONFIG_MMC is not set
  1519. -# CONFIG_MEMSTICK is not set
  1520. -# CONFIG_NEW_LEDS is not set
  1521. -# CONFIG_ACCESSIBILITY is not set
  1522. -# CONFIG_INFINIBAND is not set
  1523. -CONFIG_RTC_LIB=y
  1524. -CONFIG_RTC_CLASS=m
  1525. -
  1526. -#
  1527. -# RTC interfaces
  1528. -#
  1529. -CONFIG_RTC_INTF_SYSFS=y
  1530. -CONFIG_RTC_INTF_PROC=y
  1531. -CONFIG_RTC_INTF_DEV=y
  1532. -CONFIG_RTC_INTF_DEV_UIE_EMUL=y
  1533. -# CONFIG_RTC_DRV_TEST is not set
  1534. -
  1535. -#
  1536. -# I2C RTC drivers
  1537. -#
  1538. -# CONFIG_RTC_DRV_DS1307 is not set
  1539. -# CONFIG_RTC_DRV_DS1374 is not set
  1540. -# CONFIG_RTC_DRV_DS1672 is not set
  1541. -# CONFIG_RTC_DRV_MAX6900 is not set
  1542. -# CONFIG_RTC_DRV_RS5C372 is not set
  1543. -# CONFIG_RTC_DRV_ISL1208 is not set
  1544. -# CONFIG_RTC_DRV_X1205 is not set
  1545. -# CONFIG_RTC_DRV_PCF8563 is not set
  1546. -# CONFIG_RTC_DRV_PCF8583 is not set
  1547. -# CONFIG_RTC_DRV_M41T80 is not set
  1548. -# CONFIG_RTC_DRV_S35390A is not set
  1549. -# CONFIG_RTC_DRV_FM3130 is not set
  1550. -# CONFIG_RTC_DRV_RX8581 is not set
  1551. -
  1552. -#
  1553. -# SPI RTC drivers
  1554. -#
  1555. -
  1556. -#
  1557. -# Platform RTC drivers
  1558. -#
  1559. -CONFIG_RTC_DRV_CMOS=m
  1560. -# CONFIG_RTC_DRV_DS1286 is not set
  1561. -# CONFIG_RTC_DRV_DS1511 is not set
  1562. -# CONFIG_RTC_DRV_DS1553 is not set
  1563. -# CONFIG_RTC_DRV_DS1742 is not set
  1564. -# CONFIG_RTC_DRV_STK17TA8 is not set
  1565. -# CONFIG_RTC_DRV_M48T86 is not set
  1566. -# CONFIG_RTC_DRV_M48T35 is not set
  1567. -# CONFIG_RTC_DRV_M48T59 is not set
  1568. -# CONFIG_RTC_DRV_BQ4802 is not set
  1569. -# CONFIG_RTC_DRV_V3020 is not set
  1570. -
  1571. -#
  1572. -# on-CPU RTC drivers
  1573. -#
  1574. -# CONFIG_DMADEVICES is not set
  1575. -CONFIG_UIO=m
  1576. -CONFIG_UIO_CIF=m
  1577. -# CONFIG_UIO_PDRV is not set
  1578. -# CONFIG_UIO_PDRV_GENIRQ is not set
  1579. -# CONFIG_UIO_SMX is not set
  1580. -# CONFIG_UIO_SERCOS3 is not set
  1581. -# CONFIG_STAGING is not set
  1582. -CONFIG_STAGING_EXCLUDE_BUILD=y
  1583. -
  1584. -#
  1585. -# File systems
  1586. -#
  1587. -CONFIG_EXT2_FS=y
  1588. -# CONFIG_EXT2_FS_XATTR is not set
  1589. -CONFIG_EXT2_FS_XIP=y
  1590. -CONFIG_EXT3_FS=y
  1591. -# CONFIG_EXT3_FS_XATTR is not set
  1592. -CONFIG_EXT4_FS=m
  1593. -CONFIG_EXT4DEV_COMPAT=y
  1594. -CONFIG_EXT4_FS_XATTR=y
  1595. -CONFIG_EXT4_FS_POSIX_ACL=y
  1596. -CONFIG_EXT4_FS_SECURITY=y
  1597. -CONFIG_FS_XIP=y
  1598. -CONFIG_JBD=y
  1599. -CONFIG_JBD2=m
  1600. -CONFIG_FS_MBCACHE=m
  1601. -CONFIG_REISERFS_FS=m
  1602. -# CONFIG_REISERFS_CHECK is not set
  1603. -# CONFIG_REISERFS_PROC_INFO is not set
  1604. -# CONFIG_REISERFS_FS_XATTR is not set
  1605. -# CONFIG_JFS_FS is not set
  1606. -CONFIG_FS_POSIX_ACL=y
  1607. -CONFIG_FILE_LOCKING=y
  1608. -# CONFIG_XFS_FS is not set
  1609. -# CONFIG_GFS2_FS is not set
  1610. -# CONFIG_OCFS2_FS is not set
  1611. -CONFIG_DNOTIFY=y
  1612. -CONFIG_INOTIFY=y
  1613. -CONFIG_INOTIFY_USER=y
  1614. -# CONFIG_QUOTA is not set
  1615. -CONFIG_AUTOFS_FS=y
  1616. -CONFIG_AUTOFS4_FS=y
  1617. -CONFIG_FUSE_FS=y
  1618. -
  1619. -#
  1620. -# CD-ROM/DVD Filesystems
  1621. -#
  1622. -CONFIG_ISO9660_FS=m
  1623. -CONFIG_JOLIET=y
  1624. -CONFIG_ZISOFS=y
  1625. -CONFIG_UDF_FS=m
  1626. -CONFIG_UDF_NLS=y
  1627. -
  1628. -#
  1629. -# DOS/FAT/NT Filesystems
  1630. -#
  1631. -CONFIG_FAT_FS=m
  1632. -CONFIG_MSDOS_FS=m
  1633. -CONFIG_VFAT_FS=m
  1634. -CONFIG_FAT_DEFAULT_CODEPAGE=936
  1635. -CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
  1636. -CONFIG_NTFS_FS=m
  1637. -# CONFIG_NTFS_DEBUG is not set
  1638. -CONFIG_NTFS_RW=y
  1639. -
  1640. -#
  1641. -# Pseudo filesystems
  1642. -#
  1643. -CONFIG_PROC_FS=y
  1644. -CONFIG_PROC_KCORE=y
  1645. -CONFIG_PROC_SYSCTL=y
  1646. -CONFIG_PROC_PAGE_MONITOR=y
  1647. -CONFIG_SYSFS=y
  1648. -CONFIG_TMPFS=y
  1649. -# CONFIG_TMPFS_POSIX_ACL is not set
  1650. -# CONFIG_HUGETLB_PAGE is not set
  1651. -# CONFIG_CONFIGFS_FS is not set
  1652. -
  1653. -#
  1654. -# Miscellaneous filesystems
  1655. -#
  1656. -# CONFIG_ADFS_FS is not set
  1657. -# CONFIG_AFFS_FS is not set
  1658. -# CONFIG_HFS_FS is not set
  1659. -# CONFIG_HFSPLUS_FS is not set
  1660. -# CONFIG_BEFS_FS is not set
  1661. -# CONFIG_BFS_FS is not set
  1662. -# CONFIG_EFS_FS is not set
  1663. -# CONFIG_JFFS2_FS is not set
  1664. -# CONFIG_CRAMFS is not set
  1665. -# CONFIG_VXFS_FS is not set
  1666. -# CONFIG_MINIX_FS is not set
  1667. -CONFIG_OMFS_FS=m
  1668. -# CONFIG_HPFS_FS is not set
  1669. -# CONFIG_QNX4FS_FS is not set
  1670. -# CONFIG_ROMFS_FS is not set
  1671. -# CONFIG_SYSV_FS is not set
  1672. -# CONFIG_UFS_FS is not set
  1673. -CONFIG_NETWORK_FILESYSTEMS=y
  1674. -CONFIG_NFS_FS=m
  1675. -CONFIG_NFS_V3=y
  1676. -CONFIG_NFS_V3_ACL=y
  1677. -CONFIG_NFS_V4=y
  1678. -CONFIG_NFSD=m
  1679. -CONFIG_NFSD_V2_ACL=y
  1680. -CONFIG_NFSD_V3=y
  1681. -CONFIG_NFSD_V3_ACL=y
  1682. -CONFIG_NFSD_V4=y
  1683. -CONFIG_LOCKD=m
  1684. -CONFIG_LOCKD_V4=y
  1685. -CONFIG_EXPORTFS=m
  1686. -CONFIG_NFS_ACL_SUPPORT=m
  1687. -CONFIG_NFS_COMMON=y
  1688. -CONFIG_SUNRPC=m
  1689. -CONFIG_SUNRPC_GSS=m
  1690. -# CONFIG_SUNRPC_REGISTER_V4 is not set
  1691. -CONFIG_RPCSEC_GSS_KRB5=m
  1692. -# CONFIG_RPCSEC_GSS_SPKM3 is not set
  1693. -CONFIG_SMB_FS=m
  1694. -CONFIG_SMB_NLS_DEFAULT=y
  1695. -CONFIG_SMB_NLS_REMOTE="cp936"
  1696. -CONFIG_CIFS=m
  1697. -CONFIG_CIFS_STATS=y
  1698. -CONFIG_CIFS_STATS2=y
  1699. -CONFIG_CIFS_WEAK_PW_HASH=y
  1700. -CONFIG_CIFS_XATTR=y
  1701. -CONFIG_CIFS_POSIX=y
  1702. -CONFIG_CIFS_DEBUG2=y
  1703. -CONFIG_CIFS_EXPERIMENTAL=y
  1704. -# CONFIG_NCP_FS is not set
  1705. -# CONFIG_CODA_FS is not set
  1706. -# CONFIG_AFS_FS is not set
  1707. -# CONFIG_9P_FS is not set
  1708. -
  1709. -#
  1710. -# Partition Types
  1711. -#
  1712. -CONFIG_PARTITION_ADVANCED=y
  1713. -# CONFIG_ACORN_PARTITION is not set
  1714. -# CONFIG_OSF_PARTITION is not set
  1715. -# CONFIG_AMIGA_PARTITION is not set
  1716. -# CONFIG_ATARI_PARTITION is not set
  1717. -# CONFIG_MAC_PARTITION is not set
  1718. -CONFIG_MSDOS_PARTITION=y
  1719. -# CONFIG_BSD_DISKLABEL is not set
  1720. -# CONFIG_MINIX_SUBPARTITION is not set
  1721. -# CONFIG_SOLARIS_X86_PARTITION is not set
  1722. -# CONFIG_UNIXWARE_DISKLABEL is not set
  1723. -# CONFIG_LDM_PARTITION is not set
  1724. -# CONFIG_SGI_PARTITION is not set
  1725. -# CONFIG_ULTRIX_PARTITION is not set
  1726. -# CONFIG_SUN_PARTITION is not set
  1727. -# CONFIG_KARMA_PARTITION is not set
  1728. -# CONFIG_EFI_PARTITION is not set
  1729. -# CONFIG_SYSV68_PARTITION is not set
  1730. -CONFIG_NLS=y
  1731. -CONFIG_NLS_DEFAULT="utf8"
  1732. -# CONFIG_NLS_CODEPAGE_437 is not set
  1733. -# CONFIG_NLS_CODEPAGE_737 is not set
  1734. -# CONFIG_NLS_CODEPAGE_775 is not set
  1735. -# CONFIG_NLS_CODEPAGE_850 is not set
  1736. -# CONFIG_NLS_CODEPAGE_852 is not set
  1737. -# CONFIG_NLS_CODEPAGE_855 is not set
  1738. -# CONFIG_NLS_CODEPAGE_857 is not set
  1739. -# CONFIG_NLS_CODEPAGE_860 is not set
  1740. -# CONFIG_NLS_CODEPAGE_861 is not set
  1741. -# CONFIG_NLS_CODEPAGE_862 is not set
  1742. -# CONFIG_NLS_CODEPAGE_863 is not set
  1743. -# CONFIG_NLS_CODEPAGE_864 is not set
  1744. -# CONFIG_NLS_CODEPAGE_865 is not set
  1745. -# CONFIG_NLS_CODEPAGE_866 is not set
  1746. -# CONFIG_NLS_CODEPAGE_869 is not set
  1747. -CONFIG_NLS_CODEPAGE_936=y
  1748. -# CONFIG_NLS_CODEPAGE_950 is not set
  1749. -# CONFIG_NLS_CODEPAGE_932 is not set
  1750. -# CONFIG_NLS_CODEPAGE_949 is not set
  1751. -# CONFIG_NLS_CODEPAGE_874 is not set
  1752. -# CONFIG_NLS_ISO8859_8 is not set
  1753. -# CONFIG_NLS_CODEPAGE_1250 is not set
  1754. -# CONFIG_NLS_CODEPAGE_1251 is not set
  1755. -# CONFIG_NLS_ASCII is not set
  1756. -CONFIG_NLS_ISO8859_1=y
  1757. -# CONFIG_NLS_ISO8859_2 is not set
  1758. -# CONFIG_NLS_ISO8859_3 is not set
  1759. -# CONFIG_NLS_ISO8859_4 is not set
  1760. -# CONFIG_NLS_ISO8859_5 is not set
  1761. -# CONFIG_NLS_ISO8859_6 is not set
  1762. -# CONFIG_NLS_ISO8859_7 is not set
  1763. -# CONFIG_NLS_ISO8859_9 is not set
  1764. -# CONFIG_NLS_ISO8859_13 is not set
  1765. -# CONFIG_NLS_ISO8859_14 is not set
  1766. -# CONFIG_NLS_ISO8859_15 is not set
  1767. -# CONFIG_NLS_KOI8_R is not set
  1768. -# CONFIG_NLS_KOI8_U is not set
  1769. -CONFIG_NLS_UTF8=y
  1770. -# CONFIG_DLM is not set
  1771. -
  1772. -#
  1773. -# Kernel hacking
  1774. -#
  1775. -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  1776. -# CONFIG_PRINTK_TIME is not set
  1777. -CONFIG_ENABLE_WARN_DEPRECATED=y
  1778. -# CONFIG_ENABLE_MUST_CHECK is not set
  1779. -CONFIG_FRAME_WARN=2048
  1780. -# CONFIG_MAGIC_SYSRQ is not set
  1781. -# CONFIG_UNUSED_SYMBOLS is not set
  1782. -# CONFIG_DEBUG_FS is not set
  1783. -# CONFIG_HEADERS_CHECK is not set
  1784. -# CONFIG_DEBUG_KERNEL is not set
  1785. -# CONFIG_DEBUG_MEMORY_INIT is not set
  1786. -# CONFIG_RCU_CPU_STALL_DETECTOR is not set
  1787. -CONFIG_SYSCTL_SYSCALL_CHECK=y
  1788. -
  1789. -#
  1790. -# Tracers
  1791. -#
  1792. -CONFIG_DYNAMIC_PRINTK_DEBUG=y
  1793. -# CONFIG_SAMPLES is not set
  1794. -CONFIG_HAVE_ARCH_KGDB=y
  1795. -CONFIG_CMDLINE=""
  1796. -
  1797. -#
  1798. -# Security options
  1799. -#
  1800. -# CONFIG_KEYS is not set
  1801. -# CONFIG_SECURITY is not set
  1802. -# CONFIG_SECURITYFS is not set
  1803. -CONFIG_SECURITY_FILE_CAPABILITIES=y
  1804. -CONFIG_CRYPTO=y
  1805. -
  1806. -#
  1807. -# Crypto core or helper
  1808. -#
  1809. -CONFIG_CRYPTO_FIPS=y
  1810. -CONFIG_CRYPTO_ALGAPI=y
  1811. -CONFIG_CRYPTO_AEAD=y
  1812. -CONFIG_CRYPTO_BLKCIPHER=y
  1813. -CONFIG_CRYPTO_HASH=y
  1814. -CONFIG_CRYPTO_RNG=y
  1815. -CONFIG_CRYPTO_MANAGER=y
  1816. -CONFIG_CRYPTO_GF128MUL=m
  1817. -# CONFIG_CRYPTO_NULL is not set
  1818. -# CONFIG_CRYPTO_CRYPTD is not set
  1819. -CONFIG_CRYPTO_AUTHENC=m
  1820. -# CONFIG_CRYPTO_TEST is not set
  1821. -
  1822. -#
  1823. -# Authenticated Encryption with Associated Data
  1824. -#
  1825. -CONFIG_CRYPTO_CCM=m
  1826. -CONFIG_CRYPTO_GCM=m
  1827. -CONFIG_CRYPTO_SEQIV=m
  1828. -
  1829. -#
  1830. -# Block modes
  1831. -#
  1832. -CONFIG_CRYPTO_CBC=m
  1833. -CONFIG_CRYPTO_CTR=m
  1834. -CONFIG_CRYPTO_CTS=m
  1835. -CONFIG_CRYPTO_ECB=m
  1836. -# CONFIG_CRYPTO_LRW is not set
  1837. -CONFIG_CRYPTO_PCBC=m
  1838. -CONFIG_CRYPTO_XTS=m
  1839. -
  1840. -#
  1841. -# Hash modes
  1842. -#
  1843. -CONFIG_CRYPTO_HMAC=y
  1844. -# CONFIG_CRYPTO_XCBC is not set
  1845. -
  1846. -#
  1847. -# Digest
  1848. -#
  1849. -# CONFIG_CRYPTO_CRC32C is not set
  1850. -# CONFIG_CRYPTO_MD4 is not set
  1851. -CONFIG_CRYPTO_MD5=m
  1852. -# CONFIG_CRYPTO_MICHAEL_MIC is not set
  1853. -CONFIG_CRYPTO_RMD128=m
  1854. -CONFIG_CRYPTO_RMD160=m
  1855. -CONFIG_CRYPTO_RMD256=m
  1856. -CONFIG_CRYPTO_RMD320=m
  1857. -CONFIG_CRYPTO_SHA1=m
  1858. -# CONFIG_CRYPTO_SHA256 is not set
  1859. -# CONFIG_CRYPTO_SHA512 is not set
  1860. -# CONFIG_CRYPTO_TGR192 is not set
  1861. -# CONFIG_CRYPTO_WP512 is not set
  1862. -
  1863. -#
  1864. -# Ciphers
  1865. -#
  1866. -CONFIG_CRYPTO_AES=m
  1867. -# CONFIG_CRYPTO_ANUBIS is not set
  1868. -CONFIG_CRYPTO_ARC4=m
  1869. -# CONFIG_CRYPTO_BLOWFISH is not set
  1870. -# CONFIG_CRYPTO_CAMELLIA is not set
  1871. -# CONFIG_CRYPTO_CAST5 is not set
  1872. -# CONFIG_CRYPTO_CAST6 is not set
  1873. -CONFIG_CRYPTO_DES=m
  1874. -# CONFIG_CRYPTO_FCRYPT is not set
  1875. -# CONFIG_CRYPTO_KHAZAD is not set
  1876. -CONFIG_CRYPTO_SALSA20=m
  1877. -CONFIG_CRYPTO_SEED=m
  1878. -# CONFIG_CRYPTO_SERPENT is not set
  1879. -# CONFIG_CRYPTO_TEA is not set
  1880. -# CONFIG_CRYPTO_TWOFISH is not set
  1881. -
  1882. -#
  1883. -# Compression
  1884. -#
  1885. -CONFIG_CRYPTO_DEFLATE=m
  1886. -CONFIG_CRYPTO_LZO=m
  1887. -
  1888. -#
  1889. -# Random Number Generation
  1890. -#
  1891. -CONFIG_CRYPTO_ANSI_CPRNG=m
  1892. -# CONFIG_CRYPTO_HW is not set
  1893. -
  1894. -#
  1895. -# Library routines
  1896. -#
  1897. -CONFIG_BITREVERSE=y
  1898. -CONFIG_CRC_CCITT=y
  1899. -CONFIG_CRC16=m
  1900. -# CONFIG_CRC_T10DIF is not set
  1901. -CONFIG_CRC_ITU_T=m
  1902. -CONFIG_CRC32=y
  1903. -CONFIG_CRC7=m
  1904. -# CONFIG_LIBCRC32C is not set
  1905. -CONFIG_ZLIB_INFLATE=m
  1906. -CONFIG_ZLIB_DEFLATE=m
  1907. -CONFIG_LZO_COMPRESS=m
  1908. -CONFIG_LZO_DECOMPRESS=m
  1909. -CONFIG_TEXTSEARCH=y
  1910. -CONFIG_TEXTSEARCH_KMP=m
  1911. -CONFIG_TEXTSEARCH_BM=m
  1912. -CONFIG_TEXTSEARCH_FSM=m
  1913. -CONFIG_PLIST=y
  1914. -CONFIG_HAS_IOMEM=y
  1915. -CONFIG_HAS_IOPORT=y
  1916. -CONFIG_HAS_DMA=y
  1917. diff -Nur linux-2.6.30.5.orig/arch/mips/configs/fuloong2e_defconfig linux-2.6.30.5/arch/mips/configs/fuloong2e_defconfig
  1918. --- linux-2.6.30.5.orig/arch/mips/configs/fuloong2e_defconfig 1970-01-01 01:00:00.000000000 +0100
  1919. +++ linux-2.6.30.5/arch/mips/configs/fuloong2e_defconfig 2009-08-23 19:01:04.000000000 +0200
  1920. @@ -0,0 +1,1919 @@
  1921. +#
  1922. +# Automatically generated make config: don't edit
  1923. +# Linux kernel version: 2.6.31-rc1
  1924. +# Tue Jun 30 15:37:31 2009
  1925. +#
  1926. +CONFIG_MIPS=y
  1927. +
  1928. +#
  1929. +# Machine selection
  1930. +#
  1931. +# CONFIG_MACH_ALCHEMY is not set
  1932. +# CONFIG_AR7 is not set
  1933. +# CONFIG_BASLER_EXCITE is not set
  1934. +# CONFIG_BCM47XX is not set
  1935. +# CONFIG_MIPS_COBALT is not set
  1936. +# CONFIG_MACH_DECSTATION is not set
  1937. +# CONFIG_MACH_JAZZ is not set
  1938. +# CONFIG_LASAT is not set
  1939. +CONFIG_MACH_LOONGSON=y
  1940. +# CONFIG_MIPS_MALTA is not set
  1941. +# CONFIG_MIPS_SIM is not set
  1942. +# CONFIG_NEC_MARKEINS is not set
  1943. +# CONFIG_MACH_VR41XX is not set
  1944. +# CONFIG_NXP_STB220 is not set
  1945. +# CONFIG_NXP_STB225 is not set
  1946. +# CONFIG_PNX8550_JBS is not set
  1947. +# CONFIG_PNX8550_STB810 is not set
  1948. +# CONFIG_PMC_MSP is not set
  1949. +# CONFIG_PMC_YOSEMITE is not set
  1950. +# CONFIG_SGI_IP22 is not set
  1951. +# CONFIG_SGI_IP27 is not set
  1952. +# CONFIG_SGI_IP28 is not set
  1953. +# CONFIG_SGI_IP32 is not set
  1954. +# CONFIG_SIBYTE_CRHINE is not set
  1955. +# CONFIG_SIBYTE_CARMEL is not set
  1956. +# CONFIG_SIBYTE_CRHONE is not set
  1957. +# CONFIG_SIBYTE_RHONE is not set
  1958. +# CONFIG_SIBYTE_SWARM is not set
  1959. +# CONFIG_SIBYTE_LITTLESUR is not set
  1960. +# CONFIG_SIBYTE_SENTOSA is not set
  1961. +# CONFIG_SIBYTE_BIGSUR is not set
  1962. +# CONFIG_SNI_RM is not set
  1963. +# CONFIG_MACH_TX39XX is not set
  1964. +# CONFIG_MACH_TX49XX is not set
  1965. +# CONFIG_MIKROTIK_RB532 is not set
  1966. +# CONFIG_WR_PPMC is not set
  1967. +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
  1968. +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
  1969. +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
  1970. +CONFIG_ARCH_SPARSEMEM_ENABLE=y
  1971. +CONFIG_LEMOTE_FULOONG2E=y
  1972. +# CONFIG_LEMOTE_FULOONG2F is not set
  1973. +# CONFIG_LEMOTE_YEELOONG2F is not set
  1974. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
  1975. +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
  1976. +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
  1977. +CONFIG_ARCH_SUPPORTS_OPROFILE=y
  1978. +CONFIG_GENERIC_FIND_NEXT_BIT=y
  1979. +CONFIG_GENERIC_HWEIGHT=y
  1980. +CONFIG_GENERIC_CALIBRATE_DELAY=y
  1981. +CONFIG_GENERIC_CLOCKEVENTS=y
  1982. +CONFIG_GENERIC_TIME=y
  1983. +CONFIG_GENERIC_CMOS_UPDATE=y
  1984. +CONFIG_SCHED_OMIT_FRAME_POINTER=y
  1985. +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
  1986. +CONFIG_CEVT_R4K_LIB=y
  1987. +CONFIG_CEVT_R4K=y
  1988. +CONFIG_CSRC_R4K_LIB=y
  1989. +CONFIG_CSRC_R4K=y
  1990. +CONFIG_DMA_NONCOHERENT=y
  1991. +CONFIG_DMA_NEED_PCI_MAP_STATE=y
  1992. +CONFIG_EARLY_PRINTK=y
  1993. +CONFIG_SYS_HAS_EARLY_PRINTK=y
  1994. +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
  1995. +CONFIG_I8259=y
  1996. +# CONFIG_NO_IOPORT is not set
  1997. +CONFIG_GENERIC_ISA_DMA=y
  1998. +CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
  1999. +# CONFIG_CPU_BIG_ENDIAN is not set
  2000. +CONFIG_CPU_LITTLE_ENDIAN=y
  2001. +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
  2002. +CONFIG_IRQ_CPU=y
  2003. +CONFIG_BOOT_ELF32=y
  2004. +CONFIG_MIPS_L1_CACHE_SHIFT=5
  2005. +
  2006. +#
  2007. +# CPU selection
  2008. +#
  2009. +CONFIG_CPU_LOONGSON2E=y
  2010. +# CONFIG_CPU_LOONGSON2F is not set
  2011. +# CONFIG_CPU_MIPS32_R1 is not set
  2012. +# CONFIG_CPU_MIPS32_R2 is not set
  2013. +# CONFIG_CPU_MIPS64_R1 is not set
  2014. +# CONFIG_CPU_MIPS64_R2 is not set
  2015. +# CONFIG_CPU_R3000 is not set
  2016. +# CONFIG_CPU_TX39XX is not set
  2017. +# CONFIG_CPU_VR41XX is not set
  2018. +# CONFIG_CPU_R4300 is not set
  2019. +# CONFIG_CPU_R4X00 is not set
  2020. +# CONFIG_CPU_TX49XX is not set
  2021. +# CONFIG_CPU_R5000 is not set
  2022. +# CONFIG_CPU_R5432 is not set
  2023. +# CONFIG_CPU_R5500 is not set
  2024. +# CONFIG_CPU_R6000 is not set
  2025. +# CONFIG_CPU_NEVADA is not set
  2026. +# CONFIG_CPU_R8000 is not set
  2027. +# CONFIG_CPU_R10000 is not set
  2028. +# CONFIG_CPU_RM7000 is not set
  2029. +# CONFIG_CPU_RM9000 is not set
  2030. +# CONFIG_CPU_SB1 is not set
  2031. +# CONFIG_CPU_CAVIUM_OCTEON is not set
  2032. +CONFIG_CPU_LOONGSON2=y
  2033. +CONFIG_SYS_HAS_CPU_LOONGSON2E=y
  2034. +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
  2035. +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
  2036. +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
  2037. +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
  2038. +
  2039. +#
  2040. +# Kernel type
  2041. +#
  2042. +# CONFIG_32BIT is not set
  2043. +CONFIG_64BIT=y
  2044. +# CONFIG_PAGE_SIZE_4KB is not set
  2045. +# CONFIG_PAGE_SIZE_8KB is not set
  2046. +CONFIG_PAGE_SIZE_16KB=y
  2047. +# CONFIG_PAGE_SIZE_32KB is not set
  2048. +# CONFIG_PAGE_SIZE_64KB is not set
  2049. +CONFIG_BOARD_SCACHE=y
  2050. +CONFIG_MIPS_MT_DISABLED=y
  2051. +# CONFIG_MIPS_MT_SMP is not set
  2052. +# CONFIG_MIPS_MT_SMTC is not set
  2053. +CONFIG_CPU_HAS_WB=y
  2054. +CONFIG_CPU_HAS_SYNC=y
  2055. +CONFIG_GENERIC_HARDIRQS=y
  2056. +CONFIG_GENERIC_IRQ_PROBE=y
  2057. +CONFIG_CPU_SUPPORTS_HIGHMEM=y
  2058. +CONFIG_SYS_SUPPORTS_HIGHMEM=y
  2059. +CONFIG_ARCH_FLATMEM_ENABLE=y
  2060. +CONFIG_ARCH_POPULATES_NODE_MAP=y
  2061. +CONFIG_SELECT_MEMORY_MODEL=y
  2062. +# CONFIG_FLATMEM_MANUAL is not set
  2063. +# CONFIG_DISCONTIGMEM_MANUAL is not set
  2064. +CONFIG_SPARSEMEM_MANUAL=y
  2065. +CONFIG_SPARSEMEM=y
  2066. +CONFIG_HAVE_MEMORY_PRESENT=y
  2067. +CONFIG_SPARSEMEM_STATIC=y
  2068. +
  2069. +#
  2070. +# Memory hotplug is currently incompatible with Software Suspend
  2071. +#
  2072. +CONFIG_PAGEFLAGS_EXTENDED=y
  2073. +CONFIG_SPLIT_PTLOCK_CPUS=4
  2074. +CONFIG_PHYS_ADDR_T_64BIT=y
  2075. +CONFIG_ZONE_DMA_FLAG=0
  2076. +CONFIG_VIRT_TO_BUS=y
  2077. +CONFIG_HAVE_MLOCK=y
  2078. +CONFIG_HAVE_MLOCKED_PAGE_BIT=y
  2079. +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
  2080. +CONFIG_TICK_ONESHOT=y
  2081. +CONFIG_NO_HZ=y
  2082. +CONFIG_HIGH_RES_TIMERS=y
  2083. +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
  2084. +# CONFIG_HZ_48 is not set
  2085. +# CONFIG_HZ_100 is not set
  2086. +# CONFIG_HZ_128 is not set
  2087. +CONFIG_HZ_250=y
  2088. +# CONFIG_HZ_256 is not set
  2089. +# CONFIG_HZ_1000 is not set
  2090. +# CONFIG_HZ_1024 is not set
  2091. +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
  2092. +CONFIG_HZ=250
  2093. +# CONFIG_PREEMPT_NONE is not set
  2094. +CONFIG_PREEMPT_VOLUNTARY=y
  2095. +# CONFIG_PREEMPT is not set
  2096. +# CONFIG_KEXEC is not set
  2097. +CONFIG_SECCOMP=y
  2098. +CONFIG_LOCKDEP_SUPPORT=y
  2099. +CONFIG_STACKTRACE_SUPPORT=y
  2100. +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
  2101. +CONFIG_CONSTRUCTORS=y
  2102. +
  2103. +#
  2104. +# General setup
  2105. +#
  2106. +CONFIG_EXPERIMENTAL=y
  2107. +CONFIG_BROKEN_ON_SMP=y
  2108. +CONFIG_INIT_ENV_ARG_LIMIT=32
  2109. +CONFIG_LOCALVERSION="-loongson2e"
  2110. +# CONFIG_LOCALVERSION_AUTO is not set
  2111. +CONFIG_SWAP=y
  2112. +CONFIG_SYSVIPC=y
  2113. +CONFIG_SYSVIPC_SYSCTL=y
  2114. +CONFIG_POSIX_MQUEUE=y
  2115. +CONFIG_POSIX_MQUEUE_SYSCTL=y
  2116. +CONFIG_BSD_PROCESS_ACCT=y
  2117. +# CONFIG_BSD_PROCESS_ACCT_V3 is not set
  2118. +# CONFIG_TASKSTATS is not set
  2119. +# CONFIG_AUDIT is not set
  2120. +
  2121. +#
  2122. +# RCU Subsystem
  2123. +#
  2124. +CONFIG_CLASSIC_RCU=y
  2125. +# CONFIG_TREE_RCU is not set
  2126. +# CONFIG_PREEMPT_RCU is not set
  2127. +# CONFIG_TREE_RCU_TRACE is not set
  2128. +# CONFIG_PREEMPT_RCU_TRACE is not set
  2129. +CONFIG_IKCONFIG=y
  2130. +CONFIG_IKCONFIG_PROC=y
  2131. +CONFIG_LOG_BUF_SHIFT=14
  2132. +# CONFIG_GROUP_SCHED is not set
  2133. +# CONFIG_CGROUPS is not set
  2134. +CONFIG_SYSFS_DEPRECATED=y
  2135. +CONFIG_SYSFS_DEPRECATED_V2=y
  2136. +# CONFIG_RELAY is not set
  2137. +CONFIG_NAMESPACES=y
  2138. +# CONFIG_UTS_NS is not set
  2139. +# CONFIG_IPC_NS is not set
  2140. +CONFIG_USER_NS=y
  2141. +CONFIG_PID_NS=y
  2142. +# CONFIG_NET_NS is not set
  2143. +# CONFIG_BLK_DEV_INITRD is not set
  2144. +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
  2145. +CONFIG_SYSCTL=y
  2146. +CONFIG_ANON_INODES=y
  2147. +CONFIG_EMBEDDED=y
  2148. +CONFIG_SYSCTL_SYSCALL=y
  2149. +CONFIG_KALLSYMS=y
  2150. +# CONFIG_KALLSYMS_EXTRA_PASS is not set
  2151. +CONFIG_HOTPLUG=y
  2152. +CONFIG_PRINTK=y
  2153. +CONFIG_BUG=y
  2154. +CONFIG_ELF_CORE=y
  2155. +# CONFIG_PCSPKR_PLATFORM is not set
  2156. +CONFIG_BASE_FULL=y
  2157. +CONFIG_FUTEX=y
  2158. +CONFIG_EPOLL=y
  2159. +CONFIG_SIGNALFD=y
  2160. +CONFIG_TIMERFD=y
  2161. +CONFIG_EVENTFD=y
  2162. +CONFIG_SHMEM=y
  2163. +CONFIG_AIO=y
  2164. +
  2165. +#
  2166. +# Performance Counters
  2167. +#
  2168. +CONFIG_VM_EVENT_COUNTERS=y
  2169. +CONFIG_PCI_QUIRKS=y
  2170. +# CONFIG_STRIP_ASM_SYMS is not set
  2171. +# CONFIG_COMPAT_BRK is not set
  2172. +CONFIG_SLAB=y
  2173. +# CONFIG_SLUB is not set
  2174. +# CONFIG_SLOB is not set
  2175. +CONFIG_PROFILING=y
  2176. +CONFIG_TRACEPOINTS=y
  2177. +CONFIG_MARKERS=y
  2178. +CONFIG_OPROFILE=m
  2179. +CONFIG_HAVE_OPROFILE=y
  2180. +CONFIG_HAVE_SYSCALL_WRAPPERS=y
  2181. +
  2182. +#
  2183. +# GCOV-based kernel profiling
  2184. +#
  2185. +# CONFIG_GCOV_KERNEL is not set
  2186. +# CONFIG_SLOW_WORK is not set
  2187. +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
  2188. +CONFIG_SLABINFO=y
  2189. +CONFIG_RT_MUTEXES=y
  2190. +CONFIG_BASE_SMALL=0
  2191. +CONFIG_MODULES=y
  2192. +# CONFIG_MODULE_FORCE_LOAD is not set
  2193. +CONFIG_MODULE_UNLOAD=y
  2194. +CONFIG_MODULE_FORCE_UNLOAD=y
  2195. +# CONFIG_MODVERSIONS is not set
  2196. +# CONFIG_MODULE_SRCVERSION_ALL is not set
  2197. +CONFIG_BLOCK=y
  2198. +CONFIG_BLK_DEV_BSG=y
  2199. +# CONFIG_BLK_DEV_INTEGRITY is not set
  2200. +CONFIG_BLOCK_COMPAT=y
  2201. +
  2202. +#
  2203. +# IO Schedulers
  2204. +#
  2205. +CONFIG_IOSCHED_NOOP=y
  2206. +CONFIG_IOSCHED_AS=y
  2207. +CONFIG_IOSCHED_DEADLINE=y
  2208. +CONFIG_IOSCHED_CFQ=y
  2209. +# CONFIG_DEFAULT_AS is not set
  2210. +# CONFIG_DEFAULT_DEADLINE is not set
  2211. +CONFIG_DEFAULT_CFQ=y
  2212. +# CONFIG_DEFAULT_NOOP is not set
  2213. +CONFIG_DEFAULT_IOSCHED="cfq"
  2214. +CONFIG_FREEZER=y
  2215. +
  2216. +#
  2217. +# Bus options (PCI, PCMCIA, EISA, ISA, TC)
  2218. +#
  2219. +CONFIG_HW_HAS_PCI=y
  2220. +CONFIG_PCI=y
  2221. +CONFIG_PCI_DOMAINS=y
  2222. +# CONFIG_ARCH_SUPPORTS_MSI is not set
  2223. +CONFIG_PCI_LEGACY=y
  2224. +# CONFIG_PCI_STUB is not set
  2225. +# CONFIG_PCI_IOV is not set
  2226. +CONFIG_ISA=y
  2227. +CONFIG_MMU=y
  2228. +# CONFIG_PCCARD is not set
  2229. +# CONFIG_HOTPLUG_PCI is not set
  2230. +
  2231. +#
  2232. +# Executable file formats
  2233. +#
  2234. +CONFIG_BINFMT_ELF=y
  2235. +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
  2236. +# CONFIG_HAVE_AOUT is not set
  2237. +CONFIG_BINFMT_MISC=y
  2238. +CONFIG_MIPS32_COMPAT=y
  2239. +CONFIG_COMPAT=y
  2240. +CONFIG_SYSVIPC_COMPAT=y
  2241. +CONFIG_MIPS32_O32=y
  2242. +CONFIG_MIPS32_N32=y
  2243. +CONFIG_BINFMT_ELF32=y
  2244. +
  2245. +#
  2246. +# Power management options
  2247. +#
  2248. +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
  2249. +CONFIG_ARCH_SUSPEND_POSSIBLE=y
  2250. +CONFIG_PM=y
  2251. +# CONFIG_PM_DEBUG is not set
  2252. +CONFIG_PM_SLEEP=y
  2253. +CONFIG_SUSPEND=y
  2254. +CONFIG_SUSPEND_FREEZER=y
  2255. +CONFIG_HIBERNATION_NVS=y
  2256. +CONFIG_HIBERNATION=y
  2257. +CONFIG_PM_STD_PARTITION="/dev/hda3"
  2258. +
  2259. +#
  2260. +# CPU Frequency scaling
  2261. +#
  2262. +# CONFIG_CPU_FREQ is not set
  2263. +CONFIG_NET=y
  2264. +
  2265. +#
  2266. +# Networking options
  2267. +#
  2268. +CONFIG_PACKET=y
  2269. +CONFIG_PACKET_MMAP=y
  2270. +CONFIG_UNIX=y
  2271. +CONFIG_XFRM=y
  2272. +# CONFIG_XFRM_USER is not set
  2273. +# CONFIG_XFRM_SUB_POLICY is not set
  2274. +# CONFIG_XFRM_MIGRATE is not set
  2275. +# CONFIG_XFRM_STATISTICS is not set
  2276. +# CONFIG_NET_KEY is not set
  2277. +CONFIG_INET=y
  2278. +CONFIG_IP_MULTICAST=y
  2279. +# CONFIG_IP_ADVANCED_ROUTER is not set
  2280. +CONFIG_IP_FIB_HASH=y
  2281. +CONFIG_IP_PNP=y
  2282. +# CONFIG_IP_PNP_DHCP is not set
  2283. +CONFIG_IP_PNP_BOOTP=y
  2284. +# CONFIG_IP_PNP_RARP is not set
  2285. +CONFIG_NET_IPIP=m
  2286. +CONFIG_NET_IPGRE=m
  2287. +CONFIG_NET_IPGRE_BROADCAST=y
  2288. +# CONFIG_IP_MROUTE is not set
  2289. +# CONFIG_ARPD is not set
  2290. +# CONFIG_SYN_COOKIES is not set
  2291. +# CONFIG_INET_AH is not set
  2292. +# CONFIG_INET_ESP is not set
  2293. +# CONFIG_INET_IPCOMP is not set
  2294. +# CONFIG_INET_XFRM_TUNNEL is not set
  2295. +CONFIG_INET_TUNNEL=m
  2296. +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
  2297. +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
  2298. +CONFIG_INET_XFRM_MODE_BEET=y
  2299. +# CONFIG_INET_LRO is not set
  2300. +# CONFIG_INET_DIAG is not set
  2301. +# CONFIG_TCP_CONG_ADVANCED is not set
  2302. +CONFIG_TCP_CONG_CUBIC=y
  2303. +CONFIG_DEFAULT_TCP_CONG="cubic"
  2304. +# CONFIG_TCP_MD5SIG is not set
  2305. +# CONFIG_IPV6 is not set
  2306. +# CONFIG_NETWORK_SECMARK is not set
  2307. +CONFIG_NETFILTER=y
  2308. +# CONFIG_NETFILTER_DEBUG is not set
  2309. +CONFIG_NETFILTER_ADVANCED=y
  2310. +
  2311. +#
  2312. +# Core Netfilter Configuration
  2313. +#
  2314. +CONFIG_NETFILTER_NETLINK=m
  2315. +CONFIG_NETFILTER_NETLINK_QUEUE=m
  2316. +CONFIG_NETFILTER_NETLINK_LOG=m
  2317. +# CONFIG_NF_CONNTRACK is not set
  2318. +# CONFIG_NETFILTER_TPROXY is not set
  2319. +CONFIG_NETFILTER_XTABLES=m
  2320. +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
  2321. +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
  2322. +CONFIG_NETFILTER_XT_TARGET_HL=m
  2323. +CONFIG_NETFILTER_XT_TARGET_MARK=m
  2324. +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
  2325. +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
  2326. +CONFIG_NETFILTER_XT_TARGET_RATEEST=m
  2327. +CONFIG_NETFILTER_XT_TARGET_TRACE=m
  2328. +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
  2329. +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
  2330. +CONFIG_NETFILTER_XT_MATCH_COMMENT=m
  2331. +CONFIG_NETFILTER_XT_MATCH_DCCP=m
  2332. +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
  2333. +CONFIG_NETFILTER_XT_MATCH_ESP=m
  2334. +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
  2335. +CONFIG_NETFILTER_XT_MATCH_HL=m
  2336. +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
  2337. +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
  2338. +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
  2339. +CONFIG_NETFILTER_XT_MATCH_MAC=m
  2340. +CONFIG_NETFILTER_XT_MATCH_MARK=m
  2341. +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
  2342. +CONFIG_NETFILTER_XT_MATCH_OWNER=m
  2343. +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
  2344. +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
  2345. +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
  2346. +CONFIG_NETFILTER_XT_MATCH_RATEEST=m
  2347. +CONFIG_NETFILTER_XT_MATCH_REALM=m
  2348. +CONFIG_NETFILTER_XT_MATCH_RECENT=m
  2349. +# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
  2350. +CONFIG_NETFILTER_XT_MATCH_SCTP=m
  2351. +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
  2352. +CONFIG_NETFILTER_XT_MATCH_STRING=m
  2353. +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
  2354. +CONFIG_NETFILTER_XT_MATCH_TIME=m
  2355. +CONFIG_NETFILTER_XT_MATCH_U32=m
  2356. +# CONFIG_NETFILTER_XT_MATCH_OSF is not set
  2357. +# CONFIG_IP_VS is not set
  2358. +
  2359. +#
  2360. +# IP: Netfilter Configuration
  2361. +#
  2362. +# CONFIG_NF_DEFRAG_IPV4 is not set
  2363. +CONFIG_IP_NF_QUEUE=m
  2364. +CONFIG_IP_NF_IPTABLES=m
  2365. +CONFIG_IP_NF_MATCH_ADDRTYPE=m
  2366. +CONFIG_IP_NF_MATCH_AH=m
  2367. +CONFIG_IP_NF_MATCH_ECN=m
  2368. +CONFIG_IP_NF_MATCH_TTL=m
  2369. +CONFIG_IP_NF_FILTER=m
  2370. +CONFIG_IP_NF_TARGET_REJECT=m
  2371. +CONFIG_IP_NF_TARGET_LOG=m
  2372. +CONFIG_IP_NF_TARGET_ULOG=m
  2373. +CONFIG_IP_NF_MANGLE=m
  2374. +CONFIG_IP_NF_TARGET_ECN=m
  2375. +CONFIG_IP_NF_TARGET_TTL=m
  2376. +CONFIG_IP_NF_RAW=m
  2377. +CONFIG_IP_NF_ARPTABLES=m
  2378. +CONFIG_IP_NF_ARPFILTER=m
  2379. +CONFIG_IP_NF_ARP_MANGLE=m
  2380. +# CONFIG_IP_DCCP is not set
  2381. +# CONFIG_IP_SCTP is not set
  2382. +# CONFIG_TIPC is not set
  2383. +# CONFIG_ATM is not set
  2384. +# CONFIG_BRIDGE is not set
  2385. +# CONFIG_NET_DSA is not set
  2386. +# CONFIG_VLAN_8021Q is not set
  2387. +# CONFIG_DECNET is not set
  2388. +# CONFIG_LLC2 is not set
  2389. +# CONFIG_IPX is not set
  2390. +# CONFIG_ATALK is not set
  2391. +# CONFIG_X25 is not set
  2392. +# CONFIG_LAPB is not set
  2393. +# CONFIG_ECONET is not set
  2394. +# CONFIG_WAN_ROUTER is not set
  2395. +CONFIG_PHONET=m
  2396. +# CONFIG_IEEE802154 is not set
  2397. +# CONFIG_NET_SCHED is not set
  2398. +CONFIG_NET_CLS_ROUTE=y
  2399. +# CONFIG_DCB is not set
  2400. +
  2401. +#
  2402. +# Network testing
  2403. +#
  2404. +# CONFIG_NET_PKTGEN is not set
  2405. +# CONFIG_NET_DROP_MONITOR is not set
  2406. +# CONFIG_HAMRADIO is not set
  2407. +# CONFIG_CAN is not set
  2408. +# CONFIG_IRDA is not set
  2409. +# CONFIG_BT is not set
  2410. +# CONFIG_AF_RXRPC is not set
  2411. +CONFIG_WIRELESS=y
  2412. +# CONFIG_CFG80211 is not set
  2413. +CONFIG_WIRELESS_OLD_REGULATORY=y
  2414. +CONFIG_WIRELESS_EXT=y
  2415. +CONFIG_WIRELESS_EXT_SYSFS=y
  2416. +# CONFIG_LIB80211 is not set
  2417. +
  2418. +#
  2419. +# CFG80211 needs to be enabled for MAC80211
  2420. +#
  2421. +CONFIG_MAC80211_DEFAULT_PS_VALUE=0
  2422. +# CONFIG_WIMAX is not set
  2423. +# CONFIG_RFKILL is not set
  2424. +CONFIG_NET_9P=m
  2425. +# CONFIG_NET_9P_DEBUG is not set
  2426. +
  2427. +#
  2428. +# Device Drivers
  2429. +#
  2430. +
  2431. +#
  2432. +# Generic Driver Options
  2433. +#
  2434. +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  2435. +CONFIG_STANDALONE=y
  2436. +CONFIG_PREVENT_FIRMWARE_BUILD=y
  2437. +CONFIG_FW_LOADER=m
  2438. +CONFIG_FIRMWARE_IN_KERNEL=y
  2439. +CONFIG_EXTRA_FIRMWARE=""
  2440. +# CONFIG_SYS_HYPERVISOR is not set
  2441. +# CONFIG_CONNECTOR is not set
  2442. +CONFIG_MTD=m
  2443. +# CONFIG_MTD_DEBUG is not set
  2444. +# CONFIG_MTD_CONCAT is not set
  2445. +# CONFIG_MTD_PARTITIONS is not set
  2446. +# CONFIG_MTD_TESTS is not set
  2447. +
  2448. +#
  2449. +# User Modules And Translation Layers
  2450. +#
  2451. +CONFIG_MTD_CHAR=m
  2452. +CONFIG_MTD_BLKDEVS=m
  2453. +CONFIG_MTD_BLOCK=m
  2454. +# CONFIG_MTD_BLOCK_RO is not set
  2455. +# CONFIG_FTL is not set
  2456. +# CONFIG_NFTL is not set
  2457. +# CONFIG_INFTL is not set
  2458. +# CONFIG_RFD_FTL is not set
  2459. +# CONFIG_SSFDC is not set
  2460. +# CONFIG_MTD_OOPS is not set
  2461. +
  2462. +#
  2463. +# RAM/ROM/Flash chip drivers
  2464. +#
  2465. +CONFIG_MTD_CFI=m
  2466. +CONFIG_MTD_JEDECPROBE=m
  2467. +CONFIG_MTD_GEN_PROBE=m
  2468. +CONFIG_MTD_CFI_ADV_OPTIONS=y
  2469. +CONFIG_MTD_CFI_NOSWAP=y
  2470. +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
  2471. +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
  2472. +# CONFIG_MTD_CFI_GEOMETRY is not set
  2473. +CONFIG_MTD_MAP_BANK_WIDTH_1=y
  2474. +CONFIG_MTD_MAP_BANK_WIDTH_2=y
  2475. +CONFIG_MTD_MAP_BANK_WIDTH_4=y
  2476. +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
  2477. +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
  2478. +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
  2479. +CONFIG_MTD_CFI_I1=y
  2480. +CONFIG_MTD_CFI_I2=y
  2481. +# CONFIG_MTD_CFI_I4 is not set
  2482. +# CONFIG_MTD_CFI_I8 is not set
  2483. +# CONFIG_MTD_OTP is not set
  2484. +# CONFIG_MTD_CFI_INTELEXT is not set
  2485. +CONFIG_MTD_CFI_AMDSTD=m
  2486. +CONFIG_MTD_CFI_STAA=m
  2487. +CONFIG_MTD_CFI_UTIL=m
  2488. +# CONFIG_MTD_RAM is not set
  2489. +# CONFIG_MTD_ROM is not set
  2490. +# CONFIG_MTD_ABSENT is not set
  2491. +
  2492. +#
  2493. +# Mapping drivers for chip access
  2494. +#
  2495. +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
  2496. +CONFIG_MTD_PHYSMAP=m
  2497. +# CONFIG_MTD_PHYSMAP_COMPAT is not set
  2498. +# CONFIG_MTD_INTEL_VR_NOR is not set
  2499. +# CONFIG_MTD_PLATRAM is not set
  2500. +
  2501. +#
  2502. +# Self-contained MTD device drivers
  2503. +#
  2504. +# CONFIG_MTD_PMC551 is not set
  2505. +# CONFIG_MTD_SLRAM is not set
  2506. +# CONFIG_MTD_PHRAM is not set
  2507. +# CONFIG_MTD_MTDRAM is not set
  2508. +# CONFIG_MTD_BLOCK2MTD is not set
  2509. +
  2510. +#
  2511. +# Disk-On-Chip Device Drivers
  2512. +#
  2513. +# CONFIG_MTD_DOC2000 is not set
  2514. +# CONFIG_MTD_DOC2001 is not set
  2515. +# CONFIG_MTD_DOC2001PLUS is not set
  2516. +# CONFIG_MTD_NAND is not set
  2517. +# CONFIG_MTD_ONENAND is not set
  2518. +
  2519. +#
  2520. +# LPDDR flash memory drivers
  2521. +#
  2522. +# CONFIG_MTD_LPDDR is not set
  2523. +
  2524. +#
  2525. +# UBI - Unsorted block images
  2526. +#
  2527. +# CONFIG_MTD_UBI is not set
  2528. +# CONFIG_PARPORT is not set
  2529. +# CONFIG_PNP is not set
  2530. +CONFIG_BLK_DEV=y
  2531. +# CONFIG_BLK_CPQ_DA is not set
  2532. +# CONFIG_BLK_CPQ_CISS_DA is not set
  2533. +# CONFIG_BLK_DEV_DAC960 is not set
  2534. +# CONFIG_BLK_DEV_UMEM is not set
  2535. +# CONFIG_BLK_DEV_COW_COMMON is not set
  2536. +CONFIG_BLK_DEV_LOOP=y
  2537. +CONFIG_BLK_DEV_CRYPTOLOOP=m
  2538. +# CONFIG_BLK_DEV_NBD is not set
  2539. +# CONFIG_BLK_DEV_SX8 is not set
  2540. +# CONFIG_BLK_DEV_UB is not set
  2541. +CONFIG_BLK_DEV_RAM=m
  2542. +CONFIG_BLK_DEV_RAM_COUNT=16
  2543. +CONFIG_BLK_DEV_RAM_SIZE=4096
  2544. +# CONFIG_BLK_DEV_XIP is not set
  2545. +CONFIG_CDROM_PKTCDVD=m
  2546. +CONFIG_CDROM_PKTCDVD_BUFFERS=8
  2547. +# CONFIG_CDROM_PKTCDVD_WCACHE is not set
  2548. +CONFIG_ATA_OVER_ETH=m
  2549. +# CONFIG_BLK_DEV_HD is not set
  2550. +# CONFIG_MISC_DEVICES is not set
  2551. +CONFIG_HAVE_IDE=y
  2552. +CONFIG_IDE=y
  2553. +
  2554. +#
  2555. +# Please see Documentation/ide/ide.txt for help/info on IDE drives
  2556. +#
  2557. +CONFIG_IDE_XFER_MODE=y
  2558. +CONFIG_IDE_TIMINGS=y
  2559. +CONFIG_IDE_ATAPI=y
  2560. +# CONFIG_BLK_DEV_IDE_SATA is not set
  2561. +CONFIG_IDE_GD=y
  2562. +CONFIG_IDE_GD_ATA=y
  2563. +# CONFIG_IDE_GD_ATAPI is not set
  2564. +CONFIG_BLK_DEV_IDECD=y
  2565. +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
  2566. +# CONFIG_BLK_DEV_IDETAPE is not set
  2567. +CONFIG_IDE_TASK_IOCTL=y
  2568. +CONFIG_IDE_PROC_FS=y
  2569. +
  2570. +#
  2571. +# IDE chipset support/bugfixes
  2572. +#
  2573. +CONFIG_IDE_GENERIC=y
  2574. +# CONFIG_BLK_DEV_PLATFORM is not set
  2575. +CONFIG_BLK_DEV_IDEDMA_SFF=y
  2576. +
  2577. +#
  2578. +# PCI IDE chipsets support
  2579. +#
  2580. +CONFIG_BLK_DEV_IDEPCI=y
  2581. +CONFIG_IDEPCI_PCIBUS_ORDER=y
  2582. +# CONFIG_BLK_DEV_OFFBOARD is not set
  2583. +CONFIG_BLK_DEV_GENERIC=y
  2584. +# CONFIG_BLK_DEV_OPTI621 is not set
  2585. +CONFIG_BLK_DEV_IDEDMA_PCI=y
  2586. +# CONFIG_BLK_DEV_AEC62XX is not set
  2587. +# CONFIG_BLK_DEV_ALI15X3 is not set
  2588. +# CONFIG_BLK_DEV_AMD74XX is not set
  2589. +# CONFIG_BLK_DEV_CMD64X is not set
  2590. +# CONFIG_BLK_DEV_TRIFLEX is not set
  2591. +# CONFIG_BLK_DEV_CS5520 is not set
  2592. +# CONFIG_BLK_DEV_CS5530 is not set
  2593. +# CONFIG_BLK_DEV_HPT366 is not set
  2594. +# CONFIG_BLK_DEV_JMICRON is not set
  2595. +# CONFIG_BLK_DEV_SC1200 is not set
  2596. +# CONFIG_BLK_DEV_PIIX is not set
  2597. +# CONFIG_BLK_DEV_IT8172 is not set
  2598. +# CONFIG_BLK_DEV_IT8213 is not set
  2599. +# CONFIG_BLK_DEV_IT821X is not set
  2600. +# CONFIG_BLK_DEV_NS87415 is not set
  2601. +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
  2602. +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
  2603. +# CONFIG_BLK_DEV_SVWKS is not set
  2604. +# CONFIG_BLK_DEV_SIIMAGE is not set
  2605. +# CONFIG_BLK_DEV_SLC90E66 is not set
  2606. +# CONFIG_BLK_DEV_TRM290 is not set
  2607. +CONFIG_BLK_DEV_VIA82CXXX=y
  2608. +# CONFIG_BLK_DEV_TC86C001 is not set
  2609. +
  2610. +#
  2611. +# Other IDE chipsets support
  2612. +#
  2613. +
  2614. +#
  2615. +# Note: most of these also require special kernel boot parameters
  2616. +#
  2617. +# CONFIG_BLK_DEV_4DRIVES is not set
  2618. +# CONFIG_BLK_DEV_ALI14XX is not set
  2619. +# CONFIG_BLK_DEV_DTC2278 is not set
  2620. +# CONFIG_BLK_DEV_HT6560B is not set
  2621. +# CONFIG_BLK_DEV_QD65XX is not set
  2622. +# CONFIG_BLK_DEV_UMC8672 is not set
  2623. +CONFIG_BLK_DEV_IDEDMA=y
  2624. +
  2625. +#
  2626. +# SCSI device support
  2627. +#
  2628. +# CONFIG_RAID_ATTRS is not set
  2629. +CONFIG_SCSI=y
  2630. +CONFIG_SCSI_DMA=y
  2631. +# CONFIG_SCSI_TGT is not set
  2632. +# CONFIG_SCSI_NETLINK is not set
  2633. +CONFIG_SCSI_PROC_FS=y
  2634. +
  2635. +#
  2636. +# SCSI support type (disk, tape, CD-ROM)
  2637. +#
  2638. +CONFIG_BLK_DEV_SD=y
  2639. +# CONFIG_CHR_DEV_ST is not set
  2640. +# CONFIG_CHR_DEV_OSST is not set
  2641. +CONFIG_BLK_DEV_SR=y
  2642. +CONFIG_BLK_DEV_SR_VENDOR=y
  2643. +CONFIG_CHR_DEV_SG=y
  2644. +# CONFIG_CHR_DEV_SCH is not set
  2645. +# CONFIG_SCSI_MULTI_LUN is not set
  2646. +CONFIG_SCSI_CONSTANTS=y
  2647. +# CONFIG_SCSI_LOGGING is not set
  2648. +# CONFIG_SCSI_SCAN_ASYNC is not set
  2649. +CONFIG_SCSI_WAIT_SCAN=m
  2650. +
  2651. +#
  2652. +# SCSI Transports
  2653. +#
  2654. +# CONFIG_SCSI_SPI_ATTRS is not set
  2655. +# CONFIG_SCSI_FC_ATTRS is not set
  2656. +# CONFIG_SCSI_ISCSI_ATTRS is not set
  2657. +# CONFIG_SCSI_SAS_ATTRS is not set
  2658. +# CONFIG_SCSI_SAS_LIBSAS is not set
  2659. +# CONFIG_SCSI_SRP_ATTRS is not set
  2660. +# CONFIG_SCSI_LOWLEVEL is not set
  2661. +# CONFIG_SCSI_DH is not set
  2662. +# CONFIG_SCSI_OSD_INITIATOR is not set
  2663. +# CONFIG_ATA is not set
  2664. +# CONFIG_MD is not set
  2665. +# CONFIG_FUSION is not set
  2666. +
  2667. +#
  2668. +# IEEE 1394 (FireWire) support
  2669. +#
  2670. +
  2671. +#
  2672. +# You can enable one or both FireWire driver stacks.
  2673. +#
  2674. +
  2675. +#
  2676. +# See the help texts for more information.
  2677. +#
  2678. +# CONFIG_FIREWIRE is not set
  2679. +# CONFIG_IEEE1394 is not set
  2680. +# CONFIG_I2O is not set
  2681. +CONFIG_NETDEVICES=y
  2682. +# CONFIG_DUMMY is not set
  2683. +# CONFIG_BONDING is not set
  2684. +CONFIG_MACVLAN=m
  2685. +# CONFIG_EQUALIZER is not set
  2686. +# CONFIG_TUN is not set
  2687. +CONFIG_VETH=m
  2688. +# CONFIG_ARCNET is not set
  2689. +CONFIG_PHYLIB=m
  2690. +
  2691. +#
  2692. +# MII PHY device drivers
  2693. +#
  2694. +CONFIG_MARVELL_PHY=m
  2695. +CONFIG_DAVICOM_PHY=m
  2696. +CONFIG_QSEMI_PHY=m
  2697. +CONFIG_LXT_PHY=m
  2698. +CONFIG_CICADA_PHY=m
  2699. +# CONFIG_VITESSE_PHY is not set
  2700. +# CONFIG_SMSC_PHY is not set
  2701. +# CONFIG_BROADCOM_PHY is not set
  2702. +# CONFIG_ICPLUS_PHY is not set
  2703. +# CONFIG_REALTEK_PHY is not set
  2704. +# CONFIG_NATIONAL_PHY is not set
  2705. +# CONFIG_STE10XP is not set
  2706. +# CONFIG_LSI_ET1011C_PHY is not set
  2707. +# CONFIG_MDIO_BITBANG is not set
  2708. +CONFIG_NET_ETHERNET=y
  2709. +CONFIG_MII=y
  2710. +# CONFIG_AX88796 is not set
  2711. +# CONFIG_HAPPYMEAL is not set
  2712. +# CONFIG_SUNGEM is not set
  2713. +# CONFIG_CASSINI is not set
  2714. +# CONFIG_NET_VENDOR_3COM is not set
  2715. +# CONFIG_NET_VENDOR_SMC is not set
  2716. +# CONFIG_SMC91X is not set
  2717. +# CONFIG_DM9000 is not set
  2718. +# CONFIG_ETHOC is not set
  2719. +# CONFIG_NET_VENDOR_RACAL is not set
  2720. +# CONFIG_DNET is not set
  2721. +# CONFIG_NET_TULIP is not set
  2722. +# CONFIG_AT1700 is not set
  2723. +# CONFIG_DEPCA is not set
  2724. +# CONFIG_HP100 is not set
  2725. +# CONFIG_NET_ISA is not set
  2726. +# CONFIG_IBM_NEW_EMAC_ZMII is not set
  2727. +# CONFIG_IBM_NEW_EMAC_RGMII is not set
  2728. +# CONFIG_IBM_NEW_EMAC_TAH is not set
  2729. +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
  2730. +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
  2731. +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
  2732. +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
  2733. +CONFIG_NET_PCI=y
  2734. +# CONFIG_PCNET32 is not set
  2735. +# CONFIG_AMD8111_ETH is not set
  2736. +# CONFIG_ADAPTEC_STARFIRE is not set
  2737. +# CONFIG_AC3200 is not set
  2738. +# CONFIG_APRICOT is not set
  2739. +# CONFIG_B44 is not set
  2740. +# CONFIG_FORCEDETH is not set
  2741. +# CONFIG_CS89x0 is not set
  2742. +# CONFIG_TC35815 is not set
  2743. +# CONFIG_E100 is not set
  2744. +# CONFIG_FEALNX is not set
  2745. +# CONFIG_NATSEMI is not set
  2746. +# CONFIG_NE2K_PCI is not set
  2747. +# CONFIG_8139CP is not set
  2748. +CONFIG_8139TOO=y
  2749. +# CONFIG_8139TOO_PIO is not set
  2750. +# CONFIG_8139TOO_TUNE_TWISTER is not set
  2751. +# CONFIG_8139TOO_8129 is not set
  2752. +# CONFIG_8139_OLD_RX_RESET is not set
  2753. +# CONFIG_R6040 is not set
  2754. +# CONFIG_SIS900 is not set
  2755. +# CONFIG_EPIC100 is not set
  2756. +# CONFIG_SMSC9420 is not set
  2757. +# CONFIG_SUNDANCE is not set
  2758. +# CONFIG_TLAN is not set
  2759. +# CONFIG_KS8842 is not set
  2760. +# CONFIG_VIA_RHINE is not set
  2761. +# CONFIG_SC92031 is not set
  2762. +# CONFIG_ATL2 is not set
  2763. +CONFIG_NETDEV_1000=y
  2764. +# CONFIG_ACENIC is not set
  2765. +# CONFIG_DL2K is not set
  2766. +# CONFIG_E1000 is not set
  2767. +# CONFIG_E1000E is not set
  2768. +# CONFIG_IP1000 is not set
  2769. +# CONFIG_IGB is not set
  2770. +# CONFIG_IGBVF is not set
  2771. +# CONFIG_NS83820 is not set
  2772. +# CONFIG_HAMACHI is not set
  2773. +# CONFIG_YELLOWFIN is not set
  2774. +# CONFIG_R8169 is not set
  2775. +# CONFIG_SIS190 is not set
  2776. +# CONFIG_SKGE is not set
  2777. +# CONFIG_SKY2 is not set
  2778. +# CONFIG_VIA_VELOCITY is not set
  2779. +# CONFIG_TIGON3 is not set
  2780. +# CONFIG_BNX2 is not set
  2781. +# CONFIG_CNIC is not set
  2782. +# CONFIG_QLA3XXX is not set
  2783. +# CONFIG_ATL1 is not set
  2784. +# CONFIG_ATL1E is not set
  2785. +# CONFIG_ATL1C is not set
  2786. +# CONFIG_JME is not set
  2787. +CONFIG_NETDEV_10000=y
  2788. +# CONFIG_CHELSIO_T1 is not set
  2789. +CONFIG_CHELSIO_T3_DEPENDS=y
  2790. +# CONFIG_CHELSIO_T3 is not set
  2791. +# CONFIG_ENIC is not set
  2792. +# CONFIG_IXGBE is not set
  2793. +# CONFIG_IXGB is not set
  2794. +# CONFIG_S2IO is not set
  2795. +# CONFIG_VXGE is not set
  2796. +# CONFIG_MYRI10GE is not set
  2797. +# CONFIG_NETXEN_NIC is not set
  2798. +# CONFIG_NIU is not set
  2799. +# CONFIG_MLX4_EN is not set
  2800. +# CONFIG_MLX4_CORE is not set
  2801. +# CONFIG_TEHUTI is not set
  2802. +# CONFIG_BNX2X is not set
  2803. +# CONFIG_QLGE is not set
  2804. +# CONFIG_SFC is not set
  2805. +# CONFIG_BE2NET is not set
  2806. +# CONFIG_TR is not set
  2807. +
  2808. +#
  2809. +# Wireless LAN
  2810. +#
  2811. +# CONFIG_WLAN_PRE80211 is not set
  2812. +# CONFIG_WLAN_80211 is not set
  2813. +
  2814. +#
  2815. +# Enable WiMAX (Networking options) to see the WiMAX drivers
  2816. +#
  2817. +
  2818. +#
  2819. +# USB Network Adapters
  2820. +#
  2821. +# CONFIG_USB_CATC is not set
  2822. +# CONFIG_USB_KAWETH is not set
  2823. +# CONFIG_USB_PEGASUS is not set
  2824. +# CONFIG_USB_RTL8150 is not set
  2825. +# CONFIG_USB_USBNET is not set
  2826. +# CONFIG_WAN is not set
  2827. +# CONFIG_FDDI is not set
  2828. +# CONFIG_HIPPI is not set
  2829. +CONFIG_PPP=m
  2830. +CONFIG_PPP_MULTILINK=y
  2831. +CONFIG_PPP_FILTER=y
  2832. +CONFIG_PPP_ASYNC=m
  2833. +CONFIG_PPP_SYNC_TTY=m
  2834. +CONFIG_PPP_DEFLATE=m
  2835. +CONFIG_PPP_BSDCOMP=m
  2836. +CONFIG_PPP_MPPE=m
  2837. +CONFIG_PPPOE=m
  2838. +CONFIG_PPPOL2TP=m
  2839. +CONFIG_SLIP=m
  2840. +CONFIG_SLIP_COMPRESSED=y
  2841. +CONFIG_SLHC=m
  2842. +CONFIG_SLIP_SMART=y
  2843. +CONFIG_SLIP_MODE_SLIP6=y
  2844. +CONFIG_NET_FC=y
  2845. +# CONFIG_NETCONSOLE is not set
  2846. +# CONFIG_NETPOLL is not set
  2847. +# CONFIG_NET_POLL_CONTROLLER is not set
  2848. +# CONFIG_ISDN is not set
  2849. +# CONFIG_PHONE is not set
  2850. +
  2851. +#
  2852. +# Input device support
  2853. +#
  2854. +CONFIG_INPUT=y
  2855. +CONFIG_INPUT_FF_MEMLESS=y
  2856. +# CONFIG_INPUT_POLLDEV is not set
  2857. +
  2858. +#
  2859. +# Userland interfaces
  2860. +#
  2861. +CONFIG_INPUT_MOUSEDEV=y
  2862. +CONFIG_INPUT_MOUSEDEV_PSAUX=y
  2863. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
  2864. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
  2865. +# CONFIG_INPUT_JOYDEV is not set
  2866. +# CONFIG_INPUT_EVDEV is not set
  2867. +# CONFIG_INPUT_EVBUG is not set
  2868. +
  2869. +#
  2870. +# Input Device Drivers
  2871. +#
  2872. +CONFIG_INPUT_KEYBOARD=y
  2873. +CONFIG_KEYBOARD_ATKBD=m
  2874. +# CONFIG_KEYBOARD_SUNKBD is not set
  2875. +# CONFIG_KEYBOARD_LKKBD is not set
  2876. +# CONFIG_KEYBOARD_XTKBD is not set
  2877. +# CONFIG_KEYBOARD_NEWTON is not set
  2878. +# CONFIG_KEYBOARD_STOWAWAY is not set
  2879. +CONFIG_INPUT_MOUSE=y
  2880. +CONFIG_MOUSE_PS2=y
  2881. +CONFIG_MOUSE_PS2_ALPS=y
  2882. +CONFIG_MOUSE_PS2_LOGIPS2PP=y
  2883. +CONFIG_MOUSE_PS2_SYNAPTICS=y
  2884. +CONFIG_MOUSE_PS2_TRACKPOINT=y
  2885. +# CONFIG_MOUSE_PS2_ELANTECH is not set
  2886. +# CONFIG_MOUSE_PS2_TOUCHKIT is not set
  2887. +CONFIG_MOUSE_SERIAL=y
  2888. +# CONFIG_MOUSE_APPLETOUCH is not set
  2889. +# CONFIG_MOUSE_BCM5974 is not set
  2890. +# CONFIG_MOUSE_INPORT is not set
  2891. +# CONFIG_MOUSE_LOGIBM is not set
  2892. +# CONFIG_MOUSE_PC110PAD is not set
  2893. +# CONFIG_MOUSE_VSXXXAA is not set
  2894. +# CONFIG_MOUSE_SYNAPTICS_I2C is not set
  2895. +# CONFIG_INPUT_JOYSTICK is not set
  2896. +# CONFIG_INPUT_TABLET is not set
  2897. +# CONFIG_INPUT_TOUCHSCREEN is not set
  2898. +# CONFIG_INPUT_MISC is not set
  2899. +
  2900. +#
  2901. +# Hardware I/O ports
  2902. +#
  2903. +CONFIG_SERIO=y
  2904. +CONFIG_SERIO_I8042=y
  2905. +CONFIG_SERIO_SERPORT=y
  2906. +# CONFIG_SERIO_PCIPS2 is not set
  2907. +CONFIG_SERIO_LIBPS2=y
  2908. +# CONFIG_SERIO_RAW is not set
  2909. +# CONFIG_GAMEPORT is not set
  2910. +
  2911. +#
  2912. +# Character devices
  2913. +#
  2914. +CONFIG_VT=y
  2915. +CONFIG_CONSOLE_TRANSLATIONS=y
  2916. +CONFIG_VT_CONSOLE=y
  2917. +CONFIG_HW_CONSOLE=y
  2918. +# CONFIG_VT_HW_CONSOLE_BINDING is not set
  2919. +CONFIG_DEVKMEM=y
  2920. +# CONFIG_SERIAL_NONSTANDARD is not set
  2921. +# CONFIG_NOZOMI is not set
  2922. +
  2923. +#
  2924. +# Serial drivers
  2925. +#
  2926. +CONFIG_SERIAL_8250=y
  2927. +CONFIG_SERIAL_8250_CONSOLE=y
  2928. +CONFIG_SERIAL_8250_PCI=y
  2929. +CONFIG_SERIAL_8250_NR_UARTS=2
  2930. +CONFIG_SERIAL_8250_RUNTIME_UARTS=2
  2931. +# CONFIG_SERIAL_8250_EXTENDED is not set
  2932. +
  2933. +#
  2934. +# Non-8250 serial port support
  2935. +#
  2936. +CONFIG_SERIAL_CORE=y
  2937. +CONFIG_SERIAL_CORE_CONSOLE=y
  2938. +# CONFIG_SERIAL_JSM is not set
  2939. +CONFIG_UNIX98_PTYS=y
  2940. +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
  2941. +CONFIG_LEGACY_PTYS=y
  2942. +CONFIG_LEGACY_PTY_COUNT=256
  2943. +# CONFIG_IPMI_HANDLER is not set
  2944. +CONFIG_HW_RANDOM=y
  2945. +# CONFIG_HW_RANDOM_TIMERIOMEM is not set
  2946. +# CONFIG_DTLK is not set
  2947. +# CONFIG_R3964 is not set
  2948. +# CONFIG_APPLICOM is not set
  2949. +# CONFIG_RAW_DRIVER is not set
  2950. +# CONFIG_TCG_TPM is not set
  2951. +CONFIG_DEVPORT=y
  2952. +CONFIG_I2C=m
  2953. +CONFIG_I2C_BOARDINFO=y
  2954. +CONFIG_I2C_CHARDEV=m
  2955. +CONFIG_I2C_HELPER_AUTO=y
  2956. +
  2957. +#
  2958. +# I2C Hardware Bus support
  2959. +#
  2960. +
  2961. +#
  2962. +# PC SMBus host controller drivers
  2963. +#
  2964. +# CONFIG_I2C_ALI1535 is not set
  2965. +# CONFIG_I2C_ALI1563 is not set
  2966. +# CONFIG_I2C_ALI15X3 is not set
  2967. +# CONFIG_I2C_AMD756 is not set
  2968. +# CONFIG_I2C_AMD8111 is not set
  2969. +# CONFIG_I2C_I801 is not set
  2970. +# CONFIG_I2C_ISCH is not set
  2971. +# CONFIG_I2C_PIIX4 is not set
  2972. +# CONFIG_I2C_NFORCE2 is not set
  2973. +# CONFIG_I2C_SIS5595 is not set
  2974. +# CONFIG_I2C_SIS630 is not set
  2975. +# CONFIG_I2C_SIS96X is not set
  2976. +# CONFIG_I2C_VIA is not set
  2977. +CONFIG_I2C_VIAPRO=m
  2978. +
  2979. +#
  2980. +# I2C system bus drivers (mostly embedded / system-on-chip)
  2981. +#
  2982. +# CONFIG_I2C_OCORES is not set
  2983. +# CONFIG_I2C_SIMTEC is not set
  2984. +
  2985. +#
  2986. +# External I2C/SMBus adapter drivers
  2987. +#
  2988. +# CONFIG_I2C_PARPORT_LIGHT is not set
  2989. +# CONFIG_I2C_TAOS_EVM is not set
  2990. +# CONFIG_I2C_TINY_USB is not set
  2991. +
  2992. +#
  2993. +# Graphics adapter I2C/DDC channel drivers
  2994. +#
  2995. +# CONFIG_I2C_VOODOO3 is not set
  2996. +
  2997. +#
  2998. +# Other I2C/SMBus bus drivers
  2999. +#
  3000. +# CONFIG_I2C_ELEKTOR is not set
  3001. +# CONFIG_I2C_PCA_ISA is not set
  3002. +# CONFIG_I2C_PCA_PLATFORM is not set
  3003. +# CONFIG_I2C_STUB is not set
  3004. +
  3005. +#
  3006. +# Miscellaneous I2C Chip support
  3007. +#
  3008. +# CONFIG_DS1682 is not set
  3009. +# CONFIG_SENSORS_PCF8574 is not set
  3010. +# CONFIG_PCF8575 is not set
  3011. +# CONFIG_SENSORS_PCA9539 is not set
  3012. +# CONFIG_SENSORS_TSL2550 is not set
  3013. +# CONFIG_I2C_DEBUG_CORE is not set
  3014. +# CONFIG_I2C_DEBUG_ALGO is not set
  3015. +# CONFIG_I2C_DEBUG_BUS is not set
  3016. +# CONFIG_I2C_DEBUG_CHIP is not set
  3017. +# CONFIG_SPI is not set
  3018. +
  3019. +#
  3020. +# PPS support
  3021. +#
  3022. +# CONFIG_PPS is not set
  3023. +# CONFIG_W1 is not set
  3024. +# CONFIG_POWER_SUPPLY is not set
  3025. +# CONFIG_HWMON is not set
  3026. +# CONFIG_THERMAL is not set
  3027. +# CONFIG_THERMAL_HWMON is not set
  3028. +# CONFIG_WATCHDOG is not set
  3029. +CONFIG_SSB_POSSIBLE=y
  3030. +
  3031. +#
  3032. +# Sonics Silicon Backplane
  3033. +#
  3034. +# CONFIG_SSB is not set
  3035. +
  3036. +#
  3037. +# Multifunction device drivers
  3038. +#
  3039. +# CONFIG_MFD_CORE is not set
  3040. +# CONFIG_MFD_SM501 is not set
  3041. +# CONFIG_HTC_PASIC3 is not set
  3042. +# CONFIG_MFD_TMIO is not set
  3043. +# CONFIG_MFD_WM8400 is not set
  3044. +# CONFIG_MFD_WM8350_I2C is not set
  3045. +# CONFIG_MFD_PCF50633 is not set
  3046. +# CONFIG_AB3100_CORE is not set
  3047. +# CONFIG_REGULATOR is not set
  3048. +# CONFIG_MEDIA_SUPPORT is not set
  3049. +
  3050. +#
  3051. +# Graphics support
  3052. +#
  3053. +# CONFIG_DRM is not set
  3054. +# CONFIG_VGASTATE is not set
  3055. +CONFIG_VIDEO_OUTPUT_CONTROL=m
  3056. +CONFIG_FB=y
  3057. +# CONFIG_FIRMWARE_EDID is not set
  3058. +# CONFIG_FB_DDC is not set
  3059. +# CONFIG_FB_BOOT_VESA_SUPPORT is not set
  3060. +CONFIG_FB_CFB_FILLRECT=y
  3061. +CONFIG_FB_CFB_COPYAREA=y
  3062. +CONFIG_FB_CFB_IMAGEBLIT=y
  3063. +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
  3064. +# CONFIG_FB_SYS_FILLRECT is not set
  3065. +# CONFIG_FB_SYS_COPYAREA is not set
  3066. +# CONFIG_FB_SYS_IMAGEBLIT is not set
  3067. +# CONFIG_FB_FOREIGN_ENDIAN is not set
  3068. +# CONFIG_FB_SYS_FOPS is not set
  3069. +# CONFIG_FB_SVGALIB is not set
  3070. +# CONFIG_FB_MACMODES is not set
  3071. +CONFIG_FB_BACKLIGHT=y
  3072. +CONFIG_FB_MODE_HELPERS=y
  3073. +# CONFIG_FB_TILEBLITTING is not set
  3074. +
  3075. +#
  3076. +# Frame buffer hardware drivers
  3077. +#
  3078. +# CONFIG_FB_CIRRUS is not set
  3079. +# CONFIG_FB_PM2 is not set
  3080. +# CONFIG_FB_CYBER2000 is not set
  3081. +# CONFIG_FB_ASILIANT is not set
  3082. +# CONFIG_FB_IMSTT is not set
  3083. +# CONFIG_FB_S1D13XXX is not set
  3084. +# CONFIG_FB_NVIDIA is not set
  3085. +# CONFIG_FB_RIVA is not set
  3086. +# CONFIG_FB_MATROX is not set
  3087. +CONFIG_FB_RADEON=y
  3088. +# CONFIG_FB_RADEON_I2C is not set
  3089. +CONFIG_FB_RADEON_BACKLIGHT=y
  3090. +# CONFIG_FB_RADEON_DEBUG is not set
  3091. +# CONFIG_FB_ATY128 is not set
  3092. +# CONFIG_FB_ATY is not set
  3093. +# CONFIG_FB_S3 is not set
  3094. +# CONFIG_FB_SAVAGE is not set
  3095. +# CONFIG_FB_SIS is not set
  3096. +# CONFIG_FB_VIA is not set
  3097. +# CONFIG_FB_NEOMAGIC is not set
  3098. +# CONFIG_FB_KYRO is not set
  3099. +# CONFIG_FB_3DFX is not set
  3100. +# CONFIG_FB_VOODOO1 is not set
  3101. +# CONFIG_FB_VT8623 is not set
  3102. +# CONFIG_FB_TRIDENT is not set
  3103. +# CONFIG_FB_ARK is not set
  3104. +# CONFIG_FB_PM3 is not set
  3105. +# CONFIG_FB_CARMINE is not set
  3106. +# CONFIG_FB_SM7XX is not set
  3107. +# CONFIG_FB_VIRTUAL is not set
  3108. +# CONFIG_FB_METRONOME is not set
  3109. +# CONFIG_FB_MB862XX is not set
  3110. +# CONFIG_FB_BROADSHEET is not set
  3111. +CONFIG_BACKLIGHT_LCD_SUPPORT=y
  3112. +CONFIG_LCD_CLASS_DEVICE=m
  3113. +# CONFIG_LCD_ILI9320 is not set
  3114. +# CONFIG_LCD_PLATFORM is not set
  3115. +CONFIG_BACKLIGHT_CLASS_DEVICE=y
  3116. +CONFIG_BACKLIGHT_GENERIC=y
  3117. +
  3118. +#
  3119. +# Display device support
  3120. +#
  3121. +# CONFIG_DISPLAY_SUPPORT is not set
  3122. +
  3123. +#
  3124. +# Console display driver support
  3125. +#
  3126. +# CONFIG_VGA_CONSOLE is not set
  3127. +# CONFIG_MDA_CONSOLE is not set
  3128. +CONFIG_DUMMY_CONSOLE=y
  3129. +CONFIG_FRAMEBUFFER_CONSOLE=y
  3130. +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
  3131. +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
  3132. +# CONFIG_FONTS is not set
  3133. +CONFIG_FONT_8x8=y
  3134. +CONFIG_FONT_8x16=y
  3135. +# CONFIG_LOGO is not set
  3136. +CONFIG_SOUND=y
  3137. +CONFIG_SOUND_OSS_CORE=y
  3138. +CONFIG_SND=m
  3139. +CONFIG_SND_TIMER=m
  3140. +CONFIG_SND_PCM=m
  3141. +CONFIG_SND_RAWMIDI=m
  3142. +CONFIG_SND_SEQUENCER=m
  3143. +CONFIG_SND_SEQ_DUMMY=m
  3144. +CONFIG_SND_OSSEMUL=y
  3145. +CONFIG_SND_MIXER_OSS=m
  3146. +CONFIG_SND_PCM_OSS=m
  3147. +CONFIG_SND_PCM_OSS_PLUGINS=y
  3148. +CONFIG_SND_SEQUENCER_OSS=y
  3149. +# CONFIG_SND_HRTIMER is not set
  3150. +# CONFIG_SND_DYNAMIC_MINORS is not set
  3151. +CONFIG_SND_SUPPORT_OLD_API=y
  3152. +CONFIG_SND_VERBOSE_PROCFS=y
  3153. +# CONFIG_SND_VERBOSE_PRINTK is not set
  3154. +# CONFIG_SND_DEBUG is not set
  3155. +CONFIG_SND_VMASTER=y
  3156. +CONFIG_SND_RAWMIDI_SEQ=m
  3157. +# CONFIG_SND_OPL3_LIB_SEQ is not set
  3158. +# CONFIG_SND_OPL4_LIB_SEQ is not set
  3159. +# CONFIG_SND_SBAWE_SEQ is not set
  3160. +# CONFIG_SND_EMU10K1_SEQ is not set
  3161. +CONFIG_SND_MPU401_UART=m
  3162. +CONFIG_SND_AC97_CODEC=m
  3163. +CONFIG_SND_DRIVERS=y
  3164. +# CONFIG_SND_DUMMY is not set
  3165. +# CONFIG_SND_VIRMIDI is not set
  3166. +# CONFIG_SND_MTPAV is not set
  3167. +# CONFIG_SND_SERIAL_U16550 is not set
  3168. +# CONFIG_SND_MPU401 is not set
  3169. +# CONFIG_SND_AC97_POWER_SAVE is not set
  3170. +CONFIG_SND_PCI=y
  3171. +# CONFIG_SND_AD1889 is not set
  3172. +# CONFIG_SND_ALS300 is not set
  3173. +# CONFIG_SND_ALI5451 is not set
  3174. +# CONFIG_SND_ATIIXP is not set
  3175. +# CONFIG_SND_ATIIXP_MODEM is not set
  3176. +# CONFIG_SND_AU8810 is not set
  3177. +# CONFIG_SND_AU8820 is not set
  3178. +# CONFIG_SND_AU8830 is not set
  3179. +# CONFIG_SND_AW2 is not set
  3180. +# CONFIG_SND_AZT3328 is not set
  3181. +# CONFIG_SND_BT87X is not set
  3182. +# CONFIG_SND_CA0106 is not set
  3183. +# CONFIG_SND_CMIPCI is not set
  3184. +# CONFIG_SND_OXYGEN is not set
  3185. +# CONFIG_SND_CS4281 is not set
  3186. +# CONFIG_SND_CS46XX is not set
  3187. +# CONFIG_SND_CS5535AUDIO is not set
  3188. +# CONFIG_SND_CTXFI is not set
  3189. +# CONFIG_SND_DARLA20 is not set
  3190. +# CONFIG_SND_GINA20 is not set
  3191. +# CONFIG_SND_LAYLA20 is not set
  3192. +# CONFIG_SND_DARLA24 is not set
  3193. +# CONFIG_SND_GINA24 is not set
  3194. +# CONFIG_SND_LAYLA24 is not set
  3195. +# CONFIG_SND_MONA is not set
  3196. +# CONFIG_SND_MIA is not set
  3197. +# CONFIG_SND_ECHO3G is not set
  3198. +# CONFIG_SND_INDIGO is not set
  3199. +# CONFIG_SND_INDIGOIO is not set
  3200. +# CONFIG_SND_INDIGODJ is not set
  3201. +# CONFIG_SND_INDIGOIOX is not set
  3202. +# CONFIG_SND_INDIGODJX is not set
  3203. +# CONFIG_SND_EMU10K1 is not set
  3204. +# CONFIG_SND_EMU10K1X is not set
  3205. +# CONFIG_SND_ENS1370 is not set
  3206. +# CONFIG_SND_ENS1371 is not set
  3207. +# CONFIG_SND_ES1938 is not set
  3208. +# CONFIG_SND_ES1968 is not set
  3209. +# CONFIG_SND_FM801 is not set
  3210. +# CONFIG_SND_HDA_INTEL is not set
  3211. +# CONFIG_SND_HDSP is not set
  3212. +# CONFIG_SND_HDSPM is not set
  3213. +# CONFIG_SND_HIFIER is not set
  3214. +# CONFIG_SND_ICE1712 is not set
  3215. +# CONFIG_SND_ICE1724 is not set
  3216. +# CONFIG_SND_INTEL8X0 is not set
  3217. +# CONFIG_SND_INTEL8X0M is not set
  3218. +# CONFIG_SND_KORG1212 is not set
  3219. +# CONFIG_SND_LX6464ES is not set
  3220. +# CONFIG_SND_MAESTRO3 is not set
  3221. +# CONFIG_SND_MIXART is not set
  3222. +# CONFIG_SND_NM256 is not set
  3223. +# CONFIG_SND_PCXHR is not set
  3224. +# CONFIG_SND_RIPTIDE is not set
  3225. +# CONFIG_SND_RME32 is not set
  3226. +# CONFIG_SND_RME96 is not set
  3227. +# CONFIG_SND_RME9652 is not set
  3228. +# CONFIG_SND_SONICVIBES is not set
  3229. +# CONFIG_SND_TRIDENT is not set
  3230. +CONFIG_SND_VIA82XX=m
  3231. +# CONFIG_SND_VIA82XX_MODEM is not set
  3232. +# CONFIG_SND_VIRTUOSO is not set
  3233. +# CONFIG_SND_VX222 is not set
  3234. +# CONFIG_SND_YMFPCI is not set
  3235. +CONFIG_SND_MIPS=y
  3236. +CONFIG_SND_USB=y
  3237. +# CONFIG_SND_USB_AUDIO is not set
  3238. +# CONFIG_SND_USB_CAIAQ is not set
  3239. +# CONFIG_SND_SOC is not set
  3240. +# CONFIG_SOUND_PRIME is not set
  3241. +CONFIG_AC97_BUS=m
  3242. +CONFIG_HID_SUPPORT=y
  3243. +CONFIG_HID=y
  3244. +# CONFIG_HID_DEBUG is not set
  3245. +CONFIG_HIDRAW=y
  3246. +
  3247. +#
  3248. +# USB Input Devices
  3249. +#
  3250. +CONFIG_USB_HID=m
  3251. +CONFIG_HID_PID=y
  3252. +CONFIG_USB_HIDDEV=y
  3253. +
  3254. +#
  3255. +# USB HID Boot Protocol drivers
  3256. +#
  3257. +# CONFIG_USB_KBD is not set
  3258. +# CONFIG_USB_MOUSE is not set
  3259. +
  3260. +#
  3261. +# Special HID drivers
  3262. +#
  3263. +CONFIG_HID_A4TECH=m
  3264. +CONFIG_HID_APPLE=m
  3265. +CONFIG_HID_BELKIN=m
  3266. +CONFIG_HID_CHERRY=m
  3267. +CONFIG_HID_CHICONY=m
  3268. +CONFIG_HID_CYPRESS=m
  3269. +# CONFIG_HID_DRAGONRISE is not set
  3270. +CONFIG_HID_EZKEY=m
  3271. +# CONFIG_HID_KYE is not set
  3272. +CONFIG_HID_GYRATION=m
  3273. +# CONFIG_HID_KENSINGTON is not set
  3274. +CONFIG_HID_LOGITECH=m
  3275. +CONFIG_LOGITECH_FF=y
  3276. +CONFIG_LOGIRUMBLEPAD2_FF=y
  3277. +CONFIG_HID_MICROSOFT=m
  3278. +CONFIG_HID_MONTEREY=m
  3279. +# CONFIG_HID_NTRIG is not set
  3280. +CONFIG_HID_PANTHERLORD=m
  3281. +# CONFIG_PANTHERLORD_FF is not set
  3282. +CONFIG_HID_PETALYNX=m
  3283. +CONFIG_HID_SAMSUNG=m
  3284. +CONFIG_HID_SONY=m
  3285. +CONFIG_HID_SUNPLUS=m
  3286. +# CONFIG_HID_GREENASIA is not set
  3287. +# CONFIG_HID_SMARTJOYPLUS is not set
  3288. +# CONFIG_HID_TOPSEED is not set
  3289. +# CONFIG_HID_THRUSTMASTER is not set
  3290. +# CONFIG_HID_ZEROPLUS is not set
  3291. +CONFIG_USB_SUPPORT=y
  3292. +CONFIG_USB_ARCH_HAS_HCD=y
  3293. +CONFIG_USB_ARCH_HAS_OHCI=y
  3294. +CONFIG_USB_ARCH_HAS_EHCI=y
  3295. +CONFIG_USB=y
  3296. +# CONFIG_USB_DEBUG is not set
  3297. +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
  3298. +
  3299. +#
  3300. +# Miscellaneous USB options
  3301. +#
  3302. +CONFIG_USB_DEVICEFS=y
  3303. +# CONFIG_USB_DEVICE_CLASS is not set
  3304. +# CONFIG_USB_DYNAMIC_MINORS is not set
  3305. +# CONFIG_USB_SUSPEND is not set
  3306. +# CONFIG_USB_OTG is not set
  3307. +CONFIG_USB_OTG_WHITELIST=y
  3308. +# CONFIG_USB_OTG_BLACKLIST_HUB is not set
  3309. +# CONFIG_USB_MON is not set
  3310. +# CONFIG_USB_WUSB is not set
  3311. +CONFIG_USB_WUSB_CBAF=m
  3312. +# CONFIG_USB_WUSB_CBAF_DEBUG is not set
  3313. +
  3314. +#
  3315. +# USB Host Controller Drivers
  3316. +#
  3317. +CONFIG_USB_C67X00_HCD=m
  3318. +# CONFIG_USB_XHCI_HCD is not set
  3319. +CONFIG_USB_EHCI_HCD=y
  3320. +CONFIG_USB_EHCI_ROOT_HUB_TT=y
  3321. +CONFIG_USB_EHCI_TT_NEWSCHED=y
  3322. +# CONFIG_USB_OXU210HP_HCD is not set
  3323. +# CONFIG_USB_ISP116X_HCD is not set
  3324. +CONFIG_USB_ISP1760_HCD=m
  3325. +CONFIG_USB_OHCI_HCD=y
  3326. +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
  3327. +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
  3328. +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
  3329. +CONFIG_USB_UHCI_HCD=m
  3330. +# CONFIG_USB_SL811_HCD is not set
  3331. +CONFIG_USB_R8A66597_HCD=m
  3332. +# CONFIG_USB_WHCI_HCD is not set
  3333. +# CONFIG_USB_HWA_HCD is not set
  3334. +
  3335. +#
  3336. +# USB Device Class drivers
  3337. +#
  3338. +CONFIG_USB_ACM=y
  3339. +CONFIG_USB_PRINTER=y
  3340. +CONFIG_USB_WDM=m
  3341. +CONFIG_USB_TMC=m
  3342. +
  3343. +#
  3344. +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
  3345. +#
  3346. +
  3347. +#
  3348. +# also be needed; see USB_STORAGE Help for more info
  3349. +#
  3350. +CONFIG_USB_STORAGE=y
  3351. +# CONFIG_USB_STORAGE_DEBUG is not set
  3352. +# CONFIG_USB_STORAGE_DATAFAB is not set
  3353. +# CONFIG_USB_STORAGE_FREECOM is not set
  3354. +# CONFIG_USB_STORAGE_ISD200 is not set
  3355. +# CONFIG_USB_STORAGE_USBAT is not set
  3356. +# CONFIG_USB_STORAGE_SDDR09 is not set
  3357. +# CONFIG_USB_STORAGE_SDDR55 is not set
  3358. +# CONFIG_USB_STORAGE_JUMPSHOT is not set
  3359. +# CONFIG_USB_STORAGE_ALAUDA is not set
  3360. +CONFIG_USB_STORAGE_ONETOUCH=y
  3361. +# CONFIG_USB_STORAGE_KARMA is not set
  3362. +CONFIG_USB_STORAGE_CYPRESS_ATACB=y
  3363. +CONFIG_USB_LIBUSUAL=y
  3364. +
  3365. +#
  3366. +# USB Imaging devices
  3367. +#
  3368. +# CONFIG_USB_MDC800 is not set
  3369. +# CONFIG_USB_MICROTEK is not set
  3370. +
  3371. +#
  3372. +# USB port drivers
  3373. +#
  3374. +# CONFIG_USB_SERIAL is not set
  3375. +
  3376. +#
  3377. +# USB Miscellaneous drivers
  3378. +#
  3379. +# CONFIG_USB_EMI62 is not set
  3380. +# CONFIG_USB_EMI26 is not set
  3381. +# CONFIG_USB_ADUTUX is not set
  3382. +CONFIG_USB_SEVSEG=m
  3383. +# CONFIG_USB_RIO500 is not set
  3384. +# CONFIG_USB_LEGOTOWER is not set
  3385. +# CONFIG_USB_LCD is not set
  3386. +# CONFIG_USB_BERRY_CHARGE is not set
  3387. +# CONFIG_USB_LED is not set
  3388. +# CONFIG_USB_CYPRESS_CY7C63 is not set
  3389. +# CONFIG_USB_CYTHERM is not set
  3390. +# CONFIG_USB_IDMOUSE is not set
  3391. +# CONFIG_USB_FTDI_ELAN is not set
  3392. +# CONFIG_USB_APPLEDISPLAY is not set
  3393. +# CONFIG_USB_SISUSBVGA is not set
  3394. +# CONFIG_USB_LD is not set
  3395. +# CONFIG_USB_TRANCEVIBRATOR is not set
  3396. +# CONFIG_USB_IOWARRIOR is not set
  3397. +# CONFIG_USB_TEST is not set
  3398. +CONFIG_USB_ISIGHTFW=m
  3399. +CONFIG_USB_VST=m
  3400. +# CONFIG_USB_GADGET is not set
  3401. +
  3402. +#
  3403. +# OTG and related infrastructure
  3404. +#
  3405. +# CONFIG_NOP_USB_XCEIV is not set
  3406. +# CONFIG_UWB is not set
  3407. +# CONFIG_MMC is not set
  3408. +# CONFIG_MEMSTICK is not set
  3409. +# CONFIG_NEW_LEDS is not set
  3410. +# CONFIG_ACCESSIBILITY is not set
  3411. +# CONFIG_INFINIBAND is not set
  3412. +CONFIG_RTC_LIB=y
  3413. +CONFIG_RTC_CLASS=y
  3414. +CONFIG_RTC_HCTOSYS=y
  3415. +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
  3416. +# CONFIG_RTC_DEBUG is not set
  3417. +
  3418. +#
  3419. +# RTC interfaces
  3420. +#
  3421. +CONFIG_RTC_INTF_SYSFS=y
  3422. +CONFIG_RTC_INTF_PROC=y
  3423. +CONFIG_RTC_INTF_DEV=y
  3424. +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
  3425. +# CONFIG_RTC_DRV_TEST is not set
  3426. +
  3427. +#
  3428. +# I2C RTC drivers
  3429. +#
  3430. +# CONFIG_RTC_DRV_DS1307 is not set
  3431. +# CONFIG_RTC_DRV_DS1374 is not set
  3432. +# CONFIG_RTC_DRV_DS1672 is not set
  3433. +# CONFIG_RTC_DRV_MAX6900 is not set
  3434. +# CONFIG_RTC_DRV_RS5C372 is not set
  3435. +# CONFIG_RTC_DRV_ISL1208 is not set
  3436. +# CONFIG_RTC_DRV_X1205 is not set
  3437. +# CONFIG_RTC_DRV_PCF8563 is not set
  3438. +# CONFIG_RTC_DRV_PCF8583 is not set
  3439. +# CONFIG_RTC_DRV_M41T80 is not set
  3440. +# CONFIG_RTC_DRV_S35390A is not set
  3441. +# CONFIG_RTC_DRV_FM3130 is not set
  3442. +# CONFIG_RTC_DRV_RX8581 is not set
  3443. +# CONFIG_RTC_DRV_RX8025 is not set
  3444. +
  3445. +#
  3446. +# SPI RTC drivers
  3447. +#
  3448. +
  3449. +#
  3450. +# Platform RTC drivers
  3451. +#
  3452. +CONFIG_RTC_DRV_CMOS=y
  3453. +# CONFIG_RTC_DRV_DS1286 is not set
  3454. +# CONFIG_RTC_DRV_DS1511 is not set
  3455. +# CONFIG_RTC_DRV_DS1553 is not set
  3456. +# CONFIG_RTC_DRV_DS1742 is not set
  3457. +# CONFIG_RTC_DRV_STK17TA8 is not set
  3458. +# CONFIG_RTC_DRV_M48T86 is not set
  3459. +# CONFIG_RTC_DRV_M48T35 is not set
  3460. +# CONFIG_RTC_DRV_M48T59 is not set
  3461. +# CONFIG_RTC_DRV_BQ4802 is not set
  3462. +# CONFIG_RTC_DRV_V3020 is not set
  3463. +
  3464. +#
  3465. +# on-CPU RTC drivers
  3466. +#
  3467. +# CONFIG_DMADEVICES is not set
  3468. +# CONFIG_AUXDISPLAY is not set
  3469. +CONFIG_UIO=m
  3470. +CONFIG_UIO_CIF=m
  3471. +# CONFIG_UIO_PDRV is not set
  3472. +# CONFIG_UIO_PDRV_GENIRQ is not set
  3473. +# CONFIG_UIO_SMX is not set
  3474. +# CONFIG_UIO_AEC is not set
  3475. +# CONFIG_UIO_SERCOS3 is not set
  3476. +
  3477. +#
  3478. +# TI VLYNQ
  3479. +#
  3480. +# CONFIG_STAGING is not set
  3481. +
  3482. +#
  3483. +# File systems
  3484. +#
  3485. +CONFIG_EXT2_FS=y
  3486. +# CONFIG_EXT2_FS_XATTR is not set
  3487. +CONFIG_EXT2_FS_XIP=y
  3488. +CONFIG_EXT3_FS=y
  3489. +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
  3490. +# CONFIG_EXT3_FS_XATTR is not set
  3491. +CONFIG_EXT4_FS=m
  3492. +CONFIG_EXT4DEV_COMPAT=y
  3493. +CONFIG_EXT4_FS_XATTR=y
  3494. +CONFIG_EXT4_FS_POSIX_ACL=y
  3495. +CONFIG_EXT4_FS_SECURITY=y
  3496. +CONFIG_FS_XIP=y
  3497. +CONFIG_JBD=y
  3498. +# CONFIG_JBD_DEBUG is not set
  3499. +CONFIG_JBD2=m
  3500. +# CONFIG_JBD2_DEBUG is not set
  3501. +CONFIG_FS_MBCACHE=m
  3502. +CONFIG_REISERFS_FS=m
  3503. +# CONFIG_REISERFS_CHECK is not set
  3504. +# CONFIG_REISERFS_PROC_INFO is not set
  3505. +# CONFIG_REISERFS_FS_XATTR is not set
  3506. +# CONFIG_JFS_FS is not set
  3507. +CONFIG_FS_POSIX_ACL=y
  3508. +# CONFIG_XFS_FS is not set
  3509. +# CONFIG_GFS2_FS is not set
  3510. +# CONFIG_OCFS2_FS is not set
  3511. +# CONFIG_BTRFS_FS is not set
  3512. +CONFIG_FILE_LOCKING=y
  3513. +CONFIG_FSNOTIFY=y
  3514. +CONFIG_DNOTIFY=y
  3515. +CONFIG_INOTIFY=y
  3516. +CONFIG_INOTIFY_USER=y
  3517. +# CONFIG_QUOTA is not set
  3518. +CONFIG_AUTOFS_FS=y
  3519. +CONFIG_AUTOFS4_FS=y
  3520. +CONFIG_FUSE_FS=y
  3521. +# CONFIG_CUSE is not set
  3522. +
  3523. +#
  3524. +# Caches
  3525. +#
  3526. +# CONFIG_FSCACHE is not set
  3527. +
  3528. +#
  3529. +# CD-ROM/DVD Filesystems
  3530. +#
  3531. +CONFIG_ISO9660_FS=m
  3532. +CONFIG_JOLIET=y
  3533. +CONFIG_ZISOFS=y
  3534. +CONFIG_UDF_FS=m
  3535. +CONFIG_UDF_NLS=y
  3536. +
  3537. +#
  3538. +# DOS/FAT/NT Filesystems
  3539. +#
  3540. +CONFIG_FAT_FS=m
  3541. +CONFIG_MSDOS_FS=m
  3542. +CONFIG_VFAT_FS=m
  3543. +CONFIG_FAT_DEFAULT_CODEPAGE=936
  3544. +CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
  3545. +CONFIG_NTFS_FS=m
  3546. +# CONFIG_NTFS_DEBUG is not set
  3547. +CONFIG_NTFS_RW=y
  3548. +
  3549. +#
  3550. +# Pseudo filesystems
  3551. +#
  3552. +CONFIG_PROC_FS=y
  3553. +CONFIG_PROC_KCORE=y
  3554. +CONFIG_PROC_SYSCTL=y
  3555. +CONFIG_PROC_PAGE_MONITOR=y
  3556. +CONFIG_SYSFS=y
  3557. +CONFIG_TMPFS=y
  3558. +# CONFIG_TMPFS_POSIX_ACL is not set
  3559. +# CONFIG_HUGETLB_PAGE is not set
  3560. +# CONFIG_CONFIGFS_FS is not set
  3561. +CONFIG_MISC_FILESYSTEMS=y
  3562. +# CONFIG_ADFS_FS is not set
  3563. +# CONFIG_AFFS_FS is not set
  3564. +# CONFIG_HFS_FS is not set
  3565. +# CONFIG_HFSPLUS_FS is not set
  3566. +# CONFIG_BEFS_FS is not set
  3567. +# CONFIG_BFS_FS is not set
  3568. +# CONFIG_EFS_FS is not set
  3569. +# CONFIG_JFFS2_FS is not set
  3570. +# CONFIG_CRAMFS is not set
  3571. +# CONFIG_SQUASHFS is not set
  3572. +# CONFIG_VXFS_FS is not set
  3573. +# CONFIG_MINIX_FS is not set
  3574. +CONFIG_OMFS_FS=m
  3575. +# CONFIG_HPFS_FS is not set
  3576. +# CONFIG_QNX4FS_FS is not set
  3577. +# CONFIG_ROMFS_FS is not set
  3578. +# CONFIG_SYSV_FS is not set
  3579. +# CONFIG_UFS_FS is not set
  3580. +# CONFIG_NILFS2_FS is not set
  3581. +CONFIG_NETWORK_FILESYSTEMS=y
  3582. +CONFIG_NFS_FS=m
  3583. +CONFIG_NFS_V3=y
  3584. +CONFIG_NFS_V3_ACL=y
  3585. +CONFIG_NFS_V4=y
  3586. +# CONFIG_NFS_V4_1 is not set
  3587. +CONFIG_NFSD=m
  3588. +CONFIG_NFSD_V2_ACL=y
  3589. +CONFIG_NFSD_V3=y
  3590. +CONFIG_NFSD_V3_ACL=y
  3591. +CONFIG_NFSD_V4=y
  3592. +CONFIG_LOCKD=m
  3593. +CONFIG_LOCKD_V4=y
  3594. +CONFIG_EXPORTFS=m
  3595. +CONFIG_NFS_ACL_SUPPORT=m
  3596. +CONFIG_NFS_COMMON=y
  3597. +CONFIG_SUNRPC=m
  3598. +CONFIG_SUNRPC_GSS=m
  3599. +CONFIG_RPCSEC_GSS_KRB5=m
  3600. +# CONFIG_RPCSEC_GSS_SPKM3 is not set
  3601. +CONFIG_SMB_FS=m
  3602. +CONFIG_SMB_NLS_DEFAULT=y
  3603. +CONFIG_SMB_NLS_REMOTE="cp936"
  3604. +CONFIG_CIFS=m
  3605. +CONFIG_CIFS_STATS=y
  3606. +CONFIG_CIFS_STATS2=y
  3607. +CONFIG_CIFS_WEAK_PW_HASH=y
  3608. +CONFIG_CIFS_XATTR=y
  3609. +CONFIG_CIFS_POSIX=y
  3610. +CONFIG_CIFS_DEBUG2=y
  3611. +CONFIG_CIFS_EXPERIMENTAL=y
  3612. +# CONFIG_NCP_FS is not set
  3613. +# CONFIG_CODA_FS is not set
  3614. +# CONFIG_AFS_FS is not set
  3615. +# CONFIG_9P_FS is not set
  3616. +
  3617. +#
  3618. +# Partition Types
  3619. +#
  3620. +CONFIG_PARTITION_ADVANCED=y
  3621. +# CONFIG_ACORN_PARTITION is not set
  3622. +# CONFIG_OSF_PARTITION is not set
  3623. +# CONFIG_AMIGA_PARTITION is not set
  3624. +# CONFIG_ATARI_PARTITION is not set
  3625. +# CONFIG_MAC_PARTITION is not set
  3626. +CONFIG_MSDOS_PARTITION=y
  3627. +# CONFIG_BSD_DISKLABEL is not set
  3628. +# CONFIG_MINIX_SUBPARTITION is not set
  3629. +# CONFIG_SOLARIS_X86_PARTITION is not set
  3630. +# CONFIG_UNIXWARE_DISKLABEL is not set
  3631. +# CONFIG_LDM_PARTITION is not set
  3632. +# CONFIG_SGI_PARTITION is not set
  3633. +# CONFIG_ULTRIX_PARTITION is not set
  3634. +# CONFIG_SUN_PARTITION is not set
  3635. +# CONFIG_KARMA_PARTITION is not set
  3636. +# CONFIG_EFI_PARTITION is not set
  3637. +# CONFIG_SYSV68_PARTITION is not set
  3638. +CONFIG_NLS=y
  3639. +CONFIG_NLS_DEFAULT="utf8"
  3640. +# CONFIG_NLS_CODEPAGE_437 is not set
  3641. +# CONFIG_NLS_CODEPAGE_737 is not set
  3642. +# CONFIG_NLS_CODEPAGE_775 is not set
  3643. +# CONFIG_NLS_CODEPAGE_850 is not set
  3644. +# CONFIG_NLS_CODEPAGE_852 is not set
  3645. +# CONFIG_NLS_CODEPAGE_855 is not set
  3646. +# CONFIG_NLS_CODEPAGE_857 is not set
  3647. +# CONFIG_NLS_CODEPAGE_860 is not set
  3648. +# CONFIG_NLS_CODEPAGE_861 is not set
  3649. +# CONFIG_NLS_CODEPAGE_862 is not set
  3650. +# CONFIG_NLS_CODEPAGE_863 is not set
  3651. +# CONFIG_NLS_CODEPAGE_864 is not set
  3652. +# CONFIG_NLS_CODEPAGE_865 is not set
  3653. +# CONFIG_NLS_CODEPAGE_866 is not set
  3654. +# CONFIG_NLS_CODEPAGE_869 is not set
  3655. +CONFIG_NLS_CODEPAGE_936=y
  3656. +# CONFIG_NLS_CODEPAGE_950 is not set
  3657. +# CONFIG_NLS_CODEPAGE_932 is not set
  3658. +# CONFIG_NLS_CODEPAGE_949 is not set
  3659. +# CONFIG_NLS_CODEPAGE_874 is not set
  3660. +# CONFIG_NLS_ISO8859_8 is not set
  3661. +# CONFIG_NLS_CODEPAGE_1250 is not set
  3662. +# CONFIG_NLS_CODEPAGE_1251 is not set
  3663. +# CONFIG_NLS_ASCII is not set
  3664. +CONFIG_NLS_ISO8859_1=y
  3665. +# CONFIG_NLS_ISO8859_2 is not set
  3666. +# CONFIG_NLS_ISO8859_3 is not set
  3667. +# CONFIG_NLS_ISO8859_4 is not set
  3668. +# CONFIG_NLS_ISO8859_5 is not set
  3669. +# CONFIG_NLS_ISO8859_6 is not set
  3670. +# CONFIG_NLS_ISO8859_7 is not set
  3671. +# CONFIG_NLS_ISO8859_9 is not set
  3672. +# CONFIG_NLS_ISO8859_13 is not set
  3673. +# CONFIG_NLS_ISO8859_14 is not set
  3674. +# CONFIG_NLS_ISO8859_15 is not set
  3675. +# CONFIG_NLS_KOI8_R is not set
  3676. +# CONFIG_NLS_KOI8_U is not set
  3677. +CONFIG_NLS_UTF8=y
  3678. +# CONFIG_DLM is not set
  3679. +
  3680. +#
  3681. +# Kernel hacking
  3682. +#
  3683. +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  3684. +# CONFIG_PRINTK_TIME is not set
  3685. +CONFIG_ENABLE_WARN_DEPRECATED=y
  3686. +# CONFIG_ENABLE_MUST_CHECK is not set
  3687. +CONFIG_FRAME_WARN=2048
  3688. +# CONFIG_MAGIC_SYSRQ is not set
  3689. +# CONFIG_UNUSED_SYMBOLS is not set
  3690. +CONFIG_DEBUG_FS=y
  3691. +# CONFIG_HEADERS_CHECK is not set
  3692. +# CONFIG_DEBUG_KERNEL is not set
  3693. +CONFIG_STACKTRACE=y
  3694. +# CONFIG_DEBUG_MEMORY_INIT is not set
  3695. +# CONFIG_RCU_CPU_STALL_DETECTOR is not set
  3696. +CONFIG_SYSCTL_SYSCALL_CHECK=y
  3697. +CONFIG_NOP_TRACER=y
  3698. +CONFIG_RING_BUFFER=y
  3699. +CONFIG_EVENT_TRACING=y
  3700. +CONFIG_CONTEXT_SWITCH_TRACER=y
  3701. +CONFIG_TRACING=y
  3702. +CONFIG_TRACING_SUPPORT=y
  3703. +# CONFIG_FTRACE is not set
  3704. +# CONFIG_DYNAMIC_DEBUG is not set
  3705. +# CONFIG_SAMPLES is not set
  3706. +CONFIG_HAVE_ARCH_KGDB=y
  3707. +CONFIG_CMDLINE=""
  3708. +
  3709. +#
  3710. +# Security options
  3711. +#
  3712. +# CONFIG_KEYS is not set
  3713. +# CONFIG_SECURITY is not set
  3714. +# CONFIG_SECURITYFS is not set
  3715. +CONFIG_SECURITY_FILE_CAPABILITIES=y
  3716. +CONFIG_CRYPTO=y
  3717. +
  3718. +#
  3719. +# Crypto core or helper
  3720. +#
  3721. +CONFIG_CRYPTO_FIPS=y
  3722. +CONFIG_CRYPTO_ALGAPI=y
  3723. +CONFIG_CRYPTO_ALGAPI2=y
  3724. +CONFIG_CRYPTO_AEAD=m
  3725. +CONFIG_CRYPTO_AEAD2=y
  3726. +CONFIG_CRYPTO_BLKCIPHER=m
  3727. +CONFIG_CRYPTO_BLKCIPHER2=y
  3728. +CONFIG_CRYPTO_HASH=y
  3729. +CONFIG_CRYPTO_HASH2=y
  3730. +CONFIG_CRYPTO_RNG=m
  3731. +CONFIG_CRYPTO_RNG2=y
  3732. +CONFIG_CRYPTO_PCOMP=y
  3733. +CONFIG_CRYPTO_MANAGER=y
  3734. +CONFIG_CRYPTO_MANAGER2=y
  3735. +CONFIG_CRYPTO_GF128MUL=m
  3736. +# CONFIG_CRYPTO_NULL is not set
  3737. +CONFIG_CRYPTO_WORKQUEUE=y
  3738. +# CONFIG_CRYPTO_CRYPTD is not set
  3739. +CONFIG_CRYPTO_AUTHENC=m
  3740. +# CONFIG_CRYPTO_TEST is not set
  3741. +
  3742. +#
  3743. +# Authenticated Encryption with Associated Data
  3744. +#
  3745. +CONFIG_CRYPTO_CCM=m
  3746. +CONFIG_CRYPTO_GCM=m
  3747. +CONFIG_CRYPTO_SEQIV=m
  3748. +
  3749. +#
  3750. +# Block modes
  3751. +#
  3752. +CONFIG_CRYPTO_CBC=m
  3753. +CONFIG_CRYPTO_CTR=m
  3754. +CONFIG_CRYPTO_CTS=m
  3755. +CONFIG_CRYPTO_ECB=m
  3756. +# CONFIG_CRYPTO_LRW is not set
  3757. +CONFIG_CRYPTO_PCBC=m
  3758. +CONFIG_CRYPTO_XTS=m
  3759. +
  3760. +#
  3761. +# Hash modes
  3762. +#
  3763. +CONFIG_CRYPTO_HMAC=y
  3764. +# CONFIG_CRYPTO_XCBC is not set
  3765. +
  3766. +#
  3767. +# Digest
  3768. +#
  3769. +# CONFIG_CRYPTO_CRC32C is not set
  3770. +# CONFIG_CRYPTO_MD4 is not set
  3771. +CONFIG_CRYPTO_MD5=m
  3772. +# CONFIG_CRYPTO_MICHAEL_MIC is not set
  3773. +CONFIG_CRYPTO_RMD128=m
  3774. +CONFIG_CRYPTO_RMD160=m
  3775. +CONFIG_CRYPTO_RMD256=m
  3776. +CONFIG_CRYPTO_RMD320=m
  3777. +CONFIG_CRYPTO_SHA1=m
  3778. +# CONFIG_CRYPTO_SHA256 is not set
  3779. +# CONFIG_CRYPTO_SHA512 is not set
  3780. +# CONFIG_CRYPTO_TGR192 is not set
  3781. +# CONFIG_CRYPTO_WP512 is not set
  3782. +
  3783. +#
  3784. +# Ciphers
  3785. +#
  3786. +CONFIG_CRYPTO_AES=m
  3787. +# CONFIG_CRYPTO_ANUBIS is not set
  3788. +CONFIG_CRYPTO_ARC4=m
  3789. +# CONFIG_CRYPTO_BLOWFISH is not set
  3790. +# CONFIG_CRYPTO_CAMELLIA is not set
  3791. +# CONFIG_CRYPTO_CAST5 is not set
  3792. +# CONFIG_CRYPTO_CAST6 is not set
  3793. +CONFIG_CRYPTO_DES=m
  3794. +# CONFIG_CRYPTO_FCRYPT is not set
  3795. +# CONFIG_CRYPTO_KHAZAD is not set
  3796. +CONFIG_CRYPTO_SALSA20=m
  3797. +CONFIG_CRYPTO_SEED=m
  3798. +# CONFIG_CRYPTO_SERPENT is not set
  3799. +# CONFIG_CRYPTO_TEA is not set
  3800. +# CONFIG_CRYPTO_TWOFISH is not set
  3801. +
  3802. +#
  3803. +# Compression
  3804. +#
  3805. +CONFIG_CRYPTO_DEFLATE=m
  3806. +# CONFIG_CRYPTO_ZLIB is not set
  3807. +CONFIG_CRYPTO_LZO=m
  3808. +
  3809. +#
  3810. +# Random Number Generation
  3811. +#
  3812. +CONFIG_CRYPTO_ANSI_CPRNG=m
  3813. +# CONFIG_CRYPTO_HW is not set
  3814. +CONFIG_BINARY_PRINTF=y
  3815. +
  3816. +#
  3817. +# Library routines
  3818. +#
  3819. +CONFIG_BITREVERSE=y
  3820. +CONFIG_GENERIC_FIND_LAST_BIT=y
  3821. +CONFIG_CRC_CCITT=y
  3822. +CONFIG_CRC16=m
  3823. +# CONFIG_CRC_T10DIF is not set
  3824. +CONFIG_CRC_ITU_T=m
  3825. +CONFIG_CRC32=y
  3826. +CONFIG_CRC7=m
  3827. +# CONFIG_LIBCRC32C is not set
  3828. +CONFIG_ZLIB_INFLATE=m
  3829. +CONFIG_ZLIB_DEFLATE=m
  3830. +CONFIG_LZO_COMPRESS=m
  3831. +CONFIG_LZO_DECOMPRESS=m
  3832. +CONFIG_TEXTSEARCH=y
  3833. +CONFIG_TEXTSEARCH_KMP=m
  3834. +CONFIG_TEXTSEARCH_BM=m
  3835. +CONFIG_TEXTSEARCH_FSM=m
  3836. +CONFIG_HAS_IOMEM=y
  3837. +CONFIG_HAS_IOPORT=y
  3838. +CONFIG_HAS_DMA=y
  3839. +CONFIG_NLATTR=y
  3840. diff -Nur linux-2.6.30.5.orig/arch/mips/configs/fuloong2f_defconfig linux-2.6.30.5/arch/mips/configs/fuloong2f_defconfig
  3841. --- linux-2.6.30.5.orig/arch/mips/configs/fuloong2f_defconfig 1970-01-01 01:00:00.000000000 +0100
  3842. +++ linux-2.6.30.5/arch/mips/configs/fuloong2f_defconfig 2009-08-23 19:01:04.000000000 +0200
  3843. @@ -0,0 +1,2637 @@
  3844. +#
  3845. +# Automatically generated make config: don't edit
  3846. +# Linux kernel version: 2.6.30-rc8
  3847. +# Wed Jun 10 22:20:53 2009
  3848. +#
  3849. +CONFIG_MIPS=y
  3850. +
  3851. +#
  3852. +# Machine selection
  3853. +#
  3854. +# CONFIG_MACH_ALCHEMY is not set
  3855. +# CONFIG_BASLER_EXCITE is not set
  3856. +# CONFIG_BCM47XX is not set
  3857. +# CONFIG_MIPS_COBALT is not set
  3858. +# CONFIG_MACH_DECSTATION is not set
  3859. +# CONFIG_MACH_JAZZ is not set
  3860. +# CONFIG_LASAT is not set
  3861. +CONFIG_MACH_LOONGSON=y
  3862. +# CONFIG_MIPS_MALTA is not set
  3863. +# CONFIG_MIPS_SIM is not set
  3864. +# CONFIG_NEC_MARKEINS is not set
  3865. +# CONFIG_MACH_VR41XX is not set
  3866. +# CONFIG_NXP_STB220 is not set
  3867. +# CONFIG_NXP_STB225 is not set
  3868. +# CONFIG_PNX8550_JBS is not set
  3869. +# CONFIG_PNX8550_STB810 is not set
  3870. +# CONFIG_PMC_MSP is not set
  3871. +# CONFIG_PMC_YOSEMITE is not set
  3872. +# CONFIG_SGI_IP22 is not set
  3873. +# CONFIG_SGI_IP27 is not set
  3874. +# CONFIG_SGI_IP28 is not set
  3875. +# CONFIG_SGI_IP32 is not set
  3876. +# CONFIG_SIBYTE_CRHINE is not set
  3877. +# CONFIG_SIBYTE_CARMEL is not set
  3878. +# CONFIG_SIBYTE_CRHONE is not set
  3879. +# CONFIG_SIBYTE_RHONE is not set
  3880. +# CONFIG_SIBYTE_SWARM is not set
  3881. +# CONFIG_SIBYTE_LITTLESUR is not set
  3882. +# CONFIG_SIBYTE_SENTOSA is not set
  3883. +# CONFIG_SIBYTE_BIGSUR is not set
  3884. +# CONFIG_SNI_RM is not set
  3885. +# CONFIG_MACH_TX39XX is not set
  3886. +# CONFIG_MACH_TX49XX is not set
  3887. +# CONFIG_MIKROTIK_RB532 is not set
  3888. +# CONFIG_WR_PPMC is not set
  3889. +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
  3890. +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
  3891. +CONFIG_ARCH_SPARSEMEM_ENABLE=y
  3892. +# CONFIG_LEMOTE_FULOONG2E is not set
  3893. +CONFIG_LEMOTE_FULOONG2F=y
  3894. +# CONFIG_LEMOTE_YEELOONG2F is not set
  3895. +CONFIG_CS5536=y
  3896. +CONFIG_CS5536_MFGPT=y
  3897. +CONFIG_UCA_SIZE=0x2000000
  3898. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
  3899. +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
  3900. +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
  3901. +CONFIG_ARCH_SUPPORTS_OPROFILE=y
  3902. +CONFIG_GENERIC_FIND_NEXT_BIT=y
  3903. +CONFIG_GENERIC_HWEIGHT=y
  3904. +CONFIG_GENERIC_CALIBRATE_DELAY=y
  3905. +CONFIG_GENERIC_CLOCKEVENTS=y
  3906. +CONFIG_GENERIC_TIME=y
  3907. +CONFIG_GENERIC_CMOS_UPDATE=y
  3908. +CONFIG_SCHED_OMIT_FRAME_POINTER=y
  3909. +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
  3910. +CONFIG_DMA_NONCOHERENT=y
  3911. +CONFIG_DMA_NEED_PCI_MAP_STATE=y
  3912. +CONFIG_EARLY_PRINTK=y
  3913. +CONFIG_SYS_HAS_EARLY_PRINTK=y
  3914. +# CONFIG_HOTPLUG_CPU is not set
  3915. +CONFIG_I8259=y
  3916. +# CONFIG_NO_IOPORT is not set
  3917. +CONFIG_GENERIC_ISA_DMA=y
  3918. +CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
  3919. +# CONFIG_CPU_BIG_ENDIAN is not set
  3920. +CONFIG_CPU_LITTLE_ENDIAN=y
  3921. +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
  3922. +CONFIG_IRQ_CPU=y
  3923. +CONFIG_BOOT_ELF32=y
  3924. +CONFIG_MIPS_L1_CACHE_SHIFT=5
  3925. +
  3926. +#
  3927. +# CPU selection
  3928. +#
  3929. +# CONFIG_CPU_LOONGSON2E is not set
  3930. +CONFIG_CPU_LOONGSON2F=y
  3931. +# CONFIG_CPU_MIPS32_R1 is not set
  3932. +# CONFIG_CPU_MIPS32_R2 is not set
  3933. +# CONFIG_CPU_MIPS64_R1 is not set
  3934. +# CONFIG_CPU_MIPS64_R2 is not set
  3935. +# CONFIG_CPU_R3000 is not set
  3936. +# CONFIG_CPU_TX39XX is not set
  3937. +# CONFIG_CPU_VR41XX is not set
  3938. +# CONFIG_CPU_R4300 is not set
  3939. +# CONFIG_CPU_R4X00 is not set
  3940. +# CONFIG_CPU_TX49XX is not set
  3941. +# CONFIG_CPU_R5000 is not set
  3942. +# CONFIG_CPU_R5432 is not set
  3943. +# CONFIG_CPU_R5500 is not set
  3944. +# CONFIG_CPU_R6000 is not set
  3945. +# CONFIG_CPU_NEVADA is not set
  3946. +# CONFIG_CPU_R8000 is not set
  3947. +# CONFIG_CPU_R10000 is not set
  3948. +# CONFIG_CPU_RM7000 is not set
  3949. +# CONFIG_CPU_RM9000 is not set
  3950. +# CONFIG_CPU_SB1 is not set
  3951. +# CONFIG_CPU_CAVIUM_OCTEON is not set
  3952. +CONFIG_CPU_LOONGSON2=y
  3953. +CONFIG_SYS_HAS_CPU_LOONGSON2F=y
  3954. +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
  3955. +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
  3956. +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
  3957. +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
  3958. +
  3959. +#
  3960. +# Kernel type
  3961. +#
  3962. +# CONFIG_32BIT is not set
  3963. +CONFIG_64BIT=y
  3964. +# CONFIG_PAGE_SIZE_4KB is not set
  3965. +# CONFIG_PAGE_SIZE_8KB is not set
  3966. +CONFIG_PAGE_SIZE_16KB=y
  3967. +# CONFIG_PAGE_SIZE_32KB is not set
  3968. +# CONFIG_PAGE_SIZE_64KB is not set
  3969. +CONFIG_BOARD_SCACHE=y
  3970. +CONFIG_MIPS_MT_DISABLED=y
  3971. +# CONFIG_MIPS_MT_SMP is not set
  3972. +# CONFIG_MIPS_MT_SMTC is not set
  3973. +CONFIG_CPU_HAS_WB=y
  3974. +CONFIG_CPU_HAS_SYNC=y
  3975. +CONFIG_GENERIC_HARDIRQS=y
  3976. +CONFIG_GENERIC_IRQ_PROBE=y
  3977. +CONFIG_CPU_SUPPORTS_HIGHMEM=y
  3978. +CONFIG_SYS_SUPPORTS_HIGHMEM=y
  3979. +CONFIG_ARCH_FLATMEM_ENABLE=y
  3980. +CONFIG_ARCH_POPULATES_NODE_MAP=y
  3981. +CONFIG_SELECT_MEMORY_MODEL=y
  3982. +# CONFIG_FLATMEM_MANUAL is not set
  3983. +# CONFIG_DISCONTIGMEM_MANUAL is not set
  3984. +CONFIG_SPARSEMEM_MANUAL=y
  3985. +CONFIG_SPARSEMEM=y
  3986. +CONFIG_HAVE_MEMORY_PRESENT=y
  3987. +CONFIG_SPARSEMEM_STATIC=y
  3988. +
  3989. +#
  3990. +# Memory hotplug is currently incompatible with Software Suspend
  3991. +#
  3992. +CONFIG_PAGEFLAGS_EXTENDED=y
  3993. +CONFIG_SPLIT_PTLOCK_CPUS=4
  3994. +CONFIG_PHYS_ADDR_T_64BIT=y
  3995. +CONFIG_ZONE_DMA_FLAG=0
  3996. +CONFIG_VIRT_TO_BUS=y
  3997. +CONFIG_UNEVICTABLE_LRU=y
  3998. +CONFIG_HAVE_MLOCK=y
  3999. +CONFIG_HAVE_MLOCKED_PAGE_BIT=y
  4000. +CONFIG_TICK_ONESHOT=y
  4001. +CONFIG_NO_HZ=y
  4002. +CONFIG_HIGH_RES_TIMERS=y
  4003. +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
  4004. +# CONFIG_HZ_48 is not set
  4005. +# CONFIG_HZ_100 is not set
  4006. +# CONFIG_HZ_128 is not set
  4007. +CONFIG_HZ_250=y
  4008. +# CONFIG_HZ_256 is not set
  4009. +# CONFIG_HZ_1000 is not set
  4010. +# CONFIG_HZ_1024 is not set
  4011. +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
  4012. +CONFIG_HZ=250
  4013. +# CONFIG_PREEMPT_NONE is not set
  4014. +CONFIG_PREEMPT_VOLUNTARY=y
  4015. +# CONFIG_PREEMPT is not set
  4016. +CONFIG_KEXEC=y
  4017. +# CONFIG_SECCOMP is not set
  4018. +CONFIG_LOCKDEP_SUPPORT=y
  4019. +CONFIG_STACKTRACE_SUPPORT=y
  4020. +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
  4021. +
  4022. +#
  4023. +# General setup
  4024. +#
  4025. +CONFIG_EXPERIMENTAL=y
  4026. +CONFIG_BROKEN_ON_SMP=y
  4027. +CONFIG_INIT_ENV_ARG_LIMIT=32
  4028. +CONFIG_LOCALVERSION=""
  4029. +# CONFIG_LOCALVERSION_AUTO is not set
  4030. +CONFIG_SWAP=y
  4031. +CONFIG_SYSVIPC=y
  4032. +CONFIG_SYSVIPC_SYSCTL=y
  4033. +CONFIG_POSIX_MQUEUE=y
  4034. +CONFIG_POSIX_MQUEUE_SYSCTL=y
  4035. +CONFIG_BSD_PROCESS_ACCT=y
  4036. +CONFIG_BSD_PROCESS_ACCT_V3=y
  4037. +# CONFIG_TASKSTATS is not set
  4038. +CONFIG_AUDIT=y
  4039. +
  4040. +#
  4041. +# RCU Subsystem
  4042. +#
  4043. +CONFIG_CLASSIC_RCU=y
  4044. +# CONFIG_TREE_RCU is not set
  4045. +# CONFIG_PREEMPT_RCU is not set
  4046. +# CONFIG_TREE_RCU_TRACE is not set
  4047. +# CONFIG_PREEMPT_RCU_TRACE is not set
  4048. +CONFIG_IKCONFIG=y
  4049. +CONFIG_IKCONFIG_PROC=y
  4050. +CONFIG_LOG_BUF_SHIFT=15
  4051. +# CONFIG_GROUP_SCHED is not set
  4052. +# CONFIG_CGROUPS is not set
  4053. +CONFIG_SYSFS_DEPRECATED=y
  4054. +CONFIG_SYSFS_DEPRECATED_V2=y
  4055. +# CONFIG_RELAY is not set
  4056. +# CONFIG_NAMESPACES is not set
  4057. +CONFIG_BLK_DEV_INITRD=y
  4058. +CONFIG_INITRAMFS_SOURCE=""
  4059. +CONFIG_RD_GZIP=y
  4060. +# CONFIG_RD_BZIP2 is not set
  4061. +# CONFIG_RD_LZMA is not set
  4062. +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
  4063. +CONFIG_SYSCTL=y
  4064. +CONFIG_ANON_INODES=y
  4065. +CONFIG_EMBEDDED=y
  4066. +CONFIG_SYSCTL_SYSCALL=y
  4067. +CONFIG_KALLSYMS=y
  4068. +# CONFIG_KALLSYMS_EXTRA_PASS is not set
  4069. +# CONFIG_STRIP_ASM_SYMS is not set
  4070. +CONFIG_HOTPLUG=y
  4071. +CONFIG_PRINTK=y
  4072. +CONFIG_BUG=y
  4073. +CONFIG_ELF_CORE=y
  4074. +CONFIG_PCSPKR_PLATFORM=y
  4075. +CONFIG_BASE_FULL=y
  4076. +CONFIG_FUTEX=y
  4077. +CONFIG_EPOLL=y
  4078. +CONFIG_SIGNALFD=y
  4079. +CONFIG_TIMERFD=y
  4080. +CONFIG_EVENTFD=y
  4081. +CONFIG_SHMEM=y
  4082. +CONFIG_AIO=y
  4083. +CONFIG_VM_EVENT_COUNTERS=y
  4084. +CONFIG_PCI_QUIRKS=y
  4085. +CONFIG_COMPAT_BRK=y
  4086. +CONFIG_SLAB=y
  4087. +# CONFIG_SLUB is not set
  4088. +# CONFIG_SLOB is not set
  4089. +CONFIG_PROFILING=y
  4090. +# CONFIG_MARKERS is not set
  4091. +# CONFIG_OPROFILE is not set
  4092. +CONFIG_HAVE_OPROFILE=y
  4093. +CONFIG_HAVE_SYSCALL_WRAPPERS=y
  4094. +# CONFIG_SLOW_WORK is not set
  4095. +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
  4096. +CONFIG_SLABINFO=y
  4097. +CONFIG_RT_MUTEXES=y
  4098. +CONFIG_BASE_SMALL=0
  4099. +CONFIG_MODULES=y
  4100. +# CONFIG_MODULE_FORCE_LOAD is not set
  4101. +CONFIG_MODULE_UNLOAD=y
  4102. +CONFIG_MODULE_FORCE_UNLOAD=y
  4103. +CONFIG_MODVERSIONS=y
  4104. +# CONFIG_MODULE_SRCVERSION_ALL is not set
  4105. +CONFIG_BLOCK=y
  4106. +# CONFIG_BLK_DEV_BSG is not set
  4107. +# CONFIG_BLK_DEV_INTEGRITY is not set
  4108. +CONFIG_BLOCK_COMPAT=y
  4109. +
  4110. +#
  4111. +# IO Schedulers
  4112. +#
  4113. +CONFIG_IOSCHED_NOOP=y
  4114. +CONFIG_IOSCHED_AS=y
  4115. +CONFIG_IOSCHED_DEADLINE=y
  4116. +CONFIG_IOSCHED_CFQ=y
  4117. +# CONFIG_DEFAULT_AS is not set
  4118. +# CONFIG_DEFAULT_DEADLINE is not set
  4119. +CONFIG_DEFAULT_CFQ=y
  4120. +# CONFIG_DEFAULT_NOOP is not set
  4121. +CONFIG_DEFAULT_IOSCHED="cfq"
  4122. +# CONFIG_PROBE_INITRD_HEADER is not set
  4123. +CONFIG_FREEZER=y
  4124. +
  4125. +#
  4126. +# Bus options (PCI, PCMCIA, EISA, ISA, TC)
  4127. +#
  4128. +CONFIG_HW_HAS_PCI=y
  4129. +CONFIG_PCI=y
  4130. +CONFIG_PCI_DOMAINS=y
  4131. +# CONFIG_ARCH_SUPPORTS_MSI is not set
  4132. +CONFIG_PCI_LEGACY=y
  4133. +# CONFIG_PCI_STUB is not set
  4134. +# CONFIG_PCI_IOV is not set
  4135. +CONFIG_ISA=y
  4136. +CONFIG_MMU=y
  4137. +CONFIG_PCCARD=m
  4138. +# CONFIG_PCMCIA_DEBUG is not set
  4139. +CONFIG_PCMCIA=m
  4140. +CONFIG_PCMCIA_LOAD_CIS=y
  4141. +CONFIG_PCMCIA_IOCTL=y
  4142. +CONFIG_CARDBUS=y
  4143. +
  4144. +#
  4145. +# PC-card bridges
  4146. +#
  4147. +CONFIG_YENTA=m
  4148. +CONFIG_YENTA_O2=y
  4149. +CONFIG_YENTA_RICOH=y
  4150. +CONFIG_YENTA_TI=y
  4151. +CONFIG_YENTA_ENE_TUNE=y
  4152. +CONFIG_YENTA_TOSHIBA=y
  4153. +CONFIG_PD6729=m
  4154. +CONFIG_I82092=m
  4155. +CONFIG_I82365=m
  4156. +CONFIG_TCIC=m
  4157. +CONFIG_PCMCIA_PROBE=y
  4158. +CONFIG_PCCARD_NONSTATIC=m
  4159. +CONFIG_HOTPLUG_PCI=m
  4160. +CONFIG_HOTPLUG_PCI_FAKE=m
  4161. +CONFIG_HOTPLUG_PCI_CPCI=y
  4162. +CONFIG_HOTPLUG_PCI_SHPC=m
  4163. +
  4164. +#
  4165. +# Executable file formats
  4166. +#
  4167. +CONFIG_BINFMT_ELF=y
  4168. +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
  4169. +# CONFIG_HAVE_AOUT is not set
  4170. +CONFIG_BINFMT_MISC=m
  4171. +CONFIG_MIPS32_COMPAT=y
  4172. +CONFIG_COMPAT=y
  4173. +CONFIG_SYSVIPC_COMPAT=y
  4174. +CONFIG_MIPS32_O32=y
  4175. +CONFIG_MIPS32_N32=y
  4176. +CONFIG_BINFMT_ELF32=y
  4177. +
  4178. +#
  4179. +# Power management options
  4180. +#
  4181. +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
  4182. +CONFIG_ARCH_SUSPEND_POSSIBLE=y
  4183. +CONFIG_PM=y
  4184. +# CONFIG_PM_DEBUG is not set
  4185. +CONFIG_PM_SLEEP=y
  4186. +CONFIG_SUSPEND=y
  4187. +CONFIG_SUSPEND_FREEZER=y
  4188. +CONFIG_HIBERNATION=y
  4189. +CONFIG_PM_STD_PARTITION="/dev/hda3"
  4190. +
  4191. +#
  4192. +# CPU Frequency scaling
  4193. +#
  4194. +CONFIG_CPU_FREQ=y
  4195. +CONFIG_CPU_FREQ_TABLE=y
  4196. +# CONFIG_CPU_FREQ_DEBUG is not set
  4197. +CONFIG_CPU_FREQ_STAT=y
  4198. +# CONFIG_CPU_FREQ_STAT_DETAILS is not set
  4199. +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
  4200. +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
  4201. +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
  4202. +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
  4203. +CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y
  4204. +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
  4205. +CONFIG_CPU_FREQ_GOV_POWERSAVE=y
  4206. +CONFIG_CPU_FREQ_GOV_USERSPACE=y
  4207. +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
  4208. +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
  4209. +CONFIG_LOONGSON2F_CPU_FREQ=y
  4210. +CONFIG_NET=y
  4211. +
  4212. +#
  4213. +# Networking options
  4214. +#
  4215. +CONFIG_PACKET=y
  4216. +CONFIG_PACKET_MMAP=y
  4217. +CONFIG_UNIX=y
  4218. +CONFIG_XFRM=y
  4219. +CONFIG_XFRM_USER=m
  4220. +# CONFIG_XFRM_SUB_POLICY is not set
  4221. +# CONFIG_XFRM_MIGRATE is not set
  4222. +# CONFIG_XFRM_STATISTICS is not set
  4223. +CONFIG_XFRM_IPCOMP=m
  4224. +CONFIG_NET_KEY=m
  4225. +# CONFIG_NET_KEY_MIGRATE is not set
  4226. +CONFIG_INET=y
  4227. +CONFIG_IP_MULTICAST=y
  4228. +CONFIG_IP_ADVANCED_ROUTER=y
  4229. +CONFIG_ASK_IP_FIB_HASH=y
  4230. +# CONFIG_IP_FIB_TRIE is not set
  4231. +CONFIG_IP_FIB_HASH=y
  4232. +CONFIG_IP_MULTIPLE_TABLES=y
  4233. +CONFIG_IP_ROUTE_MULTIPATH=y
  4234. +CONFIG_IP_ROUTE_VERBOSE=y
  4235. +# CONFIG_IP_PNP is not set
  4236. +CONFIG_NET_IPIP=m
  4237. +CONFIG_NET_IPGRE=m
  4238. +CONFIG_NET_IPGRE_BROADCAST=y
  4239. +CONFIG_IP_MROUTE=y
  4240. +CONFIG_IP_PIMSM_V1=y
  4241. +CONFIG_IP_PIMSM_V2=y
  4242. +# CONFIG_ARPD is not set
  4243. +CONFIG_SYN_COOKIES=y
  4244. +CONFIG_INET_AH=m
  4245. +CONFIG_INET_ESP=m
  4246. +CONFIG_INET_IPCOMP=m
  4247. +CONFIG_INET_XFRM_TUNNEL=m
  4248. +CONFIG_INET_TUNNEL=m
  4249. +CONFIG_INET_XFRM_MODE_TRANSPORT=m
  4250. +CONFIG_INET_XFRM_MODE_TUNNEL=m
  4251. +CONFIG_INET_XFRM_MODE_BEET=y
  4252. +CONFIG_INET_LRO=y
  4253. +CONFIG_INET_DIAG=m
  4254. +CONFIG_INET_TCP_DIAG=m
  4255. +CONFIG_TCP_CONG_ADVANCED=y
  4256. +CONFIG_TCP_CONG_BIC=y
  4257. +CONFIG_TCP_CONG_CUBIC=m
  4258. +CONFIG_TCP_CONG_WESTWOOD=m
  4259. +CONFIG_TCP_CONG_HTCP=m
  4260. +CONFIG_TCP_CONG_HSTCP=m
  4261. +CONFIG_TCP_CONG_HYBLA=m
  4262. +CONFIG_TCP_CONG_VEGAS=m
  4263. +CONFIG_TCP_CONG_SCALABLE=m
  4264. +CONFIG_TCP_CONG_LP=m
  4265. +CONFIG_TCP_CONG_VENO=m
  4266. +# CONFIG_TCP_CONG_YEAH is not set
  4267. +# CONFIG_TCP_CONG_ILLINOIS is not set
  4268. +CONFIG_DEFAULT_BIC=y
  4269. +# CONFIG_DEFAULT_CUBIC is not set
  4270. +# CONFIG_DEFAULT_HTCP is not set
  4271. +# CONFIG_DEFAULT_VEGAS is not set
  4272. +# CONFIG_DEFAULT_WESTWOOD is not set
  4273. +# CONFIG_DEFAULT_RENO is not set
  4274. +CONFIG_DEFAULT_TCP_CONG="bic"
  4275. +# CONFIG_TCP_MD5SIG is not set
  4276. +CONFIG_IPV6=m
  4277. +CONFIG_IPV6_PRIVACY=y
  4278. +# CONFIG_IPV6_ROUTER_PREF is not set
  4279. +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
  4280. +CONFIG_INET6_AH=m
  4281. +CONFIG_INET6_ESP=m
  4282. +CONFIG_INET6_IPCOMP=m
  4283. +# CONFIG_IPV6_MIP6 is not set
  4284. +CONFIG_INET6_XFRM_TUNNEL=m
  4285. +CONFIG_INET6_TUNNEL=m
  4286. +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
  4287. +CONFIG_INET6_XFRM_MODE_TUNNEL=m
  4288. +CONFIG_INET6_XFRM_MODE_BEET=m
  4289. +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
  4290. +CONFIG_IPV6_SIT=m
  4291. +CONFIG_IPV6_NDISC_NODETYPE=y
  4292. +CONFIG_IPV6_TUNNEL=m
  4293. +# CONFIG_IPV6_MULTIPLE_TABLES is not set
  4294. +# CONFIG_IPV6_MROUTE is not set
  4295. +# CONFIG_NETLABEL is not set
  4296. +CONFIG_NETWORK_SECMARK=y
  4297. +CONFIG_NETFILTER=y
  4298. +# CONFIG_NETFILTER_DEBUG is not set
  4299. +CONFIG_NETFILTER_ADVANCED=y
  4300. +CONFIG_BRIDGE_NETFILTER=y
  4301. +
  4302. +#
  4303. +# Core Netfilter Configuration
  4304. +#
  4305. +CONFIG_NETFILTER_NETLINK=m
  4306. +CONFIG_NETFILTER_NETLINK_QUEUE=m
  4307. +CONFIG_NETFILTER_NETLINK_LOG=m
  4308. +# CONFIG_NF_CONNTRACK is not set
  4309. +# CONFIG_NETFILTER_TPROXY is not set
  4310. +CONFIG_NETFILTER_XTABLES=m
  4311. +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
  4312. +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
  4313. +CONFIG_NETFILTER_XT_TARGET_HL=m
  4314. +CONFIG_NETFILTER_XT_TARGET_MARK=m
  4315. +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
  4316. +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
  4317. +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
  4318. +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
  4319. +CONFIG_NETFILTER_XT_TARGET_SECMARK=m
  4320. +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
  4321. +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
  4322. +CONFIG_NETFILTER_XT_MATCH_COMMENT=m
  4323. +CONFIG_NETFILTER_XT_MATCH_DCCP=m
  4324. +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
  4325. +CONFIG_NETFILTER_XT_MATCH_ESP=m
  4326. +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
  4327. +CONFIG_NETFILTER_XT_MATCH_HL=m
  4328. +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
  4329. +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
  4330. +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
  4331. +CONFIG_NETFILTER_XT_MATCH_MAC=m
  4332. +CONFIG_NETFILTER_XT_MATCH_MARK=m
  4333. +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
  4334. +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
  4335. +CONFIG_NETFILTER_XT_MATCH_POLICY=m
  4336. +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
  4337. +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
  4338. +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
  4339. +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
  4340. +CONFIG_NETFILTER_XT_MATCH_REALM=m
  4341. +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
  4342. +CONFIG_NETFILTER_XT_MATCH_SCTP=m
  4343. +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
  4344. +CONFIG_NETFILTER_XT_MATCH_STRING=m
  4345. +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
  4346. +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
  4347. +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
  4348. +CONFIG_IP_VS=m
  4349. +# CONFIG_IP_VS_IPV6 is not set
  4350. +# CONFIG_IP_VS_DEBUG is not set
  4351. +CONFIG_IP_VS_TAB_BITS=12
  4352. +
  4353. +#
  4354. +# IPVS transport protocol load balancing support
  4355. +#
  4356. +CONFIG_IP_VS_PROTO_TCP=y
  4357. +CONFIG_IP_VS_PROTO_UDP=y
  4358. +CONFIG_IP_VS_PROTO_AH_ESP=y
  4359. +CONFIG_IP_VS_PROTO_ESP=y
  4360. +CONFIG_IP_VS_PROTO_AH=y
  4361. +
  4362. +#
  4363. +# IPVS scheduler
  4364. +#
  4365. +CONFIG_IP_VS_RR=m
  4366. +CONFIG_IP_VS_WRR=m
  4367. +CONFIG_IP_VS_LC=m
  4368. +CONFIG_IP_VS_WLC=m
  4369. +CONFIG_IP_VS_LBLC=m
  4370. +CONFIG_IP_VS_LBLCR=m
  4371. +CONFIG_IP_VS_DH=m
  4372. +CONFIG_IP_VS_SH=m
  4373. +CONFIG_IP_VS_SED=m
  4374. +CONFIG_IP_VS_NQ=m
  4375. +
  4376. +#
  4377. +# IPVS application helper
  4378. +#
  4379. +CONFIG_IP_VS_FTP=m
  4380. +
  4381. +#
  4382. +# IP: Netfilter Configuration
  4383. +#
  4384. +# CONFIG_NF_DEFRAG_IPV4 is not set
  4385. +CONFIG_IP_NF_QUEUE=m
  4386. +CONFIG_IP_NF_IPTABLES=m
  4387. +CONFIG_IP_NF_MATCH_ADDRTYPE=m
  4388. +CONFIG_IP_NF_MATCH_AH=m
  4389. +CONFIG_IP_NF_MATCH_ECN=m
  4390. +CONFIG_IP_NF_MATCH_TTL=m
  4391. +CONFIG_IP_NF_FILTER=m
  4392. +CONFIG_IP_NF_TARGET_REJECT=m
  4393. +CONFIG_IP_NF_TARGET_LOG=m
  4394. +CONFIG_IP_NF_TARGET_ULOG=m
  4395. +CONFIG_IP_NF_MANGLE=m
  4396. +CONFIG_IP_NF_TARGET_ECN=m
  4397. +CONFIG_IP_NF_TARGET_TTL=m
  4398. +CONFIG_IP_NF_RAW=m
  4399. +# CONFIG_IP_NF_SECURITY is not set
  4400. +CONFIG_IP_NF_ARPTABLES=m
  4401. +CONFIG_IP_NF_ARPFILTER=m
  4402. +CONFIG_IP_NF_ARP_MANGLE=m
  4403. +
  4404. +#
  4405. +# IPv6: Netfilter Configuration
  4406. +#
  4407. +CONFIG_IP6_NF_QUEUE=m
  4408. +CONFIG_IP6_NF_IPTABLES=m
  4409. +CONFIG_IP6_NF_MATCH_AH=m
  4410. +CONFIG_IP6_NF_MATCH_EUI64=m
  4411. +CONFIG_IP6_NF_MATCH_FRAG=m
  4412. +CONFIG_IP6_NF_MATCH_OPTS=m
  4413. +CONFIG_IP6_NF_MATCH_HL=m
  4414. +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
  4415. +# CONFIG_IP6_NF_MATCH_MH is not set
  4416. +CONFIG_IP6_NF_MATCH_RT=m
  4417. +CONFIG_IP6_NF_TARGET_HL=m
  4418. +CONFIG_IP6_NF_TARGET_LOG=m
  4419. +CONFIG_IP6_NF_FILTER=m
  4420. +CONFIG_IP6_NF_TARGET_REJECT=m
  4421. +CONFIG_IP6_NF_MANGLE=m
  4422. +CONFIG_IP6_NF_RAW=m
  4423. +# CONFIG_IP6_NF_SECURITY is not set
  4424. +
  4425. +#
  4426. +# DECnet: Netfilter Configuration
  4427. +#
  4428. +CONFIG_DECNET_NF_GRABULATOR=m
  4429. +CONFIG_BRIDGE_NF_EBTABLES=m
  4430. +CONFIG_BRIDGE_EBT_BROUTE=m
  4431. +CONFIG_BRIDGE_EBT_T_FILTER=m
  4432. +CONFIG_BRIDGE_EBT_T_NAT=m
  4433. +CONFIG_BRIDGE_EBT_802_3=m
  4434. +CONFIG_BRIDGE_EBT_AMONG=m
  4435. +CONFIG_BRIDGE_EBT_ARP=m
  4436. +CONFIG_BRIDGE_EBT_IP=m
  4437. +# CONFIG_BRIDGE_EBT_IP6 is not set
  4438. +CONFIG_BRIDGE_EBT_LIMIT=m
  4439. +CONFIG_BRIDGE_EBT_MARK=m
  4440. +CONFIG_BRIDGE_EBT_PKTTYPE=m
  4441. +CONFIG_BRIDGE_EBT_STP=m
  4442. +CONFIG_BRIDGE_EBT_VLAN=m
  4443. +CONFIG_BRIDGE_EBT_ARPREPLY=m
  4444. +CONFIG_BRIDGE_EBT_DNAT=m
  4445. +CONFIG_BRIDGE_EBT_MARK_T=m
  4446. +CONFIG_BRIDGE_EBT_REDIRECT=m
  4447. +CONFIG_BRIDGE_EBT_SNAT=m
  4448. +CONFIG_BRIDGE_EBT_LOG=m
  4449. +CONFIG_BRIDGE_EBT_ULOG=m
  4450. +# CONFIG_BRIDGE_EBT_NFLOG is not set
  4451. +CONFIG_IP_DCCP=m
  4452. +CONFIG_INET_DCCP_DIAG=m
  4453. +
  4454. +#
  4455. +# DCCP CCIDs Configuration (EXPERIMENTAL)
  4456. +#
  4457. +# CONFIG_IP_DCCP_CCID2_DEBUG is not set
  4458. +CONFIG_IP_DCCP_CCID3=y
  4459. +# CONFIG_IP_DCCP_CCID3_DEBUG is not set
  4460. +CONFIG_IP_DCCP_CCID3_RTO=100
  4461. +CONFIG_IP_DCCP_TFRC_LIB=y
  4462. +CONFIG_IP_SCTP=m
  4463. +# CONFIG_SCTP_DBG_MSG is not set
  4464. +# CONFIG_SCTP_DBG_OBJCNT is not set
  4465. +# CONFIG_SCTP_HMAC_NONE is not set
  4466. +# CONFIG_SCTP_HMAC_SHA1 is not set
  4467. +CONFIG_SCTP_HMAC_MD5=y
  4468. +CONFIG_TIPC=m
  4469. +CONFIG_TIPC_ADVANCED=y
  4470. +CONFIG_TIPC_ZONES=3
  4471. +CONFIG_TIPC_CLUSTERS=1
  4472. +CONFIG_TIPC_NODES=255
  4473. +CONFIG_TIPC_SLAVE_NODES=0
  4474. +CONFIG_TIPC_PORTS=8191
  4475. +CONFIG_TIPC_LOG=0
  4476. +# CONFIG_TIPC_DEBUG is not set
  4477. +CONFIG_ATM=y
  4478. +CONFIG_ATM_CLIP=y
  4479. +# CONFIG_ATM_CLIP_NO_ICMP is not set
  4480. +CONFIG_ATM_LANE=m
  4481. +CONFIG_ATM_MPOA=m
  4482. +CONFIG_ATM_BR2684=m
  4483. +# CONFIG_ATM_BR2684_IPFILTER is not set
  4484. +CONFIG_STP=m
  4485. +CONFIG_BRIDGE=m
  4486. +# CONFIG_NET_DSA is not set
  4487. +CONFIG_VLAN_8021Q=m
  4488. +# CONFIG_VLAN_8021Q_GVRP is not set
  4489. +CONFIG_DECNET=m
  4490. +# CONFIG_DECNET_ROUTER is not set
  4491. +CONFIG_LLC=m
  4492. +CONFIG_LLC2=m
  4493. +CONFIG_IPX=m
  4494. +# CONFIG_IPX_INTERN is not set
  4495. +CONFIG_ATALK=m
  4496. +CONFIG_DEV_APPLETALK=m
  4497. +# CONFIG_COPS is not set
  4498. +CONFIG_IPDDP=m
  4499. +CONFIG_IPDDP_ENCAP=y
  4500. +CONFIG_IPDDP_DECAP=y
  4501. +CONFIG_X25=m
  4502. +CONFIG_LAPB=m
  4503. +CONFIG_ECONET=m
  4504. +CONFIG_ECONET_AUNUDP=y
  4505. +CONFIG_ECONET_NATIVE=y
  4506. +CONFIG_WAN_ROUTER=m
  4507. +# CONFIG_PHONET is not set
  4508. +CONFIG_NET_SCHED=y
  4509. +
  4510. +#
  4511. +# Queueing/Scheduling
  4512. +#
  4513. +CONFIG_NET_SCH_CBQ=m
  4514. +CONFIG_NET_SCH_HTB=m
  4515. +CONFIG_NET_SCH_HFSC=m
  4516. +CONFIG_NET_SCH_ATM=m
  4517. +CONFIG_NET_SCH_PRIO=m
  4518. +# CONFIG_NET_SCH_MULTIQ is not set
  4519. +CONFIG_NET_SCH_RED=m
  4520. +CONFIG_NET_SCH_SFQ=m
  4521. +CONFIG_NET_SCH_TEQL=m
  4522. +CONFIG_NET_SCH_TBF=m
  4523. +CONFIG_NET_SCH_GRED=m
  4524. +CONFIG_NET_SCH_DSMARK=m
  4525. +CONFIG_NET_SCH_NETEM=m
  4526. +# CONFIG_NET_SCH_DRR is not set
  4527. +CONFIG_NET_SCH_INGRESS=m
  4528. +
  4529. +#
  4530. +# Classification
  4531. +#
  4532. +CONFIG_NET_CLS=y
  4533. +CONFIG_NET_CLS_BASIC=m
  4534. +CONFIG_NET_CLS_TCINDEX=m
  4535. +CONFIG_NET_CLS_ROUTE4=m
  4536. +CONFIG_NET_CLS_ROUTE=y
  4537. +CONFIG_NET_CLS_FW=m
  4538. +CONFIG_NET_CLS_U32=m
  4539. +CONFIG_CLS_U32_PERF=y
  4540. +CONFIG_CLS_U32_MARK=y
  4541. +CONFIG_NET_CLS_RSVP=m
  4542. +CONFIG_NET_CLS_RSVP6=m
  4543. +# CONFIG_NET_CLS_FLOW is not set
  4544. +CONFIG_NET_EMATCH=y
  4545. +CONFIG_NET_EMATCH_STACK=32
  4546. +CONFIG_NET_EMATCH_CMP=m
  4547. +CONFIG_NET_EMATCH_NBYTE=m
  4548. +CONFIG_NET_EMATCH_U32=m
  4549. +CONFIG_NET_EMATCH_META=m
  4550. +CONFIG_NET_EMATCH_TEXT=m
  4551. +CONFIG_NET_CLS_ACT=y
  4552. +CONFIG_NET_ACT_POLICE=m
  4553. +CONFIG_NET_ACT_GACT=m
  4554. +CONFIG_GACT_PROB=y
  4555. +CONFIG_NET_ACT_MIRRED=m
  4556. +CONFIG_NET_ACT_IPT=m
  4557. +# CONFIG_NET_ACT_NAT is not set
  4558. +CONFIG_NET_ACT_PEDIT=m
  4559. +CONFIG_NET_ACT_SIMP=m
  4560. +# CONFIG_NET_ACT_SKBEDIT is not set
  4561. +CONFIG_NET_CLS_IND=y
  4562. +CONFIG_NET_SCH_FIFO=y
  4563. +# CONFIG_DCB is not set
  4564. +
  4565. +#
  4566. +# Network testing
  4567. +#
  4568. +CONFIG_NET_PKTGEN=m
  4569. +CONFIG_HAMRADIO=y
  4570. +
  4571. +#
  4572. +# Packet Radio protocols
  4573. +#
  4574. +CONFIG_AX25=m
  4575. +# CONFIG_AX25_DAMA_SLAVE is not set
  4576. +CONFIG_NETROM=m
  4577. +CONFIG_ROSE=m
  4578. +
  4579. +#
  4580. +# AX.25 network device drivers
  4581. +#
  4582. +CONFIG_MKISS=m
  4583. +CONFIG_6PACK=m
  4584. +CONFIG_BPQETHER=m
  4585. +CONFIG_BAYCOM_SER_FDX=m
  4586. +CONFIG_BAYCOM_SER_HDX=m
  4587. +CONFIG_YAM=m
  4588. +# CONFIG_CAN is not set
  4589. +# CONFIG_IRDA is not set
  4590. +# CONFIG_BT is not set
  4591. +CONFIG_AF_RXRPC=y
  4592. +# CONFIG_AF_RXRPC_DEBUG is not set
  4593. +# CONFIG_RXKAD is not set
  4594. +CONFIG_FIB_RULES=y
  4595. +# CONFIG_WIRELESS is not set
  4596. +# CONFIG_WIMAX is not set
  4597. +# CONFIG_RFKILL is not set
  4598. +# CONFIG_NET_9P is not set
  4599. +
  4600. +#
  4601. +# Device Drivers
  4602. +#
  4603. +
  4604. +#
  4605. +# Generic Driver Options
  4606. +#
  4607. +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  4608. +CONFIG_STANDALONE=y
  4609. +CONFIG_PREVENT_FIRMWARE_BUILD=y
  4610. +CONFIG_FW_LOADER=m
  4611. +CONFIG_FIRMWARE_IN_KERNEL=y
  4612. +CONFIG_EXTRA_FIRMWARE=""
  4613. +# CONFIG_SYS_HYPERVISOR is not set
  4614. +CONFIG_CONNECTOR=m
  4615. +# CONFIG_MTD is not set
  4616. +# CONFIG_PARPORT is not set
  4617. +CONFIG_PNP=y
  4618. +CONFIG_PNP_DEBUG_MESSAGES=y
  4619. +
  4620. +#
  4621. +# Protocols
  4622. +#
  4623. +CONFIG_ISAPNP=y
  4624. +# CONFIG_PNPACPI is not set
  4625. +CONFIG_BLK_DEV=y
  4626. +# CONFIG_BLK_CPQ_DA is not set
  4627. +# CONFIG_BLK_CPQ_CISS_DA is not set
  4628. +# CONFIG_BLK_DEV_DAC960 is not set
  4629. +# CONFIG_BLK_DEV_UMEM is not set
  4630. +# CONFIG_BLK_DEV_COW_COMMON is not set
  4631. +CONFIG_BLK_DEV_LOOP=y
  4632. +CONFIG_BLK_DEV_CRYPTOLOOP=y
  4633. +CONFIG_BLK_DEV_NBD=m
  4634. +# CONFIG_BLK_DEV_SX8 is not set
  4635. +# CONFIG_BLK_DEV_UB is not set
  4636. +CONFIG_BLK_DEV_RAM=y
  4637. +CONFIG_BLK_DEV_RAM_COUNT=16
  4638. +CONFIG_BLK_DEV_RAM_SIZE=8192
  4639. +# CONFIG_BLK_DEV_XIP is not set
  4640. +CONFIG_CDROM_PKTCDVD=m
  4641. +CONFIG_CDROM_PKTCDVD_BUFFERS=8
  4642. +# CONFIG_CDROM_PKTCDVD_WCACHE is not set
  4643. +CONFIG_ATA_OVER_ETH=m
  4644. +# CONFIG_BLK_DEV_HD is not set
  4645. +CONFIG_MISC_DEVICES=y
  4646. +# CONFIG_PHANTOM is not set
  4647. +# CONFIG_SGI_IOC4 is not set
  4648. +# CONFIG_TIFM_CORE is not set
  4649. +# CONFIG_ICS932S401 is not set
  4650. +# CONFIG_ENCLOSURE_SERVICES is not set
  4651. +# CONFIG_HP_ILO is not set
  4652. +# CONFIG_ISL29003 is not set
  4653. +# CONFIG_C2PORT is not set
  4654. +
  4655. +#
  4656. +# EEPROM support
  4657. +#
  4658. +# CONFIG_EEPROM_AT24 is not set
  4659. +# CONFIG_EEPROM_LEGACY is not set
  4660. +# CONFIG_EEPROM_93CX6 is not set
  4661. +CONFIG_HAVE_IDE=y
  4662. +CONFIG_IDE=y
  4663. +
  4664. +#
  4665. +# Please see Documentation/ide/ide.txt for help/info on IDE drives
  4666. +#
  4667. +CONFIG_IDE_XFER_MODE=y
  4668. +CONFIG_IDE_TIMINGS=y
  4669. +CONFIG_IDE_ATAPI=y
  4670. +# CONFIG_BLK_DEV_IDE_SATA is not set
  4671. +CONFIG_IDE_GD=y
  4672. +CONFIG_IDE_GD_ATA=y
  4673. +# CONFIG_IDE_GD_ATAPI is not set
  4674. +# CONFIG_BLK_DEV_IDECS is not set
  4675. +# CONFIG_BLK_DEV_DELKIN is not set
  4676. +CONFIG_BLK_DEV_IDECD=m
  4677. +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
  4678. +# CONFIG_BLK_DEV_IDETAPE is not set
  4679. +CONFIG_IDE_TASK_IOCTL=y
  4680. +CONFIG_IDE_PROC_FS=y
  4681. +
  4682. +#
  4683. +# IDE chipset support/bugfixes
  4684. +#
  4685. +# CONFIG_IDE_GENERIC is not set
  4686. +# CONFIG_BLK_DEV_PLATFORM is not set
  4687. +# CONFIG_BLK_DEV_IDEPNP is not set
  4688. +CONFIG_BLK_DEV_IDEDMA_SFF=y
  4689. +
  4690. +#
  4691. +# PCI IDE chipsets support
  4692. +#
  4693. +CONFIG_BLK_DEV_IDEPCI=y
  4694. +# CONFIG_IDEPCI_PCIBUS_ORDER is not set
  4695. +# CONFIG_BLK_DEV_OFFBOARD is not set
  4696. +CONFIG_BLK_DEV_GENERIC=y
  4697. +# CONFIG_BLK_DEV_OPTI621 is not set
  4698. +CONFIG_BLK_DEV_IDEDMA_PCI=y
  4699. +# CONFIG_BLK_DEV_AEC62XX is not set
  4700. +# CONFIG_BLK_DEV_ALI15X3 is not set
  4701. +CONFIG_BLK_DEV_AMD74XX=y
  4702. +# CONFIG_BLK_DEV_CMD64X is not set
  4703. +# CONFIG_BLK_DEV_TRIFLEX is not set
  4704. +# CONFIG_BLK_DEV_CS5520 is not set
  4705. +# CONFIG_BLK_DEV_CS5530 is not set
  4706. +# CONFIG_BLK_DEV_HPT366 is not set
  4707. +# CONFIG_BLK_DEV_JMICRON is not set
  4708. +# CONFIG_BLK_DEV_SC1200 is not set
  4709. +# CONFIG_BLK_DEV_PIIX is not set
  4710. +# CONFIG_BLK_DEV_IT8172 is not set
  4711. +# CONFIG_BLK_DEV_IT8213 is not set
  4712. +# CONFIG_BLK_DEV_IT821X is not set
  4713. +# CONFIG_BLK_DEV_NS87415 is not set
  4714. +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
  4715. +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
  4716. +# CONFIG_BLK_DEV_SVWKS is not set
  4717. +# CONFIG_BLK_DEV_SIIMAGE is not set
  4718. +# CONFIG_BLK_DEV_SLC90E66 is not set
  4719. +# CONFIG_BLK_DEV_TRM290 is not set
  4720. +# CONFIG_BLK_DEV_VIA82CXXX is not set
  4721. +# CONFIG_BLK_DEV_TC86C001 is not set
  4722. +
  4723. +#
  4724. +# Other IDE chipsets support
  4725. +#
  4726. +
  4727. +#
  4728. +# Note: most of these also require special kernel boot parameters
  4729. +#
  4730. +# CONFIG_BLK_DEV_4DRIVES is not set
  4731. +# CONFIG_BLK_DEV_ALI14XX is not set
  4732. +# CONFIG_BLK_DEV_DTC2278 is not set
  4733. +# CONFIG_BLK_DEV_HT6560B is not set
  4734. +# CONFIG_BLK_DEV_QD65XX is not set
  4735. +# CONFIG_BLK_DEV_UMC8672 is not set
  4736. +CONFIG_BLK_DEV_IDEDMA=y
  4737. +
  4738. +#
  4739. +# SCSI device support
  4740. +#
  4741. +# CONFIG_RAID_ATTRS is not set
  4742. +CONFIG_SCSI=y
  4743. +CONFIG_SCSI_DMA=y
  4744. +# CONFIG_SCSI_TGT is not set
  4745. +CONFIG_SCSI_NETLINK=y
  4746. +CONFIG_SCSI_PROC_FS=y
  4747. +
  4748. +#
  4749. +# SCSI support type (disk, tape, CD-ROM)
  4750. +#
  4751. +CONFIG_BLK_DEV_SD=y
  4752. +# CONFIG_CHR_DEV_ST is not set
  4753. +# CONFIG_CHR_DEV_OSST is not set
  4754. +CONFIG_BLK_DEV_SR=m
  4755. +CONFIG_BLK_DEV_SR_VENDOR=y
  4756. +CONFIG_CHR_DEV_SG=m
  4757. +CONFIG_CHR_DEV_SCH=m
  4758. +
  4759. +#
  4760. +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
  4761. +#
  4762. +CONFIG_SCSI_MULTI_LUN=y
  4763. +CONFIG_SCSI_CONSTANTS=y
  4764. +CONFIG_SCSI_LOGGING=y
  4765. +# CONFIG_SCSI_SCAN_ASYNC is not set
  4766. +CONFIG_SCSI_WAIT_SCAN=m
  4767. +
  4768. +#
  4769. +# SCSI Transports
  4770. +#
  4771. +CONFIG_SCSI_SPI_ATTRS=m
  4772. +CONFIG_SCSI_FC_ATTRS=m
  4773. +CONFIG_SCSI_ISCSI_ATTRS=m
  4774. +CONFIG_SCSI_SAS_ATTRS=m
  4775. +# CONFIG_SCSI_SAS_LIBSAS is not set
  4776. +CONFIG_SCSI_SRP_ATTRS=m
  4777. +CONFIG_SCSI_LOWLEVEL=y
  4778. +CONFIG_ISCSI_TCP=m
  4779. +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
  4780. +# CONFIG_SCSI_3W_9XXX is not set
  4781. +# CONFIG_SCSI_ACARD is not set
  4782. +# CONFIG_SCSI_AACRAID is not set
  4783. +# CONFIG_SCSI_AIC7XXX is not set
  4784. +# CONFIG_SCSI_AIC7XXX_OLD is not set
  4785. +# CONFIG_SCSI_AIC79XX is not set
  4786. +# CONFIG_SCSI_AIC94XX is not set
  4787. +# CONFIG_SCSI_DPT_I2O is not set
  4788. +# CONFIG_SCSI_ADVANSYS is not set
  4789. +# CONFIG_SCSI_IN2000 is not set
  4790. +# CONFIG_SCSI_ARCMSR is not set
  4791. +# CONFIG_MEGARAID_NEWGEN is not set
  4792. +# CONFIG_MEGARAID_LEGACY is not set
  4793. +# CONFIG_MEGARAID_SAS is not set
  4794. +# CONFIG_SCSI_MPT2SAS is not set
  4795. +# CONFIG_SCSI_HPTIOP is not set
  4796. +# CONFIG_LIBFC is not set
  4797. +# CONFIG_LIBFCOE is not set
  4798. +# CONFIG_FCOE is not set
  4799. +# CONFIG_SCSI_DMX3191D is not set
  4800. +# CONFIG_SCSI_DTC3280 is not set
  4801. +# CONFIG_SCSI_FUTURE_DOMAIN is not set
  4802. +# CONFIG_SCSI_GENERIC_NCR5380 is not set
  4803. +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
  4804. +# CONFIG_SCSI_IPS is not set
  4805. +# CONFIG_SCSI_INITIO is not set
  4806. +# CONFIG_SCSI_INIA100 is not set
  4807. +# CONFIG_SCSI_MVSAS is not set
  4808. +# CONFIG_SCSI_NCR53C406A is not set
  4809. +# CONFIG_SCSI_STEX is not set
  4810. +# CONFIG_SCSI_SYM53C8XX_2 is not set
  4811. +# CONFIG_SCSI_PAS16 is not set
  4812. +# CONFIG_SCSI_QLOGIC_FAS is not set
  4813. +# CONFIG_SCSI_QLOGIC_1280 is not set
  4814. +# CONFIG_SCSI_QLA_FC is not set
  4815. +# CONFIG_SCSI_QLA_ISCSI is not set
  4816. +# CONFIG_SCSI_LPFC is not set
  4817. +# CONFIG_SCSI_SYM53C416 is not set
  4818. +# CONFIG_SCSI_DC395x is not set
  4819. +# CONFIG_SCSI_DC390T is not set
  4820. +# CONFIG_SCSI_T128 is not set
  4821. +# CONFIG_SCSI_DEBUG is not set
  4822. +# CONFIG_SCSI_SRP is not set
  4823. +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
  4824. +# CONFIG_SCSI_DH is not set
  4825. +# CONFIG_SCSI_OSD_INITIATOR is not set
  4826. +# CONFIG_ATA is not set
  4827. +CONFIG_MD=y
  4828. +CONFIG_BLK_DEV_MD=m
  4829. +CONFIG_MD_LINEAR=m
  4830. +CONFIG_MD_RAID0=m
  4831. +CONFIG_MD_RAID1=m
  4832. +CONFIG_MD_RAID10=m
  4833. +CONFIG_MD_RAID456=m
  4834. +CONFIG_MD_RAID6_PQ=m
  4835. +CONFIG_MD_MULTIPATH=m
  4836. +CONFIG_MD_FAULTY=m
  4837. +CONFIG_BLK_DEV_DM=m
  4838. +# CONFIG_DM_DEBUG is not set
  4839. +CONFIG_DM_CRYPT=m
  4840. +CONFIG_DM_SNAPSHOT=m
  4841. +CONFIG_DM_MIRROR=m
  4842. +CONFIG_DM_ZERO=m
  4843. +CONFIG_DM_MULTIPATH=m
  4844. +# CONFIG_DM_DELAY is not set
  4845. +# CONFIG_DM_UEVENT is not set
  4846. +CONFIG_FUSION=y
  4847. +CONFIG_FUSION_SPI=m
  4848. +CONFIG_FUSION_FC=m
  4849. +CONFIG_FUSION_SAS=m
  4850. +CONFIG_FUSION_MAX_SGE=40
  4851. +CONFIG_FUSION_CTL=m
  4852. +# CONFIG_FUSION_LOGGING is not set
  4853. +
  4854. +#
  4855. +# IEEE 1394 (FireWire) support
  4856. +#
  4857. +
  4858. +#
  4859. +# Enable only one of the two stacks, unless you know what you are doing
  4860. +#
  4861. +# CONFIG_FIREWIRE is not set
  4862. +# CONFIG_IEEE1394 is not set
  4863. +# CONFIG_I2O is not set
  4864. +CONFIG_NETDEVICES=y
  4865. +CONFIG_COMPAT_NET_DEV_OPS=y
  4866. +# CONFIG_IFB is not set
  4867. +# CONFIG_DUMMY is not set
  4868. +# CONFIG_BONDING is not set
  4869. +# CONFIG_MACVLAN is not set
  4870. +# CONFIG_EQUALIZER is not set
  4871. +CONFIG_TUN=m
  4872. +CONFIG_VETH=m
  4873. +CONFIG_NET_SB1000=m
  4874. +# CONFIG_ARCNET is not set
  4875. +CONFIG_PHYLIB=y
  4876. +
  4877. +#
  4878. +# MII PHY device drivers
  4879. +#
  4880. +CONFIG_MARVELL_PHY=m
  4881. +CONFIG_DAVICOM_PHY=m
  4882. +CONFIG_QSEMI_PHY=m
  4883. +CONFIG_LXT_PHY=m
  4884. +CONFIG_CICADA_PHY=m
  4885. +CONFIG_VITESSE_PHY=m
  4886. +CONFIG_SMSC_PHY=m
  4887. +# CONFIG_BROADCOM_PHY is not set
  4888. +# CONFIG_ICPLUS_PHY is not set
  4889. +CONFIG_REALTEK_PHY=m
  4890. +# CONFIG_NATIONAL_PHY is not set
  4891. +# CONFIG_STE10XP is not set
  4892. +# CONFIG_LSI_ET1011C_PHY is not set
  4893. +# CONFIG_FIXED_PHY is not set
  4894. +# CONFIG_MDIO_BITBANG is not set
  4895. +CONFIG_NET_ETHERNET=y
  4896. +CONFIG_MII=y
  4897. +# CONFIG_AX88796 is not set
  4898. +# CONFIG_HAPPYMEAL is not set
  4899. +# CONFIG_SUNGEM is not set
  4900. +# CONFIG_CASSINI is not set
  4901. +# CONFIG_NET_VENDOR_3COM is not set
  4902. +# CONFIG_NET_VENDOR_SMC is not set
  4903. +# CONFIG_SMC91X is not set
  4904. +# CONFIG_DM9000 is not set
  4905. +# CONFIG_ETHOC is not set
  4906. +# CONFIG_NET_VENDOR_RACAL is not set
  4907. +# CONFIG_DNET is not set
  4908. +# CONFIG_NET_TULIP is not set
  4909. +# CONFIG_AT1700 is not set
  4910. +# CONFIG_DEPCA is not set
  4911. +# CONFIG_HP100 is not set
  4912. +# CONFIG_NET_ISA is not set
  4913. +# CONFIG_IBM_NEW_EMAC_ZMII is not set
  4914. +# CONFIG_IBM_NEW_EMAC_RGMII is not set
  4915. +# CONFIG_IBM_NEW_EMAC_TAH is not set
  4916. +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
  4917. +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
  4918. +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
  4919. +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
  4920. +# CONFIG_NET_PCI is not set
  4921. +# CONFIG_B44 is not set
  4922. +# CONFIG_CS89x0 is not set
  4923. +# CONFIG_ATL2 is not set
  4924. +CONFIG_NETDEV_1000=y
  4925. +# CONFIG_ACENIC is not set
  4926. +# CONFIG_DL2K is not set
  4927. +# CONFIG_E1000 is not set
  4928. +# CONFIG_E1000E is not set
  4929. +# CONFIG_IP1000 is not set
  4930. +# CONFIG_IGB is not set
  4931. +# CONFIG_IGBVF is not set
  4932. +# CONFIG_NS83820 is not set
  4933. +# CONFIG_HAMACHI is not set
  4934. +# CONFIG_YELLOWFIN is not set
  4935. +CONFIG_R8169=y
  4936. +CONFIG_R8169_VLAN=y
  4937. +# CONFIG_SIS190 is not set
  4938. +# CONFIG_SKGE is not set
  4939. +# CONFIG_SKY2 is not set
  4940. +# CONFIG_VIA_VELOCITY is not set
  4941. +# CONFIG_TIGON3 is not set
  4942. +# CONFIG_BNX2 is not set
  4943. +# CONFIG_QLA3XXX is not set
  4944. +# CONFIG_ATL1 is not set
  4945. +# CONFIG_ATL1E is not set
  4946. +# CONFIG_ATL1C is not set
  4947. +# CONFIG_JME is not set
  4948. +# CONFIG_NETDEV_10000 is not set
  4949. +# CONFIG_TR is not set
  4950. +
  4951. +#
  4952. +# Wireless LAN
  4953. +#
  4954. +# CONFIG_WLAN_PRE80211 is not set
  4955. +# CONFIG_WLAN_80211 is not set
  4956. +
  4957. +#
  4958. +# Enable WiMAX (Networking options) to see the WiMAX drivers
  4959. +#
  4960. +
  4961. +#
  4962. +# USB Network Adapters
  4963. +#
  4964. +# CONFIG_USB_CATC is not set
  4965. +# CONFIG_USB_KAWETH is not set
  4966. +# CONFIG_USB_PEGASUS is not set
  4967. +# CONFIG_USB_RTL8150 is not set
  4968. +# CONFIG_USB_USBNET is not set
  4969. +# CONFIG_NET_PCMCIA is not set
  4970. +# CONFIG_WAN is not set
  4971. +# CONFIG_ATM_DRIVERS is not set
  4972. +# CONFIG_FDDI is not set
  4973. +# CONFIG_HIPPI is not set
  4974. +CONFIG_PPP=m
  4975. +CONFIG_PPP_MULTILINK=y
  4976. +CONFIG_PPP_FILTER=y
  4977. +CONFIG_PPP_ASYNC=m
  4978. +CONFIG_PPP_SYNC_TTY=m
  4979. +CONFIG_PPP_DEFLATE=m
  4980. +CONFIG_PPP_BSDCOMP=m
  4981. +CONFIG_PPP_MPPE=m
  4982. +CONFIG_PPPOE=m
  4983. +CONFIG_PPPOATM=m
  4984. +# CONFIG_PPPOL2TP is not set
  4985. +# CONFIG_SLIP is not set
  4986. +CONFIG_SLHC=m
  4987. +# CONFIG_NET_FC is not set
  4988. +# CONFIG_NETCONSOLE is not set
  4989. +# CONFIG_NETPOLL is not set
  4990. +# CONFIG_NET_POLL_CONTROLLER is not set
  4991. +# CONFIG_ISDN is not set
  4992. +# CONFIG_PHONE is not set
  4993. +
  4994. +#
  4995. +# Input device support
  4996. +#
  4997. +CONFIG_INPUT=y
  4998. +# CONFIG_INPUT_FF_MEMLESS is not set
  4999. +# CONFIG_INPUT_POLLDEV is not set
  5000. +
  5001. +#
  5002. +# Userland interfaces
  5003. +#
  5004. +CONFIG_INPUT_MOUSEDEV=y
  5005. +CONFIG_INPUT_MOUSEDEV_PSAUX=y
  5006. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
  5007. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
  5008. +CONFIG_INPUT_JOYDEV=m
  5009. +CONFIG_INPUT_EVDEV=m
  5010. +# CONFIG_INPUT_EVBUG is not set
  5011. +
  5012. +#
  5013. +# Input Device Drivers
  5014. +#
  5015. +CONFIG_INPUT_KEYBOARD=y
  5016. +CONFIG_KEYBOARD_ATKBD=y
  5017. +CONFIG_KEYBOARD_SUNKBD=m
  5018. +CONFIG_KEYBOARD_LKKBD=m
  5019. +CONFIG_KEYBOARD_XTKBD=m
  5020. +CONFIG_KEYBOARD_NEWTON=m
  5021. +# CONFIG_KEYBOARD_STOWAWAY is not set
  5022. +CONFIG_INPUT_MOUSE=y
  5023. +CONFIG_MOUSE_PS2=y
  5024. +CONFIG_MOUSE_PS2_ALPS=y
  5025. +CONFIG_MOUSE_PS2_LOGIPS2PP=y
  5026. +CONFIG_MOUSE_PS2_SYNAPTICS=y
  5027. +CONFIG_MOUSE_PS2_TRACKPOINT=y
  5028. +# CONFIG_MOUSE_PS2_ELANTECH is not set
  5029. +# CONFIG_MOUSE_PS2_TOUCHKIT is not set
  5030. +CONFIG_MOUSE_SERIAL=m
  5031. +# CONFIG_MOUSE_APPLETOUCH is not set
  5032. +# CONFIG_MOUSE_BCM5974 is not set
  5033. +CONFIG_MOUSE_INPORT=m
  5034. +# CONFIG_MOUSE_ATIXL is not set
  5035. +CONFIG_MOUSE_LOGIBM=m
  5036. +CONFIG_MOUSE_PC110PAD=m
  5037. +CONFIG_MOUSE_VSXXXAA=m
  5038. +CONFIG_INPUT_JOYSTICK=y
  5039. +CONFIG_JOYSTICK_ANALOG=m
  5040. +CONFIG_JOYSTICK_A3D=m
  5041. +CONFIG_JOYSTICK_ADI=m
  5042. +CONFIG_JOYSTICK_COBRA=m
  5043. +CONFIG_JOYSTICK_GF2K=m
  5044. +CONFIG_JOYSTICK_GRIP=m
  5045. +CONFIG_JOYSTICK_GRIP_MP=m
  5046. +CONFIG_JOYSTICK_GUILLEMOT=m
  5047. +CONFIG_JOYSTICK_INTERACT=m
  5048. +CONFIG_JOYSTICK_SIDEWINDER=m
  5049. +CONFIG_JOYSTICK_TMDC=m
  5050. +CONFIG_JOYSTICK_IFORCE=m
  5051. +CONFIG_JOYSTICK_IFORCE_USB=y
  5052. +CONFIG_JOYSTICK_IFORCE_232=y
  5053. +CONFIG_JOYSTICK_WARRIOR=m
  5054. +CONFIG_JOYSTICK_MAGELLAN=m
  5055. +CONFIG_JOYSTICK_SPACEORB=m
  5056. +CONFIG_JOYSTICK_SPACEBALL=m
  5057. +CONFIG_JOYSTICK_STINGER=m
  5058. +CONFIG_JOYSTICK_TWIDJOY=m
  5059. +# CONFIG_JOYSTICK_ZHENHUA is not set
  5060. +CONFIG_JOYSTICK_JOYDUMP=m
  5061. +# CONFIG_JOYSTICK_XPAD is not set
  5062. +# CONFIG_INPUT_TABLET is not set
  5063. +CONFIG_INPUT_TOUCHSCREEN=y
  5064. +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
  5065. +# CONFIG_TOUCHSCREEN_AD7879 is not set
  5066. +# CONFIG_TOUCHSCREEN_FUJITSU is not set
  5067. +CONFIG_TOUCHSCREEN_GUNZE=m
  5068. +CONFIG_TOUCHSCREEN_ELO=m
  5069. +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
  5070. +CONFIG_TOUCHSCREEN_MTOUCH=m
  5071. +# CONFIG_TOUCHSCREEN_INEXIO is not set
  5072. +CONFIG_TOUCHSCREEN_MK712=m
  5073. +# CONFIG_TOUCHSCREEN_HTCPEN is not set
  5074. +# CONFIG_TOUCHSCREEN_PENMOUNT is not set
  5075. +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
  5076. +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
  5077. +# CONFIG_TOUCHSCREEN_WM97XX is not set
  5078. +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
  5079. +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
  5080. +# CONFIG_TOUCHSCREEN_TSC2007 is not set
  5081. +CONFIG_INPUT_MISC=y
  5082. +CONFIG_INPUT_PCSPKR=m
  5083. +# CONFIG_INPUT_ATI_REMOTE is not set
  5084. +# CONFIG_INPUT_ATI_REMOTE2 is not set
  5085. +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
  5086. +# CONFIG_INPUT_POWERMATE is not set
  5087. +# CONFIG_INPUT_YEALINK is not set
  5088. +# CONFIG_INPUT_CM109 is not set
  5089. +CONFIG_INPUT_UINPUT=m
  5090. +
  5091. +#
  5092. +# Hardware I/O ports
  5093. +#
  5094. +CONFIG_SERIO=y
  5095. +# CONFIG_SERIO_I8042 is not set
  5096. +CONFIG_SERIO_SERPORT=m
  5097. +CONFIG_SERIO_PCIPS2=m
  5098. +CONFIG_SERIO_LIBPS2=y
  5099. +CONFIG_SERIO_RAW=m
  5100. +CONFIG_GAMEPORT=m
  5101. +CONFIG_GAMEPORT_NS558=m
  5102. +CONFIG_GAMEPORT_L4=m
  5103. +CONFIG_GAMEPORT_EMU10K1=m
  5104. +CONFIG_GAMEPORT_FM801=m
  5105. +
  5106. +#
  5107. +# Character devices
  5108. +#
  5109. +CONFIG_VT=y
  5110. +CONFIG_CONSOLE_TRANSLATIONS=y
  5111. +CONFIG_VT_CONSOLE=y
  5112. +CONFIG_HW_CONSOLE=y
  5113. +# CONFIG_VT_HW_CONSOLE_BINDING is not set
  5114. +CONFIG_DEVKMEM=y
  5115. +CONFIG_SERIAL_NONSTANDARD=y
  5116. +# CONFIG_COMPUTONE is not set
  5117. +# CONFIG_ROCKETPORT is not set
  5118. +# CONFIG_CYCLADES is not set
  5119. +# CONFIG_DIGIEPCA is not set
  5120. +# CONFIG_MOXA_INTELLIO is not set
  5121. +# CONFIG_MOXA_SMARTIO is not set
  5122. +# CONFIG_ISI is not set
  5123. +# CONFIG_SYNCLINKMP is not set
  5124. +# CONFIG_SYNCLINK_GT is not set
  5125. +# CONFIG_N_HDLC is not set
  5126. +# CONFIG_RISCOM8 is not set
  5127. +# CONFIG_SPECIALIX is not set
  5128. +# CONFIG_SX is not set
  5129. +# CONFIG_RIO is not set
  5130. +# CONFIG_STALDRV is not set
  5131. +# CONFIG_NOZOMI is not set
  5132. +
  5133. +#
  5134. +# Serial drivers
  5135. +#
  5136. +CONFIG_SERIAL_8250=y
  5137. +CONFIG_SERIAL_8250_CONSOLE=y
  5138. +# CONFIG_SERIAL_8250_PCI is not set
  5139. +# CONFIG_SERIAL_8250_PNP is not set
  5140. +CONFIG_SERIAL_8250_CS=m
  5141. +CONFIG_SERIAL_8250_NR_UARTS=16
  5142. +CONFIG_SERIAL_8250_RUNTIME_UARTS=4
  5143. +CONFIG_SERIAL_8250_EXTENDED=y
  5144. +CONFIG_SERIAL_8250_MANY_PORTS=y
  5145. +CONFIG_SERIAL_8250_FOURPORT=y
  5146. +# CONFIG_SERIAL_8250_ACCENT is not set
  5147. +# CONFIG_SERIAL_8250_BOCA is not set
  5148. +# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
  5149. +CONFIG_SERIAL_8250_HUB6=m
  5150. +CONFIG_SERIAL_8250_SHARE_IRQ=y
  5151. +# CONFIG_SERIAL_8250_DETECT_IRQ is not set
  5152. +CONFIG_SERIAL_8250_RSA=y
  5153. +
  5154. +#
  5155. +# Non-8250 serial port support
  5156. +#
  5157. +CONFIG_SERIAL_CORE=y
  5158. +CONFIG_SERIAL_CORE_CONSOLE=y
  5159. +# CONFIG_SERIAL_JSM is not set
  5160. +CONFIG_UNIX98_PTYS=y
  5161. +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
  5162. +CONFIG_LEGACY_PTYS=y
  5163. +CONFIG_LEGACY_PTY_COUNT=16
  5164. +# CONFIG_IPMI_HANDLER is not set
  5165. +CONFIG_HW_RANDOM=y
  5166. +# CONFIG_HW_RANDOM_TIMERIOMEM is not set
  5167. +# CONFIG_DTLK is not set
  5168. +# CONFIG_R3964 is not set
  5169. +# CONFIG_APPLICOM is not set
  5170. +
  5171. +#
  5172. +# PCMCIA character devices
  5173. +#
  5174. +# CONFIG_SYNCLINK_CS is not set
  5175. +# CONFIG_CARDMAN_4000 is not set
  5176. +# CONFIG_CARDMAN_4040 is not set
  5177. +# CONFIG_IPWIRELESS is not set
  5178. +# CONFIG_RAW_DRIVER is not set
  5179. +# CONFIG_TCG_TPM is not set
  5180. +CONFIG_DEVPORT=y
  5181. +CONFIG_I2C=m
  5182. +CONFIG_I2C_BOARDINFO=y
  5183. +CONFIG_I2C_CHARDEV=m
  5184. +CONFIG_I2C_HELPER_AUTO=y
  5185. +CONFIG_I2C_ALGOBIT=m
  5186. +CONFIG_I2C_ALGOPCA=m
  5187. +
  5188. +#
  5189. +# I2C Hardware Bus support
  5190. +#
  5191. +
  5192. +#
  5193. +# PC SMBus host controller drivers
  5194. +#
  5195. +CONFIG_I2C_ALI1535=m
  5196. +CONFIG_I2C_ALI1563=m
  5197. +CONFIG_I2C_ALI15X3=m
  5198. +CONFIG_I2C_AMD756=m
  5199. +CONFIG_I2C_AMD8111=m
  5200. +CONFIG_I2C_I801=m
  5201. +# CONFIG_I2C_ISCH is not set
  5202. +CONFIG_I2C_PIIX4=m
  5203. +CONFIG_I2C_NFORCE2=m
  5204. +CONFIG_I2C_SIS5595=m
  5205. +CONFIG_I2C_SIS630=m
  5206. +CONFIG_I2C_SIS96X=m
  5207. +CONFIG_I2C_VIA=m
  5208. +CONFIG_I2C_VIAPRO=m
  5209. +
  5210. +#
  5211. +# I2C system bus drivers (mostly embedded / system-on-chip)
  5212. +#
  5213. +CONFIG_I2C_OCORES=m
  5214. +# CONFIG_I2C_SIMTEC is not set
  5215. +
  5216. +#
  5217. +# External I2C/SMBus adapter drivers
  5218. +#
  5219. +CONFIG_I2C_PARPORT_LIGHT=m
  5220. +# CONFIG_I2C_TAOS_EVM is not set
  5221. +# CONFIG_I2C_TINY_USB is not set
  5222. +
  5223. +#
  5224. +# Graphics adapter I2C/DDC channel drivers
  5225. +#
  5226. +CONFIG_I2C_VOODOO3=m
  5227. +
  5228. +#
  5229. +# Other I2C/SMBus bus drivers
  5230. +#
  5231. +# CONFIG_I2C_ELEKTOR is not set
  5232. +CONFIG_I2C_PCA_ISA=m
  5233. +# CONFIG_I2C_PCA_PLATFORM is not set
  5234. +CONFIG_I2C_STUB=m
  5235. +
  5236. +#
  5237. +# Miscellaneous I2C Chip support
  5238. +#
  5239. +# CONFIG_DS1682 is not set
  5240. +CONFIG_SENSORS_PCF8574=m
  5241. +# CONFIG_PCF8575 is not set
  5242. +# CONFIG_SENSORS_PCA9539 is not set
  5243. +CONFIG_SENSORS_MAX6875=m
  5244. +# CONFIG_SENSORS_TSL2550 is not set
  5245. +# CONFIG_I2C_DEBUG_CORE is not set
  5246. +# CONFIG_I2C_DEBUG_ALGO is not set
  5247. +# CONFIG_I2C_DEBUG_BUS is not set
  5248. +# CONFIG_I2C_DEBUG_CHIP is not set
  5249. +# CONFIG_SPI is not set
  5250. +# CONFIG_W1 is not set
  5251. +# CONFIG_POWER_SUPPLY is not set
  5252. +# CONFIG_HWMON is not set
  5253. +# CONFIG_THERMAL is not set
  5254. +# CONFIG_THERMAL_HWMON is not set
  5255. +CONFIG_WATCHDOG=y
  5256. +# CONFIG_WATCHDOG_NOWAYOUT is not set
  5257. +
  5258. +#
  5259. +# Watchdog Device Drivers
  5260. +#
  5261. +CONFIG_SOFT_WATCHDOG=m
  5262. +# CONFIG_ALIM7101_WDT is not set
  5263. +
  5264. +#
  5265. +# ISA-based Watchdog Cards
  5266. +#
  5267. +CONFIG_PCWATCHDOG=m
  5268. +CONFIG_MIXCOMWD=m
  5269. +CONFIG_WDT=m
  5270. +
  5271. +#
  5272. +# PCI-based Watchdog Cards
  5273. +#
  5274. +CONFIG_PCIPCWATCHDOG=m
  5275. +CONFIG_WDTPCI=m
  5276. +CONFIG_WDT_501_PCI=y
  5277. +
  5278. +#
  5279. +# USB-based Watchdog Cards
  5280. +#
  5281. +CONFIG_USBPCWATCHDOG=m
  5282. +CONFIG_SSB_POSSIBLE=y
  5283. +
  5284. +#
  5285. +# Sonics Silicon Backplane
  5286. +#
  5287. +CONFIG_SSB=m
  5288. +CONFIG_SSB_SPROM=y
  5289. +CONFIG_SSB_PCIHOST_POSSIBLE=y
  5290. +CONFIG_SSB_PCIHOST=y
  5291. +# CONFIG_SSB_B43_PCI_BRIDGE is not set
  5292. +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
  5293. +# CONFIG_SSB_PCMCIAHOST is not set
  5294. +# CONFIG_SSB_SILENT is not set
  5295. +# CONFIG_SSB_DEBUG is not set
  5296. +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
  5297. +CONFIG_SSB_DRIVER_PCICORE=y
  5298. +# CONFIG_SSB_DRIVER_MIPS is not set
  5299. +
  5300. +#
  5301. +# Multifunction device drivers
  5302. +#
  5303. +# CONFIG_MFD_CORE is not set
  5304. +# CONFIG_MFD_SM501 is not set
  5305. +# CONFIG_HTC_PASIC3 is not set
  5306. +# CONFIG_MFD_TMIO is not set
  5307. +# CONFIG_MFD_WM8400 is not set
  5308. +# CONFIG_MFD_WM8350_I2C is not set
  5309. +# CONFIG_MFD_PCF50633 is not set
  5310. +# CONFIG_REGULATOR is not set
  5311. +
  5312. +#
  5313. +# Multimedia devices
  5314. +#
  5315. +
  5316. +#
  5317. +# Multimedia core support
  5318. +#
  5319. +CONFIG_VIDEO_DEV=m
  5320. +CONFIG_VIDEO_V4L2_COMMON=m
  5321. +CONFIG_VIDEO_ALLOW_V4L1=y
  5322. +CONFIG_VIDEO_V4L1_COMPAT=y
  5323. +CONFIG_DVB_CORE=m
  5324. +CONFIG_VIDEO_MEDIA=m
  5325. +
  5326. +#
  5327. +# Multimedia drivers
  5328. +#
  5329. +CONFIG_VIDEO_SAA7146=m
  5330. +CONFIG_VIDEO_SAA7146_VV=m
  5331. +# CONFIG_MEDIA_ATTACH is not set
  5332. +CONFIG_MEDIA_TUNER=m
  5333. +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
  5334. +CONFIG_MEDIA_TUNER_SIMPLE=m
  5335. +CONFIG_MEDIA_TUNER_TDA8290=m
  5336. +CONFIG_MEDIA_TUNER_TDA827X=m
  5337. +CONFIG_MEDIA_TUNER_TDA18271=m
  5338. +CONFIG_MEDIA_TUNER_TDA9887=m
  5339. +CONFIG_MEDIA_TUNER_TEA5761=m
  5340. +CONFIG_MEDIA_TUNER_TEA5767=m
  5341. +CONFIG_MEDIA_TUNER_MT20XX=m
  5342. +CONFIG_MEDIA_TUNER_MT2060=m
  5343. +CONFIG_MEDIA_TUNER_XC2028=m
  5344. +CONFIG_MEDIA_TUNER_XC5000=m
  5345. +CONFIG_MEDIA_TUNER_MXL5005S=m
  5346. +CONFIG_MEDIA_TUNER_MC44S803=m
  5347. +CONFIG_VIDEO_V4L2=m
  5348. +CONFIG_VIDEO_V4L1=m
  5349. +CONFIG_VIDEOBUF_GEN=m
  5350. +CONFIG_VIDEOBUF_DMA_SG=m
  5351. +CONFIG_VIDEOBUF_VMALLOC=m
  5352. +CONFIG_VIDEOBUF_DVB=m
  5353. +CONFIG_VIDEO_BTCX=m
  5354. +CONFIG_VIDEO_IR=m
  5355. +CONFIG_VIDEO_TVEEPROM=m
  5356. +CONFIG_VIDEO_TUNER=m
  5357. +CONFIG_VIDEO_CAPTURE_DRIVERS=y
  5358. +# CONFIG_VIDEO_ADV_DEBUG is not set
  5359. +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
  5360. +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
  5361. +CONFIG_VIDEO_IR_I2C=m
  5362. +CONFIG_VIDEO_TVAUDIO=m
  5363. +CONFIG_VIDEO_TDA7432=m
  5364. +CONFIG_VIDEO_TDA9840=m
  5365. +CONFIG_VIDEO_TEA6415C=m
  5366. +CONFIG_VIDEO_TEA6420=m
  5367. +CONFIG_VIDEO_MSP3400=m
  5368. +CONFIG_VIDEO_CS53L32A=m
  5369. +CONFIG_VIDEO_WM8775=m
  5370. +CONFIG_VIDEO_SAA6588=m
  5371. +CONFIG_VIDEO_BT819=m
  5372. +CONFIG_VIDEO_BT856=m
  5373. +CONFIG_VIDEO_BT866=m
  5374. +CONFIG_VIDEO_KS0127=m
  5375. +CONFIG_VIDEO_SAA7110=m
  5376. +CONFIG_VIDEO_SAA711X=m
  5377. +CONFIG_VIDEO_TVP5150=m
  5378. +CONFIG_VIDEO_VPX3220=m
  5379. +CONFIG_VIDEO_CX25840=m
  5380. +CONFIG_VIDEO_CX2341X=m
  5381. +CONFIG_VIDEO_SAA7185=m
  5382. +CONFIG_VIDEO_ADV7170=m
  5383. +CONFIG_VIDEO_ADV7175=m
  5384. +CONFIG_VIDEO_VIVI=m
  5385. +CONFIG_VIDEO_BT848=m
  5386. +CONFIG_VIDEO_BT848_DVB=y
  5387. +CONFIG_VIDEO_PMS=m
  5388. +CONFIG_VIDEO_CPIA=m
  5389. +CONFIG_VIDEO_CPIA_USB=m
  5390. +CONFIG_VIDEO_CPIA2=m
  5391. +CONFIG_VIDEO_SAA5246A=m
  5392. +CONFIG_VIDEO_SAA5249=m
  5393. +CONFIG_VIDEO_STRADIS=m
  5394. +CONFIG_VIDEO_ZORAN=m
  5395. +CONFIG_VIDEO_ZORAN_DC30=m
  5396. +CONFIG_VIDEO_ZORAN_ZR36060=m
  5397. +CONFIG_VIDEO_ZORAN_BUZ=m
  5398. +CONFIG_VIDEO_ZORAN_DC10=m
  5399. +CONFIG_VIDEO_ZORAN_LML33=m
  5400. +CONFIG_VIDEO_ZORAN_LML33R10=m
  5401. +CONFIG_VIDEO_ZORAN_AVS6EYES=m
  5402. +CONFIG_VIDEO_SAA7134=m
  5403. +CONFIG_VIDEO_SAA7134_ALSA=m
  5404. +CONFIG_VIDEO_SAA7134_DVB=m
  5405. +CONFIG_VIDEO_MXB=m
  5406. +CONFIG_VIDEO_HEXIUM_ORION=m
  5407. +CONFIG_VIDEO_HEXIUM_GEMINI=m
  5408. +CONFIG_VIDEO_CX88=m
  5409. +CONFIG_VIDEO_CX88_ALSA=m
  5410. +CONFIG_VIDEO_CX88_BLACKBIRD=m
  5411. +CONFIG_VIDEO_CX88_DVB=m
  5412. +CONFIG_VIDEO_CX88_MPEG=m
  5413. +CONFIG_VIDEO_CX88_VP3054=m
  5414. +# CONFIG_VIDEO_CX23885 is not set
  5415. +# CONFIG_VIDEO_AU0828 is not set
  5416. +# CONFIG_VIDEO_IVTV is not set
  5417. +# CONFIG_VIDEO_CX18 is not set
  5418. +# CONFIG_VIDEO_CAFE_CCIC is not set
  5419. +# CONFIG_SOC_CAMERA is not set
  5420. +CONFIG_V4L_USB_DRIVERS=y
  5421. +# CONFIG_USB_VIDEO_CLASS is not set
  5422. +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
  5423. +# CONFIG_USB_GSPCA is not set
  5424. +CONFIG_VIDEO_PVRUSB2=m
  5425. +CONFIG_VIDEO_PVRUSB2_SYSFS=y
  5426. +CONFIG_VIDEO_PVRUSB2_DVB=y
  5427. +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
  5428. +# CONFIG_VIDEO_HDPVR is not set
  5429. +CONFIG_VIDEO_EM28XX=m
  5430. +# CONFIG_VIDEO_EM28XX_ALSA is not set
  5431. +# CONFIG_VIDEO_EM28XX_DVB is not set
  5432. +# CONFIG_VIDEO_CX231XX is not set
  5433. +# CONFIG_VIDEO_USBVISION is not set
  5434. +CONFIG_VIDEO_USBVIDEO=m
  5435. +CONFIG_USB_VICAM=m
  5436. +CONFIG_USB_IBMCAM=m
  5437. +CONFIG_USB_KONICAWC=m
  5438. +CONFIG_USB_QUICKCAM_MESSENGER=m
  5439. +CONFIG_USB_ET61X251=m
  5440. +CONFIG_VIDEO_OVCAMCHIP=m
  5441. +# CONFIG_USB_W9968CF is not set
  5442. +CONFIG_USB_OV511=m
  5443. +CONFIG_USB_SE401=m
  5444. +CONFIG_USB_SN9C102=m
  5445. +CONFIG_USB_STV680=m
  5446. +CONFIG_USB_ZC0301=m
  5447. +CONFIG_USB_PWC=m
  5448. +# CONFIG_USB_PWC_DEBUG is not set
  5449. +CONFIG_USB_PWC_INPUT_EVDEV=y
  5450. +# CONFIG_USB_ZR364XX is not set
  5451. +# CONFIG_USB_STKWEBCAM is not set
  5452. +# CONFIG_USB_S2255 is not set
  5453. +CONFIG_RADIO_ADAPTERS=y
  5454. +CONFIG_RADIO_CADET=m
  5455. +CONFIG_RADIO_RTRACK=m
  5456. +CONFIG_RADIO_RTRACK2=m
  5457. +CONFIG_RADIO_AZTECH=m
  5458. +CONFIG_RADIO_GEMTEK=m
  5459. +CONFIG_RADIO_GEMTEK_PCI=m
  5460. +CONFIG_RADIO_MAXIRADIO=m
  5461. +CONFIG_RADIO_MAESTRO=m
  5462. +CONFIG_RADIO_SF16FMI=m
  5463. +CONFIG_RADIO_SF16FMR2=m
  5464. +CONFIG_RADIO_TERRATEC=m
  5465. +CONFIG_RADIO_TRUST=m
  5466. +CONFIG_RADIO_TYPHOON=m
  5467. +CONFIG_RADIO_TYPHOON_PROC_FS=y
  5468. +CONFIG_RADIO_ZOLTRIX=m
  5469. +CONFIG_USB_DSBR=m
  5470. +# CONFIG_USB_SI470X is not set
  5471. +# CONFIG_USB_MR800 is not set
  5472. +# CONFIG_RADIO_TEA5764 is not set
  5473. +# CONFIG_DVB_DYNAMIC_MINORS is not set
  5474. +CONFIG_DVB_CAPTURE_DRIVERS=y
  5475. +
  5476. +#
  5477. +# Supported SAA7146 based PCI Adapters
  5478. +#
  5479. +CONFIG_TTPCI_EEPROM=m
  5480. +CONFIG_DVB_AV7110=m
  5481. +CONFIG_DVB_AV7110_OSD=y
  5482. +# CONFIG_DVB_BUDGET_CORE is not set
  5483. +
  5484. +#
  5485. +# Supported USB Adapters
  5486. +#
  5487. +CONFIG_DVB_USB=m
  5488. +# CONFIG_DVB_USB_DEBUG is not set
  5489. +CONFIG_DVB_USB_A800=m
  5490. +CONFIG_DVB_USB_DIBUSB_MB=m
  5491. +CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
  5492. +CONFIG_DVB_USB_DIBUSB_MC=m
  5493. +# CONFIG_DVB_USB_DIB0700 is not set
  5494. +CONFIG_DVB_USB_UMT_010=m
  5495. +CONFIG_DVB_USB_CXUSB=m
  5496. +# CONFIG_DVB_USB_M920X is not set
  5497. +# CONFIG_DVB_USB_GL861 is not set
  5498. +# CONFIG_DVB_USB_AU6610 is not set
  5499. +CONFIG_DVB_USB_DIGITV=m
  5500. +CONFIG_DVB_USB_VP7045=m
  5501. +CONFIG_DVB_USB_VP702X=m
  5502. +CONFIG_DVB_USB_GP8PSK=m
  5503. +CONFIG_DVB_USB_NOVA_T_USB2=m
  5504. +# CONFIG_DVB_USB_TTUSB2 is not set
  5505. +CONFIG_DVB_USB_DTT200U=m
  5506. +# CONFIG_DVB_USB_OPERA1 is not set
  5507. +# CONFIG_DVB_USB_AF9005 is not set
  5508. +# CONFIG_DVB_USB_DW2102 is not set
  5509. +# CONFIG_DVB_USB_CINERGY_T2 is not set
  5510. +# CONFIG_DVB_USB_ANYSEE is not set
  5511. +# CONFIG_DVB_USB_DTV5100 is not set
  5512. +# CONFIG_DVB_USB_AF9015 is not set
  5513. +# CONFIG_DVB_USB_CE6230 is not set
  5514. +CONFIG_DVB_TTUSB_BUDGET=m
  5515. +CONFIG_DVB_TTUSB_DEC=m
  5516. +# CONFIG_DVB_SIANO_SMS1XXX is not set
  5517. +
  5518. +#
  5519. +# Supported FlexCopII (B2C2) Adapters
  5520. +#
  5521. +CONFIG_DVB_B2C2_FLEXCOP=m
  5522. +CONFIG_DVB_B2C2_FLEXCOP_PCI=m
  5523. +CONFIG_DVB_B2C2_FLEXCOP_USB=m
  5524. +# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
  5525. +
  5526. +#
  5527. +# Supported BT878 Adapters
  5528. +#
  5529. +CONFIG_DVB_BT8XX=m
  5530. +
  5531. +#
  5532. +# Supported Pluto2 Adapters
  5533. +#
  5534. +CONFIG_DVB_PLUTO2=m
  5535. +
  5536. +#
  5537. +# Supported SDMC DM1105 Adapters
  5538. +#
  5539. +# CONFIG_DVB_DM1105 is not set
  5540. +
  5541. +#
  5542. +# Supported DVB Frontends
  5543. +#
  5544. +# CONFIG_DVB_FE_CUSTOMISE is not set
  5545. +CONFIG_DVB_CX24110=m
  5546. +CONFIG_DVB_CX24123=m
  5547. +CONFIG_DVB_MT312=m
  5548. +CONFIG_DVB_ZL10036=m
  5549. +CONFIG_DVB_S5H1420=m
  5550. +CONFIG_DVB_STV0288=m
  5551. +CONFIG_DVB_STB6000=m
  5552. +CONFIG_DVB_STV0299=m
  5553. +CONFIG_DVB_TDA8083=m
  5554. +CONFIG_DVB_TDA10086=m
  5555. +CONFIG_DVB_VES1X93=m
  5556. +CONFIG_DVB_TUNER_ITD1000=m
  5557. +CONFIG_DVB_TUNER_CX24113=m
  5558. +CONFIG_DVB_TDA826X=m
  5559. +CONFIG_DVB_CX24116=m
  5560. +CONFIG_DVB_SP8870=m
  5561. +CONFIG_DVB_SP887X=m
  5562. +CONFIG_DVB_CX22700=m
  5563. +CONFIG_DVB_CX22702=m
  5564. +CONFIG_DVB_L64781=m
  5565. +CONFIG_DVB_TDA1004X=m
  5566. +CONFIG_DVB_NXT6000=m
  5567. +CONFIG_DVB_MT352=m
  5568. +CONFIG_DVB_ZL10353=m
  5569. +CONFIG_DVB_DIB3000MB=m
  5570. +CONFIG_DVB_DIB3000MC=m
  5571. +CONFIG_DVB_DIB7000P=m
  5572. +CONFIG_DVB_TDA10048=m
  5573. +CONFIG_DVB_VES1820=m
  5574. +CONFIG_DVB_STV0297=m
  5575. +CONFIG_DVB_NXT200X=m
  5576. +CONFIG_DVB_OR51211=m
  5577. +CONFIG_DVB_OR51132=m
  5578. +CONFIG_DVB_BCM3510=m
  5579. +CONFIG_DVB_LGDT330X=m
  5580. +CONFIG_DVB_LGDT3305=m
  5581. +CONFIG_DVB_S5H1409=m
  5582. +CONFIG_DVB_S5H1411=m
  5583. +CONFIG_DVB_PLL=m
  5584. +CONFIG_DVB_TUNER_DIB0070=m
  5585. +CONFIG_DVB_LNBP21=m
  5586. +CONFIG_DVB_ISL6405=m
  5587. +CONFIG_DVB_ISL6421=m
  5588. +CONFIG_DVB_LGS8GL5=m
  5589. +# CONFIG_DAB is not set
  5590. +
  5591. +#
  5592. +# Graphics support
  5593. +#
  5594. +CONFIG_DRM=m
  5595. +CONFIG_DRM_TDFX=m
  5596. +CONFIG_DRM_R128=m
  5597. +CONFIG_DRM_RADEON=m
  5598. +CONFIG_DRM_MGA=m
  5599. +CONFIG_DRM_VIA=m
  5600. +CONFIG_DRM_SAVAGE=m
  5601. +CONFIG_VGASTATE=m
  5602. +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
  5603. +CONFIG_FB=y
  5604. +CONFIG_FIRMWARE_EDID=y
  5605. +CONFIG_FB_DDC=m
  5606. +CONFIG_FB_BOOT_VESA_SUPPORT=y
  5607. +CONFIG_FB_CFB_FILLRECT=y
  5608. +CONFIG_FB_CFB_COPYAREA=y
  5609. +CONFIG_FB_CFB_IMAGEBLIT=y
  5610. +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
  5611. +CONFIG_FB_SYS_FILLRECT=m
  5612. +CONFIG_FB_SYS_COPYAREA=m
  5613. +CONFIG_FB_SYS_IMAGEBLIT=m
  5614. +# CONFIG_FB_FOREIGN_ENDIAN is not set
  5615. +CONFIG_FB_SYS_FOPS=m
  5616. +# CONFIG_FB_SVGALIB is not set
  5617. +# CONFIG_FB_MACMODES is not set
  5618. +CONFIG_FB_BACKLIGHT=y
  5619. +CONFIG_FB_MODE_HELPERS=y
  5620. +CONFIG_FB_TILEBLITTING=y
  5621. +
  5622. +#
  5623. +# Frame buffer hardware drivers
  5624. +#
  5625. +CONFIG_FB_CIRRUS=m
  5626. +CONFIG_FB_PM2=m
  5627. +CONFIG_FB_PM2_FIFO_DISCONNECT=y
  5628. +CONFIG_FB_CYBER2000=m
  5629. +# CONFIG_FB_ASILIANT is not set
  5630. +# CONFIG_FB_IMSTT is not set
  5631. +# CONFIG_FB_UVESA is not set
  5632. +CONFIG_FB_S1D13XXX=m
  5633. +CONFIG_FB_NVIDIA=m
  5634. +CONFIG_FB_NVIDIA_I2C=y
  5635. +# CONFIG_FB_NVIDIA_DEBUG is not set
  5636. +CONFIG_FB_NVIDIA_BACKLIGHT=y
  5637. +# CONFIG_FB_RIVA is not set
  5638. +CONFIG_FB_MATROX=m
  5639. +CONFIG_FB_MATROX_MILLENIUM=y
  5640. +CONFIG_FB_MATROX_MYSTIQUE=y
  5641. +CONFIG_FB_MATROX_G=y
  5642. +CONFIG_FB_MATROX_I2C=m
  5643. +CONFIG_FB_MATROX_MAVEN=m
  5644. +CONFIG_FB_MATROX_MULTIHEAD=y
  5645. +CONFIG_FB_RADEON=m
  5646. +CONFIG_FB_RADEON_I2C=y
  5647. +CONFIG_FB_RADEON_BACKLIGHT=y
  5648. +# CONFIG_FB_RADEON_DEBUG is not set
  5649. +CONFIG_FB_ATY128=m
  5650. +CONFIG_FB_ATY128_BACKLIGHT=y
  5651. +CONFIG_FB_ATY=m
  5652. +CONFIG_FB_ATY_CT=y
  5653. +CONFIG_FB_ATY_GENERIC_LCD=y
  5654. +CONFIG_FB_ATY_GX=y
  5655. +CONFIG_FB_ATY_BACKLIGHT=y
  5656. +# CONFIG_FB_S3 is not set
  5657. +CONFIG_FB_SAVAGE=m
  5658. +CONFIG_FB_SAVAGE_I2C=y
  5659. +# CONFIG_FB_SAVAGE_ACCEL is not set
  5660. +CONFIG_FB_SIS=y
  5661. +CONFIG_FB_SIS_300=y
  5662. +CONFIG_FB_SIS_315=y
  5663. +# CONFIG_FB_VIA is not set
  5664. +CONFIG_FB_NEOMAGIC=m
  5665. +CONFIG_FB_KYRO=m
  5666. +CONFIG_FB_3DFX=m
  5667. +# CONFIG_FB_3DFX_ACCEL is not set
  5668. +CONFIG_FB_3DFX_I2C=y
  5669. +CONFIG_FB_VOODOO1=m
  5670. +# CONFIG_FB_VT8623 is not set
  5671. +CONFIG_FB_TRIDENT=m
  5672. +# CONFIG_FB_ARK is not set
  5673. +# CONFIG_FB_PM3 is not set
  5674. +# CONFIG_FB_CARMINE is not set
  5675. +# CONFIG_FB_SM7XX is not set
  5676. +CONFIG_FB_VIRTUAL=m
  5677. +# CONFIG_FB_METRONOME is not set
  5678. +# CONFIG_FB_MB862XX is not set
  5679. +# CONFIG_FB_BROADSHEET is not set
  5680. +CONFIG_BACKLIGHT_LCD_SUPPORT=y
  5681. +# CONFIG_LCD_CLASS_DEVICE is not set
  5682. +CONFIG_BACKLIGHT_CLASS_DEVICE=y
  5683. +CONFIG_BACKLIGHT_GENERIC=y
  5684. +
  5685. +#
  5686. +# Display device support
  5687. +#
  5688. +# CONFIG_DISPLAY_SUPPORT is not set
  5689. +
  5690. +#
  5691. +# Console display driver support
  5692. +#
  5693. +# CONFIG_VGA_CONSOLE is not set
  5694. +# CONFIG_MDA_CONSOLE is not set
  5695. +CONFIG_DUMMY_CONSOLE=y
  5696. +CONFIG_FRAMEBUFFER_CONSOLE=y
  5697. +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
  5698. +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
  5699. +# CONFIG_FONTS is not set
  5700. +CONFIG_FONT_8x8=y
  5701. +CONFIG_FONT_8x16=y
  5702. +# CONFIG_LOGO is not set
  5703. +CONFIG_SOUND=m
  5704. +CONFIG_SOUND_OSS_CORE=y
  5705. +CONFIG_SND=m
  5706. +CONFIG_SND_TIMER=m
  5707. +CONFIG_SND_PCM=m
  5708. +CONFIG_SND_SEQUENCER=m
  5709. +CONFIG_SND_SEQ_DUMMY=m
  5710. +CONFIG_SND_OSSEMUL=y
  5711. +CONFIG_SND_MIXER_OSS=m
  5712. +CONFIG_SND_PCM_OSS=m
  5713. +CONFIG_SND_PCM_OSS_PLUGINS=y
  5714. +CONFIG_SND_SEQUENCER_OSS=y
  5715. +# CONFIG_SND_HRTIMER is not set
  5716. +# CONFIG_SND_DYNAMIC_MINORS is not set
  5717. +CONFIG_SND_SUPPORT_OLD_API=y
  5718. +CONFIG_SND_VERBOSE_PROCFS=y
  5719. +# CONFIG_SND_VERBOSE_PRINTK is not set
  5720. +# CONFIG_SND_DEBUG is not set
  5721. +CONFIG_SND_VMASTER=y
  5722. +CONFIG_SND_AC97_CODEC=m
  5723. +# CONFIG_SND_DRIVERS is not set
  5724. +CONFIG_SND_PCI=y
  5725. +# CONFIG_SND_AD1889 is not set
  5726. +# CONFIG_SND_ALS300 is not set
  5727. +# CONFIG_SND_ALI5451 is not set
  5728. +# CONFIG_SND_ATIIXP is not set
  5729. +# CONFIG_SND_ATIIXP_MODEM is not set
  5730. +# CONFIG_SND_AU8810 is not set
  5731. +# CONFIG_SND_AU8820 is not set
  5732. +# CONFIG_SND_AU8830 is not set
  5733. +# CONFIG_SND_AW2 is not set
  5734. +# CONFIG_SND_AZT3328 is not set
  5735. +# CONFIG_SND_BT87X is not set
  5736. +# CONFIG_SND_CA0106 is not set
  5737. +# CONFIG_SND_CMIPCI is not set
  5738. +# CONFIG_SND_OXYGEN is not set
  5739. +# CONFIG_SND_CS4281 is not set
  5740. +# CONFIG_SND_CS46XX is not set
  5741. +CONFIG_SND_CS5535AUDIO=m
  5742. +# CONFIG_SND_DARLA20 is not set
  5743. +# CONFIG_SND_GINA20 is not set
  5744. +# CONFIG_SND_LAYLA20 is not set
  5745. +# CONFIG_SND_DARLA24 is not set
  5746. +# CONFIG_SND_GINA24 is not set
  5747. +# CONFIG_SND_LAYLA24 is not set
  5748. +# CONFIG_SND_MONA is not set
  5749. +# CONFIG_SND_MIA is not set
  5750. +# CONFIG_SND_ECHO3G is not set
  5751. +# CONFIG_SND_INDIGO is not set
  5752. +# CONFIG_SND_INDIGOIO is not set
  5753. +# CONFIG_SND_INDIGODJ is not set
  5754. +# CONFIG_SND_INDIGOIOX is not set
  5755. +# CONFIG_SND_INDIGODJX is not set
  5756. +# CONFIG_SND_EMU10K1 is not set
  5757. +# CONFIG_SND_EMU10K1X is not set
  5758. +# CONFIG_SND_ENS1370 is not set
  5759. +# CONFIG_SND_ENS1371 is not set
  5760. +# CONFIG_SND_ES1938 is not set
  5761. +# CONFIG_SND_ES1968 is not set
  5762. +# CONFIG_SND_FM801 is not set
  5763. +# CONFIG_SND_HDA_INTEL is not set
  5764. +# CONFIG_SND_HDSP is not set
  5765. +# CONFIG_SND_HDSPM is not set
  5766. +# CONFIG_SND_HIFIER is not set
  5767. +# CONFIG_SND_ICE1712 is not set
  5768. +# CONFIG_SND_ICE1724 is not set
  5769. +# CONFIG_SND_INTEL8X0 is not set
  5770. +# CONFIG_SND_INTEL8X0M is not set
  5771. +# CONFIG_SND_KORG1212 is not set
  5772. +# CONFIG_SND_MAESTRO3 is not set
  5773. +# CONFIG_SND_MIXART is not set
  5774. +# CONFIG_SND_NM256 is not set
  5775. +# CONFIG_SND_PCXHR is not set
  5776. +# CONFIG_SND_RIPTIDE is not set
  5777. +# CONFIG_SND_RME32 is not set
  5778. +# CONFIG_SND_RME96 is not set
  5779. +# CONFIG_SND_RME9652 is not set
  5780. +# CONFIG_SND_SONICVIBES is not set
  5781. +# CONFIG_SND_TRIDENT is not set
  5782. +# CONFIG_SND_VIA82XX is not set
  5783. +# CONFIG_SND_VIA82XX_MODEM is not set
  5784. +# CONFIG_SND_VIRTUOSO is not set
  5785. +# CONFIG_SND_VX222 is not set
  5786. +# CONFIG_SND_YMFPCI is not set
  5787. +# CONFIG_SND_MIPS is not set
  5788. +# CONFIG_SND_USB is not set
  5789. +# CONFIG_SND_PCMCIA is not set
  5790. +# CONFIG_SND_SOC is not set
  5791. +# CONFIG_SOUND_PRIME is not set
  5792. +CONFIG_AC97_BUS=m
  5793. +CONFIG_HID_SUPPORT=y
  5794. +CONFIG_HID=y
  5795. +# CONFIG_HID_DEBUG is not set
  5796. +# CONFIG_HIDRAW is not set
  5797. +
  5798. +#
  5799. +# USB Input Devices
  5800. +#
  5801. +CONFIG_USB_HID=y
  5802. +# CONFIG_HID_PID is not set
  5803. +CONFIG_USB_HIDDEV=y
  5804. +
  5805. +#
  5806. +# Special HID drivers
  5807. +#
  5808. +# CONFIG_HID_A4TECH is not set
  5809. +# CONFIG_HID_APPLE is not set
  5810. +# CONFIG_HID_BELKIN is not set
  5811. +# CONFIG_HID_CHERRY is not set
  5812. +# CONFIG_HID_CHICONY is not set
  5813. +# CONFIG_HID_CYPRESS is not set
  5814. +# CONFIG_DRAGONRISE_FF is not set
  5815. +# CONFIG_HID_EZKEY is not set
  5816. +# CONFIG_HID_KYE is not set
  5817. +# CONFIG_HID_GYRATION is not set
  5818. +# CONFIG_HID_KENSINGTON is not set
  5819. +# CONFIG_HID_LOGITECH is not set
  5820. +# CONFIG_HID_MICROSOFT is not set
  5821. +# CONFIG_HID_MONTEREY is not set
  5822. +# CONFIG_HID_NTRIG is not set
  5823. +# CONFIG_HID_PANTHERLORD is not set
  5824. +# CONFIG_HID_PETALYNX is not set
  5825. +# CONFIG_HID_SAMSUNG is not set
  5826. +# CONFIG_HID_SONY is not set
  5827. +# CONFIG_HID_SUNPLUS is not set
  5828. +# CONFIG_GREENASIA_FF is not set
  5829. +# CONFIG_HID_TOPSEED is not set
  5830. +# CONFIG_THRUSTMASTER_FF is not set
  5831. +# CONFIG_ZEROPLUS_FF is not set
  5832. +CONFIG_USB_SUPPORT=y
  5833. +CONFIG_USB_ARCH_HAS_HCD=y
  5834. +CONFIG_USB_ARCH_HAS_OHCI=y
  5835. +CONFIG_USB_ARCH_HAS_EHCI=y
  5836. +CONFIG_USB=y
  5837. +# CONFIG_USB_DEBUG is not set
  5838. +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
  5839. +
  5840. +#
  5841. +# Miscellaneous USB options
  5842. +#
  5843. +CONFIG_USB_DEVICEFS=y
  5844. +# CONFIG_USB_DEVICE_CLASS is not set
  5845. +# CONFIG_USB_DYNAMIC_MINORS is not set
  5846. +# CONFIG_USB_SUSPEND is not set
  5847. +# CONFIG_USB_OTG is not set
  5848. +# CONFIG_USB_OTG_WHITELIST is not set
  5849. +# CONFIG_USB_OTG_BLACKLIST_HUB is not set
  5850. +CONFIG_USB_MON=y
  5851. +# CONFIG_USB_WUSB is not set
  5852. +# CONFIG_USB_WUSB_CBAF is not set
  5853. +
  5854. +#
  5855. +# USB Host Controller Drivers
  5856. +#
  5857. +# CONFIG_USB_C67X00_HCD is not set
  5858. +CONFIG_USB_EHCI_HCD=y
  5859. +CONFIG_USB_EHCI_ROOT_HUB_TT=y
  5860. +# CONFIG_USB_EHCI_TT_NEWSCHED is not set
  5861. +# CONFIG_USB_OXU210HP_HCD is not set
  5862. +# CONFIG_USB_ISP116X_HCD is not set
  5863. +# CONFIG_USB_ISP1760_HCD is not set
  5864. +CONFIG_USB_OHCI_HCD=y
  5865. +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
  5866. +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
  5867. +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
  5868. +CONFIG_USB_UHCI_HCD=m
  5869. +# CONFIG_USB_SL811_HCD is not set
  5870. +# CONFIG_USB_R8A66597_HCD is not set
  5871. +# CONFIG_USB_WHCI_HCD is not set
  5872. +# CONFIG_USB_HWA_HCD is not set
  5873. +
  5874. +#
  5875. +# USB Device Class drivers
  5876. +#
  5877. +CONFIG_USB_ACM=m
  5878. +CONFIG_USB_PRINTER=m
  5879. +# CONFIG_USB_WDM is not set
  5880. +# CONFIG_USB_TMC is not set
  5881. +
  5882. +#
  5883. +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
  5884. +#
  5885. +
  5886. +#
  5887. +# also be needed; see USB_STORAGE Help for more info
  5888. +#
  5889. +CONFIG_USB_STORAGE=y
  5890. +# CONFIG_USB_STORAGE_DEBUG is not set
  5891. +CONFIG_USB_STORAGE_DATAFAB=y
  5892. +CONFIG_USB_STORAGE_FREECOM=y
  5893. +CONFIG_USB_STORAGE_ISD200=y
  5894. +CONFIG_USB_STORAGE_USBAT=y
  5895. +CONFIG_USB_STORAGE_SDDR09=y
  5896. +CONFIG_USB_STORAGE_SDDR55=y
  5897. +CONFIG_USB_STORAGE_JUMPSHOT=y
  5898. +CONFIG_USB_STORAGE_ALAUDA=y
  5899. +# CONFIG_USB_STORAGE_ONETOUCH is not set
  5900. +# CONFIG_USB_STORAGE_KARMA is not set
  5901. +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
  5902. +# CONFIG_USB_LIBUSUAL is not set
  5903. +
  5904. +#
  5905. +# USB Imaging devices
  5906. +#
  5907. +CONFIG_USB_MDC800=m
  5908. +# CONFIG_USB_MICROTEK is not set
  5909. +
  5910. +#
  5911. +# USB port drivers
  5912. +#
  5913. +CONFIG_USB_SERIAL=m
  5914. +CONFIG_USB_EZUSB=y
  5915. +CONFIG_USB_SERIAL_GENERIC=y
  5916. +# CONFIG_USB_SERIAL_AIRCABLE is not set
  5917. +CONFIG_USB_SERIAL_ARK3116=m
  5918. +CONFIG_USB_SERIAL_BELKIN=m
  5919. +# CONFIG_USB_SERIAL_CH341 is not set
  5920. +# CONFIG_USB_SERIAL_WHITEHEAT is not set
  5921. +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
  5922. +# CONFIG_USB_SERIAL_CP210X is not set
  5923. +CONFIG_USB_SERIAL_CYPRESS_M8=m
  5924. +CONFIG_USB_SERIAL_EMPEG=m
  5925. +CONFIG_USB_SERIAL_FTDI_SIO=m
  5926. +CONFIG_USB_SERIAL_FUNSOFT=m
  5927. +CONFIG_USB_SERIAL_VISOR=m
  5928. +CONFIG_USB_SERIAL_IPAQ=m
  5929. +CONFIG_USB_SERIAL_IR=m
  5930. +CONFIG_USB_SERIAL_EDGEPORT=m
  5931. +CONFIG_USB_SERIAL_EDGEPORT_TI=m
  5932. +CONFIG_USB_SERIAL_GARMIN=m
  5933. +CONFIG_USB_SERIAL_IPW=m
  5934. +# CONFIG_USB_SERIAL_IUU is not set
  5935. +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
  5936. +# CONFIG_USB_SERIAL_KEYSPAN is not set
  5937. +CONFIG_USB_SERIAL_KLSI=m
  5938. +CONFIG_USB_SERIAL_KOBIL_SCT=m
  5939. +CONFIG_USB_SERIAL_MCT_U232=m
  5940. +# CONFIG_USB_SERIAL_MOS7720 is not set
  5941. +# CONFIG_USB_SERIAL_MOS7840 is not set
  5942. +# CONFIG_USB_SERIAL_MOTOROLA is not set
  5943. +CONFIG_USB_SERIAL_NAVMAN=m
  5944. +CONFIG_USB_SERIAL_PL2303=m
  5945. +# CONFIG_USB_SERIAL_OTI6858 is not set
  5946. +# CONFIG_USB_SERIAL_QUALCOMM is not set
  5947. +# CONFIG_USB_SERIAL_SPCP8X5 is not set
  5948. +CONFIG_USB_SERIAL_HP4X=m
  5949. +CONFIG_USB_SERIAL_SAFE=m
  5950. +# CONFIG_USB_SERIAL_SAFE_PADDED is not set
  5951. +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
  5952. +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
  5953. +# CONFIG_USB_SERIAL_SYMBOL is not set
  5954. +CONFIG_USB_SERIAL_TI=m
  5955. +CONFIG_USB_SERIAL_CYBERJACK=m
  5956. +CONFIG_USB_SERIAL_XIRCOM=m
  5957. +CONFIG_USB_SERIAL_OPTION=m
  5958. +CONFIG_USB_SERIAL_OMNINET=m
  5959. +# CONFIG_USB_SERIAL_OPTICON is not set
  5960. +# CONFIG_USB_SERIAL_DEBUG is not set
  5961. +
  5962. +#
  5963. +# USB Miscellaneous drivers
  5964. +#
  5965. +# CONFIG_USB_EMI62 is not set
  5966. +# CONFIG_USB_EMI26 is not set
  5967. +# CONFIG_USB_ADUTUX is not set
  5968. +# CONFIG_USB_SEVSEG is not set
  5969. +# CONFIG_USB_RIO500 is not set
  5970. +# CONFIG_USB_LEGOTOWER is not set
  5971. +# CONFIG_USB_LCD is not set
  5972. +# CONFIG_USB_BERRY_CHARGE is not set
  5973. +# CONFIG_USB_LED is not set
  5974. +# CONFIG_USB_CYPRESS_CY7C63 is not set
  5975. +# CONFIG_USB_CYTHERM is not set
  5976. +# CONFIG_USB_IDMOUSE is not set
  5977. +# CONFIG_USB_FTDI_ELAN is not set
  5978. +# CONFIG_USB_APPLEDISPLAY is not set
  5979. +# CONFIG_USB_SISUSBVGA is not set
  5980. +# CONFIG_USB_LD is not set
  5981. +# CONFIG_USB_TRANCEVIBRATOR is not set
  5982. +# CONFIG_USB_IOWARRIOR is not set
  5983. +# CONFIG_USB_TEST is not set
  5984. +# CONFIG_USB_ISIGHTFW is not set
  5985. +# CONFIG_USB_VST is not set
  5986. +# CONFIG_USB_ATM is not set
  5987. +# CONFIG_USB_GADGET is not set
  5988. +
  5989. +#
  5990. +# OTG and related infrastructure
  5991. +#
  5992. +# CONFIG_NOP_USB_XCEIV is not set
  5993. +# CONFIG_UWB is not set
  5994. +# CONFIG_MMC is not set
  5995. +# CONFIG_MEMSTICK is not set
  5996. +# CONFIG_NEW_LEDS is not set
  5997. +# CONFIG_ACCESSIBILITY is not set
  5998. +# CONFIG_INFINIBAND is not set
  5999. +CONFIG_RTC_LIB=y
  6000. +CONFIG_RTC_CLASS=y
  6001. +CONFIG_RTC_HCTOSYS=y
  6002. +CONFIG_RTC_HCTOSYS_DEVICE="rtc"
  6003. +# CONFIG_RTC_DEBUG is not set
  6004. +
  6005. +#
  6006. +# RTC interfaces
  6007. +#
  6008. +CONFIG_RTC_INTF_SYSFS=y
  6009. +CONFIG_RTC_INTF_PROC=y
  6010. +CONFIG_RTC_INTF_DEV=y
  6011. +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
  6012. +# CONFIG_RTC_DRV_TEST is not set
  6013. +
  6014. +#
  6015. +# I2C RTC drivers
  6016. +#
  6017. +# CONFIG_RTC_DRV_DS1307 is not set
  6018. +# CONFIG_RTC_DRV_DS1374 is not set
  6019. +# CONFIG_RTC_DRV_DS1672 is not set
  6020. +# CONFIG_RTC_DRV_MAX6900 is not set
  6021. +# CONFIG_RTC_DRV_RS5C372 is not set
  6022. +# CONFIG_RTC_DRV_ISL1208 is not set
  6023. +# CONFIG_RTC_DRV_X1205 is not set
  6024. +# CONFIG_RTC_DRV_PCF8563 is not set
  6025. +# CONFIG_RTC_DRV_PCF8583 is not set
  6026. +# CONFIG_RTC_DRV_M41T80 is not set
  6027. +# CONFIG_RTC_DRV_S35390A is not set
  6028. +# CONFIG_RTC_DRV_FM3130 is not set
  6029. +# CONFIG_RTC_DRV_RX8581 is not set
  6030. +
  6031. +#
  6032. +# SPI RTC drivers
  6033. +#
  6034. +
  6035. +#
  6036. +# Platform RTC drivers
  6037. +#
  6038. +CONFIG_RTC_DRV_CMOS=y
  6039. +# CONFIG_RTC_DRV_DS1286 is not set
  6040. +# CONFIG_RTC_DRV_DS1511 is not set
  6041. +# CONFIG_RTC_DRV_DS1553 is not set
  6042. +# CONFIG_RTC_DRV_DS1742 is not set
  6043. +# CONFIG_RTC_DRV_STK17TA8 is not set
  6044. +# CONFIG_RTC_DRV_M48T86 is not set
  6045. +# CONFIG_RTC_DRV_M48T35 is not set
  6046. +# CONFIG_RTC_DRV_M48T59 is not set
  6047. +# CONFIG_RTC_DRV_BQ4802 is not set
  6048. +# CONFIG_RTC_DRV_V3020 is not set
  6049. +
  6050. +#
  6051. +# on-CPU RTC drivers
  6052. +#
  6053. +# CONFIG_DMADEVICES is not set
  6054. +# CONFIG_AUXDISPLAY is not set
  6055. +# CONFIG_UIO is not set
  6056. +# CONFIG_STAGING is not set
  6057. +
  6058. +#
  6059. +# File systems
  6060. +#
  6061. +CONFIG_EXT2_FS=y
  6062. +CONFIG_EXT2_FS_XATTR=y
  6063. +CONFIG_EXT2_FS_POSIX_ACL=y
  6064. +CONFIG_EXT2_FS_SECURITY=y
  6065. +# CONFIG_EXT2_FS_XIP is not set
  6066. +CONFIG_EXT3_FS=y
  6067. +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
  6068. +CONFIG_EXT3_FS_XATTR=y
  6069. +CONFIG_EXT3_FS_POSIX_ACL=y
  6070. +CONFIG_EXT3_FS_SECURITY=y
  6071. +# CONFIG_EXT4_FS is not set
  6072. +CONFIG_JBD=y
  6073. +# CONFIG_JBD_DEBUG is not set
  6074. +CONFIG_JBD2=m
  6075. +# CONFIG_JBD2_DEBUG is not set
  6076. +CONFIG_FS_MBCACHE=y
  6077. +CONFIG_REISERFS_FS=m
  6078. +# CONFIG_REISERFS_CHECK is not set
  6079. +# CONFIG_REISERFS_PROC_INFO is not set
  6080. +CONFIG_REISERFS_FS_XATTR=y
  6081. +CONFIG_REISERFS_FS_POSIX_ACL=y
  6082. +CONFIG_REISERFS_FS_SECURITY=y
  6083. +CONFIG_JFS_FS=m
  6084. +CONFIG_JFS_POSIX_ACL=y
  6085. +CONFIG_JFS_SECURITY=y
  6086. +# CONFIG_JFS_DEBUG is not set
  6087. +# CONFIG_JFS_STATISTICS is not set
  6088. +CONFIG_FS_POSIX_ACL=y
  6089. +CONFIG_FILE_LOCKING=y
  6090. +CONFIG_XFS_FS=m
  6091. +CONFIG_XFS_QUOTA=y
  6092. +CONFIG_XFS_POSIX_ACL=y
  6093. +CONFIG_XFS_RT=y
  6094. +# CONFIG_XFS_DEBUG is not set
  6095. +# CONFIG_GFS2_FS is not set
  6096. +CONFIG_OCFS2_FS=m
  6097. +CONFIG_OCFS2_FS_O2CB=m
  6098. +CONFIG_OCFS2_FS_STATS=y
  6099. +CONFIG_OCFS2_DEBUG_MASKLOG=y
  6100. +# CONFIG_OCFS2_DEBUG_FS is not set
  6101. +# CONFIG_OCFS2_FS_POSIX_ACL is not set
  6102. +# CONFIG_BTRFS_FS is not set
  6103. +CONFIG_DNOTIFY=y
  6104. +CONFIG_INOTIFY=y
  6105. +CONFIG_INOTIFY_USER=y
  6106. +CONFIG_QUOTA=y
  6107. +# CONFIG_QUOTA_NETLINK_INTERFACE is not set
  6108. +CONFIG_PRINT_QUOTA_WARNING=y
  6109. +CONFIG_QUOTA_TREE=m
  6110. +CONFIG_QFMT_V1=m
  6111. +CONFIG_QFMT_V2=m
  6112. +CONFIG_QUOTACTL=y
  6113. +CONFIG_AUTOFS_FS=m
  6114. +CONFIG_AUTOFS4_FS=m
  6115. +CONFIG_FUSE_FS=m
  6116. +
  6117. +#
  6118. +# Caches
  6119. +#
  6120. +# CONFIG_FSCACHE is not set
  6121. +
  6122. +#
  6123. +# CD-ROM/DVD Filesystems
  6124. +#
  6125. +CONFIG_ISO9660_FS=m
  6126. +CONFIG_JOLIET=y
  6127. +CONFIG_ZISOFS=y
  6128. +CONFIG_UDF_FS=m
  6129. +CONFIG_UDF_NLS=y
  6130. +
  6131. +#
  6132. +# DOS/FAT/NT Filesystems
  6133. +#
  6134. +CONFIG_FAT_FS=m
  6135. +CONFIG_MSDOS_FS=m
  6136. +CONFIG_VFAT_FS=m
  6137. +CONFIG_FAT_DEFAULT_CODEPAGE=437
  6138. +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
  6139. +CONFIG_NTFS_FS=m
  6140. +# CONFIG_NTFS_DEBUG is not set
  6141. +CONFIG_NTFS_RW=y
  6142. +
  6143. +#
  6144. +# Pseudo filesystems
  6145. +#
  6146. +CONFIG_PROC_FS=y
  6147. +CONFIG_PROC_KCORE=y
  6148. +CONFIG_PROC_SYSCTL=y
  6149. +CONFIG_PROC_PAGE_MONITOR=y
  6150. +CONFIG_SYSFS=y
  6151. +CONFIG_TMPFS=y
  6152. +# CONFIG_TMPFS_POSIX_ACL is not set
  6153. +# CONFIG_HUGETLB_PAGE is not set
  6154. +CONFIG_CONFIGFS_FS=m
  6155. +CONFIG_MISC_FILESYSTEMS=y
  6156. +CONFIG_ADFS_FS=m
  6157. +# CONFIG_ADFS_FS_RW is not set
  6158. +CONFIG_AFFS_FS=m
  6159. +# CONFIG_ECRYPT_FS is not set
  6160. +CONFIG_HFS_FS=m
  6161. +CONFIG_HFSPLUS_FS=m
  6162. +CONFIG_BEFS_FS=m
  6163. +# CONFIG_BEFS_DEBUG is not set
  6164. +CONFIG_BFS_FS=m
  6165. +CONFIG_EFS_FS=m
  6166. +CONFIG_CRAMFS=y
  6167. +# CONFIG_SQUASHFS is not set
  6168. +CONFIG_VXFS_FS=m
  6169. +CONFIG_MINIX_FS=m
  6170. +# CONFIG_OMFS_FS is not set
  6171. +CONFIG_HPFS_FS=m
  6172. +CONFIG_QNX4FS_FS=m
  6173. +CONFIG_ROMFS_FS=m
  6174. +CONFIG_ROMFS_BACKED_BY_BLOCK=y
  6175. +# CONFIG_ROMFS_BACKED_BY_MTD is not set
  6176. +# CONFIG_ROMFS_BACKED_BY_BOTH is not set
  6177. +CONFIG_ROMFS_ON_BLOCK=y
  6178. +CONFIG_SYSV_FS=m
  6179. +CONFIG_UFS_FS=m
  6180. +# CONFIG_UFS_FS_WRITE is not set
  6181. +# CONFIG_UFS_DEBUG is not set
  6182. +# CONFIG_NILFS2_FS is not set
  6183. +CONFIG_NETWORK_FILESYSTEMS=y
  6184. +CONFIG_NFS_FS=m
  6185. +CONFIG_NFS_V3=y
  6186. +CONFIG_NFS_V3_ACL=y
  6187. +CONFIG_NFS_V4=y
  6188. +CONFIG_NFSD=m
  6189. +CONFIG_NFSD_V2_ACL=y
  6190. +CONFIG_NFSD_V3=y
  6191. +CONFIG_NFSD_V3_ACL=y
  6192. +CONFIG_NFSD_V4=y
  6193. +CONFIG_LOCKD=m
  6194. +CONFIG_LOCKD_V4=y
  6195. +CONFIG_EXPORTFS=m
  6196. +CONFIG_NFS_ACL_SUPPORT=m
  6197. +CONFIG_NFS_COMMON=y
  6198. +CONFIG_SUNRPC=m
  6199. +CONFIG_SUNRPC_GSS=m
  6200. +CONFIG_RPCSEC_GSS_KRB5=m
  6201. +CONFIG_RPCSEC_GSS_SPKM3=m
  6202. +CONFIG_SMB_FS=m
  6203. +# CONFIG_SMB_NLS_DEFAULT is not set
  6204. +CONFIG_CIFS=m
  6205. +# CONFIG_CIFS_STATS is not set
  6206. +# CONFIG_CIFS_WEAK_PW_HASH is not set
  6207. +# CONFIG_CIFS_UPCALL is not set
  6208. +# CONFIG_CIFS_XATTR is not set
  6209. +# CONFIG_CIFS_DEBUG2 is not set
  6210. +# CONFIG_CIFS_DFS_UPCALL is not set
  6211. +# CONFIG_CIFS_EXPERIMENTAL is not set
  6212. +CONFIG_NCP_FS=m
  6213. +CONFIG_NCPFS_PACKET_SIGNING=y
  6214. +CONFIG_NCPFS_IOCTL_LOCKING=y
  6215. +CONFIG_NCPFS_STRONG=y
  6216. +CONFIG_NCPFS_NFS_NS=y
  6217. +CONFIG_NCPFS_OS2_NS=y
  6218. +# CONFIG_NCPFS_SMALLDOS is not set
  6219. +CONFIG_NCPFS_NLS=y
  6220. +CONFIG_NCPFS_EXTRAS=y
  6221. +CONFIG_CODA_FS=m
  6222. +CONFIG_AFS_FS=m
  6223. +# CONFIG_AFS_DEBUG is not set
  6224. +
  6225. +#
  6226. +# Partition Types
  6227. +#
  6228. +CONFIG_PARTITION_ADVANCED=y
  6229. +CONFIG_ACORN_PARTITION=y
  6230. +# CONFIG_ACORN_PARTITION_CUMANA is not set
  6231. +# CONFIG_ACORN_PARTITION_EESOX is not set
  6232. +CONFIG_ACORN_PARTITION_ICS=y
  6233. +# CONFIG_ACORN_PARTITION_ADFS is not set
  6234. +# CONFIG_ACORN_PARTITION_POWERTEC is not set
  6235. +CONFIG_ACORN_PARTITION_RISCIX=y
  6236. +CONFIG_OSF_PARTITION=y
  6237. +CONFIG_AMIGA_PARTITION=y
  6238. +CONFIG_ATARI_PARTITION=y
  6239. +CONFIG_MAC_PARTITION=y
  6240. +CONFIG_MSDOS_PARTITION=y
  6241. +CONFIG_BSD_DISKLABEL=y
  6242. +CONFIG_MINIX_SUBPARTITION=y
  6243. +CONFIG_SOLARIS_X86_PARTITION=y
  6244. +CONFIG_UNIXWARE_DISKLABEL=y
  6245. +CONFIG_LDM_PARTITION=y
  6246. +# CONFIG_LDM_DEBUG is not set
  6247. +CONFIG_SGI_PARTITION=y
  6248. +CONFIG_ULTRIX_PARTITION=y
  6249. +CONFIG_SUN_PARTITION=y
  6250. +CONFIG_KARMA_PARTITION=y
  6251. +CONFIG_EFI_PARTITION=y
  6252. +# CONFIG_SYSV68_PARTITION is not set
  6253. +CONFIG_NLS=y
  6254. +CONFIG_NLS_DEFAULT="iso8859-1"
  6255. +CONFIG_NLS_CODEPAGE_437=m
  6256. +CONFIG_NLS_CODEPAGE_737=m
  6257. +CONFIG_NLS_CODEPAGE_775=m
  6258. +CONFIG_NLS_CODEPAGE_850=m
  6259. +CONFIG_NLS_CODEPAGE_852=m
  6260. +CONFIG_NLS_CODEPAGE_855=m
  6261. +CONFIG_NLS_CODEPAGE_857=m
  6262. +CONFIG_NLS_CODEPAGE_860=m
  6263. +CONFIG_NLS_CODEPAGE_861=m
  6264. +CONFIG_NLS_CODEPAGE_862=m
  6265. +CONFIG_NLS_CODEPAGE_863=m
  6266. +CONFIG_NLS_CODEPAGE_864=m
  6267. +CONFIG_NLS_CODEPAGE_865=m
  6268. +CONFIG_NLS_CODEPAGE_866=m
  6269. +CONFIG_NLS_CODEPAGE_869=m
  6270. +CONFIG_NLS_CODEPAGE_936=m
  6271. +CONFIG_NLS_CODEPAGE_950=m
  6272. +CONFIG_NLS_CODEPAGE_932=m
  6273. +CONFIG_NLS_CODEPAGE_949=m
  6274. +CONFIG_NLS_CODEPAGE_874=m
  6275. +CONFIG_NLS_ISO8859_8=m
  6276. +CONFIG_NLS_CODEPAGE_1250=m
  6277. +CONFIG_NLS_CODEPAGE_1251=m
  6278. +CONFIG_NLS_ASCII=m
  6279. +CONFIG_NLS_ISO8859_1=m
  6280. +CONFIG_NLS_ISO8859_2=m
  6281. +CONFIG_NLS_ISO8859_3=m
  6282. +CONFIG_NLS_ISO8859_4=m
  6283. +CONFIG_NLS_ISO8859_5=m
  6284. +CONFIG_NLS_ISO8859_6=m
  6285. +CONFIG_NLS_ISO8859_7=m
  6286. +CONFIG_NLS_ISO8859_9=m
  6287. +CONFIG_NLS_ISO8859_13=m
  6288. +CONFIG_NLS_ISO8859_14=m
  6289. +CONFIG_NLS_ISO8859_15=m
  6290. +CONFIG_NLS_KOI8_R=m
  6291. +CONFIG_NLS_KOI8_U=m
  6292. +CONFIG_NLS_UTF8=m
  6293. +# CONFIG_DLM is not set
  6294. +
  6295. +#
  6296. +# Kernel hacking
  6297. +#
  6298. +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  6299. +# CONFIG_PRINTK_TIME is not set
  6300. +CONFIG_ENABLE_WARN_DEPRECATED=y
  6301. +CONFIG_ENABLE_MUST_CHECK=y
  6302. +CONFIG_FRAME_WARN=1024
  6303. +CONFIG_MAGIC_SYSRQ=y
  6304. +CONFIG_UNUSED_SYMBOLS=y
  6305. +CONFIG_DEBUG_FS=y
  6306. +# CONFIG_HEADERS_CHECK is not set
  6307. +# CONFIG_DEBUG_KERNEL is not set
  6308. +# CONFIG_DEBUG_MEMORY_INIT is not set
  6309. +# CONFIG_RCU_CPU_STALL_DETECTOR is not set
  6310. +CONFIG_SYSCTL_SYSCALL_CHECK=y
  6311. +CONFIG_TRACING_SUPPORT=y
  6312. +
  6313. +#
  6314. +# Tracers
  6315. +#
  6316. +# CONFIG_IRQSOFF_TRACER is not set
  6317. +# CONFIG_SCHED_TRACER is not set
  6318. +# CONFIG_CONTEXT_SWITCH_TRACER is not set
  6319. +# CONFIG_EVENT_TRACER is not set
  6320. +# CONFIG_BOOT_TRACER is not set
  6321. +# CONFIG_TRACE_BRANCH_PROFILING is not set
  6322. +# CONFIG_KMEMTRACE is not set
  6323. +# CONFIG_WORKQUEUE_TRACER is not set
  6324. +# CONFIG_BLK_DEV_IO_TRACE is not set
  6325. +# CONFIG_DYNAMIC_DEBUG is not set
  6326. +# CONFIG_SAMPLES is not set
  6327. +CONFIG_HAVE_ARCH_KGDB=y
  6328. +CONFIG_CMDLINE=""
  6329. +
  6330. +#
  6331. +# Security options
  6332. +#
  6333. +CONFIG_KEYS=y
  6334. +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
  6335. +CONFIG_SECURITY=y
  6336. +# CONFIG_SECURITYFS is not set
  6337. +CONFIG_SECURITY_NETWORK=y
  6338. +CONFIG_SECURITY_NETWORK_XFRM=y
  6339. +# CONFIG_SECURITY_PATH is not set
  6340. +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
  6341. +# CONFIG_SECURITY_ROOTPLUG is not set
  6342. +CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
  6343. +CONFIG_SECURITY_SELINUX=y
  6344. +CONFIG_SECURITY_SELINUX_BOOTPARAM=y
  6345. +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
  6346. +CONFIG_SECURITY_SELINUX_DISABLE=y
  6347. +CONFIG_SECURITY_SELINUX_DEVELOP=y
  6348. +CONFIG_SECURITY_SELINUX_AVC_STATS=y
  6349. +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
  6350. +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
  6351. +# CONFIG_SECURITY_TOMOYO is not set
  6352. +CONFIG_XOR_BLOCKS=m
  6353. +CONFIG_ASYNC_CORE=m
  6354. +CONFIG_ASYNC_MEMCPY=m
  6355. +CONFIG_ASYNC_XOR=m
  6356. +CONFIG_CRYPTO=y
  6357. +
  6358. +#
  6359. +# Crypto core or helper
  6360. +#
  6361. +# CONFIG_CRYPTO_FIPS is not set
  6362. +CONFIG_CRYPTO_ALGAPI=y
  6363. +CONFIG_CRYPTO_ALGAPI2=y
  6364. +CONFIG_CRYPTO_AEAD=m
  6365. +CONFIG_CRYPTO_AEAD2=y
  6366. +CONFIG_CRYPTO_BLKCIPHER=y
  6367. +CONFIG_CRYPTO_BLKCIPHER2=y
  6368. +CONFIG_CRYPTO_HASH=y
  6369. +CONFIG_CRYPTO_HASH2=y
  6370. +CONFIG_CRYPTO_RNG2=y
  6371. +CONFIG_CRYPTO_PCOMP=y
  6372. +CONFIG_CRYPTO_MANAGER=y
  6373. +CONFIG_CRYPTO_MANAGER2=y
  6374. +# CONFIG_CRYPTO_GF128MUL is not set
  6375. +CONFIG_CRYPTO_NULL=m
  6376. +CONFIG_CRYPTO_WORKQUEUE=y
  6377. +# CONFIG_CRYPTO_CRYPTD is not set
  6378. +CONFIG_CRYPTO_AUTHENC=m
  6379. +CONFIG_CRYPTO_TEST=m
  6380. +
  6381. +#
  6382. +# Authenticated Encryption with Associated Data
  6383. +#
  6384. +# CONFIG_CRYPTO_CCM is not set
  6385. +# CONFIG_CRYPTO_GCM is not set
  6386. +# CONFIG_CRYPTO_SEQIV is not set
  6387. +
  6388. +#
  6389. +# Block modes
  6390. +#
  6391. +CONFIG_CRYPTO_CBC=y
  6392. +# CONFIG_CRYPTO_CTR is not set
  6393. +# CONFIG_CRYPTO_CTS is not set
  6394. +CONFIG_CRYPTO_ECB=m
  6395. +# CONFIG_CRYPTO_LRW is not set
  6396. +# CONFIG_CRYPTO_PCBC is not set
  6397. +# CONFIG_CRYPTO_XTS is not set
  6398. +
  6399. +#
  6400. +# Hash modes
  6401. +#
  6402. +CONFIG_CRYPTO_HMAC=y
  6403. +# CONFIG_CRYPTO_XCBC is not set
  6404. +
  6405. +#
  6406. +# Digest
  6407. +#
  6408. +CONFIG_CRYPTO_CRC32C=m
  6409. +CONFIG_CRYPTO_MD4=m
  6410. +CONFIG_CRYPTO_MD5=y
  6411. +CONFIG_CRYPTO_MICHAEL_MIC=m
  6412. +# CONFIG_CRYPTO_RMD128 is not set
  6413. +# CONFIG_CRYPTO_RMD160 is not set
  6414. +# CONFIG_CRYPTO_RMD256 is not set
  6415. +# CONFIG_CRYPTO_RMD320 is not set
  6416. +CONFIG_CRYPTO_SHA1=m
  6417. +CONFIG_CRYPTO_SHA256=m
  6418. +CONFIG_CRYPTO_SHA512=m
  6419. +CONFIG_CRYPTO_TGR192=m
  6420. +CONFIG_CRYPTO_WP512=m
  6421. +
  6422. +#
  6423. +# Ciphers
  6424. +#
  6425. +CONFIG_CRYPTO_AES=m
  6426. +CONFIG_CRYPTO_ANUBIS=m
  6427. +CONFIG_CRYPTO_ARC4=m
  6428. +CONFIG_CRYPTO_BLOWFISH=m
  6429. +# CONFIG_CRYPTO_CAMELLIA is not set
  6430. +CONFIG_CRYPTO_CAST5=m
  6431. +CONFIG_CRYPTO_CAST6=m
  6432. +CONFIG_CRYPTO_DES=m
  6433. +# CONFIG_CRYPTO_FCRYPT is not set
  6434. +CONFIG_CRYPTO_KHAZAD=m
  6435. +# CONFIG_CRYPTO_SALSA20 is not set
  6436. +# CONFIG_CRYPTO_SEED is not set
  6437. +CONFIG_CRYPTO_SERPENT=m
  6438. +CONFIG_CRYPTO_TEA=m
  6439. +CONFIG_CRYPTO_TWOFISH=m
  6440. +CONFIG_CRYPTO_TWOFISH_COMMON=m
  6441. +
  6442. +#
  6443. +# Compression
  6444. +#
  6445. +CONFIG_CRYPTO_DEFLATE=m
  6446. +# CONFIG_CRYPTO_ZLIB is not set
  6447. +# CONFIG_CRYPTO_LZO is not set
  6448. +
  6449. +#
  6450. +# Random Number Generation
  6451. +#
  6452. +# CONFIG_CRYPTO_ANSI_CPRNG is not set
  6453. +CONFIG_CRYPTO_HW=y
  6454. +# CONFIG_CRYPTO_DEV_HIFN_795X is not set
  6455. +# CONFIG_BINARY_PRINTF is not set
  6456. +
  6457. +#
  6458. +# Library routines
  6459. +#
  6460. +CONFIG_BITREVERSE=y
  6461. +CONFIG_GENERIC_FIND_LAST_BIT=y
  6462. +CONFIG_CRC_CCITT=m
  6463. +CONFIG_CRC16=m
  6464. +# CONFIG_CRC_T10DIF is not set
  6465. +CONFIG_CRC_ITU_T=m
  6466. +CONFIG_CRC32=y
  6467. +# CONFIG_CRC7 is not set
  6468. +CONFIG_LIBCRC32C=m
  6469. +CONFIG_AUDIT_GENERIC=y
  6470. +CONFIG_ZLIB_INFLATE=y
  6471. +CONFIG_ZLIB_DEFLATE=m
  6472. +CONFIG_DECOMPRESS_GZIP=y
  6473. +CONFIG_TEXTSEARCH=y
  6474. +CONFIG_TEXTSEARCH_KMP=m
  6475. +CONFIG_TEXTSEARCH_BM=m
  6476. +CONFIG_TEXTSEARCH_FSM=m
  6477. +CONFIG_HAS_IOMEM=y
  6478. +CONFIG_HAS_IOPORT=y
  6479. +CONFIG_HAS_DMA=y
  6480. +CONFIG_NLATTR=y
  6481. diff -Nur linux-2.6.30.5.orig/arch/mips/configs/yeeloong2f_defconfig linux-2.6.30.5/arch/mips/configs/yeeloong2f_defconfig
  6482. --- linux-2.6.30.5.orig/arch/mips/configs/yeeloong2f_defconfig 1970-01-01 01:00:00.000000000 +0100
  6483. +++ linux-2.6.30.5/arch/mips/configs/yeeloong2f_defconfig 2009-08-23 19:01:04.000000000 +0200
  6484. @@ -0,0 +1,2591 @@
  6485. +#
  6486. +# Automatically generated make config: don't edit
  6487. +# Linux kernel version: 2.6.31-rc2
  6488. +# Sat Jul 11 00:34:44 2009
  6489. +#
  6490. +CONFIG_MIPS=y
  6491. +
  6492. +#
  6493. +# Machine selection
  6494. +#
  6495. +# CONFIG_MACH_ALCHEMY is not set
  6496. +# CONFIG_AR7 is not set
  6497. +# CONFIG_BASLER_EXCITE is not set
  6498. +# CONFIG_BCM47XX is not set
  6499. +# CONFIG_MIPS_COBALT is not set
  6500. +# CONFIG_MACH_DECSTATION is not set
  6501. +# CONFIG_MACH_JAZZ is not set
  6502. +# CONFIG_LASAT is not set
  6503. +CONFIG_MACH_LOONGSON=y
  6504. +# CONFIG_MIPS_MALTA is not set
  6505. +# CONFIG_MIPS_SIM is not set
  6506. +# CONFIG_NEC_MARKEINS is not set
  6507. +# CONFIG_MACH_VR41XX is not set
  6508. +# CONFIG_NXP_STB220 is not set
  6509. +# CONFIG_NXP_STB225 is not set
  6510. +# CONFIG_PNX8550_JBS is not set
  6511. +# CONFIG_PNX8550_STB810 is not set
  6512. +# CONFIG_PMC_MSP is not set
  6513. +# CONFIG_PMC_YOSEMITE is not set
  6514. +# CONFIG_SGI_IP22 is not set
  6515. +# CONFIG_SGI_IP27 is not set
  6516. +# CONFIG_SGI_IP28 is not set
  6517. +# CONFIG_SGI_IP32 is not set
  6518. +# CONFIG_SIBYTE_CRHINE is not set
  6519. +# CONFIG_SIBYTE_CARMEL is not set
  6520. +# CONFIG_SIBYTE_CRHONE is not set
  6521. +# CONFIG_SIBYTE_RHONE is not set
  6522. +# CONFIG_SIBYTE_SWARM is not set
  6523. +# CONFIG_SIBYTE_LITTLESUR is not set
  6524. +# CONFIG_SIBYTE_SENTOSA is not set
  6525. +# CONFIG_SIBYTE_BIGSUR is not set
  6526. +# CONFIG_SNI_RM is not set
  6527. +# CONFIG_MACH_TX39XX is not set
  6528. +# CONFIG_MACH_TX49XX is not set
  6529. +# CONFIG_MIKROTIK_RB532 is not set
  6530. +# CONFIG_WR_PPMC is not set
  6531. +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
  6532. +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
  6533. +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
  6534. +CONFIG_ARCH_SPARSEMEM_ENABLE=y
  6535. +# CONFIG_LEMOTE_FULOONG2E is not set
  6536. +# CONFIG_LEMOTE_FULOONG2F is not set
  6537. +CONFIG_LEMOTE_YEELOONG2F=y
  6538. +CONFIG_CS5536=y
  6539. +CONFIG_SYS_HAS_MACH_PROM_INIT_CMDLINE=y
  6540. +CONFIG_CS5536_MFGPT=y
  6541. +CONFIG_UCA_SIZE=0x400000
  6542. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
  6543. +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
  6544. +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
  6545. +CONFIG_ARCH_SUPPORTS_OPROFILE=y
  6546. +CONFIG_GENERIC_FIND_NEXT_BIT=y
  6547. +CONFIG_GENERIC_HWEIGHT=y
  6548. +CONFIG_GENERIC_CALIBRATE_DELAY=y
  6549. +CONFIG_GENERIC_CLOCKEVENTS=y
  6550. +CONFIG_GENERIC_TIME=y
  6551. +CONFIG_GENERIC_CMOS_UPDATE=y
  6552. +CONFIG_SCHED_OMIT_FRAME_POINTER=y
  6553. +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
  6554. +CONFIG_DMA_NONCOHERENT=y
  6555. +CONFIG_DMA_NEED_PCI_MAP_STATE=y
  6556. +CONFIG_EARLY_PRINTK=y
  6557. +CONFIG_SYS_HAS_EARLY_PRINTK=y
  6558. +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
  6559. +CONFIG_I8259=y
  6560. +# CONFIG_NO_IOPORT is not set
  6561. +CONFIG_GENERIC_ISA_DMA=y
  6562. +CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
  6563. +# CONFIG_CPU_BIG_ENDIAN is not set
  6564. +CONFIG_CPU_LITTLE_ENDIAN=y
  6565. +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
  6566. +CONFIG_IRQ_CPU=y
  6567. +CONFIG_BOOT_ELF32=y
  6568. +CONFIG_MIPS_L1_CACHE_SHIFT=5
  6569. +
  6570. +#
  6571. +# CPU selection
  6572. +#
  6573. +# CONFIG_CPU_LOONGSON2E is not set
  6574. +CONFIG_CPU_LOONGSON2F=y
  6575. +# CONFIG_CPU_MIPS32_R1 is not set
  6576. +# CONFIG_CPU_MIPS32_R2 is not set
  6577. +# CONFIG_CPU_MIPS64_R1 is not set
  6578. +# CONFIG_CPU_MIPS64_R2 is not set
  6579. +# CONFIG_CPU_R3000 is not set
  6580. +# CONFIG_CPU_TX39XX is not set
  6581. +# CONFIG_CPU_VR41XX is not set
  6582. +# CONFIG_CPU_R4300 is not set
  6583. +# CONFIG_CPU_R4X00 is not set
  6584. +# CONFIG_CPU_TX49XX is not set
  6585. +# CONFIG_CPU_R5000 is not set
  6586. +# CONFIG_CPU_R5432 is not set
  6587. +# CONFIG_CPU_R5500 is not set
  6588. +# CONFIG_CPU_R6000 is not set
  6589. +# CONFIG_CPU_NEVADA is not set
  6590. +# CONFIG_CPU_R8000 is not set
  6591. +# CONFIG_CPU_R10000 is not set
  6592. +# CONFIG_CPU_RM7000 is not set
  6593. +# CONFIG_CPU_RM9000 is not set
  6594. +# CONFIG_CPU_SB1 is not set
  6595. +# CONFIG_CPU_CAVIUM_OCTEON is not set
  6596. +CONFIG_CPU_LOONGSON2=y
  6597. +CONFIG_SYS_HAS_CPU_LOONGSON2F=y
  6598. +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
  6599. +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
  6600. +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
  6601. +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
  6602. +
  6603. +#
  6604. +# Kernel type
  6605. +#
  6606. +# CONFIG_32BIT is not set
  6607. +CONFIG_64BIT=y
  6608. +# CONFIG_PAGE_SIZE_4KB is not set
  6609. +# CONFIG_PAGE_SIZE_8KB is not set
  6610. +CONFIG_PAGE_SIZE_16KB=y
  6611. +# CONFIG_PAGE_SIZE_32KB is not set
  6612. +# CONFIG_PAGE_SIZE_64KB is not set
  6613. +CONFIG_BOARD_SCACHE=y
  6614. +CONFIG_MIPS_MT_DISABLED=y
  6615. +# CONFIG_MIPS_MT_SMP is not set
  6616. +# CONFIG_MIPS_MT_SMTC is not set
  6617. +CONFIG_CPU_HAS_WB=y
  6618. +CONFIG_CPU_HAS_SYNC=y
  6619. +CONFIG_GENERIC_HARDIRQS=y
  6620. +CONFIG_GENERIC_IRQ_PROBE=y
  6621. +CONFIG_CPU_SUPPORTS_HIGHMEM=y
  6622. +CONFIG_SYS_SUPPORTS_HIGHMEM=y
  6623. +CONFIG_ARCH_FLATMEM_ENABLE=y
  6624. +CONFIG_ARCH_POPULATES_NODE_MAP=y
  6625. +CONFIG_SELECT_MEMORY_MODEL=y
  6626. +# CONFIG_FLATMEM_MANUAL is not set
  6627. +# CONFIG_DISCONTIGMEM_MANUAL is not set
  6628. +CONFIG_SPARSEMEM_MANUAL=y
  6629. +CONFIG_SPARSEMEM=y
  6630. +CONFIG_HAVE_MEMORY_PRESENT=y
  6631. +CONFIG_SPARSEMEM_STATIC=y
  6632. +
  6633. +#
  6634. +# Memory hotplug is currently incompatible with Software Suspend
  6635. +#
  6636. +CONFIG_PAGEFLAGS_EXTENDED=y
  6637. +CONFIG_SPLIT_PTLOCK_CPUS=4
  6638. +CONFIG_PHYS_ADDR_T_64BIT=y
  6639. +CONFIG_ZONE_DMA_FLAG=0
  6640. +CONFIG_VIRT_TO_BUS=y
  6641. +CONFIG_HAVE_MLOCK=y
  6642. +CONFIG_HAVE_MLOCKED_PAGE_BIT=y
  6643. +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
  6644. +CONFIG_TICK_ONESHOT=y
  6645. +CONFIG_NO_HZ=y
  6646. +CONFIG_HIGH_RES_TIMERS=y
  6647. +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
  6648. +# CONFIG_HZ_48 is not set
  6649. +# CONFIG_HZ_100 is not set
  6650. +# CONFIG_HZ_128 is not set
  6651. +CONFIG_HZ_250=y
  6652. +# CONFIG_HZ_256 is not set
  6653. +# CONFIG_HZ_1000 is not set
  6654. +# CONFIG_HZ_1024 is not set
  6655. +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
  6656. +CONFIG_HZ=250
  6657. +# CONFIG_PREEMPT_NONE is not set
  6658. +CONFIG_PREEMPT_VOLUNTARY=y
  6659. +# CONFIG_PREEMPT is not set
  6660. +CONFIG_KEXEC=y
  6661. +# CONFIG_SECCOMP is not set
  6662. +CONFIG_LOCKDEP_SUPPORT=y
  6663. +CONFIG_STACKTRACE_SUPPORT=y
  6664. +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
  6665. +CONFIG_CONSTRUCTORS=y
  6666. +
  6667. +#
  6668. +# General setup
  6669. +#
  6670. +CONFIG_EXPERIMENTAL=y
  6671. +CONFIG_BROKEN_ON_SMP=y
  6672. +CONFIG_INIT_ENV_ARG_LIMIT=32
  6673. +CONFIG_LOCALVERSION=""
  6674. +# CONFIG_LOCALVERSION_AUTO is not set
  6675. +CONFIG_SWAP=y
  6676. +CONFIG_SYSVIPC=y
  6677. +CONFIG_SYSVIPC_SYSCTL=y
  6678. +CONFIG_POSIX_MQUEUE=y
  6679. +CONFIG_POSIX_MQUEUE_SYSCTL=y
  6680. +CONFIG_BSD_PROCESS_ACCT=y
  6681. +CONFIG_BSD_PROCESS_ACCT_V3=y
  6682. +# CONFIG_TASKSTATS is not set
  6683. +CONFIG_AUDIT=y
  6684. +
  6685. +#
  6686. +# RCU Subsystem
  6687. +#
  6688. +CONFIG_CLASSIC_RCU=y
  6689. +# CONFIG_TREE_RCU is not set
  6690. +# CONFIG_PREEMPT_RCU is not set
  6691. +# CONFIG_TREE_RCU_TRACE is not set
  6692. +# CONFIG_PREEMPT_RCU_TRACE is not set
  6693. +CONFIG_IKCONFIG=y
  6694. +CONFIG_IKCONFIG_PROC=y
  6695. +CONFIG_LOG_BUF_SHIFT=15
  6696. +# CONFIG_GROUP_SCHED is not set
  6697. +# CONFIG_CGROUPS is not set
  6698. +CONFIG_SYSFS_DEPRECATED=y
  6699. +CONFIG_SYSFS_DEPRECATED_V2=y
  6700. +# CONFIG_RELAY is not set
  6701. +# CONFIG_NAMESPACES is not set
  6702. +CONFIG_BLK_DEV_INITRD=y
  6703. +CONFIG_INITRAMFS_SOURCE=""
  6704. +CONFIG_RD_GZIP=y
  6705. +# CONFIG_RD_BZIP2 is not set
  6706. +# CONFIG_RD_LZMA is not set
  6707. +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
  6708. +CONFIG_SYSCTL=y
  6709. +CONFIG_ANON_INODES=y
  6710. +CONFIG_EMBEDDED=y
  6711. +CONFIG_SYSCTL_SYSCALL=y
  6712. +CONFIG_KALLSYMS=y
  6713. +# CONFIG_KALLSYMS_EXTRA_PASS is not set
  6714. +CONFIG_HOTPLUG=y
  6715. +CONFIG_PRINTK=y
  6716. +CONFIG_BUG=y
  6717. +CONFIG_ELF_CORE=y
  6718. +CONFIG_PCSPKR_PLATFORM=y
  6719. +CONFIG_BASE_FULL=y
  6720. +CONFIG_FUTEX=y
  6721. +CONFIG_EPOLL=y
  6722. +CONFIG_SIGNALFD=y
  6723. +CONFIG_TIMERFD=y
  6724. +CONFIG_EVENTFD=y
  6725. +CONFIG_SHMEM=y
  6726. +CONFIG_AIO=y
  6727. +
  6728. +#
  6729. +# Performance Counters
  6730. +#
  6731. +CONFIG_VM_EVENT_COUNTERS=y
  6732. +CONFIG_PCI_QUIRKS=y
  6733. +# CONFIG_STRIP_ASM_SYMS is not set
  6734. +CONFIG_COMPAT_BRK=y
  6735. +CONFIG_SLAB=y
  6736. +# CONFIG_SLUB is not set
  6737. +# CONFIG_SLOB is not set
  6738. +CONFIG_PROFILING=y
  6739. +CONFIG_TRACEPOINTS=y
  6740. +CONFIG_MARKERS=y
  6741. +CONFIG_OPROFILE=m
  6742. +CONFIG_HAVE_OPROFILE=y
  6743. +CONFIG_HAVE_SYSCALL_WRAPPERS=y
  6744. +
  6745. +#
  6746. +# GCOV-based kernel profiling
  6747. +#
  6748. +# CONFIG_GCOV_KERNEL is not set
  6749. +# CONFIG_SLOW_WORK is not set
  6750. +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
  6751. +CONFIG_SLABINFO=y
  6752. +CONFIG_RT_MUTEXES=y
  6753. +CONFIG_BASE_SMALL=0
  6754. +CONFIG_MODULES=y
  6755. +# CONFIG_MODULE_FORCE_LOAD is not set
  6756. +CONFIG_MODULE_UNLOAD=y
  6757. +CONFIG_MODULE_FORCE_UNLOAD=y
  6758. +CONFIG_MODVERSIONS=y
  6759. +# CONFIG_MODULE_SRCVERSION_ALL is not set
  6760. +CONFIG_BLOCK=y
  6761. +# CONFIG_BLK_DEV_BSG is not set
  6762. +# CONFIG_BLK_DEV_INTEGRITY is not set
  6763. +CONFIG_BLOCK_COMPAT=y
  6764. +
  6765. +#
  6766. +# IO Schedulers
  6767. +#
  6768. +CONFIG_IOSCHED_NOOP=y
  6769. +CONFIG_IOSCHED_AS=y
  6770. +CONFIG_IOSCHED_DEADLINE=y
  6771. +CONFIG_IOSCHED_CFQ=y
  6772. +# CONFIG_DEFAULT_AS is not set
  6773. +# CONFIG_DEFAULT_DEADLINE is not set
  6774. +CONFIG_DEFAULT_CFQ=y
  6775. +# CONFIG_DEFAULT_NOOP is not set
  6776. +CONFIG_DEFAULT_IOSCHED="cfq"
  6777. +# CONFIG_PROBE_INITRD_HEADER is not set
  6778. +CONFIG_FREEZER=y
  6779. +
  6780. +#
  6781. +# Bus options (PCI, PCMCIA, EISA, ISA, TC)
  6782. +#
  6783. +CONFIG_HW_HAS_PCI=y
  6784. +CONFIG_PCI=y
  6785. +CONFIG_PCI_DOMAINS=y
  6786. +# CONFIG_ARCH_SUPPORTS_MSI is not set
  6787. +CONFIG_PCI_LEGACY=y
  6788. +# CONFIG_PCI_STUB is not set
  6789. +# CONFIG_PCI_IOV is not set
  6790. +CONFIG_ISA=y
  6791. +CONFIG_MMU=y
  6792. +# CONFIG_PCCARD is not set
  6793. +CONFIG_HOTPLUG_PCI=m
  6794. +CONFIG_HOTPLUG_PCI_FAKE=m
  6795. +CONFIG_HOTPLUG_PCI_CPCI=y
  6796. +CONFIG_HOTPLUG_PCI_SHPC=m
  6797. +
  6798. +#
  6799. +# Executable file formats
  6800. +#
  6801. +CONFIG_BINFMT_ELF=y
  6802. +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
  6803. +# CONFIG_HAVE_AOUT is not set
  6804. +CONFIG_BINFMT_MISC=m
  6805. +CONFIG_MIPS32_COMPAT=y
  6806. +CONFIG_COMPAT=y
  6807. +CONFIG_SYSVIPC_COMPAT=y
  6808. +CONFIG_MIPS32_O32=y
  6809. +CONFIG_MIPS32_N32=y
  6810. +CONFIG_BINFMT_ELF32=y
  6811. +
  6812. +#
  6813. +# Power management options
  6814. +#
  6815. +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
  6816. +CONFIG_ARCH_SUSPEND_POSSIBLE=y
  6817. +CONFIG_PM=y
  6818. +# CONFIG_PM_DEBUG is not set
  6819. +CONFIG_PM_SLEEP=y
  6820. +CONFIG_SUSPEND=y
  6821. +CONFIG_SUSPEND_FREEZER=y
  6822. +CONFIG_HIBERNATION_NVS=y
  6823. +CONFIG_HIBERNATION=y
  6824. +CONFIG_PM_STD_PARTITION="/dev/hda3"
  6825. +
  6826. +#
  6827. +# CPU Frequency scaling
  6828. +#
  6829. +CONFIG_CPU_FREQ=y
  6830. +CONFIG_CPU_FREQ_TABLE=y
  6831. +# CONFIG_CPU_FREQ_DEBUG is not set
  6832. +CONFIG_CPU_FREQ_STAT=y
  6833. +# CONFIG_CPU_FREQ_STAT_DETAILS is not set
  6834. +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
  6835. +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
  6836. +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
  6837. +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
  6838. +CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y
  6839. +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
  6840. +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
  6841. +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
  6842. +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
  6843. +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
  6844. +CONFIG_LOONGSON2F_CPU_FREQ=y
  6845. +CONFIG_NET=y
  6846. +
  6847. +#
  6848. +# Networking options
  6849. +#
  6850. +CONFIG_PACKET=y
  6851. +CONFIG_PACKET_MMAP=y
  6852. +CONFIG_UNIX=y
  6853. +CONFIG_XFRM=y
  6854. +CONFIG_XFRM_USER=m
  6855. +# CONFIG_XFRM_SUB_POLICY is not set
  6856. +# CONFIG_XFRM_MIGRATE is not set
  6857. +# CONFIG_XFRM_STATISTICS is not set
  6858. +CONFIG_XFRM_IPCOMP=m
  6859. +CONFIG_NET_KEY=m
  6860. +# CONFIG_NET_KEY_MIGRATE is not set
  6861. +CONFIG_INET=y
  6862. +CONFIG_IP_MULTICAST=y
  6863. +CONFIG_IP_ADVANCED_ROUTER=y
  6864. +CONFIG_ASK_IP_FIB_HASH=y
  6865. +# CONFIG_IP_FIB_TRIE is not set
  6866. +CONFIG_IP_FIB_HASH=y
  6867. +CONFIG_IP_MULTIPLE_TABLES=y
  6868. +CONFIG_IP_ROUTE_MULTIPATH=y
  6869. +CONFIG_IP_ROUTE_VERBOSE=y
  6870. +# CONFIG_IP_PNP is not set
  6871. +CONFIG_NET_IPIP=m
  6872. +CONFIG_NET_IPGRE=m
  6873. +CONFIG_NET_IPGRE_BROADCAST=y
  6874. +CONFIG_IP_MROUTE=y
  6875. +CONFIG_IP_PIMSM_V1=y
  6876. +CONFIG_IP_PIMSM_V2=y
  6877. +# CONFIG_ARPD is not set
  6878. +CONFIG_SYN_COOKIES=y
  6879. +CONFIG_INET_AH=m
  6880. +CONFIG_INET_ESP=m
  6881. +CONFIG_INET_IPCOMP=m
  6882. +CONFIG_INET_XFRM_TUNNEL=m
  6883. +CONFIG_INET_TUNNEL=m
  6884. +CONFIG_INET_XFRM_MODE_TRANSPORT=m
  6885. +CONFIG_INET_XFRM_MODE_TUNNEL=m
  6886. +CONFIG_INET_XFRM_MODE_BEET=y
  6887. +CONFIG_INET_LRO=y
  6888. +CONFIG_INET_DIAG=m
  6889. +CONFIG_INET_TCP_DIAG=m
  6890. +CONFIG_TCP_CONG_ADVANCED=y
  6891. +CONFIG_TCP_CONG_BIC=y
  6892. +CONFIG_TCP_CONG_CUBIC=m
  6893. +CONFIG_TCP_CONG_WESTWOOD=m
  6894. +CONFIG_TCP_CONG_HTCP=m
  6895. +CONFIG_TCP_CONG_HSTCP=m
  6896. +CONFIG_TCP_CONG_HYBLA=m
  6897. +CONFIG_TCP_CONG_VEGAS=m
  6898. +CONFIG_TCP_CONG_SCALABLE=m
  6899. +CONFIG_TCP_CONG_LP=m
  6900. +CONFIG_TCP_CONG_VENO=m
  6901. +# CONFIG_TCP_CONG_YEAH is not set
  6902. +# CONFIG_TCP_CONG_ILLINOIS is not set
  6903. +CONFIG_DEFAULT_BIC=y
  6904. +# CONFIG_DEFAULT_CUBIC is not set
  6905. +# CONFIG_DEFAULT_HTCP is not set
  6906. +# CONFIG_DEFAULT_VEGAS is not set
  6907. +# CONFIG_DEFAULT_WESTWOOD is not set
  6908. +# CONFIG_DEFAULT_RENO is not set
  6909. +CONFIG_DEFAULT_TCP_CONG="bic"
  6910. +# CONFIG_TCP_MD5SIG is not set
  6911. +CONFIG_IPV6=m
  6912. +CONFIG_IPV6_PRIVACY=y
  6913. +# CONFIG_IPV6_ROUTER_PREF is not set
  6914. +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
  6915. +CONFIG_INET6_AH=m
  6916. +CONFIG_INET6_ESP=m
  6917. +CONFIG_INET6_IPCOMP=m
  6918. +# CONFIG_IPV6_MIP6 is not set
  6919. +CONFIG_INET6_XFRM_TUNNEL=m
  6920. +CONFIG_INET6_TUNNEL=m
  6921. +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
  6922. +CONFIG_INET6_XFRM_MODE_TUNNEL=m
  6923. +CONFIG_INET6_XFRM_MODE_BEET=m
  6924. +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
  6925. +CONFIG_IPV6_SIT=m
  6926. +CONFIG_IPV6_NDISC_NODETYPE=y
  6927. +CONFIG_IPV6_TUNNEL=m
  6928. +# CONFIG_IPV6_MULTIPLE_TABLES is not set
  6929. +# CONFIG_IPV6_MROUTE is not set
  6930. +# CONFIG_NETLABEL is not set
  6931. +CONFIG_NETWORK_SECMARK=y
  6932. +CONFIG_NETFILTER=y
  6933. +# CONFIG_NETFILTER_DEBUG is not set
  6934. +CONFIG_NETFILTER_ADVANCED=y
  6935. +CONFIG_BRIDGE_NETFILTER=y
  6936. +
  6937. +#
  6938. +# Core Netfilter Configuration
  6939. +#
  6940. +CONFIG_NETFILTER_NETLINK=m
  6941. +CONFIG_NETFILTER_NETLINK_QUEUE=m
  6942. +CONFIG_NETFILTER_NETLINK_LOG=m
  6943. +# CONFIG_NF_CONNTRACK is not set
  6944. +# CONFIG_NETFILTER_TPROXY is not set
  6945. +CONFIG_NETFILTER_XTABLES=m
  6946. +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
  6947. +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
  6948. +CONFIG_NETFILTER_XT_TARGET_HL=m
  6949. +# CONFIG_NETFILTER_XT_TARGET_LED is not set
  6950. +CONFIG_NETFILTER_XT_TARGET_MARK=m
  6951. +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
  6952. +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
  6953. +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
  6954. +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
  6955. +CONFIG_NETFILTER_XT_TARGET_SECMARK=m
  6956. +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
  6957. +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
  6958. +CONFIG_NETFILTER_XT_MATCH_COMMENT=m
  6959. +CONFIG_NETFILTER_XT_MATCH_DCCP=m
  6960. +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
  6961. +CONFIG_NETFILTER_XT_MATCH_ESP=m
  6962. +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
  6963. +CONFIG_NETFILTER_XT_MATCH_HL=m
  6964. +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
  6965. +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
  6966. +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
  6967. +CONFIG_NETFILTER_XT_MATCH_MAC=m
  6968. +CONFIG_NETFILTER_XT_MATCH_MARK=m
  6969. +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
  6970. +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
  6971. +CONFIG_NETFILTER_XT_MATCH_POLICY=m
  6972. +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
  6973. +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
  6974. +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
  6975. +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
  6976. +CONFIG_NETFILTER_XT_MATCH_REALM=m
  6977. +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
  6978. +CONFIG_NETFILTER_XT_MATCH_SCTP=m
  6979. +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
  6980. +CONFIG_NETFILTER_XT_MATCH_STRING=m
  6981. +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
  6982. +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
  6983. +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
  6984. +# CONFIG_NETFILTER_XT_MATCH_OSF is not set
  6985. +CONFIG_IP_VS=m
  6986. +# CONFIG_IP_VS_IPV6 is not set
  6987. +# CONFIG_IP_VS_DEBUG is not set
  6988. +CONFIG_IP_VS_TAB_BITS=12
  6989. +
  6990. +#
  6991. +# IPVS transport protocol load balancing support
  6992. +#
  6993. +CONFIG_IP_VS_PROTO_TCP=y
  6994. +CONFIG_IP_VS_PROTO_UDP=y
  6995. +CONFIG_IP_VS_PROTO_AH_ESP=y
  6996. +CONFIG_IP_VS_PROTO_ESP=y
  6997. +CONFIG_IP_VS_PROTO_AH=y
  6998. +
  6999. +#
  7000. +# IPVS scheduler
  7001. +#
  7002. +CONFIG_IP_VS_RR=m
  7003. +CONFIG_IP_VS_WRR=m
  7004. +CONFIG_IP_VS_LC=m
  7005. +CONFIG_IP_VS_WLC=m
  7006. +CONFIG_IP_VS_LBLC=m
  7007. +CONFIG_IP_VS_LBLCR=m
  7008. +CONFIG_IP_VS_DH=m
  7009. +CONFIG_IP_VS_SH=m
  7010. +CONFIG_IP_VS_SED=m
  7011. +CONFIG_IP_VS_NQ=m
  7012. +
  7013. +#
  7014. +# IPVS application helper
  7015. +#
  7016. +CONFIG_IP_VS_FTP=m
  7017. +
  7018. +#
  7019. +# IP: Netfilter Configuration
  7020. +#
  7021. +# CONFIG_NF_DEFRAG_IPV4 is not set
  7022. +CONFIG_IP_NF_QUEUE=m
  7023. +CONFIG_IP_NF_IPTABLES=m
  7024. +CONFIG_IP_NF_MATCH_ADDRTYPE=m
  7025. +CONFIG_IP_NF_MATCH_AH=m
  7026. +CONFIG_IP_NF_MATCH_ECN=m
  7027. +CONFIG_IP_NF_MATCH_TTL=m
  7028. +CONFIG_IP_NF_FILTER=m
  7029. +CONFIG_IP_NF_TARGET_REJECT=m
  7030. +CONFIG_IP_NF_TARGET_LOG=m
  7031. +CONFIG_IP_NF_TARGET_ULOG=m
  7032. +CONFIG_IP_NF_MANGLE=m
  7033. +CONFIG_IP_NF_TARGET_ECN=m
  7034. +CONFIG_IP_NF_TARGET_TTL=m
  7035. +CONFIG_IP_NF_RAW=m
  7036. +# CONFIG_IP_NF_SECURITY is not set
  7037. +CONFIG_IP_NF_ARPTABLES=m
  7038. +CONFIG_IP_NF_ARPFILTER=m
  7039. +CONFIG_IP_NF_ARP_MANGLE=m
  7040. +
  7041. +#
  7042. +# IPv6: Netfilter Configuration
  7043. +#
  7044. +CONFIG_IP6_NF_QUEUE=m
  7045. +CONFIG_IP6_NF_IPTABLES=m
  7046. +CONFIG_IP6_NF_MATCH_AH=m
  7047. +CONFIG_IP6_NF_MATCH_EUI64=m
  7048. +CONFIG_IP6_NF_MATCH_FRAG=m
  7049. +CONFIG_IP6_NF_MATCH_OPTS=m
  7050. +CONFIG_IP6_NF_MATCH_HL=m
  7051. +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
  7052. +# CONFIG_IP6_NF_MATCH_MH is not set
  7053. +CONFIG_IP6_NF_MATCH_RT=m
  7054. +CONFIG_IP6_NF_TARGET_HL=m
  7055. +CONFIG_IP6_NF_TARGET_LOG=m
  7056. +CONFIG_IP6_NF_FILTER=m
  7057. +CONFIG_IP6_NF_TARGET_REJECT=m
  7058. +CONFIG_IP6_NF_MANGLE=m
  7059. +CONFIG_IP6_NF_RAW=m
  7060. +# CONFIG_IP6_NF_SECURITY is not set
  7061. +
  7062. +#
  7063. +# DECnet: Netfilter Configuration
  7064. +#
  7065. +CONFIG_DECNET_NF_GRABULATOR=m
  7066. +CONFIG_BRIDGE_NF_EBTABLES=m
  7067. +CONFIG_BRIDGE_EBT_BROUTE=m
  7068. +CONFIG_BRIDGE_EBT_T_FILTER=m
  7069. +CONFIG_BRIDGE_EBT_T_NAT=m
  7070. +CONFIG_BRIDGE_EBT_802_3=m
  7071. +CONFIG_BRIDGE_EBT_AMONG=m
  7072. +CONFIG_BRIDGE_EBT_ARP=m
  7073. +CONFIG_BRIDGE_EBT_IP=m
  7074. +# CONFIG_BRIDGE_EBT_IP6 is not set
  7075. +CONFIG_BRIDGE_EBT_LIMIT=m
  7076. +CONFIG_BRIDGE_EBT_MARK=m
  7077. +CONFIG_BRIDGE_EBT_PKTTYPE=m
  7078. +CONFIG_BRIDGE_EBT_STP=m
  7079. +CONFIG_BRIDGE_EBT_VLAN=m
  7080. +CONFIG_BRIDGE_EBT_ARPREPLY=m
  7081. +CONFIG_BRIDGE_EBT_DNAT=m
  7082. +CONFIG_BRIDGE_EBT_MARK_T=m
  7083. +CONFIG_BRIDGE_EBT_REDIRECT=m
  7084. +CONFIG_BRIDGE_EBT_SNAT=m
  7085. +CONFIG_BRIDGE_EBT_LOG=m
  7086. +CONFIG_BRIDGE_EBT_ULOG=m
  7087. +# CONFIG_BRIDGE_EBT_NFLOG is not set
  7088. +CONFIG_IP_DCCP=m
  7089. +CONFIG_INET_DCCP_DIAG=m
  7090. +
  7091. +#
  7092. +# DCCP CCIDs Configuration (EXPERIMENTAL)
  7093. +#
  7094. +# CONFIG_IP_DCCP_CCID2_DEBUG is not set
  7095. +CONFIG_IP_DCCP_CCID3=y
  7096. +# CONFIG_IP_DCCP_CCID3_DEBUG is not set
  7097. +CONFIG_IP_DCCP_CCID3_RTO=100
  7098. +CONFIG_IP_DCCP_TFRC_LIB=y
  7099. +CONFIG_IP_SCTP=m
  7100. +# CONFIG_SCTP_DBG_MSG is not set
  7101. +# CONFIG_SCTP_DBG_OBJCNT is not set
  7102. +# CONFIG_SCTP_HMAC_NONE is not set
  7103. +# CONFIG_SCTP_HMAC_SHA1 is not set
  7104. +CONFIG_SCTP_HMAC_MD5=y
  7105. +CONFIG_TIPC=m
  7106. +CONFIG_TIPC_ADVANCED=y
  7107. +CONFIG_TIPC_ZONES=3
  7108. +CONFIG_TIPC_CLUSTERS=1
  7109. +CONFIG_TIPC_NODES=255
  7110. +CONFIG_TIPC_SLAVE_NODES=0
  7111. +CONFIG_TIPC_PORTS=8191
  7112. +CONFIG_TIPC_LOG=0
  7113. +# CONFIG_TIPC_DEBUG is not set
  7114. +CONFIG_ATM=y
  7115. +CONFIG_ATM_CLIP=y
  7116. +# CONFIG_ATM_CLIP_NO_ICMP is not set
  7117. +CONFIG_ATM_LANE=m
  7118. +CONFIG_ATM_MPOA=m
  7119. +CONFIG_ATM_BR2684=m
  7120. +# CONFIG_ATM_BR2684_IPFILTER is not set
  7121. +CONFIG_STP=m
  7122. +CONFIG_BRIDGE=m
  7123. +# CONFIG_NET_DSA is not set
  7124. +CONFIG_VLAN_8021Q=m
  7125. +# CONFIG_VLAN_8021Q_GVRP is not set
  7126. +CONFIG_DECNET=m
  7127. +# CONFIG_DECNET_ROUTER is not set
  7128. +CONFIG_LLC=m
  7129. +CONFIG_LLC2=m
  7130. +CONFIG_IPX=m
  7131. +# CONFIG_IPX_INTERN is not set
  7132. +CONFIG_ATALK=m
  7133. +CONFIG_DEV_APPLETALK=m
  7134. +# CONFIG_COPS is not set
  7135. +CONFIG_IPDDP=m
  7136. +CONFIG_IPDDP_ENCAP=y
  7137. +CONFIG_IPDDP_DECAP=y
  7138. +CONFIG_X25=m
  7139. +CONFIG_LAPB=m
  7140. +CONFIG_ECONET=m
  7141. +CONFIG_ECONET_AUNUDP=y
  7142. +CONFIG_ECONET_NATIVE=y
  7143. +CONFIG_WAN_ROUTER=m
  7144. +# CONFIG_PHONET is not set
  7145. +# CONFIG_IEEE802154 is not set
  7146. +CONFIG_NET_SCHED=y
  7147. +
  7148. +#
  7149. +# Queueing/Scheduling
  7150. +#
  7151. +CONFIG_NET_SCH_CBQ=m
  7152. +CONFIG_NET_SCH_HTB=m
  7153. +CONFIG_NET_SCH_HFSC=m
  7154. +CONFIG_NET_SCH_ATM=m
  7155. +CONFIG_NET_SCH_PRIO=m
  7156. +# CONFIG_NET_SCH_MULTIQ is not set
  7157. +CONFIG_NET_SCH_RED=m
  7158. +CONFIG_NET_SCH_SFQ=m
  7159. +CONFIG_NET_SCH_TEQL=m
  7160. +CONFIG_NET_SCH_TBF=m
  7161. +CONFIG_NET_SCH_GRED=m
  7162. +CONFIG_NET_SCH_DSMARK=m
  7163. +CONFIG_NET_SCH_NETEM=m
  7164. +# CONFIG_NET_SCH_DRR is not set
  7165. +CONFIG_NET_SCH_INGRESS=m
  7166. +
  7167. +#
  7168. +# Classification
  7169. +#
  7170. +CONFIG_NET_CLS=y
  7171. +CONFIG_NET_CLS_BASIC=m
  7172. +CONFIG_NET_CLS_TCINDEX=m
  7173. +CONFIG_NET_CLS_ROUTE4=m
  7174. +CONFIG_NET_CLS_ROUTE=y
  7175. +CONFIG_NET_CLS_FW=m
  7176. +CONFIG_NET_CLS_U32=m
  7177. +CONFIG_CLS_U32_PERF=y
  7178. +CONFIG_CLS_U32_MARK=y
  7179. +CONFIG_NET_CLS_RSVP=m
  7180. +CONFIG_NET_CLS_RSVP6=m
  7181. +# CONFIG_NET_CLS_FLOW is not set
  7182. +CONFIG_NET_EMATCH=y
  7183. +CONFIG_NET_EMATCH_STACK=32
  7184. +CONFIG_NET_EMATCH_CMP=m
  7185. +CONFIG_NET_EMATCH_NBYTE=m
  7186. +CONFIG_NET_EMATCH_U32=m
  7187. +CONFIG_NET_EMATCH_META=m
  7188. +CONFIG_NET_EMATCH_TEXT=m
  7189. +CONFIG_NET_CLS_ACT=y
  7190. +CONFIG_NET_ACT_POLICE=m
  7191. +CONFIG_NET_ACT_GACT=m
  7192. +CONFIG_GACT_PROB=y
  7193. +CONFIG_NET_ACT_MIRRED=m
  7194. +CONFIG_NET_ACT_IPT=m
  7195. +# CONFIG_NET_ACT_NAT is not set
  7196. +CONFIG_NET_ACT_PEDIT=m
  7197. +CONFIG_NET_ACT_SIMP=m
  7198. +# CONFIG_NET_ACT_SKBEDIT is not set
  7199. +CONFIG_NET_CLS_IND=y
  7200. +CONFIG_NET_SCH_FIFO=y
  7201. +# CONFIG_DCB is not set
  7202. +
  7203. +#
  7204. +# Network testing
  7205. +#
  7206. +CONFIG_NET_PKTGEN=m
  7207. +# CONFIG_NET_DROP_MONITOR is not set
  7208. +CONFIG_HAMRADIO=y
  7209. +
  7210. +#
  7211. +# Packet Radio protocols
  7212. +#
  7213. +CONFIG_AX25=m
  7214. +# CONFIG_AX25_DAMA_SLAVE is not set
  7215. +CONFIG_NETROM=m
  7216. +CONFIG_ROSE=m
  7217. +
  7218. +#
  7219. +# AX.25 network device drivers
  7220. +#
  7221. +CONFIG_MKISS=m
  7222. +CONFIG_6PACK=m
  7223. +CONFIG_BPQETHER=m
  7224. +CONFIG_BAYCOM_SER_FDX=m
  7225. +CONFIG_BAYCOM_SER_HDX=m
  7226. +CONFIG_YAM=m
  7227. +# CONFIG_CAN is not set
  7228. +CONFIG_IRDA=m
  7229. +
  7230. +#
  7231. +# IrDA protocols
  7232. +#
  7233. +CONFIG_IRLAN=m
  7234. +CONFIG_IRNET=m
  7235. +CONFIG_IRCOMM=m
  7236. +# CONFIG_IRDA_ULTRA is not set
  7237. +
  7238. +#
  7239. +# IrDA options
  7240. +#
  7241. +CONFIG_IRDA_CACHE_LAST_LSAP=y
  7242. +CONFIG_IRDA_FAST_RR=y
  7243. +CONFIG_IRDA_DEBUG=y
  7244. +
  7245. +#
  7246. +# Infrared-port device drivers
  7247. +#
  7248. +
  7249. +#
  7250. +# SIR device drivers
  7251. +#
  7252. +CONFIG_IRTTY_SIR=m
  7253. +
  7254. +#
  7255. +# Dongle support
  7256. +#
  7257. +CONFIG_DONGLE=y
  7258. +CONFIG_ESI_DONGLE=m
  7259. +CONFIG_ACTISYS_DONGLE=m
  7260. +CONFIG_TEKRAM_DONGLE=m
  7261. +CONFIG_TOIM3232_DONGLE=m
  7262. +CONFIG_LITELINK_DONGLE=m
  7263. +CONFIG_MA600_DONGLE=m
  7264. +CONFIG_GIRBIL_DONGLE=m
  7265. +CONFIG_MCP2120_DONGLE=m
  7266. +CONFIG_OLD_BELKIN_DONGLE=m
  7267. +CONFIG_ACT200L_DONGLE=m
  7268. +# CONFIG_KINGSUN_DONGLE is not set
  7269. +# CONFIG_KSDAZZLE_DONGLE is not set
  7270. +# CONFIG_KS959_DONGLE is not set
  7271. +
  7272. +#
  7273. +# FIR device drivers
  7274. +#
  7275. +CONFIG_USB_IRDA=m
  7276. +CONFIG_SIGMATEL_FIR=m
  7277. +CONFIG_VLSI_FIR=m
  7278. +CONFIG_MCS_FIR=m
  7279. +CONFIG_BT=m
  7280. +CONFIG_BT_L2CAP=m
  7281. +CONFIG_BT_SCO=m
  7282. +CONFIG_BT_RFCOMM=m
  7283. +CONFIG_BT_RFCOMM_TTY=y
  7284. +CONFIG_BT_BNEP=m
  7285. +CONFIG_BT_BNEP_MC_FILTER=y
  7286. +CONFIG_BT_BNEP_PROTO_FILTER=y
  7287. +CONFIG_BT_HIDP=m
  7288. +
  7289. +#
  7290. +# Bluetooth device drivers
  7291. +#
  7292. +# CONFIG_BT_HCIBTUSB is not set
  7293. +# CONFIG_BT_HCIBTSDIO is not set
  7294. +CONFIG_BT_HCIUART=m
  7295. +CONFIG_BT_HCIUART_H4=y
  7296. +CONFIG_BT_HCIUART_BCSP=y
  7297. +# CONFIG_BT_HCIUART_LL is not set
  7298. +CONFIG_BT_HCIBCM203X=m
  7299. +CONFIG_BT_HCIBPA10X=m
  7300. +CONFIG_BT_HCIBFUSB=m
  7301. +CONFIG_BT_HCIVHCI=m
  7302. +CONFIG_AF_RXRPC=m
  7303. +# CONFIG_AF_RXRPC_DEBUG is not set
  7304. +# CONFIG_RXKAD is not set
  7305. +CONFIG_FIB_RULES=y
  7306. +CONFIG_WIRELESS=y
  7307. +CONFIG_CFG80211=y
  7308. +# CONFIG_CFG80211_REG_DEBUG is not set
  7309. +# CONFIG_CFG80211_DEBUGFS is not set
  7310. +CONFIG_WIRELESS_OLD_REGULATORY=y
  7311. +CONFIG_WIRELESS_EXT=y
  7312. +CONFIG_WIRELESS_EXT_SYSFS=y
  7313. +# CONFIG_LIB80211 is not set
  7314. +CONFIG_MAC80211=y
  7315. +CONFIG_MAC80211_DEFAULT_PS=y
  7316. +CONFIG_MAC80211_DEFAULT_PS_VALUE=1
  7317. +
  7318. +#
  7319. +# Rate control algorithm selection
  7320. +#
  7321. +CONFIG_MAC80211_RC_PID=y
  7322. +CONFIG_MAC80211_RC_MINSTREL=y
  7323. +# CONFIG_MAC80211_RC_DEFAULT_PID is not set
  7324. +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
  7325. +CONFIG_MAC80211_RC_DEFAULT="minstrel"
  7326. +# CONFIG_MAC80211_MESH is not set
  7327. +# CONFIG_MAC80211_LEDS is not set
  7328. +# CONFIG_MAC80211_DEBUGFS is not set
  7329. +# CONFIG_MAC80211_DEBUG_MENU is not set
  7330. +# CONFIG_WIMAX is not set
  7331. +# CONFIG_RFKILL is not set
  7332. +# CONFIG_NET_9P is not set
  7333. +
  7334. +#
  7335. +# Device Drivers
  7336. +#
  7337. +
  7338. +#
  7339. +# Generic Driver Options
  7340. +#
  7341. +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  7342. +CONFIG_STANDALONE=y
  7343. +CONFIG_PREVENT_FIRMWARE_BUILD=y
  7344. +CONFIG_FW_LOADER=m
  7345. +CONFIG_FIRMWARE_IN_KERNEL=y
  7346. +CONFIG_EXTRA_FIRMWARE=""
  7347. +# CONFIG_SYS_HYPERVISOR is not set
  7348. +CONFIG_CONNECTOR=m
  7349. +CONFIG_MTD=m
  7350. +# CONFIG_MTD_DEBUG is not set
  7351. +CONFIG_MTD_CONCAT=m
  7352. +CONFIG_MTD_PARTITIONS=y
  7353. +# CONFIG_MTD_TESTS is not set
  7354. +# CONFIG_MTD_REDBOOT_PARTS is not set
  7355. +# CONFIG_MTD_AR7_PARTS is not set
  7356. +
  7357. +#
  7358. +# User Modules And Translation Layers
  7359. +#
  7360. +CONFIG_MTD_CHAR=m
  7361. +CONFIG_MTD_BLKDEVS=m
  7362. +CONFIG_MTD_BLOCK=m
  7363. +# CONFIG_MTD_BLOCK_RO is not set
  7364. +# CONFIG_FTL is not set
  7365. +# CONFIG_NFTL is not set
  7366. +# CONFIG_INFTL is not set
  7367. +# CONFIG_RFD_FTL is not set
  7368. +# CONFIG_SSFDC is not set
  7369. +# CONFIG_MTD_OOPS is not set
  7370. +
  7371. +#
  7372. +# RAM/ROM/Flash chip drivers
  7373. +#
  7374. +CONFIG_MTD_CFI=m
  7375. +CONFIG_MTD_JEDECPROBE=m
  7376. +CONFIG_MTD_GEN_PROBE=m
  7377. +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
  7378. +CONFIG_MTD_MAP_BANK_WIDTH_1=y
  7379. +CONFIG_MTD_MAP_BANK_WIDTH_2=y
  7380. +CONFIG_MTD_MAP_BANK_WIDTH_4=y
  7381. +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
  7382. +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
  7383. +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
  7384. +CONFIG_MTD_CFI_I1=y
  7385. +CONFIG_MTD_CFI_I2=y
  7386. +# CONFIG_MTD_CFI_I4 is not set
  7387. +# CONFIG_MTD_CFI_I8 is not set
  7388. +CONFIG_MTD_CFI_INTELEXT=m
  7389. +CONFIG_MTD_CFI_AMDSTD=m
  7390. +CONFIG_MTD_CFI_STAA=m
  7391. +CONFIG_MTD_CFI_UTIL=m
  7392. +CONFIG_MTD_RAM=m
  7393. +CONFIG_MTD_ROM=m
  7394. +CONFIG_MTD_ABSENT=m
  7395. +
  7396. +#
  7397. +# Mapping drivers for chip access
  7398. +#
  7399. +CONFIG_MTD_COMPLEX_MAPPINGS=y
  7400. +CONFIG_MTD_PHYSMAP=m
  7401. +CONFIG_MTD_PHYSMAP_COMPAT=y
  7402. +CONFIG_MTD_PHYSMAP_START=0x8000000
  7403. +CONFIG_MTD_PHYSMAP_LEN=0
  7404. +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
  7405. +CONFIG_MTD_PCI=m
  7406. +# CONFIG_MTD_INTEL_VR_NOR is not set
  7407. +CONFIG_MTD_PLATRAM=m
  7408. +
  7409. +#
  7410. +# Self-contained MTD device drivers
  7411. +#
  7412. +CONFIG_MTD_PMC551=m
  7413. +# CONFIG_MTD_PMC551_BUGFIX is not set
  7414. +# CONFIG_MTD_PMC551_DEBUG is not set
  7415. +CONFIG_MTD_DATAFLASH=m
  7416. +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
  7417. +# CONFIG_MTD_DATAFLASH_OTP is not set
  7418. +CONFIG_MTD_M25P80=m
  7419. +CONFIG_M25PXX_USE_FAST_READ=y
  7420. +CONFIG_MTD_SLRAM=m
  7421. +CONFIG_MTD_PHRAM=m
  7422. +CONFIG_MTD_MTDRAM=m
  7423. +CONFIG_MTDRAM_TOTAL_SIZE=4096
  7424. +CONFIG_MTDRAM_ERASE_SIZE=128
  7425. +CONFIG_MTD_BLOCK2MTD=m
  7426. +
  7427. +#
  7428. +# Disk-On-Chip Device Drivers
  7429. +#
  7430. +CONFIG_MTD_DOC2000=m
  7431. +CONFIG_MTD_DOC2001=m
  7432. +CONFIG_MTD_DOC2001PLUS=m
  7433. +CONFIG_MTD_DOCPROBE=m
  7434. +CONFIG_MTD_DOCECC=m
  7435. +# CONFIG_MTD_DOCPROBE_ADVANCED is not set
  7436. +CONFIG_MTD_DOCPROBE_ADDRESS=0
  7437. +# CONFIG_MTD_NAND is not set
  7438. +CONFIG_MTD_NAND_IDS=m
  7439. +# CONFIG_MTD_ONENAND is not set
  7440. +
  7441. +#
  7442. +# LPDDR flash memory drivers
  7443. +#
  7444. +# CONFIG_MTD_LPDDR is not set
  7445. +
  7446. +#
  7447. +# UBI - Unsorted block images
  7448. +#
  7449. +# CONFIG_MTD_UBI is not set
  7450. +# CONFIG_PARPORT is not set
  7451. +CONFIG_PNP=y
  7452. +CONFIG_PNP_DEBUG_MESSAGES=y
  7453. +
  7454. +#
  7455. +# Protocols
  7456. +#
  7457. +CONFIG_ISAPNP=y
  7458. +# CONFIG_PNPACPI is not set
  7459. +CONFIG_BLK_DEV=y
  7460. +# CONFIG_BLK_CPQ_DA is not set
  7461. +# CONFIG_BLK_CPQ_CISS_DA is not set
  7462. +# CONFIG_BLK_DEV_DAC960 is not set
  7463. +# CONFIG_BLK_DEV_UMEM is not set
  7464. +# CONFIG_BLK_DEV_COW_COMMON is not set
  7465. +CONFIG_BLK_DEV_LOOP=y
  7466. +CONFIG_BLK_DEV_CRYPTOLOOP=m
  7467. +CONFIG_BLK_DEV_NBD=m
  7468. +# CONFIG_BLK_DEV_SX8 is not set
  7469. +# CONFIG_BLK_DEV_UB is not set
  7470. +CONFIG_BLK_DEV_RAM=y
  7471. +CONFIG_BLK_DEV_RAM_COUNT=16
  7472. +CONFIG_BLK_DEV_RAM_SIZE=8192
  7473. +# CONFIG_BLK_DEV_XIP is not set
  7474. +CONFIG_CDROM_PKTCDVD=m
  7475. +CONFIG_CDROM_PKTCDVD_BUFFERS=8
  7476. +# CONFIG_CDROM_PKTCDVD_WCACHE is not set
  7477. +CONFIG_ATA_OVER_ETH=m
  7478. +# CONFIG_BLK_DEV_HD is not set
  7479. +CONFIG_MISC_DEVICES=y
  7480. +# CONFIG_PHANTOM is not set
  7481. +# CONFIG_SGI_IOC4 is not set
  7482. +# CONFIG_TIFM_CORE is not set
  7483. +# CONFIG_ICS932S401 is not set
  7484. +# CONFIG_ENCLOSURE_SERVICES is not set
  7485. +# CONFIG_HP_ILO is not set
  7486. +# CONFIG_ISL29003 is not set
  7487. +# CONFIG_C2PORT is not set
  7488. +
  7489. +#
  7490. +# EEPROM support
  7491. +#
  7492. +# CONFIG_EEPROM_AT24 is not set
  7493. +# CONFIG_EEPROM_AT25 is not set
  7494. +# CONFIG_EEPROM_LEGACY is not set
  7495. +# CONFIG_EEPROM_MAX6875 is not set
  7496. +CONFIG_EEPROM_93CX6=y
  7497. +# CONFIG_CB710_CORE is not set
  7498. +CONFIG_HAVE_IDE=y
  7499. +CONFIG_IDE=y
  7500. +
  7501. +#
  7502. +# Please see Documentation/ide/ide.txt for help/info on IDE drives
  7503. +#
  7504. +CONFIG_IDE_XFER_MODE=y
  7505. +CONFIG_IDE_TIMINGS=y
  7506. +CONFIG_IDE_ATAPI=y
  7507. +# CONFIG_BLK_DEV_IDE_SATA is not set
  7508. +CONFIG_IDE_GD=y
  7509. +CONFIG_IDE_GD_ATA=y
  7510. +# CONFIG_IDE_GD_ATAPI is not set
  7511. +CONFIG_BLK_DEV_IDECD=m
  7512. +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
  7513. +# CONFIG_BLK_DEV_IDETAPE is not set
  7514. +CONFIG_IDE_TASK_IOCTL=y
  7515. +CONFIG_IDE_PROC_FS=y
  7516. +
  7517. +#
  7518. +# IDE chipset support/bugfixes
  7519. +#
  7520. +# CONFIG_IDE_GENERIC is not set
  7521. +# CONFIG_BLK_DEV_PLATFORM is not set
  7522. +# CONFIG_BLK_DEV_IDEPNP is not set
  7523. +CONFIG_BLK_DEV_IDEDMA_SFF=y
  7524. +
  7525. +#
  7526. +# PCI IDE chipsets support
  7527. +#
  7528. +CONFIG_BLK_DEV_IDEPCI=y
  7529. +# CONFIG_IDEPCI_PCIBUS_ORDER is not set
  7530. +# CONFIG_BLK_DEV_OFFBOARD is not set
  7531. +CONFIG_BLK_DEV_GENERIC=y
  7532. +# CONFIG_BLK_DEV_OPTI621 is not set
  7533. +CONFIG_BLK_DEV_IDEDMA_PCI=y
  7534. +# CONFIG_BLK_DEV_AEC62XX is not set
  7535. +# CONFIG_BLK_DEV_ALI15X3 is not set
  7536. +CONFIG_BLK_DEV_AMD74XX=y
  7537. +# CONFIG_BLK_DEV_CMD64X is not set
  7538. +# CONFIG_BLK_DEV_TRIFLEX is not set
  7539. +# CONFIG_BLK_DEV_CS5520 is not set
  7540. +# CONFIG_BLK_DEV_CS5530 is not set
  7541. +# CONFIG_BLK_DEV_HPT366 is not set
  7542. +# CONFIG_BLK_DEV_JMICRON is not set
  7543. +# CONFIG_BLK_DEV_SC1200 is not set
  7544. +# CONFIG_BLK_DEV_PIIX is not set
  7545. +# CONFIG_BLK_DEV_IT8172 is not set
  7546. +# CONFIG_BLK_DEV_IT8213 is not set
  7547. +# CONFIG_BLK_DEV_IT821X is not set
  7548. +# CONFIG_BLK_DEV_NS87415 is not set
  7549. +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
  7550. +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
  7551. +# CONFIG_BLK_DEV_SVWKS is not set
  7552. +# CONFIG_BLK_DEV_SIIMAGE is not set
  7553. +# CONFIG_BLK_DEV_SLC90E66 is not set
  7554. +# CONFIG_BLK_DEV_TRM290 is not set
  7555. +# CONFIG_BLK_DEV_VIA82CXXX is not set
  7556. +# CONFIG_BLK_DEV_TC86C001 is not set
  7557. +
  7558. +#
  7559. +# Other IDE chipsets support
  7560. +#
  7561. +
  7562. +#
  7563. +# Note: most of these also require special kernel boot parameters
  7564. +#
  7565. +# CONFIG_BLK_DEV_4DRIVES is not set
  7566. +# CONFIG_BLK_DEV_ALI14XX is not set
  7567. +# CONFIG_BLK_DEV_DTC2278 is not set
  7568. +# CONFIG_BLK_DEV_HT6560B is not set
  7569. +# CONFIG_BLK_DEV_QD65XX is not set
  7570. +# CONFIG_BLK_DEV_UMC8672 is not set
  7571. +CONFIG_BLK_DEV_IDEDMA=y
  7572. +
  7573. +#
  7574. +# SCSI device support
  7575. +#
  7576. +CONFIG_RAID_ATTRS=m
  7577. +CONFIG_SCSI=y
  7578. +CONFIG_SCSI_DMA=y
  7579. +# CONFIG_SCSI_TGT is not set
  7580. +CONFIG_SCSI_NETLINK=y
  7581. +CONFIG_SCSI_PROC_FS=y
  7582. +
  7583. +#
  7584. +# SCSI support type (disk, tape, CD-ROM)
  7585. +#
  7586. +CONFIG_BLK_DEV_SD=y
  7587. +# CONFIG_CHR_DEV_ST is not set
  7588. +# CONFIG_CHR_DEV_OSST is not set
  7589. +CONFIG_BLK_DEV_SR=m
  7590. +CONFIG_BLK_DEV_SR_VENDOR=y
  7591. +CONFIG_CHR_DEV_SG=m
  7592. +# CONFIG_CHR_DEV_SCH is not set
  7593. +CONFIG_SCSI_MULTI_LUN=y
  7594. +CONFIG_SCSI_CONSTANTS=y
  7595. +CONFIG_SCSI_LOGGING=y
  7596. +# CONFIG_SCSI_SCAN_ASYNC is not set
  7597. +CONFIG_SCSI_WAIT_SCAN=m
  7598. +
  7599. +#
  7600. +# SCSI Transports
  7601. +#
  7602. +CONFIG_SCSI_SPI_ATTRS=m
  7603. +CONFIG_SCSI_FC_ATTRS=m
  7604. +CONFIG_SCSI_ISCSI_ATTRS=m
  7605. +# CONFIG_SCSI_SAS_LIBSAS is not set
  7606. +CONFIG_SCSI_SRP_ATTRS=m
  7607. +# CONFIG_SCSI_LOWLEVEL is not set
  7608. +# CONFIG_SCSI_DH is not set
  7609. +# CONFIG_SCSI_OSD_INITIATOR is not set
  7610. +# CONFIG_ATA is not set
  7611. +CONFIG_MD=y
  7612. +CONFIG_BLK_DEV_MD=m
  7613. +CONFIG_MD_LINEAR=m
  7614. +CONFIG_MD_RAID0=m
  7615. +CONFIG_MD_RAID1=m
  7616. +CONFIG_MD_RAID10=m
  7617. +CONFIG_MD_RAID456=m
  7618. +CONFIG_MD_RAID6_PQ=m
  7619. +CONFIG_MD_MULTIPATH=m
  7620. +CONFIG_MD_FAULTY=m
  7621. +CONFIG_BLK_DEV_DM=m
  7622. +# CONFIG_DM_DEBUG is not set
  7623. +CONFIG_DM_CRYPT=m
  7624. +CONFIG_DM_SNAPSHOT=m
  7625. +CONFIG_DM_MIRROR=m
  7626. +# CONFIG_DM_LOG_USERSPACE is not set
  7627. +CONFIG_DM_ZERO=m
  7628. +CONFIG_DM_MULTIPATH=m
  7629. +# CONFIG_DM_MULTIPATH_QL is not set
  7630. +# CONFIG_DM_MULTIPATH_ST is not set
  7631. +# CONFIG_DM_DELAY is not set
  7632. +# CONFIG_DM_UEVENT is not set
  7633. +# CONFIG_FUSION is not set
  7634. +
  7635. +#
  7636. +# IEEE 1394 (FireWire) support
  7637. +#
  7638. +
  7639. +#
  7640. +# You can enable one or both FireWire driver stacks.
  7641. +#
  7642. +
  7643. +#
  7644. +# See the help texts for more information.
  7645. +#
  7646. +# CONFIG_FIREWIRE is not set
  7647. +# CONFIG_IEEE1394 is not set
  7648. +# CONFIG_I2O is not set
  7649. +CONFIG_NETDEVICES=y
  7650. +CONFIG_IFB=m
  7651. +CONFIG_DUMMY=m
  7652. +# CONFIG_BONDING is not set
  7653. +CONFIG_MACVLAN=m
  7654. +# CONFIG_EQUALIZER is not set
  7655. +CONFIG_TUN=m
  7656. +CONFIG_VETH=m
  7657. +# CONFIG_NET_SB1000 is not set
  7658. +# CONFIG_ARCNET is not set
  7659. +CONFIG_PHYLIB=m
  7660. +
  7661. +#
  7662. +# MII PHY device drivers
  7663. +#
  7664. +CONFIG_MARVELL_PHY=m
  7665. +CONFIG_DAVICOM_PHY=m
  7666. +CONFIG_QSEMI_PHY=m
  7667. +CONFIG_LXT_PHY=m
  7668. +CONFIG_CICADA_PHY=m
  7669. +CONFIG_VITESSE_PHY=m
  7670. +CONFIG_SMSC_PHY=m
  7671. +# CONFIG_BROADCOM_PHY is not set
  7672. +# CONFIG_ICPLUS_PHY is not set
  7673. +CONFIG_REALTEK_PHY=m
  7674. +# CONFIG_NATIONAL_PHY is not set
  7675. +# CONFIG_STE10XP is not set
  7676. +# CONFIG_LSI_ET1011C_PHY is not set
  7677. +# CONFIG_MDIO_BITBANG is not set
  7678. +CONFIG_NET_ETHERNET=y
  7679. +CONFIG_MII=y
  7680. +# CONFIG_AX88796 is not set
  7681. +# CONFIG_HAPPYMEAL is not set
  7682. +# CONFIG_SUNGEM is not set
  7683. +# CONFIG_CASSINI is not set
  7684. +# CONFIG_NET_VENDOR_3COM is not set
  7685. +# CONFIG_NET_VENDOR_SMC is not set
  7686. +# CONFIG_SMC91X is not set
  7687. +# CONFIG_DM9000 is not set
  7688. +# CONFIG_ENC28J60 is not set
  7689. +# CONFIG_ETHOC is not set
  7690. +# CONFIG_NET_VENDOR_RACAL is not set
  7691. +# CONFIG_DNET is not set
  7692. +# CONFIG_NET_TULIP is not set
  7693. +# CONFIG_AT1700 is not set
  7694. +# CONFIG_DEPCA is not set
  7695. +# CONFIG_HP100 is not set
  7696. +# CONFIG_NET_ISA is not set
  7697. +# CONFIG_IBM_NEW_EMAC_ZMII is not set
  7698. +# CONFIG_IBM_NEW_EMAC_RGMII is not set
  7699. +# CONFIG_IBM_NEW_EMAC_TAH is not set
  7700. +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
  7701. +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
  7702. +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
  7703. +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
  7704. +CONFIG_NET_PCI=y
  7705. +# CONFIG_PCNET32 is not set
  7706. +# CONFIG_AMD8111_ETH is not set
  7707. +# CONFIG_ADAPTEC_STARFIRE is not set
  7708. +# CONFIG_AC3200 is not set
  7709. +# CONFIG_APRICOT is not set
  7710. +# CONFIG_B44 is not set
  7711. +# CONFIG_FORCEDETH is not set
  7712. +# CONFIG_CS89x0 is not set
  7713. +# CONFIG_TC35815 is not set
  7714. +# CONFIG_E100 is not set
  7715. +# CONFIG_FEALNX is not set
  7716. +# CONFIG_NATSEMI is not set
  7717. +# CONFIG_NE2K_PCI is not set
  7718. +CONFIG_8139CP=m
  7719. +CONFIG_8139TOO=y
  7720. +# CONFIG_8139TOO_PIO is not set
  7721. +CONFIG_8139TOO_TUNE_TWISTER=y
  7722. +# CONFIG_8139TOO_8129 is not set
  7723. +# CONFIG_8139_OLD_RX_RESET is not set
  7724. +# CONFIG_R6040 is not set
  7725. +# CONFIG_SIS900 is not set
  7726. +# CONFIG_EPIC100 is not set
  7727. +# CONFIG_SMSC9420 is not set
  7728. +# CONFIG_SUNDANCE is not set
  7729. +# CONFIG_TLAN is not set
  7730. +# CONFIG_KS8842 is not set
  7731. +# CONFIG_VIA_RHINE is not set
  7732. +# CONFIG_SC92031 is not set
  7733. +# CONFIG_ATL2 is not set
  7734. +# CONFIG_NETDEV_1000 is not set
  7735. +# CONFIG_NETDEV_10000 is not set
  7736. +# CONFIG_TR is not set
  7737. +
  7738. +#
  7739. +# Wireless LAN
  7740. +#
  7741. +# CONFIG_WLAN_PRE80211 is not set
  7742. +CONFIG_WLAN_80211=y
  7743. +# CONFIG_LIBERTAS is not set
  7744. +# CONFIG_LIBERTAS_THINFIRM is not set
  7745. +# CONFIG_ATMEL is not set
  7746. +# CONFIG_AT76C50X_USB is not set
  7747. +# CONFIG_PRISM54 is not set
  7748. +# CONFIG_USB_ZD1201 is not set
  7749. +# CONFIG_USB_NET_RNDIS_WLAN is not set
  7750. +# CONFIG_RTL8180 is not set
  7751. +CONFIG_RTL8187B=y
  7752. +# CONFIG_ADM8211 is not set
  7753. +# CONFIG_MAC80211_HWSIM is not set
  7754. +# CONFIG_MWL8K is not set
  7755. +# CONFIG_P54_COMMON is not set
  7756. +# CONFIG_ATH5K is not set
  7757. +# CONFIG_ATH9K is not set
  7758. +# CONFIG_AR9170_USB is not set
  7759. +# CONFIG_IPW2100 is not set
  7760. +# CONFIG_IPW2200 is not set
  7761. +# CONFIG_IWLWIFI is not set
  7762. +# CONFIG_HOSTAP is not set
  7763. +# CONFIG_B43 is not set
  7764. +# CONFIG_B43LEGACY is not set
  7765. +# CONFIG_ZD1211RW is not set
  7766. +# CONFIG_RT2X00 is not set
  7767. +# CONFIG_HERMES is not set
  7768. +# CONFIG_WL12XX is not set
  7769. +# CONFIG_IWM is not set
  7770. +
  7771. +#
  7772. +# Enable WiMAX (Networking options) to see the WiMAX drivers
  7773. +#
  7774. +
  7775. +#
  7776. +# USB Network Adapters
  7777. +#
  7778. +CONFIG_USB_CATC=m
  7779. +CONFIG_USB_KAWETH=m
  7780. +CONFIG_USB_PEGASUS=m
  7781. +CONFIG_USB_RTL8150=m
  7782. +CONFIG_USB_USBNET=m
  7783. +CONFIG_USB_NET_AX8817X=m
  7784. +CONFIG_USB_NET_CDCETHER=m
  7785. +# CONFIG_USB_NET_CDC_EEM is not set
  7786. +# CONFIG_USB_NET_DM9601 is not set
  7787. +# CONFIG_USB_NET_SMSC95XX is not set
  7788. +CONFIG_USB_NET_GL620A=m
  7789. +CONFIG_USB_NET_NET1080=m
  7790. +CONFIG_USB_NET_PLUSB=m
  7791. +# CONFIG_USB_NET_MCS7830 is not set
  7792. +CONFIG_USB_NET_RNDIS_HOST=m
  7793. +CONFIG_USB_NET_CDC_SUBSET=m
  7794. +CONFIG_USB_ALI_M5632=y
  7795. +CONFIG_USB_AN2720=y
  7796. +CONFIG_USB_BELKIN=y
  7797. +CONFIG_USB_ARMLINUX=y
  7798. +CONFIG_USB_EPSON2888=y
  7799. +# CONFIG_USB_KC2190 is not set
  7800. +CONFIG_USB_NET_ZAURUS=m
  7801. +# CONFIG_USB_NET_INT51X1 is not set
  7802. +# CONFIG_WAN is not set
  7803. +# CONFIG_ATM_DRIVERS is not set
  7804. +# CONFIG_FDDI is not set
  7805. +# CONFIG_HIPPI is not set
  7806. +CONFIG_PPP=m
  7807. +CONFIG_PPP_MULTILINK=y
  7808. +CONFIG_PPP_FILTER=y
  7809. +CONFIG_PPP_ASYNC=m
  7810. +CONFIG_PPP_SYNC_TTY=m
  7811. +CONFIG_PPP_DEFLATE=m
  7812. +CONFIG_PPP_BSDCOMP=m
  7813. +CONFIG_PPP_MPPE=m
  7814. +CONFIG_PPPOE=m
  7815. +CONFIG_PPPOATM=m
  7816. +# CONFIG_PPPOL2TP is not set
  7817. +# CONFIG_SLIP is not set
  7818. +CONFIG_SLHC=m
  7819. +# CONFIG_NET_FC is not set
  7820. +CONFIG_NETCONSOLE=y
  7821. +# CONFIG_NETCONSOLE_DYNAMIC is not set
  7822. +CONFIG_NETPOLL=y
  7823. +# CONFIG_NETPOLL_TRAP is not set
  7824. +CONFIG_NET_POLL_CONTROLLER=y
  7825. +# CONFIG_ISDN is not set
  7826. +# CONFIG_PHONE is not set
  7827. +
  7828. +#
  7829. +# Input device support
  7830. +#
  7831. +CONFIG_INPUT=y
  7832. +# CONFIG_INPUT_FF_MEMLESS is not set
  7833. +# CONFIG_INPUT_POLLDEV is not set
  7834. +
  7835. +#
  7836. +# Userland interfaces
  7837. +#
  7838. +CONFIG_INPUT_MOUSEDEV=y
  7839. +CONFIG_INPUT_MOUSEDEV_PSAUX=y
  7840. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
  7841. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
  7842. +CONFIG_INPUT_JOYDEV=m
  7843. +CONFIG_INPUT_EVDEV=m
  7844. +# CONFIG_INPUT_EVBUG is not set
  7845. +
  7846. +#
  7847. +# Input Device Drivers
  7848. +#
  7849. +CONFIG_INPUT_KEYBOARD=y
  7850. +CONFIG_KEYBOARD_ATKBD=y
  7851. +CONFIG_KEYBOARD_SUNKBD=m
  7852. +CONFIG_KEYBOARD_LKKBD=m
  7853. +CONFIG_KEYBOARD_XTKBD=m
  7854. +CONFIG_KEYBOARD_NEWTON=m
  7855. +# CONFIG_KEYBOARD_STOWAWAY is not set
  7856. +# CONFIG_KEYBOARD_LM8323 is not set
  7857. +CONFIG_INPUT_MOUSE=y
  7858. +CONFIG_MOUSE_PS2=y
  7859. +CONFIG_MOUSE_PS2_ALPS=y
  7860. +CONFIG_MOUSE_PS2_LOGIPS2PP=y
  7861. +CONFIG_MOUSE_PS2_SYNAPTICS=y
  7862. +CONFIG_MOUSE_PS2_TRACKPOINT=y
  7863. +# CONFIG_MOUSE_PS2_ELANTECH is not set
  7864. +# CONFIG_MOUSE_PS2_TOUCHKIT is not set
  7865. +CONFIG_MOUSE_SERIAL=m
  7866. +# CONFIG_MOUSE_APPLETOUCH is not set
  7867. +# CONFIG_MOUSE_BCM5974 is not set
  7868. +CONFIG_MOUSE_INPORT=m
  7869. +# CONFIG_MOUSE_ATIXL is not set
  7870. +CONFIG_MOUSE_LOGIBM=m
  7871. +CONFIG_MOUSE_PC110PAD=m
  7872. +CONFIG_MOUSE_VSXXXAA=m
  7873. +# CONFIG_MOUSE_SYNAPTICS_I2C is not set
  7874. +# CONFIG_INPUT_JOYSTICK is not set
  7875. +# CONFIG_INPUT_TABLET is not set
  7876. +# CONFIG_INPUT_TOUCHSCREEN is not set
  7877. +CONFIG_INPUT_MISC=y
  7878. +CONFIG_INPUT_PCSPKR=m
  7879. +# CONFIG_INPUT_ATI_REMOTE is not set
  7880. +# CONFIG_INPUT_ATI_REMOTE2 is not set
  7881. +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
  7882. +# CONFIG_INPUT_POWERMATE is not set
  7883. +# CONFIG_INPUT_YEALINK is not set
  7884. +# CONFIG_INPUT_CM109 is not set
  7885. +CONFIG_INPUT_UINPUT=m
  7886. +
  7887. +#
  7888. +# Hardware I/O ports
  7889. +#
  7890. +CONFIG_SERIO=y
  7891. +CONFIG_SERIO_I8042=y
  7892. +CONFIG_SERIO_SERPORT=m
  7893. +CONFIG_SERIO_PCIPS2=m
  7894. +CONFIG_SERIO_LIBPS2=y
  7895. +CONFIG_SERIO_RAW=m
  7896. +CONFIG_GAMEPORT=m
  7897. +CONFIG_GAMEPORT_NS558=m
  7898. +CONFIG_GAMEPORT_L4=m
  7899. +CONFIG_GAMEPORT_EMU10K1=m
  7900. +CONFIG_GAMEPORT_FM801=m
  7901. +
  7902. +#
  7903. +# Character devices
  7904. +#
  7905. +CONFIG_VT=y
  7906. +CONFIG_CONSOLE_TRANSLATIONS=y
  7907. +CONFIG_VT_CONSOLE=y
  7908. +CONFIG_HW_CONSOLE=y
  7909. +# CONFIG_VT_HW_CONSOLE_BINDING is not set
  7910. +CONFIG_DEVKMEM=y
  7911. +CONFIG_SERIAL_NONSTANDARD=y
  7912. +# CONFIG_COMPUTONE is not set
  7913. +# CONFIG_ROCKETPORT is not set
  7914. +# CONFIG_CYCLADES is not set
  7915. +# CONFIG_DIGIEPCA is not set
  7916. +# CONFIG_MOXA_INTELLIO is not set
  7917. +# CONFIG_MOXA_SMARTIO is not set
  7918. +# CONFIG_ISI is not set
  7919. +# CONFIG_SYNCLINKMP is not set
  7920. +# CONFIG_SYNCLINK_GT is not set
  7921. +# CONFIG_N_HDLC is not set
  7922. +# CONFIG_RISCOM8 is not set
  7923. +# CONFIG_SPECIALIX is not set
  7924. +# CONFIG_SX is not set
  7925. +# CONFIG_RIO is not set
  7926. +CONFIG_STALDRV=y
  7927. +# CONFIG_STALLION is not set
  7928. +# CONFIG_ISTALLION is not set
  7929. +# CONFIG_NOZOMI is not set
  7930. +
  7931. +#
  7932. +# Serial drivers
  7933. +#
  7934. +CONFIG_SERIAL_8250=y
  7935. +CONFIG_SERIAL_8250_CONSOLE=y
  7936. +# CONFIG_SERIAL_8250_PCI is not set
  7937. +# CONFIG_SERIAL_8250_PNP is not set
  7938. +CONFIG_SERIAL_8250_NR_UARTS=16
  7939. +CONFIG_SERIAL_8250_RUNTIME_UARTS=4
  7940. +CONFIG_SERIAL_8250_EXTENDED=y
  7941. +CONFIG_SERIAL_8250_MANY_PORTS=y
  7942. +CONFIG_SERIAL_8250_FOURPORT=y
  7943. +# CONFIG_SERIAL_8250_ACCENT is not set
  7944. +# CONFIG_SERIAL_8250_BOCA is not set
  7945. +# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
  7946. +CONFIG_SERIAL_8250_HUB6=m
  7947. +CONFIG_SERIAL_8250_SHARE_IRQ=y
  7948. +# CONFIG_SERIAL_8250_DETECT_IRQ is not set
  7949. +CONFIG_SERIAL_8250_RSA=y
  7950. +
  7951. +#
  7952. +# Non-8250 serial port support
  7953. +#
  7954. +# CONFIG_SERIAL_MAX3100 is not set
  7955. +CONFIG_SERIAL_CORE=y
  7956. +CONFIG_SERIAL_CORE_CONSOLE=y
  7957. +# CONFIG_SERIAL_JSM is not set
  7958. +CONFIG_UNIX98_PTYS=y
  7959. +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
  7960. +CONFIG_LEGACY_PTYS=y
  7961. +CONFIG_LEGACY_PTY_COUNT=16
  7962. +CONFIG_IPMI_HANDLER=m
  7963. +# CONFIG_IPMI_PANIC_EVENT is not set
  7964. +CONFIG_IPMI_DEVICE_INTERFACE=m
  7965. +CONFIG_IPMI_SI=m
  7966. +CONFIG_IPMI_WATCHDOG=m
  7967. +CONFIG_IPMI_POWEROFF=m
  7968. +CONFIG_HW_RANDOM=y
  7969. +# CONFIG_HW_RANDOM_TIMERIOMEM is not set
  7970. +# CONFIG_DTLK is not set
  7971. +# CONFIG_R3964 is not set
  7972. +# CONFIG_APPLICOM is not set
  7973. +CONFIG_RAW_DRIVER=m
  7974. +CONFIG_MAX_RAW_DEVS=256
  7975. +# CONFIG_TCG_TPM is not set
  7976. +CONFIG_DEVPORT=y
  7977. +CONFIG_I2C=m
  7978. +CONFIG_I2C_BOARDINFO=y
  7979. +CONFIG_I2C_CHARDEV=m
  7980. +CONFIG_I2C_HELPER_AUTO=y
  7981. +CONFIG_I2C_ALGOBIT=m
  7982. +CONFIG_I2C_ALGOPCA=m
  7983. +
  7984. +#
  7985. +# I2C Hardware Bus support
  7986. +#
  7987. +
  7988. +#
  7989. +# PC SMBus host controller drivers
  7990. +#
  7991. +CONFIG_I2C_ALI1535=m
  7992. +CONFIG_I2C_ALI1563=m
  7993. +CONFIG_I2C_ALI15X3=m
  7994. +CONFIG_I2C_AMD756=m
  7995. +CONFIG_I2C_AMD8111=m
  7996. +CONFIG_I2C_I801=m
  7997. +# CONFIG_I2C_ISCH is not set
  7998. +CONFIG_I2C_PIIX4=m
  7999. +CONFIG_I2C_NFORCE2=m
  8000. +CONFIG_I2C_SIS5595=m
  8001. +CONFIG_I2C_SIS630=m
  8002. +CONFIG_I2C_SIS96X=m
  8003. +CONFIG_I2C_VIA=m
  8004. +CONFIG_I2C_VIAPRO=m
  8005. +
  8006. +#
  8007. +# I2C system bus drivers (mostly embedded / system-on-chip)
  8008. +#
  8009. +CONFIG_I2C_OCORES=m
  8010. +# CONFIG_I2C_SIMTEC is not set
  8011. +
  8012. +#
  8013. +# External I2C/SMBus adapter drivers
  8014. +#
  8015. +CONFIG_I2C_PARPORT_LIGHT=m
  8016. +# CONFIG_I2C_TAOS_EVM is not set
  8017. +# CONFIG_I2C_TINY_USB is not set
  8018. +
  8019. +#
  8020. +# Graphics adapter I2C/DDC channel drivers
  8021. +#
  8022. +CONFIG_I2C_VOODOO3=m
  8023. +
  8024. +#
  8025. +# Other I2C/SMBus bus drivers
  8026. +#
  8027. +# CONFIG_I2C_ELEKTOR is not set
  8028. +CONFIG_I2C_PCA_ISA=m
  8029. +# CONFIG_I2C_PCA_PLATFORM is not set
  8030. +CONFIG_I2C_STUB=m
  8031. +
  8032. +#
  8033. +# Miscellaneous I2C Chip support
  8034. +#
  8035. +# CONFIG_DS1682 is not set
  8036. +CONFIG_SENSORS_PCF8574=m
  8037. +# CONFIG_PCF8575 is not set
  8038. +# CONFIG_SENSORS_PCA9539 is not set
  8039. +# CONFIG_SENSORS_TSL2550 is not set
  8040. +# CONFIG_I2C_DEBUG_CORE is not set
  8041. +# CONFIG_I2C_DEBUG_ALGO is not set
  8042. +# CONFIG_I2C_DEBUG_BUS is not set
  8043. +# CONFIG_I2C_DEBUG_CHIP is not set
  8044. +CONFIG_SPI=y
  8045. +CONFIG_SPI_MASTER=y
  8046. +
  8047. +#
  8048. +# SPI Master Controller Drivers
  8049. +#
  8050. +CONFIG_SPI_BITBANG=m
  8051. +
  8052. +#
  8053. +# SPI Protocol Masters
  8054. +#
  8055. +# CONFIG_SPI_SPIDEV is not set
  8056. +# CONFIG_SPI_TLE62X0 is not set
  8057. +
  8058. +#
  8059. +# PPS support
  8060. +#
  8061. +# CONFIG_PPS is not set
  8062. +# CONFIG_W1 is not set
  8063. +# CONFIG_POWER_SUPPLY is not set
  8064. +# CONFIG_HWMON is not set
  8065. +# CONFIG_THERMAL is not set
  8066. +# CONFIG_THERMAL_HWMON is not set
  8067. +CONFIG_WATCHDOG=y
  8068. +# CONFIG_WATCHDOG_NOWAYOUT is not set
  8069. +
  8070. +#
  8071. +# Watchdog Device Drivers
  8072. +#
  8073. +CONFIG_SOFT_WATCHDOG=m
  8074. +# CONFIG_ALIM7101_WDT is not set
  8075. +
  8076. +#
  8077. +# ISA-based Watchdog Cards
  8078. +#
  8079. +# CONFIG_PCWATCHDOG is not set
  8080. +# CONFIG_MIXCOMWD is not set
  8081. +# CONFIG_WDT is not set
  8082. +
  8083. +#
  8084. +# PCI-based Watchdog Cards
  8085. +#
  8086. +# CONFIG_PCIPCWATCHDOG is not set
  8087. +# CONFIG_WDTPCI is not set
  8088. +
  8089. +#
  8090. +# USB-based Watchdog Cards
  8091. +#
  8092. +# CONFIG_USBPCWATCHDOG is not set
  8093. +CONFIG_SSB_POSSIBLE=y
  8094. +
  8095. +#
  8096. +# Sonics Silicon Backplane
  8097. +#
  8098. +# CONFIG_SSB is not set
  8099. +
  8100. +#
  8101. +# Multifunction device drivers
  8102. +#
  8103. +# CONFIG_MFD_CORE is not set
  8104. +# CONFIG_MFD_SM501 is not set
  8105. +# CONFIG_HTC_PASIC3 is not set
  8106. +# CONFIG_MFD_TMIO is not set
  8107. +# CONFIG_MFD_WM8400 is not set
  8108. +# CONFIG_MFD_WM8350_I2C is not set
  8109. +# CONFIG_MFD_PCF50633 is not set
  8110. +# CONFIG_AB3100_CORE is not set
  8111. +# CONFIG_EZX_PCAP is not set
  8112. +# CONFIG_REGULATOR is not set
  8113. +# CONFIG_MEDIA_SUPPORT is not set
  8114. +
  8115. +#
  8116. +# Graphics support
  8117. +#
  8118. +CONFIG_DRM=m
  8119. +CONFIG_DRM_TDFX=m
  8120. +CONFIG_DRM_R128=m
  8121. +CONFIG_DRM_RADEON=m
  8122. +CONFIG_DRM_MGA=m
  8123. +CONFIG_DRM_VIA=m
  8124. +CONFIG_DRM_SAVAGE=m
  8125. +# CONFIG_VGASTATE is not set
  8126. +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
  8127. +CONFIG_FB=y
  8128. +CONFIG_FIRMWARE_EDID=y
  8129. +# CONFIG_FB_DDC is not set
  8130. +# CONFIG_FB_BOOT_VESA_SUPPORT is not set
  8131. +CONFIG_FB_CFB_FILLRECT=y
  8132. +CONFIG_FB_CFB_COPYAREA=y
  8133. +CONFIG_FB_CFB_IMAGEBLIT=y
  8134. +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
  8135. +CONFIG_FB_SYS_FILLRECT=m
  8136. +CONFIG_FB_SYS_COPYAREA=m
  8137. +CONFIG_FB_SYS_IMAGEBLIT=m
  8138. +# CONFIG_FB_FOREIGN_ENDIAN is not set
  8139. +CONFIG_FB_SYS_FOPS=m
  8140. +# CONFIG_FB_SVGALIB is not set
  8141. +# CONFIG_FB_MACMODES is not set
  8142. +# CONFIG_FB_BACKLIGHT is not set
  8143. +CONFIG_FB_MODE_HELPERS=y
  8144. +CONFIG_FB_TILEBLITTING=y
  8145. +
  8146. +#
  8147. +# Frame buffer hardware drivers
  8148. +#
  8149. +# CONFIG_FB_CIRRUS is not set
  8150. +# CONFIG_FB_PM2 is not set
  8151. +# CONFIG_FB_CYBER2000 is not set
  8152. +# CONFIG_FB_ASILIANT is not set
  8153. +# CONFIG_FB_IMSTT is not set
  8154. +# CONFIG_FB_UVESA is not set
  8155. +# CONFIG_FB_S1D13XXX is not set
  8156. +# CONFIG_FB_NVIDIA is not set
  8157. +# CONFIG_FB_RIVA is not set
  8158. +# CONFIG_FB_MATROX is not set
  8159. +# CONFIG_FB_RADEON is not set
  8160. +# CONFIG_FB_ATY128 is not set
  8161. +# CONFIG_FB_ATY is not set
  8162. +# CONFIG_FB_S3 is not set
  8163. +# CONFIG_FB_SAVAGE is not set
  8164. +# CONFIG_FB_SIS is not set
  8165. +# CONFIG_FB_VIA is not set
  8166. +# CONFIG_FB_NEOMAGIC is not set
  8167. +# CONFIG_FB_KYRO is not set
  8168. +# CONFIG_FB_3DFX is not set
  8169. +# CONFIG_FB_VOODOO1 is not set
  8170. +# CONFIG_FB_VT8623 is not set
  8171. +# CONFIG_FB_TRIDENT is not set
  8172. +# CONFIG_FB_ARK is not set
  8173. +# CONFIG_FB_PM3 is not set
  8174. +# CONFIG_FB_CARMINE is not set
  8175. +CONFIG_FB_SM7XX=y
  8176. +CONFIG_FB_SM7XX_ACCEL=y
  8177. +# CONFIG_FB_SM7XX_DUALHEAD is not set
  8178. +CONFIG_FB_VIRTUAL=m
  8179. +# CONFIG_FB_METRONOME is not set
  8180. +# CONFIG_FB_MB862XX is not set
  8181. +# CONFIG_FB_BROADSHEET is not set
  8182. +CONFIG_BACKLIGHT_LCD_SUPPORT=y
  8183. +# CONFIG_LCD_CLASS_DEVICE is not set
  8184. +CONFIG_BACKLIGHT_CLASS_DEVICE=y
  8185. +CONFIG_BACKLIGHT_GENERIC=y
  8186. +
  8187. +#
  8188. +# Display device support
  8189. +#
  8190. +# CONFIG_DISPLAY_SUPPORT is not set
  8191. +
  8192. +#
  8193. +# Console display driver support
  8194. +#
  8195. +# CONFIG_VGA_CONSOLE is not set
  8196. +# CONFIG_MDA_CONSOLE is not set
  8197. +CONFIG_DUMMY_CONSOLE=y
  8198. +CONFIG_FRAMEBUFFER_CONSOLE=y
  8199. +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
  8200. +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
  8201. +# CONFIG_FONTS is not set
  8202. +CONFIG_FONT_8x8=y
  8203. +CONFIG_FONT_8x16=y
  8204. +# CONFIG_LOGO is not set
  8205. +CONFIG_SOUND=y
  8206. +CONFIG_SOUND_OSS_CORE=y
  8207. +CONFIG_SND=y
  8208. +CONFIG_SND_TIMER=y
  8209. +CONFIG_SND_PCM=y
  8210. +CONFIG_SND_RAWMIDI=m
  8211. +CONFIG_SND_SEQUENCER=m
  8212. +CONFIG_SND_SEQ_DUMMY=m
  8213. +CONFIG_SND_OSSEMUL=y
  8214. +CONFIG_SND_MIXER_OSS=m
  8215. +CONFIG_SND_PCM_OSS=m
  8216. +CONFIG_SND_PCM_OSS_PLUGINS=y
  8217. +CONFIG_SND_SEQUENCER_OSS=y
  8218. +# CONFIG_SND_HRTIMER is not set
  8219. +# CONFIG_SND_DYNAMIC_MINORS is not set
  8220. +CONFIG_SND_SUPPORT_OLD_API=y
  8221. +CONFIG_SND_VERBOSE_PROCFS=y
  8222. +# CONFIG_SND_VERBOSE_PRINTK is not set
  8223. +# CONFIG_SND_DEBUG is not set
  8224. +CONFIG_SND_VMASTER=y
  8225. +CONFIG_SND_RAWMIDI_SEQ=m
  8226. +# CONFIG_SND_OPL3_LIB_SEQ is not set
  8227. +# CONFIG_SND_OPL4_LIB_SEQ is not set
  8228. +# CONFIG_SND_SBAWE_SEQ is not set
  8229. +# CONFIG_SND_EMU10K1_SEQ is not set
  8230. +CONFIG_SND_AC97_CODEC=y
  8231. +CONFIG_SND_DRIVERS=y
  8232. +CONFIG_SND_DUMMY=m
  8233. +# CONFIG_SND_VIRMIDI is not set
  8234. +CONFIG_SND_MTPAV=m
  8235. +# CONFIG_SND_SERIAL_U16550 is not set
  8236. +# CONFIG_SND_MPU401 is not set
  8237. +# CONFIG_SND_AC97_POWER_SAVE is not set
  8238. +CONFIG_SND_PCI=y
  8239. +# CONFIG_SND_AD1889 is not set
  8240. +# CONFIG_SND_ALS300 is not set
  8241. +# CONFIG_SND_ALI5451 is not set
  8242. +# CONFIG_SND_ATIIXP is not set
  8243. +# CONFIG_SND_ATIIXP_MODEM is not set
  8244. +# CONFIG_SND_AU8810 is not set
  8245. +# CONFIG_SND_AU8820 is not set
  8246. +# CONFIG_SND_AU8830 is not set
  8247. +# CONFIG_SND_AW2 is not set
  8248. +# CONFIG_SND_AZT3328 is not set
  8249. +# CONFIG_SND_BT87X is not set
  8250. +# CONFIG_SND_CA0106 is not set
  8251. +# CONFIG_SND_CMIPCI is not set
  8252. +# CONFIG_SND_OXYGEN is not set
  8253. +# CONFIG_SND_CS4281 is not set
  8254. +# CONFIG_SND_CS46XX is not set
  8255. +CONFIG_SND_CS5535AUDIO=y
  8256. +# CONFIG_SND_CTXFI is not set
  8257. +# CONFIG_SND_DARLA20 is not set
  8258. +# CONFIG_SND_GINA20 is not set
  8259. +# CONFIG_SND_LAYLA20 is not set
  8260. +# CONFIG_SND_DARLA24 is not set
  8261. +# CONFIG_SND_GINA24 is not set
  8262. +# CONFIG_SND_LAYLA24 is not set
  8263. +# CONFIG_SND_MONA is not set
  8264. +# CONFIG_SND_MIA is not set
  8265. +# CONFIG_SND_ECHO3G is not set
  8266. +# CONFIG_SND_INDIGO is not set
  8267. +# CONFIG_SND_INDIGOIO is not set
  8268. +# CONFIG_SND_INDIGODJ is not set
  8269. +# CONFIG_SND_INDIGOIOX is not set
  8270. +# CONFIG_SND_INDIGODJX is not set
  8271. +# CONFIG_SND_EMU10K1 is not set
  8272. +# CONFIG_SND_EMU10K1X is not set
  8273. +# CONFIG_SND_ENS1370 is not set
  8274. +# CONFIG_SND_ENS1371 is not set
  8275. +# CONFIG_SND_ES1938 is not set
  8276. +# CONFIG_SND_ES1968 is not set
  8277. +# CONFIG_SND_FM801 is not set
  8278. +# CONFIG_SND_HDA_INTEL is not set
  8279. +# CONFIG_SND_HDSP is not set
  8280. +# CONFIG_SND_HDSPM is not set
  8281. +# CONFIG_SND_HIFIER is not set
  8282. +# CONFIG_SND_ICE1712 is not set
  8283. +# CONFIG_SND_ICE1724 is not set
  8284. +# CONFIG_SND_INTEL8X0 is not set
  8285. +# CONFIG_SND_INTEL8X0M is not set
  8286. +# CONFIG_SND_KORG1212 is not set
  8287. +# CONFIG_SND_LX6464ES is not set
  8288. +# CONFIG_SND_MAESTRO3 is not set
  8289. +# CONFIG_SND_MIXART is not set
  8290. +# CONFIG_SND_NM256 is not set
  8291. +# CONFIG_SND_PCXHR is not set
  8292. +# CONFIG_SND_RIPTIDE is not set
  8293. +# CONFIG_SND_RME32 is not set
  8294. +# CONFIG_SND_RME96 is not set
  8295. +# CONFIG_SND_RME9652 is not set
  8296. +# CONFIG_SND_SONICVIBES is not set
  8297. +# CONFIG_SND_TRIDENT is not set
  8298. +# CONFIG_SND_VIA82XX is not set
  8299. +# CONFIG_SND_VIA82XX_MODEM is not set
  8300. +# CONFIG_SND_VIRTUOSO is not set
  8301. +# CONFIG_SND_VX222 is not set
  8302. +# CONFIG_SND_YMFPCI is not set
  8303. +# CONFIG_SND_SPI is not set
  8304. +# CONFIG_SND_MIPS is not set
  8305. +# CONFIG_SND_USB is not set
  8306. +# CONFIG_SND_SOC is not set
  8307. +# CONFIG_SOUND_PRIME is not set
  8308. +CONFIG_AC97_BUS=y
  8309. +CONFIG_HID_SUPPORT=y
  8310. +CONFIG_HID=y
  8311. +# CONFIG_HID_DEBUG is not set
  8312. +CONFIG_HIDRAW=y
  8313. +
  8314. +#
  8315. +# USB Input Devices
  8316. +#
  8317. +CONFIG_USB_HID=y
  8318. +# CONFIG_HID_PID is not set
  8319. +CONFIG_USB_HIDDEV=y
  8320. +
  8321. +#
  8322. +# Special HID drivers
  8323. +#
  8324. +# CONFIG_HID_A4TECH is not set
  8325. +# CONFIG_HID_APPLE is not set
  8326. +# CONFIG_HID_BELKIN is not set
  8327. +# CONFIG_HID_CHERRY is not set
  8328. +# CONFIG_HID_CHICONY is not set
  8329. +# CONFIG_HID_CYPRESS is not set
  8330. +# CONFIG_HID_DRAGONRISE is not set
  8331. +# CONFIG_HID_EZKEY is not set
  8332. +# CONFIG_HID_KYE is not set
  8333. +# CONFIG_HID_GYRATION is not set
  8334. +# CONFIG_HID_KENSINGTON is not set
  8335. +# CONFIG_HID_LOGITECH is not set
  8336. +# CONFIG_HID_MICROSOFT is not set
  8337. +# CONFIG_HID_MONTEREY is not set
  8338. +# CONFIG_HID_NTRIG is not set
  8339. +# CONFIG_HID_PANTHERLORD is not set
  8340. +# CONFIG_HID_PETALYNX is not set
  8341. +# CONFIG_HID_SAMSUNG is not set
  8342. +# CONFIG_HID_SONY is not set
  8343. +# CONFIG_HID_SUNPLUS is not set
  8344. +# CONFIG_HID_GREENASIA is not set
  8345. +# CONFIG_HID_SMARTJOYPLUS is not set
  8346. +# CONFIG_HID_TOPSEED is not set
  8347. +# CONFIG_HID_THRUSTMASTER is not set
  8348. +# CONFIG_HID_WACOM is not set
  8349. +# CONFIG_HID_ZEROPLUS is not set
  8350. +CONFIG_USB_SUPPORT=y
  8351. +CONFIG_USB_ARCH_HAS_HCD=y
  8352. +CONFIG_USB_ARCH_HAS_OHCI=y
  8353. +CONFIG_USB_ARCH_HAS_EHCI=y
  8354. +CONFIG_USB=y
  8355. +# CONFIG_USB_DEBUG is not set
  8356. +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
  8357. +
  8358. +#
  8359. +# Miscellaneous USB options
  8360. +#
  8361. +CONFIG_USB_DEVICEFS=y
  8362. +CONFIG_USB_DEVICE_CLASS=y
  8363. +CONFIG_USB_DYNAMIC_MINORS=y
  8364. +# CONFIG_USB_SUSPEND is not set
  8365. +# CONFIG_USB_OTG is not set
  8366. +# CONFIG_USB_OTG_WHITELIST is not set
  8367. +# CONFIG_USB_OTG_BLACKLIST_HUB is not set
  8368. +CONFIG_USB_MON=m
  8369. +# CONFIG_USB_WUSB is not set
  8370. +# CONFIG_USB_WUSB_CBAF is not set
  8371. +
  8372. +#
  8373. +# USB Host Controller Drivers
  8374. +#
  8375. +# CONFIG_USB_C67X00_HCD is not set
  8376. +# CONFIG_USB_XHCI_HCD is not set
  8377. +CONFIG_USB_EHCI_HCD=y
  8378. +CONFIG_USB_EHCI_ROOT_HUB_TT=y
  8379. +# CONFIG_USB_EHCI_TT_NEWSCHED is not set
  8380. +# CONFIG_USB_OXU210HP_HCD is not set
  8381. +# CONFIG_USB_ISP116X_HCD is not set
  8382. +# CONFIG_USB_ISP1760_HCD is not set
  8383. +CONFIG_USB_OHCI_HCD=m
  8384. +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
  8385. +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
  8386. +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
  8387. +CONFIG_USB_UHCI_HCD=m
  8388. +# CONFIG_USB_SL811_HCD is not set
  8389. +CONFIG_USB_R8A66597_HCD=y
  8390. +# CONFIG_USB_WHCI_HCD is not set
  8391. +# CONFIG_USB_HWA_HCD is not set
  8392. +
  8393. +#
  8394. +# USB Device Class drivers
  8395. +#
  8396. +CONFIG_USB_ACM=m
  8397. +CONFIG_USB_PRINTER=m
  8398. +# CONFIG_USB_WDM is not set
  8399. +# CONFIG_USB_TMC is not set
  8400. +
  8401. +#
  8402. +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
  8403. +#
  8404. +
  8405. +#
  8406. +# also be needed; see USB_STORAGE Help for more info
  8407. +#
  8408. +CONFIG_USB_STORAGE=y
  8409. +# CONFIG_USB_STORAGE_DEBUG is not set
  8410. +CONFIG_USB_STORAGE_DATAFAB=y
  8411. +CONFIG_USB_STORAGE_FREECOM=y
  8412. +CONFIG_USB_STORAGE_ISD200=y
  8413. +CONFIG_USB_STORAGE_USBAT=y
  8414. +CONFIG_USB_STORAGE_SDDR09=y
  8415. +CONFIG_USB_STORAGE_SDDR55=y
  8416. +CONFIG_USB_STORAGE_JUMPSHOT=y
  8417. +CONFIG_USB_STORAGE_ALAUDA=y
  8418. +CONFIG_USB_STORAGE_ONETOUCH=y
  8419. +CONFIG_USB_STORAGE_KARMA=y
  8420. +CONFIG_USB_STORAGE_CYPRESS_ATACB=y
  8421. +# CONFIG_USB_LIBUSUAL is not set
  8422. +
  8423. +#
  8424. +# USB Imaging devices
  8425. +#
  8426. +CONFIG_USB_MDC800=m
  8427. +CONFIG_USB_MICROTEK=m
  8428. +
  8429. +#
  8430. +# USB port drivers
  8431. +#
  8432. +CONFIG_USB_SERIAL=m
  8433. +CONFIG_USB_EZUSB=y
  8434. +CONFIG_USB_SERIAL_GENERIC=y
  8435. +# CONFIG_USB_SERIAL_AIRCABLE is not set
  8436. +CONFIG_USB_SERIAL_ARK3116=m
  8437. +CONFIG_USB_SERIAL_BELKIN=m
  8438. +# CONFIG_USB_SERIAL_CH341 is not set
  8439. +# CONFIG_USB_SERIAL_WHITEHEAT is not set
  8440. +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
  8441. +# CONFIG_USB_SERIAL_CP210X is not set
  8442. +CONFIG_USB_SERIAL_CYPRESS_M8=m
  8443. +CONFIG_USB_SERIAL_EMPEG=m
  8444. +CONFIG_USB_SERIAL_FTDI_SIO=m
  8445. +CONFIG_USB_SERIAL_FUNSOFT=m
  8446. +CONFIG_USB_SERIAL_VISOR=m
  8447. +CONFIG_USB_SERIAL_IPAQ=m
  8448. +CONFIG_USB_SERIAL_IR=m
  8449. +CONFIG_USB_SERIAL_EDGEPORT=m
  8450. +CONFIG_USB_SERIAL_EDGEPORT_TI=m
  8451. +CONFIG_USB_SERIAL_GARMIN=m
  8452. +CONFIG_USB_SERIAL_IPW=m
  8453. +# CONFIG_USB_SERIAL_IUU is not set
  8454. +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
  8455. +# CONFIG_USB_SERIAL_KEYSPAN is not set
  8456. +CONFIG_USB_SERIAL_KLSI=m
  8457. +CONFIG_USB_SERIAL_KOBIL_SCT=m
  8458. +CONFIG_USB_SERIAL_MCT_U232=m
  8459. +# CONFIG_USB_SERIAL_MOS7720 is not set
  8460. +# CONFIG_USB_SERIAL_MOS7840 is not set
  8461. +# CONFIG_USB_SERIAL_MOTOROLA is not set
  8462. +CONFIG_USB_SERIAL_NAVMAN=m
  8463. +CONFIG_USB_SERIAL_PL2303=m
  8464. +# CONFIG_USB_SERIAL_OTI6858 is not set
  8465. +# CONFIG_USB_SERIAL_QUALCOMM is not set
  8466. +# CONFIG_USB_SERIAL_SPCP8X5 is not set
  8467. +CONFIG_USB_SERIAL_HP4X=m
  8468. +CONFIG_USB_SERIAL_SAFE=m
  8469. +# CONFIG_USB_SERIAL_SAFE_PADDED is not set
  8470. +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
  8471. +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
  8472. +# CONFIG_USB_SERIAL_SYMBOL is not set
  8473. +CONFIG_USB_SERIAL_TI=m
  8474. +CONFIG_USB_SERIAL_CYBERJACK=m
  8475. +CONFIG_USB_SERIAL_XIRCOM=m
  8476. +CONFIG_USB_SERIAL_OPTION=m
  8477. +CONFIG_USB_SERIAL_OMNINET=m
  8478. +# CONFIG_USB_SERIAL_OPTICON is not set
  8479. +# CONFIG_USB_SERIAL_DEBUG is not set
  8480. +
  8481. +#
  8482. +# USB Miscellaneous drivers
  8483. +#
  8484. +# CONFIG_USB_EMI62 is not set
  8485. +# CONFIG_USB_EMI26 is not set
  8486. +# CONFIG_USB_ADUTUX is not set
  8487. +# CONFIG_USB_SEVSEG is not set
  8488. +CONFIG_USB_RIO500=m
  8489. +# CONFIG_USB_LEGOTOWER is not set
  8490. +# CONFIG_USB_LCD is not set
  8491. +# CONFIG_USB_BERRY_CHARGE is not set
  8492. +# CONFIG_USB_LED is not set
  8493. +# CONFIG_USB_CYPRESS_CY7C63 is not set
  8494. +# CONFIG_USB_CYTHERM is not set
  8495. +CONFIG_USB_IDMOUSE=m
  8496. +# CONFIG_USB_FTDI_ELAN is not set
  8497. +CONFIG_USB_APPLEDISPLAY=m
  8498. +CONFIG_USB_SISUSBVGA=m
  8499. +CONFIG_USB_SISUSBVGA_CON=y
  8500. +CONFIG_USB_LD=m
  8501. +# CONFIG_USB_TRANCEVIBRATOR is not set
  8502. +# CONFIG_USB_IOWARRIOR is not set
  8503. +CONFIG_USB_TEST=m
  8504. +# CONFIG_USB_ISIGHTFW is not set
  8505. +# CONFIG_USB_VST is not set
  8506. +CONFIG_USB_ATM=m
  8507. +CONFIG_USB_SPEEDTOUCH=m
  8508. +CONFIG_USB_CXACRU=m
  8509. +CONFIG_USB_UEAGLEATM=m
  8510. +CONFIG_USB_XUSBATM=m
  8511. +# CONFIG_USB_GADGET is not set
  8512. +
  8513. +#
  8514. +# OTG and related infrastructure
  8515. +#
  8516. +# CONFIG_NOP_USB_XCEIV is not set
  8517. +# CONFIG_UWB is not set
  8518. +CONFIG_MMC=m
  8519. +# CONFIG_MMC_DEBUG is not set
  8520. +# CONFIG_MMC_UNSAFE_RESUME is not set
  8521. +
  8522. +#
  8523. +# MMC/SD/SDIO Card Drivers
  8524. +#
  8525. +# CONFIG_MMC_BLOCK is not set
  8526. +# CONFIG_SDIO_UART is not set
  8527. +# CONFIG_MMC_TEST is not set
  8528. +
  8529. +#
  8530. +# MMC/SD/SDIO Host Controller Drivers
  8531. +#
  8532. +# CONFIG_MMC_SDHCI is not set
  8533. +# CONFIG_MMC_TIFM_SD is not set
  8534. +# CONFIG_MMC_SPI is not set
  8535. +# CONFIG_MMC_CB710 is not set
  8536. +# CONFIG_MMC_VIA_SDMMC is not set
  8537. +# CONFIG_MEMSTICK is not set
  8538. +CONFIG_NEW_LEDS=y
  8539. +CONFIG_LEDS_CLASS=m
  8540. +
  8541. +#
  8542. +# LED drivers
  8543. +#
  8544. +# CONFIG_LEDS_PCA9532 is not set
  8545. +# CONFIG_LEDS_LP3944 is not set
  8546. +# CONFIG_LEDS_PCA955X is not set
  8547. +# CONFIG_LEDS_DAC124S085 is not set
  8548. +# CONFIG_LEDS_BD2802 is not set
  8549. +
  8550. +#
  8551. +# LED Triggers
  8552. +#
  8553. +CONFIG_LEDS_TRIGGERS=y
  8554. +CONFIG_LEDS_TRIGGER_TIMER=m
  8555. +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
  8556. +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
  8557. +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
  8558. +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
  8559. +
  8560. +#
  8561. +# iptables trigger is under Netfilter config (LED target)
  8562. +#
  8563. +# CONFIG_ACCESSIBILITY is not set
  8564. +# CONFIG_INFINIBAND is not set
  8565. +CONFIG_RTC_LIB=y
  8566. +CONFIG_RTC_CLASS=y
  8567. +CONFIG_RTC_HCTOSYS=y
  8568. +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
  8569. +# CONFIG_RTC_DEBUG is not set
  8570. +
  8571. +#
  8572. +# RTC interfaces
  8573. +#
  8574. +CONFIG_RTC_INTF_SYSFS=y
  8575. +CONFIG_RTC_INTF_PROC=y
  8576. +CONFIG_RTC_INTF_DEV=y
  8577. +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
  8578. +# CONFIG_RTC_DRV_TEST is not set
  8579. +
  8580. +#
  8581. +# I2C RTC drivers
  8582. +#
  8583. +# CONFIG_RTC_DRV_DS1307 is not set
  8584. +# CONFIG_RTC_DRV_DS1374 is not set
  8585. +# CONFIG_RTC_DRV_DS1672 is not set
  8586. +# CONFIG_RTC_DRV_MAX6900 is not set
  8587. +# CONFIG_RTC_DRV_RS5C372 is not set
  8588. +# CONFIG_RTC_DRV_ISL1208 is not set
  8589. +# CONFIG_RTC_DRV_X1205 is not set
  8590. +# CONFIG_RTC_DRV_PCF8563 is not set
  8591. +# CONFIG_RTC_DRV_PCF8583 is not set
  8592. +# CONFIG_RTC_DRV_M41T80 is not set
  8593. +# CONFIG_RTC_DRV_S35390A is not set
  8594. +# CONFIG_RTC_DRV_FM3130 is not set
  8595. +# CONFIG_RTC_DRV_RX8581 is not set
  8596. +# CONFIG_RTC_DRV_RX8025 is not set
  8597. +
  8598. +#
  8599. +# SPI RTC drivers
  8600. +#
  8601. +# CONFIG_RTC_DRV_M41T94 is not set
  8602. +# CONFIG_RTC_DRV_DS1305 is not set
  8603. +# CONFIG_RTC_DRV_DS1390 is not set
  8604. +# CONFIG_RTC_DRV_MAX6902 is not set
  8605. +# CONFIG_RTC_DRV_R9701 is not set
  8606. +# CONFIG_RTC_DRV_RS5C348 is not set
  8607. +# CONFIG_RTC_DRV_DS3234 is not set
  8608. +
  8609. +#
  8610. +# Platform RTC drivers
  8611. +#
  8612. +CONFIG_RTC_DRV_CMOS=y
  8613. +# CONFIG_RTC_DRV_DS1286 is not set
  8614. +# CONFIG_RTC_DRV_DS1511 is not set
  8615. +# CONFIG_RTC_DRV_DS1553 is not set
  8616. +# CONFIG_RTC_DRV_DS1742 is not set
  8617. +# CONFIG_RTC_DRV_STK17TA8 is not set
  8618. +# CONFIG_RTC_DRV_M48T86 is not set
  8619. +# CONFIG_RTC_DRV_M48T35 is not set
  8620. +# CONFIG_RTC_DRV_M48T59 is not set
  8621. +# CONFIG_RTC_DRV_BQ4802 is not set
  8622. +# CONFIG_RTC_DRV_V3020 is not set
  8623. +
  8624. +#
  8625. +# on-CPU RTC drivers
  8626. +#
  8627. +# CONFIG_DMADEVICES is not set
  8628. +# CONFIG_AUXDISPLAY is not set
  8629. +# CONFIG_UIO is not set
  8630. +
  8631. +#
  8632. +# TI VLYNQ
  8633. +#
  8634. +# CONFIG_STAGING is not set
  8635. +CONFIG_LOONGSON_PLATFORM_DEVICES=y
  8636. +CONFIG_EC_KB3310B=y
  8637. +# CONFIG_EC_KB3310B_DEBUG is not set
  8638. +CONFIG_PMON_FLASH=m
  8639. +
  8640. +#
  8641. +# File systems
  8642. +#
  8643. +CONFIG_EXT2_FS=y
  8644. +CONFIG_EXT2_FS_XATTR=y
  8645. +CONFIG_EXT2_FS_POSIX_ACL=y
  8646. +CONFIG_EXT2_FS_SECURITY=y
  8647. +# CONFIG_EXT2_FS_XIP is not set
  8648. +CONFIG_EXT3_FS=y
  8649. +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
  8650. +CONFIG_EXT3_FS_XATTR=y
  8651. +CONFIG_EXT3_FS_POSIX_ACL=y
  8652. +CONFIG_EXT3_FS_SECURITY=y
  8653. +CONFIG_EXT4_FS=m
  8654. +CONFIG_EXT4DEV_COMPAT=y
  8655. +CONFIG_EXT4_FS_XATTR=y
  8656. +CONFIG_EXT4_FS_POSIX_ACL=y
  8657. +CONFIG_EXT4_FS_SECURITY=y
  8658. +CONFIG_JBD=y
  8659. +# CONFIG_JBD_DEBUG is not set
  8660. +CONFIG_JBD2=m
  8661. +# CONFIG_JBD2_DEBUG is not set
  8662. +CONFIG_FS_MBCACHE=y
  8663. +CONFIG_REISERFS_FS=m
  8664. +# CONFIG_REISERFS_CHECK is not set
  8665. +# CONFIG_REISERFS_PROC_INFO is not set
  8666. +CONFIG_REISERFS_FS_XATTR=y
  8667. +CONFIG_REISERFS_FS_POSIX_ACL=y
  8668. +CONFIG_REISERFS_FS_SECURITY=y
  8669. +CONFIG_JFS_FS=m
  8670. +CONFIG_JFS_POSIX_ACL=y
  8671. +CONFIG_JFS_SECURITY=y
  8672. +# CONFIG_JFS_DEBUG is not set
  8673. +# CONFIG_JFS_STATISTICS is not set
  8674. +CONFIG_FS_POSIX_ACL=y
  8675. +CONFIG_XFS_FS=m
  8676. +CONFIG_XFS_QUOTA=y
  8677. +CONFIG_XFS_POSIX_ACL=y
  8678. +CONFIG_XFS_RT=y
  8679. +# CONFIG_XFS_DEBUG is not set
  8680. +# CONFIG_GFS2_FS is not set
  8681. +CONFIG_OCFS2_FS=m
  8682. +CONFIG_OCFS2_FS_O2CB=m
  8683. +CONFIG_OCFS2_FS_STATS=y
  8684. +CONFIG_OCFS2_DEBUG_MASKLOG=y
  8685. +# CONFIG_OCFS2_DEBUG_FS is not set
  8686. +# CONFIG_OCFS2_FS_POSIX_ACL is not set
  8687. +# CONFIG_BTRFS_FS is not set
  8688. +CONFIG_FILE_LOCKING=y
  8689. +CONFIG_FSNOTIFY=y
  8690. +CONFIG_DNOTIFY=y
  8691. +CONFIG_INOTIFY=y
  8692. +CONFIG_INOTIFY_USER=y
  8693. +CONFIG_QUOTA=y
  8694. +# CONFIG_QUOTA_NETLINK_INTERFACE is not set
  8695. +CONFIG_PRINT_QUOTA_WARNING=y
  8696. +CONFIG_QUOTA_TREE=m
  8697. +CONFIG_QFMT_V1=m
  8698. +CONFIG_QFMT_V2=m
  8699. +CONFIG_QUOTACTL=y
  8700. +CONFIG_AUTOFS_FS=m
  8701. +CONFIG_AUTOFS4_FS=m
  8702. +CONFIG_FUSE_FS=m
  8703. +# CONFIG_CUSE is not set
  8704. +
  8705. +#
  8706. +# Caches
  8707. +#
  8708. +# CONFIG_FSCACHE is not set
  8709. +
  8710. +#
  8711. +# CD-ROM/DVD Filesystems
  8712. +#
  8713. +CONFIG_ISO9660_FS=m
  8714. +CONFIG_JOLIET=y
  8715. +CONFIG_ZISOFS=y
  8716. +CONFIG_UDF_FS=m
  8717. +CONFIG_UDF_NLS=y
  8718. +
  8719. +#
  8720. +# DOS/FAT/NT Filesystems
  8721. +#
  8722. +CONFIG_FAT_FS=m
  8723. +CONFIG_MSDOS_FS=m
  8724. +CONFIG_VFAT_FS=m
  8725. +CONFIG_FAT_DEFAULT_CODEPAGE=437
  8726. +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
  8727. +CONFIG_NTFS_FS=m
  8728. +# CONFIG_NTFS_DEBUG is not set
  8729. +CONFIG_NTFS_RW=y
  8730. +
  8731. +#
  8732. +# Pseudo filesystems
  8733. +#
  8734. +CONFIG_PROC_FS=y
  8735. +CONFIG_PROC_KCORE=y
  8736. +CONFIG_PROC_SYSCTL=y
  8737. +CONFIG_PROC_PAGE_MONITOR=y
  8738. +CONFIG_SYSFS=y
  8739. +CONFIG_TMPFS=y
  8740. +# CONFIG_TMPFS_POSIX_ACL is not set
  8741. +# CONFIG_HUGETLB_PAGE is not set
  8742. +CONFIG_CONFIGFS_FS=m
  8743. +CONFIG_MISC_FILESYSTEMS=y
  8744. +CONFIG_ADFS_FS=m
  8745. +# CONFIG_ADFS_FS_RW is not set
  8746. +CONFIG_AFFS_FS=m
  8747. +# CONFIG_ECRYPT_FS is not set
  8748. +CONFIG_HFS_FS=m
  8749. +CONFIG_HFSPLUS_FS=m
  8750. +CONFIG_BEFS_FS=m
  8751. +# CONFIG_BEFS_DEBUG is not set
  8752. +CONFIG_BFS_FS=m
  8753. +CONFIG_EFS_FS=m
  8754. +CONFIG_JFFS2_FS=m
  8755. +CONFIG_JFFS2_FS_DEBUG=0
  8756. +CONFIG_JFFS2_FS_WRITEBUFFER=y
  8757. +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
  8758. +# CONFIG_JFFS2_SUMMARY is not set
  8759. +CONFIG_JFFS2_FS_XATTR=y
  8760. +CONFIG_JFFS2_FS_POSIX_ACL=y
  8761. +CONFIG_JFFS2_FS_SECURITY=y
  8762. +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
  8763. +CONFIG_JFFS2_ZLIB=y
  8764. +# CONFIG_JFFS2_LZO is not set
  8765. +CONFIG_JFFS2_RTIME=y
  8766. +# CONFIG_JFFS2_RUBIN is not set
  8767. +CONFIG_CRAMFS=y
  8768. +# CONFIG_SQUASHFS is not set
  8769. +CONFIG_VXFS_FS=m
  8770. +CONFIG_MINIX_FS=m
  8771. +# CONFIG_OMFS_FS is not set
  8772. +CONFIG_HPFS_FS=m
  8773. +CONFIG_QNX4FS_FS=m
  8774. +CONFIG_ROMFS_FS=m
  8775. +CONFIG_ROMFS_BACKED_BY_BLOCK=y
  8776. +# CONFIG_ROMFS_BACKED_BY_MTD is not set
  8777. +# CONFIG_ROMFS_BACKED_BY_BOTH is not set
  8778. +CONFIG_ROMFS_ON_BLOCK=y
  8779. +CONFIG_SYSV_FS=m
  8780. +CONFIG_UFS_FS=m
  8781. +# CONFIG_UFS_FS_WRITE is not set
  8782. +# CONFIG_UFS_DEBUG is not set
  8783. +# CONFIG_NILFS2_FS is not set
  8784. +CONFIG_NETWORK_FILESYSTEMS=y
  8785. +CONFIG_NFS_FS=m
  8786. +CONFIG_NFS_V3=y
  8787. +CONFIG_NFS_V3_ACL=y
  8788. +CONFIG_NFS_V4=y
  8789. +# CONFIG_NFS_V4_1 is not set
  8790. +CONFIG_NFSD=m
  8791. +CONFIG_NFSD_V2_ACL=y
  8792. +CONFIG_NFSD_V3=y
  8793. +CONFIG_NFSD_V3_ACL=y
  8794. +CONFIG_NFSD_V4=y
  8795. +CONFIG_LOCKD=m
  8796. +CONFIG_LOCKD_V4=y
  8797. +CONFIG_EXPORTFS=m
  8798. +CONFIG_NFS_ACL_SUPPORT=m
  8799. +CONFIG_NFS_COMMON=y
  8800. +CONFIG_SUNRPC=m
  8801. +CONFIG_SUNRPC_GSS=m
  8802. +CONFIG_RPCSEC_GSS_KRB5=m
  8803. +CONFIG_RPCSEC_GSS_SPKM3=m
  8804. +CONFIG_SMB_FS=m
  8805. +# CONFIG_SMB_NLS_DEFAULT is not set
  8806. +CONFIG_CIFS=m
  8807. +# CONFIG_CIFS_STATS is not set
  8808. +# CONFIG_CIFS_WEAK_PW_HASH is not set
  8809. +# CONFIG_CIFS_UPCALL is not set
  8810. +# CONFIG_CIFS_XATTR is not set
  8811. +# CONFIG_CIFS_DEBUG2 is not set
  8812. +# CONFIG_CIFS_DFS_UPCALL is not set
  8813. +# CONFIG_CIFS_EXPERIMENTAL is not set
  8814. +CONFIG_NCP_FS=m
  8815. +CONFIG_NCPFS_PACKET_SIGNING=y
  8816. +CONFIG_NCPFS_IOCTL_LOCKING=y
  8817. +CONFIG_NCPFS_STRONG=y
  8818. +CONFIG_NCPFS_NFS_NS=y
  8819. +CONFIG_NCPFS_OS2_NS=y
  8820. +# CONFIG_NCPFS_SMALLDOS is not set
  8821. +CONFIG_NCPFS_NLS=y
  8822. +CONFIG_NCPFS_EXTRAS=y
  8823. +CONFIG_CODA_FS=m
  8824. +CONFIG_AFS_FS=m
  8825. +# CONFIG_AFS_DEBUG is not set
  8826. +
  8827. +#
  8828. +# Partition Types
  8829. +#
  8830. +CONFIG_PARTITION_ADVANCED=y
  8831. +CONFIG_ACORN_PARTITION=y
  8832. +# CONFIG_ACORN_PARTITION_CUMANA is not set
  8833. +# CONFIG_ACORN_PARTITION_EESOX is not set
  8834. +CONFIG_ACORN_PARTITION_ICS=y
  8835. +# CONFIG_ACORN_PARTITION_ADFS is not set
  8836. +# CONFIG_ACORN_PARTITION_POWERTEC is not set
  8837. +CONFIG_ACORN_PARTITION_RISCIX=y
  8838. +CONFIG_OSF_PARTITION=y
  8839. +CONFIG_AMIGA_PARTITION=y
  8840. +CONFIG_ATARI_PARTITION=y
  8841. +CONFIG_MAC_PARTITION=y
  8842. +CONFIG_MSDOS_PARTITION=y
  8843. +CONFIG_BSD_DISKLABEL=y
  8844. +CONFIG_MINIX_SUBPARTITION=y
  8845. +CONFIG_SOLARIS_X86_PARTITION=y
  8846. +CONFIG_UNIXWARE_DISKLABEL=y
  8847. +CONFIG_LDM_PARTITION=y
  8848. +# CONFIG_LDM_DEBUG is not set
  8849. +CONFIG_SGI_PARTITION=y
  8850. +CONFIG_ULTRIX_PARTITION=y
  8851. +CONFIG_SUN_PARTITION=y
  8852. +CONFIG_KARMA_PARTITION=y
  8853. +CONFIG_EFI_PARTITION=y
  8854. +# CONFIG_SYSV68_PARTITION is not set
  8855. +CONFIG_NLS=y
  8856. +CONFIG_NLS_DEFAULT="utf-8"
  8857. +CONFIG_NLS_CODEPAGE_437=m
  8858. +# CONFIG_NLS_CODEPAGE_737 is not set
  8859. +# CONFIG_NLS_CODEPAGE_775 is not set
  8860. +CONFIG_NLS_CODEPAGE_850=m
  8861. +# CONFIG_NLS_CODEPAGE_852 is not set
  8862. +# CONFIG_NLS_CODEPAGE_855 is not set
  8863. +# CONFIG_NLS_CODEPAGE_857 is not set
  8864. +# CONFIG_NLS_CODEPAGE_860 is not set
  8865. +# CONFIG_NLS_CODEPAGE_861 is not set
  8866. +# CONFIG_NLS_CODEPAGE_862 is not set
  8867. +# CONFIG_NLS_CODEPAGE_863 is not set
  8868. +# CONFIG_NLS_CODEPAGE_864 is not set
  8869. +# CONFIG_NLS_CODEPAGE_865 is not set
  8870. +# CONFIG_NLS_CODEPAGE_866 is not set
  8871. +# CONFIG_NLS_CODEPAGE_869 is not set
  8872. +CONFIG_NLS_CODEPAGE_936=m
  8873. +CONFIG_NLS_CODEPAGE_950=m
  8874. +CONFIG_NLS_CODEPAGE_932=m
  8875. +CONFIG_NLS_CODEPAGE_949=m
  8876. +# CONFIG_NLS_CODEPAGE_874 is not set
  8877. +# CONFIG_NLS_ISO8859_8 is not set
  8878. +CONFIG_NLS_CODEPAGE_1250=m
  8879. +CONFIG_NLS_CODEPAGE_1251=m
  8880. +CONFIG_NLS_ASCII=m
  8881. +# CONFIG_NLS_ISO8859_1 is not set
  8882. +# CONFIG_NLS_ISO8859_2 is not set
  8883. +# CONFIG_NLS_ISO8859_3 is not set
  8884. +# CONFIG_NLS_ISO8859_4 is not set
  8885. +# CONFIG_NLS_ISO8859_5 is not set
  8886. +# CONFIG_NLS_ISO8859_6 is not set
  8887. +# CONFIG_NLS_ISO8859_7 is not set
  8888. +# CONFIG_NLS_ISO8859_9 is not set
  8889. +# CONFIG_NLS_ISO8859_13 is not set
  8890. +# CONFIG_NLS_ISO8859_14 is not set
  8891. +# CONFIG_NLS_ISO8859_15 is not set
  8892. +CONFIG_NLS_KOI8_R=m
  8893. +CONFIG_NLS_KOI8_U=m
  8894. +CONFIG_NLS_UTF8=m
  8895. +# CONFIG_DLM is not set
  8896. +
  8897. +#
  8898. +# Kernel hacking
  8899. +#
  8900. +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  8901. +# CONFIG_PRINTK_TIME is not set
  8902. +CONFIG_ENABLE_WARN_DEPRECATED=y
  8903. +CONFIG_ENABLE_MUST_CHECK=y
  8904. +CONFIG_FRAME_WARN=1024
  8905. +CONFIG_MAGIC_SYSRQ=y
  8906. +CONFIG_UNUSED_SYMBOLS=y
  8907. +CONFIG_DEBUG_FS=y
  8908. +# CONFIG_HEADERS_CHECK is not set
  8909. +# CONFIG_DEBUG_KERNEL is not set
  8910. +CONFIG_STACKTRACE=y
  8911. +# CONFIG_DEBUG_MEMORY_INIT is not set
  8912. +# CONFIG_RCU_CPU_STALL_DETECTOR is not set
  8913. +CONFIG_SYSCTL_SYSCALL_CHECK=y
  8914. +CONFIG_NOP_TRACER=y
  8915. +CONFIG_RING_BUFFER=y
  8916. +CONFIG_EVENT_TRACING=y
  8917. +CONFIG_CONTEXT_SWITCH_TRACER=y
  8918. +CONFIG_TRACING=y
  8919. +CONFIG_TRACING_SUPPORT=y
  8920. +# CONFIG_FTRACE is not set
  8921. +# CONFIG_DYNAMIC_DEBUG is not set
  8922. +# CONFIG_SAMPLES is not set
  8923. +CONFIG_HAVE_ARCH_KGDB=y
  8924. +CONFIG_CMDLINE=""
  8925. +
  8926. +#
  8927. +# Security options
  8928. +#
  8929. +CONFIG_KEYS=y
  8930. +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
  8931. +CONFIG_SECURITY=y
  8932. +# CONFIG_SECURITYFS is not set
  8933. +CONFIG_SECURITY_NETWORK=y
  8934. +CONFIG_SECURITY_NETWORK_XFRM=y
  8935. +# CONFIG_SECURITY_PATH is not set
  8936. +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
  8937. +# CONFIG_SECURITY_ROOTPLUG is not set
  8938. +CONFIG_SECURITY_SELINUX=y
  8939. +CONFIG_SECURITY_SELINUX_BOOTPARAM=y
  8940. +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
  8941. +CONFIG_SECURITY_SELINUX_DISABLE=y
  8942. +CONFIG_SECURITY_SELINUX_DEVELOP=y
  8943. +CONFIG_SECURITY_SELINUX_AVC_STATS=y
  8944. +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
  8945. +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
  8946. +# CONFIG_SECURITY_TOMOYO is not set
  8947. +CONFIG_XOR_BLOCKS=m
  8948. +CONFIG_ASYNC_CORE=m
  8949. +CONFIG_ASYNC_MEMCPY=m
  8950. +CONFIG_ASYNC_XOR=m
  8951. +CONFIG_CRYPTO=y
  8952. +
  8953. +#
  8954. +# Crypto core or helper
  8955. +#
  8956. +# CONFIG_CRYPTO_FIPS is not set
  8957. +CONFIG_CRYPTO_ALGAPI=y
  8958. +CONFIG_CRYPTO_ALGAPI2=y
  8959. +CONFIG_CRYPTO_AEAD=m
  8960. +CONFIG_CRYPTO_AEAD2=y
  8961. +CONFIG_CRYPTO_BLKCIPHER=y
  8962. +CONFIG_CRYPTO_BLKCIPHER2=y
  8963. +CONFIG_CRYPTO_HASH=y
  8964. +CONFIG_CRYPTO_HASH2=y
  8965. +CONFIG_CRYPTO_RNG2=y
  8966. +CONFIG_CRYPTO_PCOMP=y
  8967. +CONFIG_CRYPTO_MANAGER=y
  8968. +CONFIG_CRYPTO_MANAGER2=y
  8969. +# CONFIG_CRYPTO_GF128MUL is not set
  8970. +CONFIG_CRYPTO_NULL=m
  8971. +CONFIG_CRYPTO_WORKQUEUE=y
  8972. +# CONFIG_CRYPTO_CRYPTD is not set
  8973. +CONFIG_CRYPTO_AUTHENC=m
  8974. +CONFIG_CRYPTO_TEST=m
  8975. +
  8976. +#
  8977. +# Authenticated Encryption with Associated Data
  8978. +#
  8979. +# CONFIG_CRYPTO_CCM is not set
  8980. +# CONFIG_CRYPTO_GCM is not set
  8981. +# CONFIG_CRYPTO_SEQIV is not set
  8982. +
  8983. +#
  8984. +# Block modes
  8985. +#
  8986. +CONFIG_CRYPTO_CBC=m
  8987. +# CONFIG_CRYPTO_CTR is not set
  8988. +# CONFIG_CRYPTO_CTS is not set
  8989. +CONFIG_CRYPTO_ECB=y
  8990. +# CONFIG_CRYPTO_LRW is not set
  8991. +# CONFIG_CRYPTO_PCBC is not set
  8992. +# CONFIG_CRYPTO_XTS is not set
  8993. +
  8994. +#
  8995. +# Hash modes
  8996. +#
  8997. +CONFIG_CRYPTO_HMAC=y
  8998. +# CONFIG_CRYPTO_XCBC is not set
  8999. +
  9000. +#
  9001. +# Digest
  9002. +#
  9003. +CONFIG_CRYPTO_CRC32C=m
  9004. +CONFIG_CRYPTO_MD4=m
  9005. +CONFIG_CRYPTO_MD5=y
  9006. +CONFIG_CRYPTO_MICHAEL_MIC=m
  9007. +# CONFIG_CRYPTO_RMD128 is not set
  9008. +# CONFIG_CRYPTO_RMD160 is not set
  9009. +# CONFIG_CRYPTO_RMD256 is not set
  9010. +# CONFIG_CRYPTO_RMD320 is not set
  9011. +CONFIG_CRYPTO_SHA1=m
  9012. +CONFIG_CRYPTO_SHA256=m
  9013. +CONFIG_CRYPTO_SHA512=m
  9014. +CONFIG_CRYPTO_TGR192=m
  9015. +CONFIG_CRYPTO_WP512=m
  9016. +
  9017. +#
  9018. +# Ciphers
  9019. +#
  9020. +CONFIG_CRYPTO_AES=y
  9021. +CONFIG_CRYPTO_ANUBIS=m
  9022. +CONFIG_CRYPTO_ARC4=y
  9023. +CONFIG_CRYPTO_BLOWFISH=m
  9024. +# CONFIG_CRYPTO_CAMELLIA is not set
  9025. +CONFIG_CRYPTO_CAST5=m
  9026. +CONFIG_CRYPTO_CAST6=m
  9027. +CONFIG_CRYPTO_DES=m
  9028. +# CONFIG_CRYPTO_FCRYPT is not set
  9029. +CONFIG_CRYPTO_KHAZAD=m
  9030. +# CONFIG_CRYPTO_SALSA20 is not set
  9031. +# CONFIG_CRYPTO_SEED is not set
  9032. +CONFIG_CRYPTO_SERPENT=m
  9033. +CONFIG_CRYPTO_TEA=m
  9034. +CONFIG_CRYPTO_TWOFISH=m
  9035. +CONFIG_CRYPTO_TWOFISH_COMMON=m
  9036. +
  9037. +#
  9038. +# Compression
  9039. +#
  9040. +CONFIG_CRYPTO_DEFLATE=m
  9041. +# CONFIG_CRYPTO_ZLIB is not set
  9042. +# CONFIG_CRYPTO_LZO is not set
  9043. +
  9044. +#
  9045. +# Random Number Generation
  9046. +#
  9047. +# CONFIG_CRYPTO_ANSI_CPRNG is not set
  9048. +CONFIG_CRYPTO_HW=y
  9049. +# CONFIG_CRYPTO_DEV_HIFN_795X is not set
  9050. +CONFIG_BINARY_PRINTF=y
  9051. +
  9052. +#
  9053. +# Library routines
  9054. +#
  9055. +CONFIG_BITREVERSE=y
  9056. +CONFIG_GENERIC_FIND_LAST_BIT=y
  9057. +CONFIG_CRC_CCITT=m
  9058. +CONFIG_CRC16=m
  9059. +# CONFIG_CRC_T10DIF is not set
  9060. +CONFIG_CRC_ITU_T=m
  9061. +CONFIG_CRC32=y
  9062. +# CONFIG_CRC7 is not set
  9063. +CONFIG_LIBCRC32C=m
  9064. +CONFIG_AUDIT_GENERIC=y
  9065. +CONFIG_ZLIB_INFLATE=y
  9066. +CONFIG_ZLIB_DEFLATE=m
  9067. +CONFIG_DECOMPRESS_GZIP=y
  9068. +CONFIG_TEXTSEARCH=y
  9069. +CONFIG_TEXTSEARCH_KMP=m
  9070. +CONFIG_TEXTSEARCH_BM=m
  9071. +CONFIG_TEXTSEARCH_FSM=m
  9072. +CONFIG_HAS_IOMEM=y
  9073. +CONFIG_HAS_IOPORT=y
  9074. +CONFIG_HAS_DMA=y
  9075. +CONFIG_NLATTR=y
  9076. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/bootinfo.h linux-2.6.30.5/arch/mips/include/asm/bootinfo.h
  9077. --- linux-2.6.30.5.orig/arch/mips/include/asm/bootinfo.h 2009-08-16 23:19:38.000000000 +0200
  9078. +++ linux-2.6.30.5/arch/mips/include/asm/bootinfo.h 2009-08-23 19:01:04.000000000 +0200
  9079. @@ -7,6 +7,7 @@
  9080. * Copyright (C) 1995, 1996 Andreas Busse
  9081. * Copyright (C) 1995, 1996 Stoned Elipot
  9082. * Copyright (C) 1995, 1996 Paul M. Antoine.
  9083. + * Copyright (C) 2009 Zhang Le
  9084. */
  9085. #ifndef _ASM_BOOTINFO_H
  9086. #define _ASM_BOOTINFO_H
  9087. @@ -57,6 +58,16 @@
  9088. #define MACH_MIKROTIK_RB532 0 /* Mikrotik RouterBoard 532 */
  9089. #define MACH_MIKROTIK_RB532A 1 /* Mikrotik RouterBoard 532A */
  9090. +/*
  9091. + * Valid machtype for group Loongson
  9092. + */
  9093. +#define MACH_LOONGSON_UNKNOWN 0
  9094. +#define MACH_LEMOTE_FL2E 1
  9095. +#define MACH_LEMOTE_FL2F 2
  9096. +#define MACH_LEMOTE_YL2F89 3
  9097. +#define MACH_LEMOTE_YL2F7 4
  9098. +#define MACH_LOONGSON_END 5
  9099. +
  9100. #define CL_SIZE COMMAND_LINE_SIZE
  9101. extern char *system_type;
  9102. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/bug.h linux-2.6.30.5/arch/mips/include/asm/bug.h
  9103. --- linux-2.6.30.5.orig/arch/mips/include/asm/bug.h 2009-08-16 23:19:38.000000000 +0200
  9104. +++ linux-2.6.30.5/arch/mips/include/asm/bug.h 2009-08-23 19:01:04.000000000 +0200
  9105. @@ -5,6 +5,8 @@
  9106. #ifdef CONFIG_BUG
  9107. +#include <linux/compiler.h>
  9108. +
  9109. #include <asm/break.h>
  9110. static inline void __noreturn BUG(void)
  9111. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h linux-2.6.30.5/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
  9112. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h 2009-08-16 23:19:38.000000000 +0200
  9113. +++ linux-2.6.30.5/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
  9114. @@ -1,59 +0,0 @@
  9115. -/*
  9116. - * This file is subject to the terms and conditions of the GNU General Public
  9117. - * License. See the file "COPYING" in the main directory of this archive
  9118. - * for more details.
  9119. - *
  9120. - * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
  9121. - * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
  9122. - * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
  9123. - *
  9124. - * reference: /proc/cpuinfo,
  9125. - * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
  9126. - * arch/mips/kernel/proc.c(show_cpuinfo),
  9127. - * loongson2f user manual.
  9128. - */
  9129. -
  9130. -#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
  9131. -#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
  9132. -
  9133. -#define cpu_dcache_line_size() 32
  9134. -#define cpu_icache_line_size() 32
  9135. -#define cpu_scache_line_size() 32
  9136. -
  9137. -
  9138. -#define cpu_has_32fpr 1
  9139. -#define cpu_has_3k_cache 0
  9140. -#define cpu_has_4k_cache 1
  9141. -#define cpu_has_4kex 1
  9142. -#define cpu_has_64bits 1
  9143. -#define cpu_has_cache_cdex_p 0
  9144. -#define cpu_has_cache_cdex_s 0
  9145. -#define cpu_has_counter 1
  9146. -#define cpu_has_dc_aliases 1
  9147. -#define cpu_has_divec 0
  9148. -#define cpu_has_dsp 0
  9149. -#define cpu_has_ejtag 0
  9150. -#define cpu_has_fpu 1
  9151. -#define cpu_has_ic_fills_f_dc 0
  9152. -#define cpu_has_inclusive_pcaches 1
  9153. -#define cpu_has_llsc 1
  9154. -#define cpu_has_mcheck 0
  9155. -#define cpu_has_mdmx 0
  9156. -#define cpu_has_mips16 0
  9157. -#define cpu_has_mips32r1 0
  9158. -#define cpu_has_mips32r2 0
  9159. -#define cpu_has_mips3d 0
  9160. -#define cpu_has_mips64r1 0
  9161. -#define cpu_has_mips64r2 0
  9162. -#define cpu_has_mipsmt 0
  9163. -#define cpu_has_prefetch 0
  9164. -#define cpu_has_smartmips 0
  9165. -#define cpu_has_tlb 1
  9166. -#define cpu_has_tx39_cache 0
  9167. -#define cpu_has_userlocal 0
  9168. -#define cpu_has_vce 0
  9169. -#define cpu_has_vtag_icache 0
  9170. -#define cpu_has_watch 1
  9171. -#define cpu_icache_snoops_remote_store 1
  9172. -
  9173. -#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */
  9174. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/mc146818rtc.h linux-2.6.30.5/arch/mips/include/asm/mach-lemote/mc146818rtc.h
  9175. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/mc146818rtc.h 2009-08-16 23:19:38.000000000 +0200
  9176. +++ linux-2.6.30.5/arch/mips/include/asm/mach-lemote/mc146818rtc.h 1970-01-01 01:00:00.000000000 +0100
  9177. @@ -1,36 +0,0 @@
  9178. -/*
  9179. - * This file is subject to the terms and conditions of the GNU General Public
  9180. - * License. See the file "COPYING" in the main directory of this archive
  9181. - * for more details.
  9182. - *
  9183. - * Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
  9184. - *
  9185. - * RTC routines for PC style attached Dallas chip.
  9186. - */
  9187. -#ifndef __ASM_MACH_LEMOTE_MC146818RTC_H
  9188. -#define __ASM_MACH_LEMOTE_MC146818RTC_H
  9189. -
  9190. -#include <linux/io.h>
  9191. -
  9192. -#define RTC_PORT(x) (0x70 + (x))
  9193. -#define RTC_IRQ 8
  9194. -
  9195. -static inline unsigned char CMOS_READ(unsigned long addr)
  9196. -{
  9197. - outb_p(addr, RTC_PORT(0));
  9198. - return inb_p(RTC_PORT(1));
  9199. -}
  9200. -
  9201. -static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
  9202. -{
  9203. - outb_p(addr, RTC_PORT(0));
  9204. - outb_p(data, RTC_PORT(1));
  9205. -}
  9206. -
  9207. -#define RTC_ALWAYS_BCD 0
  9208. -
  9209. -#ifndef mc146818_decode_year
  9210. -#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
  9211. -#endif
  9212. -
  9213. -#endif /* __ASM_MACH_LEMOTE_MC146818RTC_H */
  9214. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/pci.h linux-2.6.30.5/arch/mips/include/asm/mach-lemote/pci.h
  9215. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/pci.h 2009-08-16 23:19:38.000000000 +0200
  9216. +++ linux-2.6.30.5/arch/mips/include/asm/mach-lemote/pci.h 1970-01-01 01:00:00.000000000 +0100
  9217. @@ -1,30 +0,0 @@
  9218. -/*
  9219. - * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
  9220. - *
  9221. - * This program is free software; you can redistribute it
  9222. - * and/or modify it under the terms of the GNU General
  9223. - * Public License as published by the Free Software
  9224. - * Foundation; either version 2 of the License, or (at your
  9225. - * option) any later version.
  9226. - *
  9227. - * This program is distributed in the hope that it will be
  9228. - * useful, but WITHOUT ANY WARRANTY; without even the implied
  9229. - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  9230. - * PURPOSE. See the GNU General Public License for more
  9231. - * details.
  9232. - *
  9233. - * You should have received a copy of the GNU General Public
  9234. - * License along with this program; if not, write to the Free
  9235. - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
  9236. - * 02139, USA.
  9237. - */
  9238. -
  9239. -#ifndef _LEMOTE_PCI_H_
  9240. -#define _LEMOTE_PCI_H_
  9241. -
  9242. -#define LOONGSON2E_PCI_MEM_START 0x14000000UL
  9243. -#define LOONGSON2E_PCI_MEM_END 0x1fffffffUL
  9244. -#define LOONGSON2E_PCI_IO_START 0x00004000UL
  9245. -#define LOONGSON2E_IO_PORT_BASE 0x1fd00000UL
  9246. -
  9247. -#endif /* !_LEMOTE_PCI_H_ */
  9248. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/war.h linux-2.6.30.5/arch/mips/include/asm/mach-lemote/war.h
  9249. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-lemote/war.h 2009-08-16 23:19:38.000000000 +0200
  9250. +++ linux-2.6.30.5/arch/mips/include/asm/mach-lemote/war.h 1970-01-01 01:00:00.000000000 +0100
  9251. @@ -1,25 +0,0 @@
  9252. -/*
  9253. - * This file is subject to the terms and conditions of the GNU General Public
  9254. - * License. See the file "COPYING" in the main directory of this archive
  9255. - * for more details.
  9256. - *
  9257. - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  9258. - */
  9259. -#ifndef __ASM_MIPS_MACH_LEMOTE_WAR_H
  9260. -#define __ASM_MIPS_MACH_LEMOTE_WAR_H
  9261. -
  9262. -#define R4600_V1_INDEX_ICACHEOP_WAR 0
  9263. -#define R4600_V1_HIT_CACHEOP_WAR 0
  9264. -#define R4600_V2_HIT_CACHEOP_WAR 0
  9265. -#define R5432_CP0_INTERRUPT_WAR 0
  9266. -#define BCM1250_M3_WAR 0
  9267. -#define SIBYTE_1956_WAR 0
  9268. -#define MIPS4K_ICACHE_REFILL_WAR 0
  9269. -#define MIPS_CACHE_SYNC_WAR 0
  9270. -#define TX49XX_ICACHE_INDEX_INV_WAR 0
  9271. -#define RM9000_CDEX_SMP_WAR 0
  9272. -#define ICACHE_REFILLS_WORKAROUND_WAR 0
  9273. -#define R10000_LLSC_WAR 0
  9274. -#define MIPS34K_MISSED_ITLB_WAR 0
  9275. -
  9276. -#endif /* __ASM_MIPS_MACH_LEMOTE_WAR_H */
  9277. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/clock.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/clock.h
  9278. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/clock.h 1970-01-01 01:00:00.000000000 +0100
  9279. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/clock.h 2009-08-23 19:01:04.000000000 +0200
  9280. @@ -0,0 +1,64 @@
  9281. +#ifndef __ASM_MIPS_CLOCK_H
  9282. +#define __ASM_MIPS_CLOCK_H
  9283. +
  9284. +#include <linux/kref.h>
  9285. +#include <linux/list.h>
  9286. +#include <linux/seq_file.h>
  9287. +#include <linux/clk.h>
  9288. +
  9289. +extern void (*cpu_wait) (void);
  9290. +
  9291. +struct clk;
  9292. +
  9293. +struct clk_ops {
  9294. + void (*init) (struct clk *clk);
  9295. + void (*enable) (struct clk *clk);
  9296. + void (*disable) (struct clk *clk);
  9297. + void (*recalc) (struct clk *clk);
  9298. + int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id);
  9299. + long (*round_rate) (struct clk *clk, unsigned long rate);
  9300. +};
  9301. +
  9302. +struct clk {
  9303. + struct list_head node;
  9304. + const char *name;
  9305. + int id;
  9306. + struct module *owner;
  9307. +
  9308. + struct clk *parent;
  9309. + struct clk_ops *ops;
  9310. +
  9311. + struct kref kref;
  9312. +
  9313. + unsigned long rate;
  9314. + unsigned long flags;
  9315. +};
  9316. +
  9317. +#define CLK_ALWAYS_ENABLED (1 << 0)
  9318. +#define CLK_RATE_PROPAGATES (1 << 1)
  9319. +
  9320. +/* Should be defined by processor-specific code */
  9321. +void arch_init_clk_ops(struct clk_ops **, int type);
  9322. +
  9323. +int clk_init(void);
  9324. +
  9325. +int __clk_enable(struct clk *);
  9326. +void __clk_disable(struct clk *);
  9327. +
  9328. +void clk_recalc_rate(struct clk *);
  9329. +
  9330. +int clk_register(struct clk *);
  9331. +void clk_unregister(struct clk *);
  9332. +
  9333. +/* the exported API, in addition to clk_set_rate */
  9334. +/**
  9335. + * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
  9336. + * @clk: clock source
  9337. + * @rate: desired clock rate in Hz
  9338. + * @algo_id: algorithm id to be passed down to ops->set_rate
  9339. + *
  9340. + * Returns success (0) or negative errno.
  9341. + */
  9342. +int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
  9343. +
  9344. +#endif /* __ASM_MIPS_CLOCK_H */
  9345. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cmdline.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cmdline.h
  9346. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cmdline.h 1970-01-01 01:00:00.000000000 +0100
  9347. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cmdline.h 2009-08-23 19:01:04.000000000 +0200
  9348. @@ -0,0 +1,9 @@
  9349. +/* machine-specific command line initialization */
  9350. +#ifdef CONFIG_SYS_HAS_MACH_PROM_INIT_CMDLINE
  9351. +extern void __init mach_prom_init_cmdline(void);
  9352. +#else
  9353. +void __init mach_prom_init_cmdline(void)
  9354. +{
  9355. +}
  9356. +#endif
  9357. +
  9358. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
  9359. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
  9360. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h 2009-08-23 19:01:04.000000000 +0200
  9361. @@ -0,0 +1,59 @@
  9362. +/*
  9363. + * This file is subject to the terms and conditions of the GNU General Public
  9364. + * License. See the file "COPYING" in the main directory of this archive
  9365. + * for more details.
  9366. + *
  9367. + * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
  9368. + * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
  9369. + * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
  9370. + *
  9371. + * reference: /proc/cpuinfo,
  9372. + * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
  9373. + * arch/mips/kernel/proc.c(show_cpuinfo),
  9374. + * loongson2f user manual.
  9375. + */
  9376. +
  9377. +#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
  9378. +#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
  9379. +
  9380. +#define cpu_dcache_line_size() 32
  9381. +#define cpu_icache_line_size() 32
  9382. +#define cpu_scache_line_size() 32
  9383. +
  9384. +
  9385. +#define cpu_has_32fpr 1
  9386. +#define cpu_has_3k_cache 0
  9387. +#define cpu_has_4k_cache 1
  9388. +#define cpu_has_4kex 1
  9389. +#define cpu_has_64bits 1
  9390. +#define cpu_has_cache_cdex_p 0
  9391. +#define cpu_has_cache_cdex_s 0
  9392. +#define cpu_has_counter 1
  9393. +#define cpu_has_dc_aliases 1
  9394. +#define cpu_has_divec 0
  9395. +#define cpu_has_dsp 0
  9396. +#define cpu_has_ejtag 0
  9397. +#define cpu_has_fpu 1
  9398. +#define cpu_has_ic_fills_f_dc 0
  9399. +#define cpu_has_inclusive_pcaches 1
  9400. +#define cpu_has_llsc 1
  9401. +#define cpu_has_mcheck 0
  9402. +#define cpu_has_mdmx 0
  9403. +#define cpu_has_mips16 0
  9404. +#define cpu_has_mips32r1 0
  9405. +#define cpu_has_mips32r2 0
  9406. +#define cpu_has_mips3d 0
  9407. +#define cpu_has_mips64r1 0
  9408. +#define cpu_has_mips64r2 0
  9409. +#define cpu_has_mipsmt 0
  9410. +#define cpu_has_prefetch 0
  9411. +#define cpu_has_smartmips 0
  9412. +#define cpu_has_tlb 1
  9413. +#define cpu_has_tx39_cache 0
  9414. +#define cpu_has_userlocal 0
  9415. +#define cpu_has_vce 0
  9416. +#define cpu_has_vtag_icache 0
  9417. +#define cpu_has_watch 1
  9418. +#define cpu_icache_snoops_remote_store 1
  9419. +
  9420. +#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */
  9421. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h
  9422. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h 1970-01-01 01:00:00.000000000 +0100
  9423. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h 2009-08-23 19:01:04.000000000 +0200
  9424. @@ -0,0 +1,382 @@
  9425. +/*
  9426. + * The header file of cs5536 sourth bridge.
  9427. + *
  9428. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  9429. + * Author : jlliu <liujl@lemote.com>
  9430. + */
  9431. +
  9432. +#ifndef _CS5536_H
  9433. +#define _CS5536_H
  9434. +
  9435. +#include <linux/types.h>
  9436. +
  9437. +extern void _rdmsr(u32 msr, u32 *hi, u32 *lo);
  9438. +extern void _wrmsr(u32 msr, u32 hi, u32 lo);
  9439. +
  9440. +/*
  9441. + * MSR module base
  9442. + */
  9443. +#define CS5536_SB_MSR_BASE (0x00000000)
  9444. +#define CS5536_GLIU_MSR_BASE (0x10000000)
  9445. +#define CS5536_ILLEGAL_MSR_BASE (0x20000000)
  9446. +#define CS5536_USB_MSR_BASE (0x40000000)
  9447. +#define CS5536_IDE_MSR_BASE (0x60000000)
  9448. +#define CS5536_DIVIL_MSR_BASE (0x80000000)
  9449. +#define CS5536_ACC_MSR_BASE (0xa0000000)
  9450. +#define CS5536_UNUSED_MSR_BASE (0xc0000000)
  9451. +#define CS5536_GLCP_MSR_BASE (0xe0000000)
  9452. +
  9453. +#define SB_MSR_REG(offset) (CS5536_SB_MSR_BASE | (offset))
  9454. +#define GLIU_MSR_REG(offset) (CS5536_GLIU_MSR_BASE | (offset))
  9455. +#define ILLEGAL_MSR_REG(offset) (CS5536_ILLEGAL_MSR_BASE | (offset))
  9456. +#define USB_MSR_REG(offset) (CS5536_USB_MSR_BASE | (offset))
  9457. +#define IDE_MSR_REG(offset) (CS5536_IDE_MSR_BASE | (offset))
  9458. +#define DIVIL_MSR_REG(offset) (CS5536_DIVIL_MSR_BASE | (offset))
  9459. +#define ACC_MSR_REG(offset) (CS5536_ACC_MSR_BASE | (offset))
  9460. +#define UNUSED_MSR_REG(offset) (CS5536_UNUSED_MSR_BASE | (offset))
  9461. +#define GLCP_MSR_REG(offset) (CS5536_GLCP_MSR_BASE | (offset))
  9462. +
  9463. +/*
  9464. + * BAR SPACE OF VIRTUAL PCI :
  9465. + * range for pci probe use, length is the actual size.
  9466. + */
  9467. +/* IO space for all DIVIL modules */
  9468. +#define CS5536_IRQ_RANGE 0xffffffe0 /* USERD FOR PCI PROBE */
  9469. +#define CS5536_IRQ_LENGTH 0x20 /* THE REGS ACTUAL LENGTH */
  9470. +#define CS5536_SMB_RANGE 0xfffffff8
  9471. +#define CS5536_SMB_LENGTH 0x08
  9472. +#define CS5536_GPIO_RANGE 0xffffff00
  9473. +#define CS5536_GPIO_LENGTH 0x100
  9474. +#define CS5536_MFGPT_RANGE 0xffffffc0
  9475. +#define CS5536_MFGPT_LENGTH 0x40
  9476. +#define CS5536_ACPI_RANGE 0xffffffe0
  9477. +#define CS5536_ACPI_LENGTH 0x20
  9478. +#define CS5536_PMS_RANGE 0xffffff80
  9479. +#define CS5536_PMS_LENGTH 0x80
  9480. +/* MEM space for 4KB nand flash; IO space for 16B nor flash. */
  9481. +#ifdef CS5536_NOR_FLASH
  9482. +#define CS5536_FLSH_LENGTH 0x10
  9483. +#define CS5536_FLSH_RANGE 0xfffffff0
  9484. +#else
  9485. +#define CS5536_FLSH_RANGE 0xfffff000
  9486. +#define CS5536_FLSH_LENGTH 0x1000
  9487. +#endif
  9488. +/* IO space for IDE */
  9489. +#define CS5536_IDE_RANGE 0xfffffff0
  9490. +#define CS5536_IDE_LENGTH 0x10
  9491. +/* IO space for ACC */
  9492. +#define CS5536_ACC_RANGE 0xffffff80
  9493. +#define CS5536_ACC_LENGTH 0x80
  9494. +/* MEM space for ALL USB modules */
  9495. +#define CS5536_OHCI_RANGE 0xfffff000
  9496. +#define CS5536_OHCI_LENGTH 0x1000
  9497. +#define CS5536_EHCI_RANGE 0xfffff000
  9498. +#define CS5536_EHCI_LENGTH 0x1000
  9499. +#define CS5536_UDC_RANGE 0xffffe000
  9500. +#define CS5536_UDC_LENGTH 0x2000
  9501. +#define CS5536_OTG_RANGE 0xfffff000
  9502. +#define CS5536_OTG_LENGTH 0x1000
  9503. +
  9504. +/*
  9505. + * PCI MSR ACCESS
  9506. + */
  9507. +#define PCI_MSR_CTRL 0xF0
  9508. +#define PCI_MSR_ADDR 0xF4
  9509. +#define PCI_MSR_DATA_LO 0xF8
  9510. +#define PCI_MSR_DATA_HI 0xFC
  9511. +
  9512. +/**************** MSR *****************************/
  9513. +
  9514. +/*
  9515. + * GLIU STANDARD MSR
  9516. + */
  9517. +#define GLIU_CAP 0x00
  9518. +#define GLIU_CONFIG 0x01
  9519. +#define GLIU_SMI 0x02
  9520. +#define GLIU_ERROR 0x03
  9521. +#define GLIU_PM 0x04
  9522. +#define GLIU_DIAG 0x05
  9523. +
  9524. +/*
  9525. + * GLIU SPEC. MSR
  9526. + */
  9527. +#define GLIU_P2D_BM0 0x20
  9528. +#define GLIU_P2D_BM1 0x21
  9529. +#define GLIU_P2D_BM2 0x22
  9530. +#define GLIU_P2D_BMK0 0x23
  9531. +#define GLIU_P2D_BMK1 0x24
  9532. +#define GLIU_P2D_BM3 0x25
  9533. +#define GLIU_P2D_BM4 0x26
  9534. +#define GLIU_COH 0x80
  9535. +#define GLIU_PAE 0x81
  9536. +#define GLIU_ARB 0x82
  9537. +#define GLIU_ASMI 0x83
  9538. +#define GLIU_AERR 0x84
  9539. +#define GLIU_DEBUG 0x85
  9540. +#define GLIU_PHY_CAP 0x86
  9541. +#define GLIU_NOUT_RESP 0x87
  9542. +#define GLIU_NOUT_WDATA 0x88
  9543. +#define GLIU_WHOAMI 0x8B
  9544. +#define GLIU_SLV_DIS 0x8C
  9545. +#define GLIU_IOD_BM0 0xE0
  9546. +#define GLIU_IOD_BM1 0xE1
  9547. +#define GLIU_IOD_BM2 0xE2
  9548. +#define GLIU_IOD_BM3 0xE3
  9549. +#define GLIU_IOD_BM4 0xE4
  9550. +#define GLIU_IOD_BM5 0xE5
  9551. +#define GLIU_IOD_BM6 0xE6
  9552. +#define GLIU_IOD_BM7 0xE7
  9553. +#define GLIU_IOD_BM8 0xE8
  9554. +#define GLIU_IOD_BM9 0xE9
  9555. +#define GLIU_IOD_SC0 0xEA
  9556. +#define GLIU_IOD_SC1 0xEB
  9557. +#define GLIU_IOD_SC2 0xEC
  9558. +#define GLIU_IOD_SC3 0xED
  9559. +#define GLIU_IOD_SC4 0xEE
  9560. +#define GLIU_IOD_SC5 0xEF
  9561. +#define GLIU_IOD_SC6 0xF0
  9562. +#define GLIU_IOD_SC7 0xF1
  9563. +
  9564. +/*
  9565. + * SB STANDARD
  9566. + */
  9567. +#define SB_CAP 0x00
  9568. +#define SB_CONFIG 0x01
  9569. +#define SB_SMI 0x02
  9570. +#define SB_ERROR 0x03
  9571. +#define SB_MAR_ERR_EN 0x00000001
  9572. +#define SB_TAR_ERR_EN 0x00000002
  9573. +#define SB_RSVD_BIT1 0x00000004
  9574. +#define SB_EXCEP_ERR_EN 0x00000008
  9575. +#define SB_SYSE_ERR_EN 0x00000010
  9576. +#define SB_PARE_ERR_EN 0x00000020
  9577. +#define SB_TAS_ERR_EN 0x00000040
  9578. +#define SB_MAR_ERR_FLAG 0x00010000
  9579. +#define SB_TAR_ERR_FLAG 0x00020000
  9580. +#define SB_RSVD_BIT2 0x00040000
  9581. +#define SB_EXCEP_ERR_FLAG 0x00080000
  9582. +#define SB_SYSE_ERR_FLAG 0x00100000
  9583. +#define SB_PARE_ERR_FLAG 0x00200000
  9584. +#define SB_TAS_ERR_FLAG 0x00400000
  9585. +#define SB_PM 0x04
  9586. +#define SB_DIAG 0x05
  9587. +
  9588. +/*
  9589. + * SB SPEC.
  9590. + */
  9591. +#define SB_CTRL 0x10
  9592. +#define SB_R0 0x20
  9593. +#define SB_R1 0x21
  9594. +#define SB_R2 0x22
  9595. +#define SB_R3 0x23
  9596. +#define SB_R4 0x24
  9597. +#define SB_R5 0x25
  9598. +#define SB_R6 0x26
  9599. +#define SB_R7 0x27
  9600. +#define SB_R8 0x28
  9601. +#define SB_R9 0x29
  9602. +#define SB_R10 0x2A
  9603. +#define SB_R11 0x2B
  9604. +#define SB_R12 0x2C
  9605. +#define SB_R13 0x2D
  9606. +#define SB_R14 0x2E
  9607. +#define SB_R15 0x2F
  9608. +
  9609. +/*
  9610. + * GLCP STANDARD
  9611. + */
  9612. +#define GLCP_CAP 0x00
  9613. +#define GLCP_CONFIG 0x01
  9614. +#define GLCP_SMI 0x02
  9615. +#define GLCP_ERROR 0x03
  9616. +#define GLCP_PM 0x04
  9617. +#define GLCP_DIAG 0x05
  9618. +
  9619. +/*
  9620. + * GLCP SPEC.
  9621. + */
  9622. +#define GLCP_CLK_DIS_DELAY 0x08
  9623. +#define GLCP_PM_CLK_DISABLE 0x09
  9624. +#define GLCP_GLB_PM 0x0B
  9625. +#define GLCP_DBG_OUT 0x0C
  9626. +#define GLCP_RSVD1 0x0D
  9627. +#define GLCP_SOFT_COM 0x0E
  9628. +#define SOFT_BAR_SMB_FLAG 0x00000001
  9629. +#define SOFT_BAR_GPIO_FLAG 0x00000002
  9630. +#define SOFT_BAR_MFGPT_FLAG 0x00000004
  9631. +#define SOFT_BAR_IRQ_FLAG 0x00000008
  9632. +#define SOFT_BAR_PMS_FLAG 0x00000010
  9633. +#define SOFT_BAR_ACPI_FLAG 0x00000020
  9634. +#define SOFT_BAR_FLSH0_FLAG 0x00000040
  9635. +#define SOFT_BAR_FLSH1_FLAG 0x00000080
  9636. +#define SOFT_BAR_FLSH2_FLAG 0x00000100
  9637. +#define SOFT_BAR_FLSH3_FLAG 0x00000200
  9638. +#define SOFT_BAR_IDE_FLAG 0x00000400
  9639. +#define SOFT_BAR_ACC_FLAG 0x00000800
  9640. +#define SOFT_BAR_OHCI_FLAG 0x00001000
  9641. +#define SOFT_BAR_EHCI_FLAG 0x00002000
  9642. +#define SOFT_BAR_UDC_FLAG 0x00004000
  9643. +#define SOFT_BAR_OTG_FLAG 0x00008000
  9644. +#define GLCP_RSVD2 0x0F
  9645. +#define GLCP_CLK_OFF 0x10
  9646. +#define GLCP_CLK_ACTIVE 0x11
  9647. +#define GLCP_CLK_DISABLE 0x12
  9648. +#define GLCP_CLK4ACK 0x13
  9649. +#define GLCP_SYS_RST 0x14
  9650. +#define GLCP_RSVD3 0x15
  9651. +#define GLCP_DBG_CLK_CTRL 0x16
  9652. +#define GLCP_CHIP_REV_ID 0x17
  9653. +
  9654. +/*
  9655. + * DIVIL STANDARD
  9656. + */
  9657. +#define DIVIL_CAP 0x00
  9658. +#define DIVIL_CONFIG 0x01
  9659. +#define DIVIL_SMI 0x02
  9660. +#define DIVIL_ERROR 0x03
  9661. +#define DIVIL_PM 0x04
  9662. +#define DIVIL_DIAG 0x05
  9663. +
  9664. +/*
  9665. + * DIVIL SPEC.
  9666. + */
  9667. +#define DIVIL_LBAR_IRQ 0x08
  9668. +#define DIVIL_LBAR_KEL 0x09
  9669. +#define DIVIL_LBAR_SMB 0x0B
  9670. +#define DIVIL_LBAR_GPIO 0x0C
  9671. +#define DIVIL_LBAR_MFGPT 0x0D
  9672. +#define DIVIL_LBAR_ACPI 0x0E
  9673. +#define DIVIL_LBAR_PMS 0x0F
  9674. +#define DIVIL_LBAR_FLSH0 0x10
  9675. +#define DIVIL_LBAR_FLSH1 0x11
  9676. +#define DIVIL_LBAR_FLSH2 0x12
  9677. +#define DIVIL_LBAR_FLSH3 0x13
  9678. +#define DIVIL_LEG_IO 0x14
  9679. +#define DIVIL_BALL_OPTS 0x15
  9680. +#define DIVIL_SOFT_IRQ 0x16
  9681. +#define DIVIL_SOFT_RESET 0x17
  9682. +/* NOR FLASH */
  9683. +#define NORF_CTRL 0x18
  9684. +#define NORF_T01 0x19
  9685. +#define NORF_T23 0x1A
  9686. +/* NAND FLASH */
  9687. +#define NANDF_DATA 0x1B
  9688. +#define NANDF_CTRL 0x1C
  9689. +#define NANDF_RSVD 0x1D
  9690. +/* KEL Keyboard Emulation Logic */
  9691. +#define KEL_CTRL 0x1F
  9692. +/* PIC */
  9693. +#define PIC_YSEL_LOW 0x20
  9694. +#define PIC_YSEL_LOW_USB_SHIFT 8
  9695. +#define PIC_YSEL_LOW_ACC_SHIFT 16
  9696. +#define PIC_YSEL_LOW_FLASH_SHIFT 24
  9697. +#define PIC_YSEL_HIGH 0x21
  9698. +#define PIC_ZSEL_LOW 0x22
  9699. +#define PIC_ZSEL_HIGH 0x23
  9700. +#define PIC_IRQM_PRIM 0x24
  9701. +#define PIC_IRQM_LPC 0x25
  9702. +#define PIC_XIRR_STS_LOW 0x26
  9703. +#define PIC_XIRR_STS_HIGH 0x27
  9704. +#define PCI_SHDW 0x34
  9705. +/* MFGPT */
  9706. +#define MFGPT_IRQ 0x28
  9707. +#define MFGPT_NR 0x29
  9708. +#define MFGPT_RSVD 0x2A
  9709. +#define MFGPT_SETUP 0x2B
  9710. +/* FLOPPY */
  9711. +#define FLPY_3F2_SHDW 0x30
  9712. +#define FLPY_3F7_SHDW 0x31
  9713. +#define FLPY_372_SHDW 0x32
  9714. +#define FLPY_377_SHDW 0x33
  9715. +/* PIT */
  9716. +#define PIT_SHDW 0x36
  9717. +#define PIT_CNTRL 0x37
  9718. +/* UART */
  9719. +#define UART1_MOD 0x38
  9720. +#define UART1_DONG 0x39
  9721. +#define UART1_CONF 0x3A
  9722. +#define UART1_RSVD 0x3B
  9723. +#define UART2_MOD 0x3C
  9724. +#define UART2_DONG 0x3D
  9725. +#define UART2_CONF 0x3E
  9726. +#define UART2_RSVD 0x3F
  9727. +/* DMA */
  9728. +#define DIVIL_AC_DMA 0x1E
  9729. +#define DMA_MAP 0x40
  9730. +#define DMA_SHDW_CH0 0x41
  9731. +#define DMA_SHDW_CH1 0x42
  9732. +#define DMA_SHDW_CH2 0x43
  9733. +#define DMA_SHDW_CH3 0x44
  9734. +#define DMA_SHDW_CH4 0x45
  9735. +#define DMA_SHDW_CH5 0x46
  9736. +#define DMA_SHDW_CH6 0x47
  9737. +#define DMA_SHDW_CH7 0x48
  9738. +#define DMA_MSK_SHDW 0x49
  9739. +/* LPC */
  9740. +#define LPC_EADDR 0x4C
  9741. +#define LPC_ESTAT 0x4D
  9742. +#define LPC_SIRQ 0x4E
  9743. +#define LPC_RSVD 0x4F
  9744. +/* PMC */
  9745. +#define PMC_LTMR 0x50
  9746. +#define PMC_RSVD 0x51
  9747. +/* RTC */
  9748. +#define RTC_RAM_LOCK 0x54
  9749. +#define RTC_DOMA_OFFSET 0x55
  9750. +#define RTC_MONA_OFFSET 0x56
  9751. +#define RTC_CEN_OFFSET 0x57
  9752. +
  9753. +/*
  9754. + * IDE STANDARD
  9755. + */
  9756. +#define IDE_CAP 0x00
  9757. +#define IDE_CONFIG 0x01
  9758. +#define IDE_SMI 0x02
  9759. +#define IDE_ERROR 0x03
  9760. +#define IDE_PM 0x04
  9761. +#define IDE_DIAG 0x05
  9762. +
  9763. +/*
  9764. + * IDE SPEC.
  9765. + */
  9766. +#define IDE_IO_BAR 0x08
  9767. +#define IDE_CFG 0x10
  9768. +#define IDE_DTC 0x12
  9769. +#define IDE_CAST 0x13
  9770. +#define IDE_ETC 0x14
  9771. +#define IDE_INTERNAL_PM 0x15
  9772. +
  9773. +/*
  9774. + * ACC STANDARD
  9775. + */
  9776. +#define ACC_CAP 0x00
  9777. +#define ACC_CONFIG 0x01
  9778. +#define ACC_SMI 0x02
  9779. +#define ACC_ERROR 0x03
  9780. +#define ACC_PM 0x04
  9781. +#define ACC_DIAG 0x05
  9782. +
  9783. +/*
  9784. + * USB STANDARD
  9785. + */
  9786. +#define USB_CAP 0x00
  9787. +#define USB_CONFIG 0x01
  9788. +#define USB_SMI 0x02
  9789. +#define USB_ERROR 0x03
  9790. +#define USB_PM 0x04
  9791. +#define USB_DIAG 0x05
  9792. +
  9793. +/*
  9794. + * USB SPEC.
  9795. + */
  9796. +#define USB_OHCI 0x08
  9797. +#define USB_EHCI 0x09
  9798. +#define USB_UDC 0x0A
  9799. +#define USB_OTG 0x0B
  9800. +
  9801. +/****************** NATIVE ***************************/
  9802. +/* GPIO : I/O SPACE; REG : 32BITS */
  9803. +#define GPIOL_OUT_VAL 0x00
  9804. +#define GPIOL_OUT_EN 0x04
  9805. +
  9806. +#endif /* _CS5536_H */
  9807. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h
  9808. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h 1970-01-01 01:00:00.000000000 +0100
  9809. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h 2009-08-23 19:01:04.000000000 +0200
  9810. @@ -0,0 +1,27 @@
  9811. +/*
  9812. + * cs5536 mfgpt header file
  9813. + */
  9814. +
  9815. +#ifndef _CS5536_MFGPT_H
  9816. +#define _CS5536_MFGPT_H
  9817. +
  9818. +#include <cs5536/cs5536.h>
  9819. +
  9820. +extern u32 mfgpt_base;
  9821. +extern void setup_mfgpt_timer(void);
  9822. +
  9823. +#if 1
  9824. +#define MFGPT_TICK_RATE 14318000
  9825. +#else
  9826. +#define MFGPT_TICK_RATE (14318180 / 8)
  9827. +#endif
  9828. +#define COMPARE ((MFGPT_TICK_RATE + HZ/2) / HZ)
  9829. +
  9830. +#define CS5536_MFGPT_INTR 5
  9831. +
  9832. +#define MFGPT_BASE mfgpt_base
  9833. +#define MFGPT0_CMP2 (MFGPT_BASE + 2)
  9834. +#define MFGPT0_CNT (MFGPT_BASE + 4)
  9835. +#define MFGPT0_SETUP (MFGPT_BASE + 6)
  9836. +
  9837. +#endif /*!_CS5536_MFGPT_H */
  9838. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h
  9839. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h 1970-01-01 01:00:00.000000000 +0100
  9840. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h 2009-08-23 19:01:04.000000000 +0200
  9841. @@ -0,0 +1,174 @@
  9842. +/*
  9843. + * the definition file of cs5536 Virtual Support Module(VSM).
  9844. + * pci configuration space can be accessed through the VSM, so
  9845. + * there is no need of the MSR read/write now, except the spec.
  9846. + * MSR registers which are not implemented yet.
  9847. + *
  9848. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  9849. + * Author : jlliu, liujl@lemote.com
  9850. + */
  9851. +
  9852. +#ifndef _CS5536_PCI_H
  9853. +#define _CS5536_PCI_H
  9854. +
  9855. +#include <linux/types.h>
  9856. +#include <linux/pci_regs.h>
  9857. +
  9858. +extern void cs5536_pci_conf_write4(int function, int reg, u32 value);
  9859. +extern u32 cs5536_pci_conf_read4(int function, int reg);
  9860. +
  9861. +#define CS5536_FLASH_INTR 6
  9862. +#define CS5536_ACC_INTR 9
  9863. +#define CS5536_IDE_INTR 14
  9864. +#define CS5536_USB_INTR 11
  9865. +#define CS5536_UART1_INTR 4
  9866. +#define CS5536_UART2_INTR 3
  9867. +
  9868. +/************** PCI BUS DEVICE FUNCTION ***************/
  9869. +
  9870. +/*
  9871. + * PCI bus device function
  9872. + */
  9873. +#define PCI_BUS_CS5536 0
  9874. +#define PCI_IDSEL_CS5536 14
  9875. +
  9876. +/********** STANDARD PCI-2.2 EXPANSION ****************/
  9877. +
  9878. +/*
  9879. + * PCI configuration space
  9880. + * we have to virtualize the PCI configure space head, so we should
  9881. + * define the necessary IDs and some others.
  9882. + */
  9883. +
  9884. +/* CONFIG of PCI VENDOR ID*/
  9885. +#define CFG_PCI_VENDOR_ID(mod_dev_id, sys_vendor_id) \
  9886. + (((mod_dev_id) << 16) | (sys_vendor_id))
  9887. +
  9888. +/* VENDOR ID */
  9889. +#define CS5536_VENDOR_ID 0x1022
  9890. +
  9891. +/* DEVICE ID */
  9892. +#define CS5536_ISA_DEVICE_ID 0x2090
  9893. +#define CS5536_FLASH_DEVICE_ID 0x2091
  9894. +#define CS5536_IDE_DEVICE_ID 0x209a
  9895. +#define CS5536_ACC_DEVICE_ID 0x2093
  9896. +#define CS5536_OHCI_DEVICE_ID 0x2094
  9897. +#define CS5536_EHCI_DEVICE_ID 0x2095
  9898. +#define CS5536_UDC_DEVICE_ID 0x2096
  9899. +#define CS5536_OTG_DEVICE_ID 0x2097
  9900. +
  9901. +/* CLASS CODE : CLASS SUB-CLASS INTERFACE */
  9902. +#define CS5536_ISA_CLASS_CODE 0x060100
  9903. +#define CS5536_FLASH_CLASS_CODE 0x050100
  9904. +#define CS5536_IDE_CLASS_CODE 0x010180
  9905. +#define CS5536_ACC_CLASS_CODE 0x040100
  9906. +#define CS5536_OHCI_CLASS_CODE 0x0C0310
  9907. +#define CS5536_EHCI_CLASS_CODE 0x0C0320
  9908. +#define CS5536_UDC_CLASS_CODE 0x0C03FE
  9909. +#define CS5536_OTG_CLASS_CODE 0x0C0380
  9910. +
  9911. +/* BHLC : BIST HEADER-TYPE LATENCY-TIMER CACHE-LINE-SIZE */
  9912. +
  9913. +#define CFG_PCI_CACHE_LINE_SIZE(header_type, latency_timer) \
  9914. + ((PCI_NONE_BIST << 24) | ((header_type) << 16) \
  9915. + | ((latency_timer) << 8) | PCI_NORMAL_CACHE_LINE_SIZE);
  9916. +
  9917. +#define PCI_NONE_BIST 0x00 /* RO not implemented yet. */
  9918. +#define PCI_BRIDGE_HEADER_TYPE 0x80 /* RO */
  9919. +#define PCI_NORMAL_HEADER_TYPE 0x00
  9920. +#define PCI_NORMAL_LATENCY_TIMER 0x00
  9921. +#define PCI_NORMAL_CACHE_LINE_SIZE 0x08 /* RW */
  9922. +
  9923. +/* BAR */
  9924. +#define PCI_BAR0_REG 0x10
  9925. +#define PCI_BAR1_REG 0x14
  9926. +#define PCI_BAR2_REG 0x18
  9927. +#define PCI_BAR3_REG 0x1c
  9928. +#define PCI_BAR4_REG 0x20
  9929. +#define PCI_BAR5_REG 0x24
  9930. +#define PCI_BAR_COUNT 6
  9931. +#define PCI_BAR_RANGE_MASK 0xFFFFFFFF
  9932. +
  9933. +/* CARDBUS CIS POINTER */
  9934. +#define PCI_CARDBUS_CIS_POINTER 0x00000000
  9935. +
  9936. +/* SUBSYSTEM VENDOR ID */
  9937. +#define CS5536_SUB_VENDOR_ID CS5536_VENDOR_ID
  9938. +
  9939. +/* SUBSYSTEM ID */
  9940. +#define CS5536_ISA_SUB_ID CS5536_ISA_DEVICE_ID
  9941. +#define CS5536_FLASH_SUB_ID CS5536_FLASH_DEVICE_ID
  9942. +#define CS5536_IDE_SUB_ID CS5536_IDE_DEVICE_ID
  9943. +#define CS5536_ACC_SUB_ID CS5536_ACC_DEVICE_ID
  9944. +#define CS5536_OHCI_SUB_ID CS5536_OHCI_DEVICE_ID
  9945. +#define CS5536_EHCI_SUB_ID CS5536_EHCI_DEVICE_ID
  9946. +#define CS5536_UDC_SUB_ID CS5536_UDC_DEVICE_ID
  9947. +#define CS5536_OTG_SUB_ID CS5536_OTG_DEVICE_ID
  9948. +
  9949. +/* EXPANSION ROM BAR */
  9950. +#define PCI_EXPANSION_ROM_BAR 0x00000000
  9951. +
  9952. +/* CAPABILITIES POINTER */
  9953. +#define PCI_CAPLIST_POINTER 0x00000000
  9954. +#define PCI_CAPLIST_USB_POINTER 0x40
  9955. +/* INTERRUPT */
  9956. +
  9957. +#define CFG_PCI_INTERRUPT_LINE(pin, mod_intr) \
  9958. + ((PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | \
  9959. + ((pin) << 8) | (mod_intr))
  9960. +
  9961. +#define PCI_MAX_LATENCY 0x40
  9962. +#define PCI_MIN_GRANT 0x00
  9963. +#define PCI_DEFAULT_PIN 0x01
  9964. +
  9965. +/*********** EXPANSION PCI REG ************************/
  9966. +
  9967. +/*
  9968. + * ISA EXPANSION
  9969. + */
  9970. +#define PCI_UART1_INT_REG 0x50
  9971. +#define PCI_UART2_INT_REG 0x54
  9972. +#define PCI_ISA_FIXUP_REG 0x58
  9973. +
  9974. +/*
  9975. + * FLASH EXPANSION
  9976. + */
  9977. +#define PCI_FLASH_INT_REG 0x50
  9978. +#define PCI_NOR_FLASH_CTRL_REG 0x40
  9979. +#define PCI_NOR_FLASH_T01_REG 0x44
  9980. +#define PCI_NOR_FLASH_T23_REG 0x48
  9981. +#define PCI_NAND_FLASH_TDATA_REG 0x60
  9982. +#define PCI_NAND_FLASH_TCTRL_REG 0x64
  9983. +#define PCI_NAND_FLASH_RSVD_REG 0x68
  9984. +#define PCI_FLASH_SELECT_REG 0x70
  9985. +
  9986. +/*
  9987. + * IDE EXPANSION
  9988. + */
  9989. +#define PCI_IDE_CFG_REG 0x40
  9990. +#define CS5536_IDE_FLASH_SIGNATURE 0xDEADBEEF
  9991. +#define PCI_IDE_DTC_REG 0x48
  9992. +#define PCI_IDE_CAST_REG 0x4C
  9993. +#define PCI_IDE_ETC_REG 0x50
  9994. +#define PCI_IDE_PM_REG 0x54
  9995. +#define PCI_IDE_INT_REG 0x60
  9996. +
  9997. +/*
  9998. + * ACC EXPANSION
  9999. + */
  10000. +#define PCI_ACC_INT_REG 0x50
  10001. +
  10002. +/*
  10003. + * OHCI EXPANSION : INTTERUPT IS IMPLEMENTED BY THE OHCI
  10004. + */
  10005. +#define PCI_OHCI_PM_REG 0x40
  10006. +#define PCI_OHCI_INT_REG 0x50
  10007. +
  10008. +/*
  10009. + * EHCI EXPANSION
  10010. + */
  10011. +#define PCI_EHCI_LEGSMIEN_REG 0x50
  10012. +#define PCI_EHCI_LEGSMISTS_REG 0x54
  10013. +#define PCI_EHCI_FLADJ_REG 0x60
  10014. +
  10015. +#endif /* _CS5536_PCI_H_ */
  10016. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h
  10017. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h 1970-01-01 01:00:00.000000000 +0100
  10018. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h 2009-08-23 19:01:04.000000000 +0200
  10019. @@ -0,0 +1,59 @@
  10020. +/*
  10021. + * the Virtual Support Module(VSM) read/write interfaces
  10022. + *
  10023. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  10024. + * Author: Wu Zhangjin <wuzj@lemote.com>
  10025. + */
  10026. +
  10027. +#ifndef _CS5536_VSM_H
  10028. +#define _CS5536_VSM_H
  10029. +
  10030. +#include <linux/types.h>
  10031. +
  10032. +#define DECLARE_CS5536_MODULE(name) \
  10033. +extern void pci_##name##_write_reg(int reg, u32 value); \
  10034. +extern u32 pci_##name##_read_reg(int reg);
  10035. +
  10036. +#define DEFINE_CS5536_MODULE(name) \
  10037. +void pci_##name##_write_reg(int reg, u32 value)\
  10038. +{ \
  10039. + return; \
  10040. +} \
  10041. +u32 pci_##name##_read_reg(int reg) \
  10042. +{ \
  10043. + return 0xffffffff; \
  10044. +} \
  10045. +
  10046. +/* core modules of cs5536 */
  10047. +
  10048. +/* ide module */
  10049. +DECLARE_CS5536_MODULE(ide)
  10050. +/* acc module */
  10051. +DECLARE_CS5536_MODULE(acc)
  10052. +/* ohci module */
  10053. +DECLARE_CS5536_MODULE(ohci)
  10054. +/* isa module */
  10055. +DECLARE_CS5536_MODULE(isa)
  10056. +/* ehci module */
  10057. +DECLARE_CS5536_MODULE(ehci)
  10058. +
  10059. +/* selective modules of cs5536 */
  10060. +/* flash(nor or nand flash) module */
  10061. +#ifdef CONFIG_CS5536_FLASH
  10062. + DECLARE_CS5536_MODULE(flash)
  10063. +#else
  10064. + DEFINE_CS5536_MODULE(flash)
  10065. +#endif
  10066. +/* otg module */
  10067. +#ifdef CONFIG_CS5536_OTG
  10068. + DECLARE_CS5536_MODULE(otg)
  10069. +#else
  10070. + DEFINE_CS5536_MODULE(otg)
  10071. +#endif
  10072. +/* udc module */
  10073. +#ifdef CONFIG_CS5536_UDC
  10074. + DECLARE_CS5536_MODULE(udc)
  10075. +#else
  10076. + DEFINE_CS5536_MODULE(udc)
  10077. +#endif
  10078. +#endif /* _CS5536_VSM_H */
  10079. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/dbg.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/dbg.h
  10080. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/dbg.h 1970-01-01 01:00:00.000000000 +0100
  10081. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/dbg.h 2009-08-23 19:01:04.000000000 +0200
  10082. @@ -0,0 +1,17 @@
  10083. +/*
  10084. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  10085. + *
  10086. + * This program is free software; you can redistribute it and/or modify it
  10087. + * under the terms of the GNU General Public License as published by the
  10088. + * Free Software Foundation; either version 2 of the License, or (at your
  10089. + * option) any later version.
  10090. + */
  10091. +
  10092. +#ifndef _ASM_MACH_LOONGSON_DBG_H_
  10093. +#define _ASM_MACH_LOONGSON_DBG_H_
  10094. +
  10095. +/* serial port print support */
  10096. +extern void prom_putchar(char c);
  10097. +extern void prom_printf(char *fmt, ...);
  10098. +
  10099. +#endif /* _ASM_MACH_LOONGSON_DBG_H_ */
  10100. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/dma-coherence.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/dma-coherence.h
  10101. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/dma-coherence.h 1970-01-01 01:00:00.000000000 +0100
  10102. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/dma-coherence.h 2009-08-23 19:01:04.000000000 +0200
  10103. @@ -0,0 +1,70 @@
  10104. +/*
  10105. + * This file is subject to the terms and conditions of the GNU General Public
  10106. + * License. See the file "COPYING" in the main directory of this archive
  10107. + * for more details.
  10108. + *
  10109. + * Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
  10110. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  10111. + * Author: Fuxin Zhang, zhangfx@lemote.com
  10112. + *
  10113. + */
  10114. +#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
  10115. +#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
  10116. +
  10117. +struct device;
  10118. +
  10119. +static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
  10120. + size_t size)
  10121. +{
  10122. + return virt_to_phys(addr) | 0x80000000;
  10123. +}
  10124. +
  10125. +static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
  10126. + struct page *page)
  10127. +{
  10128. + return page_to_phys(page) | 0x80000000;
  10129. +}
  10130. +
  10131. +static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
  10132. +{
  10133. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  10134. + return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff);
  10135. +#else
  10136. + return dma_addr & 0x7fffffff;
  10137. +#endif
  10138. +}
  10139. +
  10140. +static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr)
  10141. +{
  10142. +}
  10143. +
  10144. +static inline int plat_dma_supported(struct device *dev, u64 mask)
  10145. +{
  10146. + /*
  10147. + * we fall back to GFP_DMA when the mask isn't all 1s,
  10148. + * so we can't guarantee allocations that must be
  10149. + * within a tighter range than GFP_DMA..
  10150. + */
  10151. + if (mask < DMA_BIT_MASK(24))
  10152. + return 0;
  10153. +
  10154. + return 1;
  10155. +}
  10156. +
  10157. +static inline void plat_extra_sync_for_device(struct device *dev)
  10158. +{
  10159. + return;
  10160. +}
  10161. +
  10162. +static inline int plat_dma_mapping_error(struct device *dev,
  10163. + dma_addr_t dma_addr)
  10164. +{
  10165. + return 0;
  10166. +}
  10167. +
  10168. +static inline int plat_device_is_coherent(struct device *dev)
  10169. +{
  10170. + return 0;
  10171. +}
  10172. +
  10173. +#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
  10174. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/loongson.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/loongson.h
  10175. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/loongson.h 1970-01-01 01:00:00.000000000 +0100
  10176. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/loongson.h 2009-08-23 19:01:04.000000000 +0200
  10177. @@ -0,0 +1,319 @@
  10178. +/*
  10179. + * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
  10180. + *
  10181. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  10182. + * Author: Wu Zhangjin <wuzj@lemote.com>
  10183. + *
  10184. + * This program is free software; you can redistribute it and/or modify it
  10185. + * under the terms of the GNU General Public License as published by the
  10186. + * Free Software Foundation; either version 2 of the License, or (at your
  10187. + * option) any later version.
  10188. + *
  10189. + */
  10190. +
  10191. +#ifndef __LOONGSON_H
  10192. +#define __LOONGSON_H
  10193. +
  10194. +#include <linux/io.h>
  10195. +#include <linux/init.h>
  10196. +
  10197. +/* loongson internal northbridge initialization */
  10198. +extern void bonito_irq_init(void);
  10199. +
  10200. +/* environment arguments from bootloader */
  10201. +extern unsigned long bus_clock, cpu_clock_freq;
  10202. +extern unsigned long memsize, highmemsize;
  10203. +
  10204. +/* loongson-based machines specific reboot setup */
  10205. +extern void loongson_reboot_setup(void);
  10206. +
  10207. +/* loongson-specific command line, env and memory initialization */
  10208. +extern void __init prom_init_memory(void);
  10209. +extern void __init prom_init_cmdline(void);
  10210. +extern void __init prom_init_env(void);
  10211. +
  10212. +/* irq operation functions */
  10213. +extern void bonito_irqdispatch(void);
  10214. +extern void i8259_irqdispatch(void);
  10215. +extern void __init bonito_irq_init(void);
  10216. +extern void __init set_irq_trigger_mode(void);
  10217. +extern int mach_i8259_irq(void);
  10218. +extern void mach_irq_dispatch(unsigned int pending);
  10219. +
  10220. +/* machine-specific reboot/halt operation */
  10221. +extern void mach_prepare_reboot(void);
  10222. +extern void mach_prepare_shutdown(void);
  10223. +
  10224. +/* We need this in some places... */
  10225. +#define delay() ({ \
  10226. + int x; \
  10227. + for (x = 0; x < 100000; x++) \
  10228. + __asm__ __volatile__(""); \
  10229. +})
  10230. +
  10231. +/* loongson-specific cpu frequency relative stuff */
  10232. +#ifdef CONFIG_LOONGSON2F_CPU_FREQ
  10233. +#include <linux/cpufreq.h>
  10234. +extern void loongson2f_cpu_wait(void);
  10235. +extern struct cpufreq_frequency_table loongson2f_clockmod_table[];
  10236. +#endif
  10237. +
  10238. +#define LOONGSON_REG(x) \
  10239. + (*(u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
  10240. +
  10241. +#define LOONGSON_IRQ_BASE 32
  10242. +#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
  10243. +
  10244. +#define LOONGSON_FLASH_BASE 0x1c000000
  10245. +#define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
  10246. +#define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
  10247. +
  10248. +#define LOONGSON_LIO0_BASE 0x1e000000
  10249. +#define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
  10250. +#define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
  10251. +
  10252. +#define LOONGSON_BOOT_BASE 0x1fc00000
  10253. +#define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
  10254. +#define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
  10255. +#define LOONGSON_REG_BASE 0x1fe00000
  10256. +#define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
  10257. +#define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
  10258. +
  10259. +#define LOONGSON_LIO1_BASE 0x1ff00000
  10260. +#define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */
  10261. +#define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
  10262. +
  10263. +#define LOONGSON_PCILO0_BASE 0x10000000
  10264. +#define LOONGSON_PCILO1_BASE 0x14000000
  10265. +#define LOONGSON_PCILO2_BASE 0x18000000
  10266. +#define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE
  10267. +#define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */
  10268. +#define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
  10269. +
  10270. +#define LOONGSON_PCICFG_BASE 0x1fe80000
  10271. +#define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */
  10272. +#define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
  10273. +#define LOONGSON_PCIIO_BASE 0x1fd00000
  10274. +#define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */
  10275. +#define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
  10276. +
  10277. +/* Loongson Register Bases */
  10278. +
  10279. +#define LOONGSON_PCICONFIGBASE 0x00
  10280. +#define LOONGSON_REGBASE 0x100
  10281. +
  10282. +/* PCI Configuration Registers */
  10283. +
  10284. +#define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
  10285. +#define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00)
  10286. +#define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04)
  10287. +#define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08)
  10288. +#define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c)
  10289. +#define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10)
  10290. +#define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14)
  10291. +#define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18)
  10292. +#define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c)
  10293. +#define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20)
  10294. +#define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30)
  10295. +#define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c)
  10296. +
  10297. +#define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c)
  10298. +
  10299. +#define LOONGSON_PCICMD_PERR_CLR 0x80000000
  10300. +#define LOONGSON_PCICMD_SERR_CLR 0x40000000
  10301. +#define LOONGSON_PCICMD_MABORT_CLR 0x20000000
  10302. +#define LOONGSON_PCICMD_MTABORT_CLR 0x10000000
  10303. +#define LOONGSON_PCICMD_TABORT_CLR 0x08000000
  10304. +#define LOONGSON_PCICMD_MPERR_CLR 0x01000000
  10305. +#define LOONGSON_PCICMD_PERRRESPEN 0x00000040
  10306. +#define LOONGSON_PCICMD_ASTEPEN 0x00000080
  10307. +#define LOONGSON_PCICMD_SERREN 0x00000100
  10308. +#define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00
  10309. +#define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8
  10310. +
  10311. +/* Loongson h/w Configuration */
  10312. +
  10313. +#define LOONGSON_GENCFG_OFFSET 0x4
  10314. +#define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
  10315. +
  10316. +#define LOONGSON_GENCFG_DEBUGMODE 0x00000001
  10317. +#define LOONGSON_GENCFG_SNOOPEN 0x00000002
  10318. +#define LOONGSON_GENCFG_CPUSELFRESET 0x00000004
  10319. +
  10320. +#define LOONGSON_GENCFG_FORCE_IRQA 0x00000008
  10321. +#define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010
  10322. +#define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020
  10323. +#define LOONGSON_GENCFG_BYTESWAP 0x00000040
  10324. +
  10325. +#define LOONGSON_GENCFG_UNCACHED 0x00000080
  10326. +#define LOONGSON_GENCFG_PREFETCHEN 0x00000100
  10327. +#define LOONGSON_GENCFG_WBEHINDEN 0x00000200
  10328. +#define LOONGSON_GENCFG_CACHEALG 0x00000c00
  10329. +#define LOONGSON_GENCFG_CACHEALG_SHIFT 10
  10330. +#define LOONGSON_GENCFG_PCIQUEUE 0x00001000
  10331. +#define LOONGSON_GENCFG_CACHESTOP 0x00002000
  10332. +#define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000
  10333. +#define LOONGSON_GENCFG_BUSERREN 0x00008000
  10334. +#define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000
  10335. +#define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000
  10336. +
  10337. +/* PCI address map control */
  10338. +
  10339. +#define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10)
  10340. +#define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14)
  10341. +#define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18)
  10342. +
  10343. +/* GPIO Regs - r/w */
  10344. +
  10345. +#define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
  10346. +#define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20)
  10347. +
  10348. +/* ICU Configuration Regs - r/w */
  10349. +
  10350. +#define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24)
  10351. +#define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28)
  10352. +#define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
  10353. +
  10354. +/* ICU Enable Regs - IntEn & IntISR are r/o. */
  10355. +
  10356. +#define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30)
  10357. +#define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34)
  10358. +#define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38)
  10359. +#define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
  10360. +
  10361. +/* ICU */
  10362. +#define LOONGSON_ICU_MBOXES 0x0000000f
  10363. +#define LOONGSON_ICU_MBOXES_SHIFT 0
  10364. +#define LOONGSON_ICU_DMARDY 0x00000010
  10365. +#define LOONGSON_ICU_DMAEMPTY 0x00000020
  10366. +#define LOONGSON_ICU_COPYRDY 0x00000040
  10367. +#define LOONGSON_ICU_COPYEMPTY 0x00000080
  10368. +#define LOONGSON_ICU_COPYERR 0x00000100
  10369. +#define LOONGSON_ICU_PCIIRQ 0x00000200
  10370. +#define LOONGSON_ICU_MASTERERR 0x00000400
  10371. +#define LOONGSON_ICU_SYSTEMERR 0x00000800
  10372. +#define LOONGSON_ICU_DRAMPERR 0x00001000
  10373. +#define LOONGSON_ICU_RETRYERR 0x00002000
  10374. +#define LOONGSON_ICU_GPIOS 0x01ff0000
  10375. +#define LOONGSON_ICU_GPIOS_SHIFT 16
  10376. +#define LOONGSON_ICU_GPINS 0x7e000000
  10377. +#define LOONGSON_ICU_GPINS_SHIFT 25
  10378. +#define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
  10379. +#define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
  10380. +#define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
  10381. +
  10382. +/* PCI prefetch window base & mask */
  10383. +
  10384. +#define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40)
  10385. +#define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44)
  10386. +#define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48)
  10387. +#define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
  10388. +
  10389. +/* PCI_Hit*_Sel_* */
  10390. +
  10391. +#define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50)
  10392. +#define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54)
  10393. +#define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58)
  10394. +#define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
  10395. +#define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60)
  10396. +#define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64)
  10397. +
  10398. +/* PXArb Config & Status */
  10399. +
  10400. +#define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68)
  10401. +#define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
  10402. +
  10403. +/* Chip Config */
  10404. +#define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80)
  10405. +
  10406. +/* pcimap */
  10407. +
  10408. +#define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f
  10409. +#define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0
  10410. +#define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0
  10411. +#define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6
  10412. +#define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000
  10413. +#define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12
  10414. +#define LOONGSON_PCIMAP_PCIMAP_2 0x00040000
  10415. +#define LOONGSON_PCIMAP_WIN(WIN, ADDR) \
  10416. + ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
  10417. +
  10418. +/*
  10419. + * address windows configuration module
  10420. + *
  10421. + * loongson2e do not have this module
  10422. + */
  10423. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  10424. +
  10425. +/* address window config module base address */
  10426. +#define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul
  10427. +#define LOONGSON_ADDRWINCFG_SIZE 0x180
  10428. +
  10429. +extern unsigned long _loongson_addrwincfg_base;
  10430. +#define LOONGSON_ADDRWINCFG(offset) \
  10431. + (*(u64 *)(_loongson_addrwincfg_base + (offset)))
  10432. +
  10433. +#define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00)
  10434. +#define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08)
  10435. +#define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10)
  10436. +#define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18)
  10437. +
  10438. +#define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20)
  10439. +#define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28)
  10440. +#define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30)
  10441. +#define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38)
  10442. +
  10443. +#define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40)
  10444. +#define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48)
  10445. +#define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50)
  10446. +#define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58)
  10447. +
  10448. +#define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60)
  10449. +#define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68)
  10450. +#define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70)
  10451. +#define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78)
  10452. +
  10453. +#define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80)
  10454. +#define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88)
  10455. +#define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90)
  10456. +#define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98)
  10457. +
  10458. +#define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0)
  10459. +#define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8)
  10460. +#define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0)
  10461. +#define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8)
  10462. +
  10463. +#define ADDRWIN_WIN0 0
  10464. +#define ADDRWIN_WIN1 1
  10465. +#define ADDRWIN_WIN2 2
  10466. +#define ADDRWIN_WIN3 3
  10467. +
  10468. +#define ADDRWIN_MAP_DST_DDR 0
  10469. +#define ADDRWIN_MAP_DST_PCI 1
  10470. +#define ADDRWIN_MAP_DST_LIO 1
  10471. +
  10472. +/*
  10473. + * s: CPU, PCIDMA
  10474. + * d: DDR, PCI, LIO
  10475. + * win: 0, 1, 2, 3
  10476. + * src: map source
  10477. + * dst: map destination
  10478. + * size: ~mask + 1
  10479. + */
  10480. +#define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\
  10481. + s##_WIN##w##_BASE = (src); \
  10482. + s##_WIN##w##_MMAP = (src) | ADDRWIN_MAP_DST_##d; \
  10483. + s##_WIN##w##_MASK = ~(size-1); \
  10484. +} while (0)
  10485. +
  10486. +#define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \
  10487. + LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size)
  10488. +#define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \
  10489. + LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size)
  10490. +#define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \
  10491. + LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size)
  10492. +
  10493. +#endif /* ! CONFIG_CPU_LOONGSON2F && CONFIG_64BIT */
  10494. +
  10495. +#endif /* __LOONGSON_H */
  10496. +
  10497. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/machine.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/machine.h
  10498. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/machine.h 1970-01-01 01:00:00.000000000 +0100
  10499. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/machine.h 2009-08-23 19:01:04.000000000 +0200
  10500. @@ -0,0 +1,76 @@
  10501. +/*
  10502. + * board-specific header file
  10503. + *
  10504. + * Copyright (c) 2009 Wu Zhangjin <wuzj@lemote.com>
  10505. + *
  10506. + * Copyright (C) 2009 Zhang Le
  10507. + *
  10508. + * This program is free software; you can redistribute it
  10509. + * and/or modify it under the terms of the GNU General
  10510. + * Public License as published by the Free Software
  10511. + * Foundation; either version 2 of the License, or (at your
  10512. + * option) any later version.
  10513. + */
  10514. +
  10515. +#ifndef __MACHINE_H
  10516. +#define __MACHINE_H
  10517. +
  10518. +#ifdef CONFIG_LEMOTE_FULOONG2E
  10519. +
  10520. +#define MACHTYPE MACH_LEMOTE_FL2E
  10521. +
  10522. +#define LOONGSON_UART_BASE (LOONGSON_PCIIO_BASE + 0x3f8)
  10523. +#define LOONGSON_UART_BAUD 1843200
  10524. +#define LOONGSON_UART_IOTYPE UPIO_PORT
  10525. +
  10526. +#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2)
  10527. +#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 4)
  10528. +#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 5)
  10529. +#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7)
  10530. +#define LOONGSON_DMATIMEOUT_IRQ (LOONGSON_IRQ_BASE + 10)
  10531. +
  10532. +#elif defined(CONFIG_LEMOTE_FULOONG2F)
  10533. +
  10534. +#define MACHTYPE MACH_LEMOTE_FL2F
  10535. +
  10536. +#define LOONGSON_UART_BASE (LOONGSON_PCIIO_BASE + 0x2f8)
  10537. +#define LOONGSON_UART_BAUD 1843200
  10538. +#define LOONGSON_UART_IOTYPE UPIO_PORT
  10539. +
  10540. +#else /* CONFIG_CPU_YEELOONG2F */
  10541. +
  10542. +#define MACHTYPE MACH_LEMOTE_YL2F89
  10543. +
  10544. +/* yeeloong use the CPU serial port of Loongson2F */
  10545. +#define LOONGSON_UART_BASE (LOONGSON_LIO1_BASE + 0x3f8)
  10546. +#define LOONGSON_UART_BAUD 3686400
  10547. +#define LOONGSON_UART_IOTYPE UPIO_MEM
  10548. +
  10549. +#endif /* !CONFIG_LEMOTE_FULOONG2E */
  10550. +
  10551. +/* fuloong2f and yeeloong2f have the same IRQ control interface */
  10552. +#if defined(CONFIG_LEMOTE_FULOONG2F) || defined(CONFIG_LEMOTE_YEELOONG2F)
  10553. +
  10554. +#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */
  10555. +#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */
  10556. +#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */
  10557. +#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */
  10558. +
  10559. +#define LOONGSON_INT_BIT_GPIO1 (1 << 1)
  10560. +#define LOONGSON_INT_BIT_GPIO2 (1 << 2)
  10561. +#define LOONGSON_INT_BIT_GPIO3 (1 << 3)
  10562. +#define LOONGSON_INT_BIT_PCI_INTA (1 << 4)
  10563. +#define LOONGSON_INT_BIT_PCI_INTB (1 << 5)
  10564. +#define LOONGSON_INT_BIT_PCI_INTC (1 << 6)
  10565. +#define LOONGSON_INT_BIT_PCI_INTD (1 << 7)
  10566. +#define LOONGSON_INT_BIT_PCI_PERR (1 << 8)
  10567. +#define LOONGSON_INT_BIT_PCI_SERR (1 << 9)
  10568. +#define LOONGSON_INT_BIT_DDR (1 << 10)
  10569. +#define LOONGSON_INT_BIT_INT0 (1 << 11)
  10570. +#define LOONGSON_INT_BIT_INT1 (1 << 12)
  10571. +#define LOONGSON_INT_BIT_INT2 (1 << 13)
  10572. +#define LOONGSON_INT_BIT_INT3 (1 << 14)
  10573. +
  10574. +#endif
  10575. +
  10576. +#endif /* ! __MACHINE_H */
  10577. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/mc146818rtc.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/mc146818rtc.h
  10578. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/mc146818rtc.h 1970-01-01 01:00:00.000000000 +0100
  10579. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/mc146818rtc.h 2009-08-23 19:01:04.000000000 +0200
  10580. @@ -0,0 +1,36 @@
  10581. +/*
  10582. + * This file is subject to the terms and conditions of the GNU General Public
  10583. + * License. See the file "COPYING" in the main directory of this archive
  10584. + * for more details.
  10585. + *
  10586. + * Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
  10587. + *
  10588. + * RTC routines for PC style attached Dallas chip.
  10589. + */
  10590. +#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H
  10591. +#define __ASM_MACH_LOONGSON_MC146818RTC_H
  10592. +
  10593. +#include <linux/io.h>
  10594. +
  10595. +#define RTC_PORT(x) (0x70 + (x))
  10596. +#define RTC_IRQ 8
  10597. +
  10598. +static inline unsigned char CMOS_READ(unsigned long addr)
  10599. +{
  10600. + outb_p(addr, RTC_PORT(0));
  10601. + return inb_p(RTC_PORT(1));
  10602. +}
  10603. +
  10604. +static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
  10605. +{
  10606. + outb_p(addr, RTC_PORT(0));
  10607. + outb_p(data, RTC_PORT(1));
  10608. +}
  10609. +
  10610. +#define RTC_ALWAYS_BCD 0
  10611. +
  10612. +#ifndef mc146818_decode_year
  10613. +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
  10614. +#endif
  10615. +
  10616. +#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */
  10617. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/mem.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/mem.h
  10618. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/mem.h 1970-01-01 01:00:00.000000000 +0100
  10619. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/mem.h 2009-08-23 19:01:04.000000000 +0200
  10620. @@ -0,0 +1,31 @@
  10621. +#ifndef __MEM_H
  10622. +#define __MEM_H
  10623. +
  10624. +/*
  10625. + * high memory space
  10626. + *
  10627. + * in loongson2e, starts from 512M
  10628. + * in loongson2f, starts from 2G + 256M
  10629. + */
  10630. +#ifdef CONFIG_CPU_LOONGSON2E
  10631. +#define LOONGSON_HIGHMEM_START 0x20000000
  10632. +#else
  10633. +#define LOONGSON_HIGHMEM_START 0x90000000
  10634. +#endif
  10635. +
  10636. +/*
  10637. + * the peripheral registers(MMIO):
  10638. + *
  10639. + * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000.
  10640. + * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000.
  10641. + */
  10642. +
  10643. +#define LOONGSON_MMIO_MEM_START 0x10000000
  10644. +
  10645. +#ifdef CONFIG_CPU_LOONGSON2E
  10646. +#define LOONGSON_MMIO_MEM_END 0x20000000
  10647. +#else
  10648. +#define LOONGSON_MMIO_MEM_END 0x80000000
  10649. +#endif
  10650. +
  10651. +#endif /* !__MEM_H */
  10652. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/pci.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/pci.h
  10653. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/pci.h 1970-01-01 01:00:00.000000000 +0100
  10654. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/pci.h 2009-08-23 19:01:04.000000000 +0200
  10655. @@ -0,0 +1,59 @@
  10656. +/*
  10657. + * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
  10658. + * Copyright (c) 2009 Wu Zhangjin <wuzj@lemote.com>
  10659. + *
  10660. + * This program is free software; you can redistribute it
  10661. + * and/or modify it under the terms of the GNU General
  10662. + * Public License as published by the Free Software
  10663. + * Foundation; either version 2 of the License, or (at your
  10664. + * option) any later version.
  10665. + *
  10666. + * This program is distributed in the hope that it will be
  10667. + * useful, but WITHOUT ANY WARRANTY; without even the implied
  10668. + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  10669. + * PURPOSE. See the GNU General Public License for more
  10670. + * details.
  10671. + *
  10672. + * You should have received a copy of the GNU General Public
  10673. + * License along with this program; if not, write to the Free
  10674. + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
  10675. + * 02139, USA.
  10676. + */
  10677. +
  10678. +#ifndef _LOONGSON_PCI_H_
  10679. +#define _LOONGSON_PCI_H_
  10680. +
  10681. +extern struct pci_ops loongson_pci_ops;
  10682. +
  10683. +/* this is an offset from mips_io_port_base */
  10684. +#define LOONGSON_PCI_IO_START 0x00004000UL
  10685. +
  10686. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  10687. +
  10688. +/*
  10689. + * we use address window2 to map cpu address space to pci space
  10690. + * window2: cpu [1G, 2G] -> pci [1G, 2G]
  10691. + * why not use window 0 & 1? because they are used by cpu when booting.
  10692. + * window0: cpu [0, 256M] -> ddr [0, 256M]
  10693. + * window1: cpu [256M, 512M] -> pci [256M, 512M]
  10694. + */
  10695. +
  10696. +/* the smallest LOONGSON_CPU_MEM_SRC can be 512M */
  10697. +#define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */
  10698. +#define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC
  10699. +
  10700. +#define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST
  10701. +#define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */
  10702. +
  10703. +#define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \
  10704. + LOONGSON_PCI_MEM_START + 1)
  10705. +
  10706. +#else /* loongson2f/32bit & loongson2e */
  10707. +
  10708. +#define LOONGSON_PCI_MEM_START 0x14000000UL
  10709. +#define LOONGSON_PCI_MEM_END 0x1fffffffUL
  10710. +
  10711. +#endif /* !(defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT))*/
  10712. +
  10713. +
  10714. +#endif /* !_LOONGSON_PCI_H_ */
  10715. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/war.h linux-2.6.30.5/arch/mips/include/asm/mach-loongson/war.h
  10716. --- linux-2.6.30.5.orig/arch/mips/include/asm/mach-loongson/war.h 1970-01-01 01:00:00.000000000 +0100
  10717. +++ linux-2.6.30.5/arch/mips/include/asm/mach-loongson/war.h 2009-08-23 19:01:04.000000000 +0200
  10718. @@ -0,0 +1,25 @@
  10719. +/*
  10720. + * This file is subject to the terms and conditions of the GNU General Public
  10721. + * License. See the file "COPYING" in the main directory of this archive
  10722. + * for more details.
  10723. + *
  10724. + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  10725. + */
  10726. +#ifndef __ASM_MIPS_MACH_LOONGSON_WAR_H
  10727. +#define __ASM_MIPS_MACH_LOONGSON_WAR_H
  10728. +
  10729. +#define R4600_V1_INDEX_ICACHEOP_WAR 0
  10730. +#define R4600_V1_HIT_CACHEOP_WAR 0
  10731. +#define R4600_V2_HIT_CACHEOP_WAR 0
  10732. +#define R5432_CP0_INTERRUPT_WAR 0
  10733. +#define BCM1250_M3_WAR 0
  10734. +#define SIBYTE_1956_WAR 0
  10735. +#define MIPS4K_ICACHE_REFILL_WAR 0
  10736. +#define MIPS_CACHE_SYNC_WAR 0
  10737. +#define TX49XX_ICACHE_INDEX_INV_WAR 0
  10738. +#define RM9000_CDEX_SMP_WAR 0
  10739. +#define ICACHE_REFILLS_WORKAROUND_WAR 0
  10740. +#define R10000_LLSC_WAR 0
  10741. +#define MIPS34K_MISSED_ITLB_WAR 0
  10742. +
  10743. +#endif /* __ASM_MIPS_MACH_LOONGSON_WAR_H */
  10744. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/mips-boards/bonito64.h linux-2.6.30.5/arch/mips/include/asm/mips-boards/bonito64.h
  10745. --- linux-2.6.30.5.orig/arch/mips/include/asm/mips-boards/bonito64.h 2009-08-16 23:19:38.000000000 +0200
  10746. +++ linux-2.6.30.5/arch/mips/include/asm/mips-boards/bonito64.h 2009-08-23 19:01:04.000000000 +0200
  10747. @@ -26,11 +26,6 @@
  10748. /* offsets from base register */
  10749. #define BONITO(x) (x)
  10750. -#elif defined(CONFIG_LEMOTE_FULONG)
  10751. -
  10752. -#define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)))
  10753. -#define BONITO_IRQ_BASE 32
  10754. -
  10755. #else
  10756. /*
  10757. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/page.h linux-2.6.30.5/arch/mips/include/asm/page.h
  10758. --- linux-2.6.30.5.orig/arch/mips/include/asm/page.h 2009-08-16 23:19:38.000000000 +0200
  10759. +++ linux-2.6.30.5/arch/mips/include/asm/page.h 2009-08-23 19:01:04.000000000 +0200
  10760. @@ -179,8 +179,9 @@
  10761. #endif
  10762. -#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
  10763. -#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr)))
  10764. +#define virt_to_page(kaddr) \
  10765. + pfn_to_page(PFN_DOWN(virt_to_phys((void *)kaddr)))
  10766. +#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys((void *)kaddr)))
  10767. #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
  10768. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  10769. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/pci.h linux-2.6.30.5/arch/mips/include/asm/pci.h
  10770. --- linux-2.6.30.5.orig/arch/mips/include/asm/pci.h 2009-08-16 23:19:38.000000000 +0200
  10771. +++ linux-2.6.30.5/arch/mips/include/asm/pci.h 2009-08-23 19:01:04.000000000 +0200
  10772. @@ -56,7 +56,7 @@
  10773. /*
  10774. * board supplied pci irq fixup routine
  10775. */
  10776. -extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  10777. +extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
  10778. /* Can be used to override the logic in pci_scan_bus for skipping
  10779. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/pgtable.h linux-2.6.30.5/arch/mips/include/asm/pgtable.h
  10780. --- linux-2.6.30.5.orig/arch/mips/include/asm/pgtable.h 2009-08-16 23:19:38.000000000 +0200
  10781. +++ linux-2.6.30.5/arch/mips/include/asm/pgtable.h 2009-08-23 19:01:04.000000000 +0200
  10782. @@ -370,6 +370,19 @@
  10783. #include <asm-generic/pgtable.h>
  10784. /*
  10785. + * uncache accelerate for video memory access
  10786. + */
  10787. +#ifdef CONFIG_LOONGSON2F
  10788. +#define __HAVE_PHYS_MEM_ACCESS_PROT
  10789. +
  10790. +struct file;
  10791. +pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
  10792. + unsigned long size, pgprot_t vma_prot);
  10793. +int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
  10794. + unsigned long size, pgprot_t *vma_prot);
  10795. +#endif
  10796. +
  10797. +/*
  10798. * We provide our own get_unmapped area to cope with the virtual aliasing
  10799. * constraints placed on us by the cache architecture.
  10800. */
  10801. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/stackframe.h linux-2.6.30.5/arch/mips/include/asm/stackframe.h
  10802. --- linux-2.6.30.5.orig/arch/mips/include/asm/stackframe.h 2009-08-16 23:19:38.000000000 +0200
  10803. +++ linux-2.6.30.5/arch/mips/include/asm/stackframe.h 2009-08-23 19:01:04.000000000 +0200
  10804. @@ -117,6 +117,20 @@
  10805. .endm
  10806. #else
  10807. .macro get_saved_sp /* Uniprocessor variation */
  10808. +#ifdef CONFIG_CPU_LOONGSON2
  10809. + move k0, ra
  10810. + jal 2008f
  10811. + nop
  10812. +2008 : jal 2008f
  10813. + nop
  10814. +2008 : jal 2008f
  10815. + nop
  10816. +2008 : jal 2008f
  10817. + nop
  10818. +2008 : move ra, k0
  10819. + li k0, 3
  10820. + mtc0 k0, $22
  10821. +#endif
  10822. #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
  10823. lui k1, %hi(kernelsp)
  10824. #else
  10825. diff -Nur linux-2.6.30.5.orig/arch/mips/include/asm/suspend.h linux-2.6.30.5/arch/mips/include/asm/suspend.h
  10826. --- linux-2.6.30.5.orig/arch/mips/include/asm/suspend.h 2009-08-16 23:19:38.000000000 +0200
  10827. +++ linux-2.6.30.5/arch/mips/include/asm/suspend.h 2009-08-23 20:29:58.000000000 +0200
  10828. @@ -1,6 +1,9 @@
  10829. #ifndef __ASM_SUSPEND_H
  10830. #define __ASM_SUSPEND_H
  10831. -/* Somewhen... Maybe :-) */
  10832. +static inline int arch_prepare_suspend(void) { return 0; }
  10833. +
  10834. +/* References to section boundaries */
  10835. +extern const void __nosave_begin, __nosave_end;
  10836. #endif /* __ASM_SUSPEND_H */
  10837. diff -Nur linux-2.6.30.5.orig/arch/mips/Kconfig linux-2.6.30.5/arch/mips/Kconfig
  10838. --- linux-2.6.30.5.orig/arch/mips/Kconfig 2009-08-16 23:19:38.000000000 +0200
  10839. +++ linux-2.6.30.5/arch/mips/Kconfig 2009-08-23 19:01:56.000000000 +0200
  10840. @@ -6,7 +6,7 @@
  10841. select HAVE_ARCH_KGDB
  10842. # Horrible source of confusion. Die, die, die ...
  10843. select EMBEDDED
  10844. - select RTC_LIB
  10845. + select RTC_LIB if !MACH_LOONGSON
  10846. mainmenu "Linux/MIPS Kernel Configuration"
  10847. @@ -154,30 +154,19 @@
  10848. select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
  10849. select SYS_SUPPORTS_LITTLE_ENDIAN
  10850. -config LEMOTE_FULONG
  10851. - bool "Lemote Fulong mini-PC"
  10852. - select ARCH_SPARSEMEM_ENABLE
  10853. - select CEVT_R4K
  10854. - select CSRC_R4K
  10855. - select SYS_HAS_CPU_LOONGSON2
  10856. - select DMA_NONCOHERENT
  10857. - select BOOT_ELF32
  10858. - select BOARD_SCACHE
  10859. - select HAVE_STD_PC_SERIAL_PORT
  10860. - select HW_HAS_PCI
  10861. - select I8259
  10862. - select ISA
  10863. - select IRQ_CPU
  10864. - select SYS_SUPPORTS_32BIT_KERNEL
  10865. - select SYS_SUPPORTS_64BIT_KERNEL
  10866. - select SYS_SUPPORTS_LITTLE_ENDIAN
  10867. - select SYS_SUPPORTS_HIGHMEM
  10868. - select SYS_HAS_EARLY_PRINTK
  10869. - select GENERIC_ISA_DMA_SUPPORT_BROKEN
  10870. - select CPU_HAS_WB
  10871. - help
  10872. - Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
  10873. - an FPGA northbridge
  10874. +config MACH_LOONGSON
  10875. + bool "Loongson family of machines"
  10876. + select HAVE_KERNEL_GZIP
  10877. + select HAVE_KERNEL_BZIP2
  10878. + select HAVE_KERNEL_LZMA
  10879. + select LOONGSON_PLATFORM_DEVICES
  10880. + help
  10881. + This enables the support of Loongson family of machines.
  10882. +
  10883. + Loongson is a family of general-purpose MIPS-compatible CPUs.
  10884. + developed at Institute of Computing Technology (ICT),
  10885. + Chinese Academy of Sciences (CAS) in the People's Republic
  10886. + of China. The chief architect is Professor Weiwu Hu.
  10887. config MIPS_MALTA
  10888. bool "MIPS Malta board"
  10889. @@ -643,6 +632,7 @@
  10890. source "arch/mips/txx9/Kconfig"
  10891. source "arch/mips/vr41xx/Kconfig"
  10892. source "arch/mips/cavium-octeon/Kconfig"
  10893. +source "arch/mips/loongson/Kconfig"
  10894. endmenu
  10895. @@ -1005,16 +995,29 @@
  10896. prompt "CPU type"
  10897. default CPU_R4X00
  10898. -config CPU_LOONGSON2
  10899. - bool "Loongson 2"
  10900. - depends on SYS_HAS_CPU_LOONGSON2
  10901. - select CPU_SUPPORTS_32BIT_KERNEL
  10902. - select CPU_SUPPORTS_64BIT_KERNEL
  10903. - select CPU_SUPPORTS_HIGHMEM
  10904. +config CPU_LOONGSON2E
  10905. + bool "Loongson 2E"
  10906. + depends on SYS_HAS_CPU_LOONGSON2E
  10907. + select CPU_LOONGSON2
  10908. help
  10909. The Loongson 2E processor implements the MIPS III instruction set
  10910. with many extensions.
  10911. + It has an internal FPGA northbridge, which is compatiable to
  10912. + bonito64.
  10913. +
  10914. +config CPU_LOONGSON2F
  10915. + bool "Loongson 2F"
  10916. + depends on SYS_HAS_CPU_LOONGSON2F
  10917. + select CPU_LOONGSON2
  10918. + help
  10919. + The Loongson 2F processor implements the MIPS III instruction set
  10920. + with many extensions.
  10921. +
  10922. + Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
  10923. + have a similar programming interface with FPGA northbridge used in
  10924. + Loongson2E.
  10925. +
  10926. config CPU_MIPS32_R1
  10927. bool "MIPS32 Release 1"
  10928. depends on SYS_HAS_CPU_MIPS32_R1
  10929. @@ -1253,7 +1256,16 @@
  10930. endchoice
  10931. -config SYS_HAS_CPU_LOONGSON2
  10932. +config CPU_LOONGSON2
  10933. + bool
  10934. + select CPU_SUPPORTS_32BIT_KERNEL
  10935. + select CPU_SUPPORTS_64BIT_KERNEL
  10936. + select CPU_SUPPORTS_HIGHMEM
  10937. +
  10938. +config SYS_HAS_CPU_LOONGSON2E
  10939. + bool
  10940. +
  10941. +config SYS_HAS_CPU_LOONGSON2F
  10942. bool
  10943. config SYS_HAS_CPU_MIPS32_R1
  10944. @@ -2121,14 +2133,35 @@
  10945. menu "Power management options"
  10946. +config ARCH_HIBERNATION_POSSIBLE
  10947. + def_bool y
  10948. + depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
  10949. +
  10950. config ARCH_SUSPEND_POSSIBLE
  10951. - def_bool y
  10952. - depends on !SMP
  10953. + def_bool y
  10954. + depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
  10955. source "kernel/power/Kconfig"
  10956. endmenu
  10957. +menu "CPU Frequency scaling"
  10958. +
  10959. +source "drivers/cpufreq/Kconfig"
  10960. +
  10961. +config LOONGSON2F_CPU_FREQ
  10962. + bool "Loongson-2F CPU Frequency driver"
  10963. + depends on CPU_LOONGSON2F && CPU_FREQ && (CS5536_MFGPT || I8253)
  10964. + select CPU_FREQ_TABLE
  10965. + help
  10966. + This adds the cpufreq driver for Loongson-2F.
  10967. +
  10968. + For details, take a look at <file:Documentation/cpu-freq>.
  10969. +
  10970. + If unsure, say N.
  10971. +
  10972. +endmenu
  10973. +
  10974. source "net/Kconfig"
  10975. source "drivers/Kconfig"
  10976. diff -Nur linux-2.6.30.5.orig/arch/mips/kernel/asm-offsets.c linux-2.6.30.5/arch/mips/kernel/asm-offsets.c
  10977. --- linux-2.6.30.5.orig/arch/mips/kernel/asm-offsets.c 2009-08-16 23:19:38.000000000 +0200
  10978. +++ linux-2.6.30.5/arch/mips/kernel/asm-offsets.c 2009-08-23 21:30:52.000000000 +0200
  10979. @@ -14,6 +14,7 @@
  10980. #include <linux/mm.h>
  10981. #include <linux/interrupt.h>
  10982. #include <linux/kbuild.h>
  10983. +#include <linux/suspend.h>
  10984. #include <asm/ptrace.h>
  10985. #include <asm/processor.h>
  10986. @@ -326,3 +327,15 @@
  10987. BLANK();
  10988. }
  10989. #endif
  10990. +
  10991. +#ifdef CONFIG_HIBERNATION
  10992. +void output_pbe_defines(void)
  10993. +{
  10994. + COMMENT(" Linux struct pbe offsets. ");
  10995. + OFFSET(PBE_ADDRESS, pbe, address);
  10996. + OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
  10997. + OFFSET(PBE_NEXT, pbe, next);
  10998. + DEFINE(PBE_SIZE, sizeof(struct pbe));
  10999. + BLANK();
  11000. +}
  11001. +#endif
  11002. diff -Nur linux-2.6.30.5.orig/arch/mips/kernel/i8259.c linux-2.6.30.5/arch/mips/kernel/i8259.c
  11003. --- linux-2.6.30.5.orig/arch/mips/kernel/i8259.c 2009-08-16 23:19:38.000000000 +0200
  11004. +++ linux-2.6.30.5/arch/mips/kernel/i8259.c 2009-08-23 19:01:04.000000000 +0200
  11005. @@ -177,10 +177,12 @@
  11006. outb(cached_slave_mask, PIC_SLAVE_IMR);
  11007. outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
  11008. outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
  11009. + inb(PIC_MASTER_CMD); /* flush posted write */
  11010. } else {
  11011. inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
  11012. outb(cached_master_mask, PIC_MASTER_IMR);
  11013. outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
  11014. + inb(PIC_MASTER_CMD); /* flush posted write */
  11015. }
  11016. smtc_im_ack_irq(irq);
  11017. spin_unlock_irqrestore(&i8259A_lock, flags);
  11018. diff -Nur linux-2.6.30.5.orig/arch/mips/kernel/loongson2f_freq.c linux-2.6.30.5/arch/mips/kernel/loongson2f_freq.c
  11019. --- linux-2.6.30.5.orig/arch/mips/kernel/loongson2f_freq.c 1970-01-01 01:00:00.000000000 +0100
  11020. +++ linux-2.6.30.5/arch/mips/kernel/loongson2f_freq.c 2009-08-23 19:01:04.000000000 +0200
  11021. @@ -0,0 +1,216 @@
  11022. +/*
  11023. + * arch/mips/kernel/cpufreq.c
  11024. + *
  11025. + * cpufreq driver for the loongson-2f processors.
  11026. + *
  11027. + * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology
  11028. + * Author: Yanhua, yanh@lemote.com
  11029. + *
  11030. + * This file is subject to the terms and conditions of the GNU General Public
  11031. + * License. See the file "COPYING" in the main directory of this archive
  11032. + * for more details.
  11033. + */
  11034. +#include <linux/types.h>
  11035. +#include <linux/cpufreq.h>
  11036. +#include <linux/kernel.h>
  11037. +#include <linux/module.h>
  11038. +#include <linux/init.h>
  11039. +#include <linux/err.h>
  11040. +#include <linux/cpumask.h>
  11041. +#include <linux/smp.h>
  11042. +#include <linux/sched.h> /* set_cpus_allowed() */
  11043. +#include <linux/clk.h>
  11044. +#include <linux/delay.h>
  11045. +
  11046. +#include <loongson.h>
  11047. +#include <clock.h>
  11048. +
  11049. +static uint nowait;
  11050. +
  11051. +static struct clk *cpuclk;
  11052. +
  11053. +static void (*saved_cpu_wait) (void);
  11054. +
  11055. +static int loongson2f_cpu_freq_notifier(struct notifier_block *nb,
  11056. + unsigned long val, void *data);
  11057. +
  11058. +static struct notifier_block loongson2f_cpufreq_notifier_block = {
  11059. + .notifier_call = loongson2f_cpu_freq_notifier
  11060. +};
  11061. +
  11062. +static int loongson2f_cpu_freq_notifier(struct notifier_block *nb,
  11063. + unsigned long val, void *data)
  11064. +{
  11065. + if (val == CPUFREQ_POSTCHANGE)
  11066. + current_cpu_data.udelay_val = loops_per_jiffy;
  11067. +
  11068. + return 0;
  11069. +}
  11070. +
  11071. +static unsigned int loongson2f_cpufreq_get(unsigned int cpu)
  11072. +{
  11073. + return clk_get_rate(cpuclk);
  11074. +}
  11075. +
  11076. +/*
  11077. + * Here we notify other drivers of the proposed change and the final change.
  11078. + */
  11079. +static int loongson2f_cpufreq_target(struct cpufreq_policy *policy,
  11080. + unsigned int target_freq,
  11081. + unsigned int relation)
  11082. +{
  11083. + unsigned int cpu = policy->cpu;
  11084. + unsigned int newstate = 0;
  11085. + cpumask_t cpus_allowed;
  11086. + struct cpufreq_freqs freqs;
  11087. + long freq;
  11088. +
  11089. + if (!cpu_online(cpu))
  11090. + return -ENODEV;
  11091. +
  11092. + cpus_allowed = current->cpus_allowed;
  11093. + set_cpus_allowed(current, cpumask_of_cpu(cpu));
  11094. +
  11095. +#ifdef CONFIG_SMP
  11096. + BUG_ON(smp_processor_id() != cpu);
  11097. +#endif
  11098. +
  11099. + if (cpufreq_frequency_table_target
  11100. + (policy, &loongson2f_clockmod_table[0], target_freq, relation,
  11101. + &newstate))
  11102. + return -EINVAL;
  11103. +
  11104. + freq =
  11105. + cpu_clock_freq / 1000 * loongson2f_clockmod_table[newstate].index /
  11106. + 8;
  11107. + if (freq < policy->min || freq > policy->max)
  11108. + return -EINVAL;
  11109. +
  11110. + pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
  11111. +
  11112. + freqs.cpu = cpu;
  11113. + freqs.old = loongson2f_cpufreq_get(cpu);
  11114. + freqs.new = freq;
  11115. + freqs.flags = 0;
  11116. +
  11117. + if (freqs.new == freqs.old)
  11118. + return 0;
  11119. +
  11120. + /* notifiers */
  11121. + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  11122. +
  11123. + set_cpus_allowed(current, cpus_allowed);
  11124. +
  11125. + /* setting the cpu frequency */
  11126. + clk_set_rate(cpuclk, freq);
  11127. +
  11128. + /* notifiers */
  11129. + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  11130. +
  11131. + pr_debug("cpufreq: set frequency %lu kHz\n", freq);
  11132. +
  11133. + return 0;
  11134. +}
  11135. +
  11136. +static int loongson2f_cpufreq_cpu_init(struct cpufreq_policy *policy)
  11137. +{
  11138. + int i;
  11139. + int result;
  11140. +
  11141. + if (!cpu_online(policy->cpu))
  11142. + return -ENODEV;
  11143. +
  11144. + cpuclk = clk_get(NULL, "cpu_clk");
  11145. + if (IS_ERR(cpuclk)) {
  11146. + printk(KERN_ERR "cpufreq: couldn't get CPU clk\n");
  11147. + return PTR_ERR(cpuclk);
  11148. + }
  11149. +
  11150. + cpuclk->rate = cpu_clock_freq / 1000;
  11151. + if (!cpuclk->rate)
  11152. + return -EINVAL;
  11153. +
  11154. + /* clock table init */
  11155. + for (i = 2;
  11156. + (loongson2f_clockmod_table[i].frequency != CPUFREQ_TABLE_END);
  11157. + i++) {
  11158. + loongson2f_clockmod_table[i].frequency = (cpuclk->rate * i) / 8;
  11159. + }
  11160. +
  11161. + policy->cur = loongson2f_cpufreq_get(policy->cpu);
  11162. +
  11163. + cpufreq_frequency_table_get_attr(&loongson2f_clockmod_table[0],
  11164. + policy->cpu);
  11165. +
  11166. + result =
  11167. + cpufreq_frequency_table_cpuinfo(policy,
  11168. + &loongson2f_clockmod_table[0]);
  11169. + if (result)
  11170. + return result;
  11171. +
  11172. + return 0;
  11173. +}
  11174. +
  11175. +static int loongson2f_cpufreq_verify(struct cpufreq_policy *policy)
  11176. +{
  11177. + return cpufreq_frequency_table_verify(policy,
  11178. + &loongson2f_clockmod_table[0]);
  11179. +}
  11180. +
  11181. +static int loongson2f_cpufreq_exit(struct cpufreq_policy *policy)
  11182. +{
  11183. + clk_put(cpuclk);
  11184. + return 0;
  11185. +}
  11186. +
  11187. +static struct freq_attr *loongson2f_table_attr[] = {
  11188. + &cpufreq_freq_attr_scaling_available_freqs,
  11189. + NULL,
  11190. +};
  11191. +
  11192. +static struct cpufreq_driver loongson2f_cpufreq_driver = {
  11193. + .owner = THIS_MODULE,
  11194. + .name = "loongson2f",
  11195. + .init = loongson2f_cpufreq_cpu_init,
  11196. + .verify = loongson2f_cpufreq_verify,
  11197. + .target = loongson2f_cpufreq_target,
  11198. + .get = loongson2f_cpufreq_get,
  11199. + .exit = loongson2f_cpufreq_exit,
  11200. + .attr = loongson2f_table_attr,
  11201. +};
  11202. +
  11203. +static int __init loongson2f_cpufreq_module_init(void)
  11204. +{
  11205. + int result;
  11206. +
  11207. + printk(KERN_INFO "cpufreq: Loongson-2F CPU frequency driver.\n");
  11208. + result = cpufreq_register_driver(&loongson2f_cpufreq_driver);
  11209. +
  11210. + if (!result && !nowait) {
  11211. + saved_cpu_wait = cpu_wait;
  11212. + cpu_wait = loongson2f_cpu_wait;
  11213. + }
  11214. +
  11215. + cpufreq_register_notifier(&loongson2f_cpufreq_notifier_block,
  11216. + CPUFREQ_TRANSITION_NOTIFIER);
  11217. + return result;
  11218. +}
  11219. +
  11220. +static void __exit loongson2f_cpufreq_module_exit(void)
  11221. +{
  11222. + if (!nowait && saved_cpu_wait)
  11223. + cpu_wait = saved_cpu_wait;
  11224. + cpufreq_unregister_driver(&loongson2f_cpufreq_driver);
  11225. + cpufreq_unregister_notifier(&loongson2f_cpufreq_notifier_block,
  11226. + CPUFREQ_TRANSITION_NOTIFIER);
  11227. +}
  11228. +
  11229. +module_init(loongson2f_cpufreq_module_init);
  11230. +module_exit(loongson2f_cpufreq_module_exit);
  11231. +
  11232. +module_param(nowait, uint, 0644);
  11233. +MODULE_PARM_DESC(nowait, "Disable Loongson-2F specific wait");
  11234. +
  11235. +MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
  11236. +MODULE_DESCRIPTION("cpufreq driver for Loongson2F");
  11237. +MODULE_LICENSE("GPL");
  11238. diff -Nur linux-2.6.30.5.orig/arch/mips/kernel/Makefile linux-2.6.30.5/arch/mips/kernel/Makefile
  11239. --- linux-2.6.30.5.orig/arch/mips/kernel/Makefile 2009-08-16 23:19:38.000000000 +0200
  11240. +++ linux-2.6.30.5/arch/mips/kernel/Makefile 2009-08-23 19:01:04.000000000 +0200
  11241. @@ -73,6 +73,7 @@
  11242. obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o
  11243. obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
  11244. obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o
  11245. +obj-$(CONFIG_LOONGSON2F_CPU_FREQ) += loongson2f_freq.o
  11246. obj-$(CONFIG_KGDB) += kgdb.o
  11247. obj-$(CONFIG_PROC_FS) += proc.o
  11248. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/bonito-irq.c linux-2.6.30.5/arch/mips/lemote/lm2e/bonito-irq.c
  11249. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/bonito-irq.c 2009-08-16 23:19:38.000000000 +0200
  11250. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/bonito-irq.c 1970-01-01 01:00:00.000000000 +0100
  11251. @@ -1,74 +0,0 @@
  11252. -/*
  11253. - * Copyright 2001 MontaVista Software Inc.
  11254. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  11255. - * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  11256. - *
  11257. - * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  11258. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11259. - *
  11260. - * This program is free software; you can redistribute it and/or modify it
  11261. - * under the terms of the GNU General Public License as published by the
  11262. - * Free Software Foundation; either version 2 of the License, or (at your
  11263. - * option) any later version.
  11264. - *
  11265. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11266. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11267. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  11268. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11269. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  11270. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  11271. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  11272. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11273. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  11274. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11275. - *
  11276. - * You should have received a copy of the GNU General Public License along
  11277. - * with this program; if not, write to the Free Software Foundation, Inc.,
  11278. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  11279. - *
  11280. - */
  11281. -#include <linux/errno.h>
  11282. -#include <linux/init.h>
  11283. -#include <linux/io.h>
  11284. -#include <linux/types.h>
  11285. -#include <linux/interrupt.h>
  11286. -#include <linux/irq.h>
  11287. -
  11288. -#include <asm/mips-boards/bonito64.h>
  11289. -
  11290. -
  11291. -static inline void bonito_irq_enable(unsigned int irq)
  11292. -{
  11293. - BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE));
  11294. - mmiowb();
  11295. -}
  11296. -
  11297. -static inline void bonito_irq_disable(unsigned int irq)
  11298. -{
  11299. - BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
  11300. - mmiowb();
  11301. -}
  11302. -
  11303. -static struct irq_chip bonito_irq_type = {
  11304. - .name = "bonito_irq",
  11305. - .ack = bonito_irq_disable,
  11306. - .mask = bonito_irq_disable,
  11307. - .mask_ack = bonito_irq_disable,
  11308. - .unmask = bonito_irq_enable,
  11309. -};
  11310. -
  11311. -static struct irqaction dma_timeout_irqaction = {
  11312. - .handler = no_action,
  11313. - .name = "dma_timeout",
  11314. -};
  11315. -
  11316. -void bonito_irq_init(void)
  11317. -{
  11318. - u32 i;
  11319. -
  11320. - for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) {
  11321. - set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
  11322. - }
  11323. -
  11324. - setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction);
  11325. -}
  11326. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/dbg_io.c linux-2.6.30.5/arch/mips/lemote/lm2e/dbg_io.c
  11327. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/dbg_io.c 2009-08-16 23:19:38.000000000 +0200
  11328. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/dbg_io.c 1970-01-01 01:00:00.000000000 +0100
  11329. @@ -1,146 +0,0 @@
  11330. -/*
  11331. - * Copyright 2001 MontaVista Software Inc.
  11332. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  11333. - * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  11334. - *
  11335. - * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  11336. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11337. - *
  11338. - * This program is free software; you can redistribute it and/or modify it
  11339. - * under the terms of the GNU General Public License as published by the
  11340. - * Free Software Foundation; either version 2 of the License, or (at your
  11341. - * option) any later version.
  11342. - *
  11343. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11344. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11345. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  11346. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11347. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  11348. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  11349. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  11350. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11351. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  11352. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11353. - *
  11354. - * You should have received a copy of the GNU General Public License along
  11355. - * with this program; if not, write to the Free Software Foundation, Inc.,
  11356. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  11357. - *
  11358. - */
  11359. -
  11360. -#include <linux/io.h>
  11361. -#include <linux/init.h>
  11362. -#include <linux/types.h>
  11363. -
  11364. -#include <asm/serial.h>
  11365. -
  11366. -#define UART16550_BAUD_2400 2400
  11367. -#define UART16550_BAUD_4800 4800
  11368. -#define UART16550_BAUD_9600 9600
  11369. -#define UART16550_BAUD_19200 19200
  11370. -#define UART16550_BAUD_38400 38400
  11371. -#define UART16550_BAUD_57600 57600
  11372. -#define UART16550_BAUD_115200 115200
  11373. -
  11374. -#define UART16550_PARITY_NONE 0
  11375. -#define UART16550_PARITY_ODD 0x08
  11376. -#define UART16550_PARITY_EVEN 0x18
  11377. -#define UART16550_PARITY_MARK 0x28
  11378. -#define UART16550_PARITY_SPACE 0x38
  11379. -
  11380. -#define UART16550_DATA_5BIT 0x0
  11381. -#define UART16550_DATA_6BIT 0x1
  11382. -#define UART16550_DATA_7BIT 0x2
  11383. -#define UART16550_DATA_8BIT 0x3
  11384. -
  11385. -#define UART16550_STOP_1BIT 0x0
  11386. -#define UART16550_STOP_2BIT 0x4
  11387. -
  11388. -/* ----------------------------------------------------- */
  11389. -
  11390. -/* === CONFIG === */
  11391. -#ifdef CONFIG_64BIT
  11392. -#define BASE (0xffffffffbfd003f8)
  11393. -#else
  11394. -#define BASE (0xbfd003f8)
  11395. -#endif
  11396. -
  11397. -#define MAX_BAUD BASE_BAUD
  11398. -/* === END OF CONFIG === */
  11399. -
  11400. -#define REG_OFFSET 1
  11401. -
  11402. -/* register offset */
  11403. -#define OFS_RCV_BUFFER 0
  11404. -#define OFS_TRANS_HOLD 0
  11405. -#define OFS_SEND_BUFFER 0
  11406. -#define OFS_INTR_ENABLE (1*REG_OFFSET)
  11407. -#define OFS_INTR_ID (2*REG_OFFSET)
  11408. -#define OFS_DATA_FORMAT (3*REG_OFFSET)
  11409. -#define OFS_LINE_CONTROL (3*REG_OFFSET)
  11410. -#define OFS_MODEM_CONTROL (4*REG_OFFSET)
  11411. -#define OFS_RS232_OUTPUT (4*REG_OFFSET)
  11412. -#define OFS_LINE_STATUS (5*REG_OFFSET)
  11413. -#define OFS_MODEM_STATUS (6*REG_OFFSET)
  11414. -#define OFS_RS232_INPUT (6*REG_OFFSET)
  11415. -#define OFS_SCRATCH_PAD (7*REG_OFFSET)
  11416. -
  11417. -#define OFS_DIVISOR_LSB (0*REG_OFFSET)
  11418. -#define OFS_DIVISOR_MSB (1*REG_OFFSET)
  11419. -
  11420. -/* memory-mapped read/write of the port */
  11421. -#define UART16550_READ(y) readb((char *)BASE + (y))
  11422. -#define UART16550_WRITE(y, z) writeb(z, (char *)BASE + (y))
  11423. -
  11424. -void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
  11425. -{
  11426. - u32 divisor;
  11427. -
  11428. - /* disable interrupts */
  11429. - UART16550_WRITE(OFS_INTR_ENABLE, 0);
  11430. -
  11431. - /* set up buad rate */
  11432. - /* set DIAB bit */
  11433. - UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
  11434. -
  11435. - /* set divisor */
  11436. - divisor = MAX_BAUD / baud;
  11437. - UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
  11438. - UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
  11439. -
  11440. - /* clear DIAB bit */
  11441. - UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
  11442. -
  11443. - /* set data format */
  11444. - UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
  11445. -}
  11446. -
  11447. -static int remoteDebugInitialized;
  11448. -
  11449. -u8 getDebugChar(void)
  11450. -{
  11451. - if (!remoteDebugInitialized) {
  11452. - remoteDebugInitialized = 1;
  11453. - debugInit(UART16550_BAUD_115200,
  11454. - UART16550_DATA_8BIT,
  11455. - UART16550_PARITY_NONE, UART16550_STOP_1BIT);
  11456. - }
  11457. -
  11458. - while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
  11459. - return UART16550_READ(OFS_RCV_BUFFER);
  11460. -}
  11461. -
  11462. -int putDebugChar(u8 byte)
  11463. -{
  11464. - if (!remoteDebugInitialized) {
  11465. - remoteDebugInitialized = 1;
  11466. - /*
  11467. - debugInit(UART16550_BAUD_115200,
  11468. - UART16550_DATA_8BIT,
  11469. - UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
  11470. - }
  11471. -
  11472. - while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
  11473. - UART16550_WRITE(OFS_SEND_BUFFER, byte);
  11474. - return 1;
  11475. -}
  11476. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/irq.c linux-2.6.30.5/arch/mips/lemote/lm2e/irq.c
  11477. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/irq.c 2009-08-16 23:19:38.000000000 +0200
  11478. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/irq.c 1970-01-01 01:00:00.000000000 +0100
  11479. @@ -1,143 +0,0 @@
  11480. -/*
  11481. - * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  11482. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11483. - *
  11484. - * This program is free software; you can redistribute it and/or modify it
  11485. - * under the terms of the GNU General Public License as published by the
  11486. - * Free Software Foundation; either version 2 of the License, or (at your
  11487. - * option) any later version.
  11488. - *
  11489. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11490. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11491. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  11492. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11493. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  11494. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  11495. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  11496. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11497. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  11498. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11499. - *
  11500. - * You should have received a copy of the GNU General Public License along
  11501. - * with this program; if not, write to the Free Software Foundation, Inc.,
  11502. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  11503. - *
  11504. - */
  11505. -#include <linux/delay.h>
  11506. -#include <linux/io.h>
  11507. -#include <linux/init.h>
  11508. -#include <linux/interrupt.h>
  11509. -#include <linux/irq.h>
  11510. -
  11511. -#include <asm/irq_cpu.h>
  11512. -#include <asm/i8259.h>
  11513. -#include <asm/mipsregs.h>
  11514. -#include <asm/mips-boards/bonito64.h>
  11515. -
  11516. -
  11517. -/*
  11518. - * the first level int-handler will jump here if it is a bonito irq
  11519. - */
  11520. -static void bonito_irqdispatch(void)
  11521. -{
  11522. - u32 int_status;
  11523. - int i;
  11524. -
  11525. - /* workaround the IO dma problem: let cpu looping to allow DMA finish */
  11526. - int_status = BONITO_INTISR;
  11527. - if (int_status & (1 << 10)) {
  11528. - while (int_status & (1 << 10)) {
  11529. - udelay(1);
  11530. - int_status = BONITO_INTISR;
  11531. - }
  11532. - }
  11533. -
  11534. - /* Get pending sources, masked by current enables */
  11535. - int_status = BONITO_INTISR & BONITO_INTEN;
  11536. -
  11537. - if (int_status != 0) {
  11538. - i = __ffs(int_status);
  11539. - int_status &= ~(1 << i);
  11540. - do_IRQ(BONITO_IRQ_BASE + i);
  11541. - }
  11542. -}
  11543. -
  11544. -static void i8259_irqdispatch(void)
  11545. -{
  11546. - int irq;
  11547. -
  11548. - irq = i8259_irq();
  11549. - if (irq >= 0) {
  11550. - do_IRQ(irq);
  11551. - } else {
  11552. - spurious_interrupt();
  11553. - }
  11554. -
  11555. -}
  11556. -
  11557. -asmlinkage void plat_irq_dispatch(void)
  11558. -{
  11559. - unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
  11560. -
  11561. - if (pending & CAUSEF_IP7) {
  11562. - do_IRQ(MIPS_CPU_IRQ_BASE + 7);
  11563. - } else if (pending & CAUSEF_IP5) {
  11564. - i8259_irqdispatch();
  11565. - } else if (pending & CAUSEF_IP2) {
  11566. - bonito_irqdispatch();
  11567. - } else {
  11568. - spurious_interrupt();
  11569. - }
  11570. -}
  11571. -
  11572. -static struct irqaction cascade_irqaction = {
  11573. - .handler = no_action,
  11574. - .name = "cascade",
  11575. -};
  11576. -
  11577. -void __init arch_init_irq(void)
  11578. -{
  11579. - extern void bonito_irq_init(void);
  11580. -
  11581. - /*
  11582. - * Clear all of the interrupts while we change the able around a bit.
  11583. - * int-handler is not on bootstrap
  11584. - */
  11585. - clear_c0_status(ST0_IM | ST0_BEV);
  11586. - local_irq_disable();
  11587. -
  11588. - /* most bonito irq should be level triggered */
  11589. - BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR |
  11590. - BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES;
  11591. - BONITO_INTSTEER = 0;
  11592. -
  11593. - /*
  11594. - * Mask out all interrupt by writing "1" to all bit position in
  11595. - * the interrupt reset reg.
  11596. - */
  11597. - BONITO_INTENCLR = ~0;
  11598. -
  11599. - /* init all controller
  11600. - * 0-15 ------> i8259 interrupt
  11601. - * 16-23 ------> mips cpu interrupt
  11602. - * 32-63 ------> bonito irq
  11603. - */
  11604. -
  11605. - /* Sets the first-level interrupt dispatcher. */
  11606. - mips_cpu_irq_init();
  11607. - init_i8259_irqs();
  11608. - bonito_irq_init();
  11609. -
  11610. - /*
  11611. - printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE);
  11612. - printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n",
  11613. - BONITO_INTEN, BONITO_INTENSET,
  11614. - BONITO_INTENCLR, BONITO_INTISR);
  11615. - */
  11616. -
  11617. - /* bonito irq at IP2 */
  11618. - setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
  11619. - /* 8259 irq at IP5 */
  11620. - setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
  11621. -
  11622. -}
  11623. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/Makefile linux-2.6.30.5/arch/mips/lemote/lm2e/Makefile
  11624. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/Makefile 2009-08-16 23:19:38.000000000 +0200
  11625. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/Makefile 1970-01-01 01:00:00.000000000 +0100
  11626. @@ -1,7 +0,0 @@
  11627. -#
  11628. -# Makefile for Lemote Fulong mini-PC board.
  11629. -#
  11630. -
  11631. -obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o
  11632. -
  11633. -EXTRA_CFLAGS += -Werror
  11634. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/mem.c linux-2.6.30.5/arch/mips/lemote/lm2e/mem.c
  11635. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/mem.c 2009-08-16 23:19:38.000000000 +0200
  11636. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/mem.c 1970-01-01 01:00:00.000000000 +0100
  11637. @@ -1,23 +0,0 @@
  11638. -/*
  11639. - * This program is free software; you can redistribute it and/or modify it
  11640. - * under the terms of the GNU General Public License as published by the
  11641. - * Free Software Foundation; either version 2 of the License, or (at your
  11642. - * option) any later version.
  11643. - */
  11644. -#include <linux/fs.h>
  11645. -#include <linux/fcntl.h>
  11646. -#include <linux/mm.h>
  11647. -
  11648. -/* override of arch/mips/mm/cache.c: __uncached_access */
  11649. -int __uncached_access(struct file *file, unsigned long addr)
  11650. -{
  11651. - if (file->f_flags & O_SYNC)
  11652. - return 1;
  11653. -
  11654. - /*
  11655. - * On the Lemote Loongson 2e system, the peripheral registers
  11656. - * reside between 0x1000:0000 and 0x2000:0000.
  11657. - */
  11658. - return addr >= __pa(high_memory) ||
  11659. - ((addr >= 0x10000000) && (addr < 0x20000000));
  11660. -}
  11661. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/pci.c linux-2.6.30.5/arch/mips/lemote/lm2e/pci.c
  11662. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/pci.c 2009-08-16 23:19:38.000000000 +0200
  11663. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/pci.c 1970-01-01 01:00:00.000000000 +0100
  11664. @@ -1,97 +0,0 @@
  11665. -/*
  11666. - * pci.c
  11667. - *
  11668. - * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  11669. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11670. - *
  11671. - * This program is free software; you can redistribute it and/or modify it
  11672. - * under the terms of the GNU General Public License as published by the
  11673. - * Free Software Foundation; either version 2 of the License, or (at your
  11674. - * option) any later version.
  11675. - *
  11676. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11677. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11678. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  11679. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11680. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  11681. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  11682. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  11683. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11684. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  11685. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11686. - *
  11687. - * You should have received a copy of the GNU General Public License along
  11688. - * with this program; if not, write to the Free Software Foundation, Inc.,
  11689. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  11690. - *
  11691. - */
  11692. -#include <linux/types.h>
  11693. -#include <linux/pci.h>
  11694. -#include <linux/kernel.h>
  11695. -#include <linux/init.h>
  11696. -#include <asm/mips-boards/bonito64.h>
  11697. -#include <asm/mach-lemote/pci.h>
  11698. -
  11699. -extern struct pci_ops bonito64_pci_ops;
  11700. -
  11701. -static struct resource loongson2e_pci_mem_resource = {
  11702. - .name = "LOONGSON2E PCI MEM",
  11703. - .start = LOONGSON2E_PCI_MEM_START,
  11704. - .end = LOONGSON2E_PCI_MEM_END,
  11705. - .flags = IORESOURCE_MEM,
  11706. -};
  11707. -
  11708. -static struct resource loongson2e_pci_io_resource = {
  11709. - .name = "LOONGSON2E PCI IO MEM",
  11710. - .start = LOONGSON2E_PCI_IO_START,
  11711. - .end = IO_SPACE_LIMIT,
  11712. - .flags = IORESOURCE_IO,
  11713. -};
  11714. -
  11715. -static struct pci_controller loongson2e_pci_controller = {
  11716. - .pci_ops = &bonito64_pci_ops,
  11717. - .io_resource = &loongson2e_pci_io_resource,
  11718. - .mem_resource = &loongson2e_pci_mem_resource,
  11719. - .mem_offset = 0x00000000UL,
  11720. - .io_offset = 0x00000000UL,
  11721. -};
  11722. -
  11723. -static void __init ict_pcimap(void)
  11724. -{
  11725. - /*
  11726. - * local to PCI mapping: [256M,512M] -> [256M,512M]; differ from PMON
  11727. - *
  11728. - * CPU address space [256M,448M] is window for accessing pci space
  11729. - * we set pcimap_lo[0,1,2] to map it to pci space [256M,448M]
  11730. - * pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0
  11731. - */
  11732. - /* 1,00 0110 ,0001 01,00 0000 */
  11733. - BONITO_PCIMAP = 0x46140;
  11734. -
  11735. - /* 1, 00 0010, 0000,01, 00 0000 */
  11736. - /* BONITO_PCIMAP = 0x42040; */
  11737. -
  11738. - /*
  11739. - * PCI to local mapping: [2G,2G+256M] -> [0,256M]
  11740. - */
  11741. - BONITO_PCIBASE0 = 0x80000000;
  11742. - BONITO_PCIBASE1 = 0x00800000;
  11743. - BONITO_PCIBASE2 = 0x90000000;
  11744. -
  11745. -}
  11746. -
  11747. -static int __init pcibios_init(void)
  11748. -{
  11749. - ict_pcimap();
  11750. -
  11751. - loongson2e_pci_controller.io_map_base =
  11752. - (unsigned long) ioremap(LOONGSON2E_IO_PORT_BASE,
  11753. - loongson2e_pci_io_resource.end -
  11754. - loongson2e_pci_io_resource.start + 1);
  11755. -
  11756. - register_pci_controller(&loongson2e_pci_controller);
  11757. -
  11758. - return 0;
  11759. -}
  11760. -
  11761. -arch_initcall(pcibios_init);
  11762. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/prom.c linux-2.6.30.5/arch/mips/lemote/lm2e/prom.c
  11763. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/prom.c 2009-08-16 23:19:38.000000000 +0200
  11764. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/prom.c 1970-01-01 01:00:00.000000000 +0100
  11765. @@ -1,97 +0,0 @@
  11766. -/*
  11767. - * Based on Ocelot Linux port, which is
  11768. - * Copyright 2001 MontaVista Software Inc.
  11769. - * Author: jsun@mvista.com or jsun@junsun.net
  11770. - *
  11771. - * Copyright 2003 ICT CAS
  11772. - * Author: Michael Guo <guoyi@ict.ac.cn>
  11773. - *
  11774. - * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  11775. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11776. - *
  11777. - * This program is free software; you can redistribute it and/or modify it
  11778. - * under the terms of the GNU General Public License as published by the
  11779. - * Free Software Foundation; either version 2 of the License, or (at your
  11780. - * option) any later version.
  11781. - */
  11782. -#include <linux/init.h>
  11783. -#include <linux/bootmem.h>
  11784. -#include <asm/bootinfo.h>
  11785. -
  11786. -extern unsigned long bus_clock;
  11787. -extern unsigned long cpu_clock_freq;
  11788. -extern unsigned int memsize, highmemsize;
  11789. -extern int putDebugChar(unsigned char byte);
  11790. -
  11791. -static int argc;
  11792. -/* pmon passes arguments in 32bit pointers */
  11793. -static int *arg;
  11794. -static int *env;
  11795. -
  11796. -const char *get_system_type(void)
  11797. -{
  11798. - return "lemote-fulong";
  11799. -}
  11800. -
  11801. -void __init prom_init_cmdline(void)
  11802. -{
  11803. - int i;
  11804. - long l;
  11805. -
  11806. - /* arg[0] is "g", the rest is boot parameters */
  11807. - arcs_cmdline[0] = '\0';
  11808. - for (i = 1; i < argc; i++) {
  11809. - l = (long)arg[i];
  11810. - if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
  11811. - >= sizeof(arcs_cmdline))
  11812. - break;
  11813. - strcat(arcs_cmdline, ((char *)l));
  11814. - strcat(arcs_cmdline, " ");
  11815. - }
  11816. -}
  11817. -
  11818. -void __init prom_init(void)
  11819. -{
  11820. - long l;
  11821. - argc = fw_arg0;
  11822. - arg = (int *)fw_arg1;
  11823. - env = (int *)fw_arg2;
  11824. -
  11825. - prom_init_cmdline();
  11826. -
  11827. - if ((strstr(arcs_cmdline, "console=")) == NULL)
  11828. - strcat(arcs_cmdline, " console=ttyS0,115200");
  11829. - if ((strstr(arcs_cmdline, "root=")) == NULL)
  11830. - strcat(arcs_cmdline, " root=/dev/hda1");
  11831. -
  11832. -#define parse_even_earlier(res, option, p) \
  11833. -do { \
  11834. - if (strncmp(option, (char *)p, strlen(option)) == 0) \
  11835. - res = simple_strtol((char *)p + strlen(option"="), \
  11836. - NULL, 10); \
  11837. -} while (0)
  11838. -
  11839. - l = (long)*env;
  11840. - while (l != 0) {
  11841. - parse_even_earlier(bus_clock, "busclock", l);
  11842. - parse_even_earlier(cpu_clock_freq, "cpuclock", l);
  11843. - parse_even_earlier(memsize, "memsize", l);
  11844. - parse_even_earlier(highmemsize, "highmemsize", l);
  11845. - env++;
  11846. - l = (long)*env;
  11847. - }
  11848. - if (memsize == 0)
  11849. - memsize = 256;
  11850. -
  11851. - pr_info("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n",
  11852. - bus_clock, cpu_clock_freq, memsize, highmemsize);
  11853. -}
  11854. -
  11855. -void __init prom_free_prom_memory(void)
  11856. -{
  11857. -}
  11858. -
  11859. -void prom_putchar(char c)
  11860. -{
  11861. - putDebugChar(c);
  11862. -}
  11863. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/reset.c linux-2.6.30.5/arch/mips/lemote/lm2e/reset.c
  11864. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/reset.c 2009-08-16 23:19:38.000000000 +0200
  11865. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/reset.c 1970-01-01 01:00:00.000000000 +0100
  11866. @@ -1,41 +0,0 @@
  11867. -/*
  11868. - * This program is free software; you can redistribute it and/or modify it
  11869. - * under the terms of the GNU General Public License as published by the
  11870. - * Free Software Foundation; either version 2 of the License, or (at your
  11871. - * option) any later version.
  11872. - *
  11873. - * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  11874. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11875. - */
  11876. -#include <linux/pm.h>
  11877. -
  11878. -#include <asm/reboot.h>
  11879. -
  11880. -static void loongson2e_restart(char *command)
  11881. -{
  11882. -#ifdef CONFIG_32BIT
  11883. - *(unsigned long *)0xbfe00104 &= ~(1 << 2);
  11884. - *(unsigned long *)0xbfe00104 |= (1 << 2);
  11885. -#else
  11886. - *(unsigned long *)0xffffffffbfe00104 &= ~(1 << 2);
  11887. - *(unsigned long *)0xffffffffbfe00104 |= (1 << 2);
  11888. -#endif
  11889. - __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
  11890. -}
  11891. -
  11892. -static void loongson2e_halt(void)
  11893. -{
  11894. - while (1) ;
  11895. -}
  11896. -
  11897. -static void loongson2e_power_off(void)
  11898. -{
  11899. - loongson2e_halt();
  11900. -}
  11901. -
  11902. -void mips_reboot_setup(void)
  11903. -{
  11904. - _machine_restart = loongson2e_restart;
  11905. - _machine_halt = loongson2e_halt;
  11906. - pm_power_off = loongson2e_power_off;
  11907. -}
  11908. diff -Nur linux-2.6.30.5.orig/arch/mips/lemote/lm2e/setup.c linux-2.6.30.5/arch/mips/lemote/lm2e/setup.c
  11909. --- linux-2.6.30.5.orig/arch/mips/lemote/lm2e/setup.c 2009-08-16 23:19:38.000000000 +0200
  11910. +++ linux-2.6.30.5/arch/mips/lemote/lm2e/setup.c 1970-01-01 01:00:00.000000000 +0100
  11911. @@ -1,111 +0,0 @@
  11912. -/*
  11913. - * BRIEF MODULE DESCRIPTION
  11914. - * setup.c - board dependent boot routines
  11915. - *
  11916. - * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  11917. - * Author: Fuxin Zhang, zhangfx@lemote.com
  11918. - *
  11919. - * This program is free software; you can redistribute it and/or modify it
  11920. - * under the terms of the GNU General Public License as published by the
  11921. - * Free Software Foundation; either version 2 of the License, or (at your
  11922. - * option) any later version.
  11923. - *
  11924. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11925. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11926. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  11927. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11928. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  11929. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  11930. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  11931. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11932. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  11933. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11934. - *
  11935. - * You should have received a copy of the GNU General Public License along
  11936. - * with this program; if not, write to the Free Software Foundation, Inc.,
  11937. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  11938. - *
  11939. - */
  11940. -#include <linux/bootmem.h>
  11941. -#include <linux/init.h>
  11942. -#include <linux/irq.h>
  11943. -
  11944. -#include <asm/bootinfo.h>
  11945. -#include <asm/mc146818-time.h>
  11946. -#include <asm/time.h>
  11947. -#include <asm/wbflush.h>
  11948. -#include <asm/mach-lemote/pci.h>
  11949. -
  11950. -#ifdef CONFIG_VT
  11951. -#include <linux/console.h>
  11952. -#include <linux/screen_info.h>
  11953. -#endif
  11954. -
  11955. -extern void mips_reboot_setup(void);
  11956. -
  11957. -unsigned long cpu_clock_freq;
  11958. -unsigned long bus_clock;
  11959. -unsigned int memsize;
  11960. -unsigned int highmemsize = 0;
  11961. -
  11962. -void __init plat_time_init(void)
  11963. -{
  11964. - /* setup mips r4k timer */
  11965. - mips_hpt_frequency = cpu_clock_freq / 2;
  11966. -}
  11967. -
  11968. -unsigned long read_persistent_clock(void)
  11969. -{
  11970. - return mc146818_get_cmos_time();
  11971. -}
  11972. -
  11973. -void (*__wbflush)(void);
  11974. -EXPORT_SYMBOL(__wbflush);
  11975. -
  11976. -static void wbflush_loongson2e(void)
  11977. -{
  11978. - asm(".set\tpush\n\t"
  11979. - ".set\tnoreorder\n\t"
  11980. - ".set mips3\n\t"
  11981. - "sync\n\t"
  11982. - "nop\n\t"
  11983. - ".set\tpop\n\t"
  11984. - ".set mips0\n\t");
  11985. -}
  11986. -
  11987. -void __init plat_mem_setup(void)
  11988. -{
  11989. - set_io_port_base((unsigned long)ioremap(LOONGSON2E_IO_PORT_BASE,
  11990. - IO_SPACE_LIMIT - LOONGSON2E_PCI_IO_START + 1));
  11991. - mips_reboot_setup();
  11992. -
  11993. - __wbflush = wbflush_loongson2e;
  11994. -
  11995. - add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
  11996. -#ifdef CONFIG_64BIT
  11997. - if (highmemsize > 0) {
  11998. - add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM);
  11999. - }
  12000. -#endif
  12001. -
  12002. -#ifdef CONFIG_VT
  12003. -#if defined(CONFIG_VGA_CONSOLE)
  12004. - conswitchp = &vga_con;
  12005. -
  12006. - screen_info = (struct screen_info) {
  12007. - 0, 25, /* orig-x, orig-y */
  12008. - 0, /* unused */
  12009. - 0, /* orig-video-page */
  12010. - 0, /* orig-video-mode */
  12011. - 80, /* orig-video-cols */
  12012. - 0, 0, 0, /* ega_ax, ega_bx, ega_cx */
  12013. - 25, /* orig-video-lines */
  12014. - VIDEO_TYPE_VGAC, /* orig-video-isVGA */
  12015. - 16 /* orig-video-points */
  12016. - };
  12017. -#elif defined(CONFIG_DUMMY_CONSOLE)
  12018. - conswitchp = &dummy_con;
  12019. -#endif
  12020. -#endif
  12021. -
  12022. -}
  12023. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/bonito-irq.c linux-2.6.30.5/arch/mips/loongson/common/bonito-irq.c
  12024. --- linux-2.6.30.5.orig/arch/mips/loongson/common/bonito-irq.c 1970-01-01 01:00:00.000000000 +0100
  12025. +++ linux-2.6.30.5/arch/mips/loongson/common/bonito-irq.c 2009-08-23 19:01:04.000000000 +0200
  12026. @@ -0,0 +1,78 @@
  12027. +/*
  12028. + * Copyright 2001 MontaVista Software Inc.
  12029. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  12030. + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  12031. + *
  12032. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  12033. + * Author: Fuxin Zhang, zhangfx@lemote.com
  12034. + *
  12035. + * This program is free software; you can redistribute it and/or modify it
  12036. + * under the terms of the GNU General Public License as published by the
  12037. + * Free Software Foundation; either version 2 of the License, or (at your
  12038. + * option) any later version.
  12039. + *
  12040. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  12041. + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12042. + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  12043. + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  12044. + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  12045. + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  12046. + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  12047. + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  12048. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  12049. + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  12050. + *
  12051. + * You should have received a copy of the GNU General Public License along
  12052. + * with this program; if not, write to the Free Software Foundation, Inc.,
  12053. + * 675 Mass Ave, Cambridge, MA 02139, USA.
  12054. + *
  12055. + */
  12056. +
  12057. +#include <linux/interrupt.h>
  12058. +
  12059. +#include <loongson.h>
  12060. +#include <machine.h>
  12061. +
  12062. +static inline void bonito_irq_enable(unsigned int irq)
  12063. +{
  12064. + LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE));
  12065. + /* flush posted write */
  12066. + (void)LOONGSON_INTENSET;
  12067. + mmiowb();
  12068. +}
  12069. +
  12070. +static inline void bonito_irq_disable(unsigned int irq)
  12071. +{
  12072. + LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE));
  12073. + /* flush posted write */
  12074. + (void)LOONGSON_INTENCLR;
  12075. + mmiowb();
  12076. +}
  12077. +
  12078. +static struct irq_chip bonito_irq_type = {
  12079. + .name = "bonito_irq",
  12080. + .ack = bonito_irq_disable,
  12081. + .mask = bonito_irq_disable,
  12082. + .mask_ack = bonito_irq_disable,
  12083. + .unmask = bonito_irq_enable,
  12084. +};
  12085. +
  12086. +/* there is no need to handle dma timeout in loongson-2f based machines */
  12087. +#ifdef CONFIG_CPU_LOONGSON2E
  12088. +static struct irqaction dma_timeout_irqaction = {
  12089. + .handler = no_action,
  12090. + .name = "dma_timeout",
  12091. +};
  12092. +#endif
  12093. +
  12094. +void bonito_irq_init(void)
  12095. +{
  12096. + u32 i;
  12097. +
  12098. + for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++)
  12099. + set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
  12100. +
  12101. +#ifdef CONFIG_CPU_LOONGSON2E
  12102. + setup_irq(LOONGSON_DMATIMEOUT_IRQ, &dma_timeout_irqaction);
  12103. +#endif
  12104. +}
  12105. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/clock.c linux-2.6.30.5/arch/mips/loongson/common/clock.c
  12106. --- linux-2.6.30.5.orig/arch/mips/loongson/common/clock.c 1970-01-01 01:00:00.000000000 +0100
  12107. +++ linux-2.6.30.5/arch/mips/loongson/common/clock.c 2009-08-23 19:01:04.000000000 +0200
  12108. @@ -0,0 +1,166 @@
  12109. +/*
  12110. + * arch/mips/loongson/common/clock.c
  12111. + *
  12112. + * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology
  12113. + * Author: Yanhua, yanh@lemote.com
  12114. + *
  12115. + * This file is subject to the terms and conditions of the GNU General Public
  12116. + * License. See the file "COPYING" in the main directory of this archive
  12117. + * for more details.
  12118. + */
  12119. +
  12120. +#include <linux/cpufreq.h>
  12121. +#include <linux/platform_device.h>
  12122. +
  12123. +#include <loongson.h>
  12124. +#include <clock.h>
  12125. +
  12126. +static LIST_HEAD(clock_list);
  12127. +static DEFINE_SPINLOCK(clock_lock);
  12128. +static DEFINE_MUTEX(clock_list_sem);
  12129. +
  12130. +/* Minimum CLK support */
  12131. +enum {
  12132. + DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
  12133. + DC_87PT, DC_DISABLE, DC_RESV
  12134. +};
  12135. +
  12136. +struct cpufreq_frequency_table loongson2f_clockmod_table[] = {
  12137. + {DC_RESV, CPUFREQ_ENTRY_INVALID},
  12138. + {DC_ZERO, CPUFREQ_ENTRY_INVALID},
  12139. + {DC_25PT, 0},
  12140. + {DC_37PT, 0},
  12141. + {DC_50PT, 0},
  12142. + {DC_62PT, 0},
  12143. + {DC_75PT, 0},
  12144. + {DC_87PT, 0},
  12145. + {DC_DISABLE, 0},
  12146. + {DC_RESV, CPUFREQ_TABLE_END},
  12147. +};
  12148. +EXPORT_SYMBOL_GPL(loongson2f_clockmod_table);
  12149. +
  12150. +static struct clk cpu_clk = {
  12151. + .name = "cpu_clk",
  12152. + .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
  12153. + .rate = 800000000,
  12154. +};
  12155. +
  12156. +struct clk *clk_get(struct device *dev, const char *id)
  12157. +{
  12158. + return &cpu_clk;
  12159. +}
  12160. +EXPORT_SYMBOL(clk_get);
  12161. +
  12162. +static void propagate_rate(struct clk *clk)
  12163. +{
  12164. + struct clk *clkp;
  12165. +
  12166. + list_for_each_entry(clkp, &clock_list, node) {
  12167. + if (likely(clkp->parent != clk))
  12168. + continue;
  12169. + if (likely(clkp->ops && clkp->ops->recalc))
  12170. + clkp->ops->recalc(clkp);
  12171. + if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
  12172. + propagate_rate(clkp);
  12173. + }
  12174. +}
  12175. +
  12176. +int clk_enable(struct clk *clk)
  12177. +{
  12178. + return 0;
  12179. +}
  12180. +EXPORT_SYMBOL(clk_enable);
  12181. +
  12182. +void clk_disable(struct clk *clk)
  12183. +{
  12184. +}
  12185. +EXPORT_SYMBOL(clk_disable);
  12186. +
  12187. +unsigned long clk_get_rate(struct clk *clk)
  12188. +{
  12189. + return (unsigned long)clk->rate;
  12190. +}
  12191. +EXPORT_SYMBOL(clk_get_rate);
  12192. +
  12193. +void clk_put(struct clk *clk)
  12194. +{
  12195. +}
  12196. +EXPORT_SYMBOL(clk_put);
  12197. +
  12198. +int clk_set_rate(struct clk *clk, unsigned long rate)
  12199. +{
  12200. + return clk_set_rate_ex(clk, rate, 0);
  12201. +}
  12202. +EXPORT_SYMBOL_GPL(clk_set_rate);
  12203. +
  12204. +int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
  12205. +{
  12206. + int ret = 0;
  12207. + int regval;
  12208. + int i;
  12209. +
  12210. + if (likely(clk->ops && clk->ops->set_rate)) {
  12211. + unsigned long flags;
  12212. +
  12213. + spin_lock_irqsave(&clock_lock, flags);
  12214. + ret = clk->ops->set_rate(clk, rate, algo_id);
  12215. + spin_unlock_irqrestore(&clock_lock, flags);
  12216. + }
  12217. +
  12218. + if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
  12219. + propagate_rate(clk);
  12220. +
  12221. + for (i = 0; loongson2f_clockmod_table[i].frequency != CPUFREQ_TABLE_END;
  12222. + i++) {
  12223. + if (loongson2f_clockmod_table[i].frequency ==
  12224. + CPUFREQ_ENTRY_INVALID)
  12225. + continue;
  12226. + if (rate == loongson2f_clockmod_table[i].frequency)
  12227. + break;
  12228. + }
  12229. + if (rate != loongson2f_clockmod_table[i].frequency)
  12230. + return -ENOTSUPP;
  12231. +
  12232. + clk->rate = rate;
  12233. +
  12234. + regval = LOONGSON_CHIPCFG0;
  12235. + regval = (regval & ~0x7) | (loongson2f_clockmod_table[i].index - 1);
  12236. + LOONGSON_CHIPCFG0 = regval;
  12237. +
  12238. + return ret;
  12239. +}
  12240. +EXPORT_SYMBOL_GPL(clk_set_rate_ex);
  12241. +
  12242. +long clk_round_rate(struct clk *clk, unsigned long rate)
  12243. +{
  12244. + if (likely(clk->ops && clk->ops->round_rate)) {
  12245. + unsigned long flags, rounded;
  12246. +
  12247. + spin_lock_irqsave(&clock_lock, flags);
  12248. + rounded = clk->ops->round_rate(clk, rate);
  12249. + spin_unlock_irqrestore(&clock_lock, flags);
  12250. +
  12251. + return rounded;
  12252. + }
  12253. +
  12254. + return rate;
  12255. +}
  12256. +EXPORT_SYMBOL_GPL(clk_round_rate);
  12257. +
  12258. +/*
  12259. + * This is the simple version of Loongson-2F wait
  12260. + * Maybe we need do this in interrupt disabled content
  12261. + */
  12262. +DEFINE_SPINLOCK(loongson2f_wait_lock);
  12263. +void loongson2f_cpu_wait(void)
  12264. +{
  12265. + u32 cpu_freq;
  12266. + unsigned long flags;
  12267. +
  12268. + spin_lock_irqsave(&loongson2f_wait_lock, flags);
  12269. + cpu_freq = LOONGSON_CHIPCFG0;
  12270. + LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
  12271. + LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
  12272. + spin_unlock_irqrestore(&loongson2f_wait_lock, flags);
  12273. +}
  12274. +EXPORT_SYMBOL_GPL(loongson2f_cpu_wait);
  12275. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cmdline.c linux-2.6.30.5/arch/mips/loongson/common/cmdline.c
  12276. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cmdline.c 1970-01-01 01:00:00.000000000 +0100
  12277. +++ linux-2.6.30.5/arch/mips/loongson/common/cmdline.c 2009-08-23 19:01:04.000000000 +0200
  12278. @@ -0,0 +1,57 @@
  12279. +/*
  12280. + * Based on Ocelot Linux port, which is
  12281. + * Copyright 2001 MontaVista Software Inc.
  12282. + * Author: jsun@mvista.com or jsun@junsun.net
  12283. + *
  12284. + * Copyright 2003 ICT CAS
  12285. + * Author: Michael Guo <guoyi@ict.ac.cn>
  12286. + *
  12287. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  12288. + * Author: Fuxin Zhang, zhangfx@lemote.com
  12289. + *
  12290. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  12291. + * Author: Wu Zhangjin, wuzj@lemote.com
  12292. + *
  12293. + * This program is free software; you can redistribute it and/or modify it
  12294. + * under the terms of the GNU General Public License as published by the
  12295. + * Free Software Foundation; either version 2 of the License, or (at your
  12296. + * option) any later version.
  12297. + */
  12298. +
  12299. +#include <asm/bootinfo.h>
  12300. +
  12301. +#include <loongson.h>
  12302. +#include <cmdline.h>
  12303. +
  12304. +int prom_argc;
  12305. +/* pmon passes arguments in 32bit pointers */
  12306. +int *_prom_argv;
  12307. +
  12308. +void __init prom_init_cmdline(void)
  12309. +{
  12310. + int i;
  12311. + long l;
  12312. +
  12313. + /* firmware arguments are initialized in head.S */
  12314. + prom_argc = fw_arg0;
  12315. + _prom_argv = (int *)fw_arg1;
  12316. +
  12317. + /* arg[0] is "g", the rest is boot parameters */
  12318. + arcs_cmdline[0] = '\0';
  12319. + for (i = 1; i < prom_argc; i++) {
  12320. + l = (long)_prom_argv[i];
  12321. + if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
  12322. + >= sizeof(arcs_cmdline))
  12323. + break;
  12324. + strcat(arcs_cmdline, ((char *)l));
  12325. + strcat(arcs_cmdline, " ");
  12326. + }
  12327. +
  12328. + /* machine specific prom_init_cmdline */
  12329. + mach_prom_init_cmdline();
  12330. +
  12331. + if ((strstr(arcs_cmdline, "console=")) == NULL)
  12332. + strcat(arcs_cmdline, " console=tty");
  12333. + if ((strstr(arcs_cmdline, "root=")) == NULL)
  12334. + strcat(arcs_cmdline, " root=/dev/sda1");
  12335. +}
  12336. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_acc.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_acc.c
  12337. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_acc.c 1970-01-01 01:00:00.000000000 +0100
  12338. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_acc.c 2009-08-23 19:01:04.000000000 +0200
  12339. @@ -0,0 +1,156 @@
  12340. +/*
  12341. + * the ACC Virtual Support Module of AMD CS5536
  12342. + *
  12343. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  12344. + * Author : jlliu, liujl@lemote.com
  12345. + *
  12346. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  12347. + * Author: Wu Zhangjin, wuzj@lemote.com
  12348. + *
  12349. + * This program is free software; you can redistribute it and/or modify it
  12350. + * under the terms of the GNU General Public License as published by the
  12351. + * Free Software Foundation; either version 2 of the License, or (at your
  12352. + * option) any later version.
  12353. + */
  12354. +
  12355. +#include <cs5536/cs5536.h>
  12356. +#include <cs5536/cs5536_pci.h>
  12357. +
  12358. +/*
  12359. + * acc_write: acc write transfering
  12360. + */
  12361. +
  12362. +void pci_acc_write_reg(int reg, u32 value)
  12363. +{
  12364. + u32 hi = 0, lo = value;
  12365. +
  12366. + switch (reg) {
  12367. + case PCI_COMMAND:
  12368. + _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
  12369. + if (value & PCI_COMMAND_MASTER)
  12370. + lo |= (0x03 << 8);
  12371. + else
  12372. + lo &= ~(0x03 << 8);
  12373. + _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);
  12374. + break;
  12375. + case PCI_STATUS:
  12376. + if (value & PCI_STATUS_PARITY) {
  12377. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12378. + if (lo & SB_PARE_ERR_FLAG) {
  12379. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  12380. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  12381. + }
  12382. + }
  12383. + break;
  12384. + case PCI_BAR0_REG:
  12385. + if (value == PCI_BAR_RANGE_MASK) {
  12386. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12387. + lo |= SOFT_BAR_ACC_FLAG;
  12388. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12389. + } else if (value & 0x01) {
  12390. + value &= 0xfffffffc;
  12391. + hi = 0xA0000000 | ((value & 0x000ff000) >> 12);
  12392. + lo = 0x000fff80 | ((value & 0x00000fff) << 20);
  12393. + _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM1), hi, lo);
  12394. + }
  12395. + break;
  12396. + case PCI_ACC_INT_REG:
  12397. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
  12398. + /* disable all the usb interrupt in PIC */
  12399. + lo &= ~(0xf << PIC_YSEL_LOW_ACC_SHIFT);
  12400. + if (value) /* enable all the acc interrupt in PIC */
  12401. + lo |= (CS5536_ACC_INTR << PIC_YSEL_LOW_ACC_SHIFT);
  12402. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
  12403. + break;
  12404. + default:
  12405. + break;
  12406. + }
  12407. +
  12408. + return;
  12409. +}
  12410. +
  12411. +/*
  12412. + * acc_read: acc read transfering
  12413. + */
  12414. +
  12415. +u32 pci_acc_read_reg(int reg)
  12416. +{
  12417. + u32 hi, lo;
  12418. + u32 conf_data = 0;
  12419. +
  12420. + switch (reg) {
  12421. + case PCI_VENDOR_ID:
  12422. + conf_data =
  12423. + CFG_PCI_VENDOR_ID(CS5536_ACC_DEVICE_ID, CS5536_VENDOR_ID);
  12424. + break;
  12425. + case PCI_COMMAND:
  12426. + _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo);
  12427. + if (((lo & 0xfff00000) || (hi & 0x000000ff))
  12428. + && ((hi & 0xf0000000) == 0xa0000000))
  12429. + conf_data |= PCI_COMMAND_IO;
  12430. + _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
  12431. + if ((lo & 0x300) == 0x300)
  12432. + conf_data |= PCI_COMMAND_MASTER;
  12433. + break;
  12434. + case PCI_STATUS:
  12435. + conf_data |= PCI_STATUS_66MHZ;
  12436. + conf_data |= PCI_STATUS_FAST_BACK;
  12437. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12438. + if (lo & SB_PARE_ERR_FLAG)
  12439. + conf_data |= PCI_STATUS_PARITY;
  12440. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  12441. + break;
  12442. + case PCI_CLASS_REVISION:
  12443. + _rdmsr(ACC_MSR_REG(ACC_CAP), &hi, &lo);
  12444. + conf_data = lo & 0x000000ff;
  12445. + conf_data |= (CS5536_ACC_CLASS_CODE << 8);
  12446. + break;
  12447. + case PCI_CACHE_LINE_SIZE:
  12448. + conf_data =
  12449. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  12450. + PCI_NORMAL_LATENCY_TIMER);
  12451. + break;
  12452. + case PCI_BAR0_REG:
  12453. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12454. + if (lo & SOFT_BAR_ACC_FLAG) {
  12455. + conf_data = CS5536_ACC_RANGE |
  12456. + PCI_BASE_ADDRESS_SPACE_IO;
  12457. + lo &= ~SOFT_BAR_ACC_FLAG;
  12458. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12459. + } else {
  12460. + _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo);
  12461. + conf_data = (hi & 0x000000ff) << 12;
  12462. + conf_data |= (lo & 0xfff00000) >> 20;
  12463. + conf_data |= 0x01;
  12464. + conf_data &= ~0x02;
  12465. + }
  12466. + break;
  12467. + case PCI_BAR1_REG:
  12468. + case PCI_BAR2_REG:
  12469. + case PCI_BAR3_REG:
  12470. + case PCI_BAR4_REG:
  12471. + case PCI_BAR5_REG:
  12472. + break;
  12473. + case PCI_CARDBUS_CIS:
  12474. + conf_data = PCI_CARDBUS_CIS_POINTER;
  12475. + break;
  12476. + case PCI_SUBSYSTEM_VENDOR_ID:
  12477. + conf_data =
  12478. + CFG_PCI_VENDOR_ID(CS5536_ACC_SUB_ID, CS5536_SUB_VENDOR_ID);
  12479. + break;
  12480. + case PCI_ROM_ADDRESS:
  12481. + conf_data = PCI_EXPANSION_ROM_BAR;
  12482. + break;
  12483. + case PCI_CAPABILITY_LIST:
  12484. + conf_data = PCI_CAPLIST_USB_POINTER;
  12485. + break;
  12486. + case PCI_INTERRUPT_LINE:
  12487. + conf_data =
  12488. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_ACC_INTR);
  12489. + break;
  12490. + default:
  12491. + break;
  12492. + }
  12493. +
  12494. + return conf_data;
  12495. +}
  12496. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ehci.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ehci.c
  12497. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ehci.c 1970-01-01 01:00:00.000000000 +0100
  12498. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ehci.c 2009-08-23 19:01:04.000000000 +0200
  12499. @@ -0,0 +1,166 @@
  12500. +/*
  12501. + * the EHCI Virtual Support Module of AMD CS5536
  12502. + *
  12503. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  12504. + * Author : jlliu, liujl@lemote.com
  12505. + *
  12506. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  12507. + * Author: Wu Zhangjin, wuzj@lemote.com
  12508. + *
  12509. + * This program is free software; you can redistribute it and/or modify it
  12510. + * under the terms of the GNU General Public License as published by the
  12511. + * Free Software Foundation; either version 2 of the License, or (at your
  12512. + * option) any later version.
  12513. + */
  12514. +
  12515. +#include <cs5536/cs5536.h>
  12516. +#include <cs5536/cs5536_pci.h>
  12517. +
  12518. +void pci_ehci_write_reg(int reg, u32 value)
  12519. +{
  12520. + u32 hi = 0, lo = value;
  12521. +
  12522. + switch (reg) {
  12523. + case PCI_COMMAND:
  12524. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12525. + if (value & PCI_COMMAND_MASTER)
  12526. + hi |= PCI_COMMAND_MASTER;
  12527. + else
  12528. + hi &= ~PCI_COMMAND_MASTER;
  12529. +
  12530. + if (value & PCI_COMMAND_MEMORY)
  12531. + hi |= PCI_COMMAND_MEMORY;
  12532. + else
  12533. + hi &= ~PCI_COMMAND_MEMORY;
  12534. + _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
  12535. + break;
  12536. + case PCI_STATUS:
  12537. + if (value & PCI_STATUS_PARITY) {
  12538. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12539. + if (lo & SB_PARE_ERR_FLAG) {
  12540. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  12541. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  12542. + }
  12543. + }
  12544. + break;
  12545. + case PCI_BAR0_REG:
  12546. + if (value == PCI_BAR_RANGE_MASK) {
  12547. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12548. + lo |= SOFT_BAR_EHCI_FLAG;
  12549. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12550. + } else if ((value & 0x01) == 0x00) {
  12551. + _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
  12552. +
  12553. + value &= 0xfffffff0;
  12554. + hi = 0x40000000 | ((value & 0xff000000) >> 24);
  12555. + lo = 0x000fffff | ((value & 0x00fff000) << 8);
  12556. + _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM4), hi, lo);
  12557. + }
  12558. + break;
  12559. + case PCI_EHCI_LEGSMIEN_REG:
  12560. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12561. + hi &= 0x003f0000;
  12562. + hi |= (value & 0x3f) << 16;
  12563. + _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
  12564. + break;
  12565. + case PCI_EHCI_FLADJ_REG:
  12566. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12567. + hi &= ~0x00003f00;
  12568. + hi |= value & 0x00003f00;
  12569. + _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
  12570. + break;
  12571. + default:
  12572. + break;
  12573. + }
  12574. +
  12575. + return;
  12576. +}
  12577. +
  12578. +u32 pci_ehci_read_reg(int reg)
  12579. +{
  12580. + u32 conf_data = 0;
  12581. + u32 hi, lo;
  12582. +
  12583. + switch (reg) {
  12584. + case PCI_VENDOR_ID:
  12585. + conf_data =
  12586. + CFG_PCI_VENDOR_ID(CS5536_EHCI_DEVICE_ID, CS5536_VENDOR_ID);
  12587. + break;
  12588. + case PCI_COMMAND:
  12589. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12590. + if (hi & PCI_COMMAND_MASTER)
  12591. + conf_data |= PCI_COMMAND_MASTER;
  12592. + if (hi & PCI_COMMAND_MEMORY)
  12593. + conf_data |= PCI_COMMAND_MEMORY;
  12594. + break;
  12595. + case PCI_STATUS:
  12596. + conf_data |= PCI_STATUS_66MHZ;
  12597. + conf_data |= PCI_STATUS_FAST_BACK;
  12598. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12599. + if (lo & SB_PARE_ERR_FLAG)
  12600. + conf_data |= PCI_STATUS_PARITY;
  12601. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  12602. + break;
  12603. + case PCI_CLASS_REVISION:
  12604. + _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
  12605. + conf_data = lo & 0x000000ff;
  12606. + conf_data |= (CS5536_EHCI_CLASS_CODE << 8);
  12607. + break;
  12608. + case PCI_CACHE_LINE_SIZE:
  12609. + conf_data =
  12610. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  12611. + PCI_NORMAL_LATENCY_TIMER);
  12612. + break;
  12613. + case PCI_BAR0_REG:
  12614. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12615. + if (lo & SOFT_BAR_EHCI_FLAG) {
  12616. + conf_data = CS5536_EHCI_RANGE |
  12617. + PCI_BASE_ADDRESS_SPACE_MEMORY;
  12618. + lo &= ~SOFT_BAR_EHCI_FLAG;
  12619. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12620. + } else {
  12621. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12622. + conf_data = lo & 0xfffff000;
  12623. + }
  12624. + break;
  12625. + case PCI_BAR1_REG:
  12626. + case PCI_BAR2_REG:
  12627. + case PCI_BAR3_REG:
  12628. + case PCI_BAR4_REG:
  12629. + case PCI_BAR5_REG:
  12630. + break;
  12631. + case PCI_CARDBUS_CIS:
  12632. + conf_data = PCI_CARDBUS_CIS_POINTER;
  12633. + break;
  12634. + case PCI_SUBSYSTEM_VENDOR_ID:
  12635. + conf_data =
  12636. + CFG_PCI_VENDOR_ID(CS5536_EHCI_SUB_ID, CS5536_SUB_VENDOR_ID);
  12637. + break;
  12638. + case PCI_ROM_ADDRESS:
  12639. + conf_data = PCI_EXPANSION_ROM_BAR;
  12640. + break;
  12641. + case PCI_CAPABILITY_LIST:
  12642. + conf_data = PCI_CAPLIST_USB_POINTER;
  12643. + break;
  12644. + case PCI_INTERRUPT_LINE:
  12645. + conf_data =
  12646. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR);
  12647. + break;
  12648. + case PCI_EHCI_LEGSMIEN_REG:
  12649. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12650. + conf_data = (hi & 0x003f0000) >> 16;
  12651. + break;
  12652. + case PCI_EHCI_LEGSMISTS_REG:
  12653. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12654. + conf_data = (hi & 0x3f000000) >> 24;
  12655. + break;
  12656. + case PCI_EHCI_FLADJ_REG:
  12657. + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
  12658. + conf_data = hi & 0x00003f00;
  12659. + break;
  12660. + default:
  12661. + break;
  12662. + }
  12663. +
  12664. + return conf_data;
  12665. +}
  12666. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_flash.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_flash.c
  12667. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_flash.c 1970-01-01 01:00:00.000000000 +0100
  12668. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_flash.c 2009-08-23 19:01:04.000000000 +0200
  12669. @@ -0,0 +1,452 @@
  12670. +/*
  12671. + * the FLASH Virtual Support Module of AMD CS5536
  12672. + *
  12673. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  12674. + * Author : jlliu, liujl@lemote.com
  12675. + *
  12676. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  12677. + * Author: Wu Zhangjin, wuzj@lemote.com
  12678. + *
  12679. + * This program is free software; you can redistribute it and/or modify it
  12680. + * under the terms of the GNU General Public License as published by the
  12681. + * Free Software Foundation; either version 2 of the License, or (at your
  12682. + * option) any later version.
  12683. + */
  12684. +
  12685. +#include <cs5536/cs5536.h>
  12686. +#include <cs5536/cs5536_pci.h>
  12687. +
  12688. +/*
  12689. + * enable the region of flashs(NOR or NAND)
  12690. + *
  12691. + * the same as the DIVIL other modules above, two groups of regs should be
  12692. + * modified here to control the region. DIVIL flash LBAR and the
  12693. + * RCONFx(6~9 reserved).
  12694. + */
  12695. +static void flash_lbar_enable(void)
  12696. +{
  12697. + u32 hi, lo;
  12698. + int offset;
  12699. +
  12700. + for (offset = DIVIL_LBAR_FLSH0; offset <= DIVIL_LBAR_FLSH3; offset++) {
  12701. + _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
  12702. + hi |= 0x1;
  12703. + _wrmsr(DIVIL_MSR_REG(offset), hi, lo);
  12704. + }
  12705. +
  12706. + for (offset = SB_R6; offset <= SB_R9; offset++) {
  12707. + _rdmsr(SB_MSR_REG(offset), &hi, &lo);
  12708. + lo |= 0x1;
  12709. + _wrmsr(SB_MSR_REG(offset), hi, lo);
  12710. + }
  12711. +
  12712. + return;
  12713. +}
  12714. +
  12715. +/*
  12716. + * disable the region of flashs(NOR or NAND)
  12717. + */
  12718. +static void flash_lbar_disable(void)
  12719. +{
  12720. + u32 hi, lo;
  12721. + int offset;
  12722. +
  12723. + for (offset = DIVIL_LBAR_FLSH0; offset <= DIVIL_LBAR_FLSH3; offset++) {
  12724. + _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
  12725. + hi &= ~0x01;
  12726. + _wrmsr(DIVIL_MSR_REG(offset), hi, lo);
  12727. + }
  12728. + for (offset = SB_R6; offset <= SB_R9; offset++) {
  12729. + _rdmsr(SB_MSR_REG(offset), &hi, &lo);
  12730. + lo &= ~0x01;
  12731. + _wrmsr(SB_MSR_REG(offset), hi, lo);
  12732. + }
  12733. +
  12734. + return;
  12735. +}
  12736. +
  12737. +#ifndef CONFIG_CS5536_NOR_FLASH /* for nand flash */
  12738. +
  12739. +void pci_flash_write_bar(int n, u32 value)
  12740. +{
  12741. + u32 hi = 0, lo = value;
  12742. +
  12743. + if (value == PCI_BAR_RANGE_MASK) {
  12744. + /* make the flag for reading the bar length. */
  12745. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12746. + lo |= (SOFT_BAR_FLSH0_FLAG << n);
  12747. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12748. + } else if ((value & 0x01) == 0x00) {
  12749. + /* mem space nand flash native reg base addr */
  12750. + hi = 0xfffff007;
  12751. + lo &= CS5536_FLSH_RANGE;
  12752. + _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0 + n), hi, lo);
  12753. +
  12754. + /* RCONFx is 4KB in units for mem space. */
  12755. + hi = ((value & 0xfffff000) << 12) |
  12756. + ((CS5536_FLSH_LENGTH & 0xfffff000) - (1 << 12)) | 0x00;
  12757. + lo = ((value & 0xfffff000) << 12) | 0x01;
  12758. + _wrmsr(SB_MSR_REG(SB_R6 + n), hi, lo);
  12759. + }
  12760. + return;
  12761. +}
  12762. +
  12763. +void pci_flash_write_reg(int reg, u32 value)
  12764. +{
  12765. + u32 hi = 0, lo = value;
  12766. +
  12767. + switch (reg) {
  12768. + case PCI_COMMAND:
  12769. + if (value & PCI_COMMAND_MEMORY)
  12770. + flash_lbar_enable();
  12771. + else
  12772. + flash_lbar_disable();
  12773. + break;
  12774. + case PCI_STATUS:
  12775. + if (value & PCI_STATUS_PARITY) {
  12776. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12777. + if (lo & SB_PARE_ERR_FLAG) {
  12778. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  12779. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  12780. + }
  12781. + }
  12782. + break;
  12783. + case PCI_BAR0_REG:
  12784. + pci_flash_write_bar(0, value);
  12785. + break;
  12786. + case PCI_BAR1_REG:
  12787. + pci_flash_write_bar(1, value);
  12788. + break;
  12789. + case PCI_BAR2_REG:
  12790. + pci_flash_write_bar(2, value);
  12791. + break;
  12792. + case PCI_BAR3_REG:
  12793. + pci_flash_write_bar(3, value);
  12794. + break;
  12795. + case PCI_FLASH_INT_REG:
  12796. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
  12797. + /* disable all the flash interrupt in PIC */
  12798. + lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
  12799. + if (value) /* enable all the flash interrupt in PIC */
  12800. + lo |= (CS5536_FLASH_INTR << PIC_YSEL_LOW_FLASH_SHIFT);
  12801. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
  12802. + break;
  12803. + case PCI_NAND_FLASH_TDATA_REG:
  12804. + _wrmsr(DIVIL_MSR_REG(NANDF_DATA), hi, lo);
  12805. + break;
  12806. + case PCI_NAND_FLASH_TCTRL_REG:
  12807. + lo &= 0x00000fff;
  12808. + _wrmsr(DIVIL_MSR_REG(NANDF_CTRL), hi, lo);
  12809. + break;
  12810. + case PCI_NAND_FLASH_RSVD_REG:
  12811. + _wrmsr(DIVIL_MSR_REG(NANDF_RSVD), hi, lo);
  12812. + break;
  12813. + case PCI_FLASH_SELECT_REG:
  12814. + if (value == CS5536_IDE_FLASH_SIGNATURE) {
  12815. + _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
  12816. + lo &= ~0x01;
  12817. + _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
  12818. + }
  12819. + break;
  12820. + default:
  12821. + break;
  12822. + }
  12823. +
  12824. + return;
  12825. +}
  12826. +
  12827. +u32 pci_flash_read_bar(int n)
  12828. +{
  12829. + u32 hi, lo;
  12830. + u32 conf_data = 0;
  12831. +
  12832. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12833. + if (lo & (SOFT_BAR_FLSH0_FLAG << n)) {
  12834. + conf_data = CS5536_FLSH_RANGE | PCI_BASE_ADDRESS_SPACE_MEMORY;
  12835. + lo &= ~(SOFT_BAR_FLSH0_FLAG << n);
  12836. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12837. + } else {
  12838. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0 + n), &hi, &lo);
  12839. + conf_data = lo;
  12840. + conf_data &= ~0x0f;
  12841. + }
  12842. +
  12843. + return conf_data;
  12844. +}
  12845. +
  12846. +u32 pci_flash_read_reg(int reg)
  12847. +{
  12848. + u32 conf_data = 0;
  12849. + u32 hi, lo;
  12850. +
  12851. + switch (reg) {
  12852. + case PCI_VENDOR_ID:
  12853. + conf_data =
  12854. + CFG_PCI_VENDOR_ID(CS5536_FLASH_DEVICE_ID, CS5536_VENDOR_ID);
  12855. + break;
  12856. + case PCI_COMMAND:
  12857. + /* we just read one lbar for returning. */
  12858. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
  12859. + if (hi & 0x1)
  12860. + conf_data |= PCI_COMMAND_MEMORY;
  12861. + break;
  12862. + case PCI_STATUS:
  12863. + conf_data |= PCI_STATUS_66MHZ;
  12864. + conf_data |= PCI_STATUS_FAST_BACK;
  12865. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12866. + if (lo & SB_PARE_ERR_FLAG)
  12867. + conf_data |= PCI_STATUS_PARITY;
  12868. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  12869. + break;
  12870. + case PCI_CLASS_REVISION:
  12871. + _rdmsr(DIVIL_MSR_REG(DIVIL_CAP), &hi, &lo);
  12872. + conf_data = lo & 0x000000ff;
  12873. + conf_data |= (CS5536_FLASH_CLASS_CODE << 8);
  12874. + break;
  12875. + case PCI_CACHE_LINE_SIZE:
  12876. + conf_data =
  12877. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  12878. + PCI_NORMAL_LATENCY_TIMER);
  12879. + break;
  12880. + case PCI_BAR0_REG:
  12881. + return pci_flash_read_bar(0);
  12882. + break;
  12883. + case PCI_BAR1_REG:
  12884. + return pci_flash_read_bar(1);
  12885. + break;
  12886. + case PCI_BAR2_REG:
  12887. + return pci_flash_read_bar(2);
  12888. + break;
  12889. + case PCI_BAR3_REG:
  12890. + return pci_flash_read_bar(3);
  12891. + break;
  12892. + case PCI_CARDBUS_CIS:
  12893. + conf_data = PCI_CARDBUS_CIS_POINTER;
  12894. + break;
  12895. + case PCI_SUBSYSTEM_VENDOR_ID:
  12896. + conf_data =
  12897. + CFG_PCI_VENDOR_ID(CS5536_FLASH_SUB_ID,
  12898. + CS5536_SUB_VENDOR_ID);
  12899. + break;
  12900. + case PCI_ROM_ADDRESS:
  12901. + conf_data = PCI_EXPANSION_ROM_BAR;
  12902. + break;
  12903. + case PCI_CAPABILITY_LIST:
  12904. + conf_data = PCI_CAPLIST_POINTER;
  12905. + break;
  12906. + case PCI_INTERRUPT_LINE:
  12907. + conf_data =
  12908. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_FLASH_INTR);
  12909. + break;
  12910. + case PCI_NAND_FLASH_TDATA_REG:
  12911. + _rdmsr(DIVIL_MSR_REG(NANDF_DATA), &hi, &lo);
  12912. + conf_data = lo;
  12913. + break;
  12914. + case PCI_NAND_FLASH_TCTRL_REG:
  12915. + _rdmsr(DIVIL_MSR_REG(NANDF_CTRL), &hi, &lo);
  12916. + conf_data = lo & 0x00000fff;
  12917. + break;
  12918. + case PCI_NAND_FLASH_RSVD_REG:
  12919. + _rdmsr(DIVIL_MSR_REG(NANDF_RSVD), &hi, &lo);
  12920. + conf_data = lo;
  12921. + break;
  12922. + case PCI_FLASH_SELECT_REG:
  12923. + _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
  12924. + conf_data = lo & 0x01;
  12925. + break;
  12926. + default:
  12927. + break;
  12928. + }
  12929. + return 0;
  12930. +}
  12931. +
  12932. +#else /* CONFIG_CS5536_NOR_FLASH */
  12933. +
  12934. +void pci_flash_write_bar(int n, u32 value)
  12935. +{
  12936. + u32 hi = 0, lo = value;
  12937. +
  12938. + if (value == PCI_BAR_RANGE_MASK) {
  12939. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  12940. + lo |= (SOFT_BAR_FLSH0_FLAG << n);
  12941. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  12942. + } else if (value & 0x01) {
  12943. + /* IO space of 16bytes nor flash */
  12944. + hi = 0x0000fff1;
  12945. + lo &= CS5536_FLSH_RANGE;
  12946. + _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0 + n), hi, lo);
  12947. +
  12948. + /* RCONFx used for 16bytes reserved. */
  12949. + hi = ((value & 0x000ffffc) << 12) | ((CS5536_FLSH_LENGTH - 4)
  12950. + << 12) | 0x01;
  12951. + lo = ((value & 0x000ffffc) << 12) | 0x01;
  12952. + _wrmsr(SB_MSR_REG(SB_R6 + n), hi, lo);
  12953. + }
  12954. + return;
  12955. +}
  12956. +
  12957. +void pci_flash_write_reg(int reg, u32 value)
  12958. +{
  12959. + u32 hi = 0, lo = value;
  12960. +
  12961. + switch (reg) {
  12962. + case PCI_COMMAND:
  12963. + if (value & PCI_COMMAND_IO)
  12964. + flash_lbar_enable();
  12965. + else
  12966. + flash_lbar_disable();
  12967. + break;
  12968. + case PCI_STATUS:
  12969. + if (value & PCI_STATUS_PARITY) {
  12970. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  12971. + if (lo & SB_PARE_ERR_FLAG) {
  12972. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  12973. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  12974. + }
  12975. + }
  12976. + break;
  12977. + case PCI_BAR0_REG:
  12978. + pci_flash_write_bar(0, value);
  12979. + break;
  12980. + case PCI_BAR1_REG:
  12981. + pci_flash_write_bar(1, value);
  12982. + break;
  12983. + case PCI_BAR2_REG:
  12984. + pci_flash_write_bar(2, value);
  12985. + break;
  12986. + case PCI_BAR3_REG:
  12987. + pci_flash_write_bar(3, value);
  12988. + break;
  12989. + case PCI_FLASH_INT_REG:
  12990. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
  12991. + /* disable all the flash interrupt in PIC */
  12992. + lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
  12993. + if (value) /* enable all the flash interrupt in PIC */
  12994. + lo |= (CS5536_FLASH_INTR << PIC_YSEL_LOW_FLASH_SHIFT);
  12995. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
  12996. + break;
  12997. + case PCI_NOR_FLASH_CTRL_REG:
  12998. + lo &= 0x000000ff;
  12999. + _wrmsr(DIVIL_MSR_REG(NORF_CTRL), hi, lo);
  13000. + break;
  13001. + case PCI_NOR_FLASH_T01_REG:
  13002. + _wrmsr(DIVIL_MSR_REG(NORF_T01), hi, lo);
  13003. + break;
  13004. + case PCI_NOR_FLASH_T23_REG:
  13005. + _wrmsr(DIVIL_MSR_REG(NORF_T23), hi, lo);
  13006. + break;
  13007. + case PCI_FLASH_SELECT_REG:
  13008. + if (value == CS5536_IDE_FLASH_SIGNATURE) {
  13009. + _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
  13010. + lo &= ~0x01;
  13011. + _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
  13012. + }
  13013. + break;
  13014. + default:
  13015. + break;
  13016. + }
  13017. + return;
  13018. +}
  13019. +
  13020. +u32 pci_flash_read_bar(int n)
  13021. +{
  13022. + u32 hi, lo;
  13023. + u32 conf_data = 0;
  13024. +
  13025. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  13026. + if (lo & (SOFT_BAR_FLSH0_FLAG << n)) {
  13027. + conf_data = CS5536_FLSH_RANGE | PCI_BASE_ADDRESS_SPACE_IO;
  13028. + lo &= ~(SOFT_BAR_FLSH0_FLAG << n);
  13029. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  13030. + } else {
  13031. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0 + n), &hi, &lo);
  13032. + conf_data = lo & 0x0000ffff;
  13033. + conf_data |= 0x01;
  13034. + conf_data &= ~0x02;
  13035. + }
  13036. +
  13037. + return conf_data;
  13038. +}
  13039. +
  13040. +u32 pci_flash_read_reg(int reg)
  13041. +{
  13042. + u32 conf_data = 0;
  13043. + u32 hi, lo;
  13044. +
  13045. + switch (reg) {
  13046. + case PCI_VENDOR_ID:
  13047. + conf_data =
  13048. + CFG_PCI_VENDOR_ID(CS5536_FLASH_DEVICE_ID, CS5536_VENDOR_ID);
  13049. + break;
  13050. + case PCI_COMMAND:
  13051. + /* we just check one flash bar for returning. */
  13052. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
  13053. + if (hi & PCI_COMMAND_IO)
  13054. + conf_data |= PCI_COMMAND_IO;
  13055. + break;
  13056. + case PCI_STATUS:
  13057. + conf_data |= PCI_STATUS_66MHZ;
  13058. + conf_data |= PCI_STATUS_FAST_BACK;
  13059. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13060. + if (lo & SB_PARE_ERR_FLAG)
  13061. + conf_data |= PCI_STATUS_PARITY;
  13062. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  13063. + break;
  13064. + case PCI_CLASS_REVISION:
  13065. + _rdmsr(DIVIL_MSR_REG(DIVIL_CAP), &hi, &lo);
  13066. + conf_data = lo & 0x000000ff;
  13067. + conf_data |= (CS5536_FLASH_CLASS_CODE << 8);
  13068. + break;
  13069. + case PCI_CACHE_LINE_SIZE:
  13070. + conf_data =
  13071. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  13072. + PCI_NORMAL_LATENCY_TIMER);
  13073. + break;
  13074. + case PCI_BAR0_REG:
  13075. + return pci_flash_read_bar(0);
  13076. + break;
  13077. + case PCI_BAR1_REG:
  13078. + return pci_flash_read_bar(1);
  13079. + break;
  13080. + case PCI_BAR2_REG:
  13081. + return pci_flash_read_bar(2);
  13082. + break;
  13083. + case PCI_BAR3_REG:
  13084. + return pci_flash_read_bar(3);
  13085. + break;
  13086. + case PCI_CARDBUS_CIS:
  13087. + conf_data = PCI_CARDBUS_CIS_POINTER;
  13088. + break;
  13089. + case PCI_SUBSYSTEM_VENDOR_ID:
  13090. + conf_data =
  13091. + CFG_PCI_VENDOR_ID(CS5536_FLASH_SUB_ID,
  13092. + CS5536_SUB_VENDOR_ID);
  13093. + break;
  13094. + case PCI_ROM_ADDRESS:
  13095. + conf_data = PCI_EXPANSION_ROM_BAR;
  13096. + break;
  13097. + case PCI_CAPABILITY_LIST:
  13098. + conf_data = PCI_CAPLIST_POINTER;
  13099. + break;
  13100. + case PCI_INTERRUPT_LINE:
  13101. + conf_data =
  13102. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_FLASH_INTR);
  13103. + break;
  13104. + case PCI_NOR_FLASH_CTRL_REG:
  13105. + _rdmsr(DIVIL_MSR_REG(NORF_CTRL), &hi, &lo);
  13106. + conf_data = lo & 0x000000ff;
  13107. + break;
  13108. + case PCI_NOR_FLASH_T01_REG:
  13109. + _rdmsr(DIVIL_MSR_REG(NORF_T01), &hi, &lo);
  13110. + conf_data = lo;
  13111. + break;
  13112. + case PCI_NOR_FLASH_T23_REG:
  13113. + _rdmsr(DIVIL_MSR_REG(NORF_T23), &hi, &lo);
  13114. + conf_data = lo;
  13115. + break;
  13116. + default:
  13117. + break;
  13118. + }
  13119. + return conf_data;
  13120. +}
  13121. +#endif /* CONFIG_CS5536_NOR_FLASH */
  13122. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ide.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ide.c
  13123. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ide.c 1970-01-01 01:00:00.000000000 +0100
  13124. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ide.c 2009-08-23 19:01:04.000000000 +0200
  13125. @@ -0,0 +1,194 @@
  13126. +/*
  13127. + * the IDE Virtual Support Module of AMD CS5536
  13128. + *
  13129. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  13130. + * Author : jlliu, liujl@lemote.com
  13131. + *
  13132. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  13133. + * Author: Wu Zhangjin, wuzj@lemote.com
  13134. + *
  13135. + * This program is free software; you can redistribute it and/or modify it
  13136. + * under the terms of the GNU General Public License as published by the
  13137. + * Free Software Foundation; either version 2 of the License, or (at your
  13138. + * option) any later version.
  13139. + */
  13140. +
  13141. +#include <cs5536/cs5536.h>
  13142. +#include <cs5536/cs5536_pci.h>
  13143. +
  13144. +/*
  13145. + * ide_write : ide write transfering
  13146. + */
  13147. +void pci_ide_write_reg(int reg, u32 value)
  13148. +{
  13149. + u32 hi = 0, lo = value;
  13150. +
  13151. + switch (reg) {
  13152. + case PCI_COMMAND:
  13153. + _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
  13154. + if (value & PCI_COMMAND_MASTER)
  13155. + lo |= (0x03 << 4);
  13156. + else
  13157. + lo &= ~(0x03 << 4);
  13158. + _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);
  13159. + break;
  13160. + case PCI_STATUS:
  13161. + if (value & PCI_STATUS_PARITY) {
  13162. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13163. + if (lo & SB_PARE_ERR_FLAG) {
  13164. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  13165. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  13166. + }
  13167. + }
  13168. + break;
  13169. + case PCI_CACHE_LINE_SIZE:
  13170. + value &= 0x0000ff00;
  13171. + _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
  13172. + hi &= 0xffffff00;
  13173. + hi |= (value >> 8);
  13174. + _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo);
  13175. + break;
  13176. + case PCI_BAR4_REG:
  13177. + if (value == PCI_BAR_RANGE_MASK) {
  13178. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  13179. + lo |= SOFT_BAR_IDE_FLAG;
  13180. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  13181. + } else if (value & 0x01) {
  13182. + lo = (value & 0xfffffff0) | 0x1;
  13183. + _wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo);
  13184. +
  13185. + value &= 0xfffffffc;
  13186. + hi = 0x60000000 | ((value & 0x000ff000) >> 12);
  13187. + lo = 0x000ffff0 | ((value & 0x00000fff) << 20);
  13188. + _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM2), hi, lo);
  13189. + }
  13190. + break;
  13191. + case PCI_IDE_CFG_REG:
  13192. + if (value == CS5536_IDE_FLASH_SIGNATURE) {
  13193. + _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
  13194. + lo |= 0x01;
  13195. + _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
  13196. + } else
  13197. + _wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo);
  13198. + break;
  13199. + case PCI_IDE_DTC_REG:
  13200. + _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo);
  13201. + break;
  13202. + case PCI_IDE_CAST_REG:
  13203. + _wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo);
  13204. + break;
  13205. + case PCI_IDE_ETC_REG:
  13206. + _wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo);
  13207. + break;
  13208. + case PCI_IDE_PM_REG:
  13209. + _wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo);
  13210. + break;
  13211. + default:
  13212. + break;
  13213. + }
  13214. +
  13215. + return;
  13216. +}
  13217. +
  13218. +/*
  13219. + * ide_read : ide read tranfering.
  13220. + */
  13221. +u32 pci_ide_read_reg(int reg)
  13222. +{
  13223. + u32 conf_data = 0;
  13224. + u32 hi, lo;
  13225. +
  13226. + switch (reg) {
  13227. + case PCI_VENDOR_ID:
  13228. + conf_data =
  13229. + CFG_PCI_VENDOR_ID(CS5536_IDE_DEVICE_ID, CS5536_VENDOR_ID);
  13230. + break;
  13231. + case PCI_COMMAND:
  13232. + _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
  13233. + if (lo & 0xfffffff0)
  13234. + conf_data |= PCI_COMMAND_IO;
  13235. + _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
  13236. + if ((lo & 0x30) == 0x30)
  13237. + conf_data |= PCI_COMMAND_MASTER;
  13238. + break;
  13239. + case PCI_STATUS:
  13240. + conf_data |= PCI_STATUS_66MHZ;
  13241. + conf_data |= PCI_STATUS_FAST_BACK;
  13242. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13243. + if (lo & SB_PARE_ERR_FLAG)
  13244. + conf_data |= PCI_STATUS_PARITY;
  13245. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  13246. + break;
  13247. + case PCI_CLASS_REVISION:
  13248. + _rdmsr(IDE_MSR_REG(IDE_CAP), &hi, &lo);
  13249. + conf_data = lo & 0x000000ff;
  13250. + conf_data |= (CS5536_IDE_CLASS_CODE << 8);
  13251. + break;
  13252. + case PCI_CACHE_LINE_SIZE:
  13253. + _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
  13254. + hi &= 0x000000f8;
  13255. + conf_data = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, hi);
  13256. + break;
  13257. + case PCI_BAR0_REG:
  13258. + case PCI_BAR1_REG:
  13259. + case PCI_BAR2_REG:
  13260. + case PCI_BAR3_REG:
  13261. + break;
  13262. + case PCI_BAR4_REG:
  13263. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  13264. + if (lo & SOFT_BAR_IDE_FLAG) {
  13265. + conf_data = CS5536_IDE_RANGE |
  13266. + PCI_BASE_ADDRESS_SPACE_IO;
  13267. + lo &= ~SOFT_BAR_IDE_FLAG;
  13268. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  13269. + } else {
  13270. + _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
  13271. + conf_data = lo & 0xfffffff0;
  13272. + conf_data |= 0x01;
  13273. + conf_data &= ~0x02;
  13274. + }
  13275. + break;
  13276. + case PCI_BAR5_REG:
  13277. + break;
  13278. + case PCI_CARDBUS_CIS:
  13279. + conf_data = PCI_CARDBUS_CIS_POINTER;
  13280. + break;
  13281. + case PCI_SUBSYSTEM_VENDOR_ID:
  13282. + conf_data =
  13283. + CFG_PCI_VENDOR_ID(CS5536_IDE_SUB_ID, CS5536_SUB_VENDOR_ID);
  13284. + break;
  13285. + case PCI_ROM_ADDRESS:
  13286. + conf_data = PCI_EXPANSION_ROM_BAR;
  13287. + break;
  13288. + case PCI_CAPABILITY_LIST:
  13289. + conf_data = PCI_CAPLIST_POINTER;
  13290. + break;
  13291. + case PCI_INTERRUPT_LINE:
  13292. + conf_data =
  13293. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_IDE_INTR);
  13294. + break;
  13295. + case PCI_IDE_CFG_REG:
  13296. + _rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo);
  13297. + conf_data = lo;
  13298. + break;
  13299. + case PCI_IDE_DTC_REG:
  13300. + _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo);
  13301. + conf_data = lo;
  13302. + break;
  13303. + case PCI_IDE_CAST_REG:
  13304. + _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo);
  13305. + conf_data = lo;
  13306. + break;
  13307. + case PCI_IDE_ETC_REG:
  13308. + _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo);
  13309. + conf_data = lo;
  13310. + case PCI_IDE_PM_REG:
  13311. + _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo);
  13312. + conf_data = lo;
  13313. + break;
  13314. + default:
  13315. + break;
  13316. + }
  13317. +
  13318. + return conf_data;
  13319. +}
  13320. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_isa.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_isa.c
  13321. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_isa.c 1970-01-01 01:00:00.000000000 +0100
  13322. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_isa.c 2009-08-23 19:01:04.000000000 +0200
  13323. @@ -0,0 +1,376 @@
  13324. +/*
  13325. + * the ISA Virtual Support Module of AMD CS5536
  13326. + *
  13327. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  13328. + * Author : jlliu, liujl@lemote.com
  13329. + *
  13330. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  13331. + * Author: Wu Zhangjin, wuzj@lemote.com
  13332. + *
  13333. + * This program is free software; you can redistribute it and/or modify it
  13334. + * under the terms of the GNU General Public License as published by the
  13335. + * Free Software Foundation; either version 2 of the License, or (at your
  13336. + * option) any later version.
  13337. + */
  13338. +
  13339. +#include <cs5536/cs5536.h>
  13340. +#include <cs5536/cs5536_pci.h>
  13341. +
  13342. +/* common variables for PCI_ISA_READ/WRITE_BAR */
  13343. +static const u32 divil_msr_reg[6] = {
  13344. + DIVIL_MSR_REG(DIVIL_LBAR_SMB), DIVIL_MSR_REG(DIVIL_LBAR_GPIO),
  13345. + DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), DIVIL_MSR_REG(DIVIL_LBAR_IRQ),
  13346. + DIVIL_MSR_REG(DIVIL_LBAR_PMS), DIVIL_MSR_REG(DIVIL_LBAR_ACPI),
  13347. +};
  13348. +
  13349. +static const u32 soft_bar_flag[6] = {
  13350. + SOFT_BAR_SMB_FLAG, SOFT_BAR_GPIO_FLAG, SOFT_BAR_MFGPT_FLAG,
  13351. + SOFT_BAR_IRQ_FLAG, SOFT_BAR_PMS_FLAG, SOFT_BAR_ACPI_FLAG,
  13352. +};
  13353. +
  13354. +static const u32 sb_msr_reg[6] = {
  13355. + SB_MSR_REG(SB_R0), SB_MSR_REG(SB_R1), SB_MSR_REG(SB_R2),
  13356. + SB_MSR_REG(SB_R3), SB_MSR_REG(SB_R4), SB_MSR_REG(SB_R5),
  13357. +};
  13358. +
  13359. +static const u32 bar_space_range[6] = {
  13360. + CS5536_SMB_RANGE, CS5536_GPIO_RANGE, CS5536_MFGPT_RANGE,
  13361. + CS5536_IRQ_RANGE, CS5536_PMS_RANGE, CS5536_ACPI_RANGE,
  13362. +};
  13363. +
  13364. +static const int bar_space_len[6] = {
  13365. + CS5536_SMB_LENGTH, CS5536_GPIO_LENGTH, CS5536_MFGPT_LENGTH,
  13366. + CS5536_IRQ_LENGTH, CS5536_PMS_LENGTH, CS5536_ACPI_LENGTH,
  13367. +};
  13368. +
  13369. +/*
  13370. + * enable the divil module bar space.
  13371. + *
  13372. + * For all the DIVIL module LBAR, you should control the DIVIL LBAR reg
  13373. + * and the RCONFx(0~5) reg to use the modules.
  13374. + */
  13375. +static void divil_lbar_enable(void)
  13376. +{
  13377. + u32 hi, lo;
  13378. + int offset;
  13379. +
  13380. + /*
  13381. + * The DIVIL IRQ is not used yet. and make the RCONF0 reserved.
  13382. + */
  13383. +
  13384. + for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {
  13385. + _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
  13386. + hi |= 0x01;
  13387. + _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
  13388. + }
  13389. + return;
  13390. +}
  13391. +
  13392. +/*
  13393. + * disable the divil module bar space.
  13394. + */
  13395. +static void divil_lbar_disable(void)
  13396. +{
  13397. + u32 hi, lo;
  13398. + int offset;
  13399. +
  13400. + for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {
  13401. + _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);
  13402. + hi &= ~0x01;
  13403. + _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
  13404. + }
  13405. + return;
  13406. +}
  13407. +
  13408. +/*
  13409. + * BAR write: write value to the n BAR
  13410. + */
  13411. +
  13412. +void pci_isa_write_bar(int n, u32 value)
  13413. +{
  13414. + u32 hi = 0, lo = value;
  13415. +
  13416. + if (value == PCI_BAR_RANGE_MASK) {
  13417. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  13418. + lo |= soft_bar_flag[n];
  13419. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  13420. + } else if (value & 0x01) {
  13421. + /* NATIVE reg */
  13422. + hi = 0x0000f001;
  13423. + lo &= bar_space_range[n];
  13424. + _wrmsr(divil_msr_reg[n], hi, lo);
  13425. +
  13426. + /* RCONFx is 4bytes in units for I/O space */
  13427. + hi = ((value & 0x000ffffc) << 12) |
  13428. + ((bar_space_len[n] - 4) << 12) | 0x01;
  13429. + lo = ((value & 0x000ffffc) << 12) | 0x01;
  13430. + _wrmsr(sb_msr_reg[n], hi, lo);
  13431. + }
  13432. +
  13433. + return;
  13434. +}
  13435. +
  13436. +/*
  13437. + * BAR read: read the n BAR
  13438. + */
  13439. +
  13440. +u32 pci_isa_read_bar(int n)
  13441. +{
  13442. + u32 conf_data = 0;
  13443. + u32 hi, lo;
  13444. +
  13445. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  13446. + if (lo & soft_bar_flag[n]) {
  13447. + conf_data = bar_space_range[n] | PCI_BASE_ADDRESS_SPACE_IO;
  13448. + lo &= ~soft_bar_flag[n];
  13449. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  13450. + } else {
  13451. + _rdmsr(divil_msr_reg[n], &hi, &lo);
  13452. + conf_data = lo & bar_space_range[n];
  13453. + conf_data |= 0x01;
  13454. + conf_data &= ~0x02;
  13455. + }
  13456. + return conf_data;
  13457. +}
  13458. +
  13459. +/*
  13460. + * isa_write : isa write transfering.
  13461. + * WE assume that the ISA is not the BUS MASTER.!!!
  13462. + */
  13463. +/* FAST BACK TO BACK '1' for BUS MASTER '0' for BUS SALVE */
  13464. +/* COMMAND :
  13465. + * bit0 : IO SPACE ENABLE
  13466. + * bit1 : MEMORY SPACE ENABLE(ignore)
  13467. + * bit2 : BUS MASTER ENABLE(ignore)
  13468. + * bit3 : SPECIAL CYCLE(ignore)? default is ignored.
  13469. + * bit4 : MEMORY WRITE and INVALIDATE(ignore)
  13470. + * bit5 : VGA PALETTE(ignore)
  13471. + * bit6 : PARITY ERROR(ignore)? : default is ignored.
  13472. + * bit7 : WAIT CYCLE CONTROL(ignore)
  13473. + * bit8 : SYSTEM ERROR(ignore)
  13474. + * bit9 : FAST BACK TO BACK(ignore)
  13475. + * bit10-bit15 : RESERVED
  13476. + * STATUS :
  13477. + * bit0-bit3 : RESERVED
  13478. + * bit4 : CAPABILITY LIST(ignore)
  13479. + * bit5 : 66MHZ CAPABLE
  13480. + * bit6 : RESERVED
  13481. + * bit7 : FAST BACK TO BACK(ignore)
  13482. + * bit8 : DATA PARITY ERROR DETECED(ignore)
  13483. + * bit9-bit10 : DEVSEL TIMING(ALL MEDIUM)
  13484. + * bit11: SIGNALED TARGET ABORT
  13485. + * bit12: RECEIVED TARGET ABORT
  13486. + * bit13: RECEIVED MASTER ABORT
  13487. + * bit14: SIGNALED SYSTEM ERROR
  13488. + * bit15: DETECTED PARITY ERROR
  13489. + */
  13490. +
  13491. +void pci_isa_write_reg(int reg, u32 value)
  13492. +{
  13493. + u32 hi = 0, lo = value;
  13494. + u32 temp;
  13495. +
  13496. + switch (reg) {
  13497. + case PCI_COMMAND:
  13498. + if (value & PCI_COMMAND_IO)
  13499. + divil_lbar_enable();
  13500. + else
  13501. + divil_lbar_disable();
  13502. + break;
  13503. + case PCI_STATUS:
  13504. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13505. + temp = lo & 0x0000ffff;
  13506. + if ((value & PCI_STATUS_SIG_TARGET_ABORT) &&
  13507. + (lo & SB_TAS_ERR_EN))
  13508. + temp |= SB_TAS_ERR_FLAG;
  13509. +
  13510. + if ((value & PCI_STATUS_REC_TARGET_ABORT) &&
  13511. + (lo & SB_TAR_ERR_EN))
  13512. + temp |= SB_TAR_ERR_FLAG;
  13513. +
  13514. + if ((value & PCI_STATUS_REC_MASTER_ABORT)
  13515. + && (lo & SB_MAR_ERR_EN))
  13516. + temp |= SB_MAR_ERR_FLAG;
  13517. +
  13518. + if ((value & PCI_STATUS_DETECTED_PARITY)
  13519. + && (lo & SB_PARE_ERR_EN))
  13520. + temp |= SB_PARE_ERR_FLAG;
  13521. +
  13522. + lo = temp;
  13523. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  13524. + break;
  13525. + case PCI_CACHE_LINE_SIZE:
  13526. + value &= 0x0000ff00;
  13527. + _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
  13528. + hi &= 0xffffff00;
  13529. + hi |= (value >> 8);
  13530. + _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo);
  13531. + break;
  13532. + case PCI_BAR0_REG:
  13533. + pci_isa_write_bar(0, value);
  13534. + break;
  13535. + case PCI_BAR1_REG:
  13536. + pci_isa_write_bar(1, value);
  13537. + break;
  13538. + case PCI_BAR2_REG:
  13539. + pci_isa_write_bar(2, value);
  13540. + break;
  13541. + case PCI_BAR3_REG:
  13542. + pci_isa_write_bar(3, value);
  13543. + break;
  13544. + case PCI_BAR4_REG:
  13545. + pci_isa_write_bar(4, value);
  13546. + break;
  13547. + case PCI_BAR5_REG:
  13548. + pci_isa_write_bar(5, value);
  13549. + break;
  13550. + case PCI_UART1_INT_REG:
  13551. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
  13552. + /* disable uart1 interrupt in PIC */
  13553. + lo &= ~(0xf << 24);
  13554. + if (value) /* enable uart1 interrupt in PIC */
  13555. + lo |= (CS5536_UART1_INTR << 24);
  13556. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
  13557. + break;
  13558. + case PCI_UART2_INT_REG:
  13559. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
  13560. + /* disable uart2 interrupt in PIC */
  13561. + lo &= ~(0xf << 28);
  13562. + if (value) /* enable uart2 interrupt in PIC */
  13563. + lo |= (CS5536_UART2_INTR << 28);
  13564. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
  13565. + break;
  13566. + case PCI_ISA_FIXUP_REG:
  13567. + if (value) {
  13568. + /* enable the TARGET ABORT/MASTER ABORT etc. */
  13569. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13570. + lo |= 0x00000063;
  13571. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  13572. + }
  13573. +
  13574. + default:
  13575. + /* ALL OTHER PCI CONFIG SPACE HEADER IS NOT IMPLEMENTED. */
  13576. + break;
  13577. + }
  13578. +
  13579. + return;
  13580. +}
  13581. +
  13582. +/*
  13583. + * isa_read : isa read transfering.
  13584. + * we assume that the ISA is not the BUS MASTER.
  13585. + */
  13586. +
  13587. + /* COMMAND :
  13588. + * bit0 : IO SPACE ENABLE
  13589. + * bit1 : MEMORY SPACE ENABLE(ignore)
  13590. + * bit2 : BUS MASTER ENABLE(ignore)
  13591. + * bit3 : SPECIAL CYCLE(ignore)? default is ignored.
  13592. + * bit4 : MEMORY WRITE and INVALIDATE(ignore)
  13593. + * bit5 : VGA PALETTE(ignore)
  13594. + * bit6 : PARITY ERROR(ignore)? : default is ignored.
  13595. + * bit7 : WAIT CYCLE CONTROL(ignore)
  13596. + * bit8 : SYSTEM ERROR(ignore)
  13597. + * bit9 : FAST BACK TO BACK(ignore)
  13598. + * bit10-bit15 : RESERVED
  13599. + * STATUS :
  13600. + * bit0-bit3 : RESERVED
  13601. + * bit4 : CAPABILITY LIST(ignore)
  13602. + * bit5 : 66MHZ CAPABLE
  13603. + * bit6 : RESERVED
  13604. + * bit7 : FAST BACK TO BACK(ignore)
  13605. + * bit8 : DATA PARITY ERROR DETECED(ignore)?
  13606. + * bit9-bit10 : DEVSEL TIMING(ALL MEDIUM)
  13607. + * bit11: SIGNALED TARGET ABORT
  13608. + * bit12: RECEIVED TARGET ABORT
  13609. + * bit13: RECEIVED MASTER ABORT
  13610. + * bit14: SIGNALED SYSTEM ERROR
  13611. + * bit15: DETECTED PARITY ERROR(?)
  13612. + */
  13613. +
  13614. +u32 pci_isa_read_reg(int reg)
  13615. +{
  13616. + u32 conf_data = 0;
  13617. + u32 hi, lo;
  13618. +
  13619. + switch (reg) {
  13620. + case PCI_VENDOR_ID:
  13621. + conf_data =
  13622. + CFG_PCI_VENDOR_ID(CS5536_ISA_DEVICE_ID, CS5536_VENDOR_ID);
  13623. + break;
  13624. + case PCI_COMMAND:
  13625. + /* we just check the first LBAR for the IO enable bit, */
  13626. + /* maybe we should changed later. */
  13627. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo);
  13628. + if (hi & 0x01)
  13629. + conf_data |= PCI_COMMAND_IO;
  13630. + break;
  13631. + case PCI_STATUS:
  13632. + conf_data |= PCI_STATUS_66MHZ;
  13633. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  13634. + conf_data |= PCI_STATUS_FAST_BACK;
  13635. +
  13636. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13637. + if (lo & SB_TAS_ERR_FLAG)
  13638. + conf_data |= PCI_STATUS_SIG_TARGET_ABORT;
  13639. + if (lo & SB_TAR_ERR_FLAG)
  13640. + conf_data |= PCI_STATUS_REC_TARGET_ABORT;
  13641. + if (lo & SB_MAR_ERR_FLAG)
  13642. + conf_data |= PCI_STATUS_REC_MASTER_ABORT;
  13643. + if (lo & SB_PARE_ERR_FLAG)
  13644. + conf_data |= PCI_STATUS_DETECTED_PARITY;
  13645. + break;
  13646. + case PCI_CLASS_REVISION:
  13647. + _rdmsr(GLCP_MSR_REG(GLCP_CHIP_REV_ID), &hi, &lo);
  13648. + conf_data = lo & 0x000000ff;
  13649. + conf_data |= (CS5536_ISA_CLASS_CODE << 8);
  13650. + break;
  13651. + case PCI_CACHE_LINE_SIZE:
  13652. + _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
  13653. + hi &= 0x000000f8;
  13654. + conf_data = CFG_PCI_CACHE_LINE_SIZE(PCI_BRIDGE_HEADER_TYPE, hi);
  13655. + break;
  13656. + /*
  13657. + * we only use the LBAR of DIVIL, no RCONF used.
  13658. + * all of them are IO space.
  13659. + */
  13660. + case PCI_BAR0_REG:
  13661. + return pci_isa_read_bar(0);
  13662. + break;
  13663. + case PCI_BAR1_REG:
  13664. + return pci_isa_read_bar(1);
  13665. + break;
  13666. + case PCI_BAR2_REG:
  13667. + return pci_isa_read_bar(2);
  13668. + break;
  13669. + case PCI_BAR3_REG:
  13670. + break;
  13671. + case PCI_BAR4_REG:
  13672. + return pci_isa_read_bar(4);
  13673. + break;
  13674. + case PCI_BAR5_REG:
  13675. + return pci_isa_read_bar(5);
  13676. + break;
  13677. + case PCI_CARDBUS_CIS:
  13678. + conf_data = PCI_CARDBUS_CIS_POINTER;
  13679. + break;
  13680. + case PCI_SUBSYSTEM_VENDOR_ID:
  13681. + conf_data =
  13682. + CFG_PCI_VENDOR_ID(CS5536_ISA_SUB_ID, CS5536_SUB_VENDOR_ID);
  13683. + break;
  13684. + case PCI_ROM_ADDRESS:
  13685. + conf_data = PCI_EXPANSION_ROM_BAR;
  13686. + break;
  13687. + case PCI_CAPABILITY_LIST:
  13688. + conf_data = PCI_CAPLIST_POINTER;
  13689. + break;
  13690. + case PCI_INTERRUPT_LINE:
  13691. + /* no interrupt used here */
  13692. + conf_data = CFG_PCI_INTERRUPT_LINE(0x00, 0x00);
  13693. + break;
  13694. + default:
  13695. + break;
  13696. + }
  13697. +
  13698. + return conf_data;
  13699. +}
  13700. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
  13701. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c 1970-01-01 01:00:00.000000000 +0100
  13702. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c 2009-08-23 19:01:04.000000000 +0200
  13703. @@ -0,0 +1,241 @@
  13704. +/*
  13705. + * CS5536 General timer functions
  13706. + *
  13707. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  13708. + * Author: Yanhua, yanh@lemote.com
  13709. + *
  13710. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  13711. + * Author: Wu zhangjin, wuzj@lemote.com
  13712. + *
  13713. + * Reference: 'AMD Geode(TM) CS5536 Companion Device Data Book'
  13714. + *
  13715. + * This program is free software; you can redistribute it and/or modify it
  13716. + * under the terms of the GNU General Public License as published by the
  13717. + * Free Software Foundation; either version 2 of the License, or (at your
  13718. + * option) any later version.
  13719. + */
  13720. +
  13721. +#include <linux/io.h>
  13722. +#include <linux/init.h>
  13723. +#include <linux/module.h>
  13724. +#include <linux/jiffies.h>
  13725. +#include <linux/spinlock.h>
  13726. +#include <linux/interrupt.h>
  13727. +#include <linux/clockchips.h>
  13728. +
  13729. +#include <asm/time.h>
  13730. +
  13731. +#include <cs5536/cs5536_mfgpt.h>
  13732. +
  13733. +DEFINE_SPINLOCK(mfgpt_lock);
  13734. +EXPORT_SYMBOL(mfgpt_lock);
  13735. +
  13736. +u32 mfgpt_base;
  13737. +
  13738. +/*
  13739. + * Initialize the MFGPT timer.
  13740. + *
  13741. + * This is also called after resume to bring the MFGPT into operation again.
  13742. + */
  13743. +/* setup register bit fields:
  13744. + * 15: counter enable
  13745. + * 14: compare2 output status, write 1 to clear when in event mode
  13746. + * 13: compare1 output status
  13747. + * 12: setup(ro)
  13748. + * 11: stop enable, stop on sleep
  13749. + * 10: external enable
  13750. + * 9:8 compare2 mode; 00: disable, 01: compare on equal; 10: compare on GE,
  13751. + * 11 event: GE + irq
  13752. + * 7:6 compare1 mode
  13753. + * 5: reverse enable, bit reverse of the counter
  13754. + * 4: clock select. 0: 32KHz, 1: 14.318MHz
  13755. + * 3:0 counter prescaler scale factor.
  13756. + * select the input clock divide-by value. 2^n
  13757. + * bit 11:0 is write once
  13758. + */
  13759. +
  13760. +static void init_mfgpt_timer(enum clock_event_mode mode,
  13761. + struct clock_event_device *evt)
  13762. +{
  13763. + spin_lock(&mfgpt_lock);
  13764. +
  13765. + switch (mode) {
  13766. + case CLOCK_EVT_MODE_PERIODIC:
  13767. + outw(COMPARE, MFGPT0_CMP2); /* set comparator2 */
  13768. + outw(0, MFGPT0_CNT); /* set counter to 0 */
  13769. + /* enable counter, comparator2 to event mode, 14.318MHz clock */
  13770. + outw(0xe310, MFGPT0_SETUP);
  13771. + break;
  13772. +
  13773. + case CLOCK_EVT_MODE_SHUTDOWN:
  13774. + case CLOCK_EVT_MODE_UNUSED:
  13775. + if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
  13776. + evt->mode == CLOCK_EVT_MODE_ONESHOT) {
  13777. + /* disable counter */
  13778. + outw(inw(MFGPT0_SETUP) & 0x7fff, MFGPT0_SETUP);
  13779. + }
  13780. + break;
  13781. +
  13782. + case CLOCK_EVT_MODE_ONESHOT:
  13783. + /* One shot setup */
  13784. + outw(0xe300, MFGPT0_SETUP);
  13785. + break;
  13786. +
  13787. + case CLOCK_EVT_MODE_RESUME:
  13788. + /* Nothing to do here */
  13789. + break;
  13790. + }
  13791. + spin_unlock(&mfgpt_lock);
  13792. +}
  13793. +
  13794. +/*
  13795. + * Program the next event in oneshot mode
  13796. + *
  13797. + * Delta is given in MFGPT ticks
  13798. + */
  13799. +static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
  13800. +{
  13801. + spin_lock(&mfgpt_lock);
  13802. + outw(delta & 0xffff, MFGPT0_CMP2); /* set comparator2 */
  13803. + outw(0, MFGPT0_CNT); /* set counter to 0 */
  13804. + spin_unlock(&mfgpt_lock);
  13805. +
  13806. + return 0;
  13807. +}
  13808. +
  13809. +static struct clock_event_device mfgpt_clockevent = {
  13810. + .name = "mfgpt",
  13811. + .features = CLOCK_EVT_FEAT_PERIODIC,
  13812. + .set_mode = init_mfgpt_timer,
  13813. + .set_next_event = mfgpt_next_event,
  13814. + .irq = CS5536_MFGPT_INTR,
  13815. +};
  13816. +
  13817. +static irqreturn_t timer_interrupt(int irq, void *dev_id)
  13818. +{
  13819. + u32 basehi;
  13820. +
  13821. + /*
  13822. + * get MFGPT base address
  13823. + *
  13824. + * NOTE: do not remove me, it's need for the value of mfgpt_base is
  13825. + * variable
  13826. + */
  13827. + _rdmsr(CS5536_DIVIL_MSR_BASE + DIVIL_LBAR_MFGPT, &basehi, &mfgpt_base);
  13828. +
  13829. + /* ack */
  13830. + outw(inw(MFGPT0_SETUP) | 0x4000, MFGPT0_SETUP);
  13831. +
  13832. + mfgpt_clockevent.event_handler(&mfgpt_clockevent);
  13833. +
  13834. + return IRQ_HANDLED;
  13835. +}
  13836. +
  13837. +static struct irqaction irq5 = {
  13838. + .handler = timer_interrupt,
  13839. + .flags = IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
  13840. + .name = "timer"
  13841. +};
  13842. +
  13843. +/*
  13844. + * Initialize the conversion factor and the min/max deltas of the clock event
  13845. + * structure and register the clock event source with the framework.
  13846. + */
  13847. +void __init setup_mfgpt_timer(void)
  13848. +{
  13849. + u32 basehi;
  13850. + struct clock_event_device *cd = &mfgpt_clockevent;
  13851. + unsigned int cpu = smp_processor_id();
  13852. +
  13853. + cd->cpumask = cpumask_of(cpu);
  13854. + clockevent_set_clock(cd, MFGPT_TICK_RATE);
  13855. + cd->max_delta_ns = clockevent_delta2ns(0xffff, cd);
  13856. + cd->min_delta_ns = clockevent_delta2ns(0xf, cd);
  13857. +
  13858. + /* Enable MFGPT0 Comparator 2 Output to the Interrupt Mapper */
  13859. + _wrmsr(CS5536_DIVIL_MSR_BASE + MFGPT_IRQ, 0, 0x100);
  13860. +
  13861. + /* Enable Interrupt Gate 5 */
  13862. + _wrmsr(CS5536_DIVIL_MSR_BASE + PIC_ZSEL_LOW, 0, 0x50000);
  13863. +
  13864. + /* get MFGPT base address */
  13865. + _rdmsr(CS5536_DIVIL_MSR_BASE + DIVIL_LBAR_MFGPT, &basehi, &mfgpt_base);
  13866. +
  13867. + irq5.mask = cpumask_of_cpu(cpu);
  13868. +
  13869. + clockevents_register_device(cd);
  13870. +
  13871. + setup_irq(CS5536_MFGPT_INTR, &irq5);
  13872. +}
  13873. +
  13874. +/*
  13875. + * Since the MFGPT overflows every tick, its not very useful
  13876. + * to just read by itself. So use jiffies to emulate a free
  13877. + * running counter:
  13878. + */
  13879. +static cycle_t mfgpt_read(struct clocksource *cs)
  13880. +{
  13881. + unsigned long flags;
  13882. + int count;
  13883. + u32 jifs;
  13884. + static int old_count;
  13885. + static u32 old_jifs;
  13886. +
  13887. + spin_lock_irqsave(&mfgpt_lock, flags);
  13888. + /*
  13889. + * Although our caller may have the read side of xtime_lock,
  13890. + * this is now a seqlock, and we are cheating in this routine
  13891. + * by having side effects on state that we cannot undo if
  13892. + * there is a collision on the seqlock and our caller has to
  13893. + * retry. (Namely, old_jifs and old_count.) So we must treat
  13894. + * jiffies as volatile despite the lock. We read jiffies
  13895. + * before latching the timer count to guarantee that although
  13896. + * the jiffies value might be older than the count (that is,
  13897. + * the counter may underflow between the last point where
  13898. + * jiffies was incremented and the point where we latch the
  13899. + * count), it cannot be newer.
  13900. + */
  13901. + jifs = jiffies;
  13902. + /* read the count */
  13903. + count = inw(MFGPT0_CNT);
  13904. +
  13905. + /*
  13906. + * It's possible for count to appear to go the wrong way for this
  13907. + * reason:
  13908. + *
  13909. + * The timer counter underflows, but we haven't handled the resulting
  13910. + * interrupt and incremented jiffies yet.
  13911. + *
  13912. + * Previous attempts to handle these cases intelligently were buggy, so
  13913. + * we just do the simple thing now.
  13914. + */
  13915. + if (count < old_count && jifs == old_jifs)
  13916. + count = old_count;
  13917. +
  13918. + old_count = count;
  13919. + old_jifs = jifs;
  13920. +
  13921. + spin_unlock_irqrestore(&mfgpt_lock, flags);
  13922. +
  13923. + return (cycle_t) (jifs * COMPARE) + count;
  13924. +}
  13925. +
  13926. +static struct clocksource clocksource_mfgpt = {
  13927. + .name = "mfgpt",
  13928. + .rating = 120, /* Functional for real use, but not desired */
  13929. + .read = mfgpt_read,
  13930. + .mask = CLOCKSOURCE_MASK(32),
  13931. + .mult = 0,
  13932. + .shift = 22,
  13933. +};
  13934. +
  13935. +int __init init_mfgpt_clocksource(void)
  13936. +{
  13937. + if (num_possible_cpus() > 1) /* MFGPT does not scale! */
  13938. + return 0;
  13939. +
  13940. + clocksource_mfgpt.mult = clocksource_hz2mult(MFGPT_TICK_RATE, 22);
  13941. + return clocksource_register(&clocksource_mfgpt);
  13942. +}
  13943. +
  13944. +arch_initcall(init_mfgpt_clocksource);
  13945. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ohci.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ohci.c
  13946. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_ohci.c 1970-01-01 01:00:00.000000000 +0100
  13947. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_ohci.c 2009-08-23 19:01:04.000000000 +0200
  13948. @@ -0,0 +1,168 @@
  13949. +/*
  13950. + * the OHCI Virtual Support Module of AMD CS5536
  13951. + *
  13952. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  13953. + * Author : jlliu, liujl@lemote.com
  13954. + *
  13955. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  13956. + * Author: Wu Zhangjin, wuzj@lemote.com
  13957. + *
  13958. + * This program is free software; you can redistribute it and/or modify it
  13959. + * under the terms of the GNU General Public License as published by the
  13960. + * Free Software Foundation; either version 2 of the License, or (at your
  13961. + * option) any later version.
  13962. + */
  13963. +
  13964. +#include <cs5536/cs5536.h>
  13965. +#include <cs5536/cs5536_pci.h>
  13966. +
  13967. +/*
  13968. + * ohci_write : ohci write transfering.
  13969. + */
  13970. +void pci_ohci_write_reg(int reg, u32 value)
  13971. +{
  13972. + u32 hi = 0, lo = value;
  13973. +
  13974. + switch (reg) {
  13975. + case PCI_COMMAND:
  13976. + _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
  13977. + if (value & PCI_COMMAND_MASTER)
  13978. + hi |= PCI_COMMAND_MASTER;
  13979. + else
  13980. + hi &= ~PCI_COMMAND_MASTER;
  13981. +
  13982. + if (value & PCI_COMMAND_MEMORY)
  13983. + hi |= PCI_COMMAND_MEMORY;
  13984. + else
  13985. + hi &= ~PCI_COMMAND_MEMORY;
  13986. + _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
  13987. + break;
  13988. + case PCI_STATUS:
  13989. + if (value & PCI_STATUS_PARITY) {
  13990. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  13991. + if (lo & SB_PARE_ERR_FLAG) {
  13992. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  13993. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  13994. + }
  13995. + }
  13996. + break;
  13997. + case PCI_BAR0_REG:
  13998. + if (value == PCI_BAR_RANGE_MASK) {
  13999. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14000. + lo |= SOFT_BAR_OHCI_FLAG;
  14001. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14002. + } else if ((value & 0x01) == 0x00) {
  14003. + _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
  14004. +
  14005. + value &= 0xfffffff0;
  14006. + hi = 0x40000000 | ((value & 0xff000000) >> 24);
  14007. + lo = 0x000fffff | ((value & 0x00fff000) << 8);
  14008. + _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo);
  14009. + }
  14010. + break;
  14011. + case PCI_INTERRUPT_LINE:
  14012. + value &= 0x000000ff;
  14013. + break;
  14014. + case PCI_OHCI_PM_REG:
  14015. + break;
  14016. + case PCI_OHCI_INT_REG:
  14017. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
  14018. + lo &= ~(0xf << PIC_YSEL_LOW_USB_SHIFT);
  14019. + if (value) /* enable all the usb interrupt in PIC */
  14020. + lo |= (CS5536_USB_INTR << PIC_YSEL_LOW_USB_SHIFT);
  14021. + _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
  14022. + break;
  14023. + default:
  14024. + break;
  14025. + }
  14026. +
  14027. + return;
  14028. +}
  14029. +
  14030. +/*
  14031. + * ohci_read : ohci read transfering.
  14032. + */
  14033. +u32 pci_ohci_read_reg(int reg)
  14034. +{
  14035. + u32 conf_data = 0;
  14036. + u32 hi, lo;
  14037. +
  14038. + switch (reg) {
  14039. + case PCI_VENDOR_ID:
  14040. + conf_data =
  14041. + CFG_PCI_VENDOR_ID(CS5536_OHCI_DEVICE_ID, CS5536_VENDOR_ID);
  14042. + break;
  14043. + case PCI_COMMAND:
  14044. + _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
  14045. + if (hi & PCI_COMMAND_MASTER)
  14046. + conf_data |= PCI_COMMAND_MASTER;
  14047. + if (hi & PCI_COMMAND_MEMORY)
  14048. + conf_data |= PCI_COMMAND_MEMORY;
  14049. + break;
  14050. + case PCI_STATUS:
  14051. + conf_data |= PCI_STATUS_66MHZ;
  14052. + conf_data |= PCI_STATUS_FAST_BACK;
  14053. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  14054. + if (lo & SB_PARE_ERR_FLAG)
  14055. + conf_data |= PCI_STATUS_PARITY;
  14056. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  14057. + break;
  14058. + case PCI_CLASS_REVISION:
  14059. + _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
  14060. + conf_data = lo & 0x000000ff;
  14061. + conf_data |= (CS5536_OHCI_CLASS_CODE << 8);
  14062. + break;
  14063. + case PCI_CACHE_LINE_SIZE:
  14064. + conf_data =
  14065. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  14066. + PCI_NORMAL_LATENCY_TIMER);
  14067. + break;
  14068. + case PCI_BAR0_REG:
  14069. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14070. + if (lo & SOFT_BAR_OHCI_FLAG) {
  14071. + conf_data = CS5536_OHCI_RANGE |
  14072. + PCI_BASE_ADDRESS_SPACE_MEMORY;
  14073. + lo &= ~SOFT_BAR_OHCI_FLAG;
  14074. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14075. + } else {
  14076. + _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
  14077. + conf_data = lo & 0xffffff00;
  14078. + conf_data &= ~0x0000000f; /* 32bit mem */
  14079. + }
  14080. + break;
  14081. + case PCI_BAR1_REG:
  14082. + case PCI_BAR2_REG:
  14083. + case PCI_BAR3_REG:
  14084. + case PCI_BAR4_REG:
  14085. + case PCI_BAR5_REG:
  14086. + break;
  14087. + case PCI_CARDBUS_CIS:
  14088. + conf_data = PCI_CARDBUS_CIS_POINTER;
  14089. + break;
  14090. + case PCI_SUBSYSTEM_VENDOR_ID:
  14091. + conf_data =
  14092. + CFG_PCI_VENDOR_ID(CS5536_OHCI_SUB_ID, CS5536_SUB_VENDOR_ID);
  14093. + break;
  14094. + case PCI_ROM_ADDRESS:
  14095. + conf_data = PCI_EXPANSION_ROM_BAR;
  14096. + break;
  14097. + case PCI_CAPABILITY_LIST:
  14098. + conf_data = PCI_CAPLIST_USB_POINTER;
  14099. + break;
  14100. + case PCI_INTERRUPT_LINE:
  14101. + conf_data =
  14102. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR);
  14103. + break;
  14104. + case PCI_OHCI_PM_REG:
  14105. + break;
  14106. + case PCI_OHCI_INT_REG:
  14107. + _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
  14108. + if ((lo & 0x00000f00) == CS5536_USB_INTR)
  14109. + conf_data = 1;
  14110. + break;
  14111. + default:
  14112. + break;
  14113. + }
  14114. +
  14115. + return conf_data;
  14116. +}
  14117. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_otg.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_otg.c
  14118. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_otg.c 1970-01-01 01:00:00.000000000 +0100
  14119. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_otg.c 2009-08-23 19:01:04.000000000 +0200
  14120. @@ -0,0 +1,138 @@
  14121. +/*
  14122. + * the OTG Virtual Support Module of AMD CS5536
  14123. + *
  14124. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  14125. + * Author : jlliu, liujl@lemote.com
  14126. + *
  14127. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  14128. + * Author: Wu Zhangjin, wuzj@lemote.com
  14129. + *
  14130. + * This program is free software; you can redistribute it and/or modify it
  14131. + * under the terms of the GNU General Public License as published by the
  14132. + * Free Software Foundation; either version 2 of the License, or (at your
  14133. + * option) any later version.
  14134. + */
  14135. +
  14136. +#include <cs5536/cs5536.h>
  14137. +#include <cs5536/cs5536_pci.h>
  14138. +
  14139. +void pci_otg_write_reg(int reg, u32 value)
  14140. +{
  14141. + u32 hi = 0, lo = value;
  14142. +
  14143. + switch (reg) {
  14144. + case PCI_COMMAND:
  14145. + _rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
  14146. + if (value & PCI_COMMAND_MEMORY)
  14147. + hi |= PCI_COMMAND_MEMORY;
  14148. + else
  14149. + hi &= ~PCI_COMMAND_MEMORY;
  14150. + _wrmsr(USB_MSR_REG(USB_OTG), hi, lo);
  14151. + break;
  14152. + case PCI_STATUS:
  14153. + if (value & PCI_STATUS_PARITY) {
  14154. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  14155. + if (lo & SB_PARE_ERR_FLAG) {
  14156. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  14157. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  14158. + }
  14159. + }
  14160. + break;
  14161. + case PCI_BAR0_REG:
  14162. + if (value == PCI_BAR_RANGE_MASK) {
  14163. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14164. + lo |= SOFT_BAR_OTG_FLAG;
  14165. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14166. + } else if ((value & 0x01) == 0x00) {
  14167. + _rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
  14168. + lo &= 0xffffff00;
  14169. + _wrmsr(USB_MSR_REG(USB_OTG), hi, lo);
  14170. +
  14171. + value &= 0xfffffff0;
  14172. + hi = 0x40000000 | ((value & 0xff000000) >> 24);
  14173. + lo = 0x000fffff | ((value & 0x00fff000) << 8);
  14174. + _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM1), hi, lo);
  14175. + }
  14176. + break;
  14177. + default:
  14178. + break;
  14179. + }
  14180. +
  14181. + return;
  14182. +}
  14183. +
  14184. +u32 pci_otg_read_reg(int reg)
  14185. +{
  14186. + u32 conf_data = 0;
  14187. + u32 hi, lo;
  14188. +
  14189. + switch (reg) {
  14190. + case PCI_VENDOR_ID:
  14191. + conf_data =
  14192. + CFG_PCI_VENDOR_ID(CS5536_OTG_DEVICE_ID, CS5536_VENDOR_ID);
  14193. + break;
  14194. + case PCI_COMMAND:
  14195. + _rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
  14196. + if (hi & PCI_COMMAND_MEMORY)
  14197. + conf_data |= PCI_COMMAND_MEMORY;
  14198. + break;
  14199. + case PCI_STATUS:
  14200. + conf_data |= PCI_STATUS_66MHZ;
  14201. + conf_data |= PCI_STATUS_FAST_BACK;
  14202. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  14203. + if (lo & SB_PARE_ERR_FLAG)
  14204. + conf_data |= PCI_STATUS_PARITY;
  14205. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  14206. + break;
  14207. + case PCI_CLASS_REVISION:
  14208. + _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
  14209. + conf_data = lo & 0x000000ff;
  14210. + conf_data |= (CS5536_OTG_CLASS_CODE << 8);
  14211. + break;
  14212. + case PCI_CACHE_LINE_SIZE:
  14213. + conf_data =
  14214. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  14215. + PCI_NORMAL_LATENCY_TIMER);
  14216. + break;
  14217. + case PCI_BAR0_REG:
  14218. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14219. + if (lo & SOFT_BAR_OTG_FLAG) {
  14220. + conf_data = CS5536_OTG_RANGE |
  14221. + PCI_BASE_ADDRESS_SPACE_MEMORY;
  14222. + lo &= ~SOFT_BAR_OTG_FLAG;
  14223. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14224. + } else {
  14225. + _rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
  14226. + conf_data = lo & 0xffffff00;
  14227. + conf_data &= ~0x0000000f;
  14228. + }
  14229. + break;
  14230. + case PCI_BAR1_REG:
  14231. + case PCI_BAR2_REG:
  14232. + case PCI_BAR3_REG:
  14233. + case PCI_BAR4_REG:
  14234. + case PCI_BAR5_REG:
  14235. + break;
  14236. + case PCI_CARDBUS_CIS:
  14237. + conf_data = PCI_CARDBUS_CIS_POINTER;
  14238. + break;
  14239. + case PCI_SUBSYSTEM_VENDOR_ID:
  14240. + conf_data =
  14241. + CFG_PCI_VENDOR_ID(CS5536_OTG_SUB_ID, CS5536_SUB_VENDOR_ID);
  14242. + break;
  14243. + case PCI_ROM_ADDRESS:
  14244. + conf_data = PCI_EXPANSION_ROM_BAR;
  14245. + break;
  14246. + case PCI_CAPABILITY_LIST:
  14247. + conf_data = PCI_CAPLIST_USB_POINTER;
  14248. + break;
  14249. + case PCI_INTERRUPT_LINE:
  14250. + conf_data =
  14251. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR);
  14252. + break;
  14253. + default:
  14254. + break;
  14255. + }
  14256. +
  14257. + return conf_data;
  14258. +}
  14259. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_pci.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_pci.c
  14260. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_pci.c 1970-01-01 01:00:00.000000000 +0100
  14261. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_pci.c 2009-08-23 19:01:04.000000000 +0200
  14262. @@ -0,0 +1,126 @@
  14263. +/*
  14264. + * read/write operation to the PCI config space of CS5536
  14265. + *
  14266. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  14267. + * Author : jlliu, liujl@lemote.com
  14268. + *
  14269. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  14270. + * Author: Wu Zhangjin, wuzj@lemote.com
  14271. + *
  14272. + * This program is free software; you can redistribute it and/or modify it
  14273. + * under the terms of the GNU General Public License as published by the
  14274. + * Free Software Foundation; either version 2 of the License, or (at your
  14275. + * option) any later version.
  14276. + *
  14277. + * the Virtual Support Module(VSM) for virtulizing the PCI
  14278. + * configure space are defined in cs5536_modulename.c respectively,
  14279. + * so you can select modules which have been used in his/her board.
  14280. + * to archive this, you just need to add a "select CS5536_[MODULE]"
  14281. + * option in your board in arch/mips/loongson/Kconfig
  14282. + *
  14283. + * after this virtulizing, user can access the PCI configure space
  14284. + * directly as a normal multi-function PCI device which following
  14285. + * the PCI-2.2 spec.
  14286. + */
  14287. +
  14288. +#include <linux/types.h>
  14289. +#include <cs5536/cs5536_vsm.h>
  14290. +
  14291. +enum {
  14292. + CS5536_FUNC_START = -1,
  14293. + CS5536_ISA_FUNC,
  14294. + CS5536_FLASH_FUNC,
  14295. + CS5536_IDE_FUNC,
  14296. + CS5536_ACC_FUNC,
  14297. + CS5536_OHCI_FUNC,
  14298. + CS5536_EHCI_FUNC,
  14299. + CS5536_UDC_FUNC,
  14300. + CS5536_OTG_FUNC,
  14301. + CS5536_FUNC_END,
  14302. +};
  14303. +
  14304. +/*
  14305. + * write to PCI config space and transfer it to MSR write.
  14306. + */
  14307. +void cs5536_pci_conf_write4(int function, int reg, u32 value)
  14308. +{
  14309. + if ((function <= CS5536_FUNC_START) || (function >= CS5536_FUNC_END))
  14310. + return;
  14311. + if ((reg < 0) || (reg > 0x100) || ((reg & 0x03) != 0))
  14312. + return;
  14313. +
  14314. + switch (function) {
  14315. + case CS5536_ISA_FUNC:
  14316. + pci_isa_write_reg(reg, value);
  14317. + break;
  14318. + case CS5536_FLASH_FUNC:
  14319. + pci_flash_write_reg(reg, value);
  14320. + break;
  14321. + case CS5536_IDE_FUNC:
  14322. + pci_ide_write_reg(reg, value);
  14323. + break;
  14324. + case CS5536_ACC_FUNC:
  14325. + pci_acc_write_reg(reg, value);
  14326. + break;
  14327. + case CS5536_OHCI_FUNC:
  14328. + pci_ohci_write_reg(reg, value);
  14329. + break;
  14330. + case CS5536_EHCI_FUNC:
  14331. + pci_ehci_write_reg(reg, value);
  14332. + break;
  14333. + case CS5536_UDC_FUNC:
  14334. + pci_udc_write_reg(reg, value);
  14335. + break;
  14336. + case CS5536_OTG_FUNC:
  14337. + pci_otg_write_reg(reg, value);
  14338. + break;
  14339. + default:
  14340. + break;
  14341. + }
  14342. + return;
  14343. +}
  14344. +
  14345. +/*
  14346. + * read PCI config space and transfer it to MSR access.
  14347. + */
  14348. +u32 cs5536_pci_conf_read4(int function, int reg)
  14349. +{
  14350. + u32 data = 0;
  14351. +
  14352. + if ((function <= CS5536_FUNC_START) || (function >= CS5536_FUNC_END))
  14353. + return 0;
  14354. + if ((reg < 0) || ((reg & 0x03) != 0))
  14355. + return 0;
  14356. + if (reg > 0x100)
  14357. + return 0xffffffff;
  14358. +
  14359. + switch (function) {
  14360. + case CS5536_ISA_FUNC:
  14361. + data = pci_isa_read_reg(reg);
  14362. + break;
  14363. + case CS5536_FLASH_FUNC:
  14364. + data = pci_flash_read_reg(reg);
  14365. + break;
  14366. + case CS5536_IDE_FUNC:
  14367. + data = pci_ide_read_reg(reg);
  14368. + break;
  14369. + case CS5536_ACC_FUNC:
  14370. + data = pci_acc_read_reg(reg);
  14371. + break;
  14372. + case CS5536_OHCI_FUNC:
  14373. + data = pci_ohci_read_reg(reg);
  14374. + break;
  14375. + case CS5536_EHCI_FUNC:
  14376. + data = pci_ehci_read_reg(reg);
  14377. + break;
  14378. + case CS5536_UDC_FUNC:
  14379. + data = pci_udc_read_reg(reg);
  14380. + break;
  14381. + case CS5536_OTG_FUNC:
  14382. + data = pci_otg_read_reg(reg);
  14383. + break;
  14384. + default:
  14385. + break;
  14386. + }
  14387. + return data;
  14388. +}
  14389. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_udc.c linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_udc.c
  14390. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/cs5536_udc.c 1970-01-01 01:00:00.000000000 +0100
  14391. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/cs5536_udc.c 2009-08-23 19:01:04.000000000 +0200
  14392. @@ -0,0 +1,143 @@
  14393. +/*
  14394. + * the UDC Virtual Support Module of AMD CS5536
  14395. + *
  14396. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  14397. + * Author : jlliu, liujl@lemote.com
  14398. + *
  14399. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  14400. + * Author: Wu Zhangjin, wuzj@lemote.com
  14401. + *
  14402. + * This program is free software; you can redistribute it and/or modify it
  14403. + * under the terms of the GNU General Public License as published by the
  14404. + * Free Software Foundation; either version 2 of the License, or (at your
  14405. + * option) any later version.
  14406. + */
  14407. +
  14408. +#include <cs5536/cs5536.h>
  14409. +#include <cs5536/cs5536_pci.h>
  14410. +
  14411. +void pci_udc_write_reg(int reg, u32 value)
  14412. +{
  14413. + u32 hi = 0, lo = value;
  14414. +
  14415. + switch (reg) {
  14416. + case PCI_COMMAND:
  14417. + _rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
  14418. + if (value & PCI_COMMAND_MASTER)
  14419. + hi |= PCI_COMMAND_MASTER;
  14420. + else
  14421. + hi &= ~PCI_COMMAND_MASTER;
  14422. +
  14423. + if (value & PCI_COMMAND_MEMORY)
  14424. + hi |= PCI_COMMAND_MEMORY;
  14425. + else
  14426. + hi &= ~PCI_COMMAND_MEMORY;
  14427. + _wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
  14428. + break;
  14429. + case PCI_STATUS:
  14430. + if (value & PCI_STATUS_PARITY) {
  14431. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  14432. + if (lo & SB_PARE_ERR_FLAG) {
  14433. + lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
  14434. + _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
  14435. + }
  14436. + }
  14437. + break;
  14438. + case PCI_BAR0_REG:
  14439. + if (value == PCI_BAR_RANGE_MASK) {
  14440. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14441. + lo |= SOFT_BAR_UDC_FLAG;
  14442. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14443. + } else if ((value & 0x01) == 0x00) {
  14444. + _wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
  14445. +
  14446. + value &= 0xfffffff0;
  14447. + hi = 0x40000000 | ((value & 0xff000000) >> 24);
  14448. + lo = 0x000fffff | ((value & 0x00fff000) << 8);
  14449. + _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM0), hi, lo);
  14450. + }
  14451. + break;
  14452. + default:
  14453. + break;
  14454. + }
  14455. +
  14456. + return;
  14457. +}
  14458. +
  14459. +u32 pci_udc_read_reg(int reg)
  14460. +{
  14461. + u32 conf_data = 0;
  14462. + u32 hi, lo;
  14463. +
  14464. + switch (reg) {
  14465. + case PCI_VENDOR_ID:
  14466. + conf_data =
  14467. + CFG_PCI_VENDOR_ID(CS5536_UDC_DEVICE_ID, CS5536_VENDOR_ID);
  14468. + break;
  14469. + case PCI_COMMAND:
  14470. + _rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
  14471. + if (hi & PCI_COMMAND_MASTER)
  14472. + conf_data |= PCI_COMMAND_MASTER;
  14473. + if (hi & PCI_COMMAND_MEMORY)
  14474. + conf_data |= PCI_COMMAND_MEMORY;
  14475. + break;
  14476. + case PCI_STATUS:
  14477. + conf_data |= PCI_STATUS_66MHZ;
  14478. + conf_data |= PCI_STATUS_FAST_BACK;
  14479. + _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
  14480. + if (lo & SB_PARE_ERR_FLAG)
  14481. + conf_data |= PCI_STATUS_PARITY;
  14482. + conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
  14483. + break;
  14484. + case PCI_CLASS_REVISION:
  14485. + _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
  14486. + conf_data = lo & 0x000000ff;
  14487. + conf_data |= (CS5536_UDC_CLASS_CODE << 8);
  14488. + break;
  14489. + case PCI_CACHE_LINE_SIZE:
  14490. + conf_data =
  14491. + CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE,
  14492. + PCI_NORMAL_LATENCY_TIMER);
  14493. + break;
  14494. + case PCI_BAR0_REG:
  14495. + _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
  14496. + if (lo & SOFT_BAR_UDC_FLAG) {
  14497. + conf_data = CS5536_UDC_RANGE |
  14498. + PCI_BASE_ADDRESS_SPACE_MEMORY;
  14499. + lo &= ~SOFT_BAR_UDC_FLAG;
  14500. + _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
  14501. + } else {
  14502. + _rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
  14503. + conf_data = lo & 0xfffff000;
  14504. + conf_data &= ~0x0000000f; /* 32bit mem */
  14505. + }
  14506. + break;
  14507. + case PCI_BAR1_REG:
  14508. + case PCI_BAR2_REG:
  14509. + case PCI_BAR3_REG:
  14510. + case PCI_BAR4_REG:
  14511. + case PCI_BAR5_REG:
  14512. + break;
  14513. + case PCI_CARDBUS_CIS:
  14514. + conf_data = PCI_CARDBUS_CIS_POINTER;
  14515. + break;
  14516. + case PCI_SUBSYSTEM_VENDOR_ID:
  14517. + conf_data =
  14518. + CFG_PCI_VENDOR_ID(CS5536_UDC_SUB_ID, CS5536_SUB_VENDOR_ID);
  14519. + break;
  14520. + case PCI_ROM_ADDRESS:
  14521. + conf_data = PCI_EXPANSION_ROM_BAR;
  14522. + break;
  14523. + case PCI_CAPABILITY_LIST:
  14524. + conf_data = PCI_CAPLIST_USB_POINTER;
  14525. + break;
  14526. + case PCI_INTERRUPT_LINE:
  14527. + conf_data =
  14528. + CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR);
  14529. + break;
  14530. + default:
  14531. + break;
  14532. + }
  14533. +
  14534. + return conf_data;
  14535. +}
  14536. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/Makefile linux-2.6.30.5/arch/mips/loongson/common/cs5536/Makefile
  14537. --- linux-2.6.30.5.orig/arch/mips/loongson/common/cs5536/Makefile 1970-01-01 01:00:00.000000000 +0100
  14538. +++ linux-2.6.30.5/arch/mips/loongson/common/cs5536/Makefile 2009-08-23 19:01:04.000000000 +0200
  14539. @@ -0,0 +1,25 @@
  14540. +#
  14541. +# Makefile for CS5536 support.
  14542. +#
  14543. +
  14544. +#
  14545. +# core modules
  14546. +#
  14547. +obj-$(CONFIG_CS5536) += cs5536_pci.o cs5536_ide.o cs5536_acc.o cs5536_ohci.o \
  14548. + cs5536_isa.o cs5536_ehci.o
  14549. +#
  14550. +# selective modules
  14551. +#
  14552. +# add a CS5536_[MODULE] to your board in arch/mips/loongson/Kconfig
  14553. +#
  14554. +obj-$(CONFIG_CS5536_FLASH) += cs5536_flash.o
  14555. +obj-$(CONFIG_CS5536_NOR_FLASH) += cs5536_flash.o
  14556. +obj-$(CONFIG_CS5536_OTG) += cs5536_otg.o
  14557. +obj-$(CONFIG_CS5536_UDC) += cs5536_udc.o
  14558. +
  14559. +#
  14560. +# Enable cs5536 mfgpt Timer
  14561. +#
  14562. +obj-$(CONFIG_CS5536_MFGPT) += cs5536_mfgpt.o
  14563. +
  14564. +EXTRA_CFLAGS += -Werror
  14565. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/dbg.c linux-2.6.30.5/arch/mips/loongson/common/dbg.c
  14566. --- linux-2.6.30.5.orig/arch/mips/loongson/common/dbg.c 1970-01-01 01:00:00.000000000 +0100
  14567. +++ linux-2.6.30.5/arch/mips/loongson/common/dbg.c 2009-08-23 19:01:04.000000000 +0200
  14568. @@ -0,0 +1,34 @@
  14569. +/*
  14570. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  14571. + *
  14572. + * This program is free software; you can redistribute it and/or modify it
  14573. + * under the terms of the GNU General Public License as published by the
  14574. + * Free Software Foundation; either version 2 of the License, or (at your
  14575. + * option) any later version.
  14576. + */
  14577. +
  14578. +#include <dbg.h>
  14579. +#include <loongson.h>
  14580. +
  14581. +#define PROM_PRINTF_BUF_LEN 1024
  14582. +
  14583. +void prom_printf(char *fmt, ...)
  14584. +{
  14585. + static char buf[PROM_PRINTF_BUF_LEN];
  14586. + va_list args;
  14587. + char *ptr;
  14588. +
  14589. +
  14590. + va_start(args, fmt);
  14591. + vscnprintf(buf, sizeof(buf), fmt, args);
  14592. +
  14593. + ptr = buf;
  14594. +
  14595. + while (*ptr != 0) {
  14596. + if (*ptr == '\n')
  14597. + prom_putchar('\r');
  14598. +
  14599. + prom_putchar(*ptr++);
  14600. + }
  14601. + va_end(args);
  14602. +}
  14603. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/early_printk.c linux-2.6.30.5/arch/mips/loongson/common/early_printk.c
  14604. --- linux-2.6.30.5.orig/arch/mips/loongson/common/early_printk.c 1970-01-01 01:00:00.000000000 +0100
  14605. +++ linux-2.6.30.5/arch/mips/loongson/common/early_printk.c 2009-08-23 19:01:04.000000000 +0200
  14606. @@ -0,0 +1,28 @@
  14607. +/* early printk support
  14608. + *
  14609. + * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
  14610. + *
  14611. + * This program is free software; you can redistribute it and/or modify it
  14612. + * under the terms of the GNU General Public License as published by the
  14613. + * Free Software Foundation; either version 2 of the License, or (at your
  14614. + * option) any later version.
  14615. + */
  14616. +
  14617. +#include <linux/types.h>
  14618. +#include <linux/serial_reg.h>
  14619. +
  14620. +#include <loongson.h>
  14621. +#include <machine.h>
  14622. +
  14623. +void prom_putchar(char c)
  14624. +{
  14625. + int timeout;
  14626. + phys_addr_t uart_base =
  14627. + (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8);
  14628. + char reg = readb((u8 *) (uart_base + UART_LSR)) & UART_LSR_THRE;
  14629. +
  14630. + for (timeout = 1024; reg == 0 && timeout > 0; timeout--)
  14631. + reg = readb((u8 *) (uart_base + UART_LSR)) & UART_LSR_THRE;
  14632. +
  14633. + writeb(c, (u8 *) (uart_base + UART_TX));
  14634. +}
  14635. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/env.c linux-2.6.30.5/arch/mips/loongson/common/env.c
  14636. --- linux-2.6.30.5.orig/arch/mips/loongson/common/env.c 1970-01-01 01:00:00.000000000 +0100
  14637. +++ linux-2.6.30.5/arch/mips/loongson/common/env.c 2009-08-23 19:01:04.000000000 +0200
  14638. @@ -0,0 +1,59 @@
  14639. +/*
  14640. + * Based on Ocelot Linux port, which is
  14641. + * Copyright 2001 MontaVista Software Inc.
  14642. + * Author: jsun@mvista.com or jsun@junsun.net
  14643. + *
  14644. + * Copyright 2003 ICT CAS
  14645. + * Author: Michael Guo <guoyi@ict.ac.cn>
  14646. + *
  14647. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  14648. + * Author: Fuxin Zhang, zhangfx@lemote.com
  14649. + *
  14650. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  14651. + * Author: Wu Zhangjin, wuzj@lemote.com
  14652. + *
  14653. + * This program is free software; you can redistribute it and/or modify it
  14654. + * under the terms of the GNU General Public License as published by the
  14655. + * Free Software Foundation; either version 2 of the License, or (at your
  14656. + * option) any later version.
  14657. + */
  14658. +
  14659. +#include <asm/bootinfo.h>
  14660. +
  14661. +#include <loongson.h>
  14662. +
  14663. +unsigned long bus_clock, cpu_clock_freq;
  14664. +unsigned long memsize, highmemsize;
  14665. +
  14666. +/* pmon passes arguments in 32bit pointers */
  14667. +int *_prom_envp;
  14668. +
  14669. +#define parse_even_earlier(res, option, p) \
  14670. +do { \
  14671. + if (strncmp(option, (char *)p, strlen(option)) == 0) \
  14672. + strict_strtol((char *)p + strlen(option"="), \
  14673. + 10, &res); \
  14674. +} while (0)
  14675. +
  14676. +void __init prom_init_env(void)
  14677. +{
  14678. + long l;
  14679. +
  14680. + /* firmware arguments are initialized in head.S */
  14681. + _prom_envp = (int *)fw_arg2;
  14682. +
  14683. + l = (long)*_prom_envp;
  14684. + while (l != 0) {
  14685. + parse_even_earlier(bus_clock, "busclock", l);
  14686. + parse_even_earlier(cpu_clock_freq, "cpuclock", l);
  14687. + parse_even_earlier(memsize, "memsize", l);
  14688. + parse_even_earlier(highmemsize, "highmemsize", l);
  14689. + _prom_envp++;
  14690. + l = (long)*_prom_envp;
  14691. + }
  14692. + if (memsize == 0)
  14693. + memsize = 256;
  14694. +
  14695. + pr_info("busclock=%ld, cpuclock=%ld, memsize=%ld, highmemsize=%ld\n",
  14696. + bus_clock, cpu_clock_freq, memsize, highmemsize);
  14697. +}
  14698. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/init.c linux-2.6.30.5/arch/mips/loongson/common/init.c
  14699. --- linux-2.6.30.5.orig/arch/mips/loongson/common/init.c 1970-01-01 01:00:00.000000000 +0100
  14700. +++ linux-2.6.30.5/arch/mips/loongson/common/init.c 2009-08-23 19:01:04.000000000 +0200
  14701. @@ -0,0 +1,65 @@
  14702. +/*
  14703. + * Based on Ocelot Linux port, which is
  14704. + * Copyright 2001 MontaVista Software Inc.
  14705. + * Author: jsun@mvista.com or jsun@junsun.net
  14706. + *
  14707. + * Copyright 2003 ICT CAS
  14708. + * Author: Michael Guo <guoyi@ict.ac.cn>
  14709. + *
  14710. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  14711. + * Author: Fuxin Zhang, zhangfx@lemote.com
  14712. + *
  14713. + * This program is free software; you can redistribute it and/or modify it
  14714. + * under the terms of the GNU General Public License as published by the
  14715. + * Free Software Foundation; either version 2 of the License, or (at your
  14716. + * option) any later version.
  14717. + */
  14718. +
  14719. +#include <linux/bootmem.h>
  14720. +
  14721. +#include <asm/bootinfo.h>
  14722. +#include <asm/mipsregs.h>
  14723. +
  14724. +#include <loongson.h>
  14725. +
  14726. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  14727. +unsigned long _loongson_addrwincfg_base;
  14728. +
  14729. +/* Loongson CPU address windows config space base address */
  14730. +static inline void set_loongson_addrwincfg_base(unsigned long base)
  14731. +{
  14732. + *(unsigned long *)&_loongson_addrwincfg_base = base;
  14733. + barrier();
  14734. +}
  14735. +#endif
  14736. +
  14737. +/* stop all perf counters by default
  14738. + * $24 is the control register of loongson perf counter
  14739. + */
  14740. +static inline void stop_perf_counters(void)
  14741. +{
  14742. + __write_64bit_c0_register($24, 0, 0);
  14743. +}
  14744. +
  14745. +void __init prom_init(void)
  14746. +{
  14747. + /* init several base address */
  14748. + set_io_port_base((unsigned long)
  14749. + ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
  14750. +
  14751. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  14752. + set_loongson_addrwincfg_base((unsigned long)
  14753. + ioremap(LOONGSON_ADDRWINCFG_BASE,
  14754. + LOONGSON_ADDRWINCFG_SIZE));
  14755. +#endif
  14756. + /* stop all perf counters */
  14757. + stop_perf_counters();
  14758. +
  14759. + prom_init_cmdline();
  14760. + prom_init_env();
  14761. + prom_init_memory();
  14762. +}
  14763. +
  14764. +void __init prom_free_prom_memory(void)
  14765. +{
  14766. +}
  14767. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/irq.c linux-2.6.30.5/arch/mips/loongson/common/irq.c
  14768. --- linux-2.6.30.5.orig/arch/mips/loongson/common/irq.c 1970-01-01 01:00:00.000000000 +0100
  14769. +++ linux-2.6.30.5/arch/mips/loongson/common/irq.c 2009-08-23 19:01:04.000000000 +0200
  14770. @@ -0,0 +1,120 @@
  14771. +/*
  14772. + * Copyright 2001 MontaVista Software Inc.
  14773. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  14774. + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  14775. + *
  14776. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  14777. + * Author: Fuxin Zhang, zhangfx@lemote.com
  14778. + *
  14779. + * This program is free software; you can redistribute it and/or modify it
  14780. + * under the terms of the GNU General Public License as published by the
  14781. + * Free Software Foundation; either version 2 of the License, or (at your
  14782. + * option) any later version.
  14783. + */
  14784. +
  14785. +#include <linux/delay.h>
  14786. +#include <linux/interrupt.h>
  14787. +
  14788. +#include <asm/irq_cpu.h>
  14789. +#include <asm/i8259.h>
  14790. +
  14791. +#include <loongson.h>
  14792. +#include <machine.h>
  14793. +
  14794. +/*
  14795. + * the first level int-handler will jump here if it is a loongson irq
  14796. + */
  14797. +void bonito_irqdispatch(void)
  14798. +{
  14799. + u32 int_status;
  14800. + int i;
  14801. +
  14802. + /* workaround the IO dma problem: let cpu looping to allow DMA finish */
  14803. + int_status = LOONGSON_INTISR;
  14804. + while (int_status & (1 << 10)) {
  14805. + udelay(1);
  14806. + int_status = LOONGSON_INTISR;
  14807. + }
  14808. +
  14809. + /* Get pending sources, masked by current enables */
  14810. + int_status = LOONGSON_INTISR & LOONGSON_INTEN;
  14811. +
  14812. + if (int_status != 0) {
  14813. + i = __ffs(int_status);
  14814. + int_status &= ~(1 << i);
  14815. + do_IRQ(LOONGSON_IRQ_BASE + i);
  14816. + }
  14817. +}
  14818. +
  14819. +void i8259_irqdispatch(void)
  14820. +{
  14821. + int irq;
  14822. +
  14823. + irq = mach_i8259_irq();
  14824. + if (irq < 0)
  14825. + spurious_interrupt();
  14826. + else
  14827. + do_IRQ(irq);
  14828. +}
  14829. +
  14830. +asmlinkage void plat_irq_dispatch(void)
  14831. +{
  14832. + unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
  14833. +
  14834. + mach_irq_dispatch(pending);
  14835. +}
  14836. +
  14837. +
  14838. +static struct irqaction cascade_irqaction = {
  14839. + .handler = no_action,
  14840. + .name = "cascade",
  14841. +};
  14842. +
  14843. +irqreturn_t ip6_action(int cpl, void *dev_id)
  14844. +{
  14845. + return IRQ_HANDLED;
  14846. +}
  14847. +
  14848. +static struct irqaction ip6_irqaction = {
  14849. + .handler = ip6_action,
  14850. + .name = "cascade",
  14851. + .flags = IRQF_SHARED,
  14852. +};
  14853. +
  14854. +void __init arch_init_irq(void)
  14855. +{
  14856. + /*
  14857. + * Clear all of the interrupts while we change the able around a bit.
  14858. + * int-handler is not on bootstrap
  14859. + */
  14860. + clear_c0_status(ST0_IM | ST0_BEV);
  14861. + local_irq_disable();
  14862. +
  14863. + /* setting irq trigger mode */
  14864. + set_irq_trigger_mode();
  14865. +
  14866. + /* no steer */
  14867. + LOONGSON_INTSTEER = 0;
  14868. +
  14869. + /*
  14870. + * Mask out all interrupt by writing "1" to all bit position in
  14871. + * the interrupt reset reg.
  14872. + */
  14873. + LOONGSON_INTENCLR = ~0;
  14874. +
  14875. + /* init all controller
  14876. + * 0-15 ------> i8259 interrupt
  14877. + * 16-23 ------> mips cpu interrupt
  14878. + * 32-63 ------> bonito irq
  14879. + */
  14880. +
  14881. + /* Sets the first-level interrupt dispatcher. */
  14882. + mips_cpu_irq_init();
  14883. + init_i8259_irqs();
  14884. + bonito_irq_init();
  14885. +
  14886. + /* setup north bridge irq (bonito) */
  14887. + setup_irq(LOONGSON_NORTH_BRIDGE_IRQ, &ip6_irqaction);
  14888. + /* setup source bridge irq (i8259) */
  14889. + setup_irq(LOONGSON_SOUTH_BRIDGE_IRQ, &cascade_irqaction);
  14890. +}
  14891. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/machtype.c linux-2.6.30.5/arch/mips/loongson/common/machtype.c
  14892. --- linux-2.6.30.5.orig/arch/mips/loongson/common/machtype.c 1970-01-01 01:00:00.000000000 +0100
  14893. +++ linux-2.6.30.5/arch/mips/loongson/common/machtype.c 2009-08-23 19:01:04.000000000 +0200
  14894. @@ -0,0 +1,50 @@
  14895. +/*
  14896. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  14897. + * Author: Wu Zhangjin, wuzj@lemote.com
  14898. + *
  14899. + * Copyright (c) 2009 Zhang Le <r0bertz@gentoo.org>
  14900. + *
  14901. + * This program is free software; you can redistribute it and/or modify it
  14902. + * under the terms of the GNU General Public License as published by the
  14903. + * Free Software Foundation; either version 2 of the License, or (at your
  14904. + * option) any later version.
  14905. + */
  14906. +
  14907. +#include <linux/errno.h>
  14908. +#include <asm/bootinfo.h>
  14909. +
  14910. +#include <loongson.h>
  14911. +#include <machine.h>
  14912. +
  14913. +static const char *system_types[] = {
  14914. + [MACH_LOONGSON_UNKNOWN] "unknown loongson machine",
  14915. + [MACH_LEMOTE_FL2E] "lemote-fuloong-2e-box",
  14916. + [MACH_LEMOTE_FL2F] "lemote-fuloong-2f-box",
  14917. + [MACH_LEMOTE_YL2F89] "lemote-yeeloong-2f-8.9inches",
  14918. + [MACH_LEMOTE_YL2F7] "lemote-yeeloong-2f-7inches",
  14919. + [MACH_LOONGSON_END] NULL,
  14920. +};
  14921. +
  14922. +const char *get_system_type(void)
  14923. +{
  14924. + if (mips_machtype == MACH_UNKNOWN)
  14925. + mips_machtype = MACHTYPE;
  14926. +
  14927. + return system_types[mips_machtype];
  14928. +}
  14929. +
  14930. +static __init int machtype_setup(char *str)
  14931. +{
  14932. + int machtype = MACH_LEMOTE_FL2E;
  14933. +
  14934. + if (!str)
  14935. + return -EINVAL;
  14936. +
  14937. + for (; system_types[machtype]; machtype++)
  14938. + if (strstr(system_types[machtype], str)) {
  14939. + mips_machtype = machtype;
  14940. + break;
  14941. + }
  14942. + return 0;
  14943. +}
  14944. +__setup("machtype=", machtype_setup);
  14945. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/Makefile linux-2.6.30.5/arch/mips/loongson/common/Makefile
  14946. --- linux-2.6.30.5.orig/arch/mips/loongson/common/Makefile 1970-01-01 01:00:00.000000000 +0100
  14947. +++ linux-2.6.30.5/arch/mips/loongson/common/Makefile 2009-08-23 19:01:04.000000000 +0200
  14948. @@ -0,0 +1,37 @@
  14949. +#
  14950. +# Makefile for loongson based machines.
  14951. +#
  14952. +
  14953. +obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
  14954. + pci.o bonito-irq.o mem.o machtype.o
  14955. +
  14956. +#
  14957. +# Early printk support
  14958. +#
  14959. +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o dbg.o
  14960. +
  14961. +#
  14962. +# Enable RTC Class support
  14963. +#
  14964. +# please enable CONFIG_RTC_DRV_CMOS
  14965. +#
  14966. +obj-$(CONFIG_RTC_DRV_CMOS) += rtc.o
  14967. +
  14968. +#
  14969. +# Enable CS5536 Virtual Support Module(VSM) for virtulize the PCI configure
  14970. +# space
  14971. +#
  14972. +obj-$(CONFIG_CS5536) += cs5536/
  14973. +
  14974. +#
  14975. +# Enable fuloong(2f) and yeeloong(2f) cpu frequency scaling support
  14976. +# This is based on CS5536 mfgpt timer
  14977. +#
  14978. +obj-$(CONFIG_LOONGSON2F_CPU_FREQ) += clock.o
  14979. +
  14980. +#
  14981. +# Enable serial port
  14982. +#
  14983. +obj-$(CONFIG_SERIAL_8250) += serial.o
  14984. +
  14985. +EXTRA_CFLAGS += -Werror
  14986. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/mem.c linux-2.6.30.5/arch/mips/loongson/common/mem.c
  14987. --- linux-2.6.30.5.orig/arch/mips/loongson/common/mem.c 1970-01-01 01:00:00.000000000 +0100
  14988. +++ linux-2.6.30.5/arch/mips/loongson/common/mem.c 2009-08-23 19:01:04.000000000 +0200
  14989. @@ -0,0 +1,116 @@
  14990. +/*
  14991. + * This program is free software; you can redistribute it and/or modify it
  14992. + * under the terms of the GNU General Public License as published by the
  14993. + * Free Software Foundation; either version 2 of the License, or (at your
  14994. + * option) any later version.
  14995. + */
  14996. +
  14997. +#include <linux/fs.h>
  14998. +#include <linux/mm.h>
  14999. +
  15000. +#include <asm/bootinfo.h>
  15001. +
  15002. +#include <loongson.h>
  15003. +#include <mem.h>
  15004. +
  15005. +void __init prom_init_memory(void)
  15006. +{
  15007. + add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
  15008. +#ifdef CONFIG_64BIT
  15009. +#ifdef CONFIG_CPU_LOONGSON2F
  15010. + {
  15011. + int bit;
  15012. +
  15013. + bit = fls(memsize + highmemsize);
  15014. + if (bit != ffs(memsize + highmemsize))
  15015. + bit += 20;
  15016. + else
  15017. + bit = bit + 20 - 1;
  15018. +
  15019. + /* set cpu window3 to map CPU to DDR: 2G -> 2G */
  15020. + LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul,
  15021. + 0x80000000ul, (1 << bit));
  15022. + mmiowb();
  15023. + }
  15024. +#endif /* CONFIG_CPU_LOONGSON2F */
  15025. +
  15026. + if (highmemsize > 0) {
  15027. + add_memory_region(LOONGSON_HIGHMEM_START,
  15028. + highmemsize << 20, BOOT_MEM_RAM);
  15029. + }
  15030. +#endif /* CONFIG_64BIT */
  15031. +}
  15032. +
  15033. +/* override of arch/mips/mm/cache.c: __uncached_access */
  15034. +int __uncached_access(struct file *file, unsigned long addr)
  15035. +{
  15036. + if (file->f_flags & O_SYNC)
  15037. + return 1;
  15038. +
  15039. + return addr >= __pa(high_memory) ||
  15040. + ((addr >= LOONGSON_MMIO_MEM_START) && \
  15041. + (addr < LOONGSON_MMIO_MEM_END));
  15042. +}
  15043. +
  15044. +#if defined(CONFIG_CPU_LOONGSON2F)
  15045. +
  15046. +#include <linux/pci.h>
  15047. +#include <linux/sched.h>
  15048. +#include <asm/current.h>
  15049. +
  15050. +static unsigned long uca_start;
  15051. +static unsigned long uca_size = CONFIG_UCA_SIZE;
  15052. +
  15053. +pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
  15054. + unsigned long size, pgprot_t vma_prot)
  15055. +{
  15056. + unsigned long offset = pfn << PAGE_SHIFT;
  15057. + unsigned long end = offset + size;
  15058. +
  15059. + if (__uncached_access(file, offset)) {
  15060. + if (((uca_start && offset) >= uca_start) && \
  15061. + (end <= (uca_start + uca_size)))
  15062. + return __pgprot((pgprot_val(vma_prot) & \
  15063. + ~_CACHE_MASK) | \
  15064. + _CACHE_UNCACHED_ACCELERATED);
  15065. + else
  15066. + return pgprot_noncached(vma_prot);
  15067. + }
  15068. + return vma_prot;
  15069. +}
  15070. +
  15071. +static int __init find_vga_mem_init(void)
  15072. +{
  15073. + struct pci_dev *dev = 0;
  15074. + struct resource *r;
  15075. + int idx;
  15076. +
  15077. + if (uca_start)
  15078. + return 0;
  15079. +
  15080. + for_each_pci_dev(dev) {
  15081. + if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  15082. + for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
  15083. + r = &dev->resource[idx];
  15084. + if (!r->start && r->end)
  15085. + continue;
  15086. + if (r->flags & IORESOURCE_IO)
  15087. + continue;
  15088. + if (r->flags & IORESOURCE_MEM) {
  15089. + uca_start = r->start;
  15090. +
  15091. + printk(KERN_INFO
  15092. + "find the frame buffer:start=%lx\n",
  15093. + uca_start);
  15094. +
  15095. + return 0;
  15096. + }
  15097. + }
  15098. +
  15099. + }
  15100. + }
  15101. + return 0;
  15102. +}
  15103. +
  15104. +late_initcall(find_vga_mem_init);
  15105. +#endif /* !CONFIG_CPU_LOONGSON2F */
  15106. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/pci.c linux-2.6.30.5/arch/mips/loongson/common/pci.c
  15107. --- linux-2.6.30.5.orig/arch/mips/loongson/common/pci.c 1970-01-01 01:00:00.000000000 +0100
  15108. +++ linux-2.6.30.5/arch/mips/loongson/common/pci.c 2009-08-23 19:01:04.000000000 +0200
  15109. @@ -0,0 +1,109 @@
  15110. +/*
  15111. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  15112. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15113. + *
  15114. + * This program is free software; you can redistribute it and/or modify it
  15115. + * under the terms of the GNU General Public License as published by the
  15116. + * Free Software Foundation; either version 2 of the License, or (at your
  15117. + * option) any later version.
  15118. + *
  15119. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15120. + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  15121. + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  15122. + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  15123. + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15124. + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  15125. + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  15126. + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  15127. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  15128. + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  15129. + *
  15130. + * You should have received a copy of the GNU General Public License along
  15131. + * with this program; if not, write to the Free Software Foundation, Inc.,
  15132. + * 675 Mass Ave, Cambridge, MA 02139, USA.
  15133. + *
  15134. + */
  15135. +
  15136. +#include <linux/pci.h>
  15137. +
  15138. +#include <loongson.h>
  15139. +#include <pci.h>
  15140. +
  15141. +static struct resource loongson_pci_mem_resource = {
  15142. + .name = "pci memory space",
  15143. + .start = LOONGSON_PCI_MEM_START,
  15144. + .end = LOONGSON_PCI_MEM_END,
  15145. + .flags = IORESOURCE_MEM,
  15146. +};
  15147. +
  15148. +static struct resource loongson_pci_io_resource = {
  15149. + .name = "pci io space",
  15150. + .start = LOONGSON_PCI_IO_START, /* reserve regacy I/O space */
  15151. + .end = IO_SPACE_LIMIT,
  15152. + .flags = IORESOURCE_IO,
  15153. +};
  15154. +
  15155. +static struct pci_controller loongson_pci_controller = {
  15156. + .pci_ops = &loongson_pci_ops,
  15157. + .io_resource = &loongson_pci_io_resource,
  15158. + .mem_resource = &loongson_pci_mem_resource,
  15159. + .mem_offset = 0x00000000UL,
  15160. + .io_offset = 0x00000000UL,
  15161. +};
  15162. +
  15163. +static void __init ict_pcimap(void)
  15164. +{
  15165. + /*
  15166. + * local to PCI mapping for CPU accessing PCI space
  15167. + *
  15168. + * CPU address space [256M,448M] is window for accessing pci space
  15169. + * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
  15170. + *
  15171. + * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
  15172. + * [<2G] [384M,448M] [320M,384M] [0M,64M]
  15173. + */
  15174. + LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 |
  15175. + LOONGSON_PCIMAP_WIN(2, 0x18000000) |
  15176. + LOONGSON_PCIMAP_WIN(1, 0x14000000) |
  15177. + LOONGSON_PCIMAP_WIN(0, 0);
  15178. +
  15179. + /*
  15180. + * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
  15181. + */
  15182. + LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */
  15183. + /* size: 256M, burst transmission, pre-fetch enable, 64bit */
  15184. + LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
  15185. + LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
  15186. + LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
  15187. + LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
  15188. + LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
  15189. + LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
  15190. +
  15191. + /* avoid deadlock of PCI reading/writing lock operation */
  15192. + LOONGSON_PCI_ISR4C = 0xd2000001ul;
  15193. +
  15194. + /* can not change gnt to break pci transfer when device's gnt not
  15195. + deassert for some broken device */
  15196. + LOONGSON_PXARB_CFG = 0x00fe0105ul;
  15197. +
  15198. +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
  15199. + /*
  15200. + * set cpu addr window2 to map CPU address space to PCI address space
  15201. + */
  15202. + LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
  15203. + LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
  15204. +#endif
  15205. +}
  15206. +
  15207. +static int __init pcibios_init(void)
  15208. +{
  15209. + ict_pcimap();
  15210. +
  15211. + loongson_pci_controller.io_map_base = mips_io_port_base;
  15212. +
  15213. + register_pci_controller(&loongson_pci_controller);
  15214. +
  15215. + return 0;
  15216. +}
  15217. +
  15218. +arch_initcall(pcibios_init);
  15219. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/reset.c linux-2.6.30.5/arch/mips/loongson/common/reset.c
  15220. --- linux-2.6.30.5.orig/arch/mips/loongson/common/reset.c 1970-01-01 01:00:00.000000000 +0100
  15221. +++ linux-2.6.30.5/arch/mips/loongson/common/reset.c 2009-08-23 19:01:04.000000000 +0200
  15222. @@ -0,0 +1,38 @@
  15223. +/*
  15224. + * This program is free software; you can redistribute it and/or modify it
  15225. + * under the terms of the GNU General Public License as published by the
  15226. + * Free Software Foundation; either version 2 of the License, or (at your
  15227. + * option) any later version.
  15228. + *
  15229. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  15230. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15231. + */
  15232. +
  15233. +#include <linux/pm.h>
  15234. +
  15235. +#include <asm/reboot.h>
  15236. +
  15237. +#include <loongson.h>
  15238. +
  15239. +static void loongson_restart(char *command)
  15240. +{
  15241. + /* perform board-specific pre-reboot operations */
  15242. + mach_prepare_reboot();
  15243. +
  15244. + /* reboot via jumping to 0xbfc00000 */
  15245. + ((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) ();
  15246. +}
  15247. +
  15248. +static void loongson_halt(void)
  15249. +{
  15250. + mach_prepare_shutdown();
  15251. + while (1)
  15252. + ;
  15253. +}
  15254. +
  15255. +void __init loongson_reboot_setup(void)
  15256. +{
  15257. + _machine_restart = loongson_restart;
  15258. + _machine_halt = loongson_halt;
  15259. + pm_power_off = loongson_halt;
  15260. +}
  15261. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/rtc.c linux-2.6.30.5/arch/mips/loongson/common/rtc.c
  15262. --- linux-2.6.30.5.orig/arch/mips/loongson/common/rtc.c 1970-01-01 01:00:00.000000000 +0100
  15263. +++ linux-2.6.30.5/arch/mips/loongson/common/rtc.c 2009-08-23 19:01:04.000000000 +0200
  15264. @@ -0,0 +1,54 @@
  15265. +/*
  15266. + * Registration of Cobalt RTC platform device.
  15267. + *
  15268. + * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
  15269. + * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
  15270. + *
  15271. + * This program is free software; you can redistribute it and/or modify
  15272. + * it under the terms of the GNU General Public License as published by
  15273. + * the Free Software Foundation; either version 2 of the License, or
  15274. + * (at your option) any later version.
  15275. + *
  15276. + * This program is distributed in the hope that it will be useful,
  15277. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15278. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15279. + * GNU General Public License for more details.
  15280. + *
  15281. + * You should have received a copy of the GNU General Public License
  15282. + * along with this program; if not, write to the Free Software
  15283. + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  15284. + * MA 02110-1301 USA
  15285. + */
  15286. +
  15287. +#include <linux/ioport.h>
  15288. +#include <linux/mc146818rtc.h>
  15289. +#include <linux/platform_device.h>
  15290. +
  15291. +static struct resource rtc_cmos_resource[] = {
  15292. + {
  15293. + .start = RTC_PORT(0),
  15294. + .end = RTC_PORT(1),
  15295. + .flags = IORESOURCE_IO,
  15296. + },
  15297. + {
  15298. + .start = RTC_IRQ,
  15299. + .end = RTC_IRQ,
  15300. + .flags = IORESOURCE_IRQ,
  15301. + },
  15302. +};
  15303. +
  15304. +static struct platform_device rtc_cmos_device = {
  15305. + .name = "rtc_cmos",
  15306. + .id = -1,
  15307. + .num_resources = ARRAY_SIZE(rtc_cmos_resource),
  15308. + .resource = rtc_cmos_resource
  15309. +};
  15310. +
  15311. +static __init int rtc_cmos_init(void)
  15312. +{
  15313. + platform_device_register(&rtc_cmos_device);
  15314. +
  15315. + return 0;
  15316. +}
  15317. +
  15318. +device_initcall(rtc_cmos_init);
  15319. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/serial.c linux-2.6.30.5/arch/mips/loongson/common/serial.c
  15320. --- linux-2.6.30.5.orig/arch/mips/loongson/common/serial.c 1970-01-01 01:00:00.000000000 +0100
  15321. +++ linux-2.6.30.5/arch/mips/loongson/common/serial.c 2009-08-23 19:01:04.000000000 +0200
  15322. @@ -0,0 +1,66 @@
  15323. +/*
  15324. + * This file is subject to the terms and conditions of the GNU General Public
  15325. + * License. See the file "COPYING" in the main directory of this archive
  15326. + * for more details.
  15327. + *
  15328. + * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
  15329. + *
  15330. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  15331. + * Author: yanhua (yanhua@lemote.com)
  15332. + * Author: Wu Zhangjin (wuzj@lemote.com)
  15333. + */
  15334. +
  15335. +#include <linux/io.h>
  15336. +#include <linux/init.h>
  15337. +#include <linux/serial_8250.h>
  15338. +
  15339. +#include <loongson.h>
  15340. +#include <machine.h>
  15341. +
  15342. +#define PORT(int, base_baud, io_type) \
  15343. +{ \
  15344. + .irq = int, \
  15345. + .uartclk = base_baud, \
  15346. + .iotype = io_type, \
  15347. + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
  15348. + .regshift = 0, \
  15349. +}
  15350. +
  15351. +static struct plat_serial8250_port uart8250_data[] = {
  15352. + PORT(LOONGSON_UART_IRQ, LOONGSON_UART_BAUD, LOONGSON_UART_IOTYPE),
  15353. + {},
  15354. +};
  15355. +
  15356. +static struct platform_device uart8250_device = {
  15357. + .name = "serial8250",
  15358. + .id = PLAT8250_DEV_PLATFORM,
  15359. + .dev = {
  15360. + .platform_data = uart8250_data,
  15361. + },
  15362. +};
  15363. +
  15364. +static inline void uart8250_init(void)
  15365. +{
  15366. +#if (LOONGSON_UART_IOTYPE == UPIO_MEM)
  15367. + uart8250_data[0].membase =
  15368. + ioremap_nocache(LOONGSON_UART_BASE, 8);
  15369. +#elif (LOONGSON_UART_IOTYPE == UPIO_PORT)
  15370. + uart8250_data[0].iobase =
  15371. + LOONGSON_UART_BASE - LOONGSON_PCIIO_BASE;
  15372. + uart8250_data[0].irq -= MIPS_CPU_IRQ_BASE;
  15373. +#else
  15374. +#warning currently, no such iotype of uart used in loongson-based machines
  15375. +
  15376. +#endif
  15377. +}
  15378. +
  15379. +static int __init serial_init(void)
  15380. +{
  15381. + uart8250_init();
  15382. +
  15383. + platform_device_register(&uart8250_device);
  15384. +
  15385. + return 0;
  15386. +}
  15387. +
  15388. +device_initcall(serial_init);
  15389. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/setup.c linux-2.6.30.5/arch/mips/loongson/common/setup.c
  15390. --- linux-2.6.30.5.orig/arch/mips/loongson/common/setup.c 1970-01-01 01:00:00.000000000 +0100
  15391. +++ linux-2.6.30.5/arch/mips/loongson/common/setup.c 2009-08-23 19:01:04.000000000 +0200
  15392. @@ -0,0 +1,74 @@
  15393. +/*
  15394. + * board dependent setup routines
  15395. + *
  15396. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  15397. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15398. + *
  15399. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  15400. + * Author: Wu Zhangjin, wuzj@lemote.com
  15401. + *
  15402. + * This program is free software; you can redistribute it and/or modify it
  15403. + * under the terms of the GNU General Public License as published by the
  15404. + * Free Software Foundation; either version 2 of the License, or (at your
  15405. + * option) any later version.
  15406. + */
  15407. +
  15408. +#include <linux/module.h>
  15409. +
  15410. +#include <asm/wbflush.h>
  15411. +
  15412. +#include <loongson.h>
  15413. +
  15414. +void (*__wbflush) (void);
  15415. +EXPORT_SYMBOL(__wbflush);
  15416. +
  15417. +static void loongson_wbflush(void)
  15418. +{
  15419. + asm(".set\tpush\n\t"
  15420. + ".set\tnoreorder\n\t"
  15421. + ".set mips3\n\t"
  15422. + "sync\n\t"
  15423. + "nop\n\t"
  15424. + ".set\tpop\n\t"
  15425. + ".set mips0\n\t");
  15426. +}
  15427. +
  15428. +void __init loongson_wbflush_setup(void)
  15429. +{
  15430. + __wbflush = loongson_wbflush;
  15431. +}
  15432. +
  15433. +#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
  15434. +#include <linux/screen_info.h>
  15435. +
  15436. +void __init loongson_screeninfo_setup(void)
  15437. +{
  15438. + screen_info = (struct screen_info) {
  15439. + 0, /* orig-x */
  15440. + 25, /* orig-y */
  15441. + 0, /* unused */
  15442. + 0, /* orig-video-page */
  15443. + 0, /* orig-video-mode */
  15444. + 80, /* orig-video-cols */
  15445. + 0, /* ega_ax */
  15446. + 0, /* ega_bx */
  15447. + 0, /* ega_cx */
  15448. + 25, /* orig-video-lines */
  15449. + VIDEO_TYPE_VGAC, /* orig-video-isVGA */
  15450. + 16 /* orig-video-points */
  15451. + };
  15452. +}
  15453. +#else
  15454. +void __init loongson_screeninfo_setup(void)
  15455. +{
  15456. +}
  15457. +#endif
  15458. +
  15459. +void __init plat_mem_setup(void)
  15460. +{
  15461. + loongson_reboot_setup();
  15462. +
  15463. + loongson_wbflush_setup();
  15464. +
  15465. + loongson_screeninfo_setup();
  15466. +}
  15467. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/common/time.c linux-2.6.30.5/arch/mips/loongson/common/time.c
  15468. --- linux-2.6.30.5.orig/arch/mips/loongson/common/time.c 1970-01-01 01:00:00.000000000 +0100
  15469. +++ linux-2.6.30.5/arch/mips/loongson/common/time.c 2009-08-23 19:01:04.000000000 +0200
  15470. @@ -0,0 +1,34 @@
  15471. +/*
  15472. + * board dependent boot routines
  15473. + *
  15474. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  15475. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15476. + *
  15477. + * This program is free software; you can redistribute it and/or modify it
  15478. + * under the terms of the GNU General Public License as published by the
  15479. + * Free Software Foundation; either version 2 of the License, or (at your
  15480. + * option) any later version.
  15481. + */
  15482. +
  15483. +#include <asm/mc146818-time.h>
  15484. +#include <asm/time.h>
  15485. +
  15486. +#include <loongson.h>
  15487. +#ifdef CONFIG_CS5536_MFGPT
  15488. +#include <cs5536/cs5536_mfgpt.h>
  15489. +#endif
  15490. +
  15491. +unsigned long read_persistent_clock(void)
  15492. +{
  15493. + return mc146818_get_cmos_time();
  15494. +}
  15495. +
  15496. +void __init plat_time_init(void)
  15497. +{
  15498. + /* setup mips r4k timer */
  15499. + mips_hpt_frequency = cpu_clock_freq / 2;
  15500. +
  15501. +#ifdef CONFIG_CS5536_MFGPT
  15502. + setup_mfgpt_timer();
  15503. +#endif
  15504. +}
  15505. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/irq.c linux-2.6.30.5/arch/mips/loongson/fuloong-2e/irq.c
  15506. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/irq.c 1970-01-01 01:00:00.000000000 +0100
  15507. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2e/irq.c 2009-08-23 19:01:04.000000000 +0200
  15508. @@ -0,0 +1,58 @@
  15509. +/*
  15510. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  15511. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15512. + *
  15513. + * This program is free software; you can redistribute it and/or modify it
  15514. + * under the terms of the GNU General Public License as published by the
  15515. + * Free Software Foundation; either version 2 of the License, or (at your
  15516. + * option) any later version.
  15517. + *
  15518. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15519. + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  15520. + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  15521. + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  15522. + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15523. + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  15524. + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  15525. + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  15526. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  15527. + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  15528. + *
  15529. + * You should have received a copy of the GNU General Public License along
  15530. + * with this program; if not, write to the Free Software Foundation, Inc.,
  15531. + * 675 Mass Ave, Cambridge, MA 02139, USA.
  15532. + *
  15533. + */
  15534. +
  15535. +#include <linux/interrupt.h>
  15536. +
  15537. +#include <asm/i8259.h>
  15538. +
  15539. +#include <loongson.h>
  15540. +#include <machine.h>
  15541. +
  15542. +int mach_i8259_irq(void)
  15543. +{
  15544. + return i8259_irq();
  15545. +}
  15546. +
  15547. +void mach_irq_dispatch(unsigned int pending)
  15548. +{
  15549. + if (pending & CAUSEF_IP7)
  15550. + do_IRQ(LOONGSON_TIMER_IRQ);
  15551. + else if (pending & CAUSEF_IP6) /* perf counter loverflow */
  15552. + do_IRQ(LOONGSON_PERFCNT_IRQ);
  15553. + else if (pending & CAUSEF_IP5)
  15554. + i8259_irqdispatch();
  15555. + else if (pending & CAUSEF_IP2)
  15556. + bonito_irqdispatch();
  15557. + else
  15558. + spurious_interrupt();
  15559. +}
  15560. +
  15561. +void __init set_irq_trigger_mode(void)
  15562. +{
  15563. + /* most bonito irq should be level triggered */
  15564. + LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
  15565. + LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
  15566. +}
  15567. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/Makefile linux-2.6.30.5/arch/mips/loongson/fuloong-2e/Makefile
  15568. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/Makefile 1970-01-01 01:00:00.000000000 +0100
  15569. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2e/Makefile 2009-08-23 19:01:04.000000000 +0200
  15570. @@ -0,0 +1,7 @@
  15571. +#
  15572. +# Makefile for fuloong-2e
  15573. +#
  15574. +
  15575. +obj-y += irq.o reset.o
  15576. +
  15577. +EXTRA_CFLAGS += -Werror
  15578. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/reset.c linux-2.6.30.5/arch/mips/loongson/fuloong-2e/reset.c
  15579. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2e/reset.c 1970-01-01 01:00:00.000000000 +0100
  15580. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2e/reset.c 2009-08-23 19:01:04.000000000 +0200
  15581. @@ -0,0 +1,26 @@
  15582. +/* Board-specific reboot/shutdown routines
  15583. + * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
  15584. + *
  15585. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  15586. + * Author: Wu Zhangjin, wuzj@lemote.com
  15587. + *
  15588. + * This program is free software; you can redistribute it and/or modify it
  15589. + * under the terms of the GNU General Public License as published by the
  15590. + * Free Software Foundation; either version 2 of the License, or (at your
  15591. + * option) any later version.
  15592. + */
  15593. +
  15594. +#include <linux/delay.h>
  15595. +#include <linux/types.h>
  15596. +
  15597. +#include <loongson.h>
  15598. +
  15599. +void mach_prepare_reboot(void)
  15600. +{
  15601. + LOONGSON_GENCFG &= ~LOONGSON_GENCFG_CPUSELFRESET;
  15602. + LOONGSON_GENCFG |= LOONGSON_GENCFG_CPUSELFRESET;
  15603. +}
  15604. +
  15605. +void mach_prepare_shutdown(void)
  15606. +{
  15607. +}
  15608. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/irq.c linux-2.6.30.5/arch/mips/loongson/fuloong-2f/irq.c
  15609. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/irq.c 1970-01-01 01:00:00.000000000 +0100
  15610. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2f/irq.c 2009-08-23 19:01:04.000000000 +0200
  15611. @@ -0,0 +1,53 @@
  15612. +/*
  15613. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  15614. + * Author: Fuxin Zhang, zhangfx@lemote.com
  15615. + *
  15616. + * This program is free software; you can redistribute it and/or modify it
  15617. + * under the terms of the GNU General Public License as published by the
  15618. + * Free Software Foundation; either version 2 of the License, or (at your
  15619. + * option) any later version.
  15620. + */
  15621. +
  15622. +#include <linux/interrupt.h>
  15623. +
  15624. +#include <loongson.h>
  15625. +#include <machine.h>
  15626. +
  15627. +int mach_i8259_irq(void)
  15628. +{
  15629. + int irq, isr, imr;
  15630. +
  15631. + irq = -1;
  15632. +
  15633. + if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) {
  15634. + imr = inb(0x21) | (inb(0xa1) << 8);
  15635. + isr = inb(0x20) | (inb(0xa0) << 8);
  15636. + isr &= ~0x4; /* irq2 for cascade */
  15637. + isr &= ~imr;
  15638. + irq = ffs(isr) - 1;
  15639. + }
  15640. +
  15641. + return irq;
  15642. +}
  15643. +
  15644. +void mach_irq_dispatch(unsigned int pending)
  15645. +{
  15646. + if (pending & CAUSEF_IP7)
  15647. + do_IRQ(LOONGSON_TIMER_IRQ);
  15648. + else if (pending & CAUSEF_IP6) {
  15649. + do_IRQ(LOONGSON_PERFCNT_IRQ); /* Perf counter overflow */
  15650. + bonito_irqdispatch(); /* North Bridge */
  15651. + } else if (pending & CAUSEF_IP3) /* CPU UART */
  15652. + do_IRQ(LOONGSON_UART_IRQ);
  15653. + else if (pending & CAUSEF_IP2) /* South Bridge */
  15654. + i8259_irqdispatch();
  15655. + else
  15656. + spurious_interrupt();
  15657. +}
  15658. +
  15659. +void __init set_irq_trigger_mode(void)
  15660. +{
  15661. + /* setup cs5536 as high level trigger */
  15662. + LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
  15663. + LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
  15664. +}
  15665. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/Makefile linux-2.6.30.5/arch/mips/loongson/fuloong-2f/Makefile
  15666. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/Makefile 1970-01-01 01:00:00.000000000 +0100
  15667. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2f/Makefile 2009-08-23 19:01:04.000000000 +0200
  15668. @@ -0,0 +1,5 @@
  15669. +#
  15670. +# Makefile for fuloong-2f
  15671. +#
  15672. +
  15673. +obj-y += irq.o reset.o
  15674. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/reset.c linux-2.6.30.5/arch/mips/loongson/fuloong-2f/reset.c
  15675. --- linux-2.6.30.5.orig/arch/mips/loongson/fuloong-2f/reset.c 1970-01-01 01:00:00.000000000 +0100
  15676. +++ linux-2.6.30.5/arch/mips/loongson/fuloong-2f/reset.c 2009-08-23 19:01:04.000000000 +0200
  15677. @@ -0,0 +1,65 @@
  15678. +/* Board-specific reboot/shutdown routines
  15679. + *
  15680. + * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
  15681. + *
  15682. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  15683. + * Author: Wu Zhangjin, wuzj@lemote.com
  15684. + *
  15685. + * This program is free software; you can redistribute it and/or modify it
  15686. + * under the terms of the GNU General Public License as published by the
  15687. + * Free Software Foundation; either version 2 of the License, or (at your
  15688. + * option) any later version.
  15689. + */
  15690. +
  15691. +#include <linux/io.h>
  15692. +#include <linux/delay.h>
  15693. +#include <linux/types.h>
  15694. +
  15695. +#include <loongson.h>
  15696. +
  15697. +/* cs5536 is the south bridge used by fuloong2f mini PC */
  15698. +#include <cs5536/cs5536.h>
  15699. +
  15700. +void mach_prepare_reboot(void)
  15701. +{
  15702. + /*
  15703. + * reset cpu to full speed, this is needed when enabling cpu frequency
  15704. + * scalling
  15705. + */
  15706. + LOONGSON_CHIPCFG0 |= 0x7;
  15707. +
  15708. + /* send a reset signal to south bridge.
  15709. + *
  15710. + * NOTE: if enable "Power Management" in kernel, rtl8169 will not reset
  15711. + * normally with this reset operation and it will not work in PMON, but
  15712. + * you can type halt command and then reboot, seems the hardware reset
  15713. + * logic not work normally.
  15714. + */
  15715. + {
  15716. + u32 hi, lo;
  15717. + _rdmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), &hi, &lo);
  15718. + lo |= 0x00000001;
  15719. + _wrmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), hi, lo);
  15720. + }
  15721. +}
  15722. +
  15723. +void mach_prepare_shutdown(void)
  15724. +{
  15725. + u32 hi, lo, val;
  15726. + phys_addr_t gpio_base;
  15727. +
  15728. + _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo);
  15729. +
  15730. + gpio_base = mips_io_port_base | (lo & 0xff00);
  15731. +
  15732. + /* make cs5536 gpio13 output enable */
  15733. + val = (readl((u32 *) (gpio_base + GPIOL_OUT_EN)) & ~(1 << (16 + 13)))
  15734. + | (1 << 13);
  15735. + writel(val, (u32 *) (gpio_base + GPIOL_OUT_EN));
  15736. + mmiowb();
  15737. + /* make cs5536 gpio13 output low level voltage. */
  15738. + val = (readl((u32 *) (gpio_base + GPIOL_OUT_VAL)) & ~(1 << (13)))
  15739. + | (1 << (16 + 13));
  15740. + writel(val, (u32 *) (gpio_base + GPIOL_OUT_VAL));
  15741. + mmiowb();
  15742. +}
  15743. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/cache.c linux-2.6.30.5/arch/mips/loongson/image/cache.c
  15744. --- linux-2.6.30.5.orig/arch/mips/loongson/image/cache.c 1970-01-01 01:00:00.000000000 +0100
  15745. +++ linux-2.6.30.5/arch/mips/loongson/image/cache.c 2009-08-23 19:01:04.000000000 +0200
  15746. @@ -0,0 +1,42 @@
  15747. +#include <asm/addrspace.h>
  15748. +
  15749. +#define cache32_unroll32(base, op) \
  15750. + __asm__ __volatile__( \
  15751. + " .set push \n" \
  15752. + " .set noreorder \n" \
  15753. + " .set mips3 \n" \
  15754. + " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \
  15755. + " cache %1, 0x040(%0); cache %1, 0x060(%0) \n" \
  15756. + " cache %1, 0x080(%0); cache %1, 0x0a0(%0) \n" \
  15757. + " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0) \n" \
  15758. + " cache %1, 0x100(%0); cache %1, 0x120(%0) \n" \
  15759. + " cache %1, 0x140(%0); cache %1, 0x160(%0) \n" \
  15760. + " cache %1, 0x180(%0); cache %1, 0x1a0(%0) \n" \
  15761. + " cache %1, 0x1c0(%0); cache %1, 0x1e0(%0) \n" \
  15762. + " cache %1, 0x200(%0); cache %1, 0x220(%0) \n" \
  15763. + " cache %1, 0x240(%0); cache %1, 0x260(%0) \n" \
  15764. + " cache %1, 0x280(%0); cache %1, 0x2a0(%0) \n" \
  15765. + " cache %1, 0x2c0(%0); cache %1, 0x2e0(%0) \n" \
  15766. + " cache %1, 0x300(%0); cache %1, 0x320(%0) \n" \
  15767. + " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \
  15768. + " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \
  15769. + " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \
  15770. + " .set pop \n" \
  15771. + : \
  15772. + : "r" (base), \
  15773. + "i" (op));
  15774. +
  15775. +void flush_cache_all(void)
  15776. +{
  15777. + unsigned long start = CKSEG0ADDR(0x80000000);
  15778. + unsigned long end = start + MEM_SIZE_M * 1024 / 4;
  15779. + unsigned long lsize = 32;
  15780. + unsigned long addr;
  15781. +
  15782. + int i;
  15783. +
  15784. + for (i = 0; i < 4; i++) {
  15785. + for (addr = start; addr < end; addr += lsize * 32)
  15786. + cache32_unroll32(addr | i, 0x03); /* Index Writeback scache */
  15787. + }
  15788. +}
  15789. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/dbg.c linux-2.6.30.5/arch/mips/loongson/image/dbg.c
  15790. --- linux-2.6.30.5.orig/arch/mips/loongson/image/dbg.c 1970-01-01 01:00:00.000000000 +0100
  15791. +++ linux-2.6.30.5/arch/mips/loongson/image/dbg.c 2009-08-23 19:01:04.000000000 +0200
  15792. @@ -0,0 +1,61 @@
  15793. +/* serial port debug support */
  15794. +
  15795. +#ifdef SERIAL_PORT_DEBUG
  15796. +
  15797. +#include <linux/types.h>
  15798. +#include <linux/serial_reg.h>
  15799. +
  15800. +#include <asm/addrspace.h>
  15801. +
  15802. +#include <loongson.h>
  15803. +#include <machine.h>
  15804. +
  15805. +#define UART_BASE CKSEG1ADDR(LOONGSON_UART_BASE)
  15806. +
  15807. +void putc(char c)
  15808. +{
  15809. + int timeout;
  15810. + char reg;
  15811. +
  15812. + reg = *((char *)(UART_BASE + UART_LSR)) & UART_LSR_THRE;
  15813. + for (timeout = 1024; reg == 0 && timeout > 0; timeout--)
  15814. + reg = (*((char *)(UART_BASE + UART_LSR))) & UART_LSR_THRE;
  15815. +
  15816. + *((char *)(UART_BASE + UART_TX)) = c;
  15817. +}
  15818. +
  15819. +void puts(const char *s)
  15820. +{
  15821. + char c;
  15822. + while ((c = *s++) != '\0') {
  15823. + putc(c);
  15824. + if (c == '\n')
  15825. + putc('\r');
  15826. + }
  15827. +}
  15828. +
  15829. +void puthex(unsigned long val)
  15830. +{
  15831. +
  15832. + unsigned char buf[10];
  15833. + int i;
  15834. + for (i = 7; i >= 0; i--) {
  15835. + buf[i] = "0123456789ABCDEF"[val & 0x0F];
  15836. + val >>= 4;
  15837. + }
  15838. + buf[8] = '\0';
  15839. + puts(buf);
  15840. +}
  15841. +#else
  15842. +void putc(char c)
  15843. +{
  15844. +}
  15845. +
  15846. +void puts(const char *s)
  15847. +{
  15848. +}
  15849. +
  15850. +void puthex(unsigned long val)
  15851. +{
  15852. +}
  15853. +#endif
  15854. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/decompress.c linux-2.6.30.5/arch/mips/loongson/image/decompress.c
  15855. --- linux-2.6.30.5.orig/arch/mips/loongson/image/decompress.c 1970-01-01 01:00:00.000000000 +0100
  15856. +++ linux-2.6.30.5/arch/mips/loongson/image/decompress.c 2009-08-23 19:01:04.000000000 +0200
  15857. @@ -0,0 +1,134 @@
  15858. +/*
  15859. + * Misc. bootloader code for many machines.
  15860. + *
  15861. + * Copyright 2001 MontaVista Software Inc.
  15862. + * Author: Matt Porter <mporter@mvista.com> Derived from
  15863. + * arch/ppc/boot/prep/misc.c
  15864. + *
  15865. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  15866. + * Author: Wu Zhangjin <wuzj@lemote.com>
  15867. + *
  15868. + * This program is free software; you can redistribute it and/or modify it
  15869. + * under the terms of the GNU General Public License as published by the
  15870. + * Free Software Foundation; either version 2 of the License, or (at your
  15871. + * option) any later version.
  15872. + */
  15873. +
  15874. +#include <asm/addrspace.h>
  15875. +#include <linux/types.h>
  15876. +#include <linux/kernel.h>
  15877. +
  15878. +/* These two variables specify the free mem region
  15879. + * that can be used for temporary malloc area
  15880. + *
  15881. + * Here is toally 15M
  15882. + */
  15883. +#define FREE_MEM_START CKSEG0ADDR(0x83000000)
  15884. +#define FREE_MEM_END CKSEG0ADDR(0x83f00000)
  15885. +
  15886. +unsigned long free_mem_ptr;
  15887. +unsigned long free_mem_end_ptr;
  15888. +char *zimage_start;
  15889. +
  15890. +/* The linker tells us where the image is. */
  15891. +extern unsigned char __image_begin, __image_end;
  15892. +extern unsigned char __ramdisk_begin, __ramdisk_end;
  15893. +unsigned long initrd_size;
  15894. +
  15895. +/* debug interface via searil port */
  15896. +extern void puts(const char *s);
  15897. +extern void puthex(unsigned long val);
  15898. +void error(char *x)
  15899. +{
  15900. + puts("\n\n");
  15901. + puts(x);
  15902. + puts("\n\n -- System halted");
  15903. +
  15904. + while (1)
  15905. + ; /* Halt */
  15906. +}
  15907. +
  15908. +/* cache fulshing support */
  15909. +extern void flush_cache_all(void);
  15910. +
  15911. +/* gunzip declarations */
  15912. +#define STATIC static
  15913. +
  15914. +#ifdef CONFIG_KERNEL_GZIP
  15915. +#include "../../../../lib/decompress_inflate.c"
  15916. +#elif defined(CONFIG_KERNEL_BZIP2)
  15917. +#include "../../../../lib/decompress_bunzip2.c"
  15918. +#elif defined(CONFIG_KERNEL_LZMA)
  15919. +#include "../../../../lib/decompress_unlzma.c"
  15920. +#endif
  15921. +
  15922. +void decompress_kernel(unsigned long load_addr, int num_words,
  15923. + unsigned long cksum, unsigned long *sp)
  15924. +{
  15925. + extern unsigned long start;
  15926. + int zimage_size;
  15927. +
  15928. + initrd_size = (unsigned long)(&__ramdisk_end) -
  15929. + (unsigned long)(&__ramdisk_begin);
  15930. +
  15931. + /*
  15932. + * Reveal where we were loaded at and where we
  15933. + * were relocated to.
  15934. + */
  15935. + puts("loaded at: ");
  15936. + puthex(load_addr);
  15937. + puts(" ");
  15938. + puthex((unsigned long)(load_addr + (4 * num_words)));
  15939. + puts("\n");
  15940. + if ((unsigned long)load_addr != (unsigned long)&start) {
  15941. + puts("relocated to: ");
  15942. + puthex((unsigned long)&start);
  15943. + puts(" ");
  15944. + puthex((unsigned long)((unsigned long)&start +
  15945. + (4 * num_words)));
  15946. + puts("\n");
  15947. + }
  15948. +
  15949. + /*
  15950. + * We link ourself to an arbitrary low address. When we run, we
  15951. + * relocate outself to that address. __image_beign points to
  15952. + * the part of the image where the zImage is. -- Tom
  15953. + */
  15954. + zimage_start = (char *)(unsigned long)(&__image_begin);
  15955. + zimage_size = (unsigned long)(&__image_end) -
  15956. + (unsigned long)(&__image_begin);
  15957. +
  15958. + /*
  15959. + * The zImage and initrd will be between start and _end, so they've
  15960. + * already been moved once. We're good to go now. -- Tom
  15961. + */
  15962. + puts("zimage at: ");
  15963. + puthex((unsigned long)zimage_start);
  15964. + puts(" ");
  15965. + puthex((unsigned long)(zimage_size + zimage_start));
  15966. + puts("\n");
  15967. +
  15968. + if (initrd_size) {
  15969. + puts("initrd at: ");
  15970. + puthex((unsigned long)(&__ramdisk_begin));
  15971. + puts(" ");
  15972. + puthex((unsigned long)(&__ramdisk_end));
  15973. + puts("\n");
  15974. + }
  15975. +
  15976. + /* assume the chunk below 8M is free */
  15977. + free_mem_ptr = FREE_MEM_START;
  15978. + free_mem_end_ptr = FREE_MEM_END;
  15979. +
  15980. + /* Display standard Linux/MIPS boot prompt for kernel args */
  15981. + puts("Uncompressing Linux at load address ");
  15982. + puthex(VMLINUX_LOAD_ADDRESS);
  15983. + puts("\n");
  15984. + /* I don't like this hard coded gunzip size (fixme) */
  15985. + decompress(zimage_start, zimage_size, 0, 0,
  15986. + (void *)VMLINUX_LOAD_ADDRESS, 0, error);
  15987. +#if 1
  15988. + flush_cache_all();
  15989. +#endif
  15990. + puts("Now, booting the kernel...\n");
  15991. +}
  15992. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/dummy.c linux-2.6.30.5/arch/mips/loongson/image/dummy.c
  15993. --- linux-2.6.30.5.orig/arch/mips/loongson/image/dummy.c 1970-01-01 01:00:00.000000000 +0100
  15994. +++ linux-2.6.30.5/arch/mips/loongson/image/dummy.c 2009-08-23 19:01:04.000000000 +0200
  15995. @@ -0,0 +1,4 @@
  15996. +int main(void)
  15997. +{
  15998. + return 0;
  15999. +}
  16000. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/head.S linux-2.6.30.5/arch/mips/loongson/image/head.S
  16001. --- linux-2.6.30.5.orig/arch/mips/loongson/image/head.S 1970-01-01 01:00:00.000000000 +0100
  16002. +++ linux-2.6.30.5/arch/mips/loongson/image/head.S 2009-08-23 19:01:04.000000000 +0200
  16003. @@ -0,0 +1,100 @@
  16004. +/*
  16005. + * arch/mips/kernel/head.S
  16006. + *
  16007. + * This file is subject to the terms and conditions of the GNU General Public
  16008. + * License. See the file "COPYING" in the main directory of this archive
  16009. + * for more details.
  16010. + *
  16011. + * Copyright (C) 1994, 1995 Waldorf Electronics
  16012. + * Written by Ralf Baechle and Andreas Busse
  16013. + * Copyright (C) 1995 - 1999 Ralf Baechle
  16014. + * Copyright (C) 1996 Paul M. Antoine
  16015. + * Modified for DECStation and hence R3000 support by Paul M. Antoine
  16016. + * Further modifications by David S. Miller and Harald Koerfgen
  16017. + * Copyright (C) 1999 Silicon Graphics, Inc.
  16018. + *
  16019. + * Head.S contains the MIPS exception handler and startup code.
  16020. + *
  16021. + **************************************************************************
  16022. + * 9 Nov, 2000.
  16023. + * Added Cache Error exception handler and SBDDP EJTAG debug exception.
  16024. + *
  16025. + * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  16026. + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
  16027. + **************************************************************************
  16028. + */
  16029. +#include <linux/autoconf.h>
  16030. +#include <linux/threads.h>
  16031. +
  16032. +#include <asm/asm.h>
  16033. +#include <asm/cacheops.h>
  16034. +#include <asm/mipsregs.h>
  16035. +#include <asm/asm-offsets.h>
  16036. +#include <asm/cachectl.h>
  16037. +#include <asm/regdef.h>
  16038. +
  16039. +#define IndexInvalidate_I 0x00
  16040. +#define IndexWriteBack_D 0x01
  16041. +
  16042. + .set noreorder
  16043. + .cprestore
  16044. + LEAF(start)
  16045. +start:
  16046. + bal locate
  16047. + nop
  16048. +locate:
  16049. + subu s8, ra, 8 /* Where we were loaded */
  16050. + PTR_LA sp, (.stack + 8192)
  16051. +
  16052. + move s0, a0 /* Save boot rom start args */
  16053. + move s1, a1
  16054. + move s2, a2
  16055. + move s3, a3
  16056. +
  16057. + PTR_LA a0, start /* Where we were linked to run */
  16058. +
  16059. + move a1, s8
  16060. + PTR_LA a2, _edata
  16061. + subu t1, a2, a0
  16062. + srl t1, t1, 2
  16063. +
  16064. + /* copy text section */
  16065. + li t0, 0
  16066. +1: lw v0, 0(a1)
  16067. + nop
  16068. + sw v0, 0(a0)
  16069. + xor t0, t0, v0
  16070. + addu a0, 4
  16071. + bne a2, a0, 1b
  16072. + addu a1, 4
  16073. +
  16074. + /* Clear BSS */
  16075. + PTR_LA a0, _edata
  16076. + PTR_LA a2, _end
  16077. +2: sw zero, 0(a0)
  16078. + bne a2, a0, 2b
  16079. + addu a0, 4
  16080. +
  16081. + move a0, s8 /* load address */
  16082. + move a1, t1 /* length in words */
  16083. + move a2, t0 /* checksum */
  16084. + move a3, sp
  16085. +
  16086. + PTR_LA ra, 1f
  16087. + PTR_LA k0, decompress_kernel
  16088. + jr k0
  16089. + nop
  16090. +1:
  16091. +
  16092. + move a0, s0
  16093. + move a1, s1
  16094. + move a2, s2
  16095. + move a3, s3
  16096. + li k0, KERNEL_ENTRY
  16097. + jr k0
  16098. + nop
  16099. +3:
  16100. + b 3b
  16101. + END(start)
  16102. +
  16103. + .comm .stack,4096*2,4
  16104. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/ld.script linux-2.6.30.5/arch/mips/loongson/image/ld.script
  16105. --- linux-2.6.30.5.orig/arch/mips/loongson/image/ld.script 1970-01-01 01:00:00.000000000 +0100
  16106. +++ linux-2.6.30.5/arch/mips/loongson/image/ld.script 2009-08-23 19:01:04.000000000 +0200
  16107. @@ -0,0 +1,152 @@
  16108. +OUTPUT_ARCH(mips)
  16109. +ENTRY(start)
  16110. +SECTIONS
  16111. +{
  16112. + /* Read-only sections, merged into text segment: */
  16113. + /* . = 0x81000000; */ /* 32bit */
  16114. + /* . = 0xffffffff81000000; */ /* 64bit */
  16115. + .init : { *(.init) } =0
  16116. + .text :
  16117. + {
  16118. + _ftext = . ;
  16119. + *(.text)
  16120. + *(.rodata)
  16121. + *(.rodata1)
  16122. + /* .gnu.warning sections are handled specially by elf32.em. */
  16123. + *(.gnu.warning)
  16124. + } =0
  16125. + .kstrtab : { *(.kstrtab) }
  16126. +
  16127. + . = ALIGN(16); /* Exception table */
  16128. + __start___ex_table = .;
  16129. + __ex_table : { *(__ex_table) }
  16130. + __stop___ex_table = .;
  16131. +
  16132. + __start___dbe_table = .; /* Exception table for data bus errors */
  16133. + __dbe_table : { *(__dbe_table) }
  16134. + __stop___dbe_table = .;
  16135. +
  16136. + __start___ksymtab = .; /* Kernel symbol table */
  16137. + __ksymtab : { *(__ksymtab) }
  16138. + __stop___ksymtab = .;
  16139. +
  16140. + _etext = .;
  16141. +
  16142. + . = ALIGN(8192);
  16143. + .data.init_task : { *(.data.init_task) }
  16144. +
  16145. + /* Startup code */
  16146. + . = ALIGN(4096);
  16147. + __init_begin = .;
  16148. + .text.init : { *(.text.init) }
  16149. + .data.init : { *(.data.init) }
  16150. + . = ALIGN(16);
  16151. + __setup_start = .;
  16152. + .setup.init : { *(.setup.init) }
  16153. + __setup_end = .;
  16154. + __initcall_start = .;
  16155. + .initcall.init : { *(.initcall.init) }
  16156. + __initcall_end = .;
  16157. + . = ALIGN(4096); /* Align double page for init_task_union */
  16158. + __init_end = .;
  16159. +
  16160. + . = ALIGN(4096);
  16161. + .data.page_aligned : { *(.data.idt) }
  16162. +
  16163. + . = ALIGN(32);
  16164. + .data.cacheline_aligned : { *(.data.cacheline_aligned) }
  16165. +
  16166. + .fini : { *(.fini) } =0
  16167. + .reginfo : { *(.reginfo) }
  16168. + /* Adjust the address for the data segment. We want to adjust up to
  16169. + the same address within the page on the next page up. It would
  16170. + be more correct to do this:
  16171. + . = .;
  16172. + The current expression does not correctly handle the case of a
  16173. + text segment ending precisely at the end of a page; it causes the
  16174. + data segment to skip a page. The above expression does not have
  16175. + this problem, but it will currently (2/95) cause BFD to allocate
  16176. + a single segment, combining both text and data, for this case.
  16177. + This will prevent the text segment from being shared among
  16178. + multiple executions of the program; I think that is more
  16179. + important than losing a page of the virtual address space (note
  16180. + that no actual memory is lost; the page which is skipped can not
  16181. + be referenced). */
  16182. + . = .;
  16183. + .data :
  16184. + {
  16185. + _fdata = . ;
  16186. + *(.data)
  16187. +
  16188. + /* Put the compressed image here, so bss is on the end. */
  16189. + __image_begin = .;
  16190. + *(.image)
  16191. + __image_end = .;
  16192. + /* Align the initial ramdisk image (INITRD) on page boundaries. */
  16193. + . = ALIGN(4096);
  16194. + __ramdisk_begin = .;
  16195. + *(.initrd)
  16196. + __ramdisk_end = .;
  16197. + . = ALIGN(4096);
  16198. +
  16199. + CONSTRUCTORS
  16200. + }
  16201. + .data1 : { *(.data1) }
  16202. + _gp = . + 0x8000;
  16203. + .lit8 : { *(.lit8) }
  16204. + .lit4 : { *(.lit4) }
  16205. + .ctors : { *(.ctors) }
  16206. + .dtors : { *(.dtors) }
  16207. + .got : { *(.got.plt) *(.got) }
  16208. + .dynamic : { *(.dynamic) }
  16209. + /* We want the small data sections together, so single-instruction offsets
  16210. + can access them all, and initialized data all before uninitialized, so
  16211. + we can shorten the on-disk segment size. */
  16212. + .sdata : { *(.sdata) }
  16213. + . = ALIGN(4);
  16214. + _edata = .;
  16215. + PROVIDE (edata = .);
  16216. +
  16217. + __bss_start = .;
  16218. + _fbss = .;
  16219. + .sbss : { *(.sbss) *(.scommon) }
  16220. + .bss :
  16221. + {
  16222. + *(.dynbss)
  16223. + *(.bss)
  16224. + *(COMMON)
  16225. + . = ALIGN(4);
  16226. + _end = . ;
  16227. + PROVIDE (end = .);
  16228. + }
  16229. +
  16230. + /* Sections to be discarded */
  16231. + /DISCARD/ :
  16232. + {
  16233. + *(.text.exit)
  16234. + *(.data.exit)
  16235. + *(.exitcall.exit)
  16236. + }
  16237. +
  16238. + /* This is the MIPS specific mdebug section. */
  16239. + .mdebug : { *(.mdebug) }
  16240. + /* These are needed for ELF backends which have not yet been
  16241. + converted to the new style linker. */
  16242. + .stab 0 : { *(.stab) }
  16243. + .stabstr 0 : { *(.stabstr) }
  16244. + /* DWARF debug sections.
  16245. + Symbols in the .debug DWARF section are relative to the beginning of the
  16246. + section so we begin .debug at 0. It's not clear yet what needs to happen
  16247. + for the others. */
  16248. + .debug 0 : { *(.debug) }
  16249. + .debug_srcinfo 0 : { *(.debug_srcinfo) }
  16250. + .debug_aranges 0 : { *(.debug_aranges) }
  16251. + .debug_pubnames 0 : { *(.debug_pubnames) }
  16252. + .debug_sfnames 0 : { *(.debug_sfnames) }
  16253. + .line 0 : { *(.line) }
  16254. + /* These must appear regardless of . */
  16255. + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
  16256. + .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
  16257. + .comment : { *(.comment) }
  16258. + .note : { *(.note) }
  16259. +}
  16260. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/Makefile linux-2.6.30.5/arch/mips/loongson/image/Makefile
  16261. --- linux-2.6.30.5.orig/arch/mips/loongson/image/Makefile 1970-01-01 01:00:00.000000000 +0100
  16262. +++ linux-2.6.30.5/arch/mips/loongson/image/Makefile 2009-08-23 19:01:04.000000000 +0200
  16263. @@ -0,0 +1,61 @@
  16264. +#
  16265. +# arch/mips/zboot/Makefile
  16266. +#
  16267. +# This file is subject to the terms and conditions of the GNU General Public
  16268. +# License. See the file "COPYING" in the main directory of this archive
  16269. +# for more details.
  16270. +
  16271. +# Adapted for MIPS Pete Popov, Dan Malek
  16272. +#
  16273. +# Copyright (C) 1994 by Linus Torvalds
  16274. +# Adapted for PowerPC by Gary Thomas
  16275. +# modified by Cort (cort@cs.nmt.edu)
  16276. +#
  16277. +# Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  16278. +# Author: Wu Zhangjin <wuzj@lemote.com>
  16279. +#
  16280. +
  16281. +# Assume you have at least a 256M memory, this is used in cache.c
  16282. +KBUILD_CFLAGS := $(LINUXINCLUDE) $(KBUILD_CFLAGS) -D__KERNEL__ -DMEM_SIZE_M=256 -DSERIAL_PORT_DEBUG
  16283. +KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
  16284. + -DKERNEL_ENTRY=0x$(shell $(NM) $(objtree)/$(KBUILD_IMAGE) | grep kernel_entry | cut -f1 -d \ )
  16285. +
  16286. +OBJECTS := $(obj)/head.o $(obj)/decompress.o $(obj)/mem.o $(obj)/cache.o $(obj)/dbg.o
  16287. +
  16288. +OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S
  16289. +$(obj)/vmlinux.bin: $(KBUILD_IMAGE)
  16290. + $(call if_changed,objcopy)
  16291. +
  16292. +suffix_$(CONFIG_KERNEL_GZIP) = gz
  16293. +suffix_$(CONFIG_KERNEL_BZIP2) = bz2
  16294. +suffix_$(CONFIG_KERNEL_LZMA) = lzma
  16295. +tool_$(CONFIG_KERNEL_GZIP) = gzip
  16296. +tool_$(CONFIG_KERNEL_BZIP2) = bzip2
  16297. +tool_$(CONFIG_KERNEL_LZMA) = lzma
  16298. +$(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
  16299. + $(call if_changed,$(tool_y))
  16300. +
  16301. +$(obj)/piggy.o: $(obj)/vmlinux.$(suffix_y) $(obj)/dummy.o
  16302. + $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) \
  16303. + --add-section=.image=$< \
  16304. + --set-section-flags=.image=contents,alloc,load,readonly,data \
  16305. + $(obj)/dummy.o $@
  16306. +
  16307. +# The start address of the compressed kernel, Z_KERNEL_START > KERNEL_START + KERNEL_SIZE
  16308. +LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext 0x$(if $(CONFIG_64BIT),ffffffff,)81000000 -T
  16309. +$(obj)/vmlinuz: $(src)/ld.script $(OBJECTS) $(obj)/piggy.o
  16310. + $(call if_changed,ld)
  16311. +
  16312. +OBJCOPYFLAGS_zImage := $(OBJCOPYFLAGS) -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap
  16313. +$(obj)/zImage: $(obj)/vmlinuz
  16314. + $(call if_changed,objcopy)
  16315. +
  16316. +zImage: $(obj)/zImage
  16317. + $(Q)ln -sf $< $(objtree)/vmlinuz
  16318. + $(Q)echo " SYMLINK $(objtree)/"vmlinuz
  16319. +
  16320. +clean:
  16321. +clean-files += *.o \
  16322. + zImage* \
  16323. + vmlinu* \
  16324. + $(objtree)/vmlinuz
  16325. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/image/mem.c linux-2.6.30.5/arch/mips/loongson/image/mem.c
  16326. --- linux-2.6.30.5.orig/arch/mips/loongson/image/mem.c 1970-01-01 01:00:00.000000000 +0100
  16327. +++ linux-2.6.30.5/arch/mips/loongson/image/mem.c 2009-08-23 19:01:04.000000000 +0200
  16328. @@ -0,0 +1,24 @@
  16329. +/* memory opernation support */
  16330. +
  16331. +#include <linux/types.h>
  16332. +
  16333. +void *memset(void *s, int c, size_t n)
  16334. +{
  16335. + int i;
  16336. + char *ss = s;
  16337. +
  16338. + for (i = 0; i < n; i++)
  16339. + ss[i] = c;
  16340. + return s;
  16341. +}
  16342. +
  16343. +void *memcpy(void *dest, const void *src, size_t n)
  16344. +{
  16345. + int i;
  16346. + const char *s = src;
  16347. + char *d = dest;
  16348. +
  16349. + for (i = 0; i < n; i++)
  16350. + d[i] = s[i];
  16351. + return dest;
  16352. +}
  16353. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/Kconfig linux-2.6.30.5/arch/mips/loongson/Kconfig
  16354. --- linux-2.6.30.5.orig/arch/mips/loongson/Kconfig 1970-01-01 01:00:00.000000000 +0100
  16355. +++ linux-2.6.30.5/arch/mips/loongson/Kconfig 2009-08-23 19:01:04.000000000 +0200
  16356. @@ -0,0 +1,136 @@
  16357. +choice
  16358. + prompt "Machine Type"
  16359. + depends on MACH_LOONGSON
  16360. +
  16361. +config LEMOTE_FULOONG2E
  16362. + bool "Lemote Fuloong(2e) mini-PC"
  16363. + select ARCH_SPARSEMEM_ENABLE
  16364. + select CEVT_R4K
  16365. + select CSRC_R4K
  16366. + select SYS_HAS_CPU_LOONGSON2E
  16367. + select DMA_NONCOHERENT
  16368. + select BOOT_ELF32
  16369. + select BOARD_SCACHE
  16370. + select HW_HAS_PCI
  16371. + select I8259
  16372. + select ISA
  16373. + select IRQ_CPU
  16374. + select SYS_SUPPORTS_32BIT_KERNEL
  16375. + select SYS_SUPPORTS_64BIT_KERNEL
  16376. + select SYS_SUPPORTS_LITTLE_ENDIAN
  16377. + select SYS_SUPPORTS_HIGHMEM
  16378. + select SYS_HAS_EARLY_PRINTK
  16379. + select GENERIC_HARDIRQS_NO__DO_IRQ
  16380. + select GENERIC_ISA_DMA_SUPPORT_BROKEN
  16381. + select CPU_HAS_WB
  16382. + help
  16383. + Lemote Fuloong(2e) mini-PC board based on the Chinese Loongson-2E CPU and
  16384. + an FPGA northbridge
  16385. +
  16386. + Lemote Fuloong(2e) mini PC have a VIA686B south bridge.
  16387. +
  16388. +config LEMOTE_FULOONG2F
  16389. + bool "Lemote Fuloong(2f) mini-PC"
  16390. + select ARCH_SPARSEMEM_ENABLE
  16391. + select CEVT_R4K if !CS5536_MFGPT
  16392. + select CSRC_R4K if !CS5536_MFGPT
  16393. + select SYS_HAS_CPU_LOONGSON2F
  16394. + select DMA_NONCOHERENT
  16395. + select BOOT_ELF32
  16396. + select BOARD_SCACHE
  16397. + select HW_HAS_PCI
  16398. + select I8259
  16399. + select ISA
  16400. + select IRQ_CPU
  16401. + select SYS_SUPPORTS_32BIT_KERNEL
  16402. + select SYS_SUPPORTS_64BIT_KERNEL
  16403. + select SYS_SUPPORTS_LITTLE_ENDIAN
  16404. + select SYS_SUPPORTS_HIGHMEM
  16405. + select SYS_HAS_EARLY_PRINTK
  16406. + select GENERIC_HARDIRQS_NO__DO_IRQ
  16407. + select GENERIC_ISA_DMA_SUPPORT_BROKEN
  16408. + select CPU_HAS_WB
  16409. + select CS5536
  16410. + help
  16411. + Lemote Fuloong(2f) mini-PC board based on the Chinese Loongson-2F
  16412. + CPU, which has an internal DDR and PCIX controller. the PCIX
  16413. + controller have the similiar programming interface of the FPGA north
  16414. + bridge of LOONGSON2E.
  16415. +
  16416. + Lemote Fuloong(2f) mini PC have an AMD CS5536 south bridge.
  16417. +
  16418. +config LEMOTE_YEELOONG2F
  16419. + bool "Lemote Yeeloong(2f) mini Notebook"
  16420. + select ARCH_SPARSEMEM_ENABLE
  16421. + select CEVT_R4K if !CS5536_MFGPT
  16422. + select CSRC_R4K if !CS5536_MFGPT
  16423. + select SYS_HAS_CPU_LOONGSON2F
  16424. + select DMA_NONCOHERENT
  16425. + select BOOT_ELF32
  16426. + select BOARD_SCACHE
  16427. + select HW_HAS_PCI
  16428. + select I8259
  16429. + select ISA
  16430. + select IRQ_CPU
  16431. + select SYS_SUPPORTS_32BIT_KERNEL
  16432. + select SYS_SUPPORTS_64BIT_KERNEL
  16433. + select SYS_SUPPORTS_LITTLE_ENDIAN
  16434. + select SYS_SUPPORTS_HIGHMEM
  16435. + select SYS_HAS_EARLY_PRINTK
  16436. + select SYS_HAS_MACH_PROM_INIT_CMDLINE
  16437. + select GENERIC_HARDIRQS_NO__DO_IRQ
  16438. + select GENERIC_ISA_DMA_SUPPORT_BROKEN
  16439. + select EC_KB3310B if PM
  16440. + select CPU_HAS_WB
  16441. + select CS5536
  16442. + help
  16443. + Lemote Laptop based on the Chinese Loongson-2F CPU, which has an
  16444. + internal DDR and PCIX controller. the PCIX controller have the
  16445. + similiar programming interface of the FPGA north bridge of
  16446. + LOONGSON2E.
  16447. +
  16448. + Lemote Yeeloong(2f) laptop have an AMD CS5536 south bridge and an EC
  16449. + controller.
  16450. +
  16451. +endchoice
  16452. +
  16453. +config CS5536
  16454. + bool
  16455. +
  16456. +config CS5536_FLASH
  16457. + bool
  16458. + depends on CS5536
  16459. +
  16460. +config CS5536_NOR_FLASH
  16461. + bool
  16462. + depends on CS5536_FLASH
  16463. +
  16464. +config CS5536_OTG
  16465. + bool
  16466. + depends on CS5536
  16467. +
  16468. +config CS5536_UDC
  16469. + bool
  16470. + depends on CS5536
  16471. +
  16472. +config SYS_HAS_MACH_PROM_INIT_CMDLINE
  16473. + bool
  16474. +
  16475. +config CS5536_MFGPT
  16476. + bool "Using cs5536's MFGPT as system clock"
  16477. + depends on CS5536
  16478. + help
  16479. + This is needed if cpufreq and oprofile is enabled in Loongson2(F)
  16480. + machines
  16481. +
  16482. +config UCA_SIZE
  16483. + hex "Uncache Accelerated Region size"
  16484. + depends on CPU_LOONGSON2F
  16485. + default 0x400000 if LEMOTE_YEELOONG2F
  16486. + default 0x2000000 if LEMOTE_FULOONG2F
  16487. + help
  16488. + Uncached Acceleration(UCA) can greatly improve video performance.
  16489. + Normally the Video memory can be accessed in Uncached Accelerated mode,
  16490. + other peripheral spaces not.
  16491. +
  16492. + Specify a zeroed size to disable this feature.
  16493. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/Makefile linux-2.6.30.5/arch/mips/loongson/Makefile
  16494. --- linux-2.6.30.5.orig/arch/mips/loongson/Makefile 1970-01-01 01:00:00.000000000 +0100
  16495. +++ linux-2.6.30.5/arch/mips/loongson/Makefile 2009-08-23 19:01:04.000000000 +0200
  16496. @@ -0,0 +1,23 @@
  16497. +#
  16498. +# Common code for all Loongson based systems
  16499. +#
  16500. +
  16501. +obj-$(CONFIG_MACH_LOONGSON) += common/
  16502. +
  16503. +#
  16504. +# Lemote Fuloong mini-PC (Loongson 2E-based)
  16505. +#
  16506. +
  16507. +obj-$(CONFIG_LEMOTE_FULOONG2E) += fuloong-2e/
  16508. +
  16509. +#
  16510. +# Lemote Fuloong mini-PC (Loongson 2F-based)
  16511. +#
  16512. +
  16513. +obj-$(CONFIG_LEMOTE_FULOONG2F) += fuloong-2f/
  16514. +
  16515. +#
  16516. +# Lemote Yeeloong mini-PC (Loongson 2F-based)
  16517. +#
  16518. +
  16519. +obj-$(CONFIG_LEMOTE_YEELOONG2F) += yeeloong-2f/
  16520. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/init.c linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/init.c
  16521. --- linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/init.c 1970-01-01 01:00:00.000000000 +0100
  16522. +++ linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/init.c 2009-08-23 19:01:04.000000000 +0200
  16523. @@ -0,0 +1,80 @@
  16524. +/*
  16525. + * board specific init routines
  16526. + *
  16527. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  16528. + * Author: Fuxin Zhang, zhangfx@lemote.com
  16529. + *
  16530. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  16531. + * Author: Wu Zhangjin, wuzj@lemote.com
  16532. + *
  16533. + * This program is free software; you can redistribute it and/or modify it
  16534. + * under the terms of the GNU General Public License as published by the
  16535. + * Free Software Foundation; either version 2 of the License, or (at your
  16536. + * option) any later version.
  16537. + */
  16538. +
  16539. +#include <linux/bootmem.h>
  16540. +
  16541. +#include <asm/bootinfo.h>
  16542. +
  16543. +#include <cs5536/cs5536.h>
  16544. +
  16545. +void __init mach_prom_init_cmdline(void)
  16546. +{
  16547. + /* set lpc irq to quiet mode */
  16548. + _wrmsr(DIVIL_MSR_REG(DIVIL_LEG_IO), 0x00, 0x16000003);
  16549. +
  16550. + /*Emulate post for usb */
  16551. + _wrmsr(USB_MSR_REG(USB_CONFIG), 0x4, 0xBF000);
  16552. +
  16553. + if (strstr(arcs_cmdline, "no_auto_cmd") == NULL) {
  16554. + unsigned char default_root[50] = "/dev/sda1";
  16555. + char *pmon_ver, *ec_ver, *p, version[60], ec_version[64];
  16556. +
  16557. + p = arcs_cmdline;
  16558. +
  16559. + pmon_ver = strstr(arcs_cmdline, "PMON_VER");
  16560. + if (pmon_ver) {
  16561. + p = strstr(pmon_ver, " ");
  16562. + if (p)
  16563. + *p++ = '\0';
  16564. + strncpy(version, pmon_ver, 60);
  16565. + } else
  16566. + strncpy(version, "PMON_VER=Unknown", 60);
  16567. +
  16568. + ec_ver = strstr(p, "EC_VER");
  16569. + if (ec_ver) {
  16570. + p = strstr(ec_ver, " ");
  16571. + if (p)
  16572. + *p = '\0';
  16573. + strncpy(ec_version, ec_ver, 64);
  16574. + } else
  16575. + strncpy(ec_version, "EC_VER=Unknown", 64);
  16576. +
  16577. + p = strstr(arcs_cmdline, "root=");
  16578. + if (p) {
  16579. + strncpy(default_root, p, sizeof(default_root));
  16580. + p = strstr(default_root, " ");
  16581. + if (p)
  16582. + *p = '\0';
  16583. + }
  16584. +
  16585. + memset(arcs_cmdline, 0, sizeof(arcs_cmdline));
  16586. + strcat(arcs_cmdline, version);
  16587. + strcat(arcs_cmdline, " ");
  16588. + strcat(arcs_cmdline, ec_version);
  16589. + strcat(arcs_cmdline, " ");
  16590. + strcat(arcs_cmdline, default_root);
  16591. + strcat(arcs_cmdline, " console=tty");
  16592. + }
  16593. +
  16594. + /*
  16595. + * automatically pass the vga argument via machtype argument if
  16596. + * vga is not passed: yeeloong-7inch's vga mode is 800x480x24
  16597. + */
  16598. +
  16599. + if ((strstr(arcs_cmdline, "vga") == NULL)
  16600. + && (strstr(arcs_cmdline, "machtype") != NULL)
  16601. + && (strstr(arcs_cmdline, "7inch") != NULL))
  16602. + strcat(arcs_cmdline, " vga=800x480x16");
  16603. +}
  16604. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/irq.c linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/irq.c
  16605. --- linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/irq.c 1970-01-01 01:00:00.000000000 +0100
  16606. +++ linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/irq.c 2009-08-23 19:01:04.000000000 +0200
  16607. @@ -0,0 +1,53 @@
  16608. +/*
  16609. + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
  16610. + * Author: Fuxin Zhang, zhangfx@lemote.com
  16611. + *
  16612. + * This program is free software; you can redistribute it and/or modify it
  16613. + * under the terms of the GNU General Public License as published by the
  16614. + * Free Software Foundation; either version 2 of the License, or (at your
  16615. + * option) any later version.
  16616. + */
  16617. +
  16618. +#include <linux/interrupt.h>
  16619. +
  16620. +#include <loongson.h>
  16621. +#include <machine.h>
  16622. +
  16623. +int mach_i8259_irq(void)
  16624. +{
  16625. + int irq, isr, imr;
  16626. +
  16627. + irq = -1;
  16628. +
  16629. + if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) {
  16630. + imr = inb(0x21) | (inb(0xa1) << 8);
  16631. + isr = inb(0x20) | (inb(0xa0) << 8);
  16632. + isr &= ~0x4; /* irq2 for cascade */
  16633. + isr &= ~imr;
  16634. + irq = ffs(isr) - 1;
  16635. + }
  16636. +
  16637. + return irq;
  16638. +}
  16639. +
  16640. +void mach_irq_dispatch(unsigned int pending)
  16641. +{
  16642. + if (pending & CAUSEF_IP7)
  16643. + do_IRQ(LOONGSON_TIMER_IRQ);
  16644. + else if (pending & CAUSEF_IP6) {
  16645. + do_IRQ(LOONGSON_PERFCNT_IRQ); /* Perf counter overflow */
  16646. + bonito_irqdispatch(); /* North Bridge */
  16647. + } else if (pending & CAUSEF_IP3) /* CPU UART */
  16648. + do_IRQ(LOONGSON_UART_IRQ);
  16649. + else if (pending & CAUSEF_IP2) /* South Bridge */
  16650. + i8259_irqdispatch();
  16651. + else
  16652. + spurious_interrupt();
  16653. +}
  16654. +
  16655. +void __init set_irq_trigger_mode(void)
  16656. +{
  16657. + /* setup cs5536 as high level trigger */
  16658. + LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
  16659. + LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
  16660. +}
  16661. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/Makefile linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/Makefile
  16662. --- linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/Makefile 1970-01-01 01:00:00.000000000 +0100
  16663. +++ linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/Makefile 2009-08-23 19:01:04.000000000 +0200
  16664. @@ -0,0 +1,11 @@
  16665. +#
  16666. +# Makefile for fuloong-2f
  16667. +#
  16668. +
  16669. +obj-y += init.o irq.o reset.o
  16670. +
  16671. +#
  16672. +# Power Management Support
  16673. +#
  16674. +
  16675. +obj-$(CONFIG_PM) += pm.o
  16676. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/pm.c linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/pm.c
  16677. --- linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/pm.c 1970-01-01 01:00:00.000000000 +0100
  16678. +++ linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/pm.c 2009-08-23 19:01:04.000000000 +0200
  16679. @@ -0,0 +1,321 @@
  16680. +/*
  16681. + * loongson-specific STR/Standby
  16682. + *
  16683. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  16684. + * Author: Wu Zhangjin <wuzj@lemote.com>
  16685. + *
  16686. + * This program is free software; you can redistribute it and/or modify
  16687. + * it under the terms of the GNU General Public License as published by
  16688. + * the Free Software Foundation; either version 2 of the License, or
  16689. + * (at your option) any later version.
  16690. + */
  16691. +
  16692. +#include <linux/suspend.h>
  16693. +#include <linux/interrupt.h>
  16694. +#include <linux/pm.h>
  16695. +
  16696. +#include <asm/i8259.h>
  16697. +#include <asm/delay.h>
  16698. +#include <asm/mipsregs.h>
  16699. +
  16700. +#include <loongson.h>
  16701. +
  16702. +#ifdef CONFIG_CS5536_MFGPT
  16703. +#include <cs5536/cs5536_mfgpt.h>
  16704. +#endif
  16705. +
  16706. +#include "../../../../drivers/platform/loongson/ec_kb3310b/ec.h"
  16707. +#include "../../../../drivers/platform/loongson/ec_kb3310b/ec_misc_fn.h"
  16708. +
  16709. +/* debug functions */
  16710. +extern void prom_printf(char *fmt, ...);
  16711. +
  16712. +/* i8042 keyboard operations: drivers/input/serio/i8042.c */
  16713. +extern int i8042_enable_kbd_port(void);
  16714. +extern void i8042_flush(void);
  16715. +
  16716. +static unsigned int cached_master_mask; /* i8259A */
  16717. +static unsigned int cached_slave_mask;
  16718. +static unsigned int cached_bonito_irq_mask; /* bonito */
  16719. +
  16720. +void arch_suspend_enable_irqs(void)
  16721. +{
  16722. + /* enable all mips interrupts */
  16723. + local_irq_enable();
  16724. +
  16725. + /* only enable the cached interrupts of i8259A */
  16726. + outb(cached_slave_mask, PIC_SLAVE_IMR);
  16727. + outb(cached_master_mask, PIC_MASTER_IMR);
  16728. +
  16729. + /* enable all cached interrupts of bonito */
  16730. + LOONGSON_INTENSET = cached_bonito_irq_mask;
  16731. + (void)LOONGSON_INTENSET;
  16732. + mmiowb();
  16733. +}
  16734. +
  16735. +void arch_suspend_disable_irqs(void)
  16736. +{
  16737. + /* disable all mips interrupts */
  16738. + local_irq_disable();
  16739. +
  16740. + /* disable all interrupts of i8259A */
  16741. + cached_slave_mask = inb(PIC_SLAVE_IMR);
  16742. + cached_master_mask = inb(PIC_MASTER_IMR);
  16743. +
  16744. + outb(0xff, PIC_SLAVE_IMR);
  16745. + inb(PIC_SLAVE_IMR);
  16746. + outb(0xff, PIC_MASTER_IMR);
  16747. + inb(PIC_MASTER_IMR);
  16748. +
  16749. + /* disable all interrupts of bonito */
  16750. + cached_bonito_irq_mask = LOONGSON_INTEN;
  16751. + LOONGSON_INTENCLR = 0xffff;
  16752. + (void)LOONGSON_INTENCLR;
  16753. + mmiowb();
  16754. +}
  16755. +
  16756. +#define I8042_KBD_IRQ 1
  16757. +#define SCI_IRQ_NUM 0x0A /* system control interface */
  16758. +
  16759. +/* i8042, sci are connnectted to i8259A */
  16760. +static void setup_wakeup_interrupt(void)
  16761. +{
  16762. + int irq_mask;
  16763. +
  16764. + /* open the keyboard irq in i8259A */
  16765. + outb((0xff & ~(1 << I8042_KBD_IRQ)), PIC_MASTER_IMR);
  16766. + irq_mask = inb(PIC_MASTER_IMR);
  16767. + /* enable keyboard port */
  16768. + i8042_enable_kbd_port();
  16769. +
  16770. + /* there is a need to wakeup the cpu via sci interrupt with relative
  16771. + * lid openning event
  16772. + */
  16773. + outb(irq_mask & ~(1 << (SCI_IRQ_NUM - 8)), PIC_MASTER_IMR);
  16774. + inb(PIC_MASTER_IMR);
  16775. + outb(0xff & ~(1 << (SCI_IRQ_NUM - 8)), PIC_SLAVE_IMR);
  16776. + inb(PIC_SLAVE_IMR);
  16777. +}
  16778. +
  16779. +extern int ec_query_seq(unsigned char cmd);
  16780. +extern int sci_get_event_num(void);
  16781. +
  16782. +static int wakeup_loongson(void)
  16783. +{
  16784. + int irq;
  16785. +
  16786. + /* query the interrupt number */
  16787. + irq = mach_i8259_irq();
  16788. + if (irq < 0)
  16789. + return 0;
  16790. + prom_printf("irq = %d\n", irq);
  16791. +
  16792. + if (irq == I8042_KBD_IRQ)
  16793. + return 1;
  16794. + else if (irq == SCI_IRQ_NUM) {
  16795. + int ret, sci_event;
  16796. + /* query the event number */
  16797. + ret = ec_query_seq(CMD_GET_EVENT_NUM);
  16798. + if (ret < 0)
  16799. + return 0;
  16800. + sci_event = sci_get_event_num();
  16801. + prom_printf("sci event = %d\n", sci_event);
  16802. + if (sci_event < 0)
  16803. + return 0;
  16804. + if (sci_event == SCI_EVENT_NUM_LID) {
  16805. + int lid_status;
  16806. + /* check the LID status */
  16807. + lid_status = ec_read(REG_LID_DETECT);
  16808. + prom_printf("lid status = %d\n", lid_status);
  16809. + /* wakeup cpu when people open the LID */
  16810. + if (lid_status == BIT_LID_DETECT_ON)
  16811. + return 1;
  16812. + }
  16813. + }
  16814. + return 0;
  16815. +}
  16816. +
  16817. +static void wait_for_wakeup_events(void)
  16818. +{
  16819. +wait:
  16820. + if (!wakeup_loongson()) {
  16821. + LOONGSON_CHIPCFG0 &= ~0x7;
  16822. + goto wait;
  16823. + }
  16824. +}
  16825. +
  16826. +/* stop all perf counters by default
  16827. + * $24 is the control register of loongson perf counter
  16828. + */
  16829. +static inline void stop_perf_counters(void)
  16830. +{
  16831. + __write_64bit_c0_register($24, 0, 0);
  16832. +}
  16833. +
  16834. +
  16835. +static void loongson_suspend_enter(void)
  16836. +{
  16837. + static unsigned int cached_cpu_freq;
  16838. +
  16839. + prom_printf("suspend: try to setup the wakeup interrupt (keyboard interrupt)\n");
  16840. + setup_wakeup_interrupt();
  16841. +
  16842. + /* stop all perf counters */
  16843. + stop_perf_counters();
  16844. +
  16845. + cached_cpu_freq = LOONGSON_CHIPCFG0;
  16846. +
  16847. + /* handle the old delayed kbd interrupt */
  16848. + LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
  16849. + i8042_flush();
  16850. +
  16851. + /* handle the real wakeup interrupt */
  16852. + LOONGSON_CHIPCFG0 &= ~0x7;
  16853. + mmiowb();
  16854. +
  16855. + /* if the events are really what we want to wakeup cpu, wake up it,
  16856. + * otherwise, we Put CPU into wait mode again.
  16857. + */
  16858. + prom_printf("suspend: here we wait for several events to wake up cpu\n");
  16859. + wait_for_wakeup_events();
  16860. +
  16861. + LOONGSON_CHIPCFG0 = cached_cpu_freq;
  16862. + mmiowb();
  16863. +}
  16864. +
  16865. +static unsigned int cached_camera_status;
  16866. +static unsigned int cached_mute_status;
  16867. +
  16868. +static void mach_suspend(void)
  16869. +{
  16870. + unsigned int value;
  16871. +
  16872. + /* LCD backlight off */
  16873. + ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
  16874. +
  16875. + /* close lcd output */
  16876. + outb(0x31, 0x3c4);
  16877. + value = inb(0x3c5);
  16878. + value = (value & 0xf8) | 0x02;
  16879. + outb(0x31, 0x3c4);
  16880. + outb(value, 0x3c5);
  16881. +
  16882. + /* close vga output */
  16883. + outb(0x21, 0x3c4);
  16884. + value = inb(0x3c5);
  16885. + value |= (1 << 7);
  16886. + outb(0x21, 0x3c4);
  16887. + outb(value, 0x3c5);
  16888. +
  16889. + /* poweroff three usb ports */
  16890. + ec_write(0xf461, 0x00);
  16891. + ec_write(0xf462, 0x00);
  16892. + ec_write(0xf463, 0x00);
  16893. +
  16894. + /* poweroff camera */
  16895. + cached_camera_status = ec_read(REG_CAMERA_STATUS);
  16896. + if (cached_camera_status) {
  16897. + value = ec_read(REG_CAMERA_CONTROL);
  16898. + ec_write(REG_CAMERA_CONTROL, value | (1 << 1));
  16899. + }
  16900. +
  16901. + /* MUTE */
  16902. + cached_mute_status = ec_read(REG_AUDIO_MUTE);
  16903. + ec_write(REG_AUDIO_MUTE, BIT_AUDIO_MUTE_ON);
  16904. +
  16905. + /* minimize the speed of FAN */
  16906. + ec_write(0xf459, 1); /* change the fan to manual mode */
  16907. + ec_write(0xf4cc, 1); /* change the speed to the lowest one, not turn it off */
  16908. +
  16909. +#ifdef CONFIG_CS5536_MFGPT
  16910. + /* stop counting of cs5536 mfgpt timer */
  16911. + outw(inw(MFGPT0_SETUP) | (1 << 11) , MFGPT0_SETUP);
  16912. +#endif
  16913. +}
  16914. +
  16915. +static void mach_resume(void)
  16916. +{
  16917. + unsigned int value;
  16918. +
  16919. + /* LCD backlight on */
  16920. + ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
  16921. +
  16922. + /* open lcd output */
  16923. + outb(0x31, 0x3c4);
  16924. + value = inb(0x3c5);
  16925. + value = (value & 0xf8) | 0x03;
  16926. + outb(0x31, 0x3c4);
  16927. + outb(value, 0x3c5);
  16928. +
  16929. + /* open vga output */
  16930. + outb(0x21, 0x3c4);
  16931. + value = inb(0x3c5);
  16932. + value &= ~(1 << 7);
  16933. + outb(0x21, 0x3c4);
  16934. + outb(value, 0x3c5);
  16935. +
  16936. + /* there is a need to enable the bonito interrupt here to fix the
  16937. + * problem of powering on usb ports */
  16938. + LOONGSON_INTENSET = cached_bonito_irq_mask;
  16939. + (void)LOONGSON_INTENSET;
  16940. + mmiowb();
  16941. + /* power on three usb ports */
  16942. + ec_write(0xf461, 0x01);
  16943. + ec_write(0xf462, 0x01);
  16944. + ec_write(0xf463, 0x01);
  16945. +
  16946. + /* resume camera */
  16947. + ec_write(REG_CAMERA_CONTROL, cached_camera_status);
  16948. +
  16949. + /* resume the status of mute */
  16950. + ec_write(REG_AUDIO_MUTE, cached_mute_status);
  16951. +
  16952. + /* resume FAN */
  16953. + ec_write(0xf459, 0); /* change the fan to auto mode */
  16954. +
  16955. +#ifdef CONFIG_CS5536_MFGPT
  16956. + /* enable counting of cs5536 mfgpt timer */
  16957. + outw(inw(MFGPT0_SETUP) & ~(1 << 11) , MFGPT0_SETUP);
  16958. +#endif
  16959. +}
  16960. +
  16961. +static int loongson_pm_enter(suspend_state_t state)
  16962. +{
  16963. + prom_printf("suspend: try to call mach specific suspend\n");
  16964. + mach_suspend();
  16965. +
  16966. + prom_printf("suspend: Enter into the wait mode of loongson cpu\n");
  16967. + loongson_suspend_enter();
  16968. + prom_printf("resume: waked up from wait mode of loongson cpu\n");
  16969. +
  16970. + mach_resume();
  16971. + prom_printf("resume: return from mach specific resume\n");
  16972. +
  16973. + return 0;
  16974. +}
  16975. +
  16976. +static int loongson_pm_valid_state(suspend_state_t state)
  16977. +{
  16978. + switch (state) {
  16979. + case PM_SUSPEND_ON:
  16980. + case PM_SUSPEND_STANDBY:
  16981. + case PM_SUSPEND_MEM:
  16982. + return 1;
  16983. +
  16984. + default:
  16985. + return 0;
  16986. + }
  16987. +}
  16988. +
  16989. +static struct platform_suspend_ops loongson_pm_ops = {
  16990. + .valid = loongson_pm_valid_state,
  16991. + .enter = loongson_pm_enter,
  16992. +};
  16993. +
  16994. +static int __init loongson_pm_init(void)
  16995. +{
  16996. + suspend_set_ops(&loongson_pm_ops);
  16997. +
  16998. + return 0;
  16999. +}
  17000. +arch_initcall(loongson_pm_init);
  17001. diff -Nur linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/reset.c linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/reset.c
  17002. --- linux-2.6.30.5.orig/arch/mips/loongson/yeeloong-2f/reset.c 1970-01-01 01:00:00.000000000 +0100
  17003. +++ linux-2.6.30.5/arch/mips/loongson/yeeloong-2f/reset.c 2009-08-23 19:01:04.000000000 +0200
  17004. @@ -0,0 +1,91 @@
  17005. +/* Board-specific reboot/shutdown routines
  17006. + * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
  17007. + *
  17008. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  17009. + * Author: Wu Zhangjin, wuzj@lemote.com
  17010. + *
  17011. + * This program is free software; you can redistribute it and/or modify it
  17012. + * under the terms of the GNU General Public License as published by the
  17013. + * Free Software Foundation; either version 2 of the License, or (at your
  17014. + * option) any later version.
  17015. + */
  17016. +
  17017. +#include <linux/types.h>
  17018. +#include <asm/bootinfo.h>
  17019. +
  17020. +#include <loongson.h>
  17021. +#include <machine.h>
  17022. +
  17023. +/*
  17024. + * The following registers are determined by the EC index configuration.
  17025. + * 1, fill the PORT_HIGH as EC register high part.
  17026. + * 2, fill the PORT_LOW as EC register low part.
  17027. + * 3, fill the PORT_DATA as EC register write data or get the data from it.
  17028. + */
  17029. +#define EC_RESET_IO_PORT_HIGH 0x0381
  17030. +#define EC_RESET_IO_PORT_LOW 0x0382
  17031. +#define EC_RESET_IO_PORT_DATA 0x0383
  17032. +#define REG_RESET_HIGH 0xF4 /* reset the machine auto-clear : rd/wr */
  17033. +#define REG_RESET_LOW 0xEC
  17034. +#define BIT_RESET_ON (1 << 0)
  17035. +
  17036. +/* 7inch yeeloong have the different shutdown hardware logic from 8.9inch */
  17037. +#define EC_SHUTDOWN_IO_PORT_HIGH 0xff2d
  17038. +#define EC_SHUTDOWN_IO_PORT_LOW 0xff2e
  17039. +#define EC_SHUTDOWN_IO_PORT_DATA 0xff2f
  17040. +#define REG_SHUTDOWN_HIGH 0xFC
  17041. +#define REG_SHUTDOWN_LOW 0x29
  17042. +#define BIT_SHUTDOWN_ON (1 << 1)
  17043. +
  17044. +void mach_prepare_reboot(void)
  17045. +{
  17046. + /*
  17047. + * reset cpu to full speed, this is needed when enabling cpu frequency
  17048. + * scalling
  17049. + */
  17050. + LOONGSON_CHIPCFG0 |= 0x7;
  17051. +
  17052. + /* sending an reset signal to EC(embedded controller) */
  17053. + writeb(REG_RESET_HIGH,
  17054. + (u8 *) (mips_io_port_base + EC_RESET_IO_PORT_HIGH));
  17055. + writeb(REG_RESET_LOW,
  17056. + (u8 *) (mips_io_port_base + EC_RESET_IO_PORT_LOW));
  17057. + mmiowb();
  17058. + writeb(BIT_RESET_ON,
  17059. + (u8 *) (mips_io_port_base + EC_RESET_IO_PORT_DATA));
  17060. + mmiowb();
  17061. +}
  17062. +
  17063. +void mach_prepare_shutdown(void)
  17064. +{
  17065. + const char *system_type = get_system_type();
  17066. +
  17067. + if (strstr(system_type, "8.9inch") != NULL) {
  17068. + /* cpu-gpio0 output low */
  17069. + LOONGSON_GPIODATA &= ~0x00000001;
  17070. + /* cpu-gpio0 as output */
  17071. + LOONGSON_GPIOIE &= ~0x00000001;
  17072. + } else if (strstr(system_type, "7inch") != NULL) {
  17073. + u8 val;
  17074. + u64 i;
  17075. +
  17076. + writeb(REG_SHUTDOWN_HIGH,
  17077. + (u8 *) (mips_io_port_base + EC_SHUTDOWN_IO_PORT_HIGH));
  17078. + writeb(REG_SHUTDOWN_LOW,
  17079. + (u8 *) (mips_io_port_base + EC_SHUTDOWN_IO_PORT_LOW));
  17080. + mmiowb();
  17081. + val =
  17082. + readb((u8 *) (mips_io_port_base +
  17083. + EC_SHUTDOWN_IO_PORT_DATA));
  17084. + writeb(val & (~BIT_SHUTDOWN_ON),
  17085. + (u8 *) (mips_io_port_base + EC_SHUTDOWN_IO_PORT_DATA));
  17086. + mmiowb();
  17087. + /* need enough wait here... how many microseconds needs? */
  17088. + for (i = 0; i < 0x10000; i++)
  17089. + delay();
  17090. + writeb(val | BIT_SHUTDOWN_ON,
  17091. + (u8 *) (mips_io_port_base + EC_SHUTDOWN_IO_PORT_DATA));
  17092. + mmiowb();
  17093. + } else
  17094. + printk(KERN_INFO "you can shutdown the power safely now!\n");
  17095. +}
  17096. diff -Nur linux-2.6.30.5.orig/arch/mips/Makefile linux-2.6.30.5/arch/mips/Makefile
  17097. --- linux-2.6.30.5.orig/arch/mips/Makefile 2009-08-16 23:19:38.000000000 +0200
  17098. +++ linux-2.6.30.5/arch/mips/Makefile 2009-08-23 20:58:41.000000000 +0200
  17099. @@ -120,7 +120,14 @@
  17100. cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
  17101. cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
  17102. cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
  17103. -cflags-$(CONFIG_CPU_LOONGSON2) += -march=r4600 -Wa,--trap
  17104. +
  17105. +# only gcc >= 4.4 have the loongson-specific support
  17106. +cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
  17107. +cflags-$(CONFIG_CPU_LOONGSON2E) += \
  17108. + $(call cc-option,-march=loongson2e,-march=r4600)
  17109. +cflags-$(CONFIG_CPU_LOONGSON2F) += \
  17110. + $(call cc-option,-march=loongson2f,-march=r4600)
  17111. +
  17112. cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
  17113. -Wa,-mips32 -Wa,--trap
  17114. cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
  17115. @@ -305,11 +312,15 @@
  17116. load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
  17117. #
  17118. -# lemote fulong mini-PC board
  17119. +# loongson family machines
  17120. #
  17121. -core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
  17122. -load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
  17123. -cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote
  17124. +all-$(CONFIG_MACH_LOONGSON) += zImage
  17125. +core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/
  17126. +cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \
  17127. + -mno-branch-likely
  17128. +load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
  17129. +load-$(CONFIG_LEMOTE_FULOONG2F) +=0xffffffff80200000
  17130. +load-$(CONFIG_LEMOTE_YEELOONG2F) +=0xffffffff80200000
  17131. #
  17132. # MIPS Malta board
  17133. @@ -675,11 +686,19 @@
  17134. drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
  17135. +# suspend and hibernation support
  17136. +drivers-$(CONFIG_PM) += arch/mips/power/
  17137. +
  17138. ifdef CONFIG_LASAT
  17139. rom.bin rom.sw: vmlinux
  17140. $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
  17141. endif
  17142. +ifdef CONFIG_MACH_LOONGSON
  17143. +zImage: vmlinux
  17144. + $(Q)$(MAKE) $(build)=arch/mips/loongson/image $@
  17145. +endif
  17146. +
  17147. #
  17148. # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
  17149. # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
  17150. @@ -728,6 +747,7 @@
  17151. archclean:
  17152. @$(MAKE) $(clean)=arch/mips/boot
  17153. + @$(MAKE) $(clean)=arch/mips/loongson/image
  17154. @$(MAKE) $(clean)=arch/mips/lasat
  17155. define archhelp
  17156. diff -Nur linux-2.6.30.5.orig/arch/mips/mm/uasm.c linux-2.6.30.5/arch/mips/mm/uasm.c
  17157. --- linux-2.6.30.5.orig/arch/mips/mm/uasm.c 2009-08-16 23:19:38.000000000 +0200
  17158. +++ linux-2.6.30.5/arch/mips/mm/uasm.c 2009-08-23 19:01:04.000000000 +0200
  17159. @@ -15,6 +15,7 @@
  17160. #include <linux/kernel.h>
  17161. #include <linux/types.h>
  17162. #include <linux/init.h>
  17163. +#include <linux/string.h>
  17164. #include <asm/inst.h>
  17165. #include <asm/elf.h>
  17166. diff -Nur linux-2.6.30.5.orig/arch/mips/oprofile/common.c linux-2.6.30.5/arch/mips/oprofile/common.c
  17167. --- linux-2.6.30.5.orig/arch/mips/oprofile/common.c 2009-08-16 23:19:38.000000000 +0200
  17168. +++ linux-2.6.30.5/arch/mips/oprofile/common.c 2009-08-23 19:01:04.000000000 +0200
  17169. @@ -16,6 +16,7 @@
  17170. extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
  17171. extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
  17172. +extern struct op_mips_model op_model_loongson2_ops __attribute__((weak));
  17173. static struct op_mips_model *model;
  17174. @@ -93,6 +94,10 @@
  17175. case CPU_RM9000:
  17176. lmodel = &op_model_rm9000_ops;
  17177. break;
  17178. +
  17179. + case CPU_LOONGSON2:
  17180. + lmodel = &op_model_loongson2_ops;
  17181. + break;
  17182. };
  17183. if (!lmodel)
  17184. diff -Nur linux-2.6.30.5.orig/arch/mips/oprofile/Makefile linux-2.6.30.5/arch/mips/oprofile/Makefile
  17185. --- linux-2.6.30.5.orig/arch/mips/oprofile/Makefile 2009-08-16 23:19:38.000000000 +0200
  17186. +++ linux-2.6.30.5/arch/mips/oprofile/Makefile 2009-08-23 19:01:04.000000000 +0200
  17187. @@ -15,3 +15,4 @@
  17188. oprofile-$(CONFIG_CPU_R10000) += op_model_mipsxx.o
  17189. oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o
  17190. oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o
  17191. +oprofile-$(CONFIG_CPU_LOONGSON2) += op_model_loongson2.o
  17192. diff -Nur linux-2.6.30.5.orig/arch/mips/oprofile/op_model_loongson2.c linux-2.6.30.5/arch/mips/oprofile/op_model_loongson2.c
  17193. --- linux-2.6.30.5.orig/arch/mips/oprofile/op_model_loongson2.c 1970-01-01 01:00:00.000000000 +0100
  17194. +++ linux-2.6.30.5/arch/mips/oprofile/op_model_loongson2.c 2009-08-23 19:01:04.000000000 +0200
  17195. @@ -0,0 +1,186 @@
  17196. +/*
  17197. + * Loongson2 performance counter driver for oprofile
  17198. + *
  17199. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  17200. + * Author: Yanhua <yanh@lemote.com>
  17201. + *
  17202. + * This file is subject to the terms and conditions of the GNU General Public
  17203. + * License. See the file "COPYING" in the main directory of this archive
  17204. + * for more details.
  17205. + *
  17206. + */
  17207. +#include <linux/init.h>
  17208. +#include <linux/oprofile.h>
  17209. +#include <linux/interrupt.h>
  17210. +#include <linux/smp.h>
  17211. +#include <linux/spinlock.h>
  17212. +#include <linux/proc_fs.h>
  17213. +#include <linux/uaccess.h>
  17214. +
  17215. +#include <irq.h>
  17216. +#include <loongson.h> /* LOONGSON_PERFCNT_IRQ */
  17217. +#include "op_impl.h"
  17218. +
  17219. +/*
  17220. + * a patch should be sent to oprofile with the loongson-specific support.
  17221. + * otherwise, the oprofile tool will not recognize this and complain about
  17222. + * "cpu_type 'unset' is not valid".
  17223. + */
  17224. +#define LOONGSON_CPU_TYPE "mips/loongson2"
  17225. +
  17226. +#define LOONGSON_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
  17227. +#define LOONGSON_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
  17228. +
  17229. +#define LOONGSON_PERFCNT_EXL (1UL << 0)
  17230. +#define LOONGSON_PERFCNT_KERNEL (1UL << 1)
  17231. +#define LOONGSON_PERFCNT_SUPERVISOR (1UL << 2)
  17232. +#define LOONGSON_PERFCNT_USER (1UL << 3)
  17233. +#define LOONGSON_PERFCNT_INT_EN (1UL << 4)
  17234. +#define LOONGSON_PERFCNT_OVERFLOW (1ULL << 31)
  17235. +
  17236. +/* Loongson2 performance counter register */
  17237. +#define read_c0_perflo() __read_64bit_c0_register($24, 0)
  17238. +#define write_c0_perflo(val) __write_64bit_c0_register($24, 0, val)
  17239. +#define read_c0_perfhi() __read_64bit_c0_register($25, 0)
  17240. +#define write_c0_perfhi(val) __write_64bit_c0_register($25, 0, val)
  17241. +
  17242. +static struct loongson2_register_config {
  17243. + unsigned int ctrl;
  17244. + unsigned long long reset_counter1;
  17245. + unsigned long long reset_counter2;
  17246. + int cnt1_enable, cnt2_enable;
  17247. +} reg;
  17248. +
  17249. +DEFINE_SPINLOCK(sample_lock);
  17250. +
  17251. +static char *oprofid = "LoongsonPerf";
  17252. +static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
  17253. +/* Compute all of the registers in preparation for enabling profiling. */
  17254. +
  17255. +static void loongson2_reg_setup(struct op_counter_config *cfg)
  17256. +{
  17257. + unsigned int ctrl = 0;
  17258. +
  17259. + reg.reset_counter1 = 0;
  17260. + reg.reset_counter2 = 0;
  17261. + /* Compute the performance counter ctrl word. */
  17262. + /* For now count kernel and user mode */
  17263. + if (cfg[0].enabled) {
  17264. + ctrl |= LOONGSON_COUNTER1_EVENT(cfg[0].event) |
  17265. + LOONGSON_PERFCNT_INT_EN;
  17266. + if (cfg[0].kernel)
  17267. + ctrl |= LOONGSON_PERFCNT_KERNEL;
  17268. + if (cfg[0].user)
  17269. + ctrl |= LOONGSON_PERFCNT_USER;
  17270. + reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
  17271. + }
  17272. +
  17273. + if (cfg[1].enabled) {
  17274. + ctrl |= LOONGSON_COUNTER2_EVENT(cfg[1].event) |
  17275. + LOONGSON_PERFCNT_INT_EN;
  17276. + if (cfg[1].kernel)
  17277. + ctrl |= LOONGSON_PERFCNT_KERNEL;
  17278. + if (cfg[1].user)
  17279. + ctrl |= LOONGSON_PERFCNT_USER;
  17280. + reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
  17281. + }
  17282. +
  17283. + if (cfg[0].enabled || cfg[1].enabled)
  17284. + ctrl |= LOONGSON_PERFCNT_EXL;
  17285. +
  17286. + reg.ctrl = ctrl;
  17287. +
  17288. + reg.cnt1_enable = cfg[0].enabled;
  17289. + reg.cnt2_enable = cfg[1].enabled;
  17290. +
  17291. +}
  17292. +
  17293. +/* Program all of the registers in preparation for enabling profiling. */
  17294. +
  17295. +static void loongson2_cpu_setup(void *args)
  17296. +{
  17297. + uint64_t perfcount;
  17298. +
  17299. + perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
  17300. + write_c0_perfhi(perfcount);
  17301. +}
  17302. +
  17303. +static void loongson2_cpu_start(void *args)
  17304. +{
  17305. + /* Start all counters on current CPU */
  17306. + if (reg.cnt1_enable || reg.cnt2_enable)
  17307. + write_c0_perflo(reg.ctrl);
  17308. +}
  17309. +
  17310. +static void loongson2_cpu_stop(void *args)
  17311. +{
  17312. + /* Stop all counters on current CPU */
  17313. + write_c0_perflo(0);
  17314. + memset(&reg, 0, sizeof(reg));
  17315. +}
  17316. +
  17317. +static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
  17318. +{
  17319. + uint64_t counter, counter1, counter2;
  17320. + struct pt_regs *regs = get_irq_regs();
  17321. + int enabled;
  17322. + unsigned long flags;
  17323. +
  17324. + /*
  17325. + * LOONGSON2 defines two 32-bit performance counters.
  17326. + * To avoid a race updating the registers we need to stop the counters
  17327. + * while we're messing with
  17328. + * them ...
  17329. + */
  17330. +
  17331. + /* Check whether the irq belongs to me */
  17332. + enabled = reg.cnt1_enable | reg.cnt2_enable;
  17333. + if (!enabled)
  17334. + return IRQ_NONE;
  17335. +
  17336. + counter = read_c0_perfhi();
  17337. + counter1 = counter & 0xffffffff;
  17338. + counter2 = counter >> 32;
  17339. +
  17340. + spin_lock_irqsave(&sample_lock, flags);
  17341. +
  17342. + if (counter1 & LOONGSON_PERFCNT_OVERFLOW) {
  17343. + if (reg.cnt1_enable)
  17344. + oprofile_add_sample(regs, 0);
  17345. + counter1 = reg.reset_counter1;
  17346. + }
  17347. + if (counter2 & LOONGSON_PERFCNT_OVERFLOW) {
  17348. + if (reg.cnt2_enable)
  17349. + oprofile_add_sample(regs, 1);
  17350. + counter2 = reg.reset_counter2;
  17351. + }
  17352. +
  17353. + spin_unlock_irqrestore(&sample_lock, flags);
  17354. +
  17355. + write_c0_perfhi((counter2 << 32) | counter1);
  17356. +
  17357. + return IRQ_HANDLED;
  17358. +}
  17359. +
  17360. +static int __init loongson2_init(void)
  17361. +{
  17362. + return request_irq(LOONGSON_PERFCNT_IRQ, loongson2_perfcount_handler,
  17363. + IRQF_SHARED, "Perfcounter", oprofid);
  17364. +}
  17365. +
  17366. +static void loongson2_exit(void)
  17367. +{
  17368. + write_c0_perflo(0);
  17369. + free_irq(LOONGSON_PERFCNT_IRQ, oprofid);
  17370. +}
  17371. +
  17372. +struct op_mips_model op_model_loongson2_ops = {
  17373. + .reg_setup = loongson2_reg_setup,
  17374. + .cpu_setup = loongson2_cpu_setup,
  17375. + .init = loongson2_init,
  17376. + .exit = loongson2_exit,
  17377. + .cpu_start = loongson2_cpu_start,
  17378. + .cpu_stop = loongson2_cpu_stop,
  17379. + .cpu_type = LOONGSON_CPU_TYPE,
  17380. + .num_counters = 2
  17381. +};
  17382. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/fixup-fuloong2e.c linux-2.6.30.5/arch/mips/pci/fixup-fuloong2e.c
  17383. --- linux-2.6.30.5.orig/arch/mips/pci/fixup-fuloong2e.c 1970-01-01 01:00:00.000000000 +0100
  17384. +++ linux-2.6.30.5/arch/mips/pci/fixup-fuloong2e.c 2009-08-23 19:01:04.000000000 +0200
  17385. @@ -0,0 +1,243 @@
  17386. +/*
  17387. + * fixup-fuloong2e.c
  17388. + *
  17389. + * Copyright (C) 2004 ICT CAS
  17390. + * Author: Li xiaoyu, ICT CAS
  17391. + * lixy@ict.ac.cn
  17392. + *
  17393. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  17394. + * Author: Fuxin Zhang, zhangfx@lemote.com
  17395. + *
  17396. + * This program is free software; you can redistribute it and/or modify it
  17397. + * under the terms of the GNU General Public License as published by the
  17398. + * Free Software Foundation; either version 2 of the License, or (at your
  17399. + * option) any later version.
  17400. + *
  17401. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17402. + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  17403. + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17404. + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17405. + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17406. + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  17407. + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17408. + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  17409. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  17410. + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  17411. + *
  17412. + * You should have received a copy of the GNU General Public License along
  17413. + * with this program; if not, write to the Free Software Foundation, Inc.,
  17414. + * 675 Mass Ave, Cambridge, MA 02139, USA.
  17415. + *
  17416. + */
  17417. +#include <linux/init.h>
  17418. +#include <linux/pci.h>
  17419. +
  17420. +#include <loongson.h>
  17421. +
  17422. +/* South bridge slot number is set by the pci probe process */
  17423. +static u8 sb_slot = 5;
  17424. +
  17425. +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  17426. +{
  17427. + int irq = 0;
  17428. +
  17429. + if (slot == sb_slot) {
  17430. + switch (PCI_FUNC(dev->devfn)) {
  17431. + case 2:
  17432. + irq = 10;
  17433. + break;
  17434. + case 3:
  17435. + irq = 11;
  17436. + break;
  17437. + case 5:
  17438. + irq = 9;
  17439. + break;
  17440. + }
  17441. + } else {
  17442. + irq = LOONGSON_IRQ_BASE + 25 + pin;
  17443. + }
  17444. + return irq;
  17445. +
  17446. +}
  17447. +
  17448. +/* Do platform specific device initialization at pci_enable_device() time */
  17449. +int pcibios_plat_dev_init(struct pci_dev *dev)
  17450. +{
  17451. + return 0;
  17452. +}
  17453. +
  17454. +static void __init fuloong2e_nec_fixup(struct pci_dev *pdev)
  17455. +{
  17456. + unsigned int val;
  17457. +
  17458. + /* Configues port 1, 2, 3, 4 to be validate*/
  17459. + pci_read_config_dword(pdev, 0xe0, &val);
  17460. + pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
  17461. +
  17462. + /* System clock is 48-MHz Oscillator. */
  17463. + pci_write_config_dword(pdev, 0xe4, 1 << 5);
  17464. +}
  17465. +
  17466. +static void __init fuloong2e_686b_func0_fixup(struct pci_dev *pdev)
  17467. +{
  17468. + unsigned char c;
  17469. +
  17470. + sb_slot = PCI_SLOT(pdev->devfn);
  17471. +
  17472. + printk(KERN_INFO "via686b fix: ISA bridge\n");
  17473. +
  17474. + /* Enable I/O Recovery time */
  17475. + pci_write_config_byte(pdev, 0x40, 0x08);
  17476. +
  17477. + /* Enable ISA refresh */
  17478. + pci_write_config_byte(pdev, 0x41, 0x01);
  17479. +
  17480. + /* disable ISA line buffer */
  17481. + pci_write_config_byte(pdev, 0x45, 0x00);
  17482. +
  17483. + /* Gate INTR, and flush line buffer */
  17484. + pci_write_config_byte(pdev, 0x46, 0xe0);
  17485. +
  17486. + /* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
  17487. + /* pci_write_config_byte(pdev, 0x47, 0x20); */
  17488. +
  17489. + /*
  17490. + * enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
  17491. + * enable time-out timer
  17492. + */
  17493. + pci_write_config_byte(pdev, 0x47, 0xe6);
  17494. +
  17495. + /*
  17496. + * enable level trigger on pci irqs: 9,10,11,13
  17497. + * important! without this PCI interrupts won't work
  17498. + */
  17499. + outb(0x2e, 0x4d1);
  17500. +
  17501. + /* 512 K PCI Decode */
  17502. + pci_write_config_byte(pdev, 0x48, 0x01);
  17503. +
  17504. + /* Wait for PGNT before grant to ISA Master/DMA */
  17505. + pci_write_config_byte(pdev, 0x4a, 0x84);
  17506. +
  17507. + /*
  17508. + * Plug'n'Play
  17509. + *
  17510. + * Parallel DRQ 3, Floppy DRQ 2 (default)
  17511. + */
  17512. + pci_write_config_byte(pdev, 0x50, 0x0e);
  17513. +
  17514. + /*
  17515. + * IRQ Routing for Floppy and Parallel port
  17516. + *
  17517. + * IRQ 6 for floppy, IRQ 7 for parallel port
  17518. + */
  17519. + pci_write_config_byte(pdev, 0x51, 0x76);
  17520. +
  17521. + /* IRQ Routing for serial ports (take IRQ 3 and 4) */
  17522. + pci_write_config_byte(pdev, 0x52, 0x34);
  17523. +
  17524. + /* All IRQ's level triggered. */
  17525. + pci_write_config_byte(pdev, 0x54, 0x00);
  17526. +
  17527. + /* route PIRQA-D irq */
  17528. + pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */
  17529. + pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; */
  17530. + /* 3-0, PIRQB */
  17531. + pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */
  17532. +
  17533. + /* enable function 5/6, audio/modem */
  17534. + pci_read_config_byte(pdev, 0x85, &c);
  17535. + c &= ~(0x3 << 2);
  17536. + pci_write_config_byte(pdev, 0x85, c);
  17537. +
  17538. + printk(KERN_INFO"via686b fix: ISA bridge done\n");
  17539. +}
  17540. +
  17541. +static void __init fuloong2e_686b_func1_fixup(struct pci_dev *pdev)
  17542. +{
  17543. + printk(KERN_INFO"via686b fix: IDE\n");
  17544. +
  17545. + /* Modify IDE controller setup */
  17546. + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
  17547. + pci_write_config_byte(pdev, PCI_COMMAND,
  17548. + PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
  17549. + PCI_COMMAND_MASTER);
  17550. + pci_write_config_byte(pdev, 0x40, 0x0b);
  17551. + /* legacy mode */
  17552. + pci_write_config_byte(pdev, 0x42, 0x09);
  17553. +
  17554. +#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
  17555. + /* disable read prefetch/write post buffers */
  17556. + pci_write_config_byte(pdev, 0x41, 0x02);
  17557. +
  17558. + /* use 3/4 as fifo thresh hold */
  17559. + pci_write_config_byte(pdev, 0x43, 0x0a);
  17560. + pci_write_config_byte(pdev, 0x44, 0x00);
  17561. +
  17562. + pci_write_config_byte(pdev, 0x45, 0x00);
  17563. +#else
  17564. + pci_write_config_byte(pdev, 0x41, 0xc2);
  17565. + pci_write_config_byte(pdev, 0x43, 0x35);
  17566. + pci_write_config_byte(pdev, 0x44, 0x1c);
  17567. +
  17568. + pci_write_config_byte(pdev, 0x45, 0x10);
  17569. +#endif
  17570. +
  17571. + printk(KERN_INFO"via686b fix: IDE done\n");
  17572. +}
  17573. +
  17574. +static void __init fuloong2e_686b_func2_fixup(struct pci_dev *pdev)
  17575. +{
  17576. + /* irq routing */
  17577. + pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
  17578. +}
  17579. +
  17580. +static void __init fuloong2e_686b_func3_fixup(struct pci_dev *pdev)
  17581. +{
  17582. + /* irq routing */
  17583. + pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
  17584. +}
  17585. +
  17586. +static void __init fuloong2e_686b_func5_fixup(struct pci_dev *pdev)
  17587. +{
  17588. + unsigned int val;
  17589. + unsigned char c;
  17590. +
  17591. + /* enable IO */
  17592. + pci_write_config_byte(pdev, PCI_COMMAND,
  17593. + PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
  17594. + PCI_COMMAND_MASTER);
  17595. + pci_read_config_dword(pdev, 0x4, &val);
  17596. + pci_write_config_dword(pdev, 0x4, val | 1);
  17597. +
  17598. + /* route ac97 IRQ */
  17599. + pci_write_config_byte(pdev, 0x3c, 9);
  17600. +
  17601. + pci_read_config_byte(pdev, 0x8, &c);
  17602. +
  17603. + /* link control: enable link & SGD PCM output */
  17604. + pci_write_config_byte(pdev, 0x41, 0xcc);
  17605. +
  17606. + /* disable game port, FM, midi, sb, enable write to reg2c-2f */
  17607. + pci_write_config_byte(pdev, 0x42, 0x20);
  17608. +
  17609. + /* we are using Avance logic codec */
  17610. + pci_write_config_word(pdev, 0x2c, 0x1005);
  17611. + pci_write_config_word(pdev, 0x2e, 0x4710);
  17612. + pci_read_config_dword(pdev, 0x2c, &val);
  17613. +
  17614. + pci_write_config_byte(pdev, 0x42, 0x0);
  17615. +}
  17616. +
  17617. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
  17618. + fuloong2e_686b_func0_fixup);
  17619. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
  17620. + fuloong2e_686b_func1_fixup);
  17621. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
  17622. + fuloong2e_686b_func2_fixup);
  17623. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
  17624. + fuloong2e_686b_func3_fixup);
  17625. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
  17626. + fuloong2e_686b_func5_fixup);
  17627. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
  17628. + fuloong2e_nec_fixup);
  17629. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/fixup-lemote2f.c linux-2.6.30.5/arch/mips/pci/fixup-lemote2f.c
  17630. --- linux-2.6.30.5.orig/arch/mips/pci/fixup-lemote2f.c 1970-01-01 01:00:00.000000000 +0100
  17631. +++ linux-2.6.30.5/arch/mips/pci/fixup-lemote2f.c 2009-08-23 19:01:04.000000000 +0200
  17632. @@ -0,0 +1,171 @@
  17633. +/*
  17634. + * Copyright (C) 2008 Lemote Technology
  17635. + * Copyright (C) 2004 ICT CAS
  17636. + * Author: Li xiaoyu, lixy@ict.ac.cn
  17637. + *
  17638. + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  17639. + * Author: Fuxin Zhang, zhangfx@lemote.com
  17640. + *
  17641. + * This program is free software; you can redistribute it and/or modify it
  17642. + * under the terms of the GNU General Public License as published by the
  17643. + * Free Software Foundation; either version 2 of the License, or (at your
  17644. + * option) any later version.
  17645. + */
  17646. +#include <linux/init.h>
  17647. +#include <linux/pci.h>
  17648. +
  17649. +#include <loongson.h>
  17650. +#include <cs5536/cs5536.h>
  17651. +#include <cs5536/cs5536_pci.h>
  17652. +
  17653. +/* PCI interrupt pins
  17654. + *
  17655. + * These should not be changed, or you should consider loongson2f interrupt
  17656. + * register and your pci card dispatch
  17657. + */
  17658. +
  17659. +#define PCIA 4
  17660. +#define PCIB 5
  17661. +#define PCIC 6
  17662. +#define PCID 7
  17663. +
  17664. +/* all the pci device has the PCIA pin, check the datasheet. */
  17665. +static char irq_tab[][5] __initdata = {
  17666. + /* INTA INTB INTC INTD */
  17667. + {0, 0, 0, 0, 0}, /* 11: Unused */
  17668. + {0, 0, 0, 0, 0}, /* 12: Unused */
  17669. + {0, 0, 0, 0, 0}, /* 13: Unused */
  17670. + {0, 0, 0, 0, 0}, /* 14: Unused */
  17671. + {0, 0, 0, 0, 0}, /* 15: Unused */
  17672. + {0, 0, 0, 0, 0}, /* 16: Unused */
  17673. + {0, PCIA, 0, 0, 0}, /* 17: RTL8110-0 */
  17674. + {0, PCIB, 0, 0, 0}, /* 18: RTL8110-1 */
  17675. + {0, PCIC, 0, 0, 0}, /* 19: SiI3114 */
  17676. + {0, PCID, 0, 0, 0}, /* 20: 3-ports nec usb */
  17677. + {0, PCIA, PCIB, PCIC, PCID}, /* 21: PCI-SLOT */
  17678. + {0, 0, 0, 0, 0}, /* 22: Unused */
  17679. + {0, 0, 0, 0, 0}, /* 23: Unused */
  17680. + {0, 0, 0, 0, 0}, /* 24: Unused */
  17681. + {0, 0, 0, 0, 0}, /* 25: Unused */
  17682. + {0, 0, 0, 0, 0}, /* 26: Unused */
  17683. + {0, 0, 0, 0, 0}, /* 27: Unused */
  17684. +};
  17685. +
  17686. +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  17687. +{
  17688. + int virq;
  17689. +
  17690. + if ((PCI_SLOT(dev->devfn) != PCI_IDSEL_CS5536)
  17691. + && (PCI_SLOT(dev->devfn) < 32)) {
  17692. + virq = irq_tab[slot][pin];
  17693. + printk(KERN_INFO "slot: %d, pin: %d, irq: %d\n", slot, pin,
  17694. + virq + LOONGSON_IRQ_BASE);
  17695. + if (virq != 0)
  17696. + return LOONGSON_IRQ_BASE + virq;
  17697. + else
  17698. + return 0;
  17699. + } else if (PCI_SLOT(dev->devfn) == PCI_IDSEL_CS5536) { /* cs5536 */
  17700. + switch (PCI_FUNC(dev->devfn)) {
  17701. + case 2:
  17702. + pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
  17703. + CS5536_IDE_INTR);
  17704. + return 14; /* for IDE */
  17705. + case 3:
  17706. + pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
  17707. + CS5536_ACC_INTR);
  17708. + return 9; /* for AUDIO */
  17709. + case 4: /* for OHCI */
  17710. + case 5: /* for EHCI */
  17711. + case 6: /* for UDC */
  17712. + case 7: /* for OTG */
  17713. + pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
  17714. + CS5536_USB_INTR);
  17715. + return 11;
  17716. + }
  17717. + return dev->irq;
  17718. + } else {
  17719. + printk(KERN_INFO " strange pci slot number.\n");
  17720. + return 0;
  17721. + }
  17722. +}
  17723. +
  17724. +/* Do platform specific device initialization at pci_enable_device() time */
  17725. +int pcibios_plat_dev_init(struct pci_dev *dev)
  17726. +{
  17727. + return 0;
  17728. +}
  17729. +
  17730. +/* CS5536 SPEC. fixup */
  17731. +static void __init loongson_cs5536_isa_fixup(struct pci_dev *pdev)
  17732. +{
  17733. + /* the uart1 and uart2 interrupt in PIC is enabled as default */
  17734. + pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1);
  17735. + pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1);
  17736. + return;
  17737. +}
  17738. +
  17739. +static void __init loongson_cs5536_ide_fixup(struct pci_dev *pdev)
  17740. +{
  17741. + /* setting the mutex pin as IDE function */
  17742. + pci_write_config_dword(pdev, PCI_IDE_CFG_REG,
  17743. + CS5536_IDE_FLASH_SIGNATURE);
  17744. + return;
  17745. +}
  17746. +
  17747. +static void __init loongson_cs5536_acc_fixup(struct pci_dev *pdev)
  17748. +{
  17749. + u8 val;
  17750. +
  17751. + /* enable the AUDIO interrupt in PIC */
  17752. + pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1);
  17753. +
  17754. +#if 1
  17755. + pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
  17756. + printk(KERN_INFO "cs5536 acc latency 0x%x\n", val);
  17757. + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
  17758. +#endif
  17759. + return;
  17760. +}
  17761. +
  17762. +static void __init loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
  17763. +{
  17764. + /* enable the OHCI interrupt in PIC */
  17765. + /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
  17766. + pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1);
  17767. + return;
  17768. +}
  17769. +
  17770. +static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
  17771. +{
  17772. + u32 hi, lo;
  17773. +
  17774. + /* Serial short detect enable */
  17775. + _rdmsr(USB_MSR_REG(USB_CONFIG), &hi, &lo);
  17776. + _wrmsr(USB_MSR_REG(USB_CONFIG), (1 << 1) | (1 << 2) | (1 << 3), lo);
  17777. +
  17778. + /* setting the USB2.0 micro frame length */
  17779. + pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000);
  17780. + return;
  17781. +}
  17782. +
  17783. +static void __init loongson_nec_fixup(struct pci_dev *pdev)
  17784. +{
  17785. + unsigned int val;
  17786. +
  17787. + pci_read_config_dword(pdev, 0xe0, &val);
  17788. + /* Only 2 port be used */
  17789. + pci_write_config_dword(pdev, 0xe0, (val & ~3) | 0x2);
  17790. +}
  17791. +
  17792. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA,
  17793. + loongson_cs5536_isa_fixup);
  17794. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OHC,
  17795. + loongson_cs5536_ohci_fixup);
  17796. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHC,
  17797. + loongson_cs5536_ehci_fixup);
  17798. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_AUDIO,
  17799. + loongson_cs5536_acc_fixup);
  17800. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE,
  17801. + loongson_cs5536_ide_fixup);
  17802. +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
  17803. + loongson_nec_fixup);
  17804. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/fixup-lm2e.c linux-2.6.30.5/arch/mips/pci/fixup-lm2e.c
  17805. --- linux-2.6.30.5.orig/arch/mips/pci/fixup-lm2e.c 2009-08-16 23:19:38.000000000 +0200
  17806. +++ linux-2.6.30.5/arch/mips/pci/fixup-lm2e.c 1970-01-01 01:00:00.000000000 +0100
  17807. @@ -1,242 +0,0 @@
  17808. -/*
  17809. - * fixup-lm2e.c
  17810. - *
  17811. - * Copyright (C) 2004 ICT CAS
  17812. - * Author: Li xiaoyu, ICT CAS
  17813. - * lixy@ict.ac.cn
  17814. - *
  17815. - * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
  17816. - * Author: Fuxin Zhang, zhangfx@lemote.com
  17817. - *
  17818. - * This program is free software; you can redistribute it and/or modify it
  17819. - * under the terms of the GNU General Public License as published by the
  17820. - * Free Software Foundation; either version 2 of the License, or (at your
  17821. - * option) any later version.
  17822. - *
  17823. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17824. - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  17825. - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17826. - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17827. - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17828. - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  17829. - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17830. - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  17831. - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  17832. - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  17833. - *
  17834. - * You should have received a copy of the GNU General Public License along
  17835. - * with this program; if not, write to the Free Software Foundation, Inc.,
  17836. - * 675 Mass Ave, Cambridge, MA 02139, USA.
  17837. - *
  17838. - */
  17839. -#include <linux/init.h>
  17840. -#include <linux/pci.h>
  17841. -#include <asm/mips-boards/bonito64.h>
  17842. -
  17843. -/* South bridge slot number is set by the pci probe process */
  17844. -static u8 sb_slot = 5;
  17845. -
  17846. -int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  17847. -{
  17848. - int irq = 0;
  17849. -
  17850. - if (slot == sb_slot) {
  17851. - switch (PCI_FUNC(dev->devfn)) {
  17852. - case 2:
  17853. - irq = 10;
  17854. - break;
  17855. - case 3:
  17856. - irq = 11;
  17857. - break;
  17858. - case 5:
  17859. - irq = 9;
  17860. - break;
  17861. - }
  17862. - } else {
  17863. - irq = BONITO_IRQ_BASE + 25 + pin;
  17864. - }
  17865. - return irq;
  17866. -
  17867. -}
  17868. -
  17869. -/* Do platform specific device initialization at pci_enable_device() time */
  17870. -int pcibios_plat_dev_init(struct pci_dev *dev)
  17871. -{
  17872. - return 0;
  17873. -}
  17874. -
  17875. -static void __init loongson2e_nec_fixup(struct pci_dev *pdev)
  17876. -{
  17877. - unsigned int val;
  17878. -
  17879. - /* Configues port 1, 2, 3, 4 to be validate*/
  17880. - pci_read_config_dword(pdev, 0xe0, &val);
  17881. - pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
  17882. -
  17883. - /* System clock is 48-MHz Oscillator. */
  17884. - pci_write_config_dword(pdev, 0xe4, 1 << 5);
  17885. -}
  17886. -
  17887. -static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev)
  17888. -{
  17889. - unsigned char c;
  17890. -
  17891. - sb_slot = PCI_SLOT(pdev->devfn);
  17892. -
  17893. - printk(KERN_INFO "via686b fix: ISA bridge\n");
  17894. -
  17895. - /* Enable I/O Recovery time */
  17896. - pci_write_config_byte(pdev, 0x40, 0x08);
  17897. -
  17898. - /* Enable ISA refresh */
  17899. - pci_write_config_byte(pdev, 0x41, 0x01);
  17900. -
  17901. - /* disable ISA line buffer */
  17902. - pci_write_config_byte(pdev, 0x45, 0x00);
  17903. -
  17904. - /* Gate INTR, and flush line buffer */
  17905. - pci_write_config_byte(pdev, 0x46, 0xe0);
  17906. -
  17907. - /* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
  17908. - /* pci_write_config_byte(pdev, 0x47, 0x20); */
  17909. -
  17910. - /*
  17911. - * enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
  17912. - * enable time-out timer
  17913. - */
  17914. - pci_write_config_byte(pdev, 0x47, 0xe6);
  17915. -
  17916. - /*
  17917. - * enable level trigger on pci irqs: 9,10,11,13
  17918. - * important! without this PCI interrupts won't work
  17919. - */
  17920. - outb(0x2e, 0x4d1);
  17921. -
  17922. - /* 512 K PCI Decode */
  17923. - pci_write_config_byte(pdev, 0x48, 0x01);
  17924. -
  17925. - /* Wait for PGNT before grant to ISA Master/DMA */
  17926. - pci_write_config_byte(pdev, 0x4a, 0x84);
  17927. -
  17928. - /*
  17929. - * Plug'n'Play
  17930. - *
  17931. - * Parallel DRQ 3, Floppy DRQ 2 (default)
  17932. - */
  17933. - pci_write_config_byte(pdev, 0x50, 0x0e);
  17934. -
  17935. - /*
  17936. - * IRQ Routing for Floppy and Parallel port
  17937. - *
  17938. - * IRQ 6 for floppy, IRQ 7 for parallel port
  17939. - */
  17940. - pci_write_config_byte(pdev, 0x51, 0x76);
  17941. -
  17942. - /* IRQ Routing for serial ports (take IRQ 3 and 4) */
  17943. - pci_write_config_byte(pdev, 0x52, 0x34);
  17944. -
  17945. - /* All IRQ's level triggered. */
  17946. - pci_write_config_byte(pdev, 0x54, 0x00);
  17947. -
  17948. - /* route PIRQA-D irq */
  17949. - pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */
  17950. - pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; */
  17951. - /* 3-0, PIRQB */
  17952. - pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */
  17953. -
  17954. - /* enable function 5/6, audio/modem */
  17955. - pci_read_config_byte(pdev, 0x85, &c);
  17956. - c &= ~(0x3 << 2);
  17957. - pci_write_config_byte(pdev, 0x85, c);
  17958. -
  17959. - printk(KERN_INFO"via686b fix: ISA bridge done\n");
  17960. -}
  17961. -
  17962. -static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev)
  17963. -{
  17964. - printk(KERN_INFO"via686b fix: IDE\n");
  17965. -
  17966. - /* Modify IDE controller setup */
  17967. - pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
  17968. - pci_write_config_byte(pdev, PCI_COMMAND,
  17969. - PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
  17970. - PCI_COMMAND_MASTER);
  17971. - pci_write_config_byte(pdev, 0x40, 0x0b);
  17972. - /* legacy mode */
  17973. - pci_write_config_byte(pdev, 0x42, 0x09);
  17974. -
  17975. -#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
  17976. - /* disable read prefetch/write post buffers */
  17977. - pci_write_config_byte(pdev, 0x41, 0x02);
  17978. -
  17979. - /* use 3/4 as fifo thresh hold */
  17980. - pci_write_config_byte(pdev, 0x43, 0x0a);
  17981. - pci_write_config_byte(pdev, 0x44, 0x00);
  17982. -
  17983. - pci_write_config_byte(pdev, 0x45, 0x00);
  17984. -#else
  17985. - pci_write_config_byte(pdev, 0x41, 0xc2);
  17986. - pci_write_config_byte(pdev, 0x43, 0x35);
  17987. - pci_write_config_byte(pdev, 0x44, 0x1c);
  17988. -
  17989. - pci_write_config_byte(pdev, 0x45, 0x10);
  17990. -#endif
  17991. -
  17992. - printk(KERN_INFO"via686b fix: IDE done\n");
  17993. -}
  17994. -
  17995. -static void __init loongson2e_686b_func2_fixup(struct pci_dev *pdev)
  17996. -{
  17997. - /* irq routing */
  17998. - pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
  17999. -}
  18000. -
  18001. -static void __init loongson2e_686b_func3_fixup(struct pci_dev *pdev)
  18002. -{
  18003. - /* irq routing */
  18004. - pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
  18005. -}
  18006. -
  18007. -static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev)
  18008. -{
  18009. - unsigned int val;
  18010. - unsigned char c;
  18011. -
  18012. - /* enable IO */
  18013. - pci_write_config_byte(pdev, PCI_COMMAND,
  18014. - PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
  18015. - PCI_COMMAND_MASTER);
  18016. - pci_read_config_dword(pdev, 0x4, &val);
  18017. - pci_write_config_dword(pdev, 0x4, val | 1);
  18018. -
  18019. - /* route ac97 IRQ */
  18020. - pci_write_config_byte(pdev, 0x3c, 9);
  18021. -
  18022. - pci_read_config_byte(pdev, 0x8, &c);
  18023. -
  18024. - /* link control: enable link & SGD PCM output */
  18025. - pci_write_config_byte(pdev, 0x41, 0xcc);
  18026. -
  18027. - /* disable game port, FM, midi, sb, enable write to reg2c-2f */
  18028. - pci_write_config_byte(pdev, 0x42, 0x20);
  18029. -
  18030. - /* we are using Avance logic codec */
  18031. - pci_write_config_word(pdev, 0x2c, 0x1005);
  18032. - pci_write_config_word(pdev, 0x2e, 0x4710);
  18033. - pci_read_config_dword(pdev, 0x2c, &val);
  18034. -
  18035. - pci_write_config_byte(pdev, 0x42, 0x0);
  18036. -}
  18037. -
  18038. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
  18039. - loongson2e_686b_func0_fixup);
  18040. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
  18041. - loongson2e_686b_func1_fixup);
  18042. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
  18043. - loongson2e_686b_func2_fixup);
  18044. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
  18045. - loongson2e_686b_func3_fixup);
  18046. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
  18047. - loongson2e_686b_func5_fixup);
  18048. -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
  18049. - loongson2e_nec_fixup);
  18050. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/Makefile linux-2.6.30.5/arch/mips/pci/Makefile
  18051. --- linux-2.6.30.5.orig/arch/mips/pci/Makefile 2009-08-16 23:19:38.000000000 +0200
  18052. +++ linux-2.6.30.5/arch/mips/pci/Makefile 2009-08-23 19:01:04.000000000 +0200
  18053. @@ -26,7 +26,9 @@
  18054. obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
  18055. obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
  18056. obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
  18057. -obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-bonito64.o
  18058. +obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o
  18059. +obj-$(CONFIG_LEMOTE_FULOONG2F) += fixup-lemote2f.o ops-loongson2.o
  18060. +obj-$(CONFIG_LEMOTE_YEELOONG2F) += fixup-lemote2f.o ops-loongson2.o
  18061. obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
  18062. obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o
  18063. obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o
  18064. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/ops-bonito64.c linux-2.6.30.5/arch/mips/pci/ops-bonito64.c
  18065. --- linux-2.6.30.5.orig/arch/mips/pci/ops-bonito64.c 2009-08-16 23:19:38.000000000 +0200
  18066. +++ linux-2.6.30.5/arch/mips/pci/ops-bonito64.c 2009-08-23 19:01:04.000000000 +0200
  18067. @@ -29,20 +29,16 @@
  18068. #define PCI_ACCESS_READ 0
  18069. #define PCI_ACCESS_WRITE 1
  18070. -#ifdef CONFIG_LEMOTE_FULONG
  18071. -#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (offset))
  18072. -#define ID_SEL_BEGIN 11
  18073. -#else
  18074. -#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
  18075. +#define CFG_SPACE_REG(offset) \
  18076. + (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
  18077. #define ID_SEL_BEGIN 10
  18078. -#endif
  18079. #define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
  18080. static int bonito64_pcibios_config_access(unsigned char access_type,
  18081. struct pci_bus *bus,
  18082. unsigned int devfn, int where,
  18083. - u32 * data)
  18084. + u32 *data)
  18085. {
  18086. u32 busnum = bus->number;
  18087. u32 addr, type;
  18088. @@ -77,10 +73,9 @@
  18089. addrp = CFG_SPACE_REG(addr & 0xffff);
  18090. if (access_type == PCI_ACCESS_WRITE) {
  18091. writel(cpu_to_le32(*data), addrp);
  18092. -#ifndef CONFIG_LEMOTE_FULONG
  18093. /* Wait till done */
  18094. - while (BONITO_PCIMSTAT & 0xF);
  18095. -#endif
  18096. + while (BONITO_PCIMSTAT & 0xF)
  18097. + ;
  18098. } else {
  18099. *data = le32_to_cpu(readl(addrp));
  18100. }
  18101. @@ -107,7 +102,7 @@
  18102. * read/write a 32bit word and mask/modify the data we actually want.
  18103. */
  18104. static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
  18105. - int where, int size, u32 * val)
  18106. + int where, int size, u32 *val)
  18107. {
  18108. u32 data = 0;
  18109. @@ -144,7 +139,7 @@
  18110. data = val;
  18111. else {
  18112. if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
  18113. - where, &data))
  18114. + where, &data))
  18115. return -1;
  18116. if (size == 1)
  18117. diff -Nur linux-2.6.30.5.orig/arch/mips/pci/ops-loongson2.c linux-2.6.30.5/arch/mips/pci/ops-loongson2.c
  18118. --- linux-2.6.30.5.orig/arch/mips/pci/ops-loongson2.c 1970-01-01 01:00:00.000000000 +0100
  18119. +++ linux-2.6.30.5/arch/mips/pci/ops-loongson2.c 2009-08-23 19:01:04.000000000 +0200
  18120. @@ -0,0 +1,213 @@
  18121. +/*
  18122. + * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
  18123. + * All rights reserved.
  18124. + * Authors: Carsten Langgaard <carstenl@mips.com>
  18125. + * Maciej W. Rozycki <macro@mips.com>
  18126. + *
  18127. + * This program is free software; you can distribute it and/or modify it
  18128. + * under the terms of the GNU General Public License (Version 2) as
  18129. + * published by the Free Software Foundation.
  18130. + *
  18131. + * This program is distributed in the hope it will be useful, but WITHOUT
  18132. + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18133. + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  18134. + * for more details.
  18135. + *
  18136. + * You should have received a copy of the GNU General Public License along
  18137. + * with this program; if not, write to the Free Software Foundation, Inc.,
  18138. + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  18139. + *
  18140. + * MIPS boards specific PCI support.
  18141. + */
  18142. +#include <linux/types.h>
  18143. +#include <linux/pci.h>
  18144. +#include <linux/kernel.h>
  18145. +#include <linux/init.h>
  18146. +
  18147. +#include <loongson.h>
  18148. +
  18149. +#ifdef CONFIG_CS5536
  18150. +#include <cs5536/cs5536_pci.h>
  18151. +#include <cs5536/cs5536.h>
  18152. +#endif
  18153. +
  18154. +#define PCI_ACCESS_READ 0
  18155. +#define PCI_ACCESS_WRITE 1
  18156. +
  18157. +#define CFG_SPACE_REG(offset) \
  18158. + (void *)CKSEG1ADDR(LOONGSON_PCICFG_BASE | (offset))
  18159. +#define ID_SEL_BEGIN 11
  18160. +#define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
  18161. +
  18162. +
  18163. +static int loongson_pcibios_config_access(unsigned char access_type,
  18164. + struct pci_bus *bus,
  18165. + unsigned int devfn, int where,
  18166. + u32 *data)
  18167. +{
  18168. + u32 busnum = bus->number;
  18169. + u32 addr, type;
  18170. + u32 dummy;
  18171. + void *addrp;
  18172. + int device = PCI_SLOT(devfn);
  18173. + int function = PCI_FUNC(devfn);
  18174. + int reg = where & ~3;
  18175. +
  18176. + if (busnum == 0) {
  18177. + /* board-specific part,currently,only fuloong2f,yeeloong2f
  18178. + * use CS5536, fuloong2e use via686b, gdium has no
  18179. + * south bridge
  18180. + */
  18181. +#ifdef CONFIG_CS5536
  18182. + /* cs5536_pci_conf_read4/write4() will call _rdmsr/_wrmsr()
  18183. + * to access the regsters 0xf4,0xf8,0xfc, which is bigger than
  18184. + * 0xf0, so, it will not go this branch, but the others. so,
  18185. + * no calling dead loop here.
  18186. + */
  18187. + if ((PCI_IDSEL_CS5536 == device) && (reg < 0xF0)) {
  18188. + switch (access_type) {
  18189. + case PCI_ACCESS_READ:
  18190. + *data = cs5536_pci_conf_read4(function, reg);
  18191. + break;
  18192. + case PCI_ACCESS_WRITE:
  18193. + cs5536_pci_conf_write4(function, reg, *data);
  18194. + break;
  18195. + }
  18196. + return 0;
  18197. + }
  18198. +#endif
  18199. + /* Type 0 configuration for onboard PCI bus */
  18200. + if (device > MAX_DEV_NUM)
  18201. + return -1;
  18202. +
  18203. + addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
  18204. + type = 0;
  18205. + } else {
  18206. + /* Type 1 configuration for offboard PCI bus */
  18207. + addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
  18208. + type = 0x10000;
  18209. + }
  18210. +
  18211. + /* Clear aborts */
  18212. + LOONGSON_PCICMD |= LOONGSON_PCICMD_MABORT_CLR | \
  18213. + LOONGSON_PCICMD_MTABORT_CLR;
  18214. +
  18215. + LOONGSON_PCIMAP_CFG = (addr >> 16) | type;
  18216. +
  18217. + /* Flush Bonito register block */
  18218. + dummy = LOONGSON_PCIMAP_CFG;
  18219. + mmiowb();
  18220. +
  18221. + addrp = CFG_SPACE_REG(addr & 0xffff);
  18222. + if (access_type == PCI_ACCESS_WRITE)
  18223. + writel(cpu_to_le32(*data), addrp);
  18224. + else
  18225. + *data = le32_to_cpu(readl(addrp));
  18226. +
  18227. + /* Detect Master/Target abort */
  18228. + if (LOONGSON_PCICMD & (LOONGSON_PCICMD_MABORT_CLR |
  18229. + LOONGSON_PCICMD_MTABORT_CLR)) {
  18230. + /* Error occurred */
  18231. +
  18232. + /* Clear bits */
  18233. + LOONGSON_PCICMD |= (LOONGSON_PCICMD_MABORT_CLR |
  18234. + LOONGSON_PCICMD_MTABORT_CLR);
  18235. +
  18236. + return -1;
  18237. + }
  18238. +
  18239. + return 0;
  18240. +
  18241. +}
  18242. +
  18243. +
  18244. +/*
  18245. + * We can't address 8 and 16 bit words directly. Instead we have to
  18246. + * read/write a 32bit word and mask/modify the data we actually want.
  18247. + */
  18248. +static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn,
  18249. + int where, int size, u32 *val)
  18250. +{
  18251. + u32 data = 0;
  18252. +
  18253. + if ((size == 2) && (where & 1))
  18254. + return PCIBIOS_BAD_REGISTER_NUMBER;
  18255. + else if ((size == 4) && (where & 3))
  18256. + return PCIBIOS_BAD_REGISTER_NUMBER;
  18257. +
  18258. + if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
  18259. + &data))
  18260. + return -1;
  18261. +
  18262. + if (size == 1)
  18263. + *val = (data >> ((where & 3) << 3)) & 0xff;
  18264. + else if (size == 2)
  18265. + *val = (data >> ((where & 3) << 3)) & 0xffff;
  18266. + else
  18267. + *val = data;
  18268. +
  18269. + return PCIBIOS_SUCCESSFUL;
  18270. +}
  18271. +
  18272. +static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn,
  18273. + int where, int size, u32 val)
  18274. +{
  18275. + u32 data = 0;
  18276. +
  18277. + if ((size == 2) && (where & 1))
  18278. + return PCIBIOS_BAD_REGISTER_NUMBER;
  18279. + else if ((size == 4) && (where & 3))
  18280. + return PCIBIOS_BAD_REGISTER_NUMBER;
  18281. +
  18282. + if (size == 4)
  18283. + data = val;
  18284. + else {
  18285. + if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
  18286. + where, &data))
  18287. + return -1;
  18288. +
  18289. + if (size == 1)
  18290. + data = (data & ~(0xff << ((where & 3) << 3))) |
  18291. + (val << ((where & 3) << 3));
  18292. + else if (size == 2)
  18293. + data = (data & ~(0xffff << ((where & 3) << 3))) |
  18294. + (val << ((where & 3) << 3));
  18295. + }
  18296. +
  18297. + if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
  18298. + &data))
  18299. + return -1;
  18300. +
  18301. + return PCIBIOS_SUCCESSFUL;
  18302. +}
  18303. +
  18304. +struct pci_ops loongson_pci_ops = {
  18305. + .read = loongson_pcibios_read,
  18306. + .write = loongson_pcibios_write
  18307. +};
  18308. +
  18309. +#ifdef CONFIG_CS5536
  18310. +void _rdmsr(u32 msr, u32 *hi, u32 *lo)
  18311. +{
  18312. + struct pci_bus bus = {
  18313. + .number = PCI_BUS_CS5536
  18314. + };
  18315. + u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
  18316. + loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
  18317. + loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
  18318. + loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
  18319. +}
  18320. +EXPORT_SYMBOL(_rdmsr);
  18321. +
  18322. +void _wrmsr(u32 msr, u32 hi, u32 lo)
  18323. +{
  18324. + struct pci_bus bus = {
  18325. + .number = PCI_BUS_CS5536
  18326. + };
  18327. + u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
  18328. + loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
  18329. + loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
  18330. + loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
  18331. +}
  18332. +EXPORT_SYMBOL(_wrmsr);
  18333. +#endif
  18334. diff -Nur linux-2.6.30.5.orig/arch/mips/power/cpu.c linux-2.6.30.5/arch/mips/power/cpu.c
  18335. --- linux-2.6.30.5.orig/arch/mips/power/cpu.c 1970-01-01 01:00:00.000000000 +0100
  18336. +++ linux-2.6.30.5/arch/mips/power/cpu.c 2009-08-23 19:01:04.000000000 +0200
  18337. @@ -0,0 +1,60 @@
  18338. +/*
  18339. + * Suspend support specific for mips.
  18340. + *
  18341. + * Licensed under the GPLv2
  18342. + *
  18343. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  18344. + * Author: Hu Hongbing <huhb@lemote.com>
  18345. + * Wu Zhangjin <wuzj@lemote.com>
  18346. + */
  18347. +#include <asm/suspend.h>
  18348. +#include <asm/fpu.h>
  18349. +#include <asm/dsp.h>
  18350. +#include <asm/bootinfo.h>
  18351. +
  18352. +static u32 saved_status;
  18353. +struct pt_regs saved_regs;
  18354. +
  18355. +void save_processor_state(void)
  18356. +{
  18357. + saved_status = read_c0_status();
  18358. +
  18359. + if (is_fpu_owner())
  18360. + save_fp(current);
  18361. + if (cpu_has_dsp)
  18362. + save_dsp(current);
  18363. +}
  18364. +
  18365. +void restore_processor_state(void)
  18366. +{
  18367. + write_c0_status(saved_status);
  18368. +
  18369. + if (is_fpu_owner())
  18370. + restore_fp(current);
  18371. + if (cpu_has_dsp)
  18372. + restore_dsp(current);
  18373. +}
  18374. +
  18375. +int pfn_in_system_ram(unsigned long pfn)
  18376. +{
  18377. + int i;
  18378. +
  18379. + for (i = 0; i < boot_mem_map.nr_map; i++) {
  18380. + if (boot_mem_map.map[i].type == BOOT_MEM_RAM) {
  18381. + if ((pfn >= (boot_mem_map.map[i].addr >> PAGE_SHIFT)) &&
  18382. + ((pfn) < ((boot_mem_map.map[i].addr +
  18383. + boot_mem_map.map[i].size) >> PAGE_SHIFT)))
  18384. + return 1;
  18385. + }
  18386. + }
  18387. + return 0;
  18388. +}
  18389. +
  18390. +int pfn_is_nosave(unsigned long pfn)
  18391. +{
  18392. + unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
  18393. + unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
  18394. +
  18395. + return ((pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn))
  18396. + || !pfn_in_system_ram(pfn);
  18397. +}
  18398. diff -Nur linux-2.6.30.5.orig/arch/mips/power/hibernate.S linux-2.6.30.5/arch/mips/power/hibernate.S
  18399. --- linux-2.6.30.5.orig/arch/mips/power/hibernate.S 1970-01-01 01:00:00.000000000 +0100
  18400. +++ linux-2.6.30.5/arch/mips/power/hibernate.S 2009-08-23 19:01:04.000000000 +0200
  18401. @@ -0,0 +1,61 @@
  18402. +/*
  18403. + * Hibernation support specific for mips - temporary page tables
  18404. + *
  18405. + * Licensed under the GPLv2
  18406. + *
  18407. + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
  18408. + * Author: Hu Hongbing <huhb@lemote.com>
  18409. + * Wu Zhangjin <wuzj@lemote.com>
  18410. + */
  18411. +#include <asm/asm-offsets.h>
  18412. +#include <asm/regdef.h>
  18413. +#include <asm/asm.h>
  18414. +
  18415. +.text
  18416. +LEAF(swsusp_arch_suspend)
  18417. + PTR_LA t0, saved_regs
  18418. + PTR_S ra, PT_R31(t0)
  18419. + PTR_S sp, PT_R29(t0)
  18420. + PTR_S fp, PT_R30(t0)
  18421. + PTR_S gp, PT_R28(t0)
  18422. + PTR_S s0, PT_R16(t0)
  18423. + PTR_S s1, PT_R17(t0)
  18424. + PTR_S s2, PT_R18(t0)
  18425. + PTR_S s3, PT_R19(t0)
  18426. + PTR_S s4, PT_R20(t0)
  18427. + PTR_S s5, PT_R21(t0)
  18428. + PTR_S s6, PT_R22(t0)
  18429. + PTR_S s7, PT_R23(t0)
  18430. + j swsusp_save
  18431. +END(swsusp_arch_suspend)
  18432. +
  18433. +LEAF(swsusp_arch_resume)
  18434. + PTR_L t0, restore_pblist
  18435. +0:
  18436. + PTR_L t1, PBE_ADDRESS(t0) /* source */
  18437. + PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
  18438. + PTR_ADDIU t3, t1, _PAGE_SIZE
  18439. +1:
  18440. + REG_L t8, (t1)
  18441. + REG_S t8, (t2)
  18442. + PTR_ADDIU t1, t1, SZREG
  18443. + PTR_ADDIU t2, t2, SZREG
  18444. + bne t1, t3, 1b
  18445. + PTR_L t0, PBE_NEXT(t0)
  18446. + bnez t0, 0b
  18447. + PTR_LA t0, saved_regs
  18448. + PTR_L ra, PT_R31(t0)
  18449. + PTR_L sp, PT_R29(t0)
  18450. + PTR_L fp, PT_R30(t0)
  18451. + PTR_L gp, PT_R28(t0)
  18452. + PTR_L s0, PT_R16(t0)
  18453. + PTR_L s1, PT_R17(t0)
  18454. + PTR_L s2, PT_R18(t0)
  18455. + PTR_L s3, PT_R19(t0)
  18456. + PTR_L s4, PT_R20(t0)
  18457. + PTR_L s5, PT_R21(t0)
  18458. + PTR_L s6, PT_R22(t0)
  18459. + PTR_L s7, PT_R23(t0)
  18460. + PTR_LI v0, 0x0
  18461. + jr ra
  18462. +END(swsusp_arch_resume)
  18463. diff -Nur linux-2.6.30.5.orig/arch/mips/power/Makefile linux-2.6.30.5/arch/mips/power/Makefile
  18464. --- linux-2.6.30.5.orig/arch/mips/power/Makefile 1970-01-01 01:00:00.000000000 +0100
  18465. +++ linux-2.6.30.5/arch/mips/power/Makefile 2009-08-23 19:01:04.000000000 +0200
  18466. @@ -0,0 +1 @@
  18467. +obj-$(CONFIG_HIBERNATION) += cpu.o hibernate.o
  18468. diff -Nur linux-2.6.30.5.orig/drivers/input/serio/i8042.c linux-2.6.30.5/drivers/input/serio/i8042.c
  18469. --- linux-2.6.30.5.orig/drivers/input/serio/i8042.c 2009-08-16 23:19:38.000000000 +0200
  18470. +++ linux-2.6.30.5/drivers/input/serio/i8042.c 2009-08-23 19:01:04.000000000 +0200
  18471. @@ -143,7 +143,7 @@
  18472. * of the i8042 down the toilet.
  18473. */
  18474. -static int i8042_flush(void)
  18475. +int i8042_flush(void)
  18476. {
  18477. unsigned long flags;
  18478. unsigned char data, str;
  18479. @@ -390,10 +390,10 @@
  18480. }
  18481. /*
  18482. - * i8042_enable_kbd_port enables keybaord port on chip
  18483. + * i8042_enable_kbd_port enables keyboard port on chip
  18484. */
  18485. -static int i8042_enable_kbd_port(void)
  18486. +int i8042_enable_kbd_port(void)
  18487. {
  18488. i8042_ctr &= ~I8042_CTR_KBDDIS;
  18489. i8042_ctr |= I8042_CTR_KBDINT;
  18490. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/Kconfig linux-2.6.30.5/drivers/net/wireless/Kconfig
  18491. --- linux-2.6.30.5.orig/drivers/net/wireless/Kconfig 2009-08-16 23:19:38.000000000 +0200
  18492. +++ linux-2.6.30.5/drivers/net/wireless/Kconfig 2009-08-23 19:01:04.000000000 +0200
  18493. @@ -416,7 +416,7 @@
  18494. config RTL8187
  18495. tristate "Realtek 8187 and 8187B USB support"
  18496. - depends on MAC80211 && USB && WLAN_80211
  18497. + depends on MAC80211 && USB && WLAN_80211 && !LEMOTE_YEELOONG2F
  18498. select EEPROM_93CX6
  18499. ---help---
  18500. This is a driver for RTL8187 and RTL8187B based cards.
  18501. @@ -434,6 +434,16 @@
  18502. Thanks to Realtek for their support!
  18503. +config RTL8187B
  18504. + tristate "Realtek 8187B wifi support for yeeloong2f laptop"
  18505. + depends on MAC80211 && USB && WLAN_80211 && LEMOTE_YEELOONG2F
  18506. + select EEPROM_93CX6
  18507. + ---help---
  18508. + This is a driver for RTL8187B based cards, this driver is especially
  18509. + for yeeloon2f laptop.
  18510. +
  18511. + Thanks to Realtek for their support!
  18512. +
  18513. config ADM8211
  18514. tristate "ADMtek ADM8211 support"
  18515. depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL
  18516. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/Makefile linux-2.6.30.5/drivers/net/wireless/Makefile
  18517. --- linux-2.6.30.5.orig/drivers/net/wireless/Makefile 2009-08-16 23:19:38.000000000 +0200
  18518. +++ linux-2.6.30.5/drivers/net/wireless/Makefile 2009-08-23 19:01:04.000000000 +0200
  18519. @@ -34,6 +34,7 @@
  18520. obj-$(CONFIG_ZD1211RW) += zd1211rw/
  18521. obj-$(CONFIG_RTL8180) += rtl818x/
  18522. obj-$(CONFIG_RTL8187) += rtl818x/
  18523. +obj-$(CONFIG_RTL8187B) += rtl8187b/
  18524. # 16-bit wireless PCMCIA client drivers
  18525. obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o
  18526. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/dot11d.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/dot11d.h
  18527. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/dot11d.h 1970-01-01 01:00:00.000000000 +0100
  18528. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/dot11d.h 2009-08-23 19:01:04.000000000 +0200
  18529. @@ -0,0 +1,102 @@
  18530. +#ifndef __INC_DOT11D_H
  18531. +#define __INC_DOT11D_H
  18532. +
  18533. +#include "ieee80211/ieee80211.h"
  18534. +
  18535. +//#define ENABLE_DOT11D
  18536. +
  18537. +//#define DOT11D_MAX_CHNL_NUM 83
  18538. +
  18539. +typedef struct _CHNL_TXPOWER_TRIPLE {
  18540. + u8 FirstChnl;
  18541. + u8 NumChnls;
  18542. + u8 MaxTxPowerInDbm;
  18543. +}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
  18544. +
  18545. +typedef enum _DOT11D_STATE {
  18546. + DOT11D_STATE_NONE = 0,
  18547. + DOT11D_STATE_LEARNED,
  18548. + DOT11D_STATE_DONE,
  18549. +}DOT11D_STATE;
  18550. +
  18551. +typedef struct _RT_DOT11D_INFO {
  18552. + //DECLARE_RT_OBJECT(RT_DOT11D_INFO);
  18553. +
  18554. + bool bEnabled; // dot11MultiDomainCapabilityEnabled
  18555. +
  18556. + u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.
  18557. + u8 CountryIeBuf[MAX_IE_LEN];
  18558. + u8 CountryIeSrcAddr[6]; // Source AP of the country IE.
  18559. + u8 CountryIeWatchdog;
  18560. +
  18561. + u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)
  18562. + //u8 ChnlListLen; // #Bytes valid in ChnlList[].
  18563. + //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
  18564. + u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
  18565. +
  18566. + DOT11D_STATE State;
  18567. +}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
  18568. +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
  18569. +#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
  18570. +#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
  18571. +
  18572. +#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
  18573. +#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
  18574. +
  18575. +#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
  18576. +#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
  18577. +
  18578. +#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
  18579. + (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
  18580. + FALSE : \
  18581. + (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
  18582. +
  18583. +#define CIE_WATCHDOG_TH 1
  18584. +#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
  18585. +#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
  18586. +#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
  18587. +
  18588. +#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
  18589. +
  18590. +
  18591. +void
  18592. +Dot11d_Init(
  18593. + struct ieee80211_device *dev
  18594. + );
  18595. +
  18596. +void
  18597. +Dot11d_Reset(
  18598. + struct ieee80211_device *dev
  18599. + );
  18600. +
  18601. +void
  18602. +Dot11d_UpdateCountryIe(
  18603. + struct ieee80211_device *dev,
  18604. + u8 * pTaddr,
  18605. + u16 CoutryIeLen,
  18606. + u8 * pCoutryIe
  18607. + );
  18608. +
  18609. +u8
  18610. +DOT11D_GetMaxTxPwrInDbm(
  18611. + struct ieee80211_device *dev,
  18612. + u8 Channel
  18613. + );
  18614. +
  18615. +void
  18616. +DOT11D_ScanComplete(
  18617. + struct ieee80211_device * dev
  18618. + );
  18619. +
  18620. +int IsLegalChannel(
  18621. + struct ieee80211_device * dev,
  18622. + u8 channel
  18623. +);
  18624. +
  18625. +int ToLegalChannel(
  18626. + struct ieee80211_device * dev,
  18627. + u8 channel
  18628. +);
  18629. +
  18630. +void dump_chnl_map(u8 * channel_map);
  18631. +#endif // #ifndef __INC_DOT11D_H
  18632. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/arc4.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/arc4.c
  18633. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/arc4.c 1970-01-01 01:00:00.000000000 +0100
  18634. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/arc4.c 2009-08-23 19:01:04.000000000 +0200
  18635. @@ -0,0 +1,103 @@
  18636. +/*
  18637. + * Cryptographic API
  18638. + *
  18639. + * ARC4 Cipher Algorithm
  18640. + *
  18641. + * Jon Oberheide <jon@oberheide.org>
  18642. + *
  18643. + * This program is free software; you can redistribute it and/or modify
  18644. + * it under the terms of the GNU General Public License as published by
  18645. + * the Free Software Foundation; either version 2 of the License, or
  18646. + * (at your option) any later version.
  18647. + *
  18648. + */
  18649. +#include <linux/module.h>
  18650. +#include <linux/init.h>
  18651. +#include "rtl_crypto.h"
  18652. +
  18653. +#define ARC4_MIN_KEY_SIZE 1
  18654. +#define ARC4_MAX_KEY_SIZE 256
  18655. +#define ARC4_BLOCK_SIZE 1
  18656. +
  18657. +struct arc4_ctx {
  18658. + u8 S[256];
  18659. + u8 x, y;
  18660. +};
  18661. +
  18662. +static int arc4_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
  18663. +{
  18664. + struct arc4_ctx *ctx = ctx_arg;
  18665. + int i, j = 0, k = 0;
  18666. +
  18667. + ctx->x = 1;
  18668. + ctx->y = 0;
  18669. +
  18670. + for(i = 0; i < 256; i++)
  18671. + ctx->S[i] = i;
  18672. +
  18673. + for(i = 0; i < 256; i++)
  18674. + {
  18675. + u8 a = ctx->S[i];
  18676. + j = (j + in_key[k] + a) & 0xff;
  18677. + ctx->S[i] = ctx->S[j];
  18678. + ctx->S[j] = a;
  18679. + if(++k >= key_len)
  18680. + k = 0;
  18681. + }
  18682. +
  18683. + return 0;
  18684. +}
  18685. +
  18686. +static void arc4_crypt(void *ctx_arg, u8 *out, const u8 *in)
  18687. +{
  18688. + struct arc4_ctx *ctx = ctx_arg;
  18689. +
  18690. + u8 *const S = ctx->S;
  18691. + u8 x = ctx->x;
  18692. + u8 y = ctx->y;
  18693. + u8 a, b;
  18694. +
  18695. + a = S[x];
  18696. + y = (y + a) & 0xff;
  18697. + b = S[y];
  18698. + S[x] = b;
  18699. + S[y] = a;
  18700. + x = (x + 1) & 0xff;
  18701. + *out++ = *in ^ S[(a + b) & 0xff];
  18702. +
  18703. + ctx->x = x;
  18704. + ctx->y = y;
  18705. +}
  18706. +
  18707. +static struct crypto_alg arc4_alg = {
  18708. + .cra_name = "arc4",
  18709. + .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  18710. + .cra_blocksize = ARC4_BLOCK_SIZE,
  18711. + .cra_ctxsize = sizeof(struct arc4_ctx),
  18712. + .cra_module = THIS_MODULE,
  18713. + .cra_list = LIST_HEAD_INIT(arc4_alg.cra_list),
  18714. + .cra_u = { .cipher = {
  18715. + .cia_min_keysize = ARC4_MIN_KEY_SIZE,
  18716. + .cia_max_keysize = ARC4_MAX_KEY_SIZE,
  18717. + .cia_setkey = arc4_set_key,
  18718. + .cia_encrypt = arc4_crypt,
  18719. + .cia_decrypt = arc4_crypt } }
  18720. +};
  18721. +
  18722. +static int __init arc4_init(void)
  18723. +{
  18724. + return crypto_register_alg(&arc4_alg);
  18725. +}
  18726. +
  18727. +
  18728. +static void __exit arc4_exit(void)
  18729. +{
  18730. + crypto_unregister_alg(&arc4_alg);
  18731. +}
  18732. +
  18733. +module_init(arc4_init);
  18734. +module_exit(arc4_exit);
  18735. +
  18736. +MODULE_LICENSE("GPL");
  18737. +MODULE_DESCRIPTION("ARC4 Cipher Algorithm");
  18738. +MODULE_AUTHOR("Jon Oberheide <jon@oberheide.org>");
  18739. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/dot11d.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/dot11d.c
  18740. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/dot11d.c 1970-01-01 01:00:00.000000000 +0100
  18741. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/dot11d.c 2009-08-23 19:01:04.000000000 +0200
  18742. @@ -0,0 +1,245 @@
  18743. +#ifdef ENABLE_DOT11D
  18744. +//-----------------------------------------------------------------------------
  18745. +// File:
  18746. +// Dot11d.c
  18747. +//
  18748. +// Description:
  18749. +// Implement 802.11d.
  18750. +//
  18751. +//-----------------------------------------------------------------------------
  18752. +
  18753. +#include "dot11d.h"
  18754. +
  18755. +void
  18756. +Dot11d_Init(struct ieee80211_device *ieee)
  18757. +{
  18758. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
  18759. +
  18760. + pDot11dInfo->bEnabled = 0;
  18761. +
  18762. + pDot11dInfo->State = DOT11D_STATE_NONE;
  18763. + pDot11dInfo->CountryIeLen = 0;
  18764. + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
  18765. + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
  18766. + RESET_CIE_WATCHDOG(ieee);
  18767. +
  18768. + //printk("Dot11d_Init()\n");
  18769. +}
  18770. +
  18771. +//
  18772. +// Description:
  18773. +// Reset to the state as we are just entering a regulatory domain.
  18774. +//
  18775. +void
  18776. +Dot11d_Reset(struct ieee80211_device *ieee)
  18777. +{
  18778. + u32 i;
  18779. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
  18780. +
  18781. + // Clear old channel map
  18782. + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
  18783. + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
  18784. + // Set new channel map
  18785. + for (i=1; i<=11; i++) {
  18786. + (pDot11dInfo->channel_map)[i] = 1;
  18787. + }
  18788. + for (i=12; i<=14; i++) {
  18789. + (pDot11dInfo->channel_map)[i] = 2;
  18790. + }
  18791. +
  18792. + pDot11dInfo->State = DOT11D_STATE_NONE;
  18793. + pDot11dInfo->CountryIeLen = 0;
  18794. + RESET_CIE_WATCHDOG(ieee);
  18795. +
  18796. + //printk("Dot11d_Reset()\n");
  18797. +}
  18798. +
  18799. +//
  18800. +// Description:
  18801. +// Update country IE from Beacon or Probe Resopnse
  18802. +// and configure PHY for operation in the regulatory domain.
  18803. +//
  18804. +// TODO:
  18805. +// Configure Tx power.
  18806. +//
  18807. +// Assumption:
  18808. +// 1. IS_DOT11D_ENABLE() is TRUE.
  18809. +// 2. Input IE is an valid one.
  18810. +//
  18811. +void
  18812. +Dot11d_UpdateCountryIe(
  18813. + struct ieee80211_device *dev,
  18814. + u8 * pTaddr,
  18815. + u16 CoutryIeLen,
  18816. + u8 * pCoutryIe
  18817. + )
  18818. +{
  18819. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
  18820. + u8 i, j, NumTriples, MaxChnlNum;
  18821. + PCHNL_TXPOWER_TRIPLE pTriple;
  18822. +
  18823. + if((CoutryIeLen - 3)%3 != 0)
  18824. + {
  18825. + printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
  18826. + Dot11d_Reset(dev);
  18827. + return;
  18828. + }
  18829. +
  18830. + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
  18831. + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
  18832. + MaxChnlNum = 0;
  18833. + NumTriples = (CoutryIeLen - 3) / 3; // skip 3-byte country string.
  18834. + pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
  18835. + for(i = 0; i < NumTriples; i++)
  18836. + {
  18837. + if(MaxChnlNum >= pTriple->FirstChnl)
  18838. + { // It is not in a monotonically increasing order, so stop processing.
  18839. + printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
  18840. + Dot11d_Reset(dev);
  18841. + return;
  18842. + }
  18843. + if(MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + pTriple->NumChnls))
  18844. + { // It is not a valid set of channel id, so stop processing.
  18845. + printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
  18846. + Dot11d_Reset(dev);
  18847. + return;
  18848. + }
  18849. +
  18850. + for(j = 0 ; j < pTriple->NumChnls; j++)
  18851. + {
  18852. + pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;
  18853. + pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = pTriple->MaxTxPowerInDbm;
  18854. + MaxChnlNum = pTriple->FirstChnl + j;
  18855. + }
  18856. +
  18857. + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3);
  18858. + }
  18859. +#if 1
  18860. + //printk("Dot11d_UpdateCountryIe(): Channel List:\n");
  18861. + printk("Channel List:");
  18862. + for(i=1; i<= MAX_CHANNEL_NUMBER; i++)
  18863. + if(pDot11dInfo->channel_map[i] > 0)
  18864. + printk(" %d", i);
  18865. + printk("\n");
  18866. +#endif
  18867. +
  18868. + UPDATE_CIE_SRC(dev, pTaddr);
  18869. +
  18870. + pDot11dInfo->CountryIeLen = CoutryIeLen;
  18871. + memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe,CoutryIeLen);
  18872. + pDot11dInfo->State = DOT11D_STATE_LEARNED;
  18873. +}
  18874. +
  18875. +void dump_chnl_map(u8 * channel_map)
  18876. +{
  18877. + int i;
  18878. + printk("Channel List:");
  18879. + for(i=1; i<= MAX_CHANNEL_NUMBER; i++)
  18880. + if(channel_map[i] > 0)
  18881. + printk(" %d(%d)", i, channel_map[i]);
  18882. + printk("\n");
  18883. +}
  18884. +
  18885. +u8
  18886. +DOT11D_GetMaxTxPwrInDbm(
  18887. + struct ieee80211_device *dev,
  18888. + u8 Channel
  18889. + )
  18890. +{
  18891. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
  18892. + u8 MaxTxPwrInDbm = 255;
  18893. +
  18894. + if(MAX_CHANNEL_NUMBER < Channel)
  18895. + {
  18896. + printk("DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
  18897. + return MaxTxPwrInDbm;
  18898. + }
  18899. + if(pDot11dInfo->channel_map[Channel])
  18900. + {
  18901. + MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
  18902. + }
  18903. +
  18904. + return MaxTxPwrInDbm;
  18905. +}
  18906. +
  18907. +
  18908. +void
  18909. +DOT11D_ScanComplete(
  18910. + struct ieee80211_device * dev
  18911. + )
  18912. +{
  18913. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
  18914. +
  18915. + switch(pDot11dInfo->State)
  18916. + {
  18917. + case DOT11D_STATE_LEARNED:
  18918. + pDot11dInfo->State = DOT11D_STATE_DONE;
  18919. + break;
  18920. +
  18921. + case DOT11D_STATE_DONE:
  18922. + if( GET_CIE_WATCHDOG(dev) == 0 )
  18923. + { // Reset country IE if previous one is gone.
  18924. + Dot11d_Reset(dev);
  18925. + }
  18926. + break;
  18927. + case DOT11D_STATE_NONE:
  18928. + break;
  18929. + }
  18930. +}
  18931. +
  18932. +int IsLegalChannel(
  18933. + struct ieee80211_device * dev,
  18934. + u8 channel
  18935. +)
  18936. +{
  18937. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
  18938. +
  18939. + if(MAX_CHANNEL_NUMBER < channel)
  18940. + {
  18941. + printk("IsLegalChannel(): Invalid Channel\n");
  18942. + return 0;
  18943. + }
  18944. + if(pDot11dInfo->channel_map[channel] > 0)
  18945. + return 1;
  18946. + return 0;
  18947. +}
  18948. +
  18949. +int ToLegalChannel(
  18950. + struct ieee80211_device * dev,
  18951. + u8 channel
  18952. +)
  18953. +{
  18954. + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
  18955. + u8 default_chn = 0;
  18956. + u32 i = 0;
  18957. +
  18958. + for (i=1; i<= MAX_CHANNEL_NUMBER; i++)
  18959. + {
  18960. + if(pDot11dInfo->channel_map[i] > 0)
  18961. + {
  18962. + default_chn = i;
  18963. + break;
  18964. + }
  18965. + }
  18966. +
  18967. + if(MAX_CHANNEL_NUMBER < channel)
  18968. + {
  18969. + printk("IsLegalChannel(): Invalid Channel\n");
  18970. + return default_chn;
  18971. + }
  18972. +
  18973. + if(pDot11dInfo->channel_map[channel] > 0)
  18974. + return channel;
  18975. +
  18976. + return default_chn;
  18977. +}
  18978. +
  18979. +EXPORT_SYMBOL(Dot11d_Init);
  18980. +EXPORT_SYMBOL(Dot11d_Reset);
  18981. +EXPORT_SYMBOL(Dot11d_UpdateCountryIe);
  18982. +EXPORT_SYMBOL(DOT11D_GetMaxTxPwrInDbm);
  18983. +EXPORT_SYMBOL(DOT11D_ScanComplete);
  18984. +EXPORT_SYMBOL(IsLegalChannel);
  18985. +EXPORT_SYMBOL(ToLegalChannel);
  18986. +#endif
  18987. +
  18988. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/dot11d.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/dot11d.h
  18989. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/dot11d.h 1970-01-01 01:00:00.000000000 +0100
  18990. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/dot11d.h 2009-08-23 19:01:04.000000000 +0200
  18991. @@ -0,0 +1,102 @@
  18992. +#ifndef __INC_DOT11D_H
  18993. +#define __INC_DOT11D_H
  18994. +
  18995. +#include "ieee80211.h"
  18996. +
  18997. +//#define ENABLE_DOT11D
  18998. +
  18999. +//#define DOT11D_MAX_CHNL_NUM 83
  19000. +
  19001. +typedef struct _CHNL_TXPOWER_TRIPLE {
  19002. + u8 FirstChnl;
  19003. + u8 NumChnls;
  19004. + u8 MaxTxPowerInDbm;
  19005. +}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
  19006. +
  19007. +typedef enum _DOT11D_STATE {
  19008. + DOT11D_STATE_NONE = 0,
  19009. + DOT11D_STATE_LEARNED,
  19010. + DOT11D_STATE_DONE,
  19011. +}DOT11D_STATE;
  19012. +
  19013. +typedef struct _RT_DOT11D_INFO {
  19014. + //DECLARE_RT_OBJECT(RT_DOT11D_INFO);
  19015. +
  19016. + bool bEnabled; // dot11MultiDomainCapabilityEnabled
  19017. +
  19018. + u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.
  19019. + u8 CountryIeBuf[MAX_IE_LEN];
  19020. + u8 CountryIeSrcAddr[6]; // Source AP of the country IE.
  19021. + u8 CountryIeWatchdog;
  19022. +
  19023. + u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)
  19024. + //u8 ChnlListLen; // #Bytes valid in ChnlList[].
  19025. + //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
  19026. + u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
  19027. +
  19028. + DOT11D_STATE State;
  19029. +}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
  19030. +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
  19031. +#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
  19032. +#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
  19033. +
  19034. +#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
  19035. +#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
  19036. +
  19037. +#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
  19038. +#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
  19039. +
  19040. +#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
  19041. + (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
  19042. + FALSE : \
  19043. + (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
  19044. +
  19045. +#define CIE_WATCHDOG_TH 1
  19046. +#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
  19047. +#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
  19048. +#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
  19049. +
  19050. +#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
  19051. +
  19052. +
  19053. +void
  19054. +Dot11d_Init(
  19055. + struct ieee80211_device *dev
  19056. + );
  19057. +
  19058. +void
  19059. +Dot11d_Reset(
  19060. + struct ieee80211_device *dev
  19061. + );
  19062. +
  19063. +void
  19064. +Dot11d_UpdateCountryIe(
  19065. + struct ieee80211_device *dev,
  19066. + u8 * pTaddr,
  19067. + u16 CoutryIeLen,
  19068. + u8 * pCoutryIe
  19069. + );
  19070. +
  19071. +u8
  19072. +DOT11D_GetMaxTxPwrInDbm(
  19073. + struct ieee80211_device *dev,
  19074. + u8 Channel
  19075. + );
  19076. +
  19077. +void
  19078. +DOT11D_ScanComplete(
  19079. + struct ieee80211_device * dev
  19080. + );
  19081. +
  19082. +int IsLegalChannel(
  19083. + struct ieee80211_device * dev,
  19084. + u8 channel
  19085. +);
  19086. +
  19087. +int ToLegalChannel(
  19088. + struct ieee80211_device * dev,
  19089. + u8 channel
  19090. +);
  19091. +
  19092. +void dump_chnl_map(u8 * channel_map);
  19093. +#endif // #ifndef __INC_DOT11D_H
  19094. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.c
  19095. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.c 1970-01-01 01:00:00.000000000 +0100
  19096. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.c 2009-08-23 19:01:04.000000000 +0200
  19097. @@ -0,0 +1,275 @@
  19098. +/*
  19099. + * Host AP crypto routines
  19100. + *
  19101. + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  19102. + * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
  19103. + *
  19104. + * This program is free software; you can redistribute it and/or modify
  19105. + * it under the terms of the GNU General Public License version 2 as
  19106. + * published by the Free Software Foundation. See README and COPYING for
  19107. + * more details.
  19108. + *
  19109. + */
  19110. +
  19111. +//#include <linux/config.h>
  19112. +#include <linux/version.h>
  19113. +#include <linux/module.h>
  19114. +#include <linux/init.h>
  19115. +#include <linux/slab.h>
  19116. +#include <asm/string.h>
  19117. +#include <asm/errno.h>
  19118. +
  19119. +#include "ieee80211.h"
  19120. +
  19121. +MODULE_AUTHOR("Jouni Malinen");
  19122. +MODULE_DESCRIPTION("HostAP crypto");
  19123. +MODULE_LICENSE("GPL");
  19124. +
  19125. +struct ieee80211_crypto_alg {
  19126. + struct list_head list;
  19127. + struct ieee80211_crypto_ops *ops;
  19128. +};
  19129. +
  19130. +
  19131. +struct ieee80211_crypto {
  19132. + struct list_head algs;
  19133. + spinlock_t lock;
  19134. +};
  19135. +
  19136. +static struct ieee80211_crypto *hcrypt;
  19137. +
  19138. +void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
  19139. + int force)
  19140. +{
  19141. + struct list_head *ptr, *n;
  19142. + struct ieee80211_crypt_data *entry;
  19143. +
  19144. + for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
  19145. + ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
  19146. + entry = list_entry(ptr, struct ieee80211_crypt_data, list);
  19147. +
  19148. + if (atomic_read(&entry->refcnt) != 0 && !force)
  19149. + continue;
  19150. +
  19151. + list_del(ptr);
  19152. +
  19153. + if (entry->ops) {
  19154. + entry->ops->deinit(entry->priv);
  19155. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  19156. + module_put(entry->ops->owner);
  19157. +#else
  19158. + __MOD_DEC_USE_COUNT(entry->ops->owner);
  19159. +#endif
  19160. + }
  19161. + kfree(entry);
  19162. + }
  19163. +}
  19164. +
  19165. +void ieee80211_crypt_deinit_handler(unsigned long data)
  19166. +{
  19167. + struct ieee80211_device *ieee = (struct ieee80211_device *)data;
  19168. + unsigned long flags;
  19169. +
  19170. + spin_lock_irqsave(&ieee->lock, flags);
  19171. + ieee80211_crypt_deinit_entries(ieee, 0);
  19172. + if (!list_empty(&ieee->crypt_deinit_list)) {
  19173. + printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
  19174. + "deletion list\n", ieee->dev->name);
  19175. + ieee->crypt_deinit_timer.expires = jiffies + HZ;
  19176. + add_timer(&ieee->crypt_deinit_timer);
  19177. + }
  19178. + spin_unlock_irqrestore(&ieee->lock, flags);
  19179. +
  19180. +}
  19181. +
  19182. +void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
  19183. + struct ieee80211_crypt_data **crypt)
  19184. +{
  19185. + struct ieee80211_crypt_data *tmp;
  19186. + unsigned long flags;
  19187. +
  19188. + if (*crypt == NULL)
  19189. + return;
  19190. +
  19191. + tmp = *crypt;
  19192. + *crypt = NULL;
  19193. +
  19194. + /* must not run ops->deinit() while there may be pending encrypt or
  19195. + * decrypt operations. Use a list of delayed deinits to avoid needing
  19196. + * locking. */
  19197. +
  19198. + spin_lock_irqsave(&ieee->lock, flags);
  19199. + list_add(&tmp->list, &ieee->crypt_deinit_list);
  19200. + if (!timer_pending(&ieee->crypt_deinit_timer)) {
  19201. + ieee->crypt_deinit_timer.expires = jiffies + HZ;
  19202. + add_timer(&ieee->crypt_deinit_timer);
  19203. + }
  19204. + spin_unlock_irqrestore(&ieee->lock, flags);
  19205. +}
  19206. +
  19207. +int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
  19208. +{
  19209. + unsigned long flags;
  19210. + struct ieee80211_crypto_alg *alg;
  19211. +
  19212. + if (hcrypt == NULL)
  19213. + return -1;
  19214. +
  19215. + alg = kmalloc(sizeof(*alg), GFP_KERNEL);
  19216. + if (alg == NULL)
  19217. + return -ENOMEM;
  19218. +
  19219. + memset(alg, 0, sizeof(*alg));
  19220. + alg->ops = ops;
  19221. +
  19222. + spin_lock_irqsave(&hcrypt->lock, flags);
  19223. + list_add(&alg->list, &hcrypt->algs);
  19224. + spin_unlock_irqrestore(&hcrypt->lock, flags);
  19225. +
  19226. + printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
  19227. + ops->name);
  19228. +
  19229. + return 0;
  19230. +}
  19231. +
  19232. +int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
  19233. +{
  19234. + unsigned long flags;
  19235. + struct list_head *ptr;
  19236. + struct ieee80211_crypto_alg *del_alg = NULL;
  19237. +
  19238. + if (hcrypt == NULL)
  19239. + return -1;
  19240. +
  19241. + spin_lock_irqsave(&hcrypt->lock, flags);
  19242. + for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
  19243. + struct ieee80211_crypto_alg *alg =
  19244. + (struct ieee80211_crypto_alg *) ptr;
  19245. + if (alg->ops == ops) {
  19246. + list_del(&alg->list);
  19247. + del_alg = alg;
  19248. + break;
  19249. + }
  19250. + }
  19251. + spin_unlock_irqrestore(&hcrypt->lock, flags);
  19252. +
  19253. + if (del_alg) {
  19254. + printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
  19255. + "'%s'\n", ops->name);
  19256. + kfree(del_alg);
  19257. + }
  19258. +
  19259. + return del_alg ? 0 : -1;
  19260. +}
  19261. +
  19262. +
  19263. +struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
  19264. +{
  19265. + unsigned long flags;
  19266. + struct list_head *ptr;
  19267. + struct ieee80211_crypto_alg *found_alg = NULL;
  19268. +
  19269. + if (hcrypt == NULL)
  19270. + return NULL;
  19271. +
  19272. + spin_lock_irqsave(&hcrypt->lock, flags);
  19273. + for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
  19274. + struct ieee80211_crypto_alg *alg =
  19275. + (struct ieee80211_crypto_alg *) ptr;
  19276. + if (strcmp(alg->ops->name, name) == 0) {
  19277. + found_alg = alg;
  19278. + break;
  19279. + }
  19280. + }
  19281. + spin_unlock_irqrestore(&hcrypt->lock, flags);
  19282. +
  19283. + if (found_alg)
  19284. + return found_alg->ops;
  19285. + else
  19286. + return NULL;
  19287. +}
  19288. +
  19289. +
  19290. +static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
  19291. +static void ieee80211_crypt_null_deinit(void *priv) {}
  19292. +
  19293. +static struct ieee80211_crypto_ops ieee80211_crypt_null = {
  19294. + .name = "NULL",
  19295. + .init = ieee80211_crypt_null_init,
  19296. + .deinit = ieee80211_crypt_null_deinit,
  19297. + .encrypt_mpdu = NULL,
  19298. + .decrypt_mpdu = NULL,
  19299. + .encrypt_msdu = NULL,
  19300. + .decrypt_msdu = NULL,
  19301. + .set_key = NULL,
  19302. + .get_key = NULL,
  19303. + .extra_prefix_len = 0,
  19304. + .extra_postfix_len = 0,
  19305. + .owner = THIS_MODULE,
  19306. +};
  19307. +
  19308. +
  19309. +int __init ieee80211_crypto_init(void)
  19310. +{
  19311. + int ret = -ENOMEM;
  19312. +
  19313. + hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
  19314. + if (!hcrypt)
  19315. + goto out;
  19316. +
  19317. + memset(hcrypt, 0, sizeof(*hcrypt));
  19318. + INIT_LIST_HEAD(&hcrypt->algs);
  19319. + spin_lock_init(&hcrypt->lock);
  19320. +
  19321. + ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
  19322. + if (ret < 0) {
  19323. + kfree(hcrypt);
  19324. + hcrypt = NULL;
  19325. + }
  19326. +out:
  19327. + return ret;
  19328. +}
  19329. +
  19330. +
  19331. +void __exit ieee80211_crypto_deinit(void)
  19332. +{
  19333. + struct list_head *ptr, *n;
  19334. +
  19335. + if (hcrypt == NULL)
  19336. + return;
  19337. +
  19338. + for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
  19339. + ptr = n, n = ptr->next) {
  19340. + struct ieee80211_crypto_alg *alg =
  19341. + (struct ieee80211_crypto_alg *) ptr;
  19342. + list_del(ptr);
  19343. + printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
  19344. + "'%s' (deinit)\n", alg->ops->name);
  19345. + kfree(alg);
  19346. + }
  19347. +
  19348. + kfree(hcrypt);
  19349. +}
  19350. +
  19351. +#if 0
  19352. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  19353. +EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);
  19354. +EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);
  19355. +EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);
  19356. +
  19357. +EXPORT_SYMBOL(ieee80211_register_crypto_ops);
  19358. +EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);
  19359. +EXPORT_SYMBOL(ieee80211_get_crypto_ops);
  19360. +#else
  19361. +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_entries);
  19362. +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_handler);
  19363. +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_delayed_deinit);
  19364. +
  19365. +EXPORT_SYMBOL_NOVERS(ieee80211_register_crypto_ops);
  19366. +EXPORT_SYMBOL_NOVERS(ieee80211_unregister_crypto_ops);
  19367. +EXPORT_SYMBOL_NOVERS(ieee80211_get_crypto_ops);
  19368. +#endif
  19369. +
  19370. +module_init(ieee80211_crypto_init);
  19371. +module_exit(ieee80211_crypto_deinit);
  19372. +#endif
  19373. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_ccmp.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_ccmp.c
  19374. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_ccmp.c 1970-01-01 01:00:00.000000000 +0100
  19375. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_ccmp.c 2009-08-23 19:01:04.000000000 +0200
  19376. @@ -0,0 +1,524 @@
  19377. +/*
  19378. + * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
  19379. + *
  19380. + * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
  19381. + *
  19382. + * This program is free software; you can redistribute it and/or modify
  19383. + * it under the terms of the GNU General Public License version 2 as
  19384. + * published by the Free Software Foundation. See README and COPYING for
  19385. + * more details.
  19386. + */
  19387. +
  19388. +//#include <linux/config.h>
  19389. +#include <linux/version.h>
  19390. +#include <linux/module.h>
  19391. +#include <linux/init.h>
  19392. +#include <linux/slab.h>
  19393. +#include <linux/random.h>
  19394. +#include <linux/skbuff.h>
  19395. +#include <linux/netdevice.h>
  19396. +#include <linux/if_ether.h>
  19397. +#include <linux/if_arp.h>
  19398. +#include <asm/string.h>
  19399. +#include <linux/wireless.h>
  19400. +
  19401. +#include "ieee80211.h"
  19402. +
  19403. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
  19404. +#include "rtl_crypto.h"
  19405. +#else
  19406. +#include <linux/crypto.h>
  19407. +#endif
  19408. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  19409. + #include <asm/scatterlist.h>
  19410. +#else
  19411. + #include <linux/scatterlist.h>
  19412. +#endif
  19413. +
  19414. +//#include <asm/scatterlist.h>
  19415. +
  19416. +MODULE_AUTHOR("Jouni Malinen");
  19417. +MODULE_DESCRIPTION("Host AP crypt: CCMP");
  19418. +MODULE_LICENSE("GPL");
  19419. +
  19420. +#define AES_BLOCK_LEN 16
  19421. +#define CCMP_HDR_LEN 8
  19422. +#define CCMP_MIC_LEN 8
  19423. +#define CCMP_TK_LEN 16
  19424. +#define CCMP_PN_LEN 6
  19425. +
  19426. +struct ieee80211_ccmp_data {
  19427. + u8 key[CCMP_TK_LEN];
  19428. + int key_set;
  19429. +
  19430. + u8 tx_pn[CCMP_PN_LEN];
  19431. + u8 rx_pn[CCMP_PN_LEN];
  19432. +
  19433. + u32 dot11RSNAStatsCCMPFormatErrors;
  19434. + u32 dot11RSNAStatsCCMPReplays;
  19435. + u32 dot11RSNAStatsCCMPDecryptErrors;
  19436. +
  19437. + int key_idx;
  19438. +
  19439. + struct crypto_tfm *tfm;
  19440. +
  19441. + /* scratch buffers for virt_to_page() (crypto API) */
  19442. + u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
  19443. + tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
  19444. + u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
  19445. +};
  19446. +
  19447. +void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
  19448. + const u8 pt[16], u8 ct[16])
  19449. +{
  19450. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  19451. + struct scatterlist src, dst;
  19452. +
  19453. + src.page = virt_to_page(pt);
  19454. + src.offset = offset_in_page(pt);
  19455. + src.length = AES_BLOCK_LEN;
  19456. +
  19457. + dst.page = virt_to_page(ct);
  19458. + dst.offset = offset_in_page(ct);
  19459. + dst.length = AES_BLOCK_LEN;
  19460. +
  19461. + crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
  19462. + #else
  19463. + crypto_cipher_encrypt_one((void*)tfm, ct, pt);
  19464. + #endif
  19465. +}
  19466. +
  19467. +static void * ieee80211_ccmp_init(int key_idx)
  19468. +{
  19469. + struct ieee80211_ccmp_data *priv;
  19470. +
  19471. + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
  19472. + if (priv == NULL)
  19473. + goto fail;
  19474. + memset(priv, 0, sizeof(*priv));
  19475. + priv->key_idx = key_idx;
  19476. +
  19477. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  19478. + priv->tfm = crypto_alloc_tfm("aes", 0);
  19479. + if (priv->tfm == NULL) {
  19480. + printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
  19481. + "crypto API aes\n");
  19482. + goto fail;
  19483. + }
  19484. + #else
  19485. + priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
  19486. + if (IS_ERR(priv->tfm)) {
  19487. + printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
  19488. + "crypto API aes\n");
  19489. + priv->tfm = NULL;
  19490. + goto fail;
  19491. + }
  19492. + #endif
  19493. + return priv;
  19494. +
  19495. +fail:
  19496. + if (priv) {
  19497. + if (priv->tfm)
  19498. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  19499. + crypto_free_tfm(priv->tfm);
  19500. + #else
  19501. + crypto_free_cipher((void*)priv->tfm);
  19502. + #endif
  19503. + kfree(priv);
  19504. + }
  19505. +
  19506. + return NULL;
  19507. +}
  19508. +
  19509. +
  19510. +static void ieee80211_ccmp_deinit(void *priv)
  19511. +{
  19512. + struct ieee80211_ccmp_data *_priv = priv;
  19513. + if (_priv && _priv->tfm)
  19514. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  19515. + crypto_free_tfm(_priv->tfm);
  19516. + #else
  19517. + crypto_free_cipher((void*)_priv->tfm);
  19518. + #endif
  19519. + kfree(priv);
  19520. +}
  19521. +
  19522. +
  19523. +static inline void xor_block(u8 *b, u8 *a, size_t len)
  19524. +{
  19525. + int i;
  19526. + for (i = 0; i < len; i++)
  19527. + b[i] ^= a[i];
  19528. +}
  19529. +
  19530. +#ifndef JOHN_CCMP
  19531. +static void ccmp_init_blocks(struct crypto_tfm *tfm,
  19532. + struct ieee80211_hdr *hdr,
  19533. + u8 *pn, size_t dlen, u8 *b0, u8 *auth,
  19534. + u8 *s0)
  19535. +{
  19536. + u8 *pos, qc = 0;
  19537. + size_t aad_len;
  19538. + u16 fc;
  19539. + int a4_included, qc_included;
  19540. + u8 aad[2 * AES_BLOCK_LEN];
  19541. +
  19542. + fc = le16_to_cpu(hdr->frame_ctl);
  19543. + a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
  19544. + (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
  19545. + /*
  19546. + qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
  19547. + (WLAN_FC_GET_STYPE(fc) & 0x08));
  19548. + */
  19549. + // fixed by David :2006.9.6
  19550. + qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
  19551. + (WLAN_FC_GET_STYPE(fc) & 0x80));
  19552. + aad_len = 22;
  19553. + if (a4_included)
  19554. + aad_len += 6;
  19555. + if (qc_included) {
  19556. + pos = (u8 *) &hdr->addr4;
  19557. + if (a4_included)
  19558. + pos += 6;
  19559. + qc = *pos & 0x0f;
  19560. + aad_len += 2;
  19561. + }
  19562. + /* CCM Initial Block:
  19563. + * Flag (Include authentication header, M=3 (8-octet MIC),
  19564. + * L=1 (2-octet Dlen))
  19565. + * Nonce: 0x00 | A2 | PN
  19566. + * Dlen */
  19567. + b0[0] = 0x59;
  19568. + b0[1] = qc;
  19569. + memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
  19570. + memcpy(b0 + 8, pn, CCMP_PN_LEN);
  19571. + b0[14] = (dlen >> 8) & 0xff;
  19572. + b0[15] = dlen & 0xff;
  19573. +
  19574. + /* AAD:
  19575. + * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
  19576. + * A1 | A2 | A3
  19577. + * SC with bits 4..15 (seq#) masked to zero
  19578. + * A4 (if present)
  19579. + * QC (if present)
  19580. + */
  19581. + pos = (u8 *) hdr;
  19582. + aad[0] = 0; /* aad_len >> 8 */
  19583. + aad[1] = aad_len & 0xff;
  19584. + aad[2] = pos[0] & 0x8f;
  19585. + aad[3] = pos[1] & 0xc7;
  19586. + memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
  19587. + pos = (u8 *) &hdr->seq_ctl;
  19588. + aad[22] = pos[0] & 0x0f;
  19589. + aad[23] = 0; /* all bits masked */
  19590. + memset(aad + 24, 0, 8);
  19591. + if (a4_included)
  19592. + memcpy(aad + 24, hdr->addr4, ETH_ALEN);
  19593. + if (qc_included) {
  19594. + aad[a4_included ? 30 : 24] = qc;
  19595. + /* rest of QC masked */
  19596. + }
  19597. +
  19598. + /* Start with the first block and AAD */
  19599. + ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
  19600. + xor_block(auth, aad, AES_BLOCK_LEN);
  19601. + ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
  19602. + xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
  19603. + ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
  19604. + b0[0] &= 0x07;
  19605. + b0[14] = b0[15] = 0;
  19606. + ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
  19607. +}
  19608. +#endif
  19609. +
  19610. +static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
  19611. +{
  19612. + struct ieee80211_ccmp_data *key = priv;
  19613. + int data_len, i;
  19614. + u8 *pos;
  19615. + struct ieee80211_hdr *hdr;
  19616. +#ifndef JOHN_CCMP
  19617. + int blocks, last, len;
  19618. + u8 *mic;
  19619. + u8 *b0 = key->tx_b0;
  19620. + u8 *b = key->tx_b;
  19621. + u8 *e = key->tx_e;
  19622. + u8 *s0 = key->tx_s0;
  19623. +#endif
  19624. + if (skb_headroom(skb) < CCMP_HDR_LEN ||
  19625. + skb_tailroom(skb) < CCMP_MIC_LEN ||
  19626. + skb->len < hdr_len)
  19627. + return -1;
  19628. +
  19629. + data_len = skb->len - hdr_len;
  19630. + pos = skb_push(skb, CCMP_HDR_LEN);
  19631. + memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
  19632. + pos += hdr_len;
  19633. +// mic = skb_put(skb, CCMP_MIC_LEN);
  19634. +
  19635. + i = CCMP_PN_LEN - 1;
  19636. + while (i >= 0) {
  19637. + key->tx_pn[i]++;
  19638. + if (key->tx_pn[i] != 0)
  19639. + break;
  19640. + i--;
  19641. + }
  19642. +
  19643. + *pos++ = key->tx_pn[5];
  19644. + *pos++ = key->tx_pn[4];
  19645. + *pos++ = 0;
  19646. + *pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
  19647. + *pos++ = key->tx_pn[3];
  19648. + *pos++ = key->tx_pn[2];
  19649. + *pos++ = key->tx_pn[1];
  19650. + *pos++ = key->tx_pn[0];
  19651. +
  19652. + hdr = (struct ieee80211_hdr *) skb->data;
  19653. +#ifndef JOHN_CCMP
  19654. + //mic is moved to here by john
  19655. + mic = skb_put(skb, CCMP_MIC_LEN);
  19656. +
  19657. + ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
  19658. +
  19659. + blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
  19660. + last = data_len % AES_BLOCK_LEN;
  19661. +
  19662. + for (i = 1; i <= blocks; i++) {
  19663. + len = (i == blocks && last) ? last : AES_BLOCK_LEN;
  19664. + /* Authentication */
  19665. + xor_block(b, pos, len);
  19666. + ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
  19667. + /* Encryption, with counter */
  19668. + b0[14] = (i >> 8) & 0xff;
  19669. + b0[15] = i & 0xff;
  19670. + ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
  19671. + xor_block(pos, e, len);
  19672. + pos += len;
  19673. + }
  19674. +
  19675. + for (i = 0; i < CCMP_MIC_LEN; i++)
  19676. + mic[i] = b[i] ^ s0[i];
  19677. +#endif
  19678. + return 0;
  19679. +}
  19680. +
  19681. +
  19682. +static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
  19683. +{
  19684. + struct ieee80211_ccmp_data *key = priv;
  19685. + u8 keyidx, *pos;
  19686. + struct ieee80211_hdr *hdr;
  19687. + u8 pn[6];
  19688. +#ifndef JOHN_CCMP
  19689. + size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
  19690. + u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
  19691. + u8 *b0 = key->rx_b0;
  19692. + u8 *b = key->rx_b;
  19693. + u8 *a = key->rx_a;
  19694. + int i, blocks, last, len;
  19695. +#endif
  19696. + if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
  19697. + key->dot11RSNAStatsCCMPFormatErrors++;
  19698. + return -1;
  19699. + }
  19700. +
  19701. + hdr = (struct ieee80211_hdr *) skb->data;
  19702. + pos = skb->data + hdr_len;
  19703. + keyidx = pos[3];
  19704. + if (!(keyidx & (1 << 5))) {
  19705. + if (net_ratelimit()) {
  19706. + printk(KERN_DEBUG "CCMP: received packet without ExtIV"
  19707. + " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
  19708. + }
  19709. + key->dot11RSNAStatsCCMPFormatErrors++;
  19710. + return -2;
  19711. + }
  19712. + keyidx >>= 6;
  19713. + if (key->key_idx != keyidx) {
  19714. + printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
  19715. + "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
  19716. + return -6;
  19717. + }
  19718. + if (!key->key_set) {
  19719. + if (net_ratelimit()) {
  19720. + printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
  19721. + " with keyid=%d that does not have a configured"
  19722. + " key\n", MAC_ARG(hdr->addr2), keyidx);
  19723. + }
  19724. + return -3;
  19725. + }
  19726. +
  19727. + pn[0] = pos[7];
  19728. + pn[1] = pos[6];
  19729. + pn[2] = pos[5];
  19730. + pn[3] = pos[4];
  19731. + pn[4] = pos[1];
  19732. + pn[5] = pos[0];
  19733. + pos += 8;
  19734. +#if 0
  19735. + if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
  19736. + if (net_ratelimit()) {
  19737. + printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT
  19738. + " previous PN %02x%02x%02x%02x%02x%02x "
  19739. + "received PN %02x%02x%02x%02x%02x%02x\n",
  19740. + MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn),
  19741. + MAC_ARG(pn));
  19742. + }
  19743. + key->dot11RSNAStatsCCMPReplays++;
  19744. + return -4;
  19745. + }
  19746. +#endif
  19747. +#ifndef JOHN_CCMP
  19748. + ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
  19749. + xor_block(mic, b, CCMP_MIC_LEN);
  19750. +
  19751. + blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
  19752. + last = data_len % AES_BLOCK_LEN;
  19753. +
  19754. + for (i = 1; i <= blocks; i++) {
  19755. + len = (i == blocks && last) ? last : AES_BLOCK_LEN;
  19756. + /* Decrypt, with counter */
  19757. + b0[14] = (i >> 8) & 0xff;
  19758. + b0[15] = i & 0xff;
  19759. + ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
  19760. + xor_block(pos, b, len);
  19761. + /* Authentication */
  19762. + xor_block(a, pos, len);
  19763. + ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
  19764. + pos += len;
  19765. + }
  19766. +
  19767. + if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
  19768. + if (net_ratelimit()) {
  19769. + printk(KERN_DEBUG "CCMP: decrypt failed: STA="
  19770. + MAC_FMT "\n", MAC_ARG(hdr->addr2));
  19771. + }
  19772. + key->dot11RSNAStatsCCMPDecryptErrors++;
  19773. + return -5;
  19774. + }
  19775. +
  19776. + memcpy(key->rx_pn, pn, CCMP_PN_LEN);
  19777. +
  19778. +#endif
  19779. + /* Remove hdr and MIC */
  19780. + memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
  19781. + skb_pull(skb, CCMP_HDR_LEN);
  19782. + skb_trim(skb, skb->len - CCMP_MIC_LEN);
  19783. +
  19784. + return keyidx;
  19785. +}
  19786. +
  19787. +
  19788. +static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
  19789. +{
  19790. + struct ieee80211_ccmp_data *data = priv;
  19791. + int keyidx;
  19792. + struct crypto_tfm *tfm = data->tfm;
  19793. +
  19794. + keyidx = data->key_idx;
  19795. + memset(data, 0, sizeof(*data));
  19796. + data->key_idx = keyidx;
  19797. + data->tfm = tfm;
  19798. + if (len == CCMP_TK_LEN) {
  19799. + memcpy(data->key, key, CCMP_TK_LEN);
  19800. + data->key_set = 1;
  19801. + if (seq) {
  19802. + data->rx_pn[0] = seq[5];
  19803. + data->rx_pn[1] = seq[4];
  19804. + data->rx_pn[2] = seq[3];
  19805. + data->rx_pn[3] = seq[2];
  19806. + data->rx_pn[4] = seq[1];
  19807. + data->rx_pn[5] = seq[0];
  19808. + }
  19809. + crypto_cipher_setkey((void*)data->tfm, data->key, CCMP_TK_LEN);
  19810. + } else if (len == 0)
  19811. + data->key_set = 0;
  19812. + else
  19813. + return -1;
  19814. +
  19815. + return 0;
  19816. +}
  19817. +
  19818. +
  19819. +static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
  19820. +{
  19821. + struct ieee80211_ccmp_data *data = priv;
  19822. +
  19823. + if (len < CCMP_TK_LEN)
  19824. + return -1;
  19825. +
  19826. + if (!data->key_set)
  19827. + return 0;
  19828. + memcpy(key, data->key, CCMP_TK_LEN);
  19829. +
  19830. + if (seq) {
  19831. + seq[0] = data->tx_pn[5];
  19832. + seq[1] = data->tx_pn[4];
  19833. + seq[2] = data->tx_pn[3];
  19834. + seq[3] = data->tx_pn[2];
  19835. + seq[4] = data->tx_pn[1];
  19836. + seq[5] = data->tx_pn[0];
  19837. + }
  19838. +
  19839. + return CCMP_TK_LEN;
  19840. +}
  19841. +
  19842. +
  19843. +static char * ieee80211_ccmp_print_stats(char *p, void *priv)
  19844. +{
  19845. + struct ieee80211_ccmp_data *ccmp = priv;
  19846. + p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
  19847. + "tx_pn=%02x%02x%02x%02x%02x%02x "
  19848. + "rx_pn=%02x%02x%02x%02x%02x%02x "
  19849. + "format_errors=%d replays=%d decrypt_errors=%d\n",
  19850. + ccmp->key_idx, ccmp->key_set,
  19851. + MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
  19852. + ccmp->dot11RSNAStatsCCMPFormatErrors,
  19853. + ccmp->dot11RSNAStatsCCMPReplays,
  19854. + ccmp->dot11RSNAStatsCCMPDecryptErrors);
  19855. +
  19856. + return p;
  19857. +}
  19858. +
  19859. +void ieee80211_ccmp_null(void)
  19860. +{
  19861. + // printk("============>%s()\n", __FUNCTION__);
  19862. + return;
  19863. +}
  19864. +static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
  19865. + .name = "CCMP",
  19866. + .init = ieee80211_ccmp_init,
  19867. + .deinit = ieee80211_ccmp_deinit,
  19868. + .encrypt_mpdu = ieee80211_ccmp_encrypt,
  19869. + .decrypt_mpdu = ieee80211_ccmp_decrypt,
  19870. + .encrypt_msdu = NULL,
  19871. + .decrypt_msdu = NULL,
  19872. + .set_key = ieee80211_ccmp_set_key,
  19873. + .get_key = ieee80211_ccmp_get_key,
  19874. + .print_stats = ieee80211_ccmp_print_stats,
  19875. + .extra_prefix_len = CCMP_HDR_LEN,
  19876. + .extra_postfix_len = CCMP_MIC_LEN,
  19877. + .owner = THIS_MODULE,
  19878. +};
  19879. +
  19880. +
  19881. +int __init ieee80211_crypto_ccmp_init(void)
  19882. +{
  19883. + return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
  19884. +}
  19885. +
  19886. +
  19887. +void __exit ieee80211_crypto_ccmp_exit(void)
  19888. +{
  19889. + ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
  19890. +}
  19891. +#if 0
  19892. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  19893. +EXPORT_SYMBOL(ieee80211_ccmp_null);
  19894. +#else
  19895. +EXPORT_SYMBOL_NOVERS(ieee80211_ccmp_null);
  19896. +#endif
  19897. +
  19898. +module_init(ieee80211_crypto_ccmp_init);
  19899. +module_exit(ieee80211_crypto_ccmp_exit);
  19900. +#endif
  19901. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.h
  19902. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.h 1970-01-01 01:00:00.000000000 +0100
  19903. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt.h 2009-08-23 19:01:04.000000000 +0200
  19904. @@ -0,0 +1,91 @@
  19905. +/*
  19906. + * Original code based on Host AP (software wireless LAN access point) driver
  19907. + * for Intersil Prism2/2.5/3.
  19908. + *
  19909. + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
  19910. + * <jkmaline@cc.hut.fi>
  19911. + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  19912. + *
  19913. + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
  19914. + * <jketreno@linux.intel.com>
  19915. + *
  19916. + * Copyright (c) 2004, Intel Corporation
  19917. + *
  19918. + * This program is free software; you can redistribute it and/or modify
  19919. + * it under the terms of the GNU General Public License version 2 as
  19920. + * published by the Free Software Foundation. See README and COPYING for
  19921. + * more details.
  19922. + */
  19923. +
  19924. +/*
  19925. + * This file defines the interface to the ieee80211 crypto module.
  19926. + */
  19927. +#ifndef IEEE80211_CRYPT_H
  19928. +#define IEEE80211_CRYPT_H
  19929. +
  19930. +#include <linux/skbuff.h>
  19931. +
  19932. +struct ieee80211_crypto_ops {
  19933. + const char *name;
  19934. +
  19935. + /* init new crypto context (e.g., allocate private data space,
  19936. + * select IV, etc.); returns NULL on failure or pointer to allocated
  19937. + * private data on success */
  19938. + void * (*init)(int keyidx);
  19939. +
  19940. + /* deinitialize crypto context and free allocated private data */
  19941. + void (*deinit)(void *priv);
  19942. +
  19943. + /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
  19944. + * value from decrypt_mpdu is passed as the keyidx value for
  19945. + * decrypt_msdu. skb must have enough head and tail room for the
  19946. + * encryption; if not, error will be returned; these functions are
  19947. + * called for all MPDUs (i.e., fragments).
  19948. + */
  19949. + int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
  19950. + int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
  19951. +
  19952. + /* These functions are called for full MSDUs, i.e. full frames.
  19953. + * These can be NULL if full MSDU operations are not needed. */
  19954. + int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
  19955. + int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
  19956. + void *priv);
  19957. +
  19958. + int (*set_key)(void *key, int len, u8 *seq, void *priv);
  19959. + int (*get_key)(void *key, int len, u8 *seq, void *priv);
  19960. +
  19961. + /* procfs handler for printing out key information and possible
  19962. + * statistics */
  19963. + char * (*print_stats)(char *p, void *priv);
  19964. +
  19965. + /* maximum number of bytes added by encryption; encrypt buf is
  19966. + * allocated with extra_prefix_len bytes, copy of in_buf, and
  19967. + * extra_postfix_len; encrypt need not use all this space, but
  19968. + * the result must start at the beginning of the buffer and correct
  19969. + * length must be returned */
  19970. + int extra_prefix_len, extra_postfix_len;
  19971. +
  19972. + struct module *owner;
  19973. +};
  19974. +
  19975. +struct ieee80211_crypt_data {
  19976. + struct list_head list; /* delayed deletion list */
  19977. + struct ieee80211_crypto_ops *ops;
  19978. + void *priv;
  19979. + atomic_t refcnt;
  19980. +};
  19981. +
  19982. +int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
  19983. +int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
  19984. +struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
  19985. +void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
  19986. +void ieee80211_crypt_deinit_handler(unsigned long);
  19987. +void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
  19988. + struct ieee80211_crypt_data **crypt);
  19989. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
  19990. +#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
  19991. +#define crypto_alloc_tfm crypto_alloc_tfm_rtl
  19992. +#define crypto_free_tfm crypto_free_tfm_rtl
  19993. +#endif
  19994. +
  19995. +#endif
  19996. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_tkip.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_tkip.c
  19997. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_tkip.c 1970-01-01 01:00:00.000000000 +0100
  19998. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_tkip.c 2009-08-23 19:01:04.000000000 +0200
  19999. @@ -0,0 +1,996 @@
  20000. +/*
  20001. + * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
  20002. + *
  20003. + * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
  20004. + *
  20005. + * This program is free software; you can redistribute it and/or modify
  20006. + * it under the terms of the GNU General Public License version 2 as
  20007. + * published by the Free Software Foundation. See README and COPYING for
  20008. + * more details.
  20009. + */
  20010. +
  20011. +//#include <linux/config.h>
  20012. +#include <linux/version.h>
  20013. +#include <linux/module.h>
  20014. +#include <linux/init.h>
  20015. +#include <linux/slab.h>
  20016. +#include <linux/random.h>
  20017. +#include <linux/skbuff.h>
  20018. +#include <linux/netdevice.h>
  20019. +#include <linux/if_ether.h>
  20020. +#include <linux/if_arp.h>
  20021. +#include <asm/string.h>
  20022. +
  20023. +#include "ieee80211.h"
  20024. +
  20025. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
  20026. +#include "rtl_crypto.h"
  20027. +#else
  20028. +#include <linux/crypto.h>
  20029. +#endif
  20030. +//#include <asm/scatterlist.h>
  20031. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  20032. + #include <asm/scatterlist.h>
  20033. +#else
  20034. + #include <linux/scatterlist.h>
  20035. +#endif
  20036. +
  20037. +#include <linux/crc32.h>
  20038. +
  20039. +MODULE_AUTHOR("Jouni Malinen");
  20040. +MODULE_DESCRIPTION("Host AP crypt: TKIP");
  20041. +MODULE_LICENSE("GPL");
  20042. +
  20043. +struct ieee80211_tkip_data {
  20044. +#define TKIP_KEY_LEN 32
  20045. + u8 key[TKIP_KEY_LEN];
  20046. + int key_set;
  20047. +
  20048. + u32 tx_iv32;
  20049. + u16 tx_iv16;
  20050. + u16 tx_ttak[5];
  20051. + int tx_phase1_done;
  20052. +
  20053. + u32 rx_iv32;
  20054. + u16 rx_iv16;
  20055. + u16 rx_ttak[5];
  20056. + int rx_phase1_done;
  20057. + u32 rx_iv32_new;
  20058. + u16 rx_iv16_new;
  20059. +
  20060. + u32 dot11RSNAStatsTKIPReplays;
  20061. + u32 dot11RSNAStatsTKIPICVErrors;
  20062. + u32 dot11RSNAStatsTKIPLocalMICFailures;
  20063. +
  20064. + int key_idx;
  20065. +
  20066. + #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
  20067. + struct crypto_blkcipher *rx_tfm_arc4;
  20068. + struct crypto_hash *rx_tfm_michael;
  20069. + struct crypto_blkcipher *tx_tfm_arc4;
  20070. + struct crypto_hash *tx_tfm_michael;
  20071. + #endif
  20072. +
  20073. + struct crypto_tfm *tfm_arc4;
  20074. + struct crypto_tfm *tfm_michael;
  20075. +
  20076. + /* scratch buffers for virt_to_page() (crypto API) */
  20077. + u8 rx_hdr[16], tx_hdr[16];
  20078. +};
  20079. +
  20080. +static void * ieee80211_tkip_init(int key_idx)
  20081. +{
  20082. + struct ieee80211_tkip_data *priv;
  20083. +
  20084. + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
  20085. + if (priv == NULL)
  20086. + goto fail;
  20087. + memset(priv, 0, sizeof(*priv));
  20088. + priv->key_idx = key_idx;
  20089. +
  20090. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20091. + priv->tfm_arc4 = crypto_alloc_tfm("arc4", 0);
  20092. + if (priv->tfm_arc4 == NULL) {
  20093. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20094. + "crypto API arc4\n");
  20095. + goto fail;
  20096. + }
  20097. +
  20098. + priv->tfm_michael = crypto_alloc_tfm("michael_mic", 0);
  20099. + if (priv->tfm_michael == NULL) {
  20100. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20101. + "crypto API michael_mic\n");
  20102. + goto fail;
  20103. + }
  20104. +
  20105. + #else
  20106. + priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
  20107. + CRYPTO_ALG_ASYNC);
  20108. + if (IS_ERR(priv->tx_tfm_arc4)) {
  20109. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20110. + "crypto API arc4\n");
  20111. + priv->tx_tfm_arc4 = NULL;
  20112. + goto fail;
  20113. + }
  20114. +
  20115. + priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
  20116. + CRYPTO_ALG_ASYNC);
  20117. + if (IS_ERR(priv->tx_tfm_michael)) {
  20118. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20119. + "crypto API michael_mic\n");
  20120. + priv->tx_tfm_michael = NULL;
  20121. + goto fail;
  20122. + }
  20123. +
  20124. + priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
  20125. + CRYPTO_ALG_ASYNC);
  20126. + if (IS_ERR(priv->rx_tfm_arc4)) {
  20127. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20128. + "crypto API arc4\n");
  20129. + priv->rx_tfm_arc4 = NULL;
  20130. + goto fail;
  20131. + }
  20132. +
  20133. + priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
  20134. + CRYPTO_ALG_ASYNC);
  20135. + if (IS_ERR(priv->rx_tfm_michael)) {
  20136. + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
  20137. + "crypto API michael_mic\n");
  20138. + priv->rx_tfm_michael = NULL;
  20139. + goto fail;
  20140. + }
  20141. + #endif
  20142. + return priv;
  20143. +
  20144. +fail:
  20145. + if (priv) {
  20146. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20147. + if (priv->tfm_michael)
  20148. + crypto_free_tfm(priv->tfm_michael);
  20149. + if (priv->tfm_arc4)
  20150. + crypto_free_tfm(priv->tfm_arc4);
  20151. + #else
  20152. + if (priv->tx_tfm_michael)
  20153. + crypto_free_hash(priv->tx_tfm_michael);
  20154. + if (priv->tx_tfm_arc4)
  20155. + crypto_free_blkcipher(priv->tx_tfm_arc4);
  20156. + if (priv->rx_tfm_michael)
  20157. + crypto_free_hash(priv->rx_tfm_michael);
  20158. + if (priv->rx_tfm_arc4)
  20159. + crypto_free_blkcipher(priv->rx_tfm_arc4);
  20160. + #endif
  20161. + kfree(priv);
  20162. + }
  20163. +
  20164. + return NULL;
  20165. +}
  20166. +
  20167. +
  20168. +static void ieee80211_tkip_deinit(void *priv)
  20169. +{
  20170. + struct ieee80211_tkip_data *_priv = priv;
  20171. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20172. + if (_priv && _priv->tfm_michael)
  20173. + crypto_free_tfm(_priv->tfm_michael);
  20174. + if (_priv && _priv->tfm_arc4)
  20175. + crypto_free_tfm(_priv->tfm_arc4);
  20176. + #else
  20177. + if (_priv) {
  20178. + if (_priv->tx_tfm_michael)
  20179. + crypto_free_hash(_priv->tx_tfm_michael);
  20180. + if (_priv->tx_tfm_arc4)
  20181. + crypto_free_blkcipher(_priv->tx_tfm_arc4);
  20182. + if (_priv->rx_tfm_michael)
  20183. + crypto_free_hash(_priv->rx_tfm_michael);
  20184. + if (_priv->rx_tfm_arc4)
  20185. + crypto_free_blkcipher(_priv->rx_tfm_arc4);
  20186. + }
  20187. + #endif
  20188. + kfree(priv);
  20189. +}
  20190. +
  20191. +
  20192. +static inline u16 RotR1(u16 val)
  20193. +{
  20194. + return (val >> 1) | (val << 15);
  20195. +}
  20196. +
  20197. +
  20198. +static inline u8 Lo8(u16 val)
  20199. +{
  20200. + return val & 0xff;
  20201. +}
  20202. +
  20203. +
  20204. +static inline u8 Hi8(u16 val)
  20205. +{
  20206. + return val >> 8;
  20207. +}
  20208. +
  20209. +
  20210. +static inline u16 Lo16(u32 val)
  20211. +{
  20212. + return val & 0xffff;
  20213. +}
  20214. +
  20215. +
  20216. +static inline u16 Hi16(u32 val)
  20217. +{
  20218. + return val >> 16;
  20219. +}
  20220. +
  20221. +
  20222. +static inline u16 Mk16(u8 hi, u8 lo)
  20223. +{
  20224. + return lo | (((u16) hi) << 8);
  20225. +}
  20226. +
  20227. +
  20228. +static inline u16 Mk16_le(u16 *v)
  20229. +{
  20230. + return le16_to_cpu(*v);
  20231. +}
  20232. +
  20233. +
  20234. +static const u16 Sbox[256] =
  20235. +{
  20236. + 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
  20237. + 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
  20238. + 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
  20239. + 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
  20240. + 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
  20241. + 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
  20242. + 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
  20243. + 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
  20244. + 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
  20245. + 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
  20246. + 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
  20247. + 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
  20248. + 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
  20249. + 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
  20250. + 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
  20251. + 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
  20252. + 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
  20253. + 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
  20254. + 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
  20255. + 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
  20256. + 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
  20257. + 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
  20258. + 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
  20259. + 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
  20260. + 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
  20261. + 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
  20262. + 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
  20263. + 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
  20264. + 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
  20265. + 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
  20266. + 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
  20267. + 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
  20268. +};
  20269. +
  20270. +
  20271. +static inline u16 _S_(u16 v)
  20272. +{
  20273. + u16 t = Sbox[Hi8(v)];
  20274. + return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
  20275. +}
  20276. +
  20277. +#ifndef JOHN_TKIP
  20278. +#define PHASE1_LOOP_COUNT 8
  20279. +
  20280. +static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
  20281. +{
  20282. + int i, j;
  20283. +
  20284. + /* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
  20285. + TTAK[0] = Lo16(IV32);
  20286. + TTAK[1] = Hi16(IV32);
  20287. + TTAK[2] = Mk16(TA[1], TA[0]);
  20288. + TTAK[3] = Mk16(TA[3], TA[2]);
  20289. + TTAK[4] = Mk16(TA[5], TA[4]);
  20290. +
  20291. + for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
  20292. + j = 2 * (i & 1);
  20293. + TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
  20294. + TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
  20295. + TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
  20296. + TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
  20297. + TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
  20298. + }
  20299. +}
  20300. +
  20301. +
  20302. +static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
  20303. + u16 IV16)
  20304. +{
  20305. + /* Make temporary area overlap WEP seed so that the final copy can be
  20306. + * avoided on little endian hosts. */
  20307. + u16 *PPK = (u16 *) &WEPSeed[4];
  20308. +
  20309. + /* Step 1 - make copy of TTAK and bring in TSC */
  20310. + PPK[0] = TTAK[0];
  20311. + PPK[1] = TTAK[1];
  20312. + PPK[2] = TTAK[2];
  20313. + PPK[3] = TTAK[3];
  20314. + PPK[4] = TTAK[4];
  20315. + PPK[5] = TTAK[4] + IV16;
  20316. +
  20317. + /* Step 2 - 96-bit bijective mixing using S-box */
  20318. + PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
  20319. + PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
  20320. + PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
  20321. + PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
  20322. + PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
  20323. + PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
  20324. +
  20325. + PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
  20326. + PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
  20327. + PPK[2] += RotR1(PPK[1]);
  20328. + PPK[3] += RotR1(PPK[2]);
  20329. + PPK[4] += RotR1(PPK[3]);
  20330. + PPK[5] += RotR1(PPK[4]);
  20331. +
  20332. + /* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
  20333. + * WEPSeed[0..2] is transmitted as WEP IV */
  20334. + WEPSeed[0] = Hi8(IV16);
  20335. + WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
  20336. + WEPSeed[2] = Lo8(IV16);
  20337. + WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
  20338. +
  20339. +#ifdef __BIG_ENDIAN
  20340. + {
  20341. + int i;
  20342. + for (i = 0; i < 6; i++)
  20343. + PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
  20344. + }
  20345. +#endif
  20346. +}
  20347. +#endif
  20348. +static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
  20349. +{
  20350. + struct ieee80211_tkip_data *tkey = priv;
  20351. + #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
  20352. + struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
  20353. + #endif
  20354. + int len;
  20355. + u8 *pos;
  20356. + struct ieee80211_hdr *hdr;
  20357. +#ifndef JOHN_TKIP
  20358. + u8 rc4key[16],*icv;
  20359. + u32 crc;
  20360. + struct scatterlist sg;
  20361. +#endif
  20362. + #if(LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,21))
  20363. + int ret;
  20364. + #endif
  20365. +
  20366. + if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
  20367. + skb->len < hdr_len)
  20368. + return -1;
  20369. +
  20370. + hdr = (struct ieee80211_hdr *) skb->data;
  20371. +#if 0
  20372. +printk("@@ tkey\n");
  20373. +printk("%x|", ((u32*)tkey->key)[0]);
  20374. +printk("%x|", ((u32*)tkey->key)[1]);
  20375. +printk("%x|", ((u32*)tkey->key)[2]);
  20376. +printk("%x|", ((u32*)tkey->key)[3]);
  20377. +printk("%x|", ((u32*)tkey->key)[4]);
  20378. +printk("%x|", ((u32*)tkey->key)[5]);
  20379. +printk("%x|", ((u32*)tkey->key)[6]);
  20380. +printk("%x\n", ((u32*)tkey->key)[7]);
  20381. +#endif
  20382. +
  20383. +#ifndef JOHN_TKIP
  20384. + if (!tkey->tx_phase1_done) {
  20385. + tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
  20386. + tkey->tx_iv32);
  20387. + tkey->tx_phase1_done = 1;
  20388. + }
  20389. + tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
  20390. +
  20391. +#else
  20392. + tkey->tx_phase1_done = 1;
  20393. +#endif /*JOHN_TKIP*/
  20394. +
  20395. + len = skb->len - hdr_len;
  20396. + pos = skb_push(skb, 8);
  20397. + memmove(pos, pos + 8, hdr_len);
  20398. + pos += hdr_len;
  20399. +
  20400. +#ifdef JOHN_TKIP
  20401. + *pos++ = Hi8(tkey->tx_iv16);
  20402. + *pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F;
  20403. + *pos++ = Lo8(tkey->tx_iv16);
  20404. +#else
  20405. + *pos++ = rc4key[0];
  20406. + *pos++ = rc4key[1];
  20407. + *pos++ = rc4key[2];
  20408. +#endif
  20409. + *pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
  20410. + *pos++ = tkey->tx_iv32 & 0xff;
  20411. + *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
  20412. + *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
  20413. + *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
  20414. +#ifndef JOHN_TKIP
  20415. + icv = skb_put(skb, 4);
  20416. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  20417. + crc = ~crc32_le(~0, pos, len);
  20418. +#else
  20419. + crc = ~ether_crc_le(len, pos);
  20420. +#endif
  20421. + icv[0] = crc;
  20422. + icv[1] = crc >> 8;
  20423. + icv[2] = crc >> 16;
  20424. + icv[3] = crc >> 24;
  20425. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20426. + crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
  20427. + sg.page = virt_to_page(pos);
  20428. + sg.offset = offset_in_page(pos);
  20429. + sg.length = len + 4;
  20430. + crypto_cipher_encrypt(tkey->tfm_arc4, &sg, &sg, len + 4);
  20431. + #else
  20432. + crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
  20433. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
  20434. + sg.page = virt_to_page(pos);
  20435. + sg.offset = offset_in_page(pos);
  20436. + sg.length = len + 4;
  20437. + #else
  20438. + sg_init_one(&sg, pos, len + 4);
  20439. + #endif
  20440. + ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
  20441. + #endif
  20442. +#endif
  20443. + tkey->tx_iv16++;
  20444. + if (tkey->tx_iv16 == 0) {
  20445. + tkey->tx_phase1_done = 0;
  20446. + tkey->tx_iv32++;
  20447. + }
  20448. +#ifndef JOHN_TKIP
  20449. + #if(LINUX_VERSION_CODE <KERNEL_VERSION(2,6,21))
  20450. + return 0;
  20451. + #else
  20452. + return ret;
  20453. + #endif
  20454. +#else
  20455. + return 0;
  20456. +#endif
  20457. +}
  20458. +
  20459. +static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
  20460. +{
  20461. + struct ieee80211_tkip_data *tkey = priv;
  20462. + #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
  20463. + struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4};
  20464. + #endif
  20465. + u8 keyidx, *pos;
  20466. + u32 iv32;
  20467. + u16 iv16;
  20468. + struct ieee80211_hdr *hdr;
  20469. +#ifndef JOHN_TKIP
  20470. + u8 icv[4];
  20471. + u32 crc;
  20472. + struct scatterlist sg;
  20473. + u8 rc4key[16];
  20474. + int plen;
  20475. +#endif
  20476. + if (skb->len < hdr_len + 8 + 4)
  20477. + return -1;
  20478. +
  20479. + hdr = (struct ieee80211_hdr *) skb->data;
  20480. + pos = skb->data + hdr_len;
  20481. + keyidx = pos[3];
  20482. + if (!(keyidx & (1 << 5))) {
  20483. + if (net_ratelimit()) {
  20484. + printk(KERN_DEBUG "TKIP: received packet without ExtIV"
  20485. + " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
  20486. + }
  20487. + return -2;
  20488. + }
  20489. + keyidx >>= 6;
  20490. + if (tkey->key_idx != keyidx) {
  20491. + printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
  20492. + "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
  20493. + return -6;
  20494. + }
  20495. + if (!tkey->key_set) {
  20496. + if (net_ratelimit()) {
  20497. + printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
  20498. + " with keyid=%d that does not have a configured"
  20499. + " key\n", MAC_ARG(hdr->addr2), keyidx);
  20500. + }
  20501. + return -3;
  20502. + }
  20503. + iv16 = (pos[0] << 8) | pos[2];
  20504. + iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
  20505. + pos += 8;
  20506. +#ifndef JOHN_TKIP
  20507. +#if 0
  20508. + if (iv32 < tkey->rx_iv32 ||
  20509. + (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
  20510. + if (net_ratelimit()) {
  20511. + printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
  20512. + " previous TSC %08x%04x received TSC "
  20513. + "%08x%04x\n", MAC_ARG(hdr->addr2),
  20514. + tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
  20515. + }
  20516. + tkey->dot11RSNAStatsTKIPReplays++;
  20517. + return -4;
  20518. + }
  20519. +#endif
  20520. + if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
  20521. + tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
  20522. + tkey->rx_phase1_done = 1;
  20523. + }
  20524. + tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
  20525. +
  20526. + plen = skb->len - hdr_len - 12;
  20527. + #if(LINUX_VERSION_CODE <KERNEL_VERSION(2,6,21))
  20528. + crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
  20529. + sg.page = virt_to_page(pos);
  20530. + sg.offset = offset_in_page(pos);
  20531. + sg.length = plen + 4;
  20532. + crypto_cipher_decrypt(tkey->tfm_arc4, &sg, &sg, plen + 4);
  20533. + #else
  20534. + crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
  20535. + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
  20536. + sg.page = virt_to_page(pos);
  20537. + sg.offset = offset_in_page(pos);
  20538. + sg.length = plen + 4;
  20539. + #else
  20540. + sg_init_one(&sg, pos, plen + 4);
  20541. + #endif
  20542. + if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
  20543. + if (net_ratelimit()) {
  20544. + printk(KERN_DEBUG ": TKIP: failed to decrypt "
  20545. + "received packet from " MAC_FMT "\n",
  20546. + MAC_ARG(hdr->addr2));
  20547. + }
  20548. + return -7;
  20549. + }
  20550. + #endif
  20551. +
  20552. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  20553. + crc = ~crc32_le(~0, pos, plen);
  20554. +#else
  20555. + crc = ~ether_crc_le(plen, pos);
  20556. +#endif
  20557. + icv[0] = crc;
  20558. + icv[1] = crc >> 8;
  20559. + icv[2] = crc >> 16;
  20560. + icv[3] = crc >> 24;
  20561. + if (memcmp(icv, pos + plen, 4) != 0) {
  20562. + if (iv32 != tkey->rx_iv32) {
  20563. + /* Previously cached Phase1 result was already lost, so
  20564. + * it needs to be recalculated for the next packet. */
  20565. + tkey->rx_phase1_done = 0;
  20566. + }
  20567. + if (net_ratelimit()) {
  20568. + printk(KERN_DEBUG "TKIP: ICV error detected: STA="
  20569. + MAC_FMT "\n", MAC_ARG(hdr->addr2));
  20570. + }
  20571. + tkey->dot11RSNAStatsTKIPICVErrors++;
  20572. + return -5;
  20573. + }
  20574. +
  20575. +#endif /* JOHN_TKIP */
  20576. +
  20577. + /* Update real counters only after Michael MIC verification has
  20578. + * completed */
  20579. + tkey->rx_iv32_new = iv32;
  20580. + tkey->rx_iv16_new = iv16;
  20581. +
  20582. + /* Remove IV and ICV */
  20583. + memmove(skb->data + 8, skb->data, hdr_len);
  20584. + skb_pull(skb, 8);
  20585. + skb_trim(skb, skb->len - 4);
  20586. +
  20587. +//john's test
  20588. +#ifdef JOHN_DUMP
  20589. +if( ((u16*)skb->data)[0] & 0x4000){
  20590. + printk("@@ rx decrypted skb->data");
  20591. + int i;
  20592. + for(i=0;i<skb->len;i++){
  20593. + if( (i%24)==0 ) printk("\n");
  20594. + printk("%2x ", ((u8*)skb->data)[i]);
  20595. + }
  20596. + printk("\n");
  20597. +}
  20598. +#endif /*JOHN_DUMP*/
  20599. + return keyidx;
  20600. +}
  20601. +
  20602. +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20603. +static int michael_mic(struct ieee80211_tkip_data *tkey, u8 *key, u8 *hdr,
  20604. + u8 *data, size_t data_len, u8 *mic)
  20605. +{
  20606. + struct scatterlist sg[2];
  20607. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  20608. + struct hash_desc desc;
  20609. + int ret=0;
  20610. +#endif
  20611. + if (tkey->tfm_michael == NULL) {
  20612. + printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
  20613. + return -1;
  20614. + }
  20615. + sg[0].page = virt_to_page(hdr);
  20616. + sg[0].offset = offset_in_page(hdr);
  20617. + sg[0].length = 16;
  20618. +
  20619. + sg[1].page = virt_to_page(data);
  20620. + sg[1].offset = offset_in_page(data);
  20621. + sg[1].length = data_len;
  20622. +
  20623. + //crypto_digest_init(tkey->tfm_michael);
  20624. + //crypto_digest_setkey(tkey->tfm_michael, key, 8);
  20625. + //crypto_digest_update(tkey->tfm_michael, sg, 2);
  20626. + //crypto_digest_final(tkey->tfm_michael, mic);
  20627. +
  20628. + //return 0;
  20629. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  20630. + crypto_digest_init(tkey->tfm_michael);
  20631. + crypto_digest_setkey(tkey->tfm_michael, key, 8);
  20632. + crypto_digest_update(tkey->tfm_michael, sg, 2);
  20633. + crypto_digest_final(tkey->tfm_michael, mic);
  20634. +
  20635. + return 0;
  20636. +#else
  20637. +if (crypto_hash_setkey(tkey->tfm_michael, key, 8))
  20638. + return -1;
  20639. +
  20640. +// return 0;
  20641. + desc.tfm = tkey->tfm_michael;
  20642. + desc.flags = 0;
  20643. + ret = crypto_hash_digest(&desc, sg, data_len + 16, mic);
  20644. + return ret;
  20645. +#endif
  20646. +}
  20647. +#else
  20648. +static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
  20649. + u8 * data, size_t data_len, u8 * mic)
  20650. +{
  20651. + struct hash_desc desc;
  20652. + struct scatterlist sg[2];
  20653. +
  20654. + if (tfm_michael == NULL) {
  20655. + printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
  20656. + return -1;
  20657. + }
  20658. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
  20659. + sg[0].page = virt_to_page(hdr);
  20660. + sg[0].offset = offset_in_page(hdr);
  20661. + sg[0].length = 16;
  20662. +
  20663. + sg[1].page = virt_to_page(data);
  20664. + sg[1].offset = offset_in_page(data);
  20665. + sg[1].length = data_len;
  20666. +#else
  20667. + sg_init_table(sg, 2);
  20668. + sg_set_buf(&sg[0], hdr, 16);
  20669. + sg_set_buf(&sg[1], data, data_len);
  20670. +#endif
  20671. + if (crypto_hash_setkey(tfm_michael, key, 8))
  20672. + return -1;
  20673. +
  20674. + desc.tfm = tfm_michael;
  20675. + desc.flags = 0;
  20676. + return crypto_hash_digest(&desc, sg, data_len + 16, mic);
  20677. +}
  20678. +#endif
  20679. +
  20680. +
  20681. +
  20682. +static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
  20683. +{
  20684. + struct ieee80211_hdr *hdr11;
  20685. +
  20686. + hdr11 = (struct ieee80211_hdr *) skb->data;
  20687. + switch (le16_to_cpu(hdr11->frame_ctl) &
  20688. + (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
  20689. + case IEEE80211_FCTL_TODS:
  20690. + memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
  20691. + memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
  20692. + break;
  20693. + case IEEE80211_FCTL_FROMDS:
  20694. + memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
  20695. + memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
  20696. + break;
  20697. + case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
  20698. + memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
  20699. + memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
  20700. + break;
  20701. + case 0:
  20702. + memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
  20703. + memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
  20704. + break;
  20705. + }
  20706. +
  20707. + hdr[12] = 0; /* priority */
  20708. +
  20709. + hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
  20710. +}
  20711. +
  20712. +
  20713. +static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
  20714. +{
  20715. + struct ieee80211_tkip_data *tkey = priv;
  20716. + u8 *pos;
  20717. + struct ieee80211_hdr *hdr;
  20718. +
  20719. + hdr = (struct ieee80211_hdr *) skb->data;
  20720. +
  20721. + if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
  20722. + printk(KERN_DEBUG "Invalid packet for Michael MIC add "
  20723. + "(tailroom=%d hdr_len=%d skb->len=%d)\n",
  20724. + skb_tailroom(skb), hdr_len, skb->len);
  20725. + return -1;
  20726. + }
  20727. +
  20728. + michael_mic_hdr(skb, tkey->tx_hdr);
  20729. +
  20730. + // { david, 2006.9.1
  20731. + // fix the wpa process with wmm enabled.
  20732. + if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
  20733. + tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
  20734. + }
  20735. + // }
  20736. + pos = skb_put(skb, 8);
  20737. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20738. + if (michael_mic(tkey, &tkey->key[16], tkey->tx_hdr,
  20739. + skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
  20740. + #else
  20741. + if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
  20742. + skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
  20743. + #endif
  20744. + return -1;
  20745. +
  20746. + return 0;
  20747. +}
  20748. +
  20749. +
  20750. +#if WIRELESS_EXT >= 18
  20751. +static void ieee80211_michael_mic_failure(struct net_device *dev,
  20752. + struct ieee80211_hdr *hdr,
  20753. + int keyidx)
  20754. +{
  20755. + union iwreq_data wrqu;
  20756. + struct iw_michaelmicfailure ev;
  20757. +
  20758. + /* TODO: needed parameters: count, keyid, key type, TSC */
  20759. + memset(&ev, 0, sizeof(ev));
  20760. + ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
  20761. + if (hdr->addr1[0] & 0x01)
  20762. + ev.flags |= IW_MICFAILURE_GROUP;
  20763. + else
  20764. + ev.flags |= IW_MICFAILURE_PAIRWISE;
  20765. + ev.src_addr.sa_family = ARPHRD_ETHER;
  20766. + memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
  20767. + memset(&wrqu, 0, sizeof(wrqu));
  20768. + wrqu.data.length = sizeof(ev);
  20769. + wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
  20770. +}
  20771. +#elif WIRELESS_EXT >= 15
  20772. +static void ieee80211_michael_mic_failure(struct net_device *dev,
  20773. + struct ieee80211_hdr *hdr,
  20774. + int keyidx)
  20775. +{
  20776. + union iwreq_data wrqu;
  20777. + char buf[128];
  20778. +
  20779. + /* TODO: needed parameters: count, keyid, key type, TSC */
  20780. + sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
  20781. + MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
  20782. + MAC_ARG(hdr->addr2));
  20783. + memset(&wrqu, 0, sizeof(wrqu));
  20784. + wrqu.data.length = strlen(buf);
  20785. + wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
  20786. +}
  20787. +#else /* WIRELESS_EXT >= 15 */
  20788. +static inline void ieee80211_michael_mic_failure(struct net_device *dev,
  20789. + struct ieee80211_hdr *hdr,
  20790. + int keyidx)
  20791. +{
  20792. +}
  20793. +#endif /* WIRELESS_EXT >= 15 */
  20794. +
  20795. +
  20796. +static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
  20797. + int hdr_len, void *priv)
  20798. +{
  20799. + struct ieee80211_tkip_data *tkey = priv;
  20800. + u8 mic[8];
  20801. + struct ieee80211_hdr *hdr;
  20802. +
  20803. + hdr = (struct ieee80211_hdr *) skb->data;
  20804. +
  20805. + if (!tkey->key_set)
  20806. + return -1;
  20807. +
  20808. + michael_mic_hdr(skb, tkey->rx_hdr);
  20809. + // { david, 2006.9.1
  20810. + // fix the wpa process with wmm enabled.
  20811. + if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
  20812. + tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
  20813. + }
  20814. + // }
  20815. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20816. + if (michael_mic(tkey, &tkey->key[24], tkey->rx_hdr,
  20817. + skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
  20818. + #else
  20819. + if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
  20820. + skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
  20821. + #endif
  20822. + return -1;
  20823. + if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
  20824. + struct ieee80211_hdr *hdr;
  20825. + hdr = (struct ieee80211_hdr *) skb->data;
  20826. + printk(KERN_DEBUG "%s: Michael MIC verification failed for "
  20827. + "MSDU from " MAC_FMT " keyidx=%d\n",
  20828. + skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
  20829. + keyidx);
  20830. + if (skb->dev)
  20831. + ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
  20832. + tkey->dot11RSNAStatsTKIPLocalMICFailures++;
  20833. + return -1;
  20834. + }
  20835. +
  20836. + /* Update TSC counters for RX now that the packet verification has
  20837. + * completed. */
  20838. + tkey->rx_iv32 = tkey->rx_iv32_new;
  20839. + tkey->rx_iv16 = tkey->rx_iv16_new;
  20840. +
  20841. + skb_trim(skb, skb->len - 8);
  20842. +
  20843. + return 0;
  20844. +}
  20845. +
  20846. +
  20847. +static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
  20848. +{
  20849. + struct ieee80211_tkip_data *tkey = priv;
  20850. + int keyidx;
  20851. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20852. + struct crypto_tfm *tfm = tkey->tfm_michael;
  20853. + struct crypto_tfm *tfm2 = tkey->tfm_arc4;
  20854. + #else
  20855. + struct crypto_hash *tfm = tkey->tx_tfm_michael;
  20856. + struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
  20857. + struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
  20858. + struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
  20859. + #endif
  20860. +
  20861. + keyidx = tkey->key_idx;
  20862. + memset(tkey, 0, sizeof(*tkey));
  20863. + tkey->key_idx = keyidx;
  20864. +
  20865. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  20866. + tkey->tfm_michael = tfm;
  20867. + tkey->tfm_arc4 = tfm2;
  20868. + #else
  20869. + tkey->tx_tfm_michael = tfm;
  20870. + tkey->tx_tfm_arc4 = tfm2;
  20871. + tkey->rx_tfm_michael = tfm3;
  20872. + tkey->rx_tfm_arc4 = tfm4;
  20873. + #endif
  20874. +
  20875. + if (len == TKIP_KEY_LEN) {
  20876. + memcpy(tkey->key, key, TKIP_KEY_LEN);
  20877. + tkey->key_set = 1;
  20878. + tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
  20879. + if (seq) {
  20880. + tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
  20881. + (seq[3] << 8) | seq[2];
  20882. + tkey->rx_iv16 = (seq[1] << 8) | seq[0];
  20883. + }
  20884. + } else if (len == 0)
  20885. + tkey->key_set = 0;
  20886. + else
  20887. + return -1;
  20888. +
  20889. + return 0;
  20890. +}
  20891. +
  20892. +
  20893. +static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
  20894. +{
  20895. + struct ieee80211_tkip_data *tkey = priv;
  20896. +
  20897. + if (len < TKIP_KEY_LEN)
  20898. + return -1;
  20899. +
  20900. + if (!tkey->key_set)
  20901. + return 0;
  20902. + memcpy(key, tkey->key, TKIP_KEY_LEN);
  20903. +
  20904. + if (seq) {
  20905. + /* Return the sequence number of the last transmitted frame. */
  20906. + u16 iv16 = tkey->tx_iv16;
  20907. + u32 iv32 = tkey->tx_iv32;
  20908. + if (iv16 == 0)
  20909. + iv32--;
  20910. + iv16--;
  20911. + seq[0] = tkey->tx_iv16;
  20912. + seq[1] = tkey->tx_iv16 >> 8;
  20913. + seq[2] = tkey->tx_iv32;
  20914. + seq[3] = tkey->tx_iv32 >> 8;
  20915. + seq[4] = tkey->tx_iv32 >> 16;
  20916. + seq[5] = tkey->tx_iv32 >> 24;
  20917. + }
  20918. +
  20919. + return TKIP_KEY_LEN;
  20920. +}
  20921. +
  20922. +
  20923. +static char * ieee80211_tkip_print_stats(char *p, void *priv)
  20924. +{
  20925. + struct ieee80211_tkip_data *tkip = priv;
  20926. + p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
  20927. + "tx_pn=%02x%02x%02x%02x%02x%02x "
  20928. + "rx_pn=%02x%02x%02x%02x%02x%02x "
  20929. + "replays=%d icv_errors=%d local_mic_failures=%d\n",
  20930. + tkip->key_idx, tkip->key_set,
  20931. + (tkip->tx_iv32 >> 24) & 0xff,
  20932. + (tkip->tx_iv32 >> 16) & 0xff,
  20933. + (tkip->tx_iv32 >> 8) & 0xff,
  20934. + tkip->tx_iv32 & 0xff,
  20935. + (tkip->tx_iv16 >> 8) & 0xff,
  20936. + tkip->tx_iv16 & 0xff,
  20937. + (tkip->rx_iv32 >> 24) & 0xff,
  20938. + (tkip->rx_iv32 >> 16) & 0xff,
  20939. + (tkip->rx_iv32 >> 8) & 0xff,
  20940. + tkip->rx_iv32 & 0xff,
  20941. + (tkip->rx_iv16 >> 8) & 0xff,
  20942. + tkip->rx_iv16 & 0xff,
  20943. + tkip->dot11RSNAStatsTKIPReplays,
  20944. + tkip->dot11RSNAStatsTKIPICVErrors,
  20945. + tkip->dot11RSNAStatsTKIPLocalMICFailures);
  20946. + return p;
  20947. +}
  20948. +
  20949. +
  20950. +static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
  20951. + .name = "TKIP",
  20952. + .init = ieee80211_tkip_init,
  20953. + .deinit = ieee80211_tkip_deinit,
  20954. + .encrypt_mpdu = ieee80211_tkip_encrypt,
  20955. + .decrypt_mpdu = ieee80211_tkip_decrypt,
  20956. + .encrypt_msdu = ieee80211_michael_mic_add,
  20957. + .decrypt_msdu = ieee80211_michael_mic_verify,
  20958. + .set_key = ieee80211_tkip_set_key,
  20959. + .get_key = ieee80211_tkip_get_key,
  20960. + .print_stats = ieee80211_tkip_print_stats,
  20961. + .extra_prefix_len = 4 + 4, /* IV + ExtIV */
  20962. + .extra_postfix_len = 8 + 4, /* MIC + ICV */
  20963. + .owner = THIS_MODULE,
  20964. +};
  20965. +
  20966. +
  20967. +int __init ieee80211_crypto_tkip_init(void)
  20968. +{
  20969. + return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
  20970. +}
  20971. +
  20972. +
  20973. +void __exit ieee80211_crypto_tkip_exit(void)
  20974. +{
  20975. + ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
  20976. +}
  20977. +
  20978. +
  20979. +void ieee80211_tkip_null(void)
  20980. +{
  20981. +// printk("============>%s()\n", __FUNCTION__);
  20982. + return;
  20983. +}
  20984. +
  20985. +#if 0
  20986. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  20987. +EXPORT_SYMBOL(ieee80211_tkip_null);
  20988. +#else
  20989. +EXPORT_SYMBOL_NOVERS(ieee80211_tkip_null);
  20990. +#endif
  20991. +
  20992. +
  20993. +module_init(ieee80211_crypto_tkip_init);
  20994. +module_exit(ieee80211_crypto_tkip_exit);
  20995. +#endif
  20996. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_wep.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_wep.c
  20997. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_wep.c 1970-01-01 01:00:00.000000000 +0100
  20998. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_crypt_wep.c 2009-08-23 19:01:04.000000000 +0200
  20999. @@ -0,0 +1,383 @@
  21000. +/*
  21001. + * Host AP crypt: host-based WEP encryption implementation for Host AP driver
  21002. + *
  21003. + * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
  21004. + *
  21005. + * This program is free software; you can redistribute it and/or modify
  21006. + * it under the terms of the GNU General Public License version 2 as
  21007. + * published by the Free Software Foundation. See README and COPYING for
  21008. + * more details.
  21009. + */
  21010. +
  21011. +//#include <linux/config.h>
  21012. +#include <linux/version.h>
  21013. +#include <linux/module.h>
  21014. +#include <linux/init.h>
  21015. +#include <linux/slab.h>
  21016. +#include <linux/random.h>
  21017. +#include <linux/skbuff.h>
  21018. +#include <asm/string.h>
  21019. +
  21020. +#include "ieee80211.h"
  21021. +
  21022. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
  21023. +#include "rtl_crypto.h"
  21024. +#else
  21025. +#include <linux/crypto.h>
  21026. +#endif
  21027. +
  21028. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  21029. + #include <asm/scatterlist.h>
  21030. +#else
  21031. + #include <linux/scatterlist.h>
  21032. +#endif
  21033. +//#include <asm/scatterlist.h>
  21034. +#include <linux/crc32.h>
  21035. +
  21036. +MODULE_AUTHOR("Jouni Malinen");
  21037. +MODULE_DESCRIPTION("Host AP crypt: WEP");
  21038. +MODULE_LICENSE("GPL");
  21039. +
  21040. +
  21041. +struct prism2_wep_data {
  21042. + u32 iv;
  21043. +#define WEP_KEY_LEN 13
  21044. + u8 key[WEP_KEY_LEN + 1];
  21045. + u8 key_len;
  21046. + u8 key_idx;
  21047. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21048. + struct crypto_tfm *tfm;
  21049. + #else
  21050. + struct crypto_blkcipher *tx_tfm;
  21051. + struct crypto_blkcipher *rx_tfm;
  21052. + #endif
  21053. +};
  21054. +
  21055. +
  21056. +static void * prism2_wep_init(int keyidx)
  21057. +{
  21058. + struct prism2_wep_data *priv;
  21059. +
  21060. + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
  21061. + if (priv == NULL)
  21062. + goto fail;
  21063. + memset(priv, 0, sizeof(*priv));
  21064. + priv->key_idx = keyidx;
  21065. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21066. + priv->tfm = crypto_alloc_tfm("arc4", 0);
  21067. + if (priv->tfm == NULL) {
  21068. + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
  21069. + "crypto API arc4\n");
  21070. + goto fail;
  21071. + }
  21072. + #else
  21073. + priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
  21074. + if (IS_ERR(priv->tx_tfm)) {
  21075. + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
  21076. + "crypto API arc4\n");
  21077. + priv->tx_tfm = NULL;
  21078. + goto fail;
  21079. + }
  21080. + priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
  21081. + if (IS_ERR(priv->rx_tfm)) {
  21082. + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
  21083. + "crypto API arc4\n");
  21084. + priv->rx_tfm = NULL;
  21085. + goto fail;
  21086. + }
  21087. + #endif
  21088. +
  21089. + /* start WEP IV from a random value */
  21090. + get_random_bytes(&priv->iv, 4);
  21091. +
  21092. + return priv;
  21093. +
  21094. +fail:
  21095. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21096. + if (priv) {
  21097. + if (priv->tfm)
  21098. + crypto_free_tfm(priv->tfm);
  21099. + kfree(priv);
  21100. + }
  21101. + #else
  21102. + if (priv) {
  21103. + if (priv->tx_tfm)
  21104. + crypto_free_blkcipher(priv->tx_tfm);
  21105. + if (priv->rx_tfm)
  21106. + crypto_free_blkcipher(priv->rx_tfm);
  21107. + kfree(priv);
  21108. + }
  21109. + #endif
  21110. + return NULL;
  21111. +}
  21112. +
  21113. +
  21114. +static void prism2_wep_deinit(void *priv)
  21115. +{
  21116. + struct prism2_wep_data *_priv = priv;
  21117. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21118. + if (_priv && _priv->tfm)
  21119. + crypto_free_tfm(_priv->tfm);
  21120. + #else
  21121. + if (_priv) {
  21122. + if (_priv->tx_tfm)
  21123. + crypto_free_blkcipher(_priv->tx_tfm);
  21124. + if (_priv->rx_tfm)
  21125. + crypto_free_blkcipher(_priv->rx_tfm);
  21126. + }
  21127. + #endif
  21128. + kfree(priv);
  21129. +}
  21130. +
  21131. +
  21132. +/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
  21133. + * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
  21134. + * so the payload length increases with 8 bytes.
  21135. + *
  21136. + * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
  21137. + */
  21138. +static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
  21139. +{
  21140. + struct prism2_wep_data *wep = priv;
  21141. +#if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
  21142. + struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
  21143. +#endif
  21144. + u32 klen, len;
  21145. + u8 key[WEP_KEY_LEN + 3];
  21146. + u8 *pos;
  21147. +#ifndef JOHN_HWSEC
  21148. + u32 crc;
  21149. + u8 *icv;
  21150. + struct scatterlist sg;
  21151. +#endif
  21152. + if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
  21153. + skb->len < hdr_len)
  21154. + return -1;
  21155. +
  21156. + len = skb->len - hdr_len;
  21157. + pos = skb_push(skb, 4);
  21158. + memmove(pos, pos + 4, hdr_len);
  21159. + pos += hdr_len;
  21160. +
  21161. + klen = 3 + wep->key_len;
  21162. +
  21163. + wep->iv++;
  21164. +
  21165. + /* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
  21166. + * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
  21167. + * can be used to speedup attacks, so avoid using them. */
  21168. + if ((wep->iv & 0xff00) == 0xff00) {
  21169. + u8 B = (wep->iv >> 16) & 0xff;
  21170. + if (B >= 3 && B < klen)
  21171. + wep->iv += 0x0100;
  21172. + }
  21173. +
  21174. + /* Prepend 24-bit IV to RC4 key and TX frame */
  21175. + *pos++ = key[0] = (wep->iv >> 16) & 0xff;
  21176. + *pos++ = key[1] = (wep->iv >> 8) & 0xff;
  21177. + *pos++ = key[2] = wep->iv & 0xff;
  21178. + *pos++ = wep->key_idx << 6;
  21179. +
  21180. + /* Copy rest of the WEP key (the secret part) */
  21181. + memcpy(key + 3, wep->key, wep->key_len);
  21182. +
  21183. +#ifndef JOHN_HWSEC
  21184. + /* Append little-endian CRC32 and encrypt it to produce ICV */
  21185. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  21186. + crc = ~crc32_le(~0, pos, len);
  21187. +#else
  21188. + crc = ~ether_crc_le(len, pos);
  21189. +#endif
  21190. + icv = skb_put(skb, 4);
  21191. + icv[0] = crc;
  21192. + icv[1] = crc >> 8;
  21193. + icv[2] = crc >> 16;
  21194. + icv[3] = crc >> 24;
  21195. +
  21196. + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21197. + crypto_cipher_setkey(wep->tfm, key, klen);
  21198. + sg.page = virt_to_page(pos);
  21199. + sg.offset = offset_in_page(pos);
  21200. + sg.length = len + 4;
  21201. + crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
  21202. +
  21203. + return 0;
  21204. + #else
  21205. + crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
  21206. + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
  21207. + sg.page = virt_to_page(pos);
  21208. + sg.offset = offset_in_page(pos);
  21209. + sg.length = len + 4;
  21210. + #else
  21211. + sg_init_one(&sg, pos, len + 4);
  21212. + #endif
  21213. + return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
  21214. + #endif
  21215. +#endif /* JOHN_HWSEC */
  21216. + return 0;
  21217. +}
  21218. +
  21219. +
  21220. +/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
  21221. + * the frame: IV (4 bytes), encrypted payload (including SNAP header),
  21222. + * ICV (4 bytes). len includes both IV and ICV.
  21223. + *
  21224. + * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
  21225. + * failure. If frame is OK, IV and ICV will be removed.
  21226. + */
  21227. +static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
  21228. +{
  21229. + struct prism2_wep_data *wep = priv;
  21230. + #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
  21231. + struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
  21232. + #endif
  21233. + u32 klen, plen;
  21234. + u8 key[WEP_KEY_LEN + 3];
  21235. + u8 keyidx, *pos;
  21236. +#ifndef JOHN_HWSEC
  21237. + u32 crc;
  21238. + u8 icv[4];
  21239. + struct scatterlist sg;
  21240. +#endif
  21241. + if (skb->len < hdr_len + 8)
  21242. + return -1;
  21243. +
  21244. + pos = skb->data + hdr_len;
  21245. + key[0] = *pos++;
  21246. + key[1] = *pos++;
  21247. + key[2] = *pos++;
  21248. + keyidx = *pos++ >> 6;
  21249. + if (keyidx != wep->key_idx)
  21250. + return -1;
  21251. +
  21252. + klen = 3 + wep->key_len;
  21253. +
  21254. + /* Copy rest of the WEP key (the secret part) */
  21255. + memcpy(key + 3, wep->key, wep->key_len);
  21256. +
  21257. + /* Apply RC4 to data and compute CRC32 over decrypted data */
  21258. + plen = skb->len - hdr_len - 8;
  21259. +#ifndef JOHN_HWSEC
  21260. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
  21261. + crypto_cipher_setkey(wep->tfm, key, klen);
  21262. + sg.page = virt_to_page(pos);
  21263. + sg.offset = offset_in_page(pos);
  21264. + sg.length = plen + 4;
  21265. + crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
  21266. +#else
  21267. + crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
  21268. + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
  21269. + sg.page = virt_to_page(pos);
  21270. + sg.offset = offset_in_page(pos);
  21271. + sg.length = plen + 4;
  21272. + #else
  21273. + sg_init_one(&sg, pos, plen + 4);
  21274. + #endif
  21275. + if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
  21276. + return -7;
  21277. +#endif
  21278. +
  21279. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  21280. + crc = ~crc32_le(~0, pos, plen);
  21281. +#else
  21282. + crc = ~ether_crc_le(plen, pos);
  21283. +#endif
  21284. + icv[0] = crc;
  21285. + icv[1] = crc >> 8;
  21286. + icv[2] = crc >> 16;
  21287. + icv[3] = crc >> 24;
  21288. +
  21289. + if (memcmp(icv, pos + plen, 4) != 0) {
  21290. + /* ICV mismatch - drop frame */
  21291. + return -2;
  21292. + }
  21293. +#endif /* JOHN_HWSEC */
  21294. +
  21295. + /* Remove IV and ICV */
  21296. + memmove(skb->data + 4, skb->data, hdr_len);
  21297. + skb_pull(skb, 4);
  21298. + skb_trim(skb, skb->len - 4);
  21299. + return 0;
  21300. +}
  21301. +
  21302. +
  21303. +static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
  21304. +{
  21305. + struct prism2_wep_data *wep = priv;
  21306. +
  21307. + if (len < 0 || len > WEP_KEY_LEN)
  21308. + return -1;
  21309. +
  21310. + memcpy(wep->key, key, len);
  21311. + wep->key_len = len;
  21312. +
  21313. + return 0;
  21314. +}
  21315. +
  21316. +
  21317. +static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
  21318. +{
  21319. + struct prism2_wep_data *wep = priv;
  21320. +
  21321. + if (len < wep->key_len)
  21322. + return -1;
  21323. +
  21324. + memcpy(key, wep->key, wep->key_len);
  21325. +
  21326. + return wep->key_len;
  21327. +}
  21328. +
  21329. +
  21330. +static char * prism2_wep_print_stats(char *p, void *priv)
  21331. +{
  21332. + struct prism2_wep_data *wep = priv;
  21333. + p += sprintf(p, "key[%d] alg=WEP len=%d\n",
  21334. + wep->key_idx, wep->key_len);
  21335. + return p;
  21336. +}
  21337. +
  21338. +
  21339. +static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
  21340. + .name = "WEP",
  21341. + .init = prism2_wep_init,
  21342. + .deinit = prism2_wep_deinit,
  21343. + .encrypt_mpdu = prism2_wep_encrypt,
  21344. + .decrypt_mpdu = prism2_wep_decrypt,
  21345. + .encrypt_msdu = NULL,
  21346. + .decrypt_msdu = NULL,
  21347. + .set_key = prism2_wep_set_key,
  21348. + .get_key = prism2_wep_get_key,
  21349. + .print_stats = prism2_wep_print_stats,
  21350. + .extra_prefix_len = 4, /* IV */
  21351. + .extra_postfix_len = 4, /* ICV */
  21352. + .owner = THIS_MODULE,
  21353. +};
  21354. +
  21355. +
  21356. +int __init ieee80211_crypto_wep_init(void)
  21357. +{
  21358. + return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
  21359. +}
  21360. +
  21361. +
  21362. +void __exit ieee80211_crypto_wep_exit(void)
  21363. +{
  21364. + ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
  21365. +}
  21366. +
  21367. +
  21368. +void ieee80211_wep_null(void)
  21369. +{
  21370. +// printk("============>%s()\n", __FUNCTION__);
  21371. + return;
  21372. +}
  21373. +#if 0
  21374. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  21375. +EXPORT_SYMBOL(ieee80211_wep_null);
  21376. +#else
  21377. +EXPORT_SYMBOL_NOVERS(ieee80211_wep_null);
  21378. +#endif
  21379. +
  21380. +module_init(ieee80211_crypto_wep_init);
  21381. +module_exit(ieee80211_crypto_wep_exit);
  21382. +#endif
  21383. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211.h
  21384. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211.h 1970-01-01 01:00:00.000000000 +0100
  21385. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211.h 2009-08-23 19:01:04.000000000 +0200
  21386. @@ -0,0 +1,1913 @@
  21387. +/*
  21388. + * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
  21389. + * remains copyright by the original authors
  21390. + *
  21391. + * Portions of the merged code are based on Host AP (software wireless
  21392. + * LAN access point) driver for Intersil Prism2/2.5/3.
  21393. + *
  21394. + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
  21395. + * <jkmaline@cc.hut.fi>
  21396. + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  21397. + *
  21398. + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
  21399. + * <jketreno@linux.intel.com>
  21400. + * Copyright (c) 2004, Intel Corporation
  21401. + *
  21402. + * Modified for Realtek's wi-fi cards by Andrea Merello
  21403. + * <andreamrl@tiscali.it>
  21404. + *
  21405. + * This program is free software; you can redistribute it and/or modify
  21406. + * it under the terms of the GNU General Public License version 2 as
  21407. + * published by the Free Software Foundation. See README and COPYING for
  21408. + * more details.
  21409. + */
  21410. +#ifndef IEEE80211_H
  21411. +#define IEEE80211_H
  21412. +#include <linux/if_ether.h> /* ETH_ALEN */
  21413. +#include <linux/kernel.h> /* ARRAY_SIZE */
  21414. +#include <linux/version.h>
  21415. +#include <linux/module.h>
  21416. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  21417. +#include <linux/jiffies.h>
  21418. +#else
  21419. +#include <linux/jffs.h>
  21420. +#include <linux/tqueue.h>
  21421. +#endif
  21422. +#include <linux/timer.h>
  21423. +#include <linux/sched.h>
  21424. +
  21425. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,13))
  21426. +#include <linux/wireless.h>
  21427. +#endif
  21428. +/*
  21429. +#ifndef bool
  21430. +#define bool int
  21431. +#endif
  21432. +
  21433. +#ifndef true
  21434. +#define true 1
  21435. +#endif
  21436. +
  21437. +#ifndef false
  21438. +#define false 0
  21439. +#endif
  21440. +*/
  21441. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
  21442. +#ifndef bool
  21443. +typedef enum{false = 0, true} bool;
  21444. +#endif
  21445. +#endif
  21446. +//#ifdef JOHN_HWSEC
  21447. +#define KEY_TYPE_NA 0x0
  21448. +#define KEY_TYPE_WEP40 0x1
  21449. +#define KEY_TYPE_TKIP 0x2
  21450. +#define KEY_TYPE_CCMP 0x4
  21451. +#define KEY_TYPE_WEP104 0x5
  21452. +//#endif
  21453. +
  21454. +
  21455. +#define aSifsTime 10
  21456. +
  21457. +#define MGMT_QUEUE_NUM 5
  21458. +
  21459. +
  21460. +#define IEEE_CMD_SET_WPA_PARAM 1
  21461. +#define IEEE_CMD_SET_WPA_IE 2
  21462. +#define IEEE_CMD_SET_ENCRYPTION 3
  21463. +#define IEEE_CMD_MLME 4
  21464. +
  21465. +#define IEEE_PARAM_WPA_ENABLED 1
  21466. +#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
  21467. +#define IEEE_PARAM_DROP_UNENCRYPTED 3
  21468. +#define IEEE_PARAM_PRIVACY_INVOKED 4
  21469. +#define IEEE_PARAM_AUTH_ALGS 5
  21470. +#define IEEE_PARAM_IEEE_802_1X 6
  21471. +//It should consistent with the driver_XXX.c
  21472. +// David, 2006.9.26
  21473. +#define IEEE_PARAM_WPAX_SELECT 7
  21474. +//Added for notify the encryption type selection
  21475. +// David, 2006.9.26
  21476. +#define IEEE_PROTO_WPA 1
  21477. +#define IEEE_PROTO_RSN 2
  21478. +//Added for notify the encryption type selection
  21479. +// David, 2006.9.26
  21480. +#define IEEE_WPAX_USEGROUP 0
  21481. +#define IEEE_WPAX_WEP40 1
  21482. +#define IEEE_WPAX_TKIP 2
  21483. +#define IEEE_WPAX_WRAP 3
  21484. +#define IEEE_WPAX_CCMP 4
  21485. +#define IEEE_WPAX_WEP104 5
  21486. +
  21487. +#define IEEE_KEY_MGMT_IEEE8021X 1
  21488. +#define IEEE_KEY_MGMT_PSK 2
  21489. +
  21490. +
  21491. +
  21492. +#define IEEE_MLME_STA_DEAUTH 1
  21493. +#define IEEE_MLME_STA_DISASSOC 2
  21494. +
  21495. +
  21496. +#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
  21497. +#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
  21498. +#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
  21499. +#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
  21500. +#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
  21501. +#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
  21502. +
  21503. +
  21504. +#define IEEE_CRYPT_ALG_NAME_LEN 16
  21505. +
  21506. +//#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
  21507. +#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rtl
  21508. +#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rtl
  21509. +#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rtl
  21510. +////////////////////////////////
  21511. +// added for kernel conflict under FC5
  21512. +#define ieee80211_wx_get_name ieee80211_wx_get_name_rtl
  21513. +#define free_ieee80211 free_ieee80211_rtl
  21514. +#define alloc_ieee80211 alloc_ieee80211_rtl
  21515. +///////////////////////////////
  21516. +//#endif
  21517. +#define ieee80211_rx ieee80211_rx_rtl
  21518. +#define ieee80211_wake_queue ieee80211_wake_queue_rtl
  21519. +#define ieee80211_stop_queue ieee80211_stop_queue_rtl
  21520. +#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rtl
  21521. +#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rtl
  21522. +#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rtl
  21523. +
  21524. +#define ieee80211_start_scan ieee80211_start_scan_rtl
  21525. +#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rtl
  21526. +#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rtl
  21527. +#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rtl
  21528. +#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rtl
  21529. +typedef struct ieee_param {
  21530. + u32 cmd;
  21531. + u8 sta_addr[ETH_ALEN];
  21532. + union {
  21533. + struct {
  21534. + u8 name;
  21535. + u32 value;
  21536. + } wpa_param;
  21537. + struct {
  21538. + u32 len;
  21539. + u8 reserved[32];
  21540. + u8 data[0];
  21541. + } wpa_ie;
  21542. + struct{
  21543. + int command;
  21544. + int reason_code;
  21545. + } mlme;
  21546. + struct {
  21547. + u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
  21548. + u8 set_tx;
  21549. + u32 err;
  21550. + u8 idx;
  21551. + u8 seq[8]; /* sequence counter (set: RX, get: TX) */
  21552. + u16 key_len;
  21553. + u8 key[0];
  21554. + } crypt;
  21555. +
  21556. + } u;
  21557. +}ieee_param;
  21558. +
  21559. +
  21560. +#if WIRELESS_EXT < 17
  21561. +#define IW_QUAL_QUAL_INVALID 0x10
  21562. +#define IW_QUAL_LEVEL_INVALID 0x20
  21563. +#define IW_QUAL_NOISE_INVALID 0x40
  21564. +#define IW_QUAL_QUAL_UPDATED 0x1
  21565. +#define IW_QUAL_LEVEL_UPDATED 0x2
  21566. +#define IW_QUAL_NOISE_UPDATED 0x4
  21567. +#endif
  21568. +
  21569. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
  21570. +static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
  21571. +{
  21572. + task->routine = func;
  21573. + task->data = data;
  21574. + //task->next = NULL;
  21575. + INIT_LIST_HEAD(&task->list);
  21576. + task->sync = 0;
  21577. +}
  21578. +#endif
  21579. +
  21580. +// linux under 2.6.9 release may not support it, so modify it for common use
  21581. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
  21582. +//#define MSECS(t) (1000 * ((t) / HZ) + 1000 * ((t) % HZ) / HZ)
  21583. +#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
  21584. +static inline unsigned long msleep_interruptible_rtl(unsigned int msecs)
  21585. +{
  21586. + unsigned long timeout = MSECS(msecs) + 1;
  21587. +
  21588. + while (timeout) {
  21589. + set_current_state(TASK_UNINTERRUPTIBLE);
  21590. + timeout = schedule_timeout(timeout);
  21591. + }
  21592. + return timeout;
  21593. +}
  21594. +#else
  21595. +#define MSECS(t) msecs_to_jiffies(t)
  21596. +#define msleep_interruptible_rtl msleep_interruptible
  21597. +#endif
  21598. +
  21599. +#define IEEE80211_DATA_LEN 2304
  21600. +/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
  21601. + 6.2.1.1.2.
  21602. +
  21603. + The figure in section 7.1.2 suggests a body size of up to 2312
  21604. + bytes is allowed, which is a bit confusing, I suspect this
  21605. + represents the 2304 bytes of real data, plus a possible 8 bytes of
  21606. + WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
  21607. +
  21608. +
  21609. +#define IEEE80211_HLEN 30
  21610. +#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
  21611. +
  21612. +/* this is stolen and modified from the madwifi driver*/
  21613. +#define IEEE80211_FC0_TYPE_MASK 0x0c
  21614. +#define IEEE80211_FC0_TYPE_DATA 0x08
  21615. +#define IEEE80211_FC0_SUBTYPE_MASK 0xB0
  21616. +#define IEEE80211_FC0_SUBTYPE_QOS 0x80
  21617. +
  21618. +#define IEEE80211_QOS_HAS_SEQ(fc) \
  21619. + (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
  21620. + (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
  21621. +
  21622. +/* this is stolen from ipw2200 driver */
  21623. +#define IEEE_IBSS_MAC_HASH_SIZE 31
  21624. +#define IEEE_MESH_MAC_HASH_SIZE 31
  21625. +struct ieee_ibss_seq {
  21626. + u8 mac[ETH_ALEN];
  21627. + u16 seq_num[17];
  21628. + u16 frag_num[17];
  21629. + unsigned long packet_time[17];
  21630. + struct list_head list;
  21631. +};
  21632. +
  21633. +struct ieee_mesh_seq {
  21634. + u8 mac[ETH_ALEN];
  21635. + u16 seq_num;
  21636. + u16 frag_num;
  21637. + unsigned long packet_time;
  21638. + struct list_head list;
  21639. +};
  21640. +
  21641. +struct ieee80211_hdr {
  21642. + u16 frame_ctl;
  21643. + u16 duration_id;
  21644. + u8 addr1[ETH_ALEN];
  21645. + u8 addr2[ETH_ALEN];
  21646. + u8 addr3[ETH_ALEN];
  21647. + u16 seq_ctl;
  21648. + u8 addr4[ETH_ALEN];
  21649. +} __attribute__ ((packed));
  21650. +
  21651. +struct ieee80211_hdr_QOS {
  21652. + u16 frame_ctl;
  21653. + u16 duration_id;
  21654. + u8 addr1[ETH_ALEN];
  21655. + u8 addr2[ETH_ALEN];
  21656. + u8 addr3[ETH_ALEN];
  21657. + u16 seq_ctl;
  21658. + u8 addr4[ETH_ALEN];
  21659. + u16 QOS_ctl;
  21660. +} __attribute__ ((packed));
  21661. +
  21662. +struct ieee80211_hdr_3addr {
  21663. + u16 frame_ctl;
  21664. + u16 duration_id;
  21665. + u8 addr1[ETH_ALEN];
  21666. + u8 addr2[ETH_ALEN];
  21667. + u8 addr3[ETH_ALEN];
  21668. + u16 seq_ctl;
  21669. +} __attribute__ ((packed));
  21670. +
  21671. +struct ieee80211_hdr_3addr_QOS {
  21672. + u16 frame_ctl;
  21673. + u16 duration_id;
  21674. + u8 addr1[ETH_ALEN];
  21675. + u8 addr2[ETH_ALEN];
  21676. + u8 addr3[ETH_ALEN];
  21677. + u16 seq_ctl;
  21678. + u16 QOS_ctl;
  21679. +} __attribute__ ((packed));
  21680. +
  21681. +enum eap_type {
  21682. + EAP_PACKET = 0,
  21683. + EAPOL_START,
  21684. + EAPOL_LOGOFF,
  21685. + EAPOL_KEY,
  21686. + EAPOL_ENCAP_ASF_ALERT
  21687. +};
  21688. +
  21689. +//by lizhaoming for LED 2008.6.23 from r8187_led.h
  21690. +#ifdef LED
  21691. +typedef enum _LED_CTL_MODE {
  21692. + LED_CTL_POWER_ON,
  21693. + LED_CTL_POWER_OFF,
  21694. + LED_CTL_LINK,
  21695. + LED_CTL_NO_LINK,
  21696. + LED_CTL_TX,
  21697. + LED_CTL_RX,
  21698. + LED_CTL_SITE_SURVEY,
  21699. +} LED_CTL_MODE;
  21700. +#endif
  21701. +
  21702. +static const char *eap_types[] = {
  21703. + [EAP_PACKET] = "EAP-Packet",
  21704. + [EAPOL_START] = "EAPOL-Start",
  21705. + [EAPOL_LOGOFF] = "EAPOL-Logoff",
  21706. + [EAPOL_KEY] = "EAPOL-Key",
  21707. + [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
  21708. +};
  21709. +
  21710. +static inline const char *eap_get_type(int type)
  21711. +{
  21712. + return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
  21713. +}
  21714. +
  21715. +struct eapol {
  21716. + u8 snap[6];
  21717. + u16 ethertype;
  21718. + u8 version;
  21719. + u8 type;
  21720. + u16 length;
  21721. +} __attribute__ ((packed));
  21722. +
  21723. +#define IEEE80211_3ADDR_LEN 24
  21724. +#define IEEE80211_4ADDR_LEN 30
  21725. +#define IEEE80211_FCS_LEN 4
  21726. +
  21727. +#define MIN_FRAG_THRESHOLD 256U
  21728. +#define MAX_FRAG_THRESHOLD 2346U
  21729. +
  21730. +/* Frame control field constants */
  21731. +#define IEEE80211_FCTL_VERS 0x0002
  21732. +#define IEEE80211_FCTL_FTYPE 0x000c
  21733. +#define IEEE80211_FCTL_STYPE 0x00f0
  21734. +#define IEEE80211_FCTL_TODS 0x0100
  21735. +#define IEEE80211_FCTL_FROMDS 0x0200
  21736. +#define IEEE80211_FCTL_DSTODS 0x0300 //added by david
  21737. +#define IEEE80211_FCTL_MOREFRAGS 0x0400
  21738. +#define IEEE80211_FCTL_RETRY 0x0800
  21739. +#define IEEE80211_FCTL_PM 0x1000
  21740. +#define IEEE80211_FCTL_MOREDATA 0x2000
  21741. +#define IEEE80211_FCTL_WEP 0x4000
  21742. +#define IEEE80211_FCTL_ORDER 0x8000
  21743. +
  21744. +#define IEEE80211_FTYPE_MGMT 0x0000
  21745. +#define IEEE80211_FTYPE_CTL 0x0004
  21746. +#define IEEE80211_FTYPE_DATA 0x0008
  21747. +
  21748. +/* management */
  21749. +#define IEEE80211_STYPE_ASSOC_REQ 0x0000
  21750. +#define IEEE80211_STYPE_ASSOC_RESP 0x0010
  21751. +#define IEEE80211_STYPE_REASSOC_REQ 0x0020
  21752. +#define IEEE80211_STYPE_REASSOC_RESP 0x0030
  21753. +#define IEEE80211_STYPE_PROBE_REQ 0x0040
  21754. +#define IEEE80211_STYPE_PROBE_RESP 0x0050
  21755. +#define IEEE80211_STYPE_BEACON 0x0080
  21756. +#define IEEE80211_STYPE_ATIM 0x0090
  21757. +#define IEEE80211_STYPE_DISASSOC 0x00A0
  21758. +#define IEEE80211_STYPE_AUTH 0x00B0
  21759. +#define IEEE80211_STYPE_DEAUTH 0x00C0
  21760. +#define IEEE80211_STYPE_MANAGE_ACT 0x00D0
  21761. +
  21762. +/* control */
  21763. +#define IEEE80211_STYPE_PSPOLL 0x00A0
  21764. +#define IEEE80211_STYPE_RTS 0x00B0
  21765. +#define IEEE80211_STYPE_CTS 0x00C0
  21766. +#define IEEE80211_STYPE_ACK 0x00D0
  21767. +#define IEEE80211_STYPE_CFEND 0x00E0
  21768. +#define IEEE80211_STYPE_CFENDACK 0x00F0
  21769. +
  21770. +/* data */
  21771. +#define IEEE80211_STYPE_DATA 0x0000
  21772. +#define IEEE80211_STYPE_DATA_CFACK 0x0010
  21773. +#define IEEE80211_STYPE_DATA_CFPOLL 0x0020
  21774. +#define IEEE80211_STYPE_DATA_CFACKPOLL 0x0030
  21775. +#define IEEE80211_STYPE_NULLFUNC 0x0040
  21776. +#define IEEE80211_STYPE_CFACK 0x0050
  21777. +#define IEEE80211_STYPE_CFPOLL 0x0060
  21778. +#define IEEE80211_STYPE_CFACKPOLL 0x0070
  21779. +#define IEEE80211_STYPE_QOS_DATA 0x0080 //added for WMM 2006/8/2
  21780. +#define IEEE80211_STYPE_QOS_NULL 0x00C0
  21781. +
  21782. +
  21783. +#define IEEE80211_SCTL_FRAG 0x000F
  21784. +#define IEEE80211_SCTL_SEQ 0xFFF0
  21785. +
  21786. +
  21787. +/* debug macros */
  21788. +
  21789. +#ifdef CONFIG_IEEE80211_DEBUG
  21790. +extern u32 ieee80211_debug_level;
  21791. +#define IEEE80211_DEBUG(level, fmt, args...) \
  21792. +do { if (ieee80211_debug_level & (level)) \
  21793. + printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
  21794. + in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
  21795. +#else
  21796. +#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
  21797. +#endif /* CONFIG_IEEE80211_DEBUG */
  21798. +
  21799. +/*
  21800. + * To use the debug system;
  21801. + *
  21802. + * If you are defining a new debug classification, simply add it to the #define
  21803. + * list here in the form of:
  21804. + *
  21805. + * #define IEEE80211_DL_xxxx VALUE
  21806. + *
  21807. + * shifting value to the left one bit from the previous entry. xxxx should be
  21808. + * the name of the classification (for example, WEP)
  21809. + *
  21810. + * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
  21811. + * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
  21812. + * to send output to that classification.
  21813. + *
  21814. + * To add your debug level to the list of levels seen when you perform
  21815. + *
  21816. + * % cat /proc/net/ipw/debug_level
  21817. + *
  21818. + * you simply need to add your entry to the ipw_debug_levels array.
  21819. + *
  21820. + * If you do not see debug_level in /proc/net/ipw then you do not have
  21821. + * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
  21822. + *
  21823. + */
  21824. +
  21825. +#define IEEE80211_DL_INFO (1<<0)
  21826. +#define IEEE80211_DL_WX (1<<1)
  21827. +#define IEEE80211_DL_SCAN (1<<2)
  21828. +#define IEEE80211_DL_STATE (1<<3)
  21829. +#define IEEE80211_DL_MGMT (1<<4)
  21830. +#define IEEE80211_DL_FRAG (1<<5)
  21831. +#define IEEE80211_DL_EAP (1<<6)
  21832. +#define IEEE80211_DL_DROP (1<<7)
  21833. +
  21834. +#define IEEE80211_DL_TX (1<<8)
  21835. +#define IEEE80211_DL_RX (1<<9)
  21836. +
  21837. +#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
  21838. +#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
  21839. +#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
  21840. +
  21841. +#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
  21842. +#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
  21843. +#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
  21844. +#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
  21845. +#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
  21846. +#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
  21847. +#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
  21848. +#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
  21849. +#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
  21850. +#include <linux/netdevice.h>
  21851. +#include <linux/wireless.h>
  21852. +#include <linux/if_arp.h> /* ARPHRD_ETHER */
  21853. +
  21854. +#ifndef WIRELESS_SPY
  21855. +#define WIRELESS_SPY // enable iwspy support
  21856. +#endif
  21857. +#include <net/iw_handler.h> // new driver API
  21858. +
  21859. +#ifndef ETH_P_PAE
  21860. +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
  21861. +#endif /* ETH_P_PAE */
  21862. +
  21863. +#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
  21864. +
  21865. +#ifndef ETH_P_80211_RAW
  21866. +#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
  21867. +#endif
  21868. +
  21869. +/* IEEE 802.11 defines */
  21870. +
  21871. +#define P80211_OUI_LEN 3
  21872. +
  21873. +struct ieee80211_snap_hdr {
  21874. +
  21875. + u8 dsap; /* always 0xAA */
  21876. + u8 ssap; /* always 0xAA */
  21877. + u8 ctrl; /* always 0x03 */
  21878. + u8 oui[P80211_OUI_LEN]; /* organizational universal id */
  21879. +
  21880. +} __attribute__ ((packed));
  21881. +
  21882. +#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
  21883. +
  21884. +#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
  21885. +#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
  21886. +
  21887. +#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
  21888. +#define WLAN_GET_SEQ_SEQ(seq) ((seq) & IEEE80211_SCTL_SEQ)
  21889. +
  21890. +/* Authentication algorithms */
  21891. +#define WLAN_AUTH_OPEN 0
  21892. +#define WLAN_AUTH_SHARED_KEY 1
  21893. +
  21894. +#define WLAN_AUTH_CHALLENGE_LEN 128
  21895. +
  21896. +#define WLAN_CAPABILITY_BSS (1<<0)
  21897. +#define WLAN_CAPABILITY_IBSS (1<<1)
  21898. +#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
  21899. +#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
  21900. +#define WLAN_CAPABILITY_PRIVACY (1<<4)
  21901. +#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
  21902. +#define WLAN_CAPABILITY_PBCC (1<<6)
  21903. +#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
  21904. +#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
  21905. +
  21906. +/* Status codes */
  21907. +#define WLAN_STATUS_SUCCESS 0
  21908. +#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
  21909. +#define WLAN_STATUS_CAPS_UNSUPPORTED 10
  21910. +#define WLAN_STATUS_REASSOC_NO_ASSOC 11
  21911. +#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
  21912. +#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
  21913. +#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
  21914. +#define WLAN_STATUS_CHALLENGE_FAIL 15
  21915. +#define WLAN_STATUS_AUTH_TIMEOUT 16
  21916. +#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
  21917. +#define WLAN_STATUS_ASSOC_DENIED_RATES 18
  21918. +/* 802.11b */
  21919. +#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
  21920. +#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
  21921. +#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
  21922. +
  21923. +/* Reason codes */
  21924. +#define WLAN_REASON_UNSPECIFIED 1
  21925. +#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
  21926. +#define WLAN_REASON_DEAUTH_LEAVING 3
  21927. +#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
  21928. +#define WLAN_REASON_DISASSOC_AP_BUSY 5
  21929. +#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
  21930. +#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
  21931. +#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
  21932. +#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
  21933. +
  21934. +
  21935. +/* Information Element IDs */
  21936. +#define WLAN_EID_SSID 0
  21937. +#define WLAN_EID_SUPP_RATES 1
  21938. +#define WLAN_EID_FH_PARAMS 2
  21939. +#define WLAN_EID_DS_PARAMS 3
  21940. +#define WLAN_EID_CF_PARAMS 4
  21941. +#define WLAN_EID_TIM 5
  21942. +#define WLAN_EID_IBSS_PARAMS 6
  21943. +#define WLAN_EID_CHALLENGE 16
  21944. +#define WLAN_EID_RSN 48
  21945. +#define WLAN_EID_GENERIC 221
  21946. +
  21947. +#define IEEE80211_MGMT_HDR_LEN 24
  21948. +#define IEEE80211_DATA_HDR3_LEN 24
  21949. +#define IEEE80211_DATA_HDR4_LEN 30
  21950. +
  21951. +
  21952. +#define IEEE80211_STATMASK_SIGNAL (1<<0)
  21953. +#define IEEE80211_STATMASK_RSSI (1<<1)
  21954. +#define IEEE80211_STATMASK_NOISE (1<<2)
  21955. +#define IEEE80211_STATMASK_RATE (1<<3)
  21956. +#define IEEE80211_STATMASK_WEMASK 0x7
  21957. +
  21958. +
  21959. +#define IEEE80211_CCK_MODULATION (1<<0)
  21960. +#define IEEE80211_OFDM_MODULATION (1<<1)
  21961. +
  21962. +#define IEEE80211_24GHZ_BAND (1<<0)
  21963. +#define IEEE80211_52GHZ_BAND (1<<1)
  21964. +
  21965. +#define IEEE80211_CCK_RATE_LEN 4
  21966. +#define IEEE80211_CCK_RATE_1MB 0x02
  21967. +#define IEEE80211_CCK_RATE_2MB 0x04
  21968. +#define IEEE80211_CCK_RATE_5MB 0x0B
  21969. +#define IEEE80211_CCK_RATE_11MB 0x16
  21970. +#define IEEE80211_OFDM_RATE_LEN 8
  21971. +#define IEEE80211_OFDM_RATE_6MB 0x0C
  21972. +#define IEEE80211_OFDM_RATE_9MB 0x12
  21973. +#define IEEE80211_OFDM_RATE_12MB 0x18
  21974. +#define IEEE80211_OFDM_RATE_18MB 0x24
  21975. +#define IEEE80211_OFDM_RATE_24MB 0x30
  21976. +#define IEEE80211_OFDM_RATE_36MB 0x48
  21977. +#define IEEE80211_OFDM_RATE_48MB 0x60
  21978. +#define IEEE80211_OFDM_RATE_54MB 0x6C
  21979. +#define IEEE80211_BASIC_RATE_MASK 0x80
  21980. +
  21981. +#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
  21982. +#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
  21983. +#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
  21984. +#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
  21985. +#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
  21986. +#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
  21987. +#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
  21988. +#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
  21989. +#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
  21990. +#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
  21991. +#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
  21992. +#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
  21993. +
  21994. +#define IEEE80211_CCK_RATES_MASK 0x0000000F
  21995. +#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
  21996. + IEEE80211_CCK_RATE_2MB_MASK)
  21997. +#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
  21998. + IEEE80211_CCK_RATE_5MB_MASK | \
  21999. + IEEE80211_CCK_RATE_11MB_MASK)
  22000. +
  22001. +#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
  22002. +#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
  22003. + IEEE80211_OFDM_RATE_12MB_MASK | \
  22004. + IEEE80211_OFDM_RATE_24MB_MASK)
  22005. +#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
  22006. + IEEE80211_OFDM_RATE_9MB_MASK | \
  22007. + IEEE80211_OFDM_RATE_18MB_MASK | \
  22008. + IEEE80211_OFDM_RATE_36MB_MASK | \
  22009. + IEEE80211_OFDM_RATE_48MB_MASK | \
  22010. + IEEE80211_OFDM_RATE_54MB_MASK)
  22011. +#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
  22012. + IEEE80211_CCK_DEFAULT_RATES_MASK)
  22013. +
  22014. +#define IEEE80211_NUM_OFDM_RATES 8
  22015. +#define IEEE80211_NUM_CCK_RATES 4
  22016. +#define IEEE80211_OFDM_SHIFT_MASK_A 4
  22017. +
  22018. +
  22019. +
  22020. +
  22021. +/* NOTE: This data is for statistical purposes; not all hardware provides this
  22022. + * information for frames received. Not setting these will not cause
  22023. + * any adverse affects. */
  22024. +struct ieee80211_rx_stats {
  22025. + u32 mac_time[2];
  22026. + u8 signalstrength;
  22027. + s8 rssi;
  22028. + u8 signal;
  22029. + u8 noise;
  22030. + u16 rate; /* in 100 kbps */
  22031. + u8 received_channel;
  22032. + u8 control;
  22033. + u8 mask;
  22034. + u8 freq;
  22035. + u16 len;
  22036. + u8 nic_type;
  22037. +};
  22038. +
  22039. +/* IEEE 802.11 requires that STA supports concurrent reception of at least
  22040. + * three fragmented frames. This define can be increased to support more
  22041. + * concurrent frames, but it should be noted that each entry can consume about
  22042. + * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
  22043. +#define IEEE80211_FRAG_CACHE_LEN 4
  22044. +
  22045. +struct ieee80211_frag_entry {
  22046. + unsigned long first_frag_time;
  22047. + unsigned int seq;
  22048. + unsigned int last_frag;
  22049. + struct sk_buff *skb;
  22050. + u8 src_addr[ETH_ALEN];
  22051. + u8 dst_addr[ETH_ALEN];
  22052. +};
  22053. +
  22054. +struct ieee80211_stats {
  22055. + unsigned int tx_unicast_frames;
  22056. + unsigned int tx_multicast_frames;
  22057. + unsigned int tx_fragments;
  22058. + unsigned int tx_unicast_octets;
  22059. + unsigned int tx_multicast_octets;
  22060. + unsigned int tx_deferred_transmissions;
  22061. + unsigned int tx_single_retry_frames;
  22062. + unsigned int tx_multiple_retry_frames;
  22063. + unsigned int tx_retry_limit_exceeded;
  22064. + unsigned int tx_discards;
  22065. + unsigned int rx_unicast_frames;
  22066. + unsigned int rx_multicast_frames;
  22067. + unsigned int rx_fragments;
  22068. + unsigned int rx_unicast_octets;
  22069. + unsigned int rx_multicast_octets;
  22070. + unsigned int rx_fcs_errors;
  22071. + unsigned int rx_discards_no_buffer;
  22072. + unsigned int tx_discards_wrong_sa;
  22073. + unsigned int rx_discards_undecryptable;
  22074. + unsigned int rx_message_in_msg_fragments;
  22075. + unsigned int rx_message_in_bad_msg_fragments;
  22076. +};
  22077. +
  22078. +struct ieee80211_softmac_stats{
  22079. + unsigned int rx_ass_ok;
  22080. + unsigned int rx_ass_err;
  22081. + unsigned int rx_probe_rq;
  22082. + unsigned int tx_probe_rs;
  22083. + unsigned int tx_beacons;
  22084. + unsigned int rx_auth_rq;
  22085. + unsigned int rx_auth_rs_ok;
  22086. + unsigned int rx_auth_rs_err;
  22087. + unsigned int tx_auth_rq;
  22088. + unsigned int no_auth_rs;
  22089. + unsigned int no_ass_rs;
  22090. + unsigned int tx_ass_rq;
  22091. + unsigned int rx_ass_rq;
  22092. + unsigned int tx_probe_rq;
  22093. + unsigned int reassoc;
  22094. + unsigned int swtxstop;
  22095. + unsigned int swtxawake;
  22096. +};
  22097. +
  22098. +struct ieee80211_device;
  22099. +
  22100. +#include "ieee80211_crypt.h"
  22101. +
  22102. +#define SEC_KEY_1 (1<<0)
  22103. +#define SEC_KEY_2 (1<<1)
  22104. +#define SEC_KEY_3 (1<<2)
  22105. +#define SEC_KEY_4 (1<<3)
  22106. +#define SEC_ACTIVE_KEY (1<<4)
  22107. +#define SEC_AUTH_MODE (1<<5)
  22108. +#define SEC_UNICAST_GROUP (1<<6)
  22109. +#define SEC_LEVEL (1<<7)
  22110. +#define SEC_ENABLED (1<<8)
  22111. +
  22112. +#define SEC_LEVEL_0 0 /* None */
  22113. +#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
  22114. +#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
  22115. +#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
  22116. +#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
  22117. +
  22118. +#define WEP_KEYS 4
  22119. +#define WEP_KEY_LEN 13
  22120. +#define ALG_KEY_LEN 32
  22121. +
  22122. +#ifdef _RTL8187_EXT_PATCH_
  22123. +#define MAX_MP 16
  22124. +#endif
  22125. +struct ieee80211_security {
  22126. + u16 active_key:2,
  22127. + enabled:1,
  22128. + auth_mode:2,
  22129. + auth_algo:4,
  22130. + unicast_uses_group:1;
  22131. + u8 key_sizes[WEP_KEYS];
  22132. + u8 keys[WEP_KEYS][ALG_KEY_LEN];
  22133. + u8 level;
  22134. + u16 flags;
  22135. +} __attribute__ ((packed));
  22136. +
  22137. +
  22138. +/*
  22139. +
  22140. + 802.11 data frame from AP
  22141. +
  22142. + ,-------------------------------------------------------------------.
  22143. +Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
  22144. + |------|------|---------|---------|---------|------|---------|------|
  22145. +Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
  22146. + | | tion | (BSSID) | | | ence | data | |
  22147. + `-------------------------------------------------------------------'
  22148. +
  22149. +Total: 28-2340 bytes
  22150. +
  22151. +*/
  22152. +
  22153. +struct ieee80211_header_data {
  22154. + u16 frame_ctl;
  22155. + u16 duration_id;
  22156. + u8 addr1[6];
  22157. + u8 addr2[6];
  22158. + u8 addr3[6];
  22159. + u16 seq_ctrl;
  22160. +};
  22161. +
  22162. +#define BEACON_PROBE_SSID_ID_POSITION 12
  22163. +
  22164. +/* Management Frame Information Element Types */
  22165. +#define MFIE_TYPE_SSID 0
  22166. +#define MFIE_TYPE_RATES 1
  22167. +#define MFIE_TYPE_FH_SET 2
  22168. +#define MFIE_TYPE_DS_SET 3
  22169. +#define MFIE_TYPE_CF_SET 4
  22170. +#define MFIE_TYPE_TIM 5
  22171. +#define MFIE_TYPE_IBSS_SET 6
  22172. +#define MFIE_TYPE_COUNTRY 7
  22173. +#define MFIE_TYPE_CHALLENGE 16
  22174. +#define MFIE_TYPE_ERP 42
  22175. +#define MFIE_TYPE_RSN 48
  22176. +#define MFIE_TYPE_RATES_EX 50
  22177. +#define MFIE_TYPE_GENERIC 221
  22178. +
  22179. +#ifdef ENABLE_DOT11D
  22180. +typedef enum
  22181. +{
  22182. + COUNTRY_CODE_FCC = 0,
  22183. + COUNTRY_CODE_IC = 1,
  22184. + COUNTRY_CODE_ETSI = 2,
  22185. + COUNTRY_CODE_SPAIN = 3,
  22186. + COUNTRY_CODE_FRANCE = 4,
  22187. + COUNTRY_CODE_MKK = 5,
  22188. + COUNTRY_CODE_MKK1 = 6,
  22189. + COUNTRY_CODE_ISRAEL = 7,
  22190. + COUNTRY_CODE_TELEC = 8,
  22191. + COUNTRY_CODE_GLOBAL_DOMAIN = 9,
  22192. + COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10
  22193. +}country_code_type_t;
  22194. +#endif
  22195. +
  22196. +
  22197. +struct ieee80211_info_element_hdr {
  22198. + u8 id;
  22199. + u8 len;
  22200. +} __attribute__ ((packed));
  22201. +
  22202. +struct ieee80211_info_element {
  22203. + u8 id;
  22204. + u8 len;
  22205. + u8 data[0];
  22206. +} __attribute__ ((packed));
  22207. +
  22208. +/*
  22209. + * These are the data types that can make up management packets
  22210. + *
  22211. + u16 auth_algorithm;
  22212. + u16 auth_sequence;
  22213. + u16 beacon_interval;
  22214. + u16 capability;
  22215. + u8 current_ap[ETH_ALEN];
  22216. + u16 listen_interval;
  22217. + struct {
  22218. + u16 association_id:14, reserved:2;
  22219. + } __attribute__ ((packed));
  22220. + u32 time_stamp[2];
  22221. + u16 reason;
  22222. + u16 status;
  22223. +*/
  22224. +
  22225. +#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
  22226. +#define IEEE80211_DEFAULT_BASIC_RATE 10
  22227. +#define IEEE80211_DEFAULT_MESHID "802.11s"
  22228. +#define IEEE80211_DEFAULT_MESH_CHAN 1
  22229. +
  22230. +struct ieee80211_authentication {
  22231. + struct ieee80211_header_data header;
  22232. + u16 algorithm;
  22233. + u16 transaction;
  22234. + u16 status;
  22235. + //struct ieee80211_info_element_hdr info_element;
  22236. +} __attribute__ ((packed));
  22237. +
  22238. +
  22239. +struct ieee80211_probe_response {
  22240. + struct ieee80211_header_data header;
  22241. + u32 time_stamp[2];
  22242. + u16 beacon_interval;
  22243. + u16 capability;
  22244. + struct ieee80211_info_element info_element;
  22245. +} __attribute__ ((packed));
  22246. +
  22247. +struct ieee80211_probe_request {
  22248. + struct ieee80211_header_data header;
  22249. + /*struct ieee80211_info_element info_element;*/
  22250. +} __attribute__ ((packed));
  22251. +
  22252. +struct ieee80211_assoc_request_frame {
  22253. + struct ieee80211_hdr_3addr header;
  22254. + u16 capability;
  22255. + u16 listen_interval;
  22256. + //u8 current_ap[ETH_ALEN];
  22257. + struct ieee80211_info_element_hdr info_element;
  22258. +} __attribute__ ((packed));
  22259. +
  22260. +struct ieee80211_assoc_response_frame {
  22261. + struct ieee80211_hdr_3addr header;
  22262. + u16 capability;
  22263. + u16 status;
  22264. + u16 aid;
  22265. + struct ieee80211_info_element info_element; /* supported rates */
  22266. +} __attribute__ ((packed));
  22267. +
  22268. +
  22269. +struct ieee80211_txb {
  22270. + u8 nr_frags;
  22271. + u8 encrypted;
  22272. + u16 reserved;
  22273. + u16 frag_size;
  22274. + u16 payload_size;
  22275. + struct sk_buff *fragments[0];
  22276. +};
  22277. +
  22278. +struct ieee80211_wmm_ac_param {
  22279. + u8 ac_aci_acm_aifsn;
  22280. + u8 ac_ecwmin_ecwmax;
  22281. + u16 ac_txop_limit;
  22282. +};
  22283. +
  22284. +struct ieee80211_wmm_ts_info {
  22285. + u8 ac_dir_tid;
  22286. + u8 ac_up_psb;
  22287. + u8 reserved;
  22288. +} __attribute__ ((packed));
  22289. +
  22290. +struct ieee80211_wmm_tspec_elem {
  22291. + struct ieee80211_wmm_ts_info ts_info;
  22292. + u16 norm_msdu_size;
  22293. + u16 max_msdu_size;
  22294. + u32 min_serv_inter;
  22295. + u32 max_serv_inter;
  22296. + u32 inact_inter;
  22297. + u32 suspen_inter;
  22298. + u32 serv_start_time;
  22299. + u32 min_data_rate;
  22300. + u32 mean_data_rate;
  22301. + u32 peak_data_rate;
  22302. + u32 max_burst_size;
  22303. + u32 delay_bound;
  22304. + u32 min_phy_rate;
  22305. + u16 surp_band_allow;
  22306. + u16 medium_time;
  22307. +}__attribute__((packed));
  22308. +
  22309. +enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
  22310. +#define MAX_SP_Len (WMM_all_frame << 4)
  22311. +#define IEEE80211_QOS_TID 0x0f
  22312. +#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
  22313. +
  22314. +/* SWEEP TABLE ENTRIES NUMBER*/
  22315. +#define MAX_SWEEP_TAB_ENTRIES 42
  22316. +#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
  22317. +/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
  22318. + * only use 8, and then use extended rates for the remaining supported
  22319. + * rates. Other APs, however, stick all of their supported rates on the
  22320. + * main rates information element... */
  22321. +#define MAX_RATES_LENGTH ((u8)12)
  22322. +#define MAX_RATES_EX_LENGTH ((u8)16)
  22323. +#define MAX_NETWORK_COUNT 128
  22324. +#ifdef ENABLE_DOT11D
  22325. +#define MAX_CHANNEL_NUMBER 165 //YJ,modified,080625
  22326. +#define MAX_IE_LEN 0xFF //+YJ,080625
  22327. +#else
  22328. +#define MAX_CHANNEL_NUMBER 161
  22329. +#endif
  22330. +
  22331. +//#define IEEE80211_SOFTMAC_SCAN_TIME 400
  22332. +#define IEEE80211_SOFTMAC_SCAN_TIME 100//lzm mod 081209
  22333. +//(HZ / 2)
  22334. +#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
  22335. +
  22336. +#define CRC_LENGTH 4U
  22337. +
  22338. +#define MAX_WPA_IE_LEN 64
  22339. +
  22340. +#define NETWORK_EMPTY_ESSID (1<<0)
  22341. +#define NETWORK_HAS_OFDM (1<<1)
  22342. +#define NETWORK_HAS_CCK (1<<2)
  22343. +
  22344. +#define IEEE80211_DTIM_MBCAST 4
  22345. +#define IEEE80211_DTIM_UCAST 2
  22346. +#define IEEE80211_DTIM_VALID 1
  22347. +#define IEEE80211_DTIM_INVALID 0
  22348. +
  22349. +#define IEEE80211_PS_DISABLED 0
  22350. +#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
  22351. +#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
  22352. +
  22353. +//added by David for QoS 2006/6/30
  22354. +//#define WMM_Hang_8187
  22355. +#ifdef WMM_Hang_8187
  22356. +#undef WMM_Hang_8187
  22357. +#endif
  22358. +
  22359. +#define WME_AC_BE 0x00
  22360. +#define WME_AC_BK 0x01
  22361. +#define WME_AC_VI 0x02
  22362. +#define WME_AC_VO 0x03
  22363. +#define WME_ACI_MASK 0x03
  22364. +#define WME_AIFSN_MASK 0x03
  22365. +#define WME_AC_PRAM_LEN 16
  22366. +
  22367. +//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
  22368. +//#define UP2AC(up) ((up<3) ? ((up==0)?1:0) : (up>>1))
  22369. +#define UP2AC(up) ( \
  22370. + ((up) < 1) ? WME_AC_BE : \
  22371. + ((up) < 3) ? WME_AC_BK : \
  22372. + ((up) < 4) ? WME_AC_BE : \
  22373. + ((up) < 6) ? WME_AC_VI : \
  22374. + WME_AC_VO)
  22375. +//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
  22376. +#define AC2UP(_ac) ( \
  22377. + ((_ac) == WME_AC_VO) ? 6 : \
  22378. + ((_ac) == WME_AC_VI) ? 5 : \
  22379. + ((_ac) == WME_AC_BK) ? 1 : \
  22380. + 0)
  22381. +
  22382. +#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
  22383. +struct ether_header {
  22384. + u8 ether_dhost[ETHER_ADDR_LEN];
  22385. + u8 ether_shost[ETHER_ADDR_LEN];
  22386. + u16 ether_type;
  22387. +} __attribute__((packed));
  22388. +
  22389. +#ifndef ETHERTYPE_PAE
  22390. +#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
  22391. +#endif
  22392. +#ifndef ETHERTYPE_IP
  22393. +#define ETHERTYPE_IP 0x0800 /* IP protocol */
  22394. +#endif
  22395. +
  22396. +struct ieee80211_network {
  22397. + /* These entries are used to identify a unique network */
  22398. + u8 bssid[ETH_ALEN];
  22399. + u8 channel;
  22400. + /* Ensure null-terminated for any debug msgs */
  22401. + u8 ssid[IW_ESSID_MAX_SIZE + 1];
  22402. + u8 ssid_len;
  22403. +
  22404. + /* These are network statistics */
  22405. + struct ieee80211_rx_stats stats;
  22406. + u16 capability;
  22407. + u8 rates[MAX_RATES_LENGTH];
  22408. + u8 rates_len;
  22409. + u8 rates_ex[MAX_RATES_EX_LENGTH];
  22410. + u8 rates_ex_len;
  22411. + unsigned long last_scanned;
  22412. + u8 mode;
  22413. + u8 flags;
  22414. + u32 last_associate;
  22415. + u32 time_stamp[2];
  22416. + u16 beacon_interval;
  22417. + u16 listen_interval;
  22418. + u16 atim_window;
  22419. + u8 wpa_ie[MAX_WPA_IE_LEN];
  22420. + size_t wpa_ie_len;
  22421. + u8 rsn_ie[MAX_WPA_IE_LEN];
  22422. + size_t rsn_ie_len;
  22423. + u8 dtim_period;
  22424. + u8 dtim_data;
  22425. + u32 last_dtim_sta_time[2];
  22426. +#ifdef _RTL8187_EXT_PATCH_
  22427. + void *ext_entry;
  22428. +#endif
  22429. + struct list_head list;
  22430. + //appeded for QoS
  22431. + u8 wmm_info;
  22432. + struct ieee80211_wmm_ac_param wmm_param[4];
  22433. + u8 QoS_Enable;
  22434. + u8 SignalStrength;
  22435. +#ifdef THOMAS_TURBO
  22436. + u8 Turbo_Enable;//enable turbo mode, added by thomas
  22437. +#endif
  22438. +
  22439. +#ifdef ENABLE_DOT11D
  22440. + u16 CountryIeLen;
  22441. + u8 CountryIeBuf[MAX_IE_LEN];
  22442. +#endif
  22443. +
  22444. +};
  22445. +
  22446. +enum ieee80211_state {
  22447. +
  22448. + /* the card is not linked at all */
  22449. + IEEE80211_NOLINK = 0,
  22450. +
  22451. + /* IEEE80211_ASSOCIATING* are for BSS client mode
  22452. + * the driver shall not perform RX filtering unless
  22453. + * the state is LINKED.
  22454. + * The driver shall just check for the state LINKED and
  22455. + * defaults to NOLINK for ALL the other states (including
  22456. + * LINKED_SCANNING)
  22457. + */
  22458. +
  22459. + /* the association procedure will start (wq scheduling)*/
  22460. + IEEE80211_ASSOCIATING,
  22461. + IEEE80211_ASSOCIATING_RETRY,
  22462. +
  22463. + /* the association procedure is sending AUTH request*/
  22464. + IEEE80211_ASSOCIATING_AUTHENTICATING,
  22465. +
  22466. + /* the association procedure has successfully authentcated
  22467. + * and is sending association request
  22468. + */
  22469. + IEEE80211_ASSOCIATING_AUTHENTICATED,
  22470. +
  22471. + /* the link is ok. the card associated to a BSS or linked
  22472. + * to a ibss cell or acting as an AP and creating the bss
  22473. + */
  22474. + IEEE80211_LINKED,
  22475. +
  22476. + /* same as LINKED, but the driver shall apply RX filter
  22477. + * rules as we are in NO_LINK mode. As the card is still
  22478. + * logically linked, but it is doing a syncro site survey
  22479. + * then it will be back to LINKED state.
  22480. + */
  22481. + IEEE80211_LINKED_SCANNING,
  22482. +//by amy for mesh
  22483. + IEEE80211_MESH_SCANNING,
  22484. + IEEE80211_MESH_LINKED,
  22485. +//by amy for mesh
  22486. +
  22487. +};
  22488. +
  22489. +#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
  22490. +#define DEFAULT_FTS 2346
  22491. +#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
  22492. +#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
  22493. +
  22494. +
  22495. +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
  22496. +extern inline int is_multicast_ether_addr(const u8 *addr)
  22497. +{
  22498. + return ((addr[0] != 0xff) && (0x01 & addr[0]));
  22499. +}
  22500. +#endif
  22501. +
  22502. +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
  22503. +extern inline int is_broadcast_ether_addr(const u8 *addr)
  22504. +{
  22505. + return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \
  22506. + (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
  22507. +}
  22508. +#endif
  22509. +
  22510. +#define CFG_IEEE80211_RESERVE_FCS (1<<0)
  22511. +#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
  22512. +
  22513. +typedef struct tx_pending_t{
  22514. + int frag;
  22515. + struct ieee80211_txb *txb;
  22516. +}tx_pending_t;
  22517. +
  22518. +#ifdef _RTL8187_EXT_PATCH_
  22519. +struct ieee80211_crypt_data_list{
  22520. + u8 used;
  22521. + u8 mac_addr[ETH_ALEN]; //record mac_add
  22522. + struct ieee80211_crypt_data *crypt[WEP_KEYS];
  22523. +}__attribute__((packed));
  22524. +
  22525. +#endif
  22526. +
  22527. +struct ieee80211_device {
  22528. + struct net_device *dev;
  22529. +
  22530. + /* Bookkeeping structures */
  22531. + struct net_device_stats stats;
  22532. + struct ieee80211_stats ieee_stats;
  22533. + struct ieee80211_softmac_stats softmac_stats;
  22534. +
  22535. + /* Probe / Beacon management */
  22536. + struct list_head network_free_list;
  22537. + struct list_head network_list;
  22538. + struct ieee80211_network *networks;
  22539. + int scans;
  22540. + int scan_age;
  22541. +
  22542. + int iw_mode; /* operating mode (IW_MODE_*) */
  22543. +#ifdef _RTL8187_EXT_PATCH_
  22544. + int iw_ext_mode; // if iw_mode == iw_ext_mode, do ext_patch_**();
  22545. +#endif
  22546. +
  22547. + spinlock_t lock;
  22548. + spinlock_t wpax_suitlist_lock;
  22549. +
  22550. + int tx_headroom; /* Set to size of any additional room needed at front
  22551. + * of allocated Tx SKBs */
  22552. + u32 config;
  22553. +
  22554. + /* WEP and other encryption related settings at the device level */
  22555. + int open_wep; /* Set to 1 to allow unencrypted frames */
  22556. +
  22557. + int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
  22558. + * WEP key changes */
  22559. +
  22560. + /* If the host performs {en,de}cryption, then set to 1 */
  22561. + int host_encrypt;
  22562. + int host_decrypt;
  22563. + int ieee802_1x; /* is IEEE 802.1X used */
  22564. +
  22565. + /* WPA data */
  22566. + int wpa_enabled;
  22567. + int drop_unencrypted;
  22568. + int tkip_countermeasures;
  22569. + int privacy_invoked;
  22570. + size_t wpa_ie_len;
  22571. + u8 *wpa_ie;
  22572. +
  22573. +//#ifdef JOHN_TKIP
  22574. + u8 ap_mac_addr[6];
  22575. + u16 pairwise_key_type;
  22576. + u16 broadcast_key_type;
  22577. +//#endif
  22578. + struct list_head crypt_deinit_list;
  22579. +#ifdef _RTL8187_EXT_PATCH_
  22580. + struct ieee80211_crypt_data_list* cryptlist[MAX_MP];
  22581. +#else
  22582. + struct ieee80211_crypt_data *crypt[WEP_KEYS];
  22583. +#endif
  22584. + int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
  22585. + struct timer_list crypt_deinit_timer;
  22586. +
  22587. + int bcrx_sta_key; /* use individual keys to override default keys even
  22588. + * with RX of broad/multicast frames */
  22589. +
  22590. + /* Fragmentation structures */
  22591. + // each streaming contain a entry
  22592. + struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
  22593. + unsigned int frag_next_idx[17];
  22594. + u16 fts; /* Fragmentation Threshold */
  22595. +
  22596. + /* This stores infos for the current network.
  22597. + * Either the network we are associated in INFRASTRUCTURE
  22598. + * or the network that we are creating in MASTER mode.
  22599. + * ad-hoc is a mixture ;-).
  22600. + * Note that in infrastructure mode, even when not associated,
  22601. + * fields bssid and essid may be valid (if wpa_set and essid_set
  22602. + * are true) as thy carry the value set by the user via iwconfig
  22603. + */
  22604. + struct ieee80211_network current_network;
  22605. +
  22606. +
  22607. + enum ieee80211_state state;
  22608. +
  22609. + int short_slot;
  22610. + int mode; /* A, B, G */
  22611. + int modulation; /* CCK, OFDM */
  22612. + int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
  22613. + int abg_true; /* ABG flag */
  22614. +
  22615. + /* used for forcing the ibss workqueue to terminate
  22616. + * without wait for the syncro scan to terminate
  22617. + */
  22618. + short sync_scan_hurryup;
  22619. +
  22620. +#ifdef ENABLE_DOT11D
  22621. + void * pDot11dInfo;
  22622. + bool bGlobalDomain;
  22623. + bool bWorldWide13;//lzm add 20081205
  22624. +
  22625. + // For Liteon Ch12~13 passive scan
  22626. + u8 MinPassiveChnlNum;
  22627. + u8 IbssStartChnl;
  22628. +#else
  22629. + /* map of allowed channels. 0 is dummy */
  22630. + // FIXME: remeber to default to a basic channel plan depending of the PHY type
  22631. + int channel_map[MAX_CHANNEL_NUMBER+1];
  22632. +#endif
  22633. +
  22634. + int rate; /* current rate */
  22635. + int basic_rate;
  22636. + //FIXME: pleace callback, see if redundant with softmac_features
  22637. + short active_scan;
  22638. +
  22639. +#ifdef _RTL8187_EXT_PATCH_
  22640. +// short ch_lock;
  22641. + short meshScanMode;
  22642. +#endif
  22643. + /* this contains flags for selectively enable softmac support */
  22644. + u16 softmac_features;
  22645. +
  22646. + /* if the sequence control field is not filled by HW */
  22647. + u16 seq_ctrl[5];
  22648. +
  22649. + /* association procedure transaction sequence number */
  22650. + u16 associate_seq;
  22651. +
  22652. + /* AID for RTXed association responses */
  22653. + u16 assoc_id;
  22654. +
  22655. + /* power save mode related*/
  22656. + short ps;
  22657. + short sta_sleep;
  22658. + int ps_timeout;
  22659. + struct tasklet_struct ps_task;
  22660. + u32 ps_th;
  22661. + u32 ps_tl;
  22662. +
  22663. + short raw_tx;
  22664. + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
  22665. + short queue_stop;
  22666. + short scanning;
  22667. + short scan_watchdog;//lzm add 081215 for roaming
  22668. + short proto_started;
  22669. +
  22670. + struct semaphore wx_sem;
  22671. + struct semaphore scan_sem;
  22672. + struct semaphore ips_sem;
  22673. + spinlock_t mgmt_tx_lock;
  22674. + spinlock_t beacon_lock;
  22675. + spinlock_t beaconflag_lock;
  22676. + short beacon_txing;
  22677. +
  22678. + short wap_set;
  22679. + short ssid_set;
  22680. +
  22681. + u8 wpax_type_set; //{added by David, 2006.9.28}
  22682. + u32 wpax_type_notify; //{added by David, 2006.9.26}
  22683. +
  22684. + /* QoS related flag */
  22685. + char init_wmmparam_flag;
  22686. +
  22687. + /* for discarding duplicated packets in IBSS */
  22688. + struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
  22689. +
  22690. + /* for discarding duplicated packets in Mesh */ //added by david 2008.2.28/
  22691. + struct list_head mesh_mac_hash[IEEE_MESH_MAC_HASH_SIZE];
  22692. +
  22693. + /* for discarding duplicated packets in BSS */
  22694. + u16 last_rxseq_num[17]; /* rx seq previous per-tid */
  22695. + u16 last_rxfrag_num[17];/* tx frag previous per-tid */
  22696. + unsigned long last_packet_time[17];
  22697. +
  22698. + /* for PS mode */
  22699. + unsigned long last_rx_ps_time;
  22700. +
  22701. + /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
  22702. + struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
  22703. + int mgmt_queue_head;
  22704. + int mgmt_queue_tail;
  22705. +//by amy for ps
  22706. + bool bInactivePs;
  22707. + bool actscanning;
  22708. + u16 ListenInterval;
  22709. + u32 NumRxData;
  22710. + unsigned long NumRxDataInPeriod; //YJ,add,080828
  22711. + unsigned long NumRxBcnInPeriod; //YJ,add,080828
  22712. +//by amy for ps
  22713. + short meshid_set;
  22714. + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
  22715. + struct tx_pending_t tx_pending;
  22716. +
  22717. + /* used if IEEE_SOFTMAC_ASSOCIATE is set */
  22718. + struct timer_list associate_timer;
  22719. +
  22720. + /* used if IEEE_SOFTMAC_BEACONS is set */
  22721. + struct timer_list beacon_timer;
  22722. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  22723. + struct work_struct associate_complete_wq;
  22724. +// struct work_struct associate_retry_wq;
  22725. +// struct work_struct start_ibss_wq;
  22726. + struct work_struct associate_procedure_wq;
  22727. + struct work_struct ips_leave_wq; //YJ,add,081230,for IPS
  22728. + bool bHwRadioOff;//by lizhaoming
  22729. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  22730. + struct delayed_work softmac_scan_wq;
  22731. + struct delayed_work start_ibss_wq;
  22732. + struct delayed_work associate_retry_wq;
  22733. +//by amy for rate adaptive
  22734. + struct delayed_work rate_adapter_wq;
  22735. +//by amy for rate adaptive
  22736. + struct delayed_work watch_dog_wq;
  22737. + struct delayed_work hw_dig_wq;
  22738. + struct delayed_work tx_pw_wq;
  22739. +
  22740. +//Added for RF power on power off by lizhaoming 080512
  22741. +#ifdef POLLING_METHOD_FOR_RADIO
  22742. + struct delayed_work GPIOChangeRFWorkItem;
  22743. +#endif
  22744. +
  22745. +#ifdef SW_ANTE_DIVERSITY
  22746. + struct delayed_work SwAntennaWorkItem;
  22747. +#endif
  22748. +
  22749. +#else
  22750. + struct work_struct softmac_scan_wq;
  22751. + struct work_struct start_ibss_wq;
  22752. + struct work_struct associate_retry_wq;
  22753. +//by amy for rate adaptive
  22754. + struct work_struct rate_adapter_wq;
  22755. +//by amy for rate adaptive
  22756. + struct work_struct watch_dog_wq;
  22757. + struct work_struct hw_dig_wq;
  22758. + struct work_struct tx_pw_wq;
  22759. +
  22760. +//Added for RF power on power off by lizhaoming 080512
  22761. +#ifdef POLLING_METHOD_FOR_RADIO
  22762. + struct work_struct GPIOChangeRFWorkItem;
  22763. +#endif
  22764. +
  22765. +#ifdef SW_ANTE_DIVERSITY
  22766. + struct work_struct SwAntennaWorkItem;
  22767. +#endif
  22768. +
  22769. +#endif
  22770. +
  22771. +//struct work_struct softmac_scan_wq;
  22772. + struct work_struct wx_sync_scan_wq;
  22773. + struct work_struct wmm_param_update_wq;
  22774. +#ifdef _RTL8187_EXT_PATCH_
  22775. + struct work_struct ext_stop_scan_wq;
  22776. + struct work_struct ext_send_beacon_wq;
  22777. +#endif
  22778. + struct workqueue_struct *wq;
  22779. +#else
  22780. + /* used for periodly scan */
  22781. + struct timer_list scan_timer;
  22782. +
  22783. + struct tq_struct associate_complete_wq;
  22784. + struct tq_struct associate_retry_wq;
  22785. + struct tq_struct start_ibss_wq;
  22786. + struct tq_struct associate_procedure_wq;
  22787. + struct tq_struct ips_leave_wq; //YJ,add,081230,for IPS
  22788. + struct tq_struct softmac_scan_wq;
  22789. + struct tq_struct wx_sync_scan_wq;
  22790. + struct tq_struct wmm_param_update_wq;
  22791. +#ifdef _RTL8187_EXT_PATCH_
  22792. + struct tq_struct ext_stop_scan_wq;
  22793. + struct tq_struct ext_send_beacon_wq;
  22794. +#endif
  22795. +#endif
  22796. +
  22797. + /* Callback functions */
  22798. + void (*set_security)(struct net_device *dev,
  22799. + struct ieee80211_security *sec);
  22800. +
  22801. + /* Used to TX data frame by using txb structs.
  22802. + * this is not used if in the softmac_features
  22803. + * is set the flag IEEE_SOFTMAC_TX_QUEUE
  22804. + */
  22805. + int (*hard_start_xmit)(struct ieee80211_txb *txb,
  22806. + struct net_device *dev);
  22807. +
  22808. + int (*reset_port)(struct net_device *dev);
  22809. +
  22810. + /* Softmac-generated frames (mamagement) are TXed via this
  22811. + * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
  22812. + * not set. As some cards may have different HW queues that
  22813. + * one might want to use for data and management frames
  22814. + * the option to have two callbacks might be useful.
  22815. + * This fucntion can't sleep.
  22816. + */
  22817. + int (*softmac_hard_start_xmit)(struct sk_buff *skb,
  22818. + struct net_device *dev);
  22819. +
  22820. + /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
  22821. + * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
  22822. + * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
  22823. + * then also management frames are sent via this callback.
  22824. + * This function can't sleep.
  22825. + */
  22826. + void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
  22827. + struct net_device *dev,int rate);
  22828. +
  22829. + /* stops the HW queue for DATA frames. Useful to avoid
  22830. + * waste time to TX data frame when we are reassociating
  22831. + * This function can sleep.
  22832. + */
  22833. + void (*data_hard_stop)(struct net_device *dev);
  22834. +
  22835. + /* OK this is complementar to data_poll_hard_stop */
  22836. + void (*data_hard_resume)(struct net_device *dev);
  22837. +
  22838. + /* ask to the driver to retune the radio .
  22839. + * This function can sleep. the driver should ensure
  22840. + * the radio has been swithced before return.
  22841. + */
  22842. + void (*set_chan)(struct net_device *dev,short ch);
  22843. +
  22844. + /* These are not used if the ieee stack takes care of
  22845. + * scanning (IEEE_SOFTMAC_SCAN feature set).
  22846. + * In this case only the set_chan is used.
  22847. + *
  22848. + * The syncro version is similar to the start_scan but
  22849. + * does not return until all channels has been scanned.
  22850. + * this is called in user context and should sleep,
  22851. + * it is called in a work_queue when swithcing to ad-hoc mode
  22852. + * or in behalf of iwlist scan when the card is associated
  22853. + * and root user ask for a scan.
  22854. + * the fucntion stop_scan should stop both the syncro and
  22855. + * background scanning and can sleep.
  22856. + * The fucntion start_scan should initiate the background
  22857. + * scanning and can't sleep.
  22858. + */
  22859. + void (*scan_syncro)(struct net_device *dev);
  22860. + void (*start_scan)(struct net_device *dev);
  22861. + void (*stop_scan)(struct net_device *dev);
  22862. +
  22863. + /* indicate the driver that the link state is changed
  22864. + * for example it may indicate the card is associated now.
  22865. + * Driver might be interested in this to apply RX filter
  22866. + * rules or simply light the LINK led
  22867. + */
  22868. + void (*link_change)(struct net_device *dev);
  22869. +
  22870. + /* these two function indicates to the HW when to start
  22871. + * and stop to send beacons. This is used when the
  22872. + * IEEE_SOFTMAC_BEACONS is not set. For now the
  22873. + * stop_send_bacons is NOT guaranteed to be called only
  22874. + * after start_send_beacons.
  22875. + */
  22876. + void (*start_send_beacons) (struct net_device *dev);
  22877. + void (*stop_send_beacons) (struct net_device *dev);
  22878. +
  22879. + /* power save mode related */
  22880. + void (*sta_wake_up) (struct net_device *dev);
  22881. + void (*ps_request_tx_ack) (struct net_device *dev);
  22882. + void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
  22883. + short (*ps_is_queue_empty) (struct net_device *dev);
  22884. +
  22885. +//by lizhaoming for LED 2008.6.23
  22886. +#ifdef LED
  22887. + void (*ieee80211_led_contorl) (struct net_device *dev, LED_CTL_MODE LedAction);
  22888. +#endif
  22889. +#ifdef CONFIG_IPS
  22890. + void (*ieee80211_ips_leave) (struct net_device *dev);
  22891. +#endif
  22892. + /* QoS related */
  22893. + //void (*wmm_param_update) (struct net_device *dev, u8 *ac_param);
  22894. + //void (*wmm_param_update) (struct ieee80211_device *ieee);
  22895. +
  22896. +
  22897. +#ifdef _RTL8187_EXT_PATCH_
  22898. +
  22899. + /// ieee80211_softmac.c
  22900. + int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); // start special mode
  22901. +
  22902. + short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); // return = 0: no more phases, >0: another phase
  22903. + u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); // return tag
  22904. +
  22905. + void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); // stop timer
  22906. +
  22907. + void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);
  22908. + u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);
  22909. +
  22910. + int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);
  22911. + int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);
  22912. +
  22913. + void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);
  22914. + u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);
  22915. +
  22916. + int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);
  22917. +
  22918. + int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);
  22919. +
  22920. + int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  22921. + int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  22922. +//by amy for mesh
  22923. + void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);
  22924. +//by amy for mesh
  22925. + // ieee80211_rx.c
  22926. + // rz
  22927. + void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);
  22928. + unsigned int(*ext_patch_ieee80211_process_probe_response_1)(struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_rx_stats *stats);
  22929. +
  22930. + void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);
  22931. + struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
  22932. +
  22933. + // success(return 0) is responsible to free skb
  22934. + int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);
  22935. +
  22936. + int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);
  22937. +
  22938. + // Check whether or not accept the incoming frame. return 0: not accept, >0: accept
  22939. + int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);
  22940. +
  22941. + // return > 0 is success. 0 when failed
  22942. + // success(return >0) is responsible to free skb
  22943. + int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  22944. +
  22945. + /* added by david for setting acl dynamically */
  22946. + u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);
  22947. +
  22948. + // int (*ext_patch_is_duplicate_packet) (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);
  22949. +
  22950. + // ieee80211_tx.c
  22951. +
  22952. + // locked by ieee->lock. Call ieee80211_softmac_xmit afterward
  22953. + struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);
  22954. +
  22955. +
  22956. +#endif // _RTL8187_EXT_PATCH_
  22957. +
  22958. + /* This must be the last item so that it points to the data
  22959. + * allocated beyond this structure by alloc_ieee80211 */
  22960. + u8 priv[0];
  22961. +};
  22962. +
  22963. +#define IEEE_A (1<<0)
  22964. +#define IEEE_B (1<<1)
  22965. +#define IEEE_G (1<<2)
  22966. +#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
  22967. +
  22968. +/* Generate a 802.11 header */
  22969. +
  22970. +/* Uses the channel change callback directly
  22971. + * instead of [start/stop] scan callbacks
  22972. + */
  22973. +#define IEEE_SOFTMAC_SCAN (1<<2)
  22974. +
  22975. +/* Perform authentication and association handshake */
  22976. +#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
  22977. +
  22978. +/* Generate probe requests */
  22979. +#define IEEE_SOFTMAC_PROBERQ (1<<4)
  22980. +
  22981. +/* Generate respones to probe requests */
  22982. +#define IEEE_SOFTMAC_PROBERS (1<<5)
  22983. +
  22984. +/* The ieee802.11 stack will manages the netif queue
  22985. + * wake/stop for the driver, taking care of 802.11
  22986. + * fragmentation. See softmac.c for details. */
  22987. +#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
  22988. +
  22989. +/* Uses only the softmac_data_hard_start_xmit
  22990. + * even for TX management frames.
  22991. + */
  22992. +#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
  22993. +
  22994. +/* Generate beacons. The stack will enqueue beacons
  22995. + * to the card
  22996. + */
  22997. +#define IEEE_SOFTMAC_BEACONS (1<<6)
  22998. +#ifdef _RTL8187_EXT_PATCH_
  22999. +extern inline int ieee80211_find_MP(struct ieee80211_device* ieee, const u8* addr, u8 set)
  23000. +{
  23001. + int i=0;
  23002. + for (i=1; i<MAX_MP; i++)
  23003. + {
  23004. + if ((ieee->cryptlist[i]->used == 0)&&set)
  23005. + {//entry is empty
  23006. + memcpy(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN);
  23007. + ieee->cryptlist[i]->used = 1;
  23008. + return i;
  23009. + }
  23010. + else if (0 == memcmp(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN)) //find matched entry
  23011. + {
  23012. + return i;
  23013. + }
  23014. + }
  23015. + return -1;
  23016. +}
  23017. +#endif
  23018. +
  23019. +
  23020. +
  23021. +static inline void *ieee80211_priv(struct net_device *dev)
  23022. +{
  23023. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  23024. + return ((struct ieee80211_device *)netdev_priv(dev))->priv;
  23025. +#else
  23026. + return ((struct ieee80211_device *)dev->priv)->priv;
  23027. +#endif
  23028. +}
  23029. +
  23030. +extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
  23031. +{
  23032. + /* Single white space is for Linksys APs */
  23033. + if (essid_len == 1 && essid[0] == ' ')
  23034. + return 1;
  23035. +
  23036. + /* Otherwise, if the entire essid is 0, we assume it is hidden */
  23037. + while (essid_len) {
  23038. + essid_len--;
  23039. + if (essid[essid_len] != '\0')
  23040. + return 0;
  23041. + }
  23042. +
  23043. + return 1;
  23044. +}
  23045. +
  23046. +extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
  23047. +{
  23048. + /*
  23049. + * It is possible for both access points and our device to support
  23050. + * combinations of modes, so as long as there is one valid combination
  23051. + * of ap/device supported modes, then return success
  23052. + *
  23053. + */
  23054. + if ((mode & IEEE_A) &&
  23055. + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
  23056. + (ieee->freq_band & IEEE80211_52GHZ_BAND))
  23057. + return 1;
  23058. +
  23059. + if ((mode & IEEE_G) &&
  23060. + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
  23061. + (ieee->freq_band & IEEE80211_24GHZ_BAND))
  23062. + return 1;
  23063. +
  23064. + if ((mode & IEEE_B) &&
  23065. + (ieee->modulation & IEEE80211_CCK_MODULATION) &&
  23066. + (ieee->freq_band & IEEE80211_24GHZ_BAND))
  23067. + return 1;
  23068. +
  23069. + return 0;
  23070. +}
  23071. +
  23072. +extern inline int ieee80211_get_hdrlen(u16 fc)
  23073. +{
  23074. + int hdrlen = 24;
  23075. +
  23076. + switch (WLAN_FC_GET_TYPE(fc)) {
  23077. + case IEEE80211_FTYPE_DATA:
  23078. + if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
  23079. + hdrlen = 30; /* Addr4 */
  23080. + if(IEEE80211_QOS_HAS_SEQ(fc))
  23081. + hdrlen += 2; /* QOS ctrl*/
  23082. + break;
  23083. + case IEEE80211_FTYPE_CTL:
  23084. + switch (WLAN_FC_GET_STYPE(fc)) {
  23085. + case IEEE80211_STYPE_CTS:
  23086. + case IEEE80211_STYPE_ACK:
  23087. + hdrlen = 10;
  23088. + break;
  23089. + default:
  23090. + hdrlen = 16;
  23091. + break;
  23092. + }
  23093. + break;
  23094. + }
  23095. +
  23096. + return hdrlen;
  23097. +}
  23098. +
  23099. +
  23100. +
  23101. +/* ieee80211.c */
  23102. +extern void free_ieee80211(struct net_device *dev);
  23103. +extern struct net_device *alloc_ieee80211(int sizeof_priv);
  23104. +
  23105. +extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
  23106. +
  23107. +/* ieee80211_tx.c */
  23108. +
  23109. +extern int ieee80211_encrypt_fragment(
  23110. + struct ieee80211_device *ieee,
  23111. + struct sk_buff *frag,
  23112. + int hdr_len);
  23113. +
  23114. +extern int ieee80211_xmit(struct sk_buff *skb,
  23115. + struct net_device *dev);
  23116. +extern void ieee80211_txb_free(struct ieee80211_txb *);
  23117. +
  23118. +
  23119. +/* ieee80211_rx.c */
  23120. +extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
  23121. + struct ieee80211_rx_stats *rx_stats);
  23122. +extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
  23123. + struct ieee80211_hdr *header,
  23124. + struct ieee80211_rx_stats *stats);
  23125. +
  23126. +/* ieee80211_wx.c */
  23127. +extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
  23128. + struct iw_request_info *info,
  23129. + union iwreq_data *wrqu, char *key);
  23130. +extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
  23131. + struct iw_request_info *info,
  23132. + union iwreq_data *wrqu, char *key);
  23133. +extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
  23134. + struct iw_request_info *info,
  23135. + union iwreq_data *wrqu, char *key);
  23136. +extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
  23137. + struct iw_request_info *info,
  23138. + union iwreq_data* wrqu, char *extra);
  23139. +int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
  23140. + struct iw_request_info *info,
  23141. + struct iw_param *data, char *extra);
  23142. +int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
  23143. + struct iw_request_info *info,
  23144. + union iwreq_data *wrqu, char *extra);
  23145. +
  23146. +int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
  23147. +/* ieee80211_softmac.c */
  23148. +extern short ieee80211_is_54g(struct ieee80211_network net);
  23149. +extern short ieee80211_is_shortslot(struct ieee80211_network net);
  23150. +extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
  23151. + struct ieee80211_rx_stats *rx_stats, u16 type,
  23152. + u16 stype);
  23153. +extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
  23154. +
  23155. +extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
  23156. +extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
  23157. +extern void ieee80211_start_bss(struct ieee80211_device *ieee);
  23158. +extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
  23159. +extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
  23160. +extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
  23161. +extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
  23162. +extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
  23163. +extern void ieee80211_disassociate(struct ieee80211_device *ieee);
  23164. +extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
  23165. +extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
  23166. +extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
  23167. +extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
  23168. +extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
  23169. +extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
  23170. +extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
  23171. +extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
  23172. +extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
  23173. +extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
  23174. +extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
  23175. +extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
  23176. +extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
  23177. +extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
  23178. +extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
  23179. +extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
  23180. +extern void ieee80211_start_scan(struct ieee80211_device *ieee);
  23181. +
  23182. +#ifdef _RTL8187_EXT_PATCH_
  23183. +extern void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb);
  23184. +extern void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat);
  23185. +extern void ieee80211_associate_step1(struct ieee80211_device *ieee);
  23186. +extern void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason);
  23187. +extern void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type);
  23188. +extern void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
  23189. +extern struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
  23190. +extern int ieee80211_network_init(struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_network *network, struct ieee80211_rx_stats *stats);
  23191. +extern struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size, int gfp_mask);
  23192. +extern void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee);
  23193. +extern struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
  23194. +extern struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
  23195. +extern int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src);
  23196. +#endif
  23197. +
  23198. +/* ieee80211_crypt_ccmp&tkip&wep.c */
  23199. +extern void ieee80211_tkip_null(void);
  23200. +extern void ieee80211_wep_null(void);
  23201. +extern void ieee80211_ccmp_null(void);
  23202. +/* ieee80211_softmac_wx.c */
  23203. +
  23204. +extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
  23205. + struct iw_request_info *info,
  23206. + union iwreq_data *wrqu, char *ext);
  23207. +
  23208. +extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
  23209. + struct iw_request_info *info,
  23210. + union iwreq_data *awrq,
  23211. + char *extra);
  23212. +
  23213. +extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
  23214. +
  23215. +extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
  23216. + struct iw_request_info *info,
  23217. + union iwreq_data *wrqu, char *extra);
  23218. +
  23219. +extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
  23220. + struct iw_request_info *info,
  23221. + union iwreq_data *wrqu, char *extra);
  23222. +
  23223. +extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
  23224. + union iwreq_data *wrqu, char *b);
  23225. +
  23226. +extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
  23227. + union iwreq_data *wrqu, char *b);
  23228. +
  23229. +extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
  23230. + struct iw_request_info *a,
  23231. + union iwreq_data *wrqu, char *extra);
  23232. +
  23233. +extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
  23234. + union iwreq_data *wrqu, char *b);
  23235. +
  23236. +extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
  23237. + union iwreq_data *wrqu, char *b);
  23238. +
  23239. +extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
  23240. + union iwreq_data *wrqu, char *b);
  23241. +
  23242. +//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
  23243. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  23244. +extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
  23245. +#else
  23246. + extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
  23247. +#endif
  23248. +extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
  23249. + struct iw_request_info *info,
  23250. + union iwreq_data *wrqu, char *extra);
  23251. +
  23252. +extern int ieee80211_wx_get_name(struct ieee80211_device *ieee,
  23253. + struct iw_request_info *info,
  23254. + union iwreq_data *wrqu, char *extra);
  23255. +
  23256. +extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
  23257. + struct iw_request_info *info,
  23258. + union iwreq_data *wrqu, char *extra);
  23259. +
  23260. +extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
  23261. + struct iw_request_info *info,
  23262. + union iwreq_data *wrqu, char *extra);
  23263. +
  23264. +extern const long ieee80211_wlan_frequencies[];
  23265. +
  23266. +extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
  23267. +{
  23268. + ieee->scans++;
  23269. +}
  23270. +
  23271. +extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
  23272. +{
  23273. + return ieee->scans;
  23274. +}
  23275. +
  23276. +static inline const char *escape_essid(const char *essid, u8 essid_len) {
  23277. + static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  23278. + const char *s = essid;
  23279. + char *d = escaped;
  23280. +
  23281. + if (ieee80211_is_empty_essid(essid, essid_len)) {
  23282. + memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  23283. + return escaped;
  23284. + }
  23285. +
  23286. + essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
  23287. + while (essid_len--) {
  23288. + if (*s == '\0') {
  23289. + *d++ = '\\';
  23290. + *d++ = '0';
  23291. + s++;
  23292. + } else {
  23293. + *d++ = *s++;
  23294. + }
  23295. + }
  23296. + *d = '\0';
  23297. + return escaped;
  23298. +}
  23299. +#endif /* IEEE80211_H */
  23300. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_module.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_module.c
  23301. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_module.c 1970-01-01 01:00:00.000000000 +0100
  23302. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_module.c 2009-08-23 19:01:04.000000000 +0200
  23303. @@ -0,0 +1,385 @@
  23304. +/*******************************************************************************
  23305. +
  23306. + Copyright(c) 2004 Intel Corporation. All rights reserved.
  23307. +
  23308. + Portions of this file are based on the WEP enablement code provided by the
  23309. + Host AP project hostap-drivers v0.1.3
  23310. + Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
  23311. + <jkmaline@cc.hut.fi>
  23312. + Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  23313. +
  23314. + This program is free software; you can redistribute it and/or modify it
  23315. + under the terms of version 2 of the GNU General Public License as
  23316. + published by the Free Software Foundation.
  23317. +
  23318. + This program is distributed in the hope that it will be useful, but WITHOUT
  23319. + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  23320. + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  23321. + more details.
  23322. +
  23323. + You should have received a copy of the GNU General Public License along with
  23324. + this program; if not, write to the Free Software Foundation, Inc., 59
  23325. + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23326. +
  23327. + The full GNU General Public License is included in this distribution in the
  23328. + file called LICENSE.
  23329. +
  23330. + Contact Information:
  23331. + James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23332. + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23333. +
  23334. +*******************************************************************************/
  23335. +
  23336. +#include <linux/compiler.h>
  23337. +//#include <linux/config.h>
  23338. +#include <linux/errno.h>
  23339. +#include <linux/if_arp.h>
  23340. +#include <linux/in6.h>
  23341. +#include <linux/in.h>
  23342. +#include <linux/ip.h>
  23343. +#include <linux/kernel.h>
  23344. +#include <linux/module.h>
  23345. +#include <linux/netdevice.h>
  23346. +#include <linux/pci.h>
  23347. +#include <linux/proc_fs.h>
  23348. +#include <linux/skbuff.h>
  23349. +#include <linux/slab.h>
  23350. +#include <linux/tcp.h>
  23351. +#include <linux/types.h>
  23352. +#include <linux/version.h>
  23353. +#include <linux/wireless.h>
  23354. +#include <linux/etherdevice.h>
  23355. +#include <asm/uaccess.h>
  23356. +#include <net/arp.h>
  23357. +
  23358. +#include "ieee80211.h"
  23359. +
  23360. +MODULE_DESCRIPTION("802.11 data/management/control stack");
  23361. +MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
  23362. +MODULE_LICENSE("GPL");
  23363. +
  23364. +#define DRV_NAME "ieee80211"
  23365. +
  23366. +static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
  23367. +{
  23368. + if (ieee->networks)
  23369. + return 0;
  23370. +
  23371. + ieee->networks = kmalloc(
  23372. + MAX_NETWORK_COUNT * sizeof(struct ieee80211_network),
  23373. + GFP_KERNEL);
  23374. + if (!ieee->networks) {
  23375. + printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
  23376. + ieee->dev->name);
  23377. + return -ENOMEM;
  23378. + }
  23379. +
  23380. + memset(ieee->networks, 0,
  23381. + MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
  23382. +
  23383. + return 0;
  23384. +}
  23385. +
  23386. +static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
  23387. +{
  23388. + if (!ieee->networks)
  23389. + return;
  23390. + kfree(ieee->networks);
  23391. + ieee->networks = NULL;
  23392. +}
  23393. +
  23394. +static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
  23395. +{
  23396. + int i;
  23397. +
  23398. + INIT_LIST_HEAD(&ieee->network_free_list);
  23399. + INIT_LIST_HEAD(&ieee->network_list);
  23400. + for (i = 0; i < MAX_NETWORK_COUNT; i++)
  23401. + list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
  23402. +}
  23403. +
  23404. +
  23405. +struct net_device *alloc_ieee80211(int sizeof_priv)
  23406. +{
  23407. + struct ieee80211_device *ieee;
  23408. + struct net_device *dev;
  23409. + int i,err;
  23410. +
  23411. + IEEE80211_DEBUG_INFO("Initializing...\n");
  23412. +
  23413. + dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
  23414. + if (!dev) {
  23415. + IEEE80211_ERROR("Unable to network device.\n");
  23416. + goto failed;
  23417. + }
  23418. +
  23419. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  23420. + ieee = netdev_priv(dev);
  23421. +#else
  23422. + ieee = (struct ieee80211_device *)dev->priv;
  23423. +#endif
  23424. +
  23425. + ieee->dev = dev;
  23426. +
  23427. + err = ieee80211_networks_allocate(ieee);
  23428. + if (err) {
  23429. + IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
  23430. + err);
  23431. + goto failed;
  23432. + }
  23433. + ieee80211_networks_initialize(ieee);
  23434. +
  23435. + /* Default fragmentation threshold is maximum payload size */
  23436. + ieee->fts = DEFAULT_FTS;
  23437. + ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
  23438. + ieee->open_wep = 1;
  23439. +
  23440. + /* Default to enabling full open WEP with host based encrypt/decrypt */
  23441. + ieee->host_encrypt = 1;
  23442. + ieee->host_decrypt = 1;
  23443. + ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
  23444. +
  23445. + INIT_LIST_HEAD(&ieee->crypt_deinit_list);
  23446. + init_timer(&ieee->crypt_deinit_timer);
  23447. + ieee->crypt_deinit_timer.data = (unsigned long)ieee;
  23448. + ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
  23449. +
  23450. + spin_lock_init(&ieee->lock);
  23451. + spin_lock_init(&ieee->wpax_suitlist_lock);
  23452. +
  23453. + ieee->wpax_type_set = 0;
  23454. + ieee->wpa_enabled = 0;
  23455. + ieee->tkip_countermeasures = 0;
  23456. + ieee->drop_unencrypted = 0;
  23457. + ieee->privacy_invoked = 0;
  23458. + ieee->ieee802_1x = 1;
  23459. + ieee->raw_tx = 0;
  23460. +#ifdef _RTL8187_EXT_PATCH_
  23461. + for (i=0; i<MAX_MP; i++)
  23462. + {
  23463. + ieee->cryptlist[i] = (struct ieee80211_crypt_data_list*) kmalloc(sizeof(struct ieee80211_crypt_data_list), GFP_KERNEL);
  23464. + if (NULL == ieee->cryptlist[i])
  23465. + {
  23466. + printk("error kmalloc cryptlist\n");
  23467. + goto failed;
  23468. + }
  23469. + memset(ieee->cryptlist[i], 0, sizeof(struct ieee80211_crypt_data_list));
  23470. +
  23471. + }
  23472. +#endif
  23473. + ieee80211_softmac_init(ieee);
  23474. +
  23475. + for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
  23476. + INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
  23477. +
  23478. + for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++)
  23479. + INIT_LIST_HEAD(&ieee->mesh_mac_hash[i]);
  23480. +
  23481. + for (i = 0; i < 17; i++) {
  23482. + ieee->last_rxseq_num[i] = -1;
  23483. + ieee->last_rxfrag_num[i] = -1;
  23484. + ieee->last_packet_time[i] = 0;
  23485. + }
  23486. +#if 1 //added these to autoload encryption module. WB
  23487. + ieee80211_tkip_null();
  23488. + ieee80211_wep_null();
  23489. + ieee80211_ccmp_null();
  23490. +#endif
  23491. + return dev;
  23492. +
  23493. + failed:
  23494. +#ifdef _RTL8187_EXT_PATCH_
  23495. + for (i=0; i<MAX_MP; i++)
  23496. + {
  23497. + if (ieee->cryptlist[i]==NULL){
  23498. + continue;
  23499. + }
  23500. + kfree(ieee->cryptlist[i]);
  23501. + ieee->cryptlist[i] = NULL;
  23502. +
  23503. + }
  23504. +#endif
  23505. + if (dev)
  23506. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  23507. + free_netdev(dev);
  23508. +#else
  23509. + kfree(dev);
  23510. +#endif
  23511. + return NULL;
  23512. +}
  23513. +
  23514. +
  23515. +void free_ieee80211(struct net_device *dev)
  23516. +{
  23517. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  23518. + struct ieee80211_device *ieee = netdev_priv(dev);
  23519. +#else
  23520. + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
  23521. +#endif
  23522. + int i;//,j;
  23523. + struct list_head *p, *q;
  23524. +
  23525. +
  23526. + ieee80211_softmac_free(ieee);
  23527. + del_timer_sync(&ieee->crypt_deinit_timer);
  23528. + ieee80211_crypt_deinit_entries(ieee, 1);
  23529. +#if 1
  23530. + ieee80211_tkip_null();
  23531. + ieee80211_wep_null();
  23532. + ieee80211_ccmp_null();
  23533. +#endif
  23534. + for (i = 0; i < WEP_KEYS; i++) {
  23535. +#ifdef _RTL8187_EXT_PATCH_
  23536. +{
  23537. + // int j;
  23538. + for (j=0;j<MAX_MP; j++){
  23539. + if (ieee->cryptlist[j] == NULL)
  23540. + continue;
  23541. + struct ieee80211_crypt_data *crypt = ieee->cryptlist[j]->crypt[i];
  23542. +#else
  23543. + struct ieee80211_crypt_data *crypt = ieee->crypt[i];
  23544. +#endif
  23545. + if (crypt) {
  23546. + if (crypt->ops) {
  23547. + crypt->ops->deinit(crypt->priv);
  23548. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  23549. + module_put(crypt->ops->owner);
  23550. +#else
  23551. + __MOD_DEC_USE_COUNT(crypt->ops->owner);
  23552. +#endif
  23553. + }
  23554. + kfree(crypt);
  23555. +#ifdef _RTL8187_EXT_PATCH_
  23556. + ieee->cryptlist[j]->crypt[i] = NULL;
  23557. + //kfree(ieee->cryptlist[j]);
  23558. + //ieee->cryptlist[j] = NULL;
  23559. +#else
  23560. + ieee->crypt[i] = NULL;
  23561. +#endif
  23562. + }
  23563. +#ifdef _RTL8187_EXT_PATCH_
  23564. + }
  23565. + }
  23566. +#endif
  23567. +}
  23568. +#ifdef _RTL8187_EXT_PATCH_
  23569. +for(j=0;j<MAX_MP;j++)
  23570. + {
  23571. + if (ieee->cryptlist[j])
  23572. + {
  23573. + kfree(ieee->cryptlist[j]);
  23574. + ieee->cryptlist[j] = NULL;
  23575. + }
  23576. + }
  23577. +
  23578. + for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++) {
  23579. + list_for_each_safe(p, q, &ieee->mesh_mac_hash[i]) {
  23580. + kfree(list_entry(p, struct ieee_mesh_seq, list));
  23581. + list_del(p);
  23582. + }
  23583. + }
  23584. +#endif
  23585. + ieee80211_networks_free(ieee);
  23586. +
  23587. + for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
  23588. + list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
  23589. + kfree(list_entry(p, struct ieee_ibss_seq, list));
  23590. + list_del(p);
  23591. + }
  23592. + }
  23593. +
  23594. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  23595. + free_netdev(dev);
  23596. +#else
  23597. + kfree(dev);
  23598. +#endif
  23599. +}
  23600. +
  23601. +#ifdef CONFIG_IEEE80211_DEBUG
  23602. +
  23603. +static int debug = 0;
  23604. +u32 ieee80211_debug_level = 0;
  23605. +struct proc_dir_entry *ieee80211_proc = NULL;
  23606. +
  23607. +static int show_debug_level(char *page, char **start, off_t offset,
  23608. + int count, int *eof, void *data)
  23609. +{
  23610. + return snprintf(page, count, "0x%08X\n", ieee80211_debug_level);
  23611. +}
  23612. +
  23613. +static int store_debug_level(struct file *file, const char *buffer,
  23614. + unsigned long count, void *data)
  23615. +{
  23616. + char buf[] = "0x00000000";
  23617. + unsigned long len = min(sizeof(buf) - 1, (u32)count);
  23618. + char *p = (char *)buf;
  23619. + unsigned long val;
  23620. +
  23621. + if (copy_from_user(buf, buffer, len))
  23622. + return count;
  23623. + buf[len] = 0;
  23624. + if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  23625. + p++;
  23626. + if (p[0] == 'x' || p[0] == 'X')
  23627. + p++;
  23628. + val = simple_strtoul(p, &p, 16);
  23629. + } else
  23630. + val = simple_strtoul(p, &p, 10);
  23631. + if (p == buf)
  23632. + printk(KERN_INFO DRV_NAME
  23633. + ": %s is not in hex or decimal form.\n", buf);
  23634. + else
  23635. + ieee80211_debug_level = val;
  23636. +
  23637. + return strnlen(buf, count);
  23638. +}
  23639. +
  23640. +static int __init ieee80211_init(void)
  23641. +{
  23642. + struct proc_dir_entry *e;
  23643. +
  23644. + ieee80211_debug_level = debug;
  23645. + ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
  23646. + if (ieee80211_proc == NULL) {
  23647. + IEEE80211_ERROR("Unable to create " DRV_NAME
  23648. + " proc directory\n");
  23649. + return -EIO;
  23650. + }
  23651. + e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
  23652. + ieee80211_proc);
  23653. + if (!e) {
  23654. + remove_proc_entry(DRV_NAME, proc_net);
  23655. + ieee80211_proc = NULL;
  23656. + return -EIO;
  23657. + }
  23658. + e->read_proc = show_debug_level;
  23659. + e->write_proc = store_debug_level;
  23660. + e->data = NULL;
  23661. +
  23662. + return 0;
  23663. +}
  23664. +
  23665. +static void __exit ieee80211_exit(void)
  23666. +{
  23667. + if (ieee80211_proc) {
  23668. + remove_proc_entry("debug_level", ieee80211_proc);
  23669. + remove_proc_entry(DRV_NAME, proc_net);
  23670. + ieee80211_proc = NULL;
  23671. + }
  23672. +}
  23673. +
  23674. +#include <linux/moduleparam.h>
  23675. +module_param(debug, int, 0444);
  23676. +MODULE_PARM_DESC(debug, "debug output mask");
  23677. +
  23678. +
  23679. +module_exit(ieee80211_exit);
  23680. +module_init(ieee80211_init);
  23681. +#endif
  23682. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  23683. +EXPORT_SYMBOL(alloc_ieee80211);
  23684. +EXPORT_SYMBOL(free_ieee80211);
  23685. +#else
  23686. +EXPORT_SYMBOL_NOVERS(alloc_ieee80211);
  23687. +EXPORT_SYMBOL_NOVERS(free_ieee80211);
  23688. +#endif
  23689. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_rx.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_rx.c
  23690. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_rx.c 1970-01-01 01:00:00.000000000 +0100
  23691. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_rx.c 2009-08-23 19:01:04.000000000 +0200
  23692. @@ -0,0 +1,2074 @@
  23693. +/*
  23694. + * Original code based Host AP (software wireless LAN access point) driver
  23695. + * for Intersil Prism2/2.5/3 - hostap.o module, common routines
  23696. + *
  23697. + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
  23698. + * <jkmaline@cc.hut.fi>
  23699. + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  23700. + * Copyright (c) 2004, Intel Corporation
  23701. + *
  23702. + * This program is free software; you can redistribute it and/or modify
  23703. + * it under the terms of the GNU General Public License version 2 as
  23704. + * published by the Free Software Foundation. See README and COPYING for
  23705. + * more details.
  23706. + ******************************************************************************
  23707. +
  23708. + Few modifications for Realtek's Wi-Fi drivers by
  23709. + Andrea Merello <andreamrl@tiscali.it>
  23710. +
  23711. + A special thanks goes to Realtek for their support !
  23712. +
  23713. +******************************************************************************/
  23714. +
  23715. +
  23716. +#include <linux/compiler.h>
  23717. +//#include <linux/config.h>
  23718. +#include <linux/errno.h>
  23719. +#include <linux/if_arp.h>
  23720. +#include <linux/in6.h>
  23721. +#include <linux/in.h>
  23722. +#include <linux/ip.h>
  23723. +#include <linux/kernel.h>
  23724. +#include <linux/module.h>
  23725. +#include <linux/netdevice.h>
  23726. +#include <linux/pci.h>
  23727. +#include <linux/proc_fs.h>
  23728. +#include <linux/skbuff.h>
  23729. +#include <linux/slab.h>
  23730. +#include <linux/tcp.h>
  23731. +#include <linux/types.h>
  23732. +#include <linux/version.h>
  23733. +#include <linux/wireless.h>
  23734. +#include <linux/etherdevice.h>
  23735. +#include <asm/uaccess.h>
  23736. +#include <linux/ctype.h>
  23737. +
  23738. +#include "ieee80211.h"
  23739. +#ifdef ENABLE_DOT11D
  23740. +#include "dot11d.h"
  23741. +#endif
  23742. +
  23743. +static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
  23744. + struct sk_buff *skb,
  23745. + struct ieee80211_rx_stats *rx_stats)
  23746. +{
  23747. + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  23748. + u16 fc = le16_to_cpu(hdr->frame_ctl);
  23749. +
  23750. + skb->dev = ieee->dev;
  23751. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
  23752. + skb_reset_mac_header(skb);
  23753. +#else
  23754. + skb->mac.raw = skb->data;
  23755. +#endif
  23756. +
  23757. + //skb->mac.raw = skb->data;
  23758. + skb_pull(skb, ieee80211_get_hdrlen(fc));
  23759. + skb->pkt_type = PACKET_OTHERHOST;
  23760. + skb->protocol = __constant_htons(ETH_P_80211_RAW);
  23761. + memset(skb->cb, 0, sizeof(skb->cb));
  23762. + netif_rx(skb);
  23763. +}
  23764. +
  23765. +
  23766. +/* Called only as a tasklet (software IRQ) */
  23767. +static struct ieee80211_frag_entry *
  23768. +ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
  23769. + unsigned int frag, u8 tid,u8 *src, u8 *dst)
  23770. +{
  23771. + struct ieee80211_frag_entry *entry;
  23772. + int i;
  23773. +
  23774. + for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
  23775. + entry = &ieee->frag_cache[tid][i];
  23776. + if (entry->skb != NULL &&
  23777. + time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
  23778. + IEEE80211_DEBUG_FRAG(
  23779. + "expiring fragment cache entry "
  23780. + "seq=%u last_frag=%u\n",
  23781. + entry->seq, entry->last_frag);
  23782. + dev_kfree_skb_any(entry->skb);
  23783. + entry->skb = NULL;
  23784. + }
  23785. +
  23786. + if (entry->skb != NULL && entry->seq == seq &&
  23787. + (entry->last_frag + 1 == frag || frag == -1) &&
  23788. + memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
  23789. + memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
  23790. + return entry;
  23791. + }
  23792. +
  23793. + return NULL;
  23794. +}
  23795. +
  23796. +/* Called only as a tasklet (software IRQ) */
  23797. +static struct sk_buff *
  23798. +ieee80211_frag_cache_get(struct ieee80211_device *ieee,
  23799. + struct ieee80211_hdr *hdr)
  23800. +{
  23801. + struct sk_buff *skb = NULL;
  23802. + u16 fc = le16_to_cpu(hdr->frame_ctl);
  23803. + u16 sc = le16_to_cpu(hdr->seq_ctl);
  23804. + unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
  23805. + unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
  23806. + struct ieee80211_frag_entry *entry;
  23807. + struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
  23808. + struct ieee80211_hdr_QOS *hdr_4addr_QoS;
  23809. + u8 tid;
  23810. +
  23811. +#ifdef _RTL8187_EXT_PATCH_
  23812. + if(ieee->iw_mode == ieee->iw_ext_mode)
  23813. + {
  23814. + tid = (hdr->addr2[ETH_ALEN-2] ^ hdr->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
  23815. + }
  23816. + else
  23817. +#endif
  23818. + if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
  23819. + hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)hdr;
  23820. + tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  23821. + tid = UP2AC(tid);
  23822. + tid ++;
  23823. + } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
  23824. + hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS *)hdr;
  23825. + tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  23826. + tid = UP2AC(tid);
  23827. + tid ++;
  23828. + } else {
  23829. + tid = 0;
  23830. + }
  23831. +
  23832. + if (frag == 0) {
  23833. + /* Reserve enough space to fit maximum frame length */
  23834. + skb = dev_alloc_skb(ieee->dev->mtu +
  23835. + sizeof(struct ieee80211_hdr) +
  23836. + 8 /* LLC */ +
  23837. + 2 /* alignment */ +
  23838. + 8 /* WEP */ +
  23839. + ETH_ALEN /* WDS */ +
  23840. + (IEEE80211_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
  23841. + if (skb == NULL)
  23842. + return NULL;
  23843. +
  23844. + entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
  23845. + ieee->frag_next_idx[tid]++;
  23846. + if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
  23847. + ieee->frag_next_idx[tid] = 0;
  23848. +
  23849. + if (entry->skb != NULL)
  23850. + dev_kfree_skb_any(entry->skb);
  23851. +
  23852. + entry->first_frag_time = jiffies;
  23853. + entry->seq = seq;
  23854. + entry->last_frag = frag;
  23855. + entry->skb = skb;
  23856. + memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
  23857. + memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
  23858. + } else {
  23859. + /* received a fragment of a frame for which the head fragment
  23860. + * should have already been received */
  23861. + entry = ieee80211_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
  23862. + hdr->addr1);
  23863. + if (entry != NULL) {
  23864. + entry->last_frag = frag;
  23865. + skb = entry->skb;
  23866. + }
  23867. + }
  23868. +
  23869. + return skb;
  23870. +}
  23871. +
  23872. +
  23873. +/* Called only as a tasklet (software IRQ) */
  23874. +static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
  23875. + struct ieee80211_hdr *hdr)
  23876. +{
  23877. + u16 fc = le16_to_cpu(hdr->frame_ctl);
  23878. + u16 sc = le16_to_cpu(hdr->seq_ctl);
  23879. + unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
  23880. + struct ieee80211_frag_entry *entry;
  23881. + struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
  23882. + struct ieee80211_hdr_QOS *hdr_4addr_QoS;
  23883. + u8 tid;
  23884. +
  23885. +#ifdef _RTL8187_EXT_PATCH_
  23886. + if(ieee->iw_mode == ieee->iw_ext_mode)
  23887. + {
  23888. + tid = (hdr->addr2[ETH_ALEN-2] ^ hdr->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
  23889. + }
  23890. + else
  23891. +#endif
  23892. + if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
  23893. + hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)hdr;
  23894. + tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  23895. + tid = UP2AC(tid);
  23896. + tid ++;
  23897. + } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
  23898. + hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS *)hdr;
  23899. + tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  23900. + tid = UP2AC(tid);
  23901. + tid ++;
  23902. + } else {
  23903. + tid = 0;
  23904. + }
  23905. +
  23906. + entry = ieee80211_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
  23907. + hdr->addr1);
  23908. +
  23909. + if (entry == NULL) {
  23910. + IEEE80211_DEBUG_FRAG(
  23911. + "could not invalidate fragment cache "
  23912. + "entry (seq=%u)\n", seq);
  23913. + return -1;
  23914. + }
  23915. +
  23916. + entry->skb = NULL;
  23917. + return 0;
  23918. +}
  23919. +
  23920. +
  23921. +
  23922. +/* ieee80211_rx_frame_mgtmt
  23923. + *
  23924. + * Responsible for handling management control frames
  23925. + *
  23926. + * Called by ieee80211_rx */
  23927. +static inline int
  23928. +ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
  23929. + struct ieee80211_rx_stats *rx_stats, u16 type,
  23930. + u16 stype)
  23931. +{
  23932. + /* On the struct stats definition there is written that
  23933. + * this is not mandatory.... but seems that the probe
  23934. + * response parser uses it
  23935. + */
  23936. + struct ieee80211_hdr * hdr = (struct ieee80211_hdr*)skb->data;
  23937. + rx_stats->len = skb->len;
  23938. + ieee80211_rx_mgt(ieee,(struct ieee80211_hdr *)skb->data,rx_stats);
  23939. +
  23940. + if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN)))
  23941. + {
  23942. + dev_kfree_skb_any(skb);
  23943. + return 0;
  23944. + }
  23945. +
  23946. + ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
  23947. +
  23948. + dev_kfree_skb_any(skb);
  23949. +
  23950. + return 0;
  23951. +
  23952. + #ifdef NOT_YET
  23953. + if (ieee->iw_mode == IW_MODE_MASTER) {
  23954. + printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
  23955. + ieee->dev->name);
  23956. + return 0;
  23957. +/*
  23958. + hostap_update_sta_ps(ieee, (struct hostap_ieee80211_hdr *)
  23959. + skb->data);*/
  23960. + }
  23961. +
  23962. + if (ieee->hostapd && type == IEEE80211_TYPE_MGMT) {
  23963. + if (stype == WLAN_FC_STYPE_BEACON &&
  23964. + ieee->iw_mode == IW_MODE_MASTER) {
  23965. + struct sk_buff *skb2;
  23966. + /* Process beacon frames also in kernel driver to
  23967. + * update STA(AP) table statistics */
  23968. + skb2 = skb_clone(skb, GFP_ATOMIC);
  23969. + if (skb2)
  23970. + hostap_rx(skb2->dev, skb2, rx_stats);
  23971. + }
  23972. +
  23973. + /* send management frames to the user space daemon for
  23974. + * processing */
  23975. + ieee->apdevstats.rx_packets++;
  23976. + ieee->apdevstats.rx_bytes += skb->len;
  23977. + prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
  23978. + return 0;
  23979. + }
  23980. +
  23981. + if (ieee->iw_mode == IW_MODE_MASTER) {
  23982. + if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
  23983. + printk(KERN_DEBUG "%s: unknown management frame "
  23984. + "(type=0x%02x, stype=0x%02x) dropped\n",
  23985. + skb->dev->name, type, stype);
  23986. + return -1;
  23987. + }
  23988. +
  23989. + hostap_rx(skb->dev, skb, rx_stats);
  23990. + return 0;
  23991. + }
  23992. +
  23993. + printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
  23994. + "received in non-Host AP mode\n", skb->dev->name);
  23995. + return -1;
  23996. + #endif
  23997. +}
  23998. +
  23999. +
  24000. +
  24001. +/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
  24002. +/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
  24003. +static unsigned char rfc1042_header[] =
  24004. +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
  24005. +/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
  24006. +static unsigned char bridge_tunnel_header[] =
  24007. +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
  24008. +/* No encapsulation header if EtherType < 0x600 (=length) */
  24009. +
  24010. +/* Called by ieee80211_rx_frame_decrypt */
  24011. +static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
  24012. + struct sk_buff *skb, size_t hdrlen)
  24013. +{
  24014. + struct net_device *dev = ieee->dev;
  24015. + u16 fc, ethertype;
  24016. + struct ieee80211_hdr *hdr;
  24017. + u8 *pos;
  24018. +
  24019. + if (skb->len < 24)
  24020. + return 0;
  24021. +
  24022. + hdr = (struct ieee80211_hdr *) skb->data;
  24023. + fc = le16_to_cpu(hdr->frame_ctl);
  24024. +
  24025. + /* check that the frame is unicast frame to us */
  24026. + if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
  24027. + IEEE80211_FCTL_TODS &&
  24028. + memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
  24029. + memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
  24030. + /* ToDS frame with own addr BSSID and DA */
  24031. + } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
  24032. + IEEE80211_FCTL_FROMDS &&
  24033. + memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
  24034. + /* FromDS frame with own addr as DA */
  24035. + } else
  24036. + return 0;
  24037. +
  24038. + if (skb->len < 24 + 8)
  24039. + return 0;
  24040. +
  24041. + /* check for port access entity Ethernet type */
  24042. +// pos = skb->data + 24;
  24043. + pos = skb->data + hdrlen;
  24044. + ethertype = (pos[6] << 8) | pos[7];
  24045. + if (ethertype == ETH_P_PAE)
  24046. + return 1;
  24047. +
  24048. + return 0;
  24049. +}
  24050. +
  24051. +/* Called only as a tasklet (software IRQ), by ieee80211_rx */
  24052. +static inline int
  24053. +ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
  24054. + struct ieee80211_crypt_data *crypt)
  24055. +{
  24056. + struct ieee80211_hdr *hdr;
  24057. + int res, hdrlen;
  24058. +
  24059. + if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
  24060. + return 0;
  24061. +
  24062. + hdr = (struct ieee80211_hdr *) skb->data;
  24063. +#ifdef _RTL8187_EXT_PATCH_
  24064. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
  24065. + {
  24066. + hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
  24067. + }
  24068. + else
  24069. +#endif
  24070. + hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
  24071. +
  24072. +#ifdef CONFIG_IEEE80211_CRYPT_TKIP
  24073. + if (ieee->tkip_countermeasures &&
  24074. + strcmp(crypt->ops->name, "TKIP") == 0) {
  24075. + if (net_ratelimit()) {
  24076. + printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
  24077. + "received packet from " MAC_FMT "\n",
  24078. + ieee->dev->name, MAC_ARG(hdr->addr2));
  24079. + }
  24080. + return -1;
  24081. + }
  24082. +#endif
  24083. +
  24084. + atomic_inc(&crypt->refcnt);
  24085. + res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
  24086. + atomic_dec(&crypt->refcnt);
  24087. + if (res < 0) {
  24088. + IEEE80211_DEBUG_DROP(
  24089. + "decryption failed (SA=" MAC_FMT
  24090. + ") res=%d\n", MAC_ARG(hdr->addr2), res);
  24091. + if (res == -2)
  24092. + IEEE80211_DEBUG_DROP("Decryption failed ICV "
  24093. + "mismatch (key %d)\n",
  24094. + skb->data[hdrlen + 3] >> 6);
  24095. + ieee->ieee_stats.rx_discards_undecryptable++;
  24096. + return -1;
  24097. + }
  24098. +
  24099. + return res;
  24100. +}
  24101. +
  24102. +
  24103. +/* Called only as a tasklet (software IRQ), by ieee80211_rx */
  24104. +static inline int
  24105. +ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,
  24106. + int keyidx, struct ieee80211_crypt_data *crypt)
  24107. +{
  24108. + struct ieee80211_hdr *hdr;
  24109. + int res, hdrlen;
  24110. +
  24111. + if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
  24112. + return 0;
  24113. +
  24114. + hdr = (struct ieee80211_hdr *) skb->data;
  24115. +#ifdef _RTL8187_EXT_PATCH_
  24116. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
  24117. + {
  24118. + hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
  24119. + }
  24120. + else
  24121. +#endif
  24122. + hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
  24123. +
  24124. + atomic_inc(&crypt->refcnt);
  24125. + res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
  24126. + atomic_dec(&crypt->refcnt);
  24127. + if (res < 0) {
  24128. + printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
  24129. + " (SA=" MAC_FMT " keyidx=%d)\n",
  24130. + ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
  24131. + return -1;
  24132. + }
  24133. +
  24134. + return 0;
  24135. +}
  24136. +
  24137. +
  24138. +/* this function is stolen from ipw2200 driver*/
  24139. +#define IEEE_PACKET_RETRY_TIME (5*HZ)
  24140. +static int is_duplicate_packet(struct ieee80211_device *ieee,
  24141. + struct ieee80211_hdr *header)
  24142. +{
  24143. + u16 fc = le16_to_cpu(header->frame_ctl);
  24144. + u16 sc = le16_to_cpu(header->seq_ctl);
  24145. + u16 seq = WLAN_GET_SEQ_SEQ(sc);
  24146. + u16 frag = WLAN_GET_SEQ_FRAG(sc);
  24147. + u16 *last_seq, *last_frag;
  24148. + unsigned long *last_time;
  24149. + struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
  24150. + struct ieee80211_hdr_QOS *hdr_4addr_QoS;
  24151. + u8 tid;
  24152. +
  24153. +#ifdef _RTL8187_EXT_PATCH_
  24154. + if(ieee->iw_mode == ieee->iw_ext_mode)
  24155. + {
  24156. + tid = (header->addr2[ETH_ALEN-2] ^ header->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
  24157. + }
  24158. + else
  24159. +#endif
  24160. + //TO2DS and QoS
  24161. + if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
  24162. + hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)header;
  24163. + tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  24164. + tid = UP2AC(tid);
  24165. + tid ++;
  24166. + } else if(IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
  24167. + hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS*)header;
  24168. + tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
  24169. + tid = UP2AC(tid);
  24170. + tid ++;
  24171. + } else { // no QoS
  24172. + tid = 0;
  24173. + }
  24174. +
  24175. + switch (ieee->iw_mode) {
  24176. + case IW_MODE_ADHOC:
  24177. + {
  24178. + struct list_head *p;
  24179. + struct ieee_ibss_seq *entry = NULL;
  24180. + u8 *mac = header->addr2;
  24181. + int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
  24182. + //for (pos = (head)->next; pos != (head); pos = pos->next)
  24183. + __list_for_each(p, &ieee->ibss_mac_hash[index]) {
  24184. + entry = list_entry(p, struct ieee_ibss_seq, list);
  24185. + if (!memcmp(entry->mac, mac, ETH_ALEN))
  24186. + break;
  24187. + }
  24188. + // if (memcmp(entry->mac, mac, ETH_ALEN)){
  24189. + if (p == &ieee->ibss_mac_hash[index]) {
  24190. + entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
  24191. + if (!entry) {
  24192. + printk(KERN_WARNING "Cannot malloc new mac entry\n");
  24193. + return 0;
  24194. + }
  24195. + memcpy(entry->mac, mac, ETH_ALEN);
  24196. + entry->seq_num[tid] = seq;
  24197. + entry->frag_num[tid] = frag;
  24198. + entry->packet_time[tid] = jiffies;
  24199. + list_add(&entry->list, &ieee->ibss_mac_hash[index]);
  24200. + return 0;
  24201. + }
  24202. + last_seq = &entry->seq_num[tid];
  24203. + last_frag = &entry->frag_num[tid];
  24204. + last_time = &entry->packet_time[tid];
  24205. + break;
  24206. + }
  24207. +
  24208. + case IW_MODE_INFRA:
  24209. + last_seq = &ieee->last_rxseq_num[tid];
  24210. + last_frag = &ieee->last_rxfrag_num[tid];
  24211. + last_time = &ieee->last_packet_time[tid];
  24212. +
  24213. + break;
  24214. + default:
  24215. +#ifdef _RTL8187_EXT_PATCH_
  24216. + if(ieee->iw_mode == ieee->iw_ext_mode)
  24217. + {
  24218. +#if 0
  24219. + printk("==============> tid = %d\n", tid);
  24220. + last_seq = &ieee->last_rxseq_num[tid];
  24221. + last_frag = &ieee->last_rxfrag_num[tid];
  24222. + last_time = &ieee->last_packet_time[tid];
  24223. +#else
  24224. + struct list_head *p;
  24225. + struct ieee_mesh_seq *entry = NULL;
  24226. + u8 *mac = header->addr2;
  24227. + int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
  24228. +
  24229. + __list_for_each(p, &ieee->mesh_mac_hash[index]) {
  24230. + entry = list_entry(p, struct ieee_mesh_seq, list);
  24231. + if (!memcmp(entry->mac, mac, ETH_ALEN))
  24232. + break;
  24233. + }
  24234. + if (p == &ieee->mesh_mac_hash[index]) {
  24235. + entry = kmalloc(sizeof(struct ieee_mesh_seq), GFP_ATOMIC);
  24236. + if (!entry) {
  24237. + printk(KERN_WARNING "Cannot malloc new mac entry for mesh\n");
  24238. + return 0;
  24239. + }
  24240. + memcpy(entry->mac, mac, ETH_ALEN);
  24241. + entry->seq_num = seq;
  24242. + entry->frag_num = frag;
  24243. + entry->packet_time = jiffies;
  24244. + list_add(&entry->list, &ieee->mesh_mac_hash[index]);
  24245. + return 0;
  24246. + }
  24247. + last_seq = &entry->seq_num;
  24248. + last_frag = &entry->frag_num;
  24249. + last_time = &entry->packet_time;
  24250. +#endif
  24251. + break;
  24252. + }
  24253. + else
  24254. +#endif
  24255. + return 0;
  24256. + }
  24257. +
  24258. +// if(tid != 0) {
  24259. +// printk(KERN_WARNING ":)))))))))))%x %x %x, fc(%x)\n", tid, *last_seq, seq, header->frame_ctl);
  24260. +// }
  24261. + if ((*last_seq == seq) &&
  24262. + time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
  24263. + if (*last_frag == frag){
  24264. + //printk(KERN_WARNING "[1] go drop!\n");
  24265. + goto drop;
  24266. +
  24267. + }
  24268. + if (*last_frag + 1 != frag)
  24269. + /* out-of-order fragment */
  24270. + //printk(KERN_WARNING "[2] go drop!\n");
  24271. + goto drop;
  24272. + } else
  24273. + *last_seq = seq;
  24274. +
  24275. + *last_frag = frag;
  24276. + *last_time = jiffies;
  24277. + return 0;
  24278. +
  24279. +drop:
  24280. +// BUG_ON(!(fc & IEEE80211_FCTL_RETRY));
  24281. +// printk("DUP\n");
  24282. +
  24283. + return 1;
  24284. +}
  24285. +#ifdef JUST_FOR_87SEMESH
  24286. +#define ActionHeadLen 30
  24287. +#define WIFI_MESH_TYPE IEEE80211_FTYPE_DATA
  24288. +#define WIFI_11S_MESH_ACTION 0x00A0
  24289. +#endif
  24290. +
  24291. +/* All received frames are sent to this function. @skb contains the frame in
  24292. + * IEEE 802.11 format, i.e., in the format it was sent over air.
  24293. + * This function is called only as a tasklet (software IRQ). */
  24294. +int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
  24295. + struct ieee80211_rx_stats *rx_stats)
  24296. +{
  24297. + struct net_device *dev = ieee->dev;
  24298. + struct ieee80211_hdr *hdr;
  24299. + //struct ieee80211_hdr_3addr_QOS *hdr;
  24300. +
  24301. + size_t hdrlen;
  24302. + u16 fc, type, stype, sc;
  24303. + struct net_device_stats *stats;
  24304. + unsigned int frag;
  24305. + u8 *payload;
  24306. + u16 ethertype;
  24307. +#ifdef NOT_YET
  24308. + struct net_device *wds = NULL;
  24309. + struct sk_buff *skb2 = NULL;
  24310. + struct net_device *wds = NULL;
  24311. + int frame_authorized = 0;
  24312. + int from_assoc_ap = 0;
  24313. + void *sta = NULL;
  24314. +#endif
  24315. +// u16 QOS_ctl = 0;
  24316. + u8 dst[ETH_ALEN];
  24317. + u8 src[ETH_ALEN];
  24318. + u8 bssid[ETH_ALEN];
  24319. + struct ieee80211_crypt_data *crypt = NULL;
  24320. + int keyidx = 0;
  24321. +
  24322. + //Added for mesh by Lawrence.
  24323. + //u8 status;
  24324. + //u32 flags;
  24325. +
  24326. + // cheat the the hdr type
  24327. + hdr = (struct ieee80211_hdr *)skb->data;
  24328. + stats = &ieee->stats;
  24329. +
  24330. + if (skb->len < 10) {
  24331. + printk(KERN_INFO "%s: SKB length < 10\n",
  24332. + dev->name);
  24333. + goto rx_dropped;
  24334. + }
  24335. +#if 0
  24336. +//{added by david for filter the packet listed in the filter table
  24337. +#ifdef _RTL8187_EXT_PATCH_
  24338. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_acl_query))
  24339. + {
  24340. + if(!ieee->ext_patch_ieee80211_acl_query(ieee, hdr->addr2))
  24341. + goto rx_dropped;
  24342. + }
  24343. +#endif
  24344. +//}
  24345. +#endif
  24346. + fc = le16_to_cpu(hdr->frame_ctl);
  24347. + type = WLAN_FC_GET_TYPE(fc);
  24348. + stype = WLAN_FC_GET_STYPE(fc);
  24349. +
  24350. + //Because 87se's bad feature,do more handle.
  24351. +#ifdef JUST_FOR_87SEMESH
  24352. +
  24353. +u8 tmphead[ActionHeadLen];
  24354. + if(type ==WIFI_MESH_TYPE && stype== WIFI_11S_MESH_ACTION )
  24355. + //head=sizeof(struct ieee80211_hdr)=30
  24356. + {
  24357. + memset(tmphead,0,ActionHeadLen);
  24358. + memcpy(tmphead,skb->data,ActionHeadLen);
  24359. +
  24360. + skb_pull(skb,ActionHeadLen+2);
  24361. + memcpy(skb_push(skb,ActionHeadLen),tmphead,ActionHeadLen);
  24362. + hdr = (struct ieee80211_hdr *)skb->data;
  24363. + }
  24364. +
  24365. +#endif
  24366. + sc = le16_to_cpu(hdr->seq_ctl);
  24367. +
  24368. + frag = WLAN_GET_SEQ_FRAG(sc);
  24369. +#ifdef _RTL8187_EXT_PATCH_
  24370. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
  24371. + {
  24372. + hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
  24373. + if(skb->len < hdrlen)
  24374. + goto rx_dropped;
  24375. + }
  24376. + else
  24377. +#endif
  24378. + hdrlen = ieee80211_get_hdrlen(fc);
  24379. +
  24380. +#ifdef NOT_YET
  24381. +#if WIRELESS_EXT > 15
  24382. + /* Put this code here so that we avoid duplicating it in all
  24383. + * Rx paths. - Jean II */
  24384. +#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
  24385. + /* If spy monitoring on */
  24386. + if (iface->spy_data.spy_number > 0) {
  24387. + struct iw_quality wstats;
  24388. + wstats.level = rx_stats->signal;
  24389. + wstats.noise = rx_stats->noise;
  24390. + wstats.updated = 6; /* No qual value */
  24391. + /* Update spy records */
  24392. + wireless_spy_update(dev, hdr->addr2, &wstats);
  24393. + }
  24394. +#endif /* IW_WIRELESS_SPY */
  24395. +#endif /* WIRELESS_EXT > 15 */
  24396. + hostap_update_rx_stats(local->ap, hdr, rx_stats);
  24397. +#endif
  24398. +
  24399. +#if WIRELESS_EXT > 15
  24400. + if (ieee->iw_mode == IW_MODE_MONITOR) {
  24401. + ieee80211_monitor_rx(ieee, skb, rx_stats);
  24402. + stats->rx_packets++;
  24403. + stats->rx_bytes += skb->len;
  24404. + return 1;
  24405. + }
  24406. +#endif
  24407. + if (ieee->host_decrypt) {
  24408. + int idx = 0;
  24409. + if (skb->len >= hdrlen + 3)
  24410. + idx = skb->data[hdrlen + 3] >> 6;
  24411. +#ifdef _RTL8187_EXT_PATCH_
  24412. +
  24413. + crypt = ieee->cryptlist[0]->crypt[idx];
  24414. +#if 0
  24415. + {
  24416. + int i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*)skb->data)->addr2);
  24417. + if (i == -1)
  24418. + {
  24419. + printk("error find entry in entry list\n");
  24420. + goto rx_dropped;
  24421. + }
  24422. + //printk("%s():"MAC_FMT", find in index:%d", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), i);
  24423. + crypt = ieee->cryptlist[i]->crypt[idx];
  24424. + }
  24425. +#endif
  24426. +#else
  24427. + crypt = ieee->crypt[idx];
  24428. +#endif
  24429. +
  24430. +#ifdef NOT_YET
  24431. + sta = NULL;
  24432. +
  24433. + /* Use station specific key to override default keys if the
  24434. + * receiver address is a unicast address ("individual RA"). If
  24435. + * bcrx_sta_key parameter is set, station specific key is used
  24436. + * even with broad/multicast targets (this is against IEEE
  24437. + * 802.11, but makes it easier to use different keys with
  24438. + * stations that do not support WEP key mapping). */
  24439. +
  24440. + if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
  24441. + (void) hostap_handle_sta_crypto(local, hdr, &crypt,
  24442. + &sta);
  24443. +#endif
  24444. +
  24445. + /* allow NULL decrypt to indicate an station specific override
  24446. + * for default encryption */
  24447. + if (crypt && (crypt->ops == NULL ||
  24448. + crypt->ops->decrypt_mpdu == NULL))
  24449. + crypt = NULL;
  24450. +
  24451. + if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
  24452. + /* This seems to be triggered by some (multicast?)
  24453. + * frames from other than current BSS, so just drop the
  24454. + * frames silently instead of filling system log with
  24455. + * these reports. */
  24456. + IEEE80211_DEBUG_DROP("Decryption failed (not set)"
  24457. + " (SA=" MAC_FMT ")\n",
  24458. + MAC_ARG(hdr->addr2));
  24459. + ieee->ieee_stats.rx_discards_undecryptable++;
  24460. + goto rx_dropped;
  24461. + }
  24462. + }
  24463. +
  24464. + if (skb->len < IEEE80211_DATA_HDR3_LEN)
  24465. + goto rx_dropped;
  24466. +
  24467. + // if QoS enabled, should check the sequence for each of the AC
  24468. + if (is_duplicate_packet(ieee, hdr))
  24469. + goto rx_dropped;
  24470. +
  24471. +#ifdef _RTL8187_EXT_PATCH_
  24472. + if( ieee->iw_mode == ieee->iw_ext_mode && ieee->ext_patch_ieee80211_rx_mgt_update_expire )
  24473. + ieee->ext_patch_ieee80211_rx_mgt_update_expire( ieee, skb );
  24474. +#endif
  24475. +
  24476. + if (type == IEEE80211_FTYPE_MGMT) {
  24477. +
  24478. + #if 0
  24479. + if ( stype == IEEE80211_STYPE_AUTH &&
  24480. + fc & IEEE80211_FCTL_WEP && ieee->host_decrypt &&
  24481. + (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0)
  24482. + {
  24483. + printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth "
  24484. + "from " MAC_FMT "\n", dev->name,
  24485. + MAC_ARG(hdr->addr2));
  24486. + /* TODO: could inform hostapd about this so that it
  24487. + * could send auth failure report */
  24488. + goto rx_dropped;
  24489. + }
  24490. + #endif
  24491. +
  24492. +
  24493. + if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
  24494. + goto rx_dropped;
  24495. + else
  24496. + goto rx_exit;
  24497. + }
  24498. +
  24499. +#ifdef _RTL8187_EXT_PATCH_
  24500. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_on_rx)
  24501. + {
  24502. + if(ieee->ext_patch_ieee80211_rx_on_rx(ieee, skb, rx_stats, type, stype)==0)
  24503. + {
  24504. + goto rx_exit;
  24505. + }
  24506. + }
  24507. +#endif
  24508. +
  24509. + /* Data frame - extract src/dst addresses */
  24510. + switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
  24511. + case IEEE80211_FCTL_FROMDS:
  24512. + memcpy(dst, hdr->addr1, ETH_ALEN);
  24513. + memcpy(src, hdr->addr3, ETH_ALEN);
  24514. + memcpy(bssid, hdr->addr2, ETH_ALEN);
  24515. + break;
  24516. + case IEEE80211_FCTL_TODS:
  24517. + memcpy(dst, hdr->addr3, ETH_ALEN);
  24518. + memcpy(src, hdr->addr2, ETH_ALEN);
  24519. + memcpy(bssid, hdr->addr1, ETH_ALEN);
  24520. + break;
  24521. + case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
  24522. + if (skb->len < IEEE80211_DATA_HDR4_LEN)
  24523. + goto rx_dropped;
  24524. + memcpy(dst, hdr->addr3, ETH_ALEN);
  24525. + memcpy(src, hdr->addr4, ETH_ALEN);
  24526. + memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
  24527. + break;
  24528. + case 0:
  24529. + memcpy(dst, hdr->addr1, ETH_ALEN);
  24530. + memcpy(src, hdr->addr2, ETH_ALEN);
  24531. + memcpy(bssid, hdr->addr3, ETH_ALEN);
  24532. + break;
  24533. + }
  24534. +
  24535. +#ifdef NOT_YET
  24536. + if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
  24537. + goto rx_dropped;
  24538. + if (wds) {
  24539. + skb->dev = dev = wds;
  24540. + stats = hostap_get_stats(dev);
  24541. + }
  24542. +
  24543. + if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
  24544. + (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS &&
  24545. + ieee->stadev &&
  24546. + memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
  24547. + /* Frame from BSSID of the AP for which we are a client */
  24548. + skb->dev = dev = ieee->stadev;
  24549. + stats = hostap_get_stats(dev);
  24550. + from_assoc_ap = 1;
  24551. + }
  24552. +#endif
  24553. +
  24554. + dev->last_rx = jiffies;
  24555. +
  24556. +#ifdef NOT_YET
  24557. + if ((ieee->iw_mode == IW_MODE_MASTER ||
  24558. + ieee->iw_mode == IW_MODE_REPEAT) &&
  24559. + !from_assoc_ap) {
  24560. + switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
  24561. + wds != NULL)) {
  24562. + case AP_RX_CONTINUE_NOT_AUTHORIZED:
  24563. + frame_authorized = 0;
  24564. + break;
  24565. + case AP_RX_CONTINUE:
  24566. + frame_authorized = 1;
  24567. + break;
  24568. + case AP_RX_DROP:
  24569. + goto rx_dropped;
  24570. + case AP_RX_EXIT:
  24571. + goto rx_exit;
  24572. + }
  24573. + }
  24574. +#endif
  24575. +
  24576. +#ifdef _RTL8187_EXT_PATCH_
  24577. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_is_valid_framectl)
  24578. + {
  24579. + if(ieee->ext_patch_ieee80211_rx_is_valid_framectl(ieee, fc, type, stype)==0)
  24580. + goto rx_dropped;
  24581. + }
  24582. + else
  24583. +#endif
  24584. + /* Nullfunc frames may have PS-bit set, so they must be passed to
  24585. + * hostap_handle_sta_rx() before being dropped here. */
  24586. + if (stype != IEEE80211_STYPE_DATA &&
  24587. + stype != IEEE80211_STYPE_DATA_CFACK &&
  24588. + stype != IEEE80211_STYPE_DATA_CFPOLL &&
  24589. + stype != IEEE80211_STYPE_DATA_CFACKPOLL&&
  24590. + stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
  24591. + ) {
  24592. + if (stype != IEEE80211_STYPE_NULLFUNC)
  24593. + IEEE80211_DEBUG_DROP(
  24594. + "RX: dropped data frame "
  24595. + "with no data (type=0x%02x, "
  24596. + "subtype=0x%02x, len=%d)\n",
  24597. + type, stype, skb->len);
  24598. + goto rx_dropped;
  24599. + }
  24600. +
  24601. + if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
  24602. + goto rx_dropped;
  24603. +
  24604. + /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
  24605. +#ifdef _RTL8187_EXT_PATCH_
  24606. + if (ieee->host_decrypt && crypt) {
  24607. + int idx = 0;
  24608. + if (skb->len >= hdrlen + 3)
  24609. + idx = skb->data[hdrlen + 3] >> 6;
  24610. + if (ieee->iw_ext_mode == ieee->iw_mode) //if in mesh mode
  24611. + {
  24612. + int i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*)skb->data)->addr2, 0);
  24613. + if (i == -1)
  24614. + {
  24615. + printk("error find entry in entry list\n");
  24616. + goto rx_dropped;
  24617. + }
  24618. + // printk("%s():"MAC_FMT", find in index:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), i);
  24619. + if (ieee->cryptlist[i]&&ieee->cryptlist[i]->crypt[idx])
  24620. + crypt = ieee->cryptlist[i]->crypt[idx];
  24621. +
  24622. + else
  24623. + crypt = NULL;
  24624. + }
  24625. + else
  24626. + crypt = ieee->cryptlist[0]->crypt[idx];
  24627. + }
  24628. +#endif
  24629. +
  24630. + if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
  24631. + (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
  24632. + goto rx_dropped;
  24633. +
  24634. + hdr = (struct ieee80211_hdr *) skb->data;
  24635. +
  24636. + /* skb: hdr + (possibly fragmented) plaintext payload */
  24637. + // PR: FIXME: hostap has additional conditions in the "if" below:
  24638. + // ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
  24639. + if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
  24640. + int flen;
  24641. + struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
  24642. + IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
  24643. +
  24644. + if (!frag_skb) {
  24645. + IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
  24646. + "Rx cannot get skb from fragment "
  24647. + "cache (morefrag=%d seq=%u frag=%u)\n",
  24648. + (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
  24649. + WLAN_GET_SEQ_SEQ(sc), frag);
  24650. + goto rx_dropped;
  24651. + }
  24652. + flen = skb->len;
  24653. + if (frag != 0)
  24654. + flen -= hdrlen;
  24655. +
  24656. + if (frag_skb->tail + flen > frag_skb->end) {
  24657. + printk(KERN_WARNING "%s: host decrypted and "
  24658. + "reassembled frame did not fit skb\n",
  24659. + dev->name);
  24660. + ieee80211_frag_cache_invalidate(ieee, hdr);
  24661. + goto rx_dropped;
  24662. + }
  24663. +
  24664. + if (frag == 0) {
  24665. + /* copy first fragment (including full headers) into
  24666. + * beginning of the fragment cache skb */
  24667. + memcpy(skb_put(frag_skb, flen), skb->data, flen);
  24668. + } else {
  24669. + /* append frame payload to the end of the fragment
  24670. + * cache skb */
  24671. + memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
  24672. + flen);
  24673. + }
  24674. + dev_kfree_skb_any(skb);
  24675. + skb = NULL;
  24676. +
  24677. + if (fc & IEEE80211_FCTL_MOREFRAGS) {
  24678. + /* more fragments expected - leave the skb in fragment
  24679. + * cache for now; it will be delivered to upper layers
  24680. + * after all fragments have been received */
  24681. + goto rx_exit;
  24682. + }
  24683. +
  24684. + /* this was the last fragment and the frame will be
  24685. + * delivered, so remove skb from fragment cache */
  24686. + skb = frag_skb;
  24687. + hdr = (struct ieee80211_hdr *) skb->data;
  24688. + ieee80211_frag_cache_invalidate(ieee, hdr);
  24689. + }
  24690. +
  24691. + /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
  24692. + * encrypted/authenticated */
  24693. + if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
  24694. + ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
  24695. + goto rx_dropped;
  24696. +
  24697. + hdr = (struct ieee80211_hdr *) skb->data;
  24698. + if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
  24699. + if (/*ieee->ieee802_1x &&*/
  24700. + ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
  24701. +
  24702. +#ifdef CONFIG_IEEE80211_DEBUG
  24703. + /* pass unencrypted EAPOL frames even if encryption is
  24704. + * configured */
  24705. + struct eapol *eap = (struct eapol *)(skb->data +
  24706. + 24);
  24707. + IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
  24708. + eap_get_type(eap->type));
  24709. +#endif
  24710. + } else {
  24711. + IEEE80211_DEBUG_DROP(
  24712. + "encryption configured, but RX "
  24713. + "frame not encrypted (SA=" MAC_FMT ")\n",
  24714. + MAC_ARG(hdr->addr2));
  24715. + goto rx_dropped;
  24716. + }
  24717. + }
  24718. +
  24719. +#ifdef CONFIG_IEEE80211_DEBUG
  24720. + if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
  24721. + ieee80211_is_eapol_frame(ieee, skb)) {
  24722. + struct eapol *eap = (struct eapol *)(skb->data +
  24723. + 24);
  24724. + IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
  24725. + eap_get_type(eap->type));
  24726. + }
  24727. +#endif
  24728. +
  24729. + if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
  24730. + !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
  24731. + IEEE80211_DEBUG_DROP(
  24732. + "dropped unencrypted RX data "
  24733. + "frame from " MAC_FMT
  24734. + " (drop_unencrypted=1)\n",
  24735. + MAC_ARG(hdr->addr2));
  24736. + goto rx_dropped;
  24737. + }
  24738. +/*
  24739. + if(ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
  24740. + printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
  24741. + }
  24742. +*/
  24743. + /* skb: hdr + (possible reassembled) full plaintext payload */
  24744. + payload = skb->data + hdrlen;
  24745. + ethertype = (payload[6] << 8) | payload[7];
  24746. +
  24747. +#ifdef NOT_YET
  24748. + /* If IEEE 802.1X is used, check whether the port is authorized to send
  24749. + * the received frame. */
  24750. + if (ieee->ieee802_1x && ieee->iw_mode == IW_MODE_MASTER) {
  24751. + if (ethertype == ETH_P_PAE) {
  24752. + printk(KERN_DEBUG "%s: RX: IEEE 802.1X frame\n",
  24753. + dev->name);
  24754. + if (ieee->hostapd && ieee->apdev) {
  24755. + /* Send IEEE 802.1X frames to the user
  24756. + * space daemon for processing */
  24757. + prism2_rx_80211(ieee->apdev, skb, rx_stats,
  24758. + PRISM2_RX_MGMT);
  24759. + ieee->apdevstats.rx_packets++;
  24760. + ieee->apdevstats.rx_bytes += skb->len;
  24761. + goto rx_exit;
  24762. + }
  24763. + } else if (!frame_authorized) {
  24764. + printk(KERN_DEBUG "%s: dropped frame from "
  24765. + "unauthorized port (IEEE 802.1X): "
  24766. + "ethertype=0x%04x\n",
  24767. + dev->name, ethertype);
  24768. + goto rx_dropped;
  24769. + }
  24770. + }
  24771. +#endif
  24772. +
  24773. +#ifdef _RTL8187_EXT_PATCH_
  24774. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_process_dataframe)
  24775. + {
  24776. + if(ieee->ext_patch_ieee80211_rx_process_dataframe(ieee, skb, rx_stats))
  24777. + {
  24778. + stats->rx_packets++;
  24779. + stats->rx_bytes += skb->len;
  24780. + goto rx_exit;
  24781. + }
  24782. + else
  24783. + goto rx_dropped;
  24784. + }
  24785. +#endif
  24786. + ieee->NumRxDataInPeriod++;
  24787. +// ieee->NumRxOkTotal++;
  24788. + /* convert hdr + possible LLC headers into Ethernet header */
  24789. + if (skb->len - hdrlen >= 8 &&
  24790. + ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
  24791. + ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
  24792. + memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
  24793. + /* remove RFC1042 or Bridge-Tunnel encapsulation and
  24794. + * replace EtherType */
  24795. + skb_pull(skb, hdrlen + SNAP_SIZE);
  24796. + memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
  24797. + memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
  24798. + } else {
  24799. + u16 len;
  24800. + /* Leave Ethernet header part of hdr and full payload */
  24801. + skb_pull(skb, hdrlen);
  24802. + len = htons(skb->len);
  24803. + memcpy(skb_push(skb, 2), &len, 2);
  24804. + memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
  24805. + memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
  24806. + }
  24807. +
  24808. +#ifdef NOT_YET
  24809. + if (wds && ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
  24810. + IEEE80211_FCTL_TODS) &&
  24811. + skb->len >= ETH_HLEN + ETH_ALEN) {
  24812. + /* Non-standard frame: get addr4 from its bogus location after
  24813. + * the payload */
  24814. + memcpy(skb->data + ETH_ALEN,
  24815. + skb->data + skb->len - ETH_ALEN, ETH_ALEN);
  24816. + skb_trim(skb, skb->len - ETH_ALEN);
  24817. + }
  24818. +#endif
  24819. +
  24820. + stats->rx_packets++;
  24821. + stats->rx_bytes += skb->len;
  24822. +
  24823. +#ifdef NOT_YET
  24824. + if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
  24825. + ieee->ap->bridge_packets) {
  24826. + if (dst[0] & 0x01) {
  24827. + /* copy multicast frame both to the higher layers and
  24828. + * to the wireless media */
  24829. + ieee->ap->bridged_multicast++;
  24830. + skb2 = skb_clone(skb, GFP_ATOMIC);
  24831. + if (skb2 == NULL)
  24832. + printk(KERN_DEBUG "%s: skb_clone failed for "
  24833. + "multicast frame\n", dev->name);
  24834. + } else if (hostap_is_sta_assoc(ieee->ap, dst)) {
  24835. + /* send frame directly to the associated STA using
  24836. + * wireless media and not passing to higher layers */
  24837. + ieee->ap->bridged_unicast++;
  24838. + skb2 = skb;
  24839. + skb = NULL;
  24840. + }
  24841. + }
  24842. +
  24843. + if (skb2 != NULL) {
  24844. + /* send to wireless media */
  24845. + skb2->protocol = __constant_htons(ETH_P_802_3);
  24846. + skb2->mac.raw = skb2->nh.raw = skb2->data;
  24847. + /* skb2->nh.raw = skb2->data + ETH_HLEN; */
  24848. + skb2->dev = dev;
  24849. + dev_queue_xmit(skb2);
  24850. + }
  24851. +
  24852. +#endif
  24853. + if (skb) {
  24854. + //printk("0skb_len(%d)\n", skb->len);
  24855. + skb->protocol = eth_type_trans(skb, dev);
  24856. + memset(skb->cb, 0, sizeof(skb->cb));
  24857. + skb->dev = dev;
  24858. + skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
  24859. + //skb->ip_summed = CHECKSUM_UNNECESSARY; /* 802.11 crc not sufficient */
  24860. + ieee->last_rx_ps_time = jiffies;
  24861. + //printk("1skb_len(%d)\n", skb->len);
  24862. + netif_rx(skb);
  24863. + }
  24864. +
  24865. +//by lizhaoming for LED_RX 2008.6.23
  24866. +#ifdef LED_SHIN
  24867. +// printk("==================>data rcvd\n");
  24868. + ieee->ieee80211_led_contorl(dev,LED_CTL_RX);
  24869. +#endif
  24870. +
  24871. + rx_exit:
  24872. +#ifdef NOT_YET
  24873. + if (sta)
  24874. + hostap_handle_sta_release(sta);
  24875. +#endif
  24876. + return 1;
  24877. +
  24878. + rx_dropped:
  24879. + stats->rx_dropped++;
  24880. +#if 0
  24881. + int i;
  24882. + printk("======>dropped: %s():addr2:"MAC_FMT",addr1:"MAC_FMT",skb->len:%d, hdrlen:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr1), skb->len, hdrlen);
  24883. + for (i = 0; i < skb->len; i++) {
  24884. + if (i % 16 == 0) printk("\n\t");
  24885. + printk("%2x ", *(skb->data+i));
  24886. + }
  24887. +
  24888. + printk("\n");
  24889. +#endif
  24890. + /* Returning 0 indicates to caller that we have not handled the SKB--
  24891. + * so it is still allocated and can be used again by underlying
  24892. + * hardware as a DMA target */
  24893. + return 0;
  24894. +}
  24895. +
  24896. +#ifdef _RTL8187_EXT_PATCH_
  24897. +int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src)
  24898. +{
  24899. + u8 *payload;
  24900. + u16 ethertype;
  24901. +
  24902. + /* skb: hdr + (possible reassembled) full plaintext payload */
  24903. + payload = skb->data + hdrlen;
  24904. + ethertype = (payload[6] << 8) | payload[7];
  24905. +
  24906. + /* convert hdr + possible LLC headers into Ethernet header */
  24907. + if (skb->len - hdrlen >= 8 &&
  24908. + ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
  24909. + ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
  24910. + memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
  24911. + /* remove RFC1042 or Bridge-Tunnel encapsulation and
  24912. + * replace EtherType */
  24913. + skb_pull(skb, hdrlen + SNAP_SIZE);
  24914. + memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
  24915. + memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
  24916. + } else {
  24917. + u16 len;
  24918. + /* Leave Ethernet header part of hdr and full payload */
  24919. + skb_pull(skb, hdrlen);
  24920. + len = htons(skb->len);
  24921. + memcpy(skb_push(skb, 2), &len, 2);
  24922. + memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
  24923. + memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
  24924. + }
  24925. +
  24926. + return 1;
  24927. +}
  24928. +#endif // _RTL8187_EXT_PATCH_
  24929. +
  24930. +
  24931. +#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
  24932. +
  24933. +static inline int ieee80211_is_ofdm_rate(u8 rate)
  24934. +{
  24935. + switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
  24936. + case IEEE80211_OFDM_RATE_6MB:
  24937. + case IEEE80211_OFDM_RATE_9MB:
  24938. + case IEEE80211_OFDM_RATE_12MB:
  24939. + case IEEE80211_OFDM_RATE_18MB:
  24940. + case IEEE80211_OFDM_RATE_24MB:
  24941. + case IEEE80211_OFDM_RATE_36MB:
  24942. + case IEEE80211_OFDM_RATE_48MB:
  24943. + case IEEE80211_OFDM_RATE_54MB:
  24944. + return 1;
  24945. + }
  24946. + return 0;
  24947. +}
  24948. +
  24949. +
  24950. +//
  24951. +// Description:
  24952. +// Translate 0-100 signal strength index into dBm.
  24953. +//
  24954. +int
  24955. +TranslateToDbm8187(
  24956. + unsigned char SignalStrengthIndex // 0-100 index.
  24957. + )
  24958. +{
  24959. + unsigned char SignalPower; // in dBm.
  24960. +
  24961. + // Translate to dBm (x=0.5y-95).
  24962. + //SignalPower = (int)((SignalStrengthIndex + 1) >> 1);
  24963. + SignalPower = (int)SignalStrengthIndex * 7 / 10;
  24964. + SignalPower -= 95;
  24965. +// printk("==>SignalPower:%d\n", SignalPower);
  24966. + return SignalPower;
  24967. +}
  24968. +
  24969. +static inline int ieee80211_SignalStrengthTranslate(
  24970. + int CurrSS
  24971. + )
  24972. +{
  24973. + int RetSS;
  24974. +
  24975. + // Step 1. Scale mapping.
  24976. + if(CurrSS >= 71 && CurrSS <= 100)
  24977. + {
  24978. + RetSS = 95 + (((CurrSS - 70) / 6 == 5) ? 5 : ((CurrSS - 70) / 6 + 1));
  24979. + }
  24980. + else if(CurrSS >= 41 && CurrSS <= 70)
  24981. + {
  24982. + RetSS = 83 + ((CurrSS - 40) / 3);
  24983. + }
  24984. + else if(CurrSS >= 31 && CurrSS <= 40)
  24985. + {
  24986. + RetSS = 71 + (CurrSS - 30);
  24987. + }
  24988. + else if(CurrSS >= 21 && CurrSS <= 30)
  24989. + {
  24990. + RetSS = 59 + (CurrSS - 20);
  24991. + }
  24992. + else if(CurrSS >= 5 && CurrSS <= 20)
  24993. + {
  24994. + RetSS = 47 + (((CurrSS - 5) * 2) / 3);
  24995. + }
  24996. + else if(CurrSS == 4)
  24997. + {
  24998. + RetSS = 37;
  24999. + }
  25000. + else if(CurrSS == 3)
  25001. + {
  25002. + RetSS = 27;
  25003. + }
  25004. + else if(CurrSS == 2)
  25005. + {
  25006. + RetSS = 18;
  25007. + }
  25008. + else if(CurrSS == 1)
  25009. + {
  25010. + RetSS = 9;
  25011. + }
  25012. + else
  25013. + {
  25014. + RetSS = CurrSS;
  25015. + }
  25016. + //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
  25017. +
  25018. + // Step 2. Smoothing.
  25019. +
  25020. + //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
  25021. +
  25022. + return RetSS;
  25023. +}
  25024. +
  25025. +#ifdef ENABLE_DOT11D
  25026. +static inline void ieee80211_extract_country_ie(
  25027. + struct ieee80211_device *ieee,
  25028. + struct ieee80211_info_element *info_element,
  25029. + struct ieee80211_network *network,
  25030. + u8 * addr2
  25031. +)
  25032. +{
  25033. +#if 0
  25034. + u32 i = 0;
  25035. + u8 * p = (u8*)info_element->data;
  25036. + printk("-----------------------\n");
  25037. + printk("%s Country IE:", network->ssid);
  25038. + for(i=0; i<info_element->len; i++)
  25039. + printk("\t%2.2x", *(p+i));
  25040. + printk("\n-----------------------\n");
  25041. +#endif
  25042. + if(IS_DOT11D_ENABLE(ieee))
  25043. + {
  25044. + if(info_element->len!= 0)
  25045. + {
  25046. + memcpy(network->CountryIeBuf, info_element->data, info_element->len);
  25047. + network->CountryIeLen = info_element->len;
  25048. +
  25049. + if(!IS_COUNTRY_IE_VALID(ieee))
  25050. + {
  25051. + Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
  25052. + }
  25053. + }
  25054. +
  25055. + //
  25056. + // 070305, rcnjko: I update country IE watch dog here because
  25057. + // some AP (e.g. Cisco 1242) don't include country IE in their
  25058. + // probe response frame.
  25059. + //
  25060. + if(IS_EQUAL_CIE_SRC(ieee, addr2) )
  25061. + {
  25062. + UPDATE_CIE_WATCHDOG(ieee);
  25063. + }
  25064. + }
  25065. +
  25066. +}
  25067. +#endif
  25068. +
  25069. +
  25070. + inline int ieee80211_network_init(
  25071. + struct ieee80211_device *ieee,
  25072. + struct ieee80211_probe_response *beacon,
  25073. + struct ieee80211_network *network,
  25074. + struct ieee80211_rx_stats *stats)
  25075. +{
  25076. +#ifdef CONFIG_IEEE80211_DEBUG
  25077. + char rates_str[64];
  25078. + char *p;
  25079. +#endif
  25080. + struct ieee80211_info_element *info_element;
  25081. + u16 left;
  25082. + u8 i;
  25083. + short offset;
  25084. +
  25085. + /* Pull out fixed field data */
  25086. + memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
  25087. + network->capability = beacon->capability;
  25088. + network->last_scanned = jiffies;
  25089. + network->time_stamp[0] = beacon->time_stamp[0];
  25090. + network->time_stamp[1] = beacon->time_stamp[1];
  25091. + network->beacon_interval = beacon->beacon_interval;
  25092. + /* Where to pull this? beacon->listen_interval;*/
  25093. + network->listen_interval = 0x0A;
  25094. + network->rates_len = network->rates_ex_len = 0;
  25095. + network->last_associate = 0;
  25096. + network->ssid_len = 0;
  25097. + network->flags = 0;
  25098. + network->atim_window = 0;
  25099. + network->QoS_Enable = 0;
  25100. +#ifdef THOMAS_TURBO
  25101. + network->Turbo_Enable = 0;
  25102. +#endif
  25103. +#ifdef ENABLE_DOT11D
  25104. + network->CountryIeLen = 0;
  25105. + memset(network->CountryIeBuf, 0, MAX_IE_LEN);
  25106. +#endif
  25107. +
  25108. + if (stats->freq == IEEE80211_52GHZ_BAND) {
  25109. + /* for A band (No DS info) */
  25110. + network->channel = stats->received_channel;
  25111. + } else
  25112. + network->flags |= NETWORK_HAS_CCK;
  25113. +
  25114. + network->wpa_ie_len = 0;
  25115. + network->rsn_ie_len = 0;
  25116. +
  25117. + info_element = &beacon->info_element;
  25118. + left = stats->len - ((void *)info_element - (void *)beacon);
  25119. + while (left >= sizeof(struct ieee80211_info_element_hdr)) {
  25120. + if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
  25121. + IEEE80211_DEBUG_SCAN("SCAN: parse failed: info_element->len + 2 > left : info_element->len+2=%d left=%d.\n",
  25122. + info_element->len + sizeof(struct ieee80211_info_element),
  25123. + left);
  25124. + return 1;
  25125. + }
  25126. +
  25127. + switch (info_element->id) {
  25128. + case MFIE_TYPE_SSID:
  25129. + if (ieee80211_is_empty_essid(info_element->data,
  25130. + info_element->len)) {
  25131. + network->flags |= NETWORK_EMPTY_ESSID;
  25132. + break;
  25133. + }
  25134. +
  25135. + network->ssid_len = min(info_element->len,
  25136. + (u8)IW_ESSID_MAX_SIZE);
  25137. + memcpy(network->ssid, info_element->data, network->ssid_len);
  25138. + if (network->ssid_len < IW_ESSID_MAX_SIZE)
  25139. + memset(network->ssid + network->ssid_len, 0,
  25140. + IW_ESSID_MAX_SIZE - network->ssid_len);
  25141. +
  25142. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
  25143. + network->ssid, network->ssid_len);
  25144. + break;
  25145. +
  25146. + case MFIE_TYPE_RATES:
  25147. +#ifdef CONFIG_IEEE80211_DEBUG
  25148. + p = rates_str;
  25149. +#endif
  25150. + network->rates_len = min(info_element->len, MAX_RATES_LENGTH);
  25151. + for (i = 0; i < network->rates_len; i++) {
  25152. + network->rates[i] = info_element->data[i];
  25153. +#ifdef CONFIG_IEEE80211_DEBUG
  25154. + p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
  25155. +#endif
  25156. + if (ieee80211_is_ofdm_rate(info_element->data[i])) {
  25157. + network->flags |= NETWORK_HAS_OFDM;
  25158. + if (info_element->data[i] &
  25159. + IEEE80211_BASIC_RATE_MASK)
  25160. + network->flags &=
  25161. + ~NETWORK_HAS_CCK;
  25162. + }
  25163. + }
  25164. +
  25165. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES: '%s' (%d)\n",
  25166. + rates_str, network->rates_len);
  25167. + break;
  25168. +
  25169. + case MFIE_TYPE_RATES_EX:
  25170. +#ifdef CONFIG_IEEE80211_DEBUG
  25171. + p = rates_str;
  25172. +#endif
  25173. + network->rates_ex_len = min(info_element->len, MAX_RATES_EX_LENGTH);
  25174. + for (i = 0; i < network->rates_ex_len; i++) {
  25175. + network->rates_ex[i] = info_element->data[i];
  25176. +#ifdef CONFIG_IEEE80211_DEBUG
  25177. + p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
  25178. +#endif
  25179. + if (ieee80211_is_ofdm_rate(info_element->data[i])) {
  25180. + network->flags |= NETWORK_HAS_OFDM;
  25181. + if (info_element->data[i] &
  25182. + IEEE80211_BASIC_RATE_MASK)
  25183. + network->flags &=
  25184. + ~NETWORK_HAS_CCK;
  25185. + }
  25186. + }
  25187. +
  25188. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
  25189. + rates_str, network->rates_ex_len);
  25190. + break;
  25191. +
  25192. + case MFIE_TYPE_DS_SET:
  25193. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
  25194. + info_element->data[0]);
  25195. + if (stats->freq == IEEE80211_24GHZ_BAND)
  25196. + network->channel = info_element->data[0];
  25197. + break;
  25198. +
  25199. + case MFIE_TYPE_FH_SET:
  25200. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
  25201. + break;
  25202. +
  25203. + case MFIE_TYPE_CF_SET:
  25204. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_CF_SET: ignored\n");
  25205. + break;
  25206. +
  25207. + case MFIE_TYPE_TIM:
  25208. +
  25209. + if(info_element->len < 4)
  25210. + break;
  25211. +
  25212. + network->dtim_period = info_element->data[1];
  25213. +
  25214. + if(ieee->state != IEEE80211_LINKED)
  25215. + break;
  25216. +
  25217. + network->last_dtim_sta_time[0] = stats->mac_time[0];
  25218. + network->last_dtim_sta_time[1] = stats->mac_time[1];
  25219. +
  25220. + network->dtim_data = IEEE80211_DTIM_VALID;
  25221. +
  25222. + if(info_element->data[0] != 0)
  25223. + break;
  25224. +
  25225. + if(info_element->data[2] & 1)
  25226. + network->dtim_data |= IEEE80211_DTIM_MBCAST;
  25227. +
  25228. + offset = (info_element->data[2] >> 1)*2;
  25229. +
  25230. + //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id);
  25231. +
  25232. + if(ieee->assoc_id < offset ||
  25233. + ieee->assoc_id > 8*(offset + info_element->len -3))
  25234. +
  25235. + break;
  25236. +
  25237. +
  25238. + offset = offset + ieee->assoc_id / 8;// + ((aid % 8)? 0 : 1) ;
  25239. +
  25240. + // printk("offset:%x data:%x, ucast:%d\n", offset,
  25241. + // info_element->data[3+offset] ,
  25242. + // info_element->data[3+offset] & (1<<(ieee->assoc_id%8)));
  25243. +
  25244. + if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
  25245. + network->dtim_data |= IEEE80211_DTIM_UCAST;
  25246. +
  25247. + break;
  25248. +
  25249. + case MFIE_TYPE_IBSS_SET:
  25250. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_IBSS_SET: ignored\n");
  25251. + break;
  25252. +
  25253. + case MFIE_TYPE_CHALLENGE:
  25254. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_CHALLENGE: ignored\n");
  25255. + break;
  25256. +
  25257. + case MFIE_TYPE_GENERIC:
  25258. + //nic is 87B
  25259. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n",
  25260. + info_element->len);
  25261. + if (info_element->len >= 4 &&
  25262. + info_element->data[0] == 0x00 &&
  25263. + info_element->data[1] == 0x50 &&
  25264. + info_element->data[2] == 0xf2 &&
  25265. + info_element->data[3] == 0x01) {
  25266. + network->wpa_ie_len = min(info_element->len + 2,
  25267. + MAX_WPA_IE_LEN);
  25268. + memcpy(network->wpa_ie, info_element,
  25269. + network->wpa_ie_len);
  25270. + }
  25271. +
  25272. +#ifdef THOMAS_TURBO
  25273. + if (info_element->len == 7 &&
  25274. + info_element->data[0] == 0x00 &&
  25275. + info_element->data[1] == 0xe0 &&
  25276. + info_element->data[2] == 0x4c &&
  25277. + info_element->data[3] == 0x01 &&
  25278. + info_element->data[4] == 0x02) {
  25279. + network->Turbo_Enable = 1;
  25280. + }
  25281. +#endif
  25282. + if (1 == stats->nic_type) {//nic 87
  25283. + break;
  25284. + }
  25285. +
  25286. + if (info_element->len >= 5 &&
  25287. + info_element->data[0] == 0x00 &&
  25288. + info_element->data[1] == 0x50 &&
  25289. + info_element->data[2] == 0xf2 &&
  25290. + info_element->data[3] == 0x02 &&
  25291. + info_element->data[4] == 0x00) {
  25292. + //printk(KERN_WARNING "wmm info updated: %x\n", info_element->data[6]);
  25293. + //WMM Information Element
  25294. + network->wmm_info = info_element->data[6];
  25295. + network->QoS_Enable = 1;
  25296. + }
  25297. +
  25298. + if (info_element->len >= 8 &&
  25299. + info_element->data[0] == 0x00 &&
  25300. + info_element->data[1] == 0x50 &&
  25301. + info_element->data[2] == 0xf2 &&
  25302. + info_element->data[3] == 0x02 &&
  25303. + info_element->data[4] == 0x01) {
  25304. + // Not care about version at present.
  25305. + //WMM Information Element
  25306. + //printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]);
  25307. + network->wmm_info = info_element->data[6];
  25308. + //WMM Parameter Element
  25309. + memcpy(network->wmm_param, (u8 *)(info_element->data + 8),(info_element->len - 8));
  25310. + network->QoS_Enable = 1;
  25311. + }
  25312. + break;
  25313. +
  25314. + case MFIE_TYPE_RSN:
  25315. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_RSN: %d bytes\n",
  25316. + info_element->len);
  25317. + network->rsn_ie_len = min(info_element->len + 2,
  25318. + MAX_WPA_IE_LEN);
  25319. + memcpy(network->rsn_ie, info_element,
  25320. + network->rsn_ie_len);
  25321. + break;
  25322. +
  25323. +#ifdef ENABLE_DOT11D
  25324. + case MFIE_TYPE_COUNTRY:
  25325. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
  25326. + info_element->len);
  25327. +// printk("=====>Receive <%s> Country IE\n",network->ssid);
  25328. + ieee80211_extract_country_ie(ieee, info_element, network, beacon->header.addr2);
  25329. + break;
  25330. +#endif
  25331. +
  25332. + default:
  25333. + IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
  25334. + info_element->id);
  25335. + break;
  25336. + }
  25337. +
  25338. + left -= sizeof(struct ieee80211_info_element_hdr) +
  25339. + info_element->len;
  25340. + info_element = (struct ieee80211_info_element *)
  25341. + &info_element->data[info_element->len];
  25342. + }
  25343. +
  25344. + network->mode = 0;
  25345. + if (stats->freq == IEEE80211_52GHZ_BAND)
  25346. + network->mode = IEEE_A;
  25347. + else {
  25348. + if (network->flags & NETWORK_HAS_OFDM)
  25349. + network->mode |= IEEE_G;
  25350. + if (network->flags & NETWORK_HAS_CCK)
  25351. + network->mode |= IEEE_B;
  25352. + }
  25353. +
  25354. + if (network->mode == 0) {
  25355. + IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
  25356. + "network.\n",
  25357. + escape_essid(network->ssid,
  25358. + network->ssid_len),
  25359. + MAC_ARG(network->bssid));
  25360. + return 1;
  25361. + }
  25362. +
  25363. + if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
  25364. + network->flags |= NETWORK_EMPTY_ESSID;
  25365. +
  25366. +#if 1
  25367. + //if(strcmp(network->ssid, "linksys_lzm000") == 0)
  25368. + // printk("----signalstrength = %d ", stats->signalstrength);
  25369. + stats->signal = TranslateToDbm8187(stats->signalstrength);
  25370. + //stats->noise = stats->signal - stats->noise;
  25371. + stats->noise = TranslateToDbm8187(100 - stats->signalstrength) - 25;
  25372. +#endif
  25373. + memcpy(&network->stats, stats, sizeof(network->stats));
  25374. +
  25375. + //YJ,test,080611
  25376. + //if(strcmp(network->ssid, "ZyXEL") == 0)
  25377. + // IEEE_NET_DUMP(network);
  25378. +
  25379. + return 0;
  25380. +}
  25381. +
  25382. +static inline int is_same_network(struct ieee80211_network *src,
  25383. + struct ieee80211_network *dst,
  25384. + struct ieee80211_device * ieee)
  25385. +{
  25386. + /* A network is only a duplicate if the channel, BSSID, ESSID
  25387. + * and the capability field (in particular IBSS and BSS) all match.
  25388. + * We treat all <hidden> with the same BSSID and channel
  25389. + * as one network */
  25390. + return (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
  25391. + //((src->ssid_len == dst->ssid_len) &&
  25392. + (src->channel == dst->channel) &&
  25393. + !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
  25394. + (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
  25395. + //!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
  25396. + ((src->capability & WLAN_CAPABILITY_IBSS) ==
  25397. + (dst->capability & WLAN_CAPABILITY_IBSS)) &&
  25398. + ((src->capability & WLAN_CAPABILITY_BSS) ==
  25399. + (dst->capability & WLAN_CAPABILITY_BSS)));
  25400. +}
  25401. +
  25402. +inline void update_network(struct ieee80211_network *dst,
  25403. + struct ieee80211_network *src)
  25404. +{
  25405. + unsigned char quality = src->stats.signalstrength;
  25406. + unsigned char signal = 0;
  25407. + unsigned char noise = 0;
  25408. + if(dst->stats.signalstrength > 0) {
  25409. + quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6;
  25410. + }
  25411. + signal = TranslateToDbm8187(quality);
  25412. + //noise = signal - src->stats.noise;
  25413. + if(dst->stats.noise > 0)
  25414. + noise = (dst->stats.noise * 5 + src->stats.noise)/6;
  25415. + //if(strcmp(dst->ssid, "linksys_lzm000") == 0)
  25416. +// printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal);
  25417. + memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
  25418. + dst->stats.signalstrength = quality;
  25419. + dst->stats.signal = signal;
  25420. + dst->stats.noise = noise;
  25421. + dst->capability = src->capability;
  25422. + memcpy(dst->rates, src->rates, src->rates_len);
  25423. + dst->rates_len = src->rates_len;
  25424. + memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
  25425. + dst->rates_ex_len = src->rates_ex_len;
  25426. +
  25427. + //YJ,add,080819,for hidden ap
  25428. + if(src->ssid_len > 0)
  25429. + {
  25430. + //if(src->ssid_len == 13)
  25431. + // printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid);
  25432. + memset(dst->ssid, 0, dst->ssid_len);
  25433. + dst->ssid_len = src->ssid_len;
  25434. + memcpy(dst->ssid, src->ssid, src->ssid_len);
  25435. + }
  25436. + //YJ,add,080819,for hidden ap,end
  25437. + dst->channel = src->channel;
  25438. + dst->mode = src->mode;
  25439. + dst->flags = src->flags;
  25440. + dst->time_stamp[0] = src->time_stamp[0];
  25441. + dst->time_stamp[1] = src->time_stamp[1];
  25442. +
  25443. + dst->beacon_interval = src->beacon_interval;
  25444. + dst->listen_interval = src->listen_interval;
  25445. + dst->atim_window = src->atim_window;
  25446. + dst->dtim_period = src->dtim_period;
  25447. + dst->dtim_data = src->dtim_data;
  25448. + dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
  25449. + dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
  25450. +
  25451. + memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
  25452. + dst->wpa_ie_len = src->wpa_ie_len;
  25453. + memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
  25454. + dst->rsn_ie_len = src->rsn_ie_len;
  25455. +
  25456. + dst->last_scanned = jiffies;
  25457. + /* dst->last_associate is not overwritten */
  25458. +#if 1
  25459. + dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
  25460. +/*
  25461. + if((dst->wmm_info^src->wmm_info)&0x0f) {//Param Set Count change, update Parameter
  25462. + memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN);
  25463. + }
  25464. +*/
  25465. + if(src->wmm_param[0].ac_aci_acm_aifsn|| \
  25466. + src->wmm_param[1].ac_aci_acm_aifsn|| \
  25467. + src->wmm_param[2].ac_aci_acm_aifsn|| \
  25468. + src->wmm_param[1].ac_aci_acm_aifsn) {
  25469. + memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
  25470. + }
  25471. + dst->QoS_Enable = src->QoS_Enable;
  25472. +#else
  25473. + dst->QoS_Enable = 1;//for Rtl8187 simulation
  25474. +#endif
  25475. + dst->SignalStrength = src->SignalStrength;
  25476. +#ifdef THOMAS_TURBO
  25477. + dst->Turbo_Enable = src->Turbo_Enable;
  25478. +#endif
  25479. +#ifdef ENABLE_DOT11D
  25480. + dst->CountryIeLen = src->CountryIeLen;
  25481. + memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
  25482. +#endif
  25483. +
  25484. +}
  25485. +
  25486. +inline void ieee80211_process_probe_response(
  25487. + struct ieee80211_device *ieee,
  25488. + struct ieee80211_probe_response *beacon,
  25489. + struct ieee80211_rx_stats *stats)
  25490. +{
  25491. + struct ieee80211_network network;
  25492. + struct ieee80211_network *target;
  25493. + struct ieee80211_network *oldest = NULL;
  25494. +#ifdef CONFIG_IEEE80211_DEBUG
  25495. + struct ieee80211_info_element *info_element = &beacon->info_element;
  25496. +#endif
  25497. + unsigned long flags;
  25498. + short renew;
  25499. + u8 wmm_info;
  25500. + u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON)? 1:0;
  25501. +
  25502. + memset(&network, 0, sizeof(struct ieee80211_network));
  25503. +//rz
  25504. +#ifdef _RTL8187_EXT_PATCH_
  25505. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_process_probe_response_1) {
  25506. + ieee->ext_patch_ieee80211_process_probe_response_1(ieee, beacon, stats);
  25507. + return;
  25508. + }
  25509. +#endif
  25510. + IEEE80211_DEBUG_SCAN(
  25511. + "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
  25512. + escape_essid(info_element->data, info_element->len),
  25513. + MAC_ARG(beacon->header.addr3),
  25514. + (beacon->capability & (1<<0xf)) ? '1' : '0',
  25515. + (beacon->capability & (1<<0xe)) ? '1' : '0',
  25516. + (beacon->capability & (1<<0xd)) ? '1' : '0',
  25517. + (beacon->capability & (1<<0xc)) ? '1' : '0',
  25518. + (beacon->capability & (1<<0xb)) ? '1' : '0',
  25519. + (beacon->capability & (1<<0xa)) ? '1' : '0',
  25520. + (beacon->capability & (1<<0x9)) ? '1' : '0',
  25521. + (beacon->capability & (1<<0x8)) ? '1' : '0',
  25522. + (beacon->capability & (1<<0x7)) ? '1' : '0',
  25523. + (beacon->capability & (1<<0x6)) ? '1' : '0',
  25524. + (beacon->capability & (1<<0x5)) ? '1' : '0',
  25525. + (beacon->capability & (1<<0x4)) ? '1' : '0',
  25526. + (beacon->capability & (1<<0x3)) ? '1' : '0',
  25527. + (beacon->capability & (1<<0x2)) ? '1' : '0',
  25528. + (beacon->capability & (1<<0x1)) ? '1' : '0',
  25529. + (beacon->capability & (1<<0x0)) ? '1' : '0');
  25530. +
  25531. + if (ieee80211_network_init(ieee, beacon, &network, stats)) {
  25532. + IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
  25533. + escape_essid(info_element->data,
  25534. + info_element->len),
  25535. + MAC_ARG(beacon->header.addr3),
  25536. + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
  25537. + IEEE80211_STYPE_PROBE_RESP ?
  25538. + "PROBE RESPONSE" : "BEACON");
  25539. + return;
  25540. + }
  25541. +
  25542. +#ifdef ENABLE_DOT11D
  25543. + // For Asus EeePc request,
  25544. + // (1) if wireless adapter receive get any 802.11d country code in AP beacon,
  25545. + // wireless adapter should follow the country code.
  25546. + // (2) If there is no any country code in beacon,
  25547. + // then wireless adapter should do active scan from ch1~11 and
  25548. + // passive scan from ch12~14
  25549. + if(ieee->bGlobalDomain)
  25550. + {
  25551. + if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
  25552. + {
  25553. + // Case 1: Country code
  25554. + if(IS_COUNTRY_IE_VALID(ieee) )
  25555. + {
  25556. + if( !IsLegalChannel(ieee, network.channel) )
  25557. + {
  25558. + printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
  25559. + return;
  25560. + }
  25561. + }
  25562. + // Case 2: No any country code.
  25563. + else
  25564. + {
  25565. + // Filter over channel ch12~14
  25566. + if(network.channel > 11)
  25567. + {
  25568. + printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
  25569. + return;
  25570. + }
  25571. + }
  25572. + }
  25573. + else
  25574. + {
  25575. + // Case 1: Country code
  25576. + if(IS_COUNTRY_IE_VALID(ieee) )
  25577. + {
  25578. + if( !IsLegalChannel(ieee, network.channel) )
  25579. + {
  25580. + printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network.channel);
  25581. + return;
  25582. + }
  25583. + }
  25584. + // Case 2: No any country code.
  25585. + else
  25586. + {
  25587. + // Filter over channel ch12~14
  25588. + if(network.channel > 14)
  25589. + {
  25590. + printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
  25591. + return;
  25592. + }
  25593. + }
  25594. + }
  25595. + }
  25596. +
  25597. + //lzm add 081205
  25598. + // for Toshiba request, we use channel_plan COUNTRY_CODE_WORLD_WIDE_13_INDEX,
  25599. + // For Liteon "World Wide 13" Domain name:ch1~11 active scan & ch12~13 passive scan
  25600. + // So we shoud only rcv beacon in 12-13, and filter probe resp in 12-13.
  25601. + if(ieee->MinPassiveChnlNum != MAX_CHANNEL_NUMBER+1)
  25602. + {
  25603. + if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
  25604. + {
  25605. + // Filter over channel ch12~13
  25606. + if(network.channel >= ieee->MinPassiveChnlNum)
  25607. + {
  25608. + printk("GetScanInfo(): passive scan, filter probe resp at channel(%d).\n", network.channel);
  25609. + return;
  25610. + }
  25611. + }
  25612. + }
  25613. +#endif
  25614. +
  25615. +
  25616. + /* The network parsed correctly -- so now we scan our known networks
  25617. + * to see if we can find it in our list.
  25618. + *
  25619. + * NOTE: This search is definitely not optimized. Once its doing
  25620. + * the "right thing" we'll optimize it for efficiency if
  25621. + * necessary */
  25622. +
  25623. + /* Search for this entry in the list and update it if it is
  25624. + * already there. */
  25625. +
  25626. + spin_lock_irqsave(&ieee->lock, flags);
  25627. +
  25628. + if(is_same_network(&ieee->current_network, &network, ieee)) {
  25629. + //YJ,add,080819,for hidden ap
  25630. + if(is_beacon == 0)
  25631. + network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
  25632. + if ((ieee->state == IEEE80211_LINKED) && is_beacon)
  25633. + ieee->NumRxBcnInPeriod++;
  25634. + wmm_info = ieee->current_network.wmm_info;
  25635. + update_network(&ieee->current_network, &network);
  25636. + }
  25637. +
  25638. + list_for_each_entry(target, &ieee->network_list, list) {
  25639. + if (is_same_network(target, &network, ieee))
  25640. + break;
  25641. + if ((oldest == NULL) ||
  25642. + (target->last_scanned < oldest->last_scanned))
  25643. + oldest = target;
  25644. + }
  25645. +
  25646. + /* If we didn't find a match, then get a new network slot to initialize
  25647. + * with this beacon's information */
  25648. + if (&target->list == &ieee->network_list) {
  25649. + if (list_empty(&ieee->network_free_list)) {
  25650. + /* If there are no more slots, expire the oldest */
  25651. + list_del(&oldest->list);
  25652. + target = oldest;
  25653. + IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
  25654. + "network list.\n",
  25655. + escape_essid(target->ssid,
  25656. + target->ssid_len),
  25657. + MAC_ARG(target->bssid));
  25658. + } else {
  25659. + /* Otherwise just pull from the free list */
  25660. + target = list_entry(ieee->network_free_list.next,
  25661. + struct ieee80211_network, list);
  25662. + list_del(ieee->network_free_list.next);
  25663. + }
  25664. +
  25665. +
  25666. +#ifdef CONFIG_IEEE80211_DEBUG
  25667. + IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
  25668. + escape_essid(network.ssid,
  25669. + network.ssid_len),
  25670. + MAC_ARG(network.bssid),
  25671. + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
  25672. + IEEE80211_STYPE_PROBE_RESP ?
  25673. + "PROBE RESPONSE" : "BEACON");
  25674. +#endif
  25675. +
  25676. +#ifdef _RTL8187_EXT_PATCH_
  25677. + network.ext_entry = target->ext_entry;
  25678. +#endif
  25679. + memcpy(target, &network, sizeof(*target));
  25680. + list_add_tail(&target->list, &ieee->network_list);
  25681. + if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
  25682. + ieee80211_softmac_new_net(ieee,&network);
  25683. + } else {
  25684. + IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
  25685. + escape_essid(target->ssid,
  25686. + target->ssid_len),
  25687. + MAC_ARG(target->bssid),
  25688. + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
  25689. + IEEE80211_STYPE_PROBE_RESP ?
  25690. + "PROBE RESPONSE" : "BEACON");
  25691. +
  25692. + /* we have an entry and we are going to update it. But this entry may
  25693. + * be already expired. In this case we do the same as we found a new
  25694. + * net and call the new_net handler
  25695. + */
  25696. + renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
  25697. + //YJ,add,080819,for hidden ap
  25698. + if(is_beacon == 0)
  25699. + network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
  25700. + //if(strncmp(network.ssid, "linksys-c",9) == 0)
  25701. + // printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
  25702. + if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
  25703. + && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
  25704. + ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == IEEE80211_NOLINK))))
  25705. + renew = 1;
  25706. + //YJ,add,080819,for hidden ap,end
  25707. + update_network(target, &network);
  25708. + if(renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
  25709. + ieee80211_softmac_new_net(ieee,&network);
  25710. + }
  25711. +
  25712. + spin_unlock_irqrestore(&ieee->lock, flags);
  25713. +}
  25714. +
  25715. +void ieee80211_rx_mgt(struct ieee80211_device *ieee,
  25716. + struct ieee80211_hdr *header,
  25717. + struct ieee80211_rx_stats *stats)
  25718. +{
  25719. + switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
  25720. +
  25721. + case IEEE80211_STYPE_BEACON:
  25722. + IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
  25723. + WLAN_FC_GET_STYPE(header->frame_ctl));
  25724. + IEEE80211_DEBUG_SCAN("Beacon\n");
  25725. + ieee80211_process_probe_response(
  25726. + ieee, (struct ieee80211_probe_response *)header, stats);
  25727. + break;
  25728. +
  25729. + case IEEE80211_STYPE_PROBE_RESP:
  25730. + IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
  25731. + WLAN_FC_GET_STYPE(header->frame_ctl));
  25732. + IEEE80211_DEBUG_SCAN("Probe response\n");
  25733. + ieee80211_process_probe_response(
  25734. + ieee, (struct ieee80211_probe_response *)header, stats);
  25735. + break;
  25736. +//rz
  25737. +#ifdef _RTL8187_EXT_PATCH_
  25738. + case IEEE80211_STYPE_PROBE_REQ:
  25739. + IEEE80211_DEBUG_MGMT("received PROBE REQUEST (%d)\n",
  25740. + WLAN_FC_GET_STYPE(header->frame_ctl));
  25741. + IEEE80211_DEBUG_SCAN("Probe request\n");
  25742. + ///
  25743. + //printk("Probe request\n");
  25744. + if( ieee->iw_mode == ieee->iw_ext_mode && ieee->ext_patch_ieee80211_rx_mgt_on_probe_req )
  25745. + ieee->ext_patch_ieee80211_rx_mgt_on_probe_req( ieee, (struct ieee80211_probe_request *)header, stats);
  25746. + break;
  25747. +#endif // _RTL8187_EXT_PATCH_
  25748. +
  25749. + }
  25750. +}
  25751. +
  25752. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  25753. +EXPORT_SYMBOL(ieee80211_rx_mgt);
  25754. +EXPORT_SYMBOL(ieee80211_rx);
  25755. +EXPORT_SYMBOL(ieee80211_network_init);
  25756. +#ifdef _RTL8187_EXT_PATCH_
  25757. +EXPORT_SYMBOL(ieee_ext_skb_p80211_to_ether);
  25758. +#endif
  25759. +#else
  25760. +EXPORT_SYMBOL_NOVERS(ieee80211_rx_mgt);
  25761. +EXPORT_SYMBOL_NOVERS(ieee80211_rx);
  25762. +EXPORT_SYMBOL_NOVERS(ieee80211_network_init);
  25763. +#ifdef _RTL8187_EXT_PATCH_
  25764. +EXPORT_SYMBOL_NOVERS(ieee_ext_skb_p80211_to_ether);
  25765. +#endif
  25766. +#endif
  25767. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac.c
  25768. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac.c 1970-01-01 01:00:00.000000000 +0100
  25769. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac.c 2009-08-23 19:01:04.000000000 +0200
  25770. @@ -0,0 +1,4083 @@
  25771. +/* IEEE 802.11 SoftMAC layer
  25772. + * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  25773. + *
  25774. + * Mostly extracted from the rtl8180-sa2400 driver for the
  25775. + * in-kernel generic ieee802.11 stack.
  25776. + *
  25777. + * Few lines might be stolen from other part of the ieee80211
  25778. + * stack. Copyright who own it's copyright
  25779. + *
  25780. + * WPA code stolen from the ipw2200 driver.
  25781. + * Copyright who own it's copyright.
  25782. + *
  25783. + * released under the GPL
  25784. + */
  25785. +
  25786. +
  25787. +#include "ieee80211.h"
  25788. +
  25789. +#include <linux/random.h>
  25790. +#include <linux/delay.h>
  25791. +#include <linux/version.h>
  25792. +#include <asm/uaccess.h>
  25793. +
  25794. +#ifdef ENABLE_DOT11D
  25795. +#include "dot11d.h"
  25796. +#endif
  25797. +
  25798. +
  25799. +u8 rsn_authen_cipher_suite[16][4] = {
  25800. + {0x00,0x0F,0xAC,0x00}, //Use group key, //Reserved
  25801. + {0x00,0x0F,0xAC,0x01}, //WEP-40 //RSNA default
  25802. + {0x00,0x0F,0xAC,0x02}, //TKIP //NONE //{used just as default}
  25803. + {0x00,0x0F,0xAC,0x03}, //WRAP-historical
  25804. + {0x00,0x0F,0xAC,0x04}, //CCMP
  25805. + {0x00,0x0F,0xAC,0x05}, //WEP-104
  25806. +};
  25807. +
  25808. +short ieee80211_is_54g(struct ieee80211_network net)
  25809. +{
  25810. + return ((net.rates_ex_len > 0) || (net.rates_len > 4));
  25811. +}
  25812. +
  25813. +short ieee80211_is_shortslot(struct ieee80211_network net)
  25814. +{
  25815. + return (net.capability & WLAN_CAPABILITY_SHORT_SLOT);
  25816. +}
  25817. +
  25818. +/* returns the total length needed for pleacing the RATE MFIE
  25819. + * tag and the EXTENDED RATE MFIE tag if needed.
  25820. + * It encludes two bytes per tag for the tag itself and its len
  25821. + */
  25822. +unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
  25823. +{
  25824. + unsigned int rate_len = 0;
  25825. +
  25826. + if (ieee->modulation & IEEE80211_CCK_MODULATION)
  25827. + rate_len = IEEE80211_CCK_RATE_LEN + 2;
  25828. +
  25829. + if (ieee->modulation & IEEE80211_OFDM_MODULATION)
  25830. +
  25831. + rate_len += IEEE80211_OFDM_RATE_LEN + 2;
  25832. +
  25833. + return rate_len;
  25834. +}
  25835. +
  25836. +/* pleace the MFIE rate, tag to the memory (double) poined.
  25837. + * Then it updates the pointer so that
  25838. + * it points after the new MFIE tag added.
  25839. + */
  25840. +void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
  25841. +{
  25842. + u8 *tag = *tag_p;
  25843. +
  25844. + if (ieee->modulation & IEEE80211_CCK_MODULATION){
  25845. + *tag++ = MFIE_TYPE_RATES;
  25846. + *tag++ = 7;
  25847. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
  25848. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
  25849. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
  25850. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
  25851. + //added for basic rate set
  25852. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
  25853. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
  25854. + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
  25855. + }
  25856. +
  25857. + /* We may add an option for custom rates that specific HW might support */
  25858. + *tag_p = tag;
  25859. +}
  25860. +
  25861. +void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
  25862. +{
  25863. + u8 *tag = *tag_p;
  25864. +
  25865. + if (ieee->modulation & IEEE80211_OFDM_MODULATION){
  25866. +
  25867. + *tag++ = MFIE_TYPE_RATES_EX;
  25868. + *tag++ = 5;
  25869. + *tag++ = IEEE80211_OFDM_RATE_9MB;
  25870. + *tag++ = IEEE80211_OFDM_RATE_18MB;
  25871. + *tag++ = IEEE80211_OFDM_RATE_36MB;
  25872. + *tag++ = IEEE80211_OFDM_RATE_48MB;
  25873. + *tag++ = IEEE80211_OFDM_RATE_54MB;
  25874. +
  25875. + }
  25876. +
  25877. + /* We may add an option for custom rates that specific HW might support */
  25878. + *tag_p = tag;
  25879. +}
  25880. +
  25881. +
  25882. +void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p) {
  25883. + u8 *tag = *tag_p;
  25884. +
  25885. + *tag++ = MFIE_TYPE_GENERIC; //0
  25886. + *tag++ = 7;
  25887. + *tag++ = 0x00;
  25888. + *tag++ = 0x50;
  25889. + *tag++ = 0xf2;
  25890. + *tag++ = 0x02;//5
  25891. + *tag++ = 0x00;
  25892. + *tag++ = 0x01;
  25893. +#ifdef SUPPORT_USPD
  25894. + if(ieee->current_network.wmm_info & 0x80) {
  25895. + *tag++ = 0x0f|MAX_SP_Len;
  25896. + } else {
  25897. + *tag++ = MAX_SP_Len;
  25898. + }
  25899. +#else
  25900. + *tag++ = MAX_SP_Len;
  25901. +#endif
  25902. + *tag_p = tag;
  25903. +}
  25904. +
  25905. +#ifdef THOMAS_TURBO
  25906. +void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p) {
  25907. + u8 *tag = *tag_p;
  25908. +
  25909. + *tag++ = MFIE_TYPE_GENERIC; //0
  25910. + *tag++ = 7;
  25911. + *tag++ = 0x00;
  25912. + *tag++ = 0xe0;
  25913. + *tag++ = 0x4c;
  25914. + *tag++ = 0x01;//5
  25915. + *tag++ = 0x02;
  25916. + *tag++ = 0x11;
  25917. + *tag++ = 0x00;
  25918. +
  25919. + *tag_p = tag;
  25920. + printk(KERN_ALERT "This is enable turbo mode IE process\n");
  25921. +}
  25922. +#endif
  25923. +
  25924. +void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
  25925. +{
  25926. + int nh;
  25927. + nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
  25928. +
  25929. +/*
  25930. + * if the queue is full but we have newer frames then
  25931. + * just overwrites the oldest.
  25932. + *
  25933. + * if (nh == ieee->mgmt_queue_tail)
  25934. + * return -1;
  25935. + */
  25936. + ieee->mgmt_queue_head = nh;
  25937. + ieee->mgmt_queue_ring[nh] = skb;
  25938. +
  25939. + //return 0;
  25940. +}
  25941. +
  25942. +struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
  25943. +{
  25944. + struct sk_buff *ret;
  25945. +
  25946. + if(ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
  25947. + return NULL;
  25948. +
  25949. + ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
  25950. +
  25951. + ieee->mgmt_queue_tail =
  25952. + (ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
  25953. +
  25954. + return ret;
  25955. +}
  25956. +
  25957. +void init_mgmt_queue(struct ieee80211_device *ieee)
  25958. +{
  25959. + ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
  25960. +}
  25961. +
  25962. +
  25963. +void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
  25964. +
  25965. +inline void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
  25966. +{
  25967. + unsigned long flags;
  25968. + short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
  25969. + struct ieee80211_hdr_3addr *header=
  25970. + (struct ieee80211_hdr_3addr *) skb->data;
  25971. +
  25972. +
  25973. + spin_lock_irqsave(&ieee->lock, flags);
  25974. +
  25975. + /* called with 2nd param 0, no mgmt lock required */
  25976. + ieee80211_sta_wakeup(ieee,0);
  25977. +
  25978. + if(single){
  25979. + if(ieee->queue_stop){
  25980. +
  25981. + enqueue_mgmt(ieee,skb);
  25982. + }else{
  25983. + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
  25984. +
  25985. + if (ieee->seq_ctrl[0] == 0xFFF)
  25986. + ieee->seq_ctrl[0] = 0;
  25987. + else
  25988. + ieee->seq_ctrl[0]++;
  25989. +
  25990. + /* avoid watchdog triggers */
  25991. + ieee->dev->trans_start = jiffies;
  25992. + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
  25993. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
  25994. +// dev_kfree_skb_any(skb);//edit by thomas //'cause this function will cause Oops called in interrupt context in old version 101907
  25995. +#endif
  25996. + }
  25997. +
  25998. + spin_unlock_irqrestore(&ieee->lock, flags);
  25999. + }else{
  26000. + spin_unlock_irqrestore(&ieee->lock, flags);
  26001. + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
  26002. +
  26003. + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
  26004. +
  26005. + if (ieee->seq_ctrl[0] == 0xFFF)
  26006. + ieee->seq_ctrl[0] = 0;
  26007. + else
  26008. + ieee->seq_ctrl[0]++;
  26009. +
  26010. + ieee->softmac_hard_start_xmit(skb,ieee->dev);
  26011. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
  26012. +// dev_kfree_skb_any(skb);//edit by thomas
  26013. +#endif
  26014. + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
  26015. + }
  26016. +}
  26017. +
  26018. +
  26019. +inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
  26020. +{
  26021. +
  26022. + short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
  26023. + struct ieee80211_hdr_3addr *header =
  26024. + (struct ieee80211_hdr_3addr *) skb->data;
  26025. +
  26026. +
  26027. + if(single){
  26028. +
  26029. + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
  26030. +
  26031. + if (ieee->seq_ctrl[0] == 0xFFF)
  26032. + ieee->seq_ctrl[0] = 0;
  26033. + else
  26034. + ieee->seq_ctrl[0]++;
  26035. +
  26036. + /* avoid watchdog triggers */
  26037. + ieee->dev->trans_start = jiffies;
  26038. + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
  26039. +
  26040. + }else{
  26041. +
  26042. + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
  26043. +
  26044. + if (ieee->seq_ctrl[0] == 0xFFF)
  26045. + ieee->seq_ctrl[0] = 0;
  26046. + else
  26047. + ieee->seq_ctrl[0]++;
  26048. +
  26049. + ieee->softmac_hard_start_xmit(skb,ieee->dev);
  26050. +
  26051. + }
  26052. + dev_kfree_skb_any(skb);//edit by thomas
  26053. +}
  26054. +
  26055. +inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
  26056. +{
  26057. + unsigned int len,rate_len;
  26058. + u8 *tag;
  26059. + struct sk_buff *skb;
  26060. + struct ieee80211_probe_request *req;
  26061. +
  26062. +#ifdef _RTL8187_EXT_PATCH_
  26063. + short extMore = 0;
  26064. + if(ieee->ext_patch_ieee80211_probe_req_1)
  26065. + extMore = ieee->ext_patch_ieee80211_probe_req_1(ieee);
  26066. +#endif
  26067. +
  26068. + len = ieee->current_network.ssid_len;
  26069. +
  26070. + rate_len = ieee80211_MFIE_rate_len(ieee);
  26071. +
  26072. +#ifdef _RTL8187_EXT_PATCH_
  26073. + if(!extMore)
  26074. +#endif
  26075. + skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
  26076. + 2 + len + rate_len);
  26077. +#ifdef _RTL8187_EXT_PATCH_
  26078. + else
  26079. + skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
  26080. + 2 + len + rate_len+128); // MESHID + CAP
  26081. +#endif
  26082. +
  26083. + if (!skb)
  26084. + return NULL;
  26085. +
  26086. + req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
  26087. + req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  26088. + req->header.duration_id = 0; //FIXME: is this OK ?
  26089. +
  26090. + memset(req->header.addr1, 0xff, ETH_ALEN);
  26091. + memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  26092. + memset(req->header.addr3, 0xff, ETH_ALEN);
  26093. +
  26094. + tag = (u8 *) skb_put(skb,len+2+rate_len);
  26095. +
  26096. + *tag++ = MFIE_TYPE_SSID;
  26097. + *tag++ = len;
  26098. + memcpy(tag, ieee->current_network.ssid, len);
  26099. + tag += len;
  26100. +
  26101. + ieee80211_MFIE_Brate(ieee,&tag);
  26102. + ieee80211_MFIE_Grate(ieee,&tag);
  26103. +
  26104. +#ifdef _RTL8187_EXT_PATCH_
  26105. + if(extMore)
  26106. + ieee->ext_patch_ieee80211_probe_req_2(ieee, skb, tag);
  26107. +#endif
  26108. + return skb;
  26109. +}
  26110. +
  26111. +struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
  26112. +
  26113. +#ifdef _RTL8187_EXT_PATCH_
  26114. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  26115. +void ext_ieee80211_send_beacon_wq(struct work_struct *work)
  26116. +{
  26117. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ext_send_beacon_wq);
  26118. +#else
  26119. +void ext_ieee80211_send_beacon_wq(struct ieee80211_device *ieee)
  26120. +{
  26121. +#endif
  26122. +
  26123. + struct sk_buff *skb;
  26124. +
  26125. + //unsigned long flags;
  26126. +// printk("=========>%s()\n", __FUNCTION__);
  26127. + skb = ieee80211_get_beacon_(ieee);
  26128. +
  26129. + if (skb){
  26130. + softmac_mgmt_xmit(skb, ieee);
  26131. + ieee->softmac_stats.tx_beacons++;
  26132. + dev_kfree_skb_any(skb);//edit by thomas
  26133. + }
  26134. +
  26135. +
  26136. + //printk(KERN_WARNING "[1] beacon sending!\n");
  26137. +// ieee->beacon_timer.expires = jiffies +
  26138. +// (MSECS( ieee->current_network.beacon_interval -5));
  26139. +
  26140. + //spin_lock_irqsave(&ieee->beacon_lock,flags);
  26141. +// if(ieee->beacon_txing)
  26142. +// add_timer(&ieee->beacon_timer);
  26143. + //spin_unlock_irqrestore(&ieee->beacon_lock,flags);
  26144. +}
  26145. +#endif
  26146. +
  26147. +void ieee80211_send_beacon(struct ieee80211_device *ieee)
  26148. +{
  26149. + struct sk_buff *skb;
  26150. +
  26151. + //unsigned long flags;
  26152. +// printk("=========>%s()\n", __FUNCTION__);
  26153. + skb = ieee80211_get_beacon_(ieee);
  26154. +
  26155. + if (skb){
  26156. + softmac_mgmt_xmit(skb, ieee);
  26157. + ieee->softmac_stats.tx_beacons++;
  26158. + dev_kfree_skb_any(skb);//edit by thomas
  26159. + }
  26160. +
  26161. +
  26162. + //printk(KERN_WARNING "[1] beacon sending!\n");
  26163. + ieee->beacon_timer.expires = jiffies +
  26164. + (MSECS( ieee->current_network.beacon_interval -5));
  26165. +
  26166. + //spin_lock_irqsave(&ieee->beacon_lock,flags);
  26167. + if(ieee->beacon_txing)
  26168. + add_timer(&ieee->beacon_timer);
  26169. + //spin_unlock_irqrestore(&ieee->beacon_lock,flags);
  26170. +}
  26171. +
  26172. +
  26173. +void ieee80211_send_beacon_cb(unsigned long _ieee)
  26174. +{
  26175. + struct ieee80211_device *ieee =
  26176. + (struct ieee80211_device *) _ieee;
  26177. + unsigned long flags;
  26178. +
  26179. + spin_lock_irqsave(&ieee->beacon_lock, flags);
  26180. + ieee80211_send_beacon(ieee);
  26181. + spin_unlock_irqrestore(&ieee->beacon_lock, flags);
  26182. +}
  26183. +
  26184. +#ifdef _RTL8187_EXT_PATCH_
  26185. +
  26186. +inline struct sk_buff *ieee80211_probe_req_with_SSID(struct ieee80211_device *ieee, char *ssid, int len_ssid)
  26187. +{
  26188. + unsigned int len,rate_len;
  26189. + u8 *tag;
  26190. + struct sk_buff *skb;
  26191. + struct ieee80211_probe_request *req;
  26192. +
  26193. +#ifdef _RTL8187_EXT_PATCH_
  26194. + short extMore = 0;
  26195. + if(ieee->ext_patch_ieee80211_probe_req_1)
  26196. + extMore = ieee->ext_patch_ieee80211_probe_req_1(ieee);
  26197. +#endif
  26198. +
  26199. + len = len_ssid;
  26200. +
  26201. + rate_len = ieee80211_MFIE_rate_len(ieee);
  26202. +
  26203. +#ifdef _RTL8187_EXT_PATCH_
  26204. + if(!extMore)
  26205. +#endif
  26206. + skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
  26207. + 2 + len + rate_len);
  26208. +#ifdef _RTL8187_EXT_PATCH_
  26209. + else
  26210. + skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
  26211. + 2 + len + rate_len+128); // MESHID + CAP
  26212. +#endif
  26213. +
  26214. + if (!skb)
  26215. + return NULL;
  26216. +
  26217. + req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
  26218. + req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  26219. + req->header.duration_id = 0; //FIXME: is this OK ?
  26220. +
  26221. + memset(req->header.addr1, 0xff, ETH_ALEN);
  26222. + memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  26223. + memset(req->header.addr3, 0xff, ETH_ALEN);
  26224. +
  26225. + tag = (u8 *) skb_put(skb,len+2+rate_len);
  26226. +
  26227. + *tag++ = MFIE_TYPE_SSID;
  26228. + *tag++ = len;
  26229. + if(len)
  26230. + {
  26231. + memcpy(tag, ssid, len);
  26232. + tag += len;
  26233. + }
  26234. +
  26235. + ieee80211_MFIE_Brate(ieee,&tag);
  26236. + ieee80211_MFIE_Grate(ieee,&tag);
  26237. +
  26238. +#ifdef _RTL8187_EXT_PATCH_
  26239. + if(extMore)
  26240. + ieee->ext_patch_ieee80211_probe_req_2(ieee, skb, tag);
  26241. +#endif
  26242. + return skb;
  26243. +}
  26244. +
  26245. +#endif // _RTL8187_EXT_PATCH_
  26246. +
  26247. +
  26248. +void ieee80211_send_probe(struct ieee80211_device *ieee)
  26249. +{
  26250. + struct sk_buff *skb;
  26251. +
  26252. +#ifdef _RTL8187_EXT_PATCH_
  26253. + if(ieee->iw_mode == ieee->iw_ext_mode)
  26254. + skb = ieee80211_probe_req_with_SSID(ieee, NULL, 0);
  26255. + else
  26256. +#endif
  26257. + skb = ieee80211_probe_req(ieee);
  26258. + if (skb){
  26259. + softmac_mgmt_xmit(skb, ieee);
  26260. + ieee->softmac_stats.tx_probe_rq++;
  26261. + dev_kfree_skb_any(skb);//edit by thomas
  26262. + }
  26263. +}
  26264. +
  26265. +void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
  26266. +{
  26267. + if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
  26268. + ieee80211_send_probe(ieee);
  26269. + ieee80211_send_probe(ieee);
  26270. + }
  26271. +}
  26272. +
  26273. +/* this performs syncro scan blocking the caller until all channels
  26274. + * in the allowed channel map has been checked.
  26275. + */
  26276. +void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
  26277. +{
  26278. + short ch = 0;
  26279. +#ifdef ENABLE_DOT11D
  26280. + u8 channel_map[MAX_CHANNEL_NUMBER+1];
  26281. + memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
  26282. +#endif
  26283. +
  26284. +
  26285. + down(&ieee->scan_sem);
  26286. +
  26287. + while(1)
  26288. + {
  26289. +
  26290. + do{
  26291. + ch++;
  26292. + if (ch > MAX_CHANNEL_NUMBER)
  26293. + goto out; /* scan completed */
  26294. +
  26295. +#ifdef ENABLE_DOT11D
  26296. + }while(!channel_map[ch]);
  26297. +#else
  26298. + }while(!ieee->channel_map[ch]);
  26299. +#endif
  26300. +
  26301. + //printk("=>current channel is %d\n",ch);
  26302. +
  26303. + /* this fuction can be called in two situations
  26304. + * 1- We have switched to ad-hoc mode and we are
  26305. + * performing a complete syncro scan before conclude
  26306. + * there are no interesting cell and to create a
  26307. + * new one. In this case the link state is
  26308. + * IEEE80211_NOLINK until we found an interesting cell.
  26309. + * If so the ieee8021_new_net, called by the RX path
  26310. + * will set the state to IEEE80211_LINKED, so we stop
  26311. + * scanning
  26312. + * 2- We are linked and the root uses run iwlist scan.
  26313. + * So we switch to IEEE80211_LINKED_SCANNING to remember
  26314. + * that we are still logically linked (not interested in
  26315. + * new network events, despite for updating the net list,
  26316. + * but we are temporarly 'unlinked' as the driver shall
  26317. + * not filter RX frames and the channel is changing.
  26318. + * So the only situation in witch are interested is to check
  26319. + * if the state become LINKED because of the #1 situation
  26320. + */
  26321. +
  26322. + if (ieee->state == IEEE80211_LINKED)
  26323. + goto out;
  26324. +
  26325. + //printk("---->%s: chan %d\n", __func__, ch);
  26326. + ieee->set_chan(ieee->dev, ch);
  26327. +#ifdef ENABLE_DOT11D
  26328. + if(channel_map[ch] == 1)
  26329. +#endif
  26330. + {
  26331. + ieee80211_send_probe_requests(ieee);
  26332. + }
  26333. +
  26334. + /* this prevent excessive time wait when we
  26335. + * need to wait for a syncro scan to end..
  26336. + */
  26337. + if (ieee->sync_scan_hurryup)
  26338. + goto out;
  26339. +
  26340. +
  26341. + msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
  26342. +
  26343. + }
  26344. +out:
  26345. + ieee->sync_scan_hurryup = 0;
  26346. + up(&ieee->scan_sem);
  26347. +#ifdef ENABLE_DOT11D
  26348. + if(IS_DOT11D_ENABLE(ieee))
  26349. + DOT11D_ScanComplete(ieee);
  26350. +#endif
  26351. +
  26352. +}
  26353. +
  26354. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
  26355. +/* called both by wq with ieee->lock held */
  26356. +void ieee80211_softmac_scan(struct ieee80211_device *ieee)
  26357. +{
  26358. +#if 0
  26359. + short watchdog = 0;
  26360. + do{
  26361. + ieee->current_network.channel =
  26362. + (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
  26363. + if (watchdog++ > MAX_CHANNEL_NUMBER)
  26364. + return; /* no good chans */
  26365. +
  26366. + }while(!ieee->channel_map[ieee->current_network.channel]);
  26367. +#endif
  26368. +
  26369. + schedule_task(&ieee->softmac_scan_wq);
  26370. +}
  26371. +#endif
  26372. +
  26373. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  26374. +void ieee80211_softmac_scan_wq(struct work_struct *work)
  26375. +{
  26376. + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
  26377. + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
  26378. +#else
  26379. +void ieee80211_softmac_scan_wq(struct ieee80211_device *ieee)
  26380. +{
  26381. +#endif
  26382. + //static short watchdog = 0;
  26383. + //short watchdog = 0;//lzm move into ieee->scan_watchdog 081215 for roaming
  26384. + u8 channel_bak = ieee->current_network.channel;//lzm for channel+1
  26385. +#ifdef ENABLE_DOT11D
  26386. + u8 channel_map[MAX_CHANNEL_NUMBER+1];
  26387. + memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
  26388. +#endif
  26389. + down(&ieee->scan_sem);
  26390. +
  26391. + do{
  26392. + ieee->current_network.channel =
  26393. + (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
  26394. + if (ieee->scan_watchdog++ > MAX_CHANNEL_NUMBER)
  26395. + goto out; /* no good chans */
  26396. +#ifdef ENABLE_DOT11D
  26397. + }while(!channel_map[ieee->current_network.channel]);
  26398. +#else
  26399. + }while(!ieee->channel_map[ieee->current_network.channel]);
  26400. +#endif
  26401. +
  26402. + if (ieee->scanning == 0 )
  26403. + goto out;
  26404. +
  26405. + //printk("current channel is %d\n",ieee->current_network.channel);
  26406. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  26407. +#ifdef ENABLE_DOT11D
  26408. + if(channel_map[ieee->current_network.channel] == 1)
  26409. +#endif
  26410. + {
  26411. + ieee80211_send_probe_requests(ieee);
  26412. + }
  26413. +
  26414. +
  26415. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  26416. + queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
  26417. +#else
  26418. + ieee->scan_timer.expires = jiffies + (IEEE80211_SOFTMAC_SCAN_TIME);
  26419. + if (ieee->scanning == 1)
  26420. + add_timer(&ieee->scan_timer);
  26421. +#endif
  26422. +
  26423. + up(&ieee->scan_sem);
  26424. + return;
  26425. +out:
  26426. + //printk("%s():Stop scan now\n",__FUNCTION__);
  26427. + ieee->actscanning = false;
  26428. + ieee->scan_watchdog = 0;
  26429. + ieee->scanning = 0;
  26430. + ieee->current_network.channel = channel_bak;
  26431. + up(&ieee->scan_sem);
  26432. +#ifdef ENABLE_DOT11D
  26433. + if(IS_DOT11D_ENABLE(ieee))
  26434. + DOT11D_ScanComplete(ieee);
  26435. +#endif
  26436. +
  26437. + return;
  26438. +}
  26439. +
  26440. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
  26441. +void ieee80211_softmac_scan_cb(unsigned long _dev)
  26442. +{
  26443. + unsigned long flags;
  26444. + struct ieee80211_device *ieee = (struct ieee80211_device *)_dev;
  26445. +
  26446. + spin_lock_irqsave(&ieee->lock, flags);
  26447. + ieee80211_softmac_scan(ieee);
  26448. + spin_unlock_irqrestore(&ieee->lock, flags);
  26449. +}
  26450. +#endif
  26451. +
  26452. +
  26453. +void ieee80211_beacons_start(struct ieee80211_device *ieee)
  26454. +{
  26455. + unsigned long flags;
  26456. +
  26457. + spin_lock_irqsave(&ieee->beacon_lock,flags);
  26458. +
  26459. + ieee->beacon_txing = 1;
  26460. + ieee80211_send_beacon(ieee);
  26461. +
  26462. + spin_unlock_irqrestore(&ieee->beacon_lock,flags);
  26463. +}
  26464. +
  26465. +void ieee80211_beacons_stop(struct ieee80211_device *ieee)
  26466. +{
  26467. + unsigned long flags;
  26468. +
  26469. + spin_lock_irqsave(&ieee->beacon_lock,flags);
  26470. +
  26471. + ieee->beacon_txing = 0;
  26472. + del_timer_sync(&ieee->beacon_timer);
  26473. +
  26474. + spin_unlock_irqrestore(&ieee->beacon_lock,flags);
  26475. +
  26476. +}
  26477. +
  26478. +
  26479. +void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
  26480. +{
  26481. + if(ieee->stop_send_beacons)
  26482. + ieee->stop_send_beacons(ieee->dev);
  26483. + if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
  26484. + ieee80211_beacons_stop(ieee);
  26485. +}
  26486. +
  26487. +
  26488. +void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
  26489. +{
  26490. + if(ieee->start_send_beacons)
  26491. + ieee->start_send_beacons(ieee->dev);
  26492. + if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
  26493. + ieee80211_beacons_start(ieee);
  26494. +}
  26495. +
  26496. +
  26497. +void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
  26498. +{
  26499. +// unsigned long flags;
  26500. +
  26501. + ieee->sync_scan_hurryup = 1;
  26502. +
  26503. + down(&ieee->scan_sem);
  26504. +// spin_lock_irqsave(&ieee->lock, flags);
  26505. +
  26506. + if (ieee->scanning == 1){
  26507. + //printk("%s():Stop scan now\n",__FUNCTION__);
  26508. + ieee->scanning = 0;
  26509. + //lzm add for softmac_scan_wq can't return from out
  26510. + //example: rcv probe_response
  26511. + ieee->scan_watchdog = 0;//lzm add 081215 for roaming
  26512. + ieee->actscanning = false;
  26513. +
  26514. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  26515. + cancel_delayed_work(&ieee->softmac_scan_wq);
  26516. +#else
  26517. + del_timer_sync(&ieee->scan_timer);
  26518. +#endif
  26519. + }
  26520. +
  26521. +// spin_unlock_irqrestore(&ieee->lock, flags);
  26522. + up(&ieee->scan_sem);
  26523. +}
  26524. +
  26525. +void ieee80211_stop_scan(struct ieee80211_device *ieee)
  26526. +{
  26527. + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
  26528. + ieee80211_softmac_stop_scan(ieee);
  26529. + else
  26530. + ieee->stop_scan(ieee->dev);
  26531. +}
  26532. +
  26533. +/* called with ieee->lock held */
  26534. +void ieee80211_start_scan(struct ieee80211_device *ieee)
  26535. +{
  26536. + ieee->actscanning = true;
  26537. +#ifdef CONFIG_IPS
  26538. + ieee->ieee80211_ips_leave(ieee->dev);
  26539. +#endif
  26540. +
  26541. +#ifdef ENABLE_DOT11D
  26542. + if(IS_DOT11D_ENABLE(ieee) )
  26543. + {
  26544. + if(IS_COUNTRY_IE_VALID(ieee))
  26545. + {
  26546. + RESET_CIE_WATCHDOG(ieee);
  26547. + }
  26548. + }
  26549. +#endif
  26550. +
  26551. + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
  26552. + if (ieee->scanning == 0){
  26553. + ieee->scanning = 1;
  26554. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  26555. + queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq,0);
  26556. +#else
  26557. + ieee80211_softmac_scan(ieee);
  26558. +#endif
  26559. + }
  26560. + }else
  26561. + ieee->start_scan(ieee->dev);
  26562. +
  26563. +}
  26564. +
  26565. +/* called with wx_sem held */
  26566. +void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
  26567. +{
  26568. + //printk("====>%s()\n", __func__);
  26569. +#ifdef CONFIG_IPS
  26570. + ieee->ieee80211_ips_leave(ieee->dev);
  26571. +#endif
  26572. + ieee->actscanning = true;
  26573. +
  26574. +#ifdef ENABLE_DOT11D
  26575. + if(IS_DOT11D_ENABLE(ieee) )
  26576. + {
  26577. + if(IS_COUNTRY_IE_VALID(ieee))
  26578. + {
  26579. + RESET_CIE_WATCHDOG(ieee);
  26580. + }
  26581. + }
  26582. +#endif
  26583. +
  26584. + ieee->sync_scan_hurryup = 0;
  26585. +
  26586. + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
  26587. + ieee80211_softmac_scan_syncro(ieee);
  26588. + else
  26589. + ieee->scan_syncro(ieee->dev);
  26590. +
  26591. + ieee->actscanning = false;
  26592. + //printk("<====%s()\n", __func__);
  26593. +}
  26594. +
  26595. +inline struct sk_buff *ieee80211_authentication_req(struct ieee80211_network *beacon,
  26596. + struct ieee80211_device *ieee, int challengelen)
  26597. +{
  26598. + struct sk_buff *skb;
  26599. + struct ieee80211_authentication *auth;
  26600. +
  26601. + skb = dev_alloc_skb(sizeof(struct ieee80211_authentication) + challengelen);
  26602. +
  26603. + if (!skb) return NULL;
  26604. +
  26605. + auth = (struct ieee80211_authentication *)
  26606. + skb_put(skb, sizeof(struct ieee80211_authentication));
  26607. +
  26608. + auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
  26609. + if (challengelen) auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
  26610. +
  26611. + auth->header.duration_id = 0x013a; //FIXME
  26612. +
  26613. + memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
  26614. + memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  26615. + memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
  26616. +
  26617. + auth->algorithm = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
  26618. +
  26619. + auth->transaction = cpu_to_le16(ieee->associate_seq);
  26620. + ieee->associate_seq++;
  26621. +
  26622. + auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
  26623. +
  26624. + return skb;
  26625. +
  26626. +}
  26627. +
  26628. +u8 WPA_OUI[3] = {0x00, 0x50, 0xf2};
  26629. +
  26630. +static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *dest)
  26631. +{
  26632. + u8 *tag;
  26633. + int beacon_size;
  26634. + struct ieee80211_probe_response *beacon_buf;
  26635. + struct sk_buff *skb;
  26636. + int encrypt;
  26637. + int atim_len,erp_len;
  26638. + struct ieee80211_crypt_data* crypt;
  26639. +
  26640. + char *ssid = ieee->current_network.ssid;
  26641. + int ssid_len = ieee->current_network.ssid_len;
  26642. + int rate_len = ieee->current_network.rates_len+2;
  26643. + int rate_ex_len = ieee->current_network.rates_ex_len;
  26644. +
  26645. + int wpa_ie_len = 0, wpa_type=0;
  26646. + if(rate_ex_len > 0) rate_ex_len+=2;
  26647. +
  26648. + if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
  26649. + atim_len = 4;
  26650. + else
  26651. + atim_len = 0;
  26652. +
  26653. + if(ieee80211_is_54g(ieee->current_network))
  26654. + erp_len = 3;
  26655. + else
  26656. + erp_len = 0;
  26657. + if (ieee->wpa_enabled)
  26658. + {
  26659. + // printk("hoho wpa_enalbe\n");
  26660. + wpa_ie_len = ieee->wpa_ie_len; //24-2
  26661. + }
  26662. + beacon_size = sizeof(struct ieee80211_probe_response)+
  26663. + ssid_len
  26664. + +3 //channel
  26665. + +rate_len
  26666. + +rate_ex_len
  26667. + +atim_len
  26668. + +erp_len
  26669. + +wpa_ie_len;
  26670. +
  26671. + skb = dev_alloc_skb(beacon_size);
  26672. +
  26673. + if (!skb)
  26674. + return NULL;
  26675. +
  26676. + beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, beacon_size);
  26677. +
  26678. + memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
  26679. + memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  26680. + memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
  26681. +
  26682. + beacon_buf->header.duration_id = 0; //FIXME
  26683. + beacon_buf->beacon_interval =
  26684. + cpu_to_le16(ieee->current_network.beacon_interval);
  26685. + beacon_buf->capability =
  26686. + cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
  26687. +
  26688. + if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
  26689. + cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT));
  26690. +#ifdef _RTL8187_EXT_PATCH_
  26691. +{
  26692. +/* struct ieee80211_crypt_data_list* cryptlist = ieee->cryptlist[1];
  26693. + u8 i = cryptlist->used;
  26694. + crypt = cryptlist ->crypt[ieee->tx_keyidx];
  26695. +*/
  26696. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  26697. +}
  26698. +#else
  26699. +
  26700. + crypt = ieee->crypt[ieee->tx_keyidx];
  26701. +#endif
  26702. + if (crypt)
  26703. + wpa_type = strcmp(crypt->ops->name, "TKIP");
  26704. +
  26705. +
  26706. + encrypt = ieee->host_encrypt && crypt && crypt->ops &&
  26707. + ((0 == strcmp(crypt->ops->name, "WEP")||wpa_ie_len));
  26708. +
  26709. + if (encrypt)
  26710. + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
  26711. +
  26712. +
  26713. + beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
  26714. +
  26715. + beacon_buf->info_element.id = MFIE_TYPE_SSID;
  26716. + beacon_buf->info_element.len = ssid_len;
  26717. +
  26718. + tag = (u8*) beacon_buf->info_element.data;
  26719. +
  26720. + memcpy(tag, ssid, ssid_len);
  26721. +
  26722. + tag += ssid_len;
  26723. +
  26724. + *(tag++) = MFIE_TYPE_RATES;
  26725. + *(tag++) = rate_len-2;
  26726. + memcpy(tag,ieee->current_network.rates,rate_len-2);
  26727. + tag+=rate_len-2;
  26728. +
  26729. + *(tag++) = MFIE_TYPE_DS_SET;
  26730. + *(tag++) = 1;
  26731. + *(tag++) = ieee->current_network.channel;
  26732. +
  26733. + if(atim_len){
  26734. + u16 val16;
  26735. + *(tag++) = MFIE_TYPE_IBSS_SET;
  26736. + *(tag++) = 2;
  26737. + val16 = cpu_to_le16(ieee->current_network.atim_window);
  26738. + //*((u16*)(tag)) = cpu_to_le16(ieee->current_network.atim_window);
  26739. + memcpy((u8 *)tag,(u8 *)&val16,2);
  26740. + tag+=2;
  26741. + }
  26742. +
  26743. + if(erp_len){
  26744. + *(tag++) = MFIE_TYPE_ERP;
  26745. + *(tag++) = 1;
  26746. + *(tag++) = 0;
  26747. + }
  26748. +
  26749. + if(rate_ex_len){
  26750. + *(tag++) = MFIE_TYPE_RATES_EX;
  26751. + *(tag++) = rate_ex_len-2;
  26752. + memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
  26753. + tag+=rate_ex_len-2;
  26754. + }
  26755. + if (wpa_ie_len)
  26756. + {
  26757. +#if 0
  26758. + *(tag++) = 0xdd;
  26759. + *(tag++) = wpa_ie_len-2;
  26760. + memcpy(tag, WPA_OUI, 3);
  26761. + tag += 3;
  26762. + *(tag++) = 1;
  26763. + *(tag++) = 1;
  26764. + *(tag++) = 0;
  26765. +
  26766. + memcpy(tag, WPA_OUI, 3);
  26767. + tag += 3;
  26768. + *(tag++) = wpa_type ? 4:2;
  26769. + *(tag++) = 1;
  26770. + *(tag++) = 0;
  26771. +
  26772. +
  26773. + memcpy(tag, WPA_OUI, 3);
  26774. + tag += 3;
  26775. + *(tag++) = wpa_type ? 4:0;
  26776. + *(tag++) = 1;
  26777. + *(tag++) = 0;
  26778. +
  26779. + memcpy(tag, WPA_OUI, 3);
  26780. + tag += 3;
  26781. + *(tag++) = 0;
  26782. +#else
  26783. + if (ieee->iw_mode == IW_MODE_ADHOC)
  26784. + {//as Windows will set pairwise key same as the group key which is not allowed in Linux, so set this for IOT issue. WB 2008.07.07
  26785. + memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
  26786. + }
  26787. +
  26788. + memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
  26789. +
  26790. +#endif
  26791. + }
  26792. +
  26793. +
  26794. + skb->dev = ieee->dev;
  26795. + return skb;
  26796. +}
  26797. +
  26798. +
  26799. +#ifdef _RTL8187_EXT_PATCH_
  26800. +struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net)
  26801. +{
  26802. + u8 *tag;
  26803. + int beacon_size;
  26804. + struct ieee80211_probe_response *beacon_buf;
  26805. + struct sk_buff *skb;
  26806. + int encrypt;
  26807. + int atim_len,erp_len;
  26808. + struct ieee80211_crypt_data* crypt;
  26809. + u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
  26810. +
  26811. + char *ssid = net->ssid;
  26812. + int ssid_len = net->ssid_len;
  26813. +
  26814. + int rate_len = ieee->current_network.rates_len+2;
  26815. + int rate_ex_len = ieee->current_network.rates_ex_len;
  26816. + int wpa_ie_len = 0, wpa_type=0;
  26817. + if(rate_ex_len > 0) rate_ex_len+=2;
  26818. +
  26819. + if( ieee->meshScanMode&4)
  26820. + ieee->current_network.channel = ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee);
  26821. + if( ieee->meshScanMode&6)
  26822. + {
  26823. +
  26824. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  26825. + queue_work(ieee->wq, &ieee->ext_stop_scan_wq);
  26826. +#else
  26827. + schedule_task(&ieee->ext_stop_scan_wq);
  26828. +#endif
  26829. + }
  26830. + if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS) // use current_network here
  26831. + atim_len = 4;
  26832. + else
  26833. + atim_len = 0;
  26834. +
  26835. + if(ieee80211_is_54g(*net))
  26836. + erp_len = 3;
  26837. + else
  26838. + erp_len = 0;
  26839. +
  26840. + if (ieee->wpa_enabled &&(ieee->iw_ext_mode==ieee->iw_mode))
  26841. + {
  26842. +// printk("hoho wpa_enalbe\n");
  26843. + wpa_ie_len = ieee->wpa_ie_len; //24-2
  26844. + }
  26845. +
  26846. + beacon_size = sizeof(struct ieee80211_probe_response)+
  26847. + ssid_len
  26848. + +3 //channel
  26849. + +rate_len
  26850. + +rate_ex_len
  26851. + +atim_len
  26852. + +erp_len
  26853. + +wpa_ie_len;
  26854. +//b
  26855. + skb = dev_alloc_skb(beacon_size+196);
  26856. +
  26857. + if (!skb)
  26858. + return NULL;
  26859. +
  26860. + beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, beacon_size);
  26861. +
  26862. + memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
  26863. + memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  26864. + memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
  26865. +
  26866. + beacon_buf->header.duration_id = 0; //FIXME
  26867. +
  26868. + beacon_buf->beacon_interval =
  26869. + cpu_to_le16(ieee->current_network.beacon_interval); // use current_network here
  26870. + beacon_buf->capability =
  26871. + cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
  26872. +
  26873. + if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
  26874. + cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT));
  26875. +#ifdef _RTL8187_EXT_PATCH_
  26876. +
  26877. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  26878. +#else
  26879. +
  26880. + crypt = ieee->crypt[ieee->tx_keyidx];
  26881. +#endif
  26882. +
  26883. +// crypt = ieee->crypt[ieee->tx_keyidx];
  26884. + if (crypt)
  26885. + wpa_type = strcmp(crypt->ops->name, "TKIP");
  26886. +
  26887. + encrypt = ieee->host_encrypt && crypt && crypt->ops &&
  26888. + ((0 == strcmp(crypt->ops->name, "WEP")||wpa_ie_len));
  26889. +
  26890. + if (encrypt)
  26891. + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
  26892. +
  26893. +
  26894. + beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
  26895. +
  26896. + beacon_buf->info_element.id = MFIE_TYPE_SSID;
  26897. + beacon_buf->info_element.len = ssid_len;
  26898. +
  26899. + tag = (u8*) beacon_buf->info_element.data;
  26900. +
  26901. + // brocad cast / probe rsp
  26902. + if(memcmp(dest, broadcast_addr, ETH_ALEN ))
  26903. + memcpy(tag, ssid, ssid_len);
  26904. + else
  26905. + ssid_len=0;
  26906. +
  26907. + tag += ssid_len;
  26908. +
  26909. +//get_bssrate_set(priv, _SUPPORTEDRATES_IE_, &pbssrate, &bssrate_len);
  26910. +//pbuf = set_ie(pbuf, _SUPPORTEDRATES_IE_, bssrate_len, pbssrate, &frlen);
  26911. +
  26912. + *(tag++) = MFIE_TYPE_RATES;
  26913. + *(tag++) = rate_len-2;
  26914. + memcpy(tag,ieee->current_network.rates,rate_len-2);
  26915. + tag+=rate_len-2;
  26916. +
  26917. + *(tag++) = MFIE_TYPE_DS_SET;
  26918. + *(tag++) = 1;
  26919. + *(tag++) = ieee->current_network.channel; // use current_network here
  26920. +
  26921. +
  26922. + if(atim_len){
  26923. + *(tag++) = MFIE_TYPE_IBSS_SET;
  26924. + *(tag++) = 2;
  26925. + *((u16*)(tag)) = cpu_to_le16(ieee->current_network.atim_window); // use current_network here
  26926. + tag+=2;
  26927. + }
  26928. +
  26929. + if(erp_len){
  26930. + *(tag++) = MFIE_TYPE_ERP;
  26931. + *(tag++) = 1;
  26932. + *(tag++) = 0;
  26933. + }
  26934. +
  26935. + if(rate_ex_len){
  26936. + *(tag++) = MFIE_TYPE_RATES_EX;
  26937. + *(tag++) = rate_ex_len-2;
  26938. + memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
  26939. + tag+=rate_ex_len-2;
  26940. + }
  26941. +
  26942. + if (wpa_ie_len)
  26943. + {
  26944. +#if 0
  26945. + *(tag++) = 0xdd;
  26946. + *(tag++) = wpa_ie_len-2;
  26947. + memcpy(tag, WPA_OUI, 3);
  26948. + tag += 3;
  26949. + *(tag++) = 1;
  26950. + *(tag++) = 1;
  26951. + *(tag++) = 0;
  26952. +
  26953. + memcpy(tag, WPA_OUI, 3);
  26954. + tag += 3;
  26955. + *(tag++) = wpa_type ? 4:2;
  26956. + *(tag++) = 1;
  26957. + *(tag++) = 0;
  26958. +
  26959. +
  26960. + memcpy(tag, WPA_OUI, 3);
  26961. + tag += 3;
  26962. + *(tag++) = wpa_type ? 4:0;
  26963. + *(tag++) = 1;
  26964. + *(tag++) = 0;
  26965. +
  26966. + memcpy(tag, WPA_OUI, 3);
  26967. + tag += 3;
  26968. + *(tag++) = 0;
  26969. +#else
  26970. + memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
  26971. +#endif
  26972. + }
  26973. +
  26974. +
  26975. + skb->dev = ieee->dev;
  26976. + return skb;
  26977. +}
  26978. +#endif // _RTL8187_EXT_PATCH_
  26979. +
  26980. +
  26981. +struct sk_buff* ieee80211_assoc_resp(struct ieee80211_device *ieee, u8 *dest)
  26982. +{
  26983. + struct sk_buff *skb;
  26984. + u8* tag;
  26985. +
  26986. + struct ieee80211_crypt_data* crypt;
  26987. + struct ieee80211_assoc_response_frame *assoc;
  26988. + short encrypt;
  26989. +
  26990. + unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
  26991. + int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
  26992. +
  26993. + skb = dev_alloc_skb(len);
  26994. +
  26995. + if (!skb)
  26996. + return NULL;
  26997. +
  26998. + assoc = (struct ieee80211_assoc_response_frame *)
  26999. + skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
  27000. +
  27001. + assoc->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
  27002. + memcpy(assoc->header.addr1, dest,ETH_ALEN);
  27003. + memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
  27004. + memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  27005. + assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
  27006. + WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
  27007. +
  27008. +
  27009. + if(ieee->short_slot)
  27010. + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
  27011. +
  27012. + if (ieee->host_encrypt){
  27013. +#ifdef _RTL8187_EXT_PATCH_
  27014. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  27015. +#else
  27016. + crypt = ieee->crypt[ieee->tx_keyidx];
  27017. +#endif
  27018. + }
  27019. + else crypt = NULL;
  27020. +
  27021. + encrypt = ( crypt && crypt->ops);
  27022. +
  27023. + if (encrypt)
  27024. + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
  27025. +
  27026. + assoc->status = 0;
  27027. + assoc->aid = cpu_to_le16(ieee->assoc_id);
  27028. + if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
  27029. + else ieee->assoc_id++;
  27030. +
  27031. + tag = (u8*) skb_put(skb, rate_len);
  27032. +
  27033. + ieee80211_MFIE_Brate(ieee, &tag);
  27034. + ieee80211_MFIE_Grate(ieee, &tag);
  27035. +
  27036. + return skb;
  27037. +}
  27038. +
  27039. +struct sk_buff* ieee80211_auth_resp(struct ieee80211_device *ieee,int status, u8 *dest)
  27040. +{
  27041. + struct sk_buff *skb;
  27042. + struct ieee80211_authentication *auth;
  27043. +
  27044. + skb = dev_alloc_skb(sizeof(struct ieee80211_authentication)+1);
  27045. +
  27046. + if (!skb)
  27047. + return NULL;
  27048. +
  27049. + skb->len = sizeof(struct ieee80211_authentication);
  27050. +
  27051. + auth = (struct ieee80211_authentication *)skb->data;
  27052. +
  27053. + auth->status = cpu_to_le16(status);
  27054. + auth->transaction = cpu_to_le16(2);
  27055. + auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
  27056. +
  27057. +#ifdef _RTL8187_EXT_PATCH_
  27058. + if(ieee->iw_mode == ieee->iw_ext_mode)
  27059. + memcpy(auth->header.addr3, dest, ETH_ALEN);
  27060. +#else
  27061. + memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
  27062. +#endif
  27063. + memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  27064. + memcpy(auth->header.addr1, dest, ETH_ALEN);
  27065. + auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH);
  27066. + return skb;
  27067. +
  27068. +
  27069. +}
  27070. +
  27071. +struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr)
  27072. +{
  27073. + struct sk_buff *skb;
  27074. + struct ieee80211_hdr_3addr* hdr;
  27075. +
  27076. + skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr));
  27077. +
  27078. + if (!skb)
  27079. + return NULL;
  27080. +
  27081. + hdr = (struct ieee80211_hdr_3addr*)skb_put(skb,sizeof(struct ieee80211_hdr_3addr));
  27082. +
  27083. + memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
  27084. + memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
  27085. + memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
  27086. +
  27087. + hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
  27088. + IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS |
  27089. + (pwr ? IEEE80211_FCTL_PM:0));
  27090. +
  27091. + return skb;
  27092. +
  27093. +
  27094. +}
  27095. +
  27096. +
  27097. +void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest)
  27098. +{
  27099. + struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
  27100. +
  27101. + if (buf){
  27102. + softmac_mgmt_xmit(buf, ieee);
  27103. + dev_kfree_skb_any(buf);//edit by thomas
  27104. + }
  27105. +}
  27106. +
  27107. +
  27108. +void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8* dest)
  27109. +{
  27110. + struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
  27111. +
  27112. + if (buf){
  27113. + softmac_mgmt_xmit(buf, ieee);
  27114. + dev_kfree_skb_any(buf);//edit by thomas
  27115. + }
  27116. +}
  27117. +
  27118. +
  27119. +void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
  27120. +{
  27121. +
  27122. + struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
  27123. +
  27124. + if (buf) {
  27125. + softmac_mgmt_xmit(buf, ieee);
  27126. + dev_kfree_skb_any(buf);//edit by thomas
  27127. + }
  27128. +}
  27129. +
  27130. +
  27131. +inline struct sk_buff *ieee80211_association_req(struct ieee80211_network *beacon,struct ieee80211_device *ieee)
  27132. +{
  27133. + struct sk_buff *skb;
  27134. +
  27135. + struct ieee80211_assoc_request_frame *hdr;
  27136. + u8 *tag;
  27137. + //int i;
  27138. + unsigned int wpa_len = beacon->wpa_ie_len;
  27139. +#if 1
  27140. + // for testing purpose
  27141. + unsigned int rsn_len = beacon->rsn_ie_len;
  27142. +#else
  27143. + unsigned int rsn_len = beacon->rsn_ie_len - 4;
  27144. +#endif
  27145. + unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
  27146. + unsigned int wmm_info_len = beacon->QoS_Enable?9:0;
  27147. +#ifdef THOMAS_TURBO
  27148. + unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
  27149. +#endif
  27150. +
  27151. + u8 encry_proto = ieee->wpax_type_notify & 0xff;
  27152. +
  27153. +
  27154. + int len = 0;
  27155. +
  27156. + //[0] Notify type of encryption: WPA/WPA2
  27157. + //[1] pair wise type
  27158. + //[2] authen type
  27159. + if(ieee->wpax_type_set) {
  27160. + if (IEEE_PROTO_WPA == encry_proto) {
  27161. + rsn_len = 0;
  27162. + } else if (IEEE_PROTO_RSN == encry_proto) {
  27163. + wpa_len = 0;
  27164. + }
  27165. + }
  27166. +#ifdef THOMAS_TURBO
  27167. + len = sizeof(struct ieee80211_assoc_request_frame)+
  27168. + + beacon->ssid_len//essid tagged val
  27169. + + rate_len//rates tagged val
  27170. + + wpa_len
  27171. + + rsn_len
  27172. + + wmm_info_len
  27173. + + turbo_info_len;
  27174. +#else
  27175. + len = sizeof(struct ieee80211_assoc_request_frame)+
  27176. + + beacon->ssid_len//essid tagged val
  27177. + + rate_len//rates tagged val
  27178. + + wpa_len
  27179. + + rsn_len
  27180. + + wmm_info_len;
  27181. +#endif
  27182. +
  27183. +#ifdef _RTL8187_EXT_PATCH_
  27184. + if(ieee->iw_mode == ieee->iw_ext_mode)
  27185. + skb = dev_alloc_skb(len+256); // stanley
  27186. + else
  27187. +#endif
  27188. + skb = dev_alloc_skb(len);
  27189. +
  27190. + if (!skb)
  27191. + return NULL;
  27192. +
  27193. + hdr = (struct ieee80211_assoc_request_frame *)
  27194. + skb_put(skb, sizeof(struct ieee80211_assoc_request_frame));
  27195. +
  27196. +
  27197. + hdr->header.frame_ctl = IEEE80211_STYPE_ASSOC_REQ;
  27198. + hdr->header.duration_id= 37; //FIXME
  27199. + memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
  27200. + memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  27201. + memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
  27202. + memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);//for HW security, John
  27203. +
  27204. + hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
  27205. + if (beacon->capability & WLAN_CAPABILITY_PRIVACY )
  27206. + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
  27207. +
  27208. + if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE )
  27209. + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
  27210. +
  27211. + if(ieee->short_slot)
  27212. + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
  27213. +
  27214. +#ifdef _RTL8187_EXT_PATCH_
  27215. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_association_req_1)
  27216. + ieee->ext_patch_ieee80211_association_req_1(hdr);
  27217. +#endif
  27218. +
  27219. + hdr->listen_interval = 0xa; //FIXME
  27220. +
  27221. + hdr->info_element.id = MFIE_TYPE_SSID;
  27222. +
  27223. + hdr->info_element.len = beacon->ssid_len;
  27224. + tag = skb_put(skb, beacon->ssid_len);
  27225. + memcpy(tag, beacon->ssid, beacon->ssid_len);
  27226. +
  27227. + tag = skb_put(skb, rate_len);
  27228. +
  27229. + ieee80211_MFIE_Brate(ieee, &tag);
  27230. + ieee80211_MFIE_Grate(ieee, &tag);
  27231. +
  27232. + //add rsn==0 condition for ap's mix security mode(wpa+wpa2), john2007.8.9
  27233. + //choose AES encryption as default algorithm while using mixed mode
  27234. +#if 0
  27235. + if(rsn_len == 0){
  27236. +
  27237. + tag = skb_put(skb,wpa_len);
  27238. +
  27239. + if(wpa_len) {
  27240. +
  27241. +
  27242. + //{add by david. 2006.8.31
  27243. + //fix linksys compatibility bug
  27244. + //}
  27245. + if(wpa_len > 24) {//22+2, mean include the capability
  27246. + beacon->wpa_ie[wpa_len - 2] = 0;
  27247. + }
  27248. + //multicast cipher OUI
  27249. + if( beacon->wpa_ie[11]==0x2 ){ //0x0050f202 is the oui of tkip
  27250. + ieee->broadcast_key_type = KEY_TYPE_TKIP;
  27251. + }
  27252. + else if( beacon->wpa_ie[11]==0x4 ){//0x0050f204 is the oui of ccmp
  27253. + ieee->broadcast_key_type = KEY_TYPE_CCMP;
  27254. + }
  27255. + //unicast cipher OUI
  27256. + if( beacon->wpa_ie[14]==0
  27257. + && beacon->wpa_ie[15]==0x50
  27258. + && beacon->wpa_ie[16]==0xf2
  27259. + && beacon->wpa_ie[17]==0x2 ){ //0x0050f202 is the oui of tkip
  27260. + ieee->pairwise_key_type = KEY_TYPE_TKIP;
  27261. + }
  27262. +
  27263. + else if( beacon->wpa_ie[14]==0
  27264. + && beacon->wpa_ie[15]==0x50
  27265. + && beacon->wpa_ie[16]==0xf2
  27266. + && beacon->wpa_ie[17]==0x4 ){//0x0050f204 is the oui of ccmp
  27267. + ieee->pairwise_key_type = KEY_TYPE_CCMP;
  27268. + }
  27269. + //indicate the wpa_ie content to WPA_SUPPLICANT
  27270. + buff = kmalloc(IW_CUSTOM_MAX, GFP_ATOMIC);
  27271. + memset(buff, 0, IW_CUSTOM_MAX);
  27272. + p=buff;
  27273. + p += sprintf(p, "ASSOCINFO(ReqIEs=");
  27274. + for(i=0;i<wpa_len;i++){
  27275. + p += sprintf(p, "%02x", beacon->wpa_ie[i]);
  27276. + }
  27277. + p += sprintf(p, ")");
  27278. + memset(&wrqu, 0, sizeof(wrqu) );
  27279. + wrqu.data.length = p - buff;
  27280. +
  27281. + wireless_send_event(dev, IWEVCUSTOM, &wrqu, buff);
  27282. + memcpy(tag,beacon->wpa_ie,wpa_len);
  27283. + }
  27284. +
  27285. + }
  27286. +
  27287. + if(rsn_len > 22) {
  27288. +
  27289. + if( beacon->rsn_ie[4]==0x0 &&
  27290. + beacon->rsn_ie[5]==0xf &&
  27291. + beacon->rsn_ie[6]==0xac){
  27292. +
  27293. + switch(beacon->rsn_ie[7]){
  27294. + case 0x1:
  27295. + ieee->broadcast_key_type = KEY_TYPE_WEP40;
  27296. + break;
  27297. + case 0x2:
  27298. + ieee->broadcast_key_type = KEY_TYPE_TKIP;
  27299. + break;
  27300. + case 0x4:
  27301. + ieee->broadcast_key_type = KEY_TYPE_CCMP;
  27302. + break;
  27303. + case 0x5:
  27304. + ieee->broadcast_key_type = KEY_TYPE_WEP104;
  27305. + break;
  27306. + default:
  27307. + printk("fault suite type in RSN broadcast key\n");
  27308. + break;
  27309. + }
  27310. + }
  27311. +
  27312. + if( beacon->rsn_ie[10]==0x0 &&
  27313. + beacon->rsn_ie[11]==0xf &&
  27314. + beacon->rsn_ie[12]==0xac){
  27315. + if(beacon->rsn_ie[8]==1){//not mixed mode
  27316. + switch(beacon->rsn_ie[13]){
  27317. + case 0x2:
  27318. + ieee->pairwise_key_type = KEY_TYPE_TKIP;
  27319. + break;
  27320. + case 0x4:
  27321. + ieee->pairwise_key_type = KEY_TYPE_CCMP;
  27322. + break;
  27323. + default:
  27324. + printk("fault suite type in RSN pairwise key\n");
  27325. + break;
  27326. + }
  27327. + }
  27328. + else if(beacon->rsn_ie[8]==2){//mixed mode
  27329. + ieee->pairwise_key_type = KEY_TYPE_CCMP;
  27330. + }
  27331. + }
  27332. +
  27333. +
  27334. +
  27335. + tag = skb_put(skb,22);
  27336. + memcpy(tag,(beacon->rsn_ie + info_addr),8);
  27337. + tag[1] = 20;
  27338. + tag += 8;
  27339. + info_addr += 8;
  27340. +
  27341. + spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
  27342. + for (i = 0; i < 2; i++) {
  27343. + tag[0] = 1;
  27344. + tag[1] = 0;
  27345. + tag += 2;
  27346. + suite_count = beacon->rsn_ie[info_addr] + \
  27347. + (beacon->rsn_ie[info_addr + 1] << 8);
  27348. + info_addr += 2;
  27349. + if(1 == suite_count) {
  27350. + memcpy(tag,(beacon->rsn_ie + info_addr),4);
  27351. + info_addr += 4;
  27352. + } else {
  27353. + // if the wpax_type_notify has been set by the application,
  27354. + // just use it, otherwise just use the default one.
  27355. + if(ieee->wpax_type_set) {
  27356. + suit_select = ((0 == i) ? pairwise_type:authen_type)&0x0f ;
  27357. + memcpy(tag,rsn_authen_cipher_suite[suit_select],4);
  27358. + } else {
  27359. + //default set as ccmp, or none authentication
  27360. + if(i == 0) {
  27361. + memcpy(tag,rsn_authen_cipher_suite[4],4);
  27362. + } else {
  27363. + memcpy(tag,rsn_authen_cipher_suite[2],4);
  27364. + }
  27365. +
  27366. + }
  27367. +
  27368. + info_addr += (suite_count * 4);
  27369. + }
  27370. + tag += 4;
  27371. + }
  27372. + spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
  27373. +
  27374. + tag[0] = 0;
  27375. + tag[1] = beacon->rsn_ie[info_addr+1];
  27376. +
  27377. +
  27378. +
  27379. + } else {
  27380. + tag = skb_put(skb,rsn_len);
  27381. + if(rsn_len) {
  27382. +
  27383. +
  27384. + if( beacon->rsn_ie[4]==0x0 &&
  27385. + beacon->rsn_ie[5]==0xf &&
  27386. + beacon->rsn_ie[6]==0xac){
  27387. + switch(beacon->rsn_ie[7]){
  27388. + case 0x1:
  27389. + ieee->broadcast_key_type = KEY_TYPE_WEP40;
  27390. + break;
  27391. + case 0x2:
  27392. + ieee->broadcast_key_type = KEY_TYPE_TKIP;
  27393. + break;
  27394. + case 0x4:
  27395. + ieee->broadcast_key_type = KEY_TYPE_CCMP;
  27396. + break;
  27397. + case 0x5:
  27398. + ieee->broadcast_key_type = KEY_TYPE_WEP104;
  27399. + break;
  27400. + default:
  27401. + printk("fault suite type in RSN broadcast key\n");
  27402. + break;
  27403. + }
  27404. + }
  27405. + if( beacon->rsn_ie[10]==0x0 &&
  27406. + beacon->rsn_ie[11]==0xf &&
  27407. + beacon->rsn_ie[12]==0xac){
  27408. + if(beacon->rsn_ie[8]==1){//not mixed mode
  27409. + switch(beacon->rsn_ie[13]){
  27410. + case 0x2:
  27411. + ieee->pairwise_key_type = KEY_TYPE_TKIP;
  27412. + break;
  27413. + case 0x4:
  27414. + ieee->pairwise_key_type = KEY_TYPE_CCMP;
  27415. + break;
  27416. + default:
  27417. + printk("fault suite type in RSN pairwise key\n");
  27418. + break;
  27419. + }
  27420. +
  27421. + }
  27422. + else if(beacon->rsn_ie[8]==2){//mixed mode
  27423. + ieee->pairwise_key_type = KEY_TYPE_CCMP;
  27424. + }
  27425. + }
  27426. +
  27427. +
  27428. + beacon->rsn_ie[rsn_len - 2] = 0;
  27429. + memcpy(tag,beacon->rsn_ie,rsn_len);
  27430. + }
  27431. + }
  27432. +#else
  27433. + if (ieee->wpa_ie){
  27434. + tag = skb_put(skb,ieee->wpa_ie_len);
  27435. + memcpy(tag,ieee->wpa_ie,ieee->wpa_ie_len);
  27436. + }
  27437. +#endif
  27438. + tag = skb_put(skb,wmm_info_len);
  27439. + if(wmm_info_len) {
  27440. + ieee80211_WMM_Info(ieee, &tag);
  27441. + }
  27442. +#ifdef THOMAS_TURBO
  27443. + tag = skb_put(skb,turbo_info_len);
  27444. + if(turbo_info_len) {
  27445. + ieee80211_TURBO_Info(ieee, &tag);
  27446. + }
  27447. +#endif
  27448. +
  27449. +#ifdef _RTL8187_EXT_PATCH_
  27450. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_association_req_2)
  27451. + ieee->ext_patch_ieee80211_association_req_2(ieee, beacon, skb);
  27452. +#endif
  27453. +
  27454. + return skb;
  27455. +}
  27456. +
  27457. +void ieee80211_associate_abort(struct ieee80211_device *ieee)
  27458. +{
  27459. +
  27460. + unsigned long flags;
  27461. + spin_lock_irqsave(&ieee->lock, flags);
  27462. +
  27463. + ieee->associate_seq++;
  27464. +
  27465. + /* don't scan, and avoid to have the RX path possibily
  27466. + * try again to associate. Even do not react to AUTH or
  27467. + * ASSOC response. Just wait for the retry wq to be scheduled.
  27468. + * Here we will check if there are good nets to associate
  27469. + * with, so we retry or just get back to NO_LINK and scanning
  27470. + */
  27471. + if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING){
  27472. + IEEE80211_DEBUG_MGMT("Authentication failed\n");
  27473. + ieee->softmac_stats.no_auth_rs++;
  27474. + }else{
  27475. + IEEE80211_DEBUG_MGMT("Association failed\n");
  27476. + ieee->softmac_stats.no_ass_rs++;
  27477. + }
  27478. +
  27479. + ieee->state = IEEE80211_ASSOCIATING_RETRY;
  27480. +
  27481. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  27482. + queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, \
  27483. + IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
  27484. +#else
  27485. + schedule_task(&ieee->associate_retry_wq);
  27486. +#endif
  27487. +
  27488. + spin_unlock_irqrestore(&ieee->lock, flags);
  27489. +}
  27490. +
  27491. +void ieee80211_associate_abort_cb(unsigned long dev)
  27492. +{
  27493. + ieee80211_associate_abort((struct ieee80211_device *) dev);
  27494. +}
  27495. +
  27496. +
  27497. +void ieee80211_associate_step1(struct ieee80211_device *ieee)
  27498. +{
  27499. + struct ieee80211_network *beacon = &ieee->current_network;
  27500. + struct sk_buff *skb;
  27501. +
  27502. + IEEE80211_DEBUG_MGMT("Stopping scan\n");
  27503. +
  27504. + ieee->softmac_stats.tx_auth_rq++;
  27505. + skb=ieee80211_authentication_req(beacon, ieee, 0);
  27506. +
  27507. +#ifdef _RTL8187_EXT_PATCH_
  27508. + if(ieee->iw_mode == ieee->iw_ext_mode ) {
  27509. + if(skb)
  27510. + softmac_mgmt_xmit(skb, ieee);
  27511. + return;
  27512. + }else
  27513. +#endif
  27514. + if (!skb)
  27515. + ieee80211_associate_abort(ieee);
  27516. + else{
  27517. + ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING ;
  27518. + IEEE80211_DEBUG_MGMT("Sending authentication request\n");
  27519. + //printk(KERN_WARNING "Sending authentication request\n");
  27520. + softmac_mgmt_xmit(skb, ieee);
  27521. + //BUGON when you try to add_timer twice, using mod_timer may be better, john0709
  27522. + if(!timer_pending(&ieee->associate_timer)){
  27523. + ieee->associate_timer.expires = jiffies + (HZ / 2);
  27524. + add_timer(&ieee->associate_timer);
  27525. + }
  27526. + dev_kfree_skb_any(skb);//edit by thomas
  27527. + }
  27528. +}
  27529. +
  27530. +void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
  27531. +{
  27532. + u8 *c;
  27533. + struct sk_buff *skb;
  27534. + struct ieee80211_network *beacon = &ieee->current_network;
  27535. +// int hlen = sizeof(struct ieee80211_authentication);
  27536. +
  27537. + ieee->associate_seq++;
  27538. + ieee->softmac_stats.tx_auth_rq++;
  27539. +
  27540. + skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
  27541. + if (!skb)
  27542. + ieee80211_associate_abort(ieee);
  27543. + else{
  27544. + c = skb_put(skb, chlen+2);
  27545. + *(c++) = MFIE_TYPE_CHALLENGE;
  27546. + *(c++) = chlen;
  27547. + memcpy(c, challenge, chlen);
  27548. +
  27549. + IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
  27550. +
  27551. + ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr ));
  27552. +
  27553. + softmac_mgmt_xmit(skb, ieee);
  27554. +
  27555. + if(!timer_pending(&ieee->associate_timer)){
  27556. + ieee->associate_timer.expires = jiffies + (HZ / 2);
  27557. + add_timer(&ieee->associate_timer);
  27558. + }
  27559. + dev_kfree_skb_any(skb);//edit by thomas
  27560. + }
  27561. + kfree(challenge);
  27562. +}
  27563. +
  27564. +#ifdef _RTL8187_EXT_PATCH_
  27565. +
  27566. +// based on ieee80211_assoc_resp
  27567. +struct sk_buff* ieee80211_assoc_resp_by_net(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)
  27568. +{
  27569. + struct sk_buff *skb;
  27570. + u8* tag;
  27571. +
  27572. + struct ieee80211_crypt_data* crypt;
  27573. + struct ieee80211_assoc_response_frame *assoc;
  27574. + short encrypt;
  27575. +
  27576. + unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
  27577. + int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
  27578. +
  27579. + if(ieee->iw_mode == ieee->iw_ext_mode)
  27580. + skb = dev_alloc_skb(len+256); // stanley
  27581. + else
  27582. + skb = dev_alloc_skb(len);
  27583. +
  27584. + if (!skb)
  27585. + return NULL;
  27586. +
  27587. + assoc = (struct ieee80211_assoc_response_frame *)
  27588. + skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
  27589. +
  27590. + assoc->header.frame_ctl = cpu_to_le16(pkt_type);
  27591. +
  27592. + memcpy(assoc->header.addr1, dest,ETH_ALEN);
  27593. + memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
  27594. + memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
  27595. + assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
  27596. + WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
  27597. +
  27598. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_assoc_resp_by_net_1)
  27599. + ieee->ext_patch_ieee80211_assoc_resp_by_net_1(assoc);
  27600. +
  27601. + if(ieee->short_slot)
  27602. + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
  27603. +
  27604. + if (ieee->host_encrypt)
  27605. +#ifdef _RTL8187_EXT_PATCH_
  27606. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  27607. +#else
  27608. + crypt = ieee->crypt[ieee->tx_keyidx];
  27609. +#endif
  27610. +
  27611. + else crypt = NULL;
  27612. +
  27613. + encrypt = ( crypt && crypt->ops);
  27614. +
  27615. + if (encrypt)
  27616. + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
  27617. +
  27618. + assoc->status = 0;
  27619. + assoc->aid = cpu_to_le16(ieee->assoc_id);
  27620. + if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
  27621. + else ieee->assoc_id++;
  27622. +
  27623. + assoc->info_element.id = 230; // Stanley, an unused id (just a hot fix)
  27624. + assoc->info_element.len = 0;
  27625. +
  27626. + tag = (u8*) skb_put(skb, rate_len);
  27627. +
  27628. + ieee80211_MFIE_Brate(ieee, &tag);
  27629. + ieee80211_MFIE_Grate(ieee, &tag);
  27630. +
  27631. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_assoc_resp_by_net_2)
  27632. + ieee->ext_patch_ieee80211_assoc_resp_by_net_2(ieee, pstat, pkt_type, skb);
  27633. +
  27634. + return skb;
  27635. +}
  27636. +
  27637. +// based on ieee80211_resp_to_assoc_rq
  27638. +void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)
  27639. +{
  27640. + struct sk_buff *buf = ieee80211_assoc_resp_by_net(ieee, dest, status, pstat, pkt_type);
  27641. +
  27642. + if (buf)
  27643. + softmac_mgmt_xmit(buf, ieee);
  27644. +}
  27645. +
  27646. +// based on ieee80211_associate_step2
  27647. +void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat)
  27648. +{
  27649. +
  27650. + struct sk_buff* skb;
  27651. +
  27652. + // printk("@@@@@ ieee80211_ext_issue_assoc_req on channel: %d\n", ieee->current_network.channel);
  27653. +
  27654. + ieee->softmac_stats.tx_ass_rq++;
  27655. + skb=ieee80211_association_req(pstat, ieee);
  27656. + if (skb)
  27657. + softmac_mgmt_xmit(skb, ieee);
  27658. +}
  27659. +
  27660. +void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason)
  27661. +{
  27662. + // do nothing
  27663. + // printk("@@@@@ ieee80211_ext_issue_disassoc\n");
  27664. + return;
  27665. +}
  27666. +#endif // _RTL8187_EXT_PATCH_
  27667. +
  27668. +void ieee80211_associate_step2(struct ieee80211_device *ieee)
  27669. +{
  27670. + struct sk_buff* skb;
  27671. + struct ieee80211_network *beacon = &ieee->current_network;
  27672. +
  27673. +// del_timer_sync(&ieee->associate_timer);
  27674. +
  27675. + IEEE80211_DEBUG_MGMT("Sending association request\n");
  27676. +
  27677. + ieee->softmac_stats.tx_ass_rq++;
  27678. + skb=ieee80211_association_req(beacon, ieee);
  27679. + if (!skb)
  27680. + ieee80211_associate_abort(ieee);
  27681. + else{
  27682. + softmac_mgmt_xmit(skb, ieee);
  27683. + if(!timer_pending(&ieee->associate_timer)){
  27684. + ieee->associate_timer.expires = jiffies + (HZ / 2);
  27685. + add_timer(&ieee->associate_timer);
  27686. + }
  27687. + dev_kfree_skb_any(skb);//edit by thomas
  27688. + }
  27689. +}
  27690. +
  27691. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  27692. +void ieee80211_associate_complete_wq(struct work_struct *work)
  27693. +{
  27694. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
  27695. +#else
  27696. +void ieee80211_associate_complete_wq(struct ieee80211_device *ieee)
  27697. +{
  27698. +#endif
  27699. + printk(KERN_INFO "Associated successfully\n");
  27700. + if(ieee80211_is_54g(ieee->current_network) &&
  27701. + (ieee->modulation & IEEE80211_OFDM_MODULATION)){
  27702. +
  27703. + ieee->rate = 540;
  27704. + printk(KERN_INFO"Using G rates\n");
  27705. + }else{
  27706. + ieee->rate = 110;
  27707. + printk(KERN_INFO"Using B rates\n");
  27708. + }
  27709. +
  27710. +//by lizhaoming for LED LINK
  27711. +#ifdef LED_SHIN
  27712. + {
  27713. + struct net_device *dev = ieee->dev;
  27714. + ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
  27715. + }
  27716. +#endif
  27717. +
  27718. + ieee->link_change(ieee->dev);
  27719. + notify_wx_assoc_event(ieee);
  27720. + if (ieee->data_hard_resume)
  27721. + ieee->data_hard_resume(ieee->dev);
  27722. + netif_carrier_on(ieee->dev);
  27723. +}
  27724. +
  27725. +void ieee80211_associate_complete(struct ieee80211_device *ieee)
  27726. +{
  27727. + int i;
  27728. +// struct net_device *dev = ieee->dev;
  27729. + del_timer_sync(&ieee->associate_timer);
  27730. +
  27731. + for(i = 0; i < 6; i++) {
  27732. +// ieee->seq_ctrl[i] = 0;
  27733. + }
  27734. + ieee->state = IEEE80211_LINKED;
  27735. + IEEE80211_DEBUG_MGMT("Successfully associated\n");
  27736. +
  27737. + //by lizhaoming for LED LINK
  27738. + //ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
  27739. +
  27740. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  27741. + queue_work(ieee->wq, &ieee->associate_complete_wq);
  27742. +#else
  27743. + schedule_task(&ieee->associate_complete_wq);
  27744. +#endif
  27745. +}
  27746. +
  27747. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  27748. +void ieee80211_associate_procedure_wq(struct work_struct *work)
  27749. +{
  27750. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
  27751. +#else
  27752. +void ieee80211_associate_procedure_wq(struct ieee80211_device *ieee)
  27753. +{
  27754. +#endif
  27755. + ieee->sync_scan_hurryup = 1;
  27756. + down(&ieee->wx_sem);
  27757. +
  27758. + if (ieee->data_hard_stop)
  27759. + ieee->data_hard_stop(ieee->dev);
  27760. +
  27761. + ieee80211_stop_scan(ieee);
  27762. + //printk("=======>%s set chan:%d\n", __func__, ieee->current_network.channel);
  27763. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  27764. +
  27765. + ieee->associate_seq = 1;
  27766. + ieee80211_associate_step1(ieee);
  27767. +
  27768. + up(&ieee->wx_sem);
  27769. +}
  27770. +#ifdef _RTL8187_EXT_PATCH_
  27771. +// based on ieee80211_associate_procedure_wq
  27772. +
  27773. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  27774. +void ieee80211_ext_stop_scan_wq(struct work_struct *work)
  27775. +{
  27776. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ext_stop_scan_wq);
  27777. +#else
  27778. +void ieee80211_ext_stop_scan_wq(struct ieee80211_device *ieee)
  27779. +{
  27780. +#endif
  27781. +/*
  27782. + if (ieee->scanning == 0)
  27783. + {
  27784. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel
  27785. + && ( ieee->current_network.channel == ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee) ) )
  27786. + return;
  27787. + }
  27788. +*/
  27789. + ieee->sync_scan_hurryup = 1;
  27790. +
  27791. + down(&ieee->wx_sem);
  27792. +
  27793. + // printk("@@@@@@@@@@ ieee80211_ext_stop_scan_wq\n");
  27794. + if (ieee->data_hard_stop)
  27795. + ieee->data_hard_stop(ieee->dev);
  27796. +
  27797. + ieee80211_stop_scan(ieee);
  27798. +
  27799. + // set channel
  27800. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel)
  27801. + {
  27802. + int ch = ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee);
  27803. + ieee->current_network.channel = ch;
  27804. + ieee->set_chan(ieee->dev, ch);
  27805. + }
  27806. + else
  27807. + {
  27808. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  27809. + }
  27810. + //
  27811. + up(&ieee->wx_sem);
  27812. +}
  27813. +
  27814. +
  27815. +void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee)
  27816. +{
  27817. + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  27818. + queue_work(ieee->wq, &ieee->ext_send_beacon_wq);
  27819. + #else
  27820. + schedule_task(&ieee->ext_send_beacon_wq);
  27821. + #endif
  27822. +
  27823. +}
  27824. +
  27825. +#endif // _RTL8187_EXT_PATCH_
  27826. +
  27827. +inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net)
  27828. +{
  27829. + u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
  27830. + int tmp_ssid_len = 0;
  27831. +
  27832. + short apset,ssidset,ssidbroad,apmatch,ssidmatch;
  27833. +// printk("===============>%s()\n",__FUNCTION__);
  27834. + /* we are interested in new new only if we are not associated
  27835. + * and we are not associating / authenticating
  27836. + */
  27837. + if (ieee->state != IEEE80211_NOLINK)
  27838. + return;
  27839. +
  27840. + if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
  27841. + return;
  27842. +
  27843. + if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
  27844. + return;
  27845. +
  27846. +
  27847. + if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC){
  27848. + /* if the user specified the AP MAC, we need also the essid
  27849. + * This could be obtained by beacons or, if the network does not
  27850. + * broadcast it, it can be put manually.
  27851. + */
  27852. + apset = ieee->wap_set;//(memcmp(ieee->current_network.bssid, zero,ETH_ALEN)!=0 );
  27853. + ssidset = ieee->ssid_set;//ieee->current_network.ssid[0] != '\0';
  27854. + ssidbroad = !(net->ssid_len == 0 || net->ssid[0]== '\0');
  27855. + apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
  27856. + if(ieee->current_network.ssid_len != net->ssid_len)
  27857. + ssidmatch = 0;
  27858. + else
  27859. + ssidmatch = (0==strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
  27860. +
  27861. +
  27862. +
  27863. + if ( /* if the user set the AP check if match.
  27864. + * if the network does not broadcast essid we check the user supplyed ANY essid
  27865. + * if the network does broadcast and the user does not set essid it is OK
  27866. + * if the network does broadcast and the user did set essid chech if essid match
  27867. + */
  27868. + ( apset && apmatch &&
  27869. + //((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) ) ||
  27870. + ((ssidset && ssidbroad && ssidmatch) || (!ssidbroad && ssidset)) ) ||
  27871. + /* if the ap is not set, check that the user set the bssid
  27872. + * and the network does bradcast and that those two bssid matches
  27873. + */
  27874. + (!apset && ssidset && ssidbroad && ssidmatch)
  27875. + ){
  27876. + /* if the essid is hidden replace it with the
  27877. + * essid provided by the user.
  27878. + */
  27879. + if (!ssidbroad){
  27880. + strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
  27881. + tmp_ssid_len = ieee->current_network.ssid_len;
  27882. + }
  27883. + memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
  27884. +
  27885. + if (!ssidbroad){
  27886. + strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
  27887. + ieee->current_network.ssid_len = tmp_ssid_len;
  27888. + }
  27889. + printk(KERN_INFO"Linking with %s, channel:%d\n",ieee->current_network.ssid, ieee->current_network.channel);
  27890. +
  27891. +#ifdef CONFIG_IPS
  27892. + ieee->ieee80211_ips_leave(ieee->dev);
  27893. +#endif
  27894. +
  27895. + if (ieee->iw_mode == IW_MODE_INFRA){
  27896. + ieee->state = IEEE80211_ASSOCIATING;
  27897. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  27898. + queue_work(ieee->wq, &ieee->associate_procedure_wq);
  27899. +#else
  27900. + schedule_task(&ieee->associate_procedure_wq);
  27901. +#endif
  27902. + }else{
  27903. + ieee->state = IEEE80211_LINKED;
  27904. + if(ieee80211_is_54g(ieee->current_network) &&
  27905. + (ieee->modulation & IEEE80211_OFDM_MODULATION)){
  27906. + ieee->rate = 540;
  27907. + printk(KERN_INFO"Using G rates\n");
  27908. + }else{
  27909. + ieee->rate = 110;
  27910. + printk(KERN_INFO"Using B rates\n");
  27911. + }
  27912. + }
  27913. +
  27914. + }
  27915. + }
  27916. +
  27917. +}
  27918. +
  27919. +void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
  27920. +{
  27921. + unsigned long flags;
  27922. + struct ieee80211_network *target;
  27923. +
  27924. + spin_lock_irqsave(&ieee->lock, flags);
  27925. +#if 0
  27926. + list_for_each_entry(target, &ieee->network_list, list) {
  27927. + printk(KERN_INFO"check network list SSID: %s, channel: %d\n",target->ssid,target->channel);
  27928. + }
  27929. +#endif
  27930. + list_for_each_entry(target, &ieee->network_list, list) {
  27931. +
  27932. + /* if the state become different that NOLINK means
  27933. + * we had found what we are searching for
  27934. + */
  27935. +
  27936. + if (ieee->state != IEEE80211_NOLINK)
  27937. + break;
  27938. +
  27939. + if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
  27940. + ieee80211_softmac_new_net(ieee, target);
  27941. + }
  27942. +
  27943. + spin_unlock_irqrestore(&ieee->lock, flags);
  27944. +
  27945. + //printk("<=====%s\n", __func__);
  27946. +}
  27947. +
  27948. +
  27949. +static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
  27950. +{
  27951. + struct ieee80211_authentication *a;
  27952. + u8 *t;
  27953. + if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
  27954. + IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
  27955. + return 0xcafe;
  27956. + }
  27957. + *challenge = NULL;
  27958. + a = (struct ieee80211_authentication*) skb->data;
  27959. + if(skb->len > (sizeof(struct ieee80211_authentication) +3)){
  27960. + t = skb->data + sizeof(struct ieee80211_authentication);
  27961. +
  27962. + if(*(t++) == MFIE_TYPE_CHALLENGE){
  27963. + *chlen = *(t++);
  27964. + *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC);
  27965. + memcpy(*challenge, t, *chlen);
  27966. + }
  27967. + }
  27968. +
  27969. + return cpu_to_le16(a->status);
  27970. +
  27971. +}
  27972. +
  27973. +
  27974. +int auth_rq_parse(struct sk_buff *skb,u8* dest)
  27975. +{
  27976. + struct ieee80211_authentication *a;
  27977. +
  27978. + if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
  27979. + IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);
  27980. + return -1;
  27981. + }
  27982. + a = (struct ieee80211_authentication*) skb->data;
  27983. +
  27984. + memcpy(dest,a->header.addr2, ETH_ALEN);
  27985. +
  27986. + if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
  27987. + return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
  27988. +
  27989. + return WLAN_STATUS_SUCCESS;
  27990. +}
  27991. +
  27992. +static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb, u8 *src)
  27993. +{
  27994. + u8 *tag;
  27995. + u8 *skbend;
  27996. + u8 *ssid=NULL;
  27997. + u8 ssidlen = 0;
  27998. +
  27999. + struct ieee80211_hdr_3addr *header =
  28000. + (struct ieee80211_hdr_3addr *) skb->data;
  28001. +
  28002. + if (skb->len < sizeof (struct ieee80211_hdr_3addr ))
  28003. + return -1; /* corrupted */
  28004. +
  28005. + memcpy(src,header->addr2, ETH_ALEN);
  28006. +
  28007. + skbend = (u8*)skb->data + skb->len;
  28008. +
  28009. + tag = skb->data + sizeof (struct ieee80211_hdr_3addr );
  28010. +
  28011. + while (tag+1 < skbend){
  28012. + if (*tag == 0){
  28013. + ssid = tag+2;
  28014. + ssidlen = *(tag+1);
  28015. + break;
  28016. + }
  28017. + tag++; /* point to the len field */
  28018. + tag = tag + *(tag); /* point to the last data byte of the tag */
  28019. + tag++; /* point to the next tag */
  28020. + }
  28021. +
  28022. + //IEEE80211DMESG("Card MAC address is "MACSTR, MAC2STR(src));
  28023. + if (ssidlen == 0) return 1;
  28024. +
  28025. + if (!ssid) return 1; /* ssid not found in tagged param */
  28026. + return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
  28027. +
  28028. +}
  28029. +
  28030. +int assoc_rq_parse(struct sk_buff *skb,u8* dest)
  28031. +{
  28032. + struct ieee80211_assoc_request_frame *a;
  28033. +
  28034. + if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) -
  28035. + sizeof(struct ieee80211_info_element))) {
  28036. +
  28037. + IEEE80211_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
  28038. + return -1;
  28039. + }
  28040. +
  28041. + a = (struct ieee80211_assoc_request_frame*) skb->data;
  28042. +
  28043. + memcpy(dest,a->header.addr2,ETH_ALEN);
  28044. +
  28045. + return 0;
  28046. +}
  28047. +
  28048. +static inline u16 assoc_parse(struct sk_buff *skb, int *aid)
  28049. +{
  28050. + struct ieee80211_assoc_response_frame *a;
  28051. + if (skb->len < sizeof(struct ieee80211_assoc_response_frame)){
  28052. + IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
  28053. + return 0xcafe;
  28054. + }
  28055. +
  28056. + a = (struct ieee80211_assoc_response_frame*) skb->data;
  28057. + *aid = le16_to_cpu(a->aid) & 0x3fff;
  28058. + return le16_to_cpu(a->status);
  28059. +}
  28060. +
  28061. +static inline void
  28062. +ieee80211_rx_probe_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
  28063. +{
  28064. + u8 dest[ETH_ALEN];
  28065. +
  28066. + //IEEE80211DMESG("Rx probe");
  28067. + ieee->softmac_stats.rx_probe_rq++;
  28068. + //DMESG("Dest is "MACSTR, MAC2STR(dest));
  28069. + if (probe_rq_parse(ieee, skb, dest)){
  28070. + //IEEE80211DMESG("Was for me!");
  28071. + ieee->softmac_stats.tx_probe_rs++;
  28072. + ieee80211_resp_to_probe(ieee, dest);
  28073. + }
  28074. +}
  28075. +
  28076. +//static inline void
  28077. +inline void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
  28078. +{
  28079. + u8 dest[ETH_ALEN];
  28080. + int status;
  28081. + //IEEE80211DMESG("Rx probe");
  28082. + ieee->softmac_stats.rx_auth_rq++;
  28083. +
  28084. + if ((status = auth_rq_parse(skb, dest))!= -1){
  28085. + ieee80211_resp_to_auth(ieee, status, dest);
  28086. + }
  28087. + //DMESG("Dest is "MACSTR, MAC2STR(dest));
  28088. +
  28089. +}
  28090. +
  28091. +//static inline void
  28092. +inline void
  28093. +ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
  28094. +{
  28095. +
  28096. + u8 dest[ETH_ALEN];
  28097. + //unsigned long flags;
  28098. +
  28099. + ieee->softmac_stats.rx_ass_rq++;
  28100. + if (assoc_rq_parse(skb,dest) != -1){
  28101. + ieee80211_resp_to_assoc_rq(ieee, dest);
  28102. + }
  28103. +
  28104. + printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest));
  28105. + //FIXME
  28106. + #if 0
  28107. + spin_lock_irqsave(&ieee->lock,flags);
  28108. + add_associate(ieee,dest);
  28109. + spin_unlock_irqrestore(&ieee->lock,flags);
  28110. + #endif
  28111. +}
  28112. +
  28113. +
  28114. +
  28115. +void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
  28116. +{
  28117. +
  28118. + struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
  28119. +
  28120. + printk(KERN_ALERT "ieee80211_sta_ps_send_null_frame \n");
  28121. + if (buf)
  28122. + softmac_ps_mgmt_xmit(buf, ieee);
  28123. +
  28124. +}
  28125. +
  28126. +
  28127. +short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l)
  28128. +{
  28129. + int timeout = ieee->ps_timeout;
  28130. + u8 dtim;
  28131. + /*if(ieee->ps == IEEE80211_PS_DISABLED ||
  28132. + ieee->iw_mode != IW_MODE_INFRA ||
  28133. + ieee->state != IEEE80211_LINKED)
  28134. +
  28135. + return 0;
  28136. + */
  28137. + dtim = ieee->current_network.dtim_data;
  28138. + //printk("DTIM\n");
  28139. + if(!(dtim & IEEE80211_DTIM_VALID))
  28140. + return 0;
  28141. + //printk("VALID\n");
  28142. + ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
  28143. +
  28144. + if(dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST)& ieee->ps))
  28145. + return 2;
  28146. +
  28147. + if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
  28148. + return 0;
  28149. +
  28150. + if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
  28151. + return 0;
  28152. +
  28153. + if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
  28154. + (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
  28155. + return 0;
  28156. +
  28157. + if(time_l){
  28158. + *time_l = ieee->current_network.last_dtim_sta_time[0]
  28159. + + (ieee->current_network.beacon_interval
  28160. + * ieee->current_network.dtim_period) * 1000;
  28161. + }
  28162. +
  28163. + if(time_h){
  28164. + *time_h = ieee->current_network.last_dtim_sta_time[1];
  28165. + if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
  28166. + *time_h += 1;
  28167. + }
  28168. +
  28169. + return 1;
  28170. +
  28171. +
  28172. +}
  28173. +
  28174. +inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
  28175. +{
  28176. +
  28177. + u32 th,tl;
  28178. + short sleep;
  28179. +
  28180. + unsigned long flags,flags2;
  28181. +
  28182. + spin_lock_irqsave(&ieee->lock, flags);
  28183. +
  28184. + if((ieee->ps == IEEE80211_PS_DISABLED ||
  28185. + ieee->iw_mode != IW_MODE_INFRA ||
  28186. + ieee->state != IEEE80211_LINKED)){
  28187. +
  28188. + // #warning CHECK_LOCK_HERE
  28189. + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
  28190. +
  28191. + ieee80211_sta_wakeup(ieee, 1);
  28192. +
  28193. + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
  28194. + }
  28195. +
  28196. + sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl);
  28197. + /* 2 wake, 1 sleep, 0 do nothing */
  28198. + if(sleep == 0)
  28199. + goto out;
  28200. +
  28201. + if(sleep == 1){
  28202. +
  28203. + if(ieee->sta_sleep == 1)
  28204. + ieee->enter_sleep_state(ieee->dev,th,tl);
  28205. +
  28206. + else if(ieee->sta_sleep == 0){
  28207. + // printk("send null 1\n");
  28208. + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
  28209. +
  28210. + if(ieee->ps_is_queue_empty(ieee->dev)){
  28211. +
  28212. +
  28213. + ieee->sta_sleep = 2;
  28214. +
  28215. + ieee->ps_request_tx_ack(ieee->dev);
  28216. +
  28217. + ieee80211_sta_ps_send_null_frame(ieee,1);
  28218. +
  28219. + ieee->ps_th = th;
  28220. + ieee->ps_tl = tl;
  28221. + }
  28222. + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
  28223. +
  28224. + }
  28225. +
  28226. +
  28227. + }else if(sleep == 2){
  28228. +//#warning CHECK_LOCK_HERE
  28229. + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
  28230. +
  28231. + ieee80211_sta_wakeup(ieee,1);
  28232. +
  28233. + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
  28234. + }
  28235. +
  28236. +out:
  28237. + spin_unlock_irqrestore(&ieee->lock, flags);
  28238. +
  28239. +}
  28240. +
  28241. +void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
  28242. +{
  28243. + if(ieee->sta_sleep == 0){
  28244. + if(nl){
  28245. + printk("Warning: driver is probably failing to report TX ps error\n");
  28246. + ieee->ps_request_tx_ack(ieee->dev);
  28247. + ieee80211_sta_ps_send_null_frame(ieee, 0);
  28248. + }
  28249. + return;
  28250. +
  28251. + }
  28252. +
  28253. + if(ieee->sta_sleep == 1)
  28254. + ieee->sta_wake_up(ieee->dev);
  28255. +
  28256. + ieee->sta_sleep = 0;
  28257. +
  28258. + if(nl){
  28259. + ieee->ps_request_tx_ack(ieee->dev);
  28260. + ieee80211_sta_ps_send_null_frame(ieee, 0);
  28261. + }
  28262. +}
  28263. +
  28264. +void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
  28265. +{
  28266. + unsigned long flags,flags2;
  28267. +
  28268. + spin_lock_irqsave(&ieee->lock, flags);
  28269. +
  28270. + if(ieee->sta_sleep == 2){
  28271. + /* Null frame with PS bit set */
  28272. + if(success){
  28273. + ieee->sta_sleep = 1;
  28274. + ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
  28275. + }
  28276. + /* if the card report not success we can't be sure the AP
  28277. + * has not RXed so we can't assume the AP believe us awake
  28278. + */
  28279. + }
  28280. + /* 21112005 - tx again null without PS bit if lost */
  28281. + else {
  28282. +
  28283. + if((ieee->sta_sleep == 0) && !success){
  28284. + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
  28285. + ieee80211_sta_ps_send_null_frame(ieee, 0);
  28286. + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
  28287. + }
  28288. + }
  28289. + spin_unlock_irqrestore(&ieee->lock, flags);
  28290. +}
  28291. +
  28292. +inline int
  28293. +ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
  28294. + struct ieee80211_rx_stats *rx_stats, u16 type,
  28295. + u16 stype)
  28296. +{
  28297. + struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
  28298. + u16 errcode;
  28299. + u8* challenge=NULL;
  28300. + int chlen=0;
  28301. + int aid=0;
  28302. + struct ieee80211_assoc_response_frame *assoc_resp;
  28303. + struct ieee80211_info_element *info_element;
  28304. +
  28305. + if(!ieee->proto_started)
  28306. + return 0;
  28307. +
  28308. + if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
  28309. + ieee->iw_mode == IW_MODE_INFRA &&
  28310. + ieee->state == IEEE80211_LINKED))
  28311. +
  28312. + tasklet_schedule(&ieee->ps_task);
  28313. +
  28314. + if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP &&
  28315. + WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON)
  28316. + ieee->last_rx_ps_time = jiffies;
  28317. +
  28318. + switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
  28319. + case IEEE80211_STYPE_ASSOC_RESP:
  28320. + case IEEE80211_STYPE_REASSOC_RESP:
  28321. +
  28322. + IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
  28323. + WLAN_FC_GET_STYPE(header->frame_ctl));
  28324. + //printk(KERN_WARNING "Received association response\n");
  28325. + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
  28326. + ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED &&
  28327. + ieee->iw_mode == IW_MODE_INFRA){
  28328. + if (0 == (errcode=assoc_parse(skb, &aid))){
  28329. + u16 left;
  28330. +
  28331. + ieee->state=IEEE80211_LINKED;
  28332. + ieee->assoc_id = aid;
  28333. + ieee->softmac_stats.rx_ass_ok++;
  28334. +
  28335. + //printk(KERN_WARNING "nic_type = %s", (rx_stats->nic_type == 1)?"rtl8187":"rtl8187B");
  28336. + if(1 == rx_stats->nic_type) //card type is 8187
  28337. + {
  28338. + goto associate_complete;
  28339. + }
  28340. + assoc_resp = (struct ieee80211_assoc_response_frame*)skb->data;
  28341. + info_element = &assoc_resp->info_element;
  28342. + left = skb->len - ((void*)info_element - (void*)assoc_resp);
  28343. +
  28344. + while (left >= sizeof(struct ieee80211_info_element_hdr)) {
  28345. + if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
  28346. + printk(KERN_WARNING "[re]associate reeponse error!");
  28347. + return 1;
  28348. + }
  28349. + switch (info_element->id) {
  28350. + case MFIE_TYPE_GENERIC:
  28351. + IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n", info_element->len);
  28352. + if (info_element->len >= 8 &&
  28353. + info_element->data[0] == 0x00 &&
  28354. + info_element->data[1] == 0x50 &&
  28355. + info_element->data[2] == 0xf2 &&
  28356. + info_element->data[3] == 0x02 &&
  28357. + info_element->data[4] == 0x01) {
  28358. + // Not care about version at present.
  28359. + //WMM Parameter Element
  28360. + memcpy(ieee->current_network.wmm_param,(u8*)(info_element->data\
  28361. + + 8),(info_element->len - 8));
  28362. +
  28363. + if (((ieee->current_network.wmm_info^info_element->data[6])& \
  28364. + 0x0f)||(!ieee->init_wmmparam_flag)) {
  28365. + //refresh paramete element for current network
  28366. + // update the register parameter for hardware
  28367. + ieee->init_wmmparam_flag = 1;
  28368. + //ieee->wmm_param_update(ieee);
  28369. + //schedule_work(&ieee->wmm_param_update_wq);
  28370. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  28371. + queue_work(ieee->wq, &ieee->wmm_param_update_wq);
  28372. +#else
  28373. + schedule_task(&ieee->wmm_param_update_wq);
  28374. +#endif
  28375. +
  28376. + }
  28377. + //update info_element for current network
  28378. + ieee->current_network.wmm_info = info_element->data[6];
  28379. + }
  28380. + break;
  28381. + default:
  28382. + //nothing to do at present!!!
  28383. + break;
  28384. + }
  28385. +
  28386. + left -= sizeof(struct ieee80211_info_element_hdr) +
  28387. + info_element->len;
  28388. + info_element = (struct ieee80211_info_element *)
  28389. + &info_element->data[info_element->len];
  28390. + }
  28391. + if(!ieee->init_wmmparam_flag) //legacy AP, reset the AC_xx_param register
  28392. + {
  28393. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  28394. + queue_work(ieee->wq,&ieee->wmm_param_update_wq);
  28395. +#else
  28396. + schedule_task(&ieee->wmm_param_update_wq);
  28397. +#endif
  28398. + ieee->init_wmmparam_flag = 1;//indicate AC_xx_param upated since last associate
  28399. + }
  28400. +associate_complete:
  28401. + ieee80211_associate_complete(ieee);
  28402. + }else{
  28403. + ieee->softmac_stats.rx_ass_err++;
  28404. + IEEE80211_DEBUG_MGMT(
  28405. + "Association response status code 0x%x\n",
  28406. + errcode);
  28407. + printk(KERN_WARNING "Association response status code 0x%x\n",
  28408. + errcode);
  28409. + ieee80211_associate_abort(ieee);
  28410. + }
  28411. + }
  28412. +#ifdef _RTL8187_EXT_PATCH_
  28413. + else if ((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp)
  28414. + {
  28415. + ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp(ieee, skb);
  28416. + }
  28417. +#endif
  28418. + break;
  28419. +
  28420. + case IEEE80211_STYPE_ASSOC_REQ:
  28421. + case IEEE80211_STYPE_REASSOC_REQ:
  28422. + //printk("Received IEEE80211_STYPE_ASSOC_REQ\n");
  28423. +
  28424. + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
  28425. + ieee->iw_mode == IW_MODE_MASTER)
  28426. +
  28427. + ieee80211_rx_assoc_rq(ieee, skb);
  28428. +#ifdef _RTL8187_EXT_PATCH_
  28429. + else if ((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req)
  28430. + {
  28431. + ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req(ieee, skb);
  28432. + }
  28433. +#endif
  28434. + break;
  28435. +
  28436. + case IEEE80211_STYPE_AUTH:
  28437. + //printk("Received authentication response\n");
  28438. +
  28439. +#ifdef _RTL8187_EXT_PATCH_
  28440. +//printk("IEEE80211_STYPE_AUTH\n");
  28441. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_auth)
  28442. + if( ieee->ext_patch_ieee80211_rx_frame_softmac_on_auth(ieee, skb, rx_stats) );
  28443. +#endif
  28444. + if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
  28445. + if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
  28446. + ieee->iw_mode == IW_MODE_INFRA){
  28447. +
  28448. + IEEE80211_DEBUG_MGMT("Received authentication response");
  28449. +
  28450. + if (0 == (errcode=auth_parse(skb, &challenge, &chlen))){
  28451. + if(ieee->open_wep || !challenge){
  28452. + ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
  28453. + ieee->softmac_stats.rx_auth_rs_ok++;
  28454. +
  28455. + ieee80211_associate_step2(ieee);
  28456. + }else{
  28457. + ieee80211_auth_challenge(ieee, challenge, chlen);
  28458. + }
  28459. + }else{
  28460. + ieee->softmac_stats.rx_auth_rs_err++;
  28461. + IEEE80211_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
  28462. + ieee80211_associate_abort(ieee);
  28463. + }
  28464. +
  28465. + }else if (ieee->iw_mode == IW_MODE_MASTER){
  28466. + ieee80211_rx_auth_rq(ieee, skb);
  28467. + }
  28468. + }
  28469. + break;
  28470. +
  28471. + case IEEE80211_STYPE_PROBE_REQ:
  28472. + //printk("Received IEEE80211_STYPE_PROBE_REQ\n");
  28473. +
  28474. + if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
  28475. + ((ieee->iw_mode == IW_MODE_ADHOC ||
  28476. + ieee->iw_mode == IW_MODE_MASTER) &&
  28477. + ieee->state == IEEE80211_LINKED))
  28478. +
  28479. + ieee80211_rx_probe_rq(ieee, skb);
  28480. + break;
  28481. +
  28482. + case IEEE80211_STYPE_DISASSOC:
  28483. + case IEEE80211_STYPE_DEAUTH:
  28484. + //printk("Received IEEE80211_STYPE_DISASSOC\n");
  28485. +#ifdef _RTL8187_EXT_PATCH_
  28486. +//printk("IEEE80211_STYPE_DEAUTH\n");
  28487. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_deauth)
  28488. + if( ieee->ext_patch_ieee80211_rx_frame_softmac_on_deauth(ieee, skb, rx_stats) ) ;
  28489. +#endif
  28490. + /* FIXME for now repeat all the association procedure
  28491. + * both for disassociation and deauthentication
  28492. + */
  28493. + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
  28494. + ieee->state == IEEE80211_LINKED &&
  28495. + ieee->iw_mode == IW_MODE_INFRA){
  28496. +
  28497. + ieee->state = IEEE80211_ASSOCIATING;
  28498. + ieee->softmac_stats.reassoc++;
  28499. +
  28500. + notify_wx_assoc_event(ieee);
  28501. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  28502. + queue_work(ieee->wq, &ieee->associate_procedure_wq);
  28503. +#else
  28504. + schedule_task(&ieee->associate_procedure_wq);
  28505. +#endif
  28506. + }
  28507. +
  28508. + break;
  28509. +
  28510. + default:
  28511. + return -1;
  28512. + break;
  28513. + }
  28514. +
  28515. + //dev_kfree_skb_any(skb);
  28516. + return 0;
  28517. +}
  28518. +
  28519. +
  28520. +
  28521. +/* following are for a simplier TX queue management.
  28522. + * Instead of using netif_[stop/wake]_queue the driver
  28523. + * will uses these two function (plus a reset one), that
  28524. + * will internally uses the kernel netif_* and takes
  28525. + * care of the ieee802.11 fragmentation.
  28526. + * So the driver receives a fragment per time and might
  28527. + * call the stop function when it want without take care
  28528. + * to have enought room to TX an entire packet.
  28529. + * This might be useful if each fragment need it's own
  28530. + * descriptor, thus just keep a total free memory > than
  28531. + * the max fragmentation treshold is not enought.. If the
  28532. + * ieee802.11 stack passed a TXB struct then you needed
  28533. + * to keep N free descriptors where
  28534. + * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
  28535. + * In this way you need just one and the 802.11 stack
  28536. + * will take care of buffering fragments and pass them to
  28537. + * to the driver later, when it wakes the queue.
  28538. + */
  28539. +
  28540. +void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee)
  28541. +{
  28542. +
  28543. +
  28544. + unsigned long flags;
  28545. + int i;
  28546. +#ifdef _RTL8187_EXT_PATCH_
  28547. + int rate = ieee->rate;
  28548. +#endif
  28549. +
  28550. + spin_lock_irqsave(&ieee->lock,flags);
  28551. + #if 0
  28552. + if(ieee->queue_stop){
  28553. + IEEE80211DMESG("EE: IEEE hard_start_xmit invoked when kernel queue should be stopped");
  28554. + netif_stop_queue(ieee->dev);
  28555. + ieee->ieee_stats.swtxstop++;
  28556. + //dev_kfree_skb_any(skb);
  28557. + err = 1;
  28558. + goto exit;
  28559. + }
  28560. +
  28561. + ieee->stats.tx_bytes+=skb->len;
  28562. +
  28563. +
  28564. + txb=ieee80211_skb_to_txb(ieee,skb);
  28565. +
  28566. +
  28567. + if(txb==NULL){
  28568. + IEEE80211DMESG("WW: IEEE stack failed to provide txb");
  28569. + //dev_kfree_skb_any(skb);
  28570. + err = 1;
  28571. + goto exit;
  28572. + }
  28573. + #endif
  28574. +
  28575. +#ifdef _RTL8187_EXT_PATCH_
  28576. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_softmac_xmit_get_rate && txb->nr_frags)
  28577. + {
  28578. + rate = ieee->ext_patch_ieee80211_softmac_xmit_get_rate(ieee, txb->fragments[0]);
  28579. + }
  28580. +#endif
  28581. + /* called with 2nd parm 0, no tx mgmt lock required */
  28582. + ieee80211_sta_wakeup(ieee,0);
  28583. +
  28584. + for(i = 0; i < txb->nr_frags; i++) {
  28585. +
  28586. + if (ieee->queue_stop){
  28587. + ieee->tx_pending.txb = txb;
  28588. + ieee->tx_pending.frag = i;
  28589. + goto exit;
  28590. + }else{
  28591. + ieee->softmac_data_hard_start_xmit(
  28592. + txb->fragments[i],
  28593. +#ifdef _RTL8187_EXT_PATCH_
  28594. + ieee->dev, rate);
  28595. +#else
  28596. + ieee->dev,ieee->rate);
  28597. +#endif
  28598. + //(i+1)<txb->nr_frags);
  28599. + ieee->stats.tx_packets++;
  28600. + ieee->stats.tx_bytes += txb->fragments[i]->len;
  28601. + ieee->dev->trans_start = jiffies;
  28602. + }
  28603. + }
  28604. +
  28605. + ieee80211_txb_free(txb);
  28606. +
  28607. + exit:
  28608. + spin_unlock_irqrestore(&ieee->lock,flags);
  28609. +
  28610. +}
  28611. +
  28612. +/* called with ieee->lock acquired */
  28613. +void ieee80211_resume_tx(struct ieee80211_device *ieee)
  28614. +{
  28615. + int i;
  28616. + for(i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
  28617. +
  28618. + if (ieee->queue_stop){
  28619. + ieee->tx_pending.frag = i;
  28620. + return;
  28621. + }else{
  28622. +
  28623. + ieee->softmac_data_hard_start_xmit(
  28624. + ieee->tx_pending.txb->fragments[i],
  28625. + ieee->dev,ieee->rate);
  28626. + //(i+1)<ieee->tx_pending.txb->nr_frags);
  28627. + ieee->stats.tx_packets++;
  28628. + ieee->dev->trans_start = jiffies;
  28629. + }
  28630. + }
  28631. +
  28632. +
  28633. + ieee80211_txb_free(ieee->tx_pending.txb);
  28634. + ieee->tx_pending.txb = NULL;
  28635. +}
  28636. +
  28637. +
  28638. +void ieee80211_reset_queue(struct ieee80211_device *ieee)
  28639. +{
  28640. + unsigned long flags;
  28641. +
  28642. + spin_lock_irqsave(&ieee->lock,flags);
  28643. + init_mgmt_queue(ieee);
  28644. + if (ieee->tx_pending.txb){
  28645. + ieee80211_txb_free(ieee->tx_pending.txb);
  28646. + ieee->tx_pending.txb = NULL;
  28647. + }
  28648. + ieee->queue_stop = 0;
  28649. + spin_unlock_irqrestore(&ieee->lock,flags);
  28650. +
  28651. +}
  28652. +
  28653. +void ieee80211_wake_queue(struct ieee80211_device *ieee)
  28654. +{
  28655. +
  28656. + unsigned long flags;
  28657. + struct sk_buff *skb;
  28658. + struct ieee80211_hdr_3addr *header;
  28659. +
  28660. + spin_lock_irqsave(&ieee->lock,flags);
  28661. + if (! ieee->queue_stop) goto exit;
  28662. +
  28663. + ieee->queue_stop = 0;
  28664. +
  28665. + if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
  28666. + while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
  28667. +
  28668. + header = (struct ieee80211_hdr_3addr *) skb->data;
  28669. +
  28670. + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
  28671. +
  28672. + if (ieee->seq_ctrl[0] == 0xFFF)
  28673. + ieee->seq_ctrl[0] = 0;
  28674. + else
  28675. + ieee->seq_ctrl[0]++;
  28676. +
  28677. + printk(KERN_ALERT "ieee80211_wake_queue \n");
  28678. + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
  28679. + dev_kfree_skb_any(skb);//edit by thomas
  28680. + }
  28681. + }
  28682. + if (!ieee->queue_stop && ieee->tx_pending.txb)
  28683. + ieee80211_resume_tx(ieee);
  28684. +
  28685. + if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
  28686. + ieee->softmac_stats.swtxawake++;
  28687. + netif_wake_queue(ieee->dev);
  28688. + }
  28689. +
  28690. +exit :
  28691. + spin_unlock_irqrestore(&ieee->lock,flags);
  28692. +}
  28693. +
  28694. +
  28695. +void ieee80211_stop_queue(struct ieee80211_device *ieee)
  28696. +{
  28697. + //unsigned long flags;
  28698. + //spin_lock_irqsave(&ieee->lock,flags);
  28699. +
  28700. + if (! netif_queue_stopped(ieee->dev)){
  28701. + netif_stop_queue(ieee->dev);
  28702. + ieee->softmac_stats.swtxstop++;
  28703. + }
  28704. + ieee->queue_stop = 1;
  28705. + //spin_unlock_irqrestore(&ieee->lock,flags);
  28706. +
  28707. +}
  28708. +
  28709. +
  28710. +inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
  28711. +{
  28712. +
  28713. + get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
  28714. +
  28715. + /* an IBSS cell address must have the two less significant
  28716. + * bits of the first byte = 2
  28717. + */
  28718. + ieee->current_network.bssid[0] &= ~0x01;
  28719. + ieee->current_network.bssid[0] |= 0x02;
  28720. +}
  28721. +
  28722. +/* called in user context only */
  28723. +void ieee80211_start_master_bss(struct ieee80211_device *ieee)
  28724. +{
  28725. + ieee->assoc_id = 1;
  28726. +
  28727. + if (ieee->current_network.ssid_len == 0){
  28728. + strncpy(ieee->current_network.ssid,
  28729. + IEEE80211_DEFAULT_TX_ESSID,
  28730. + IW_ESSID_MAX_SIZE);
  28731. +
  28732. + ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
  28733. + ieee->ssid_set = 1;
  28734. + }
  28735. +
  28736. + memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
  28737. +
  28738. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  28739. + ieee->state = IEEE80211_LINKED;
  28740. +
  28741. +//by lizhaoming for LED LINK
  28742. +#ifdef LED_SHIN
  28743. + {
  28744. + struct net_device *dev = ieee->dev;
  28745. + ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
  28746. + }
  28747. +#endif
  28748. + ieee->link_change(ieee->dev);
  28749. + notify_wx_assoc_event(ieee);
  28750. +
  28751. + if (ieee->data_hard_resume)
  28752. + ieee->data_hard_resume(ieee->dev);
  28753. +
  28754. + netif_carrier_on(ieee->dev);
  28755. +}
  28756. +
  28757. +void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
  28758. +{
  28759. + if(ieee->raw_tx){
  28760. +
  28761. + if (ieee->data_hard_resume)
  28762. + ieee->data_hard_resume(ieee->dev);
  28763. +
  28764. + netif_carrier_on(ieee->dev);
  28765. + }
  28766. +}
  28767. +
  28768. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  28769. +void ieee80211_start_ibss_wq(struct work_struct *work)
  28770. +{
  28771. + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
  28772. + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
  28773. +#else
  28774. +void ieee80211_start_ibss_wq(struct ieee80211_device *ieee)
  28775. +{
  28776. +#endif
  28777. +
  28778. + /* iwconfig mode ad-hoc will schedule this and return
  28779. + * on the other hand this will block further iwconfig SET
  28780. + * operations because of the wx_sem hold.
  28781. + * Anyway some most set operations set a flag to speed-up
  28782. + * (abort) this wq (when syncro scanning) before sleeping
  28783. + * on the semaphore
  28784. + */
  28785. +
  28786. + down(&ieee->wx_sem);
  28787. +
  28788. + if (ieee->current_network.ssid_len == 0){
  28789. + strcpy(ieee->current_network.ssid,IEEE80211_DEFAULT_TX_ESSID);
  28790. + ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
  28791. + ieee->ssid_set = 1;
  28792. + }
  28793. +
  28794. +//by lizhaoming for LED BLINK 2008.6.23
  28795. +#ifdef LED_SHIN
  28796. + {
  28797. + struct net_device *dev = ieee->dev;
  28798. + ieee->ieee80211_led_contorl(dev, LED_CTL_SITE_SURVEY);
  28799. + }
  28800. +#endif
  28801. +
  28802. + /* check if we have this cell in our network list */
  28803. + ieee80211_softmac_check_all_nets(ieee);
  28804. +
  28805. +#ifdef ENABLE_DOT11D
  28806. + //[World wide 13]:
  28807. + // Adhoc:
  28808. + // (1) active scan from ch1~11 and passive scan from ch12~13
  28809. + // (2) IBSS can join ch1~13 adhoc, but only start at ch10.
  28810. + if(ieee->state == IEEE80211_NOLINK)
  28811. + if(ieee->IbssStartChnl != 0)
  28812. + ieee->current_network.channel = ieee->IbssStartChnl;//chan 10
  28813. +#endif
  28814. +
  28815. + /* if not then the state is not linked. Maybe the user swithced to
  28816. + * ad-hoc mode just after being in monitor mode, or just after
  28817. + * being very few time in managed mode (so the card have had no
  28818. + * time to scan all the chans..) or we have just run up the iface
  28819. + * after setting ad-hoc mode. So we have to give another try..
  28820. + * Here, in ibss mode, should be safe to do this without extra care
  28821. + * (in bss mode we had to make sure no-one tryed to associate when
  28822. + * we had just checked the ieee->state and we was going to start the
  28823. + * scan) beacause in ibss mode the ieee80211_new_net function, when
  28824. + * finds a good net, just set the ieee->state to IEEE80211_LINKED,
  28825. + * so, at worst, we waste a bit of time to initiate an unneeded syncro
  28826. + * scan, that will stop at the first round because it sees the state
  28827. + * associated.
  28828. + */
  28829. + if (ieee->state == IEEE80211_NOLINK){
  28830. + ieee80211_start_scan_syncro(ieee);
  28831. + }
  28832. +
  28833. + /* the network definitively is not here.. create a new cell */
  28834. + if (ieee->state == IEEE80211_NOLINK){
  28835. + printk("creating new IBSS cell\n");
  28836. + ieee->state = IEEE80211_LINKED;
  28837. + if(!ieee->wap_set)
  28838. + ieee80211_randomize_cell(ieee);
  28839. +
  28840. + if(ieee->modulation & IEEE80211_CCK_MODULATION){
  28841. +
  28842. + ieee->current_network.rates_len = 4;
  28843. +
  28844. + ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
  28845. + ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
  28846. + ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
  28847. + ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
  28848. +
  28849. + }else
  28850. + ieee->current_network.rates_len = 0;
  28851. +
  28852. + if(ieee->modulation & IEEE80211_OFDM_MODULATION){
  28853. + ieee->current_network.rates_ex_len = 8;
  28854. +
  28855. + ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
  28856. + ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
  28857. + ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
  28858. + ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
  28859. + ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
  28860. + ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
  28861. + ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
  28862. + ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
  28863. +
  28864. + ieee->rate = 540;
  28865. + }else{
  28866. + ieee->current_network.rates_ex_len = 0;
  28867. + ieee->rate = 110;
  28868. + }
  28869. +
  28870. + // By default, WMM function will be disabled in IBSS mode
  28871. + ieee->current_network.QoS_Enable = 0;
  28872. +
  28873. + ieee->current_network.atim_window = 0;
  28874. + ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
  28875. + if(ieee->short_slot)
  28876. + ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
  28877. +
  28878. + }
  28879. +
  28880. + ieee->state = IEEE80211_LINKED;
  28881. +
  28882. +//by lizhaoming for LED LINK
  28883. +#ifdef LED_SHIN
  28884. + {
  28885. + struct net_device *dev = ieee->dev;
  28886. + ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
  28887. + }
  28888. +#endif
  28889. +
  28890. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  28891. + ieee->link_change(ieee->dev);
  28892. +
  28893. + notify_wx_assoc_event(ieee);
  28894. +
  28895. + ieee80211_start_send_beacons(ieee);
  28896. + printk(KERN_WARNING "after sending beacon packet!\n");
  28897. +
  28898. + if (ieee->data_hard_resume)
  28899. + ieee->data_hard_resume(ieee->dev);
  28900. +
  28901. + netif_carrier_on(ieee->dev);
  28902. +
  28903. + up(&ieee->wx_sem);
  28904. +}
  28905. +
  28906. +inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
  28907. +{
  28908. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  28909. + queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 150); //change to delayed work, delayed time is need to check
  28910. +#else
  28911. + schedule_task(&ieee->start_ibss_wq);
  28912. +#endif
  28913. +}
  28914. +
  28915. +/* this is called only in user context, with wx_sem held */
  28916. +void ieee80211_start_bss(struct ieee80211_device *ieee)
  28917. +{
  28918. + unsigned long flags;
  28919. + /* check if we have already found the net we
  28920. + * are interested in (if any).
  28921. + * if not (we are disassociated and we are not
  28922. + * in associating / authenticating phase) start the background scanning.
  28923. + */
  28924. +
  28925. +//by lizhaoming for LED BLINK 2008.6.23
  28926. +#ifdef LED_SHIN
  28927. + {
  28928. + struct net_device *dev = ieee->dev;
  28929. + ieee->ieee80211_led_contorl(dev, LED_CTL_SITE_SURVEY);
  28930. + }
  28931. +#endif
  28932. +
  28933. +#ifdef ENABLE_DOT11D
  28934. + //
  28935. + // Ref: 802.11d 11.1.3.3
  28936. + // STA shall not start a BSS unless properly formed Beacon frame including a Country IE.
  28937. + //
  28938. + if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
  28939. + {
  28940. + if(! ieee->bGlobalDomain)
  28941. + {
  28942. + return;
  28943. + }
  28944. + }
  28945. +#endif
  28946. + //printk("======>%s()\n",__FUNCTION__);
  28947. + ieee80211_softmac_check_all_nets(ieee);
  28948. +
  28949. + /* ensure no-one start an associating process (thus setting
  28950. + * the ieee->state to ieee80211_ASSOCIATING) while we
  28951. + * have just cheked it and we are going to enable scan.
  28952. + * The ieee80211_new_net function is always called with
  28953. + * lock held (from both ieee80211_softmac_check_all_nets and
  28954. + * the rx path), so we cannot be in the middle of such function
  28955. + */
  28956. +
  28957. + spin_lock_irqsave(&ieee->lock, flags);
  28958. + if (ieee->state == IEEE80211_NOLINK){
  28959. + //printk("Not find SSID in network list scan now\n");
  28960. + ieee80211_start_scan(ieee);
  28961. + }
  28962. + spin_unlock_irqrestore(&ieee->lock, flags);
  28963. +
  28964. +}
  28965. +
  28966. +/* called only in userspace context */
  28967. +void ieee80211_disassociate(struct ieee80211_device *ieee)
  28968. +{
  28969. + netif_carrier_off(ieee->dev);
  28970. +
  28971. + if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
  28972. + ieee80211_reset_queue(ieee);
  28973. +
  28974. + if (ieee->data_hard_stop)
  28975. + ieee->data_hard_stop(ieee->dev);
  28976. +
  28977. +#ifdef ENABLE_DOT11D
  28978. + if(IS_DOT11D_ENABLE(ieee))
  28979. + Dot11d_Reset(ieee);
  28980. +#endif
  28981. +
  28982. + ieee->state = IEEE80211_NOLINK;
  28983. + ieee->link_change(ieee->dev);
  28984. + notify_wx_assoc_event(ieee);
  28985. +
  28986. +}
  28987. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  28988. +void ieee80211_associate_retry_wq(struct work_struct *work)
  28989. +{
  28990. + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
  28991. + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
  28992. +#else
  28993. +void ieee80211_associate_retry_wq(struct ieee80211_device *ieee)
  28994. +{
  28995. +#endif
  28996. + unsigned long flags;
  28997. +
  28998. + down(&ieee->wx_sem);
  28999. + if(!ieee->proto_started)
  29000. + goto exit;
  29001. +
  29002. + if(ieee->state != IEEE80211_ASSOCIATING_RETRY)
  29003. + goto exit;
  29004. +
  29005. + /* until we do not set the state to IEEE80211_NOLINK
  29006. + * there are no possibility to have someone else trying
  29007. + * to start an association procdure (we get here with
  29008. + * ieee->state = IEEE80211_ASSOCIATING).
  29009. + * When we set the state to IEEE80211_NOLINK it is possible
  29010. + * that the RX path run an attempt to associate, but
  29011. + * both ieee80211_softmac_check_all_nets and the
  29012. + * RX path works with ieee->lock held so there are no
  29013. + * problems. If we are still disassociated then start a scan.
  29014. + * the lock here is necessary to ensure no one try to start
  29015. + * an association procedure when we have just checked the
  29016. + * state and we are going to start the scan.
  29017. + */
  29018. + ieee->state = IEEE80211_NOLINK;
  29019. +
  29020. + ieee80211_softmac_check_all_nets(ieee);
  29021. +
  29022. + spin_lock_irqsave(&ieee->lock, flags);
  29023. + if(ieee->state == IEEE80211_NOLINK)
  29024. + {
  29025. + printk("%s():Not find SSID:%s[ch=%d, mode=%s] in network list scan now\n", __FUNCTION__,
  29026. + ieee->current_network.ssid,ieee->current_network.channel,
  29027. + (ieee->iw_mode == IW_MODE_INFRA) ? "BSS" : "IBSS");
  29028. +
  29029. + ieee80211_start_scan(ieee);
  29030. + }
  29031. +
  29032. + spin_unlock_irqrestore(&ieee->lock, flags);
  29033. +
  29034. +exit:
  29035. + up(&ieee->wx_sem);
  29036. +}
  29037. +
  29038. +struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
  29039. +{
  29040. + u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
  29041. +
  29042. + struct sk_buff *skb = NULL;
  29043. + struct ieee80211_probe_response *b;
  29044. +
  29045. +//rz
  29046. +#ifdef _RTL8187_EXT_PATCH_
  29047. + if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_get_beacon_get_probersp )
  29048. + skb = ieee->ext_patch_get_beacon_get_probersp(ieee, broadcast_addr, &(ieee->current_network));
  29049. + else
  29050. + skb = ieee80211_probe_resp(ieee, broadcast_addr);
  29051. +#else
  29052. + skb = ieee80211_probe_resp(ieee, broadcast_addr);
  29053. +#endif
  29054. +//
  29055. + if (!skb)
  29056. + return NULL;
  29057. +
  29058. + b = (struct ieee80211_probe_response *) skb->data;
  29059. + b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
  29060. +
  29061. + return skb;
  29062. +
  29063. +}
  29064. +
  29065. +struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
  29066. +{
  29067. + struct sk_buff *skb;
  29068. + struct ieee80211_probe_response *b;
  29069. +// printk("=========>%s()\n", __FUNCTION__);
  29070. + skb = ieee80211_get_beacon_(ieee);
  29071. + if(!skb)
  29072. + return NULL;
  29073. +
  29074. + b = (struct ieee80211_probe_response *) skb->data;
  29075. + b->header.seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
  29076. +
  29077. + if (ieee->seq_ctrl[0] == 0xFFF)
  29078. + ieee->seq_ctrl[0] = 0;
  29079. + else
  29080. + ieee->seq_ctrl[0]++;
  29081. +
  29082. + return skb;
  29083. +}
  29084. +
  29085. +void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)
  29086. +{
  29087. + ieee->sync_scan_hurryup = 1;
  29088. + down(&ieee->wx_sem);
  29089. + ieee80211_stop_protocol(ieee);
  29090. + up(&ieee->wx_sem);
  29091. +}
  29092. +
  29093. +
  29094. +void ieee80211_stop_protocol(struct ieee80211_device *ieee)
  29095. +{
  29096. + if (!ieee->proto_started)
  29097. + return;
  29098. +
  29099. + ieee->proto_started = 0;
  29100. + //printk("=====>%s\n", __func__);
  29101. +
  29102. +#ifdef _RTL8187_EXT_PATCH_
  29103. + if(ieee->ext_patch_ieee80211_stop_protocol)
  29104. + ieee->ext_patch_ieee80211_stop_protocol(ieee);
  29105. +//if call queue_delayed_work,can call this,or do nothing..
  29106. +//edit by lawrence,20071118
  29107. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  29108. +// cancel_delayed_work(&ieee->ext_stop_scan_wq);
  29109. +// cancel_delayed_work(&ieee->ext_send_beacon_wq);
  29110. +#endif
  29111. +#endif // _RTL8187_EXT_PATCH_
  29112. +
  29113. + ieee80211_stop_send_beacons(ieee);
  29114. +
  29115. + del_timer_sync(&ieee->associate_timer);
  29116. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  29117. + cancel_delayed_work(&ieee->associate_retry_wq);
  29118. + cancel_delayed_work(&ieee->start_ibss_wq); //cancel ibss start workqueue when stop protocol
  29119. +#endif
  29120. + ieee80211_stop_scan(ieee);
  29121. +
  29122. + ieee80211_disassociate(ieee);
  29123. + //printk("<=====%s\n", __func__);
  29124. +
  29125. +}
  29126. +
  29127. +void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
  29128. +{
  29129. + ieee->sync_scan_hurryup = 0;
  29130. + down(&ieee->wx_sem);
  29131. + ieee80211_start_protocol(ieee);
  29132. + up(&ieee->wx_sem);
  29133. +}
  29134. +
  29135. +void ieee80211_start_protocol(struct ieee80211_device *ieee)
  29136. +{
  29137. + short ch = 0;
  29138. + int i = 0;
  29139. +
  29140. + if (ieee->proto_started)
  29141. + return;
  29142. +
  29143. + //printk("=====>%s\n", __func__);
  29144. +
  29145. + ieee->proto_started = 1;
  29146. +
  29147. + if (ieee->current_network.channel == 0){
  29148. + do{
  29149. + ch++;
  29150. + if (ch > MAX_CHANNEL_NUMBER)
  29151. + return; /* no channel found */
  29152. +#ifdef ENABLE_DOT11D
  29153. + }while(!GET_DOT11D_INFO(ieee)->channel_map[ch]);
  29154. +#else
  29155. + }while(!ieee->channel_map[ch]);
  29156. +#endif
  29157. + ieee->current_network.channel = ch;
  29158. + }
  29159. +
  29160. + if (ieee->current_network.beacon_interval == 0)
  29161. + ieee->current_network.beacon_interval = 100;
  29162. +
  29163. + ieee->set_chan(ieee->dev,ieee->current_network.channel);
  29164. + mdelay(10);//must or link change will fail lzm
  29165. +
  29166. + for(i = 0; i < 17; i++) {
  29167. + ieee->last_rxseq_num[i] = -1;
  29168. + ieee->last_rxfrag_num[i] = -1;
  29169. + ieee->last_packet_time[i] = 0;
  29170. + }
  29171. +
  29172. + ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers.
  29173. +
  29174. +
  29175. + /* if the user set the MAC of the ad-hoc cell and then
  29176. + * switch to managed mode, shall we make sure that association
  29177. + * attempts does not fail just because the user provide the essid
  29178. + * and the nic is still checking for the AP MAC ??
  29179. + */
  29180. +
  29181. + if (ieee->iw_mode == IW_MODE_INFRA){
  29182. + ieee80211_start_bss(ieee);
  29183. + // printk("==========> IW_MODE_INFRA\n");
  29184. + }
  29185. + else if (ieee->iw_mode == IW_MODE_ADHOC){
  29186. + // printk("==========> IW_MODE_ADHOC\n");
  29187. + ieee80211_start_ibss(ieee);
  29188. + }
  29189. + else if (ieee->iw_mode == IW_MODE_MASTER){
  29190. + ieee80211_start_master_bss(ieee);
  29191. +// printk("==========> IW_MODE_MASTER\n");
  29192. + }
  29193. + else if(ieee->iw_mode == IW_MODE_MONITOR){
  29194. + ieee80211_start_monitor_mode(ieee);
  29195. +// printk("==========> IW_MODE_MONITOR\n");
  29196. + }
  29197. +
  29198. +#ifdef _RTL8187_EXT_PATCH_
  29199. +// else if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_start_protocol && ieee->ext_patch_ieee80211_start_protocol(ieee))
  29200. + else if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_start_protocol)
  29201. + {
  29202. + ieee->ext_patch_ieee80211_start_mesh(ieee);
  29203. + }
  29204. +#endif
  29205. +}
  29206. +
  29207. +
  29208. +#define DRV_NAME "Ieee80211"
  29209. +void ieee80211_softmac_init(struct ieee80211_device *ieee)
  29210. +{
  29211. + int i;
  29212. + memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
  29213. +
  29214. + ieee->state = IEEE80211_NOLINK;
  29215. + ieee->sync_scan_hurryup = 0;
  29216. + for(i = 0; i < 5; i++) {
  29217. + ieee->seq_ctrl[i] = 0;
  29218. + }
  29219. +
  29220. + ieee->assoc_id = 0;
  29221. + ieee->queue_stop = 0;
  29222. + ieee->scanning = 0;
  29223. + ieee->scan_watchdog = 0;//lzm add 081215 for roaming
  29224. + ieee->softmac_features = 0; //so IEEE2100-like driver are happy
  29225. + ieee->wap_set = 0;
  29226. + ieee->ssid_set = 0;
  29227. + ieee->proto_started = 0;
  29228. + ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
  29229. + ieee->rate = 3;
  29230. + ieee->ps = IEEE80211_PS_DISABLED;
  29231. + ieee->sta_sleep = 0;
  29232. +//by amy
  29233. + ieee->bInactivePs = false;
  29234. + ieee->actscanning = false;
  29235. + ieee->ListenInterval = 2;
  29236. + ieee->NumRxData = 0;
  29237. + ieee->NumRxDataInPeriod = 0; //YJ,add,080828
  29238. + ieee->NumRxBcnInPeriod = 0; //YJ,add,080828
  29239. + ieee->bHwRadioOff = false;//by lizhaoming
  29240. +//by amy
  29241. +#ifdef _RTL8187_EXT_PATCH_
  29242. + ieee->iw_ext_mode = 999;
  29243. +#endif
  29244. +
  29245. + init_mgmt_queue(ieee);
  29246. +
  29247. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
  29248. + init_timer(&ieee->scan_timer);
  29249. + ieee->scan_timer.data = (unsigned long)ieee;
  29250. + ieee->scan_timer.function = ieee80211_softmac_scan_cb;
  29251. +#endif
  29252. + ieee->tx_pending.txb = NULL;
  29253. +
  29254. + init_timer(&ieee->associate_timer);
  29255. + ieee->associate_timer.data = (unsigned long)ieee;
  29256. + ieee->associate_timer.function = ieee80211_associate_abort_cb;
  29257. +
  29258. + init_timer(&ieee->beacon_timer);
  29259. + ieee->beacon_timer.data = (unsigned long) ieee;
  29260. + ieee->beacon_timer.function = ieee80211_send_beacon_cb;
  29261. +
  29262. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  29263. +#ifdef PF_SYNCTHREAD
  29264. + ieee->wq = create_workqueue(DRV_NAME,0);
  29265. +#else
  29266. + ieee->wq = create_workqueue(DRV_NAME);
  29267. +#endif
  29268. +#endif
  29269. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  29270. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)//added by lawrence,070702
  29271. + INIT_DELAYED_WORK(&ieee->start_ibss_wq, ieee80211_start_ibss_wq);
  29272. + INIT_WORK(&ieee->associate_complete_wq, ieee80211_associate_complete_wq);
  29273. + INIT_WORK(&ieee->associate_procedure_wq, ieee80211_associate_procedure_wq);
  29274. + INIT_DELAYED_WORK(&ieee->softmac_scan_wq, ieee80211_softmac_scan_wq);
  29275. + INIT_DELAYED_WORK(&ieee->associate_retry_wq, ieee80211_associate_retry_wq);
  29276. + INIT_WORK(&ieee->wx_sync_scan_wq, ieee80211_wx_sync_scan_wq);
  29277. +//added by lawrence,20071118
  29278. +#ifdef _RTL8187_EXT_PATCH_
  29279. + INIT_WORK(&ieee->ext_stop_scan_wq, ieee80211_ext_stop_scan_wq);
  29280. + //INIT_WORK(&ieee->ext_send_beacon_wq, ieee80211_beacons_start,ieee);
  29281. + INIT_WORK(&ieee->ext_send_beacon_wq, ext_ieee80211_send_beacon_wq);
  29282. +#endif //_RTL8187_EXT_PATCH_
  29283. +#else
  29284. + INIT_WORK(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
  29285. + INIT_WORK(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
  29286. + INIT_WORK(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
  29287. + INIT_WORK(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
  29288. + INIT_WORK(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
  29289. + INIT_WORK(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
  29290. +#ifdef _RTL8187_EXT_PATCH_
  29291. + INIT_WORK(&ieee->ext_stop_scan_wq,(void(*)(void*)) ieee80211_ext_stop_scan_wq,ieee);
  29292. + //INIT_WORK(&ieee->ext_send_beacon_wq,(void(*)(void*)) ieee80211_beacons_start,ieee);
  29293. + INIT_WORK(&ieee->ext_send_beacon_wq,(void(*)(void*)) ext_ieee80211_send_beacon_wq,ieee);
  29294. +#endif
  29295. +#endif
  29296. +#else
  29297. + tq_init(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
  29298. + tq_init(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
  29299. + tq_init(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
  29300. + tq_init(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
  29301. + tq_init(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
  29302. + tq_init(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
  29303. +#ifdef _RTL8187_EXT_PATCH_
  29304. + tq_init(&ieee->ext_stop_scan_wq,(void(*)(void*)) ieee80211_ext_stop_scan_wq,ieee);
  29305. + //tq_init(&ieee->ext_send_beacon_wq,(void(*)(void*)) ieee80211_beacons_start,ieee);
  29306. + tq_init(&ieee->ext_send_beacon_wq,(void(*)(void*)) ext_ieee80211_send_beacon_wq,ieee);
  29307. +#endif
  29308. +#endif
  29309. + sema_init(&ieee->wx_sem, 1);
  29310. + sema_init(&ieee->scan_sem, 1);
  29311. + sema_init(&ieee->ips_sem,1);
  29312. + spin_lock_init(&ieee->mgmt_tx_lock);
  29313. + spin_lock_init(&ieee->beacon_lock);
  29314. + spin_lock_init(&ieee->beaconflag_lock);
  29315. + tasklet_init(&ieee->ps_task,
  29316. + (void(*)(unsigned long)) ieee80211_sta_ps,
  29317. + (unsigned long)ieee);
  29318. +#ifdef ENABLE_DOT11D
  29319. + ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
  29320. +#endif
  29321. +
  29322. +}
  29323. +
  29324. +void ieee80211_softmac_free(struct ieee80211_device *ieee)
  29325. +{
  29326. + down(&ieee->wx_sem);
  29327. +
  29328. + del_timer_sync(&ieee->associate_timer);
  29329. +
  29330. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  29331. + cancel_delayed_work(&ieee->associate_retry_wq);
  29332. +
  29333. +
  29334. +
  29335. +#ifdef _RTL8187_EXT_PATCH_
  29336. + //When kernel>2.6.20,crash....
  29337. +// cancel_delayed_work(&ieee->ext_stop_scan_wq);
  29338. +// cancel_delayed_work(&ieee->ext_send_beacon_wq);
  29339. +#endif
  29340. + destroy_workqueue(ieee->wq);
  29341. +#endif
  29342. +
  29343. +#ifdef ENABLE_DOT11D
  29344. + if(NULL != ieee->pDot11dInfo)
  29345. + kfree(ieee->pDot11dInfo);
  29346. +#endif
  29347. +
  29348. + up(&ieee->wx_sem);
  29349. +}
  29350. +
  29351. +/********************************************************
  29352. + * Start of WPA code. *
  29353. + * this is stolen from the ipw2200 driver *
  29354. + ********************************************************/
  29355. +
  29356. +
  29357. +static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
  29358. +{
  29359. + /* This is called when wpa_supplicant loads and closes the driver
  29360. + * interface. */
  29361. + printk("%s WPA\n",value ? "enabling" : "disabling");
  29362. + ieee->wpa_enabled = value;
  29363. + return 0;
  29364. +}
  29365. +
  29366. +
  29367. +void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie, int wpa_ie_len)
  29368. +{
  29369. + /* make sure WPA is enabled */
  29370. + ieee80211_wpa_enable(ieee, 1);
  29371. +
  29372. + ieee80211_disassociate(ieee);
  29373. +}
  29374. +
  29375. +
  29376. +static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command, int reason)
  29377. +{
  29378. +
  29379. + int ret = 0;
  29380. +
  29381. + switch (command) {
  29382. + case IEEE_MLME_STA_DEAUTH:
  29383. + // silently ignore
  29384. + break;
  29385. +
  29386. + case IEEE_MLME_STA_DISASSOC:
  29387. + ieee80211_disassociate(ieee);
  29388. + break;
  29389. +
  29390. + default:
  29391. + printk("Unknown MLME request: %d\n", command);
  29392. + ret = -EOPNOTSUPP;
  29393. + }
  29394. +
  29395. + return ret;
  29396. +}
  29397. +
  29398. +
  29399. +static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
  29400. + struct ieee_param *param, int plen)
  29401. +{
  29402. + u8 *buf;
  29403. +
  29404. + if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
  29405. + (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
  29406. + return -EINVAL;
  29407. +
  29408. + if (param->u.wpa_ie.len) {
  29409. + buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
  29410. + if (buf == NULL)
  29411. + return -ENOMEM;
  29412. +
  29413. + memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
  29414. + kfree(ieee->wpa_ie);
  29415. + ieee->wpa_ie = buf;
  29416. + ieee->wpa_ie_len = param->u.wpa_ie.len;
  29417. + } else {
  29418. + kfree(ieee->wpa_ie);
  29419. + ieee->wpa_ie = NULL;
  29420. + ieee->wpa_ie_len = 0;
  29421. + }
  29422. +
  29423. + ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
  29424. + return 0;
  29425. +}
  29426. +
  29427. +#define AUTH_ALG_OPEN_SYSTEM 0x1
  29428. +#define AUTH_ALG_SHARED_KEY 0x2
  29429. +
  29430. +static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
  29431. +{
  29432. +
  29433. + struct ieee80211_security sec = {
  29434. + .flags = SEC_AUTH_MODE,
  29435. + };
  29436. + int ret = 0;
  29437. +
  29438. + if (value & AUTH_ALG_SHARED_KEY) {
  29439. + sec.auth_mode = WLAN_AUTH_SHARED_KEY;
  29440. + ieee->open_wep = 0;
  29441. + } else {
  29442. + sec.auth_mode = WLAN_AUTH_OPEN;
  29443. + ieee->open_wep = 1;
  29444. + }
  29445. +
  29446. + if (ieee->set_security)
  29447. + ieee->set_security(ieee->dev, &sec);
  29448. + else
  29449. + ret = -EOPNOTSUPP;
  29450. +
  29451. + return ret;
  29452. +}
  29453. +
  29454. +static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name, u32 value)
  29455. +{
  29456. + int ret=0;
  29457. + unsigned long flags;
  29458. +
  29459. + switch (name) {
  29460. + case IEEE_PARAM_WPA_ENABLED:
  29461. + ret = ieee80211_wpa_enable(ieee, value);
  29462. + break;
  29463. +
  29464. + case IEEE_PARAM_TKIP_COUNTERMEASURES:
  29465. + ieee->tkip_countermeasures=value;
  29466. + break;
  29467. +
  29468. + case IEEE_PARAM_DROP_UNENCRYPTED: {
  29469. + /* HACK:
  29470. + *
  29471. + * wpa_supplicant calls set_wpa_enabled when the driver
  29472. + * is loaded and unloaded, regardless of if WPA is being
  29473. + * used. No other calls are made which can be used to
  29474. + * determine if encryption will be used or not prior to
  29475. + * association being expected. If encryption is not being
  29476. + * used, drop_unencrypted is set to false, else true -- we
  29477. + * can use this to determine if the CAP_PRIVACY_ON bit should
  29478. + * be set.
  29479. + */
  29480. + struct ieee80211_security sec = {
  29481. + .flags = SEC_ENABLED,
  29482. + .enabled = value,
  29483. + };
  29484. + ieee->drop_unencrypted = value;
  29485. + /* We only change SEC_LEVEL for open mode. Others
  29486. + * are set by ipw_wpa_set_encryption.
  29487. + */
  29488. + if (!value) {
  29489. + sec.flags |= SEC_LEVEL;
  29490. + sec.level = SEC_LEVEL_0;
  29491. + }
  29492. + else {
  29493. + sec.flags |= SEC_LEVEL;
  29494. + sec.level = SEC_LEVEL_1;
  29495. + }
  29496. + if (ieee->set_security)
  29497. + ieee->set_security(ieee->dev, &sec);
  29498. + break;
  29499. + }
  29500. +
  29501. + case IEEE_PARAM_PRIVACY_INVOKED:
  29502. + ieee->privacy_invoked=value;
  29503. + break;
  29504. +
  29505. + case IEEE_PARAM_AUTH_ALGS:
  29506. + ret = ieee80211_wpa_set_auth_algs(ieee, value);
  29507. + break;
  29508. +
  29509. + case IEEE_PARAM_IEEE_802_1X:
  29510. + ieee->ieee802_1x=value;
  29511. + break;
  29512. + case IEEE_PARAM_WPAX_SELECT:
  29513. + // added for WPA2 mixed mode
  29514. + //printk(KERN_WARNING "------------------------>wpax value = %x\n", value);
  29515. + spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
  29516. + ieee->wpax_type_set = 1;
  29517. + ieee->wpax_type_notify = value;
  29518. + spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
  29519. + break;
  29520. +
  29521. + default:
  29522. + printk("Unknown WPA param: %d\n",name);
  29523. + ret = -EOPNOTSUPP;
  29524. + }
  29525. +
  29526. + return ret;
  29527. +}
  29528. +
  29529. +/* implementation borrowed from hostap driver */
  29530. +
  29531. +static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
  29532. + struct ieee_param *param, int param_len)
  29533. +{
  29534. + int ret = 0;
  29535. +
  29536. + struct ieee80211_crypto_ops *ops;
  29537. + struct ieee80211_crypt_data **crypt;
  29538. +
  29539. + struct ieee80211_security sec = {
  29540. + .flags = 0,
  29541. + };
  29542. +
  29543. + param->u.crypt.err = 0;
  29544. + param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
  29545. +
  29546. + if (param_len !=
  29547. + (int) ((char *) param->u.crypt.key - (char *) param) +
  29548. + param->u.crypt.key_len) {
  29549. + printk("Len mismatch %d, %d\n", param_len,
  29550. + param->u.crypt.key_len);
  29551. + return -EINVAL;
  29552. + }
  29553. + if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
  29554. + param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
  29555. + param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
  29556. + if (param->u.crypt.idx >= WEP_KEYS)
  29557. + return -EINVAL;
  29558. +#ifdef _RTL8187_EXT_PATCH_
  29559. + crypt = &ieee->cryptlist[0]->crypt[param->u.crypt.idx];
  29560. +#else
  29561. + crypt = &ieee->crypt[param->u.crypt.idx];
  29562. +#endif
  29563. +
  29564. + } else {
  29565. + return -EINVAL;
  29566. + }
  29567. +
  29568. + if (strcmp(param->u.crypt.alg, "none") == 0) {
  29569. + if (crypt) {
  29570. + sec.enabled = 0;
  29571. + // FIXME FIXME
  29572. + //sec.encrypt = 0;
  29573. + sec.level = SEC_LEVEL_0;
  29574. + sec.flags |= SEC_ENABLED | SEC_LEVEL;
  29575. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  29576. + }
  29577. + goto done;
  29578. + }
  29579. + sec.enabled = 1;
  29580. +// FIXME FIXME
  29581. +// sec.encrypt = 1;
  29582. + sec.flags |= SEC_ENABLED;
  29583. +
  29584. + /* IPW HW cannot build TKIP MIC, host decryption still needed. */
  29585. + if (!(ieee->host_encrypt || ieee->host_decrypt) &&
  29586. + strcmp(param->u.crypt.alg, "TKIP"))
  29587. + goto skip_host_crypt;
  29588. +
  29589. + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
  29590. + if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
  29591. + request_module("ieee80211_crypt_wep");
  29592. + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
  29593. + } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
  29594. + request_module("ieee80211_crypt_tkip");
  29595. + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
  29596. + } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
  29597. + request_module("ieee80211_crypt_ccmp");
  29598. + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
  29599. + }
  29600. + if (ops == NULL) {
  29601. + printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
  29602. + param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
  29603. + ret = -EINVAL;
  29604. + goto done;
  29605. + }
  29606. +
  29607. +#ifdef _RTL8187_EXT_PATCH_
  29608. + u8 i;
  29609. + for (i=0; i<MAX_MP; i++){
  29610. + crypt = &ieee->cryptlist[i]->crypt[param->u.crypt.idx];
  29611. +// if (crypt != NULL) printk("crypt not null\n", crypt);
  29612. +
  29613. + *crypt = ieee->cryptlist[i]->crypt[param->u.crypt.idx];
  29614. +#endif
  29615. + if (*crypt == NULL || (*crypt)->ops != ops) {
  29616. + struct ieee80211_crypt_data *new_crypt;
  29617. +
  29618. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  29619. +
  29620. + new_crypt = (struct ieee80211_crypt_data *)
  29621. + kmalloc(sizeof(*new_crypt), GFP_KERNEL);
  29622. + if (new_crypt == NULL) {
  29623. + ret = -ENOMEM;
  29624. + goto done;
  29625. + }
  29626. + memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
  29627. + new_crypt->ops = ops;
  29628. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  29629. + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
  29630. +#else
  29631. + if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
  29632. +#endif
  29633. + new_crypt->priv =
  29634. + new_crypt->ops->init(param->u.crypt.idx);
  29635. +
  29636. + if (new_crypt->priv == NULL) {
  29637. + kfree(new_crypt);
  29638. + param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
  29639. + ret = -EINVAL;
  29640. + goto done;
  29641. + }
  29642. +
  29643. + *crypt = new_crypt;
  29644. + }
  29645. +
  29646. + if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
  29647. + (*crypt)->ops->set_key(param->u.crypt.key,
  29648. + param->u.crypt.key_len, param->u.crypt.seq,
  29649. + (*crypt)->priv) < 0) {
  29650. + printk("key setting failed\n");
  29651. + param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
  29652. + ret = -EINVAL;
  29653. + goto done;
  29654. + }
  29655. +#ifdef _RTL8187_EXT_PATCH_
  29656. + }
  29657. +#endif
  29658. + skip_host_crypt:
  29659. + if (param->u.crypt.set_tx) {
  29660. + ieee->tx_keyidx = param->u.crypt.idx;
  29661. + sec.active_key = param->u.crypt.idx;
  29662. + sec.flags |= SEC_ACTIVE_KEY;
  29663. + } else
  29664. + sec.flags &= ~SEC_ACTIVE_KEY;
  29665. +
  29666. + if (param->u.crypt.alg != NULL) {
  29667. + memcpy(sec.keys[param->u.crypt.idx],
  29668. + param->u.crypt.key,
  29669. + param->u.crypt.key_len);
  29670. + sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
  29671. + sec.flags |= (1 << param->u.crypt.idx);
  29672. +
  29673. + if (strcmp(param->u.crypt.alg, "WEP") == 0) {
  29674. + sec.flags |= SEC_LEVEL;
  29675. + sec.level = SEC_LEVEL_1;
  29676. + } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
  29677. + sec.flags |= SEC_LEVEL;
  29678. + sec.level = SEC_LEVEL_2;
  29679. + } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
  29680. + sec.flags |= SEC_LEVEL;
  29681. + sec.level = SEC_LEVEL_3;
  29682. + }
  29683. + }
  29684. + done:
  29685. + if (ieee->set_security)
  29686. + ieee->set_security(ieee->dev, &sec);
  29687. +#if 1
  29688. +#ifdef _RTL8187_EXT_PATCH_
  29689. + if (ret != 0)//error out
  29690. + {
  29691. + for (i=0; i<MAX_MP; i++)
  29692. + {
  29693. + if (ieee->cryptlist[i]->crypt[param->u.crypt.idx]==NULL){
  29694. + break;
  29695. + }
  29696. + else{
  29697. + //if (ieee->cryptlist[i]->crypt[param->u.crypt.idx] != NULL)
  29698. + // {
  29699. + kfree(ieee->cryptlist[i]->crypt[param->u.crypt.idx]);
  29700. + ieee->cryptlist[i]->crypt[param->u.crypt.idx] = NULL;
  29701. + // }
  29702. + // kfree(ieee->cryptlist[i]);
  29703. + // ieee->cryptlist[i] = NULL;
  29704. + }
  29705. + }
  29706. + }
  29707. +#endif
  29708. +#endif
  29709. + /* Do not reset port if card is in Managed mode since resetting will
  29710. + * generate new IEEE 802.11 authentication which may end up in looping
  29711. + * with IEEE 802.1X. If your hardware requires a reset after WEP
  29712. + * configuration (for example... Prism2), implement the reset_port in
  29713. + * the callbacks structures used to initialize the 802.11 stack. */
  29714. + if (ieee->reset_on_keychange &&
  29715. + ieee->iw_mode != IW_MODE_INFRA &&
  29716. + ieee->reset_port &&
  29717. + ieee->reset_port(ieee->dev)) {
  29718. + printk("reset_port failed\n");
  29719. + param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
  29720. + return -EINVAL;
  29721. + }
  29722. +
  29723. + return ret;
  29724. +}
  29725. +
  29726. +int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p)
  29727. +{
  29728. + struct ieee_param *param;
  29729. + int ret=0;
  29730. +
  29731. + down(&ieee->wx_sem);
  29732. + //IEEE_DEBUG_INFO("wpa_supplicant: len=%d\n", p->length);
  29733. +
  29734. + if (p->length < sizeof(struct ieee_param) || !p->pointer){
  29735. + ret = -EINVAL;
  29736. + goto out;
  29737. + }
  29738. +
  29739. + param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
  29740. + if (param == NULL){
  29741. + ret = -ENOMEM;
  29742. + goto out;
  29743. + }
  29744. + if (copy_from_user(param, p->pointer, p->length)) {
  29745. + kfree(param);
  29746. + ret = -EFAULT;
  29747. + goto out;
  29748. + }
  29749. +
  29750. + switch (param->cmd) {
  29751. +
  29752. + case IEEE_CMD_SET_WPA_PARAM:
  29753. + ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
  29754. + param->u.wpa_param.value);
  29755. + break;
  29756. +
  29757. + case IEEE_CMD_SET_WPA_IE:
  29758. + ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
  29759. + break;
  29760. +
  29761. + case IEEE_CMD_SET_ENCRYPTION:
  29762. + ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
  29763. + break;
  29764. +
  29765. + case IEEE_CMD_MLME:
  29766. + ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
  29767. + param->u.mlme.reason_code);
  29768. + break;
  29769. +
  29770. + default:
  29771. + printk("Unknown WPA supplicant request: %d\n",param->cmd);
  29772. + ret = -EOPNOTSUPP;
  29773. + break;
  29774. + }
  29775. +
  29776. + if (ret == 0 && copy_to_user(p->pointer, param, p->length))
  29777. + ret = -EFAULT;
  29778. +
  29779. + kfree(param);
  29780. +out:
  29781. + up(&ieee->wx_sem);
  29782. +
  29783. + return ret;
  29784. +}
  29785. +
  29786. +void notify_wx_assoc_event(struct ieee80211_device *ieee)
  29787. +{
  29788. + union iwreq_data wrqu;
  29789. + wrqu.ap_addr.sa_family = ARPHRD_ETHER;
  29790. + if (ieee->state == IEEE80211_LINKED)
  29791. + memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
  29792. + else
  29793. + memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
  29794. + wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
  29795. +}
  29796. +
  29797. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  29798. +EXPORT_SYMBOL(ieee80211_get_beacon);
  29799. +EXPORT_SYMBOL(ieee80211_wake_queue);
  29800. +EXPORT_SYMBOL(ieee80211_stop_queue);
  29801. +EXPORT_SYMBOL(ieee80211_reset_queue);
  29802. +EXPORT_SYMBOL(ieee80211_softmac_stop_protocol);
  29803. +EXPORT_SYMBOL(ieee80211_softmac_start_protocol);
  29804. +EXPORT_SYMBOL(ieee80211_is_shortslot);
  29805. +EXPORT_SYMBOL(ieee80211_is_54g);
  29806. +EXPORT_SYMBOL(ieee80211_wpa_supplicant_ioctl);
  29807. +EXPORT_SYMBOL(ieee80211_ps_tx_ack);
  29808. +EXPORT_SYMBOL(notify_wx_assoc_event);
  29809. +EXPORT_SYMBOL(ieee80211_stop_send_beacons);
  29810. +EXPORT_SYMBOL(ieee80211_start_send_beacons);
  29811. +EXPORT_SYMBOL(ieee80211_start_scan_syncro);
  29812. +EXPORT_SYMBOL(ieee80211_start_protocol);
  29813. +EXPORT_SYMBOL(ieee80211_stop_protocol);
  29814. +EXPORT_SYMBOL(ieee80211_start_scan);
  29815. +EXPORT_SYMBOL(ieee80211_stop_scan);
  29816. +#ifdef _RTL8187_EXT_PATCH_
  29817. +EXPORT_SYMBOL(ieee80211_ext_issue_assoc_req);
  29818. +EXPORT_SYMBOL(ieee80211_ext_issue_disassoc);
  29819. +EXPORT_SYMBOL(ieee80211_ext_issue_assoc_rsp);
  29820. +EXPORT_SYMBOL(softmac_mgmt_xmit);
  29821. +EXPORT_SYMBOL(ieee80211_ext_probe_resp_by_net);
  29822. +EXPORT_SYMBOL(ieee80211_stop_scan);
  29823. +EXPORT_SYMBOL(ieee80211_ext_send_11s_beacon);
  29824. +EXPORT_SYMBOL(ieee80211_rx_auth_rq);
  29825. +EXPORT_SYMBOL(ieee80211_associate_step1);
  29826. +#endif // _RTL8187_EXT_PATCH_
  29827. +#else
  29828. +EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon);
  29829. +EXPORT_SYMBOL_NOVERS(ieee80211_wake_queue);
  29830. +EXPORT_SYMBOL_NOVERS(ieee80211_stop_queue);
  29831. +EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue);
  29832. +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol);
  29833. +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol);
  29834. +EXPORT_SYMBOL_NOVERS(ieee80211_is_shortslot);
  29835. +EXPORT_SYMBOL_NOVERS(ieee80211_is_54g);
  29836. +EXPORT_SYMBOL_NOVERS(ieee80211_wpa_supplicant_ioctl);
  29837. +EXPORT_SYMBOL_NOVERS(ieee80211_ps_tx_ack);
  29838. +EXPORT_SYMBOL_NOVERS(ieee80211_start_scan);
  29839. +EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);
  29840. +#ifdef _RTL8187_EXT_PATCH_
  29841. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_req);
  29842. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_disassoc);
  29843. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_rsp);
  29844. +EXPORT_SYMBOL_NOVERS(softmac_mgmt_xmit);
  29845. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_probe_resp_by_net);
  29846. +EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);
  29847. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_send_11s_beacon);
  29848. +EXPORT_SYMBOL_NOVERS(ieee80211_rx_auth_rq);
  29849. +EXPORT_SYMBOL(ieee80211_associate_step1);
  29850. +#endif // _RTL8187_EXT_PATCH_
  29851. +
  29852. +#endif
  29853. +//EXPORT_SYMBOL(ieee80211_sta_ps_send_null_frame);
  29854. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac_wx.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac_wx.c
  29855. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac_wx.c 1970-01-01 01:00:00.000000000 +0100
  29856. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_softmac_wx.c 2009-08-23 19:01:04.000000000 +0200
  29857. @@ -0,0 +1,629 @@
  29858. +/* IEEE 802.11 SoftMAC layer
  29859. + * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  29860. + *
  29861. + * Mostly extracted from the rtl8180-sa2400 driver for the
  29862. + * in-kernel generic ieee802.11 stack.
  29863. + *
  29864. + * Some pieces of code might be stolen from ipw2100 driver
  29865. + * copyright of who own it's copyright ;-)
  29866. + *
  29867. + * PS wx handler mostly stolen from hostap, copyright who
  29868. + * own it's copyright ;-)
  29869. + *
  29870. + * released under the GPL
  29871. + */
  29872. +
  29873. +
  29874. +#include "ieee80211.h"
  29875. +#ifdef ENABLE_DOT11D
  29876. +#include "dot11d.h"
  29877. +#endif
  29878. +
  29879. +/* FIXME: add A freqs */
  29880. +
  29881. +const long ieee80211_wlan_frequencies[] = {
  29882. + 2412, 2417, 2422, 2427,
  29883. + 2432, 2437, 2442, 2447,
  29884. + 2452, 2457, 2462, 2467,
  29885. + 2472, 2484
  29886. +};
  29887. +
  29888. +
  29889. +int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
  29890. + union iwreq_data *wrqu, char *b)
  29891. +{
  29892. + int ret;
  29893. + struct iw_freq *fwrq = & wrqu->freq;
  29894. +
  29895. + down(&ieee->wx_sem);
  29896. +
  29897. + if(ieee->iw_mode == IW_MODE_INFRA){
  29898. + ret = -EOPNOTSUPP;
  29899. + goto out;
  29900. + }
  29901. +
  29902. + /* if setting by freq convert to channel */
  29903. + if (fwrq->e == 1) {
  29904. + if ((fwrq->m >= (int) 2.412e8 &&
  29905. + fwrq->m <= (int) 2.487e8)) {
  29906. + int f = fwrq->m / 100000;
  29907. + int c = 0;
  29908. +
  29909. + while ((c < 14) && (f != ieee80211_wlan_frequencies[c]))
  29910. + c++;
  29911. +
  29912. + /* hack to fall through */
  29913. + fwrq->e = 0;
  29914. + fwrq->m = c + 1;
  29915. + }
  29916. + }
  29917. +
  29918. + if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1 ){
  29919. + ret = -EOPNOTSUPP;
  29920. + goto out;
  29921. +
  29922. + }else { /* Set the channel */
  29923. +
  29924. +#ifdef ENABLE_DOT11D
  29925. + if(!IsLegalChannel(ieee, fwrq->m) )
  29926. + {
  29927. + printk("channel(%d). is invalide\n", fwrq->m);
  29928. + ret = -EOPNOTSUPP;
  29929. + goto out;
  29930. + }
  29931. + else
  29932. + {
  29933. + if(ieee->iw_mode == IW_MODE_ADHOC)
  29934. + {
  29935. + if(ieee->MinPassiveChnlNum != MAX_CHANNEL_NUMBER+1)
  29936. + {
  29937. + if(fwrq->m >= ieee->MinPassiveChnlNum)
  29938. + {
  29939. + ret = -EOPNOTSUPP;
  29940. + goto out;
  29941. + }
  29942. + }
  29943. + }
  29944. + }
  29945. +#endif
  29946. + ieee->current_network.channel = fwrq->m;
  29947. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  29948. +
  29949. + if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
  29950. + if(ieee->state == IEEE80211_LINKED){
  29951. +
  29952. + ieee80211_stop_send_beacons(ieee);
  29953. + ieee80211_start_send_beacons(ieee);
  29954. + }
  29955. + }
  29956. +
  29957. + ret = 0;
  29958. +out:
  29959. + up(&ieee->wx_sem);
  29960. + return ret;
  29961. +}
  29962. +
  29963. +
  29964. +int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
  29965. + struct iw_request_info *a,
  29966. + union iwreq_data *wrqu, char *b)
  29967. +{
  29968. + struct iw_freq *fwrq = & wrqu->freq;
  29969. +
  29970. + if (ieee->current_network.channel == 0)
  29971. + return -1;
  29972. +
  29973. + fwrq->m = ieee->current_network.channel;
  29974. + fwrq->e = 0;
  29975. +
  29976. + return 0;
  29977. +}
  29978. +
  29979. +int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
  29980. + struct iw_request_info *info,
  29981. + union iwreq_data *wrqu, char *extra)
  29982. +{
  29983. + unsigned long flags;
  29984. +
  29985. + wrqu->ap_addr.sa_family = ARPHRD_ETHER;
  29986. +
  29987. + if (ieee->iw_mode == IW_MODE_MONITOR)
  29988. + return -1;
  29989. +
  29990. + /* We want avoid to give to the user inconsistent infos*/
  29991. + spin_lock_irqsave(&ieee->lock, flags);
  29992. +
  29993. + if (ieee->state != IEEE80211_LINKED &&
  29994. + ieee->state != IEEE80211_LINKED_SCANNING &&
  29995. + ieee->wap_set == 0)
  29996. +
  29997. + memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
  29998. + else
  29999. + memcpy(wrqu->ap_addr.sa_data,
  30000. + ieee->current_network.bssid, ETH_ALEN);
  30001. +
  30002. + spin_unlock_irqrestore(&ieee->lock, flags);
  30003. +
  30004. + return 0;
  30005. +}
  30006. +
  30007. +
  30008. +int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
  30009. + struct iw_request_info *info,
  30010. + union iwreq_data *awrq,
  30011. + char *extra)
  30012. +{
  30013. +
  30014. + int ret = 0;
  30015. + u8 zero[] = {0,0,0,0,0,0};
  30016. + unsigned long flags;
  30017. +
  30018. + short ifup = ieee->proto_started;//dev->flags & IFF_UP;
  30019. + struct sockaddr *temp = (struct sockaddr *)awrq;
  30020. +
  30021. + ieee->sync_scan_hurryup = 1;
  30022. +
  30023. + down(&ieee->wx_sem);
  30024. + /* use ifconfig hw ether */
  30025. + if (ieee->iw_mode == IW_MODE_MASTER){
  30026. + ret = -1;
  30027. + goto out;
  30028. + }
  30029. +
  30030. + if (temp->sa_family != ARPHRD_ETHER){
  30031. + ret = -EINVAL;
  30032. + goto out;
  30033. + }
  30034. +
  30035. + if (ifup)
  30036. + ieee80211_stop_protocol(ieee);
  30037. +
  30038. + /* just to avoid to give inconsistent infos in the
  30039. + * get wx method. not really needed otherwise
  30040. + */
  30041. + spin_lock_irqsave(&ieee->lock, flags);
  30042. +
  30043. + memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
  30044. + ieee->wap_set = memcmp(temp->sa_data, zero,ETH_ALEN)!=0;
  30045. +
  30046. + spin_unlock_irqrestore(&ieee->lock, flags);
  30047. +
  30048. + if (ifup)
  30049. + ieee80211_start_protocol(ieee);
  30050. +
  30051. +out:
  30052. + up(&ieee->wx_sem);
  30053. + return ret;
  30054. +}
  30055. +
  30056. + int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)
  30057. +{
  30058. + int len,ret = 0;
  30059. + unsigned long flags;
  30060. +
  30061. + if (ieee->iw_mode == IW_MODE_MONITOR)
  30062. + return -1;
  30063. +
  30064. + /* We want avoid to give to the user inconsistent infos*/
  30065. + spin_lock_irqsave(&ieee->lock, flags);
  30066. +
  30067. + if (ieee->current_network.ssid[0] == '\0' ||
  30068. + ieee->current_network.ssid_len == 0){
  30069. + ret = -1;
  30070. + goto out;
  30071. + }
  30072. +
  30073. + if (ieee->state != IEEE80211_LINKED &&
  30074. + ieee->state != IEEE80211_LINKED_SCANNING &&
  30075. + ieee->ssid_set == 0){
  30076. + ret = -1;
  30077. + goto out;
  30078. + }
  30079. + len = ieee->current_network.ssid_len;
  30080. + wrqu->essid.length = len;
  30081. + strncpy(b,ieee->current_network.ssid,len);
  30082. + wrqu->essid.flags = 1;
  30083. +
  30084. +out:
  30085. + spin_unlock_irqrestore(&ieee->lock, flags);
  30086. +
  30087. + return ret;
  30088. +
  30089. +}
  30090. +
  30091. +int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
  30092. + struct iw_request_info *info,
  30093. + union iwreq_data *wrqu, char *extra)
  30094. +{
  30095. +
  30096. + u32 target_rate = wrqu->bitrate.value;
  30097. +
  30098. + ieee->rate = target_rate/100000;
  30099. + //FIXME: we might want to limit rate also in management protocols.
  30100. + return 0;
  30101. +}
  30102. +
  30103. +
  30104. +
  30105. +int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
  30106. + struct iw_request_info *info,
  30107. + union iwreq_data *wrqu, char *extra)
  30108. +{
  30109. +
  30110. + wrqu->bitrate.value = ieee->rate * 100000;
  30111. +
  30112. + return 0;
  30113. +}
  30114. +
  30115. +int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
  30116. + union iwreq_data *wrqu, char *b)
  30117. +{
  30118. +
  30119. + ieee->sync_scan_hurryup = 1;
  30120. +
  30121. + down(&ieee->wx_sem);
  30122. + //printk("=======>%s\n", __func__);
  30123. +
  30124. + if (wrqu->mode == ieee->iw_mode)
  30125. + goto out;
  30126. +
  30127. + if (wrqu->mode == IW_MODE_MONITOR){
  30128. +
  30129. + ieee->dev->type = ARPHRD_IEEE80211;
  30130. + }else{
  30131. + ieee->dev->type = ARPHRD_ETHER;
  30132. + }
  30133. +
  30134. + if (!ieee->proto_started){
  30135. + ieee->iw_mode = wrqu->mode;
  30136. + }else{
  30137. + ieee80211_stop_protocol(ieee);
  30138. + ieee->iw_mode = wrqu->mode;
  30139. + ieee80211_start_protocol(ieee);
  30140. + }
  30141. +
  30142. +out:
  30143. + up(&ieee->wx_sem);
  30144. + return 0;
  30145. +}
  30146. +
  30147. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  30148. +void ieee80211_wx_sync_scan_wq(struct work_struct *work)
  30149. +{
  30150. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq);
  30151. +#else
  30152. +void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee)
  30153. +{
  30154. +#endif
  30155. + short chan;
  30156. +
  30157. + chan = ieee->current_network.channel;
  30158. +
  30159. + netif_carrier_off(ieee->dev);
  30160. +
  30161. + if (ieee->data_hard_stop)
  30162. + ieee->data_hard_stop(ieee->dev);
  30163. +
  30164. + ieee80211_stop_send_beacons(ieee);
  30165. +
  30166. + ieee->state = IEEE80211_LINKED_SCANNING;
  30167. + ieee->link_change(ieee->dev);
  30168. +
  30169. + ieee80211_start_scan_syncro(ieee);
  30170. +
  30171. + ieee->set_chan(ieee->dev, chan);
  30172. +
  30173. + ieee->state = IEEE80211_LINKED;
  30174. + ieee->link_change(ieee->dev);
  30175. +
  30176. + if (ieee->data_hard_resume)
  30177. + ieee->data_hard_resume(ieee->dev);
  30178. +
  30179. + if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
  30180. + ieee80211_start_send_beacons(ieee);
  30181. +
  30182. + netif_carrier_on(ieee->dev);
  30183. +
  30184. + up(&ieee->wx_sem);
  30185. +
  30186. +}
  30187. +
  30188. +int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
  30189. + union iwreq_data *wrqu, char *b)
  30190. +{
  30191. + int ret = 0;
  30192. +
  30193. + down(&ieee->wx_sem);
  30194. +
  30195. + if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){
  30196. + ret = -1;
  30197. + goto out;
  30198. + }
  30199. +
  30200. + if ( ieee->state == IEEE80211_LINKED){
  30201. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  30202. + queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
  30203. +#else
  30204. + schedule_task(&ieee->wx_sync_scan_wq);
  30205. +#endif
  30206. + /* intentionally forget to up sem */
  30207. + return 0;
  30208. + }
  30209. +
  30210. +out:
  30211. + up(&ieee->wx_sem);
  30212. + return ret;
  30213. +}
  30214. +
  30215. +int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
  30216. + struct iw_request_info *a,
  30217. + union iwreq_data *wrqu, char *extra)
  30218. +{
  30219. +
  30220. + int ret=0,len;
  30221. + short proto_started;
  30222. + unsigned long flags;
  30223. +
  30224. + ieee->sync_scan_hurryup = 1;
  30225. +
  30226. + down(&ieee->wx_sem);
  30227. +
  30228. + //printk("=======>%s\n", __func__);
  30229. + proto_started = ieee->proto_started;
  30230. +
  30231. + if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
  30232. + ret= -E2BIG;
  30233. + goto out;
  30234. + }
  30235. +
  30236. + if (ieee->iw_mode == IW_MODE_MONITOR){
  30237. + ret= -1;
  30238. + goto out;
  30239. + }
  30240. +
  30241. + if(proto_started){
  30242. + ieee80211_stop_protocol(ieee);
  30243. + }
  30244. +
  30245. + /* this is just to be sure that the GET wx callback
  30246. + * has consisten infos. not needed otherwise
  30247. + */
  30248. + spin_lock_irqsave(&ieee->lock, flags);
  30249. +
  30250. + if (wrqu->essid.flags && wrqu->essid.length) {
  30251. + len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
  30252. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  30253. + strncpy(ieee->current_network.ssid, extra, len);
  30254. + ieee->current_network.ssid_len = len;
  30255. +#else
  30256. + strncpy(ieee->current_network.ssid, extra, len+1);
  30257. + ieee->current_network.ssid_len = len+1;
  30258. +#endif
  30259. + ieee->ssid_set = 1;
  30260. + //YJ,add,080819,for hidden ap
  30261. + if(len == 0){
  30262. + memset(ieee->current_network.bssid, 0, ETH_ALEN);
  30263. + ieee->current_network.capability = 0;
  30264. + }
  30265. + //YJ,add,080819,for hidden ap,end
  30266. + }
  30267. + else{
  30268. + ieee->ssid_set = 0;
  30269. + ieee->current_network.ssid[0] = '\0';
  30270. + ieee->current_network.ssid_len = 0;
  30271. + }
  30272. +
  30273. + spin_unlock_irqrestore(&ieee->lock, flags);
  30274. +
  30275. + if (proto_started){
  30276. + ieee80211_start_protocol(ieee);
  30277. + }
  30278. +out:
  30279. + up(&ieee->wx_sem);
  30280. + return ret;
  30281. +}
  30282. +
  30283. + int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
  30284. + union iwreq_data *wrqu, char *b)
  30285. +{
  30286. +
  30287. + wrqu->mode = ieee->iw_mode;
  30288. + return 0;
  30289. +}
  30290. +
  30291. + int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
  30292. + struct iw_request_info *info,
  30293. + union iwreq_data *wrqu, char *extra)
  30294. +{
  30295. +
  30296. + int *parms = (int *)extra;
  30297. + int enable = (parms[0] > 0);
  30298. + short prev = ieee->raw_tx;
  30299. +
  30300. + down(&ieee->wx_sem);
  30301. +
  30302. + if(enable)
  30303. + ieee->raw_tx = 1;
  30304. + else
  30305. + ieee->raw_tx = 0;
  30306. +
  30307. + printk(KERN_INFO"raw TX is %s\n",
  30308. + ieee->raw_tx ? "enabled" : "disabled");
  30309. +
  30310. + if(ieee->iw_mode == IW_MODE_MONITOR)
  30311. + {
  30312. + if(prev == 0 && ieee->raw_tx){
  30313. + if (ieee->data_hard_resume)
  30314. + ieee->data_hard_resume(ieee->dev);
  30315. +
  30316. + netif_carrier_on(ieee->dev);
  30317. + }
  30318. +
  30319. + if(prev && ieee->raw_tx == 1)
  30320. + netif_carrier_off(ieee->dev);
  30321. + }
  30322. +
  30323. + up(&ieee->wx_sem);
  30324. +
  30325. + return 0;
  30326. +}
  30327. +
  30328. +int ieee80211_wx_get_name(struct ieee80211_device *ieee,
  30329. + struct iw_request_info *info,
  30330. + union iwreq_data *wrqu, char *extra)
  30331. +{
  30332. + strcpy(wrqu->name, "802.11");
  30333. + if(ieee->modulation & IEEE80211_CCK_MODULATION){
  30334. + strcat(wrqu->name, "b");
  30335. + if(ieee->modulation & IEEE80211_OFDM_MODULATION)
  30336. + strcat(wrqu->name, "/g");
  30337. + }else if(ieee->modulation & IEEE80211_OFDM_MODULATION)
  30338. + strcat(wrqu->name, "g");
  30339. +
  30340. + if((ieee->state == IEEE80211_LINKED) ||
  30341. + (ieee->state == IEEE80211_LINKED_SCANNING))
  30342. + strcat(wrqu->name," linked");
  30343. + else if(ieee->state != IEEE80211_NOLINK)
  30344. + strcat(wrqu->name," link..");
  30345. +
  30346. +
  30347. + return 0;
  30348. +}
  30349. +
  30350. +
  30351. +/* this is mostly stolen from hostap */
  30352. +int ieee80211_wx_set_power(struct ieee80211_device *ieee,
  30353. + struct iw_request_info *info,
  30354. + union iwreq_data *wrqu, char *extra)
  30355. +{
  30356. + int ret = 0;
  30357. +
  30358. + if(
  30359. + (!ieee->sta_wake_up) ||
  30360. + (!ieee->ps_request_tx_ack) ||
  30361. + (!ieee->enter_sleep_state) ||
  30362. + (!ieee->ps_is_queue_empty)){
  30363. +
  30364. + printk("ERROR. PS mode is tryied to be use but\
  30365. +driver missed a callback\n\n");
  30366. +
  30367. + return -1;
  30368. + }
  30369. +
  30370. + down(&ieee->wx_sem);
  30371. +
  30372. + if (wrqu->power.disabled){
  30373. + ieee->ps = IEEE80211_PS_DISABLED;
  30374. +
  30375. + goto exit;
  30376. + }
  30377. + switch (wrqu->power.flags & IW_POWER_MODE) {
  30378. + case IW_POWER_UNICAST_R:
  30379. + ieee->ps = IEEE80211_PS_UNICAST;
  30380. +
  30381. + break;
  30382. + case IW_POWER_ALL_R:
  30383. + ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST;
  30384. + break;
  30385. +
  30386. + case IW_POWER_ON:
  30387. + ieee->ps = IEEE80211_PS_DISABLED;
  30388. + break;
  30389. +
  30390. + default:
  30391. + ret = -EINVAL;
  30392. + goto exit;
  30393. + }
  30394. +
  30395. + if (wrqu->power.flags & IW_POWER_TIMEOUT) {
  30396. +
  30397. + ieee->ps_timeout = wrqu->power.value / 1000;
  30398. + printk("Timeout %d\n",ieee->ps_timeout);
  30399. + }
  30400. +
  30401. + if (wrqu->power.flags & IW_POWER_PERIOD) {
  30402. +
  30403. + ret = -EOPNOTSUPP;
  30404. + goto exit;
  30405. + //wrq->value / 1024;
  30406. +
  30407. + }
  30408. +exit:
  30409. + up(&ieee->wx_sem);
  30410. + return ret;
  30411. +
  30412. +}
  30413. +
  30414. +/* this is stolen from hostap */
  30415. +int ieee80211_wx_get_power(struct ieee80211_device *ieee,
  30416. + struct iw_request_info *info,
  30417. + union iwreq_data *wrqu, char *extra)
  30418. +{
  30419. + int ret =0;
  30420. +
  30421. + down(&ieee->wx_sem);
  30422. +
  30423. + if(ieee->ps == IEEE80211_PS_DISABLED){
  30424. + wrqu->power.disabled = 1;
  30425. + goto exit;
  30426. + }
  30427. +
  30428. + wrqu->power.disabled = 0;
  30429. +
  30430. +// if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
  30431. + wrqu->power.flags = IW_POWER_TIMEOUT;
  30432. + wrqu->power.value = ieee->ps_timeout * 1000;
  30433. +// } else {
  30434. +// ret = -EOPNOTSUPP;
  30435. +// goto exit;
  30436. + //wrqu->power.flags = IW_POWER_PERIOD;
  30437. + //wrqu->power.value = ieee->current_network.dtim_period *
  30438. + // ieee->current_network.beacon_interval * 1024;
  30439. +// }
  30440. +
  30441. +
  30442. + if (ieee->ps & IEEE80211_PS_MBCAST)
  30443. + wrqu->power.flags |= IW_POWER_ALL_R;
  30444. + else
  30445. + wrqu->power.flags |= IW_POWER_UNICAST_R;
  30446. +
  30447. +exit:
  30448. + up(&ieee->wx_sem);
  30449. + return ret;
  30450. +
  30451. +}
  30452. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  30453. +EXPORT_SYMBOL(ieee80211_wx_get_essid);
  30454. +EXPORT_SYMBOL(ieee80211_wx_set_essid);
  30455. +EXPORT_SYMBOL(ieee80211_wx_set_rate);
  30456. +EXPORT_SYMBOL(ieee80211_wx_get_rate);
  30457. +EXPORT_SYMBOL(ieee80211_wx_set_wap);
  30458. +EXPORT_SYMBOL(ieee80211_wx_get_wap);
  30459. +EXPORT_SYMBOL(ieee80211_wx_set_mode);
  30460. +EXPORT_SYMBOL(ieee80211_wx_get_mode);
  30461. +EXPORT_SYMBOL(ieee80211_wx_set_scan);
  30462. +EXPORT_SYMBOL(ieee80211_wx_get_freq);
  30463. +EXPORT_SYMBOL(ieee80211_wx_set_freq);
  30464. +EXPORT_SYMBOL(ieee80211_wx_set_rawtx);
  30465. +EXPORT_SYMBOL(ieee80211_wx_get_name);
  30466. +EXPORT_SYMBOL(ieee80211_wx_set_power);
  30467. +EXPORT_SYMBOL(ieee80211_wx_get_power);
  30468. +EXPORT_SYMBOL(ieee80211_wlan_frequencies);
  30469. +#else
  30470. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_essid);
  30471. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_essid);
  30472. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rate);
  30473. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_rate);
  30474. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_wap);
  30475. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_wap);
  30476. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_mode);
  30477. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_mode);
  30478. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_scan);
  30479. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_freq);
  30480. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_freq);
  30481. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rawtx);
  30482. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_name);
  30483. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_power);
  30484. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_power);
  30485. +EXPORT_SYMBOL_NOVERS(ieee80211_wlan_frequencies);
  30486. +#endif
  30487. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_tx.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_tx.c
  30488. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_tx.c 1970-01-01 01:00:00.000000000 +0100
  30489. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_tx.c 2009-08-23 19:01:04.000000000 +0200
  30490. @@ -0,0 +1,876 @@
  30491. +/******************************************************************************
  30492. +
  30493. + Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
  30494. +
  30495. + This program is free software; you can redistribute it and/or modify it
  30496. + under the terms of version 2 of the GNU General Public License as
  30497. + published by the Free Software Foundation.
  30498. +
  30499. + This program is distributed in the hope that it will be useful, but WITHOUT
  30500. + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  30501. + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  30502. + more details.
  30503. +
  30504. + You should have received a copy of the GNU General Public License along with
  30505. + this program; if not, write to the Free Software Foundation, Inc., 59
  30506. + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30507. +
  30508. + The full GNU General Public License is included in this distribution in the
  30509. + file called LICENSE.
  30510. +
  30511. + Contact Information:
  30512. + James P. Ketrenos <ipw2100-admin@linux.intel.com>
  30513. + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30514. +
  30515. +******************************************************************************
  30516. +
  30517. + Few modifications for Realtek's Wi-Fi drivers by
  30518. + Andrea Merello <andreamrl@tiscali.it>
  30519. +
  30520. + A special thanks goes to Realtek for their support !
  30521. +
  30522. +******************************************************************************/
  30523. +
  30524. +#include <linux/compiler.h>
  30525. +//#include <linux/config.h>
  30526. +#include <linux/errno.h>
  30527. +#include <linux/if_arp.h>
  30528. +#include <linux/in6.h>
  30529. +#include <linux/in.h>
  30530. +#include <linux/ip.h>
  30531. +#include <linux/kernel.h>
  30532. +#include <linux/module.h>
  30533. +#include <linux/netdevice.h>
  30534. +#include <linux/pci.h>
  30535. +#include <linux/proc_fs.h>
  30536. +#include <linux/skbuff.h>
  30537. +#include <linux/slab.h>
  30538. +#include <linux/tcp.h>
  30539. +#include <linux/types.h>
  30540. +#include <linux/version.h>
  30541. +#include <linux/wireless.h>
  30542. +#include <linux/etherdevice.h>
  30543. +#include <asm/uaccess.h>
  30544. +#include <linux/if_vlan.h>
  30545. +
  30546. +#include "ieee80211.h"
  30547. +
  30548. +
  30549. +/*
  30550. +
  30551. +
  30552. +802.11 Data Frame
  30553. +
  30554. +
  30555. +802.11 frame_contorl for data frames - 2 bytes
  30556. + ,-----------------------------------------------------------------------------------------.
  30557. +bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e |
  30558. + |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
  30559. +val | 0 | 0 | 0 | 1 | x | 0 | 0 | 0 | 1 | 0 | x | x | x | x | x |
  30560. + |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
  30561. +desc | ^-ver-^ | ^type-^ | ^-----subtype-----^ | to |from |more |retry| pwr |more |wep |
  30562. + | | | x=0 data,x=1 data+ack | DS | DS |frag | | mgm |data | |
  30563. + '-----------------------------------------------------------------------------------------'
  30564. + /\
  30565. + |
  30566. +802.11 Data Frame |
  30567. + ,--------- 'ctrl' expands to >-----------'
  30568. + |
  30569. + ,--'---,-------------------------------------------------------------.
  30570. +Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
  30571. + |------|------|---------|---------|---------|------|---------|------|
  30572. +Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
  30573. + | | tion | (BSSID) | | | ence | data | |
  30574. + `--------------------------------------------------| |------'
  30575. +Total: 28 non-data bytes `----.----'
  30576. + |
  30577. + .- 'Frame data' expands to <---------------------------'
  30578. + |
  30579. + V
  30580. + ,---------------------------------------------------.
  30581. +Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
  30582. + |------|------|---------|----------|------|---------|
  30583. +Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
  30584. + | DSAP | SSAP | | | | Packet |
  30585. + | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
  30586. + `-----------------------------------------| |
  30587. +Total: 8 non-data bytes `----.----'
  30588. + |
  30589. + .- 'IP Packet' expands, if WEP enabled, to <--'
  30590. + |
  30591. + V
  30592. + ,-----------------------.
  30593. +Bytes | 4 | 0-2296 | 4 |
  30594. + |-----|-----------|-----|
  30595. +Desc. | IV | Encrypted | ICV |
  30596. + | | IP Packet | |
  30597. + `-----------------------'
  30598. +Total: 8 non-data bytes
  30599. +
  30600. +
  30601. +802.3 Ethernet Data Frame
  30602. +
  30603. + ,-----------------------------------------.
  30604. +Bytes | 6 | 6 | 2 | Variable | 4 |
  30605. + |-------|-------|------|-----------|------|
  30606. +Desc. | Dest. | Source| Type | IP Packet | fcs |
  30607. + | MAC | MAC | | | |
  30608. + `-----------------------------------------'
  30609. +Total: 18 non-data bytes
  30610. +
  30611. +In the event that fragmentation is required, the incoming payload is split into
  30612. +N parts of size ieee->fts. The first fragment contains the SNAP header and the
  30613. +remaining packets are just data.
  30614. +
  30615. +If encryption is enabled, each fragment payload size is reduced by enough space
  30616. +to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
  30617. +So if you have 1500 bytes of payload with ieee->fts set to 500 without
  30618. +encryption it will take 3 frames. With WEP it will take 4 frames as the
  30619. +payload of each frame is reduced to 492 bytes.
  30620. +
  30621. +* SKB visualization
  30622. +*
  30623. +* ,- skb->data
  30624. +* |
  30625. +* | ETHERNET HEADER ,-<-- PAYLOAD
  30626. +* | | 14 bytes from skb->data
  30627. +* | 2 bytes for Type --> ,T. | (sizeof ethhdr)
  30628. +* | | | |
  30629. +* |,-Dest.--. ,--Src.---. | | |
  30630. +* | 6 bytes| | 6 bytes | | | |
  30631. +* v | | | | | |
  30632. +* 0 | v 1 | v | v 2
  30633. +* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
  30634. +* ^ | ^ | ^ |
  30635. +* | | | | | |
  30636. +* | | | | `T' <---- 2 bytes for Type
  30637. +* | | | |
  30638. +* | | '---SNAP--' <-------- 6 bytes for SNAP
  30639. +* | |
  30640. +* `-IV--' <-------------------- 4 bytes for IV (WEP)
  30641. +*
  30642. +* SNAP HEADER
  30643. +*
  30644. +*/
  30645. +
  30646. +static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
  30647. +static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
  30648. +
  30649. +static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
  30650. +{
  30651. + struct ieee80211_snap_hdr *snap;
  30652. + u8 *oui;
  30653. +
  30654. + snap = (struct ieee80211_snap_hdr *)data;
  30655. + snap->dsap = 0xaa;
  30656. + snap->ssap = 0xaa;
  30657. + snap->ctrl = 0x03;
  30658. +
  30659. + if (h_proto == 0x8137 || h_proto == 0x80f3)
  30660. + oui = P802_1H_OUI;
  30661. + else
  30662. + oui = RFC1042_OUI;
  30663. + snap->oui[0] = oui[0];
  30664. + snap->oui[1] = oui[1];
  30665. + snap->oui[2] = oui[2];
  30666. +
  30667. + *(u16 *)(data + SNAP_SIZE) = htons(h_proto);
  30668. +
  30669. + return SNAP_SIZE + sizeof(u16);
  30670. +}
  30671. +
  30672. +int ieee80211_encrypt_fragment(
  30673. + struct ieee80211_device *ieee,
  30674. + struct sk_buff *frag,
  30675. + int hdr_len)
  30676. +{
  30677. + struct ieee80211_crypt_data* crypt = NULL;//ieee->crypt[ieee->tx_keyidx];
  30678. + int res;//, i;
  30679. +// printk("====>wwwwww%s():ieee:%x, hdr_len:%d\n", __FUNCTION__, ieee, hdr_len);
  30680. +/* printk("\n%s(), hdr_len:%d\n", __FUNCTION__, hdr_len);
  30681. + for (i = 0; i < 48; i++) {
  30682. + if (i % 16 == 0) printk("\n\t");
  30683. + printk("%2x ", *(frag->data+i));
  30684. + }
  30685. +*/
  30686. +
  30687. +#ifdef _RTL8187_EXT_PATCH_
  30688. +#if 0
  30689. + i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*) frag->data)->addr1);
  30690. + if (i== -1){
  30691. + printk("error find MP entry in %s()\n", __FUNCTION__);
  30692. + return i;
  30693. + }
  30694. + // printk("%s():"MAC_FMT", find in index:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)frag->data)->addr1), i);
  30695. +#endif
  30696. +// crypt = ieee->cryptlist[MAX_MP-1]->crypt[ieee->tx_keyidx];
  30697. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  30698. +#else
  30699. + crypt = ieee->crypt[ieee->tx_keyidx];
  30700. +#endif
  30701. + /*added to care about null crypt condition, to solve that system hangs when shared keys error*/
  30702. + if (!crypt || !crypt->ops)
  30703. + return -1;
  30704. +
  30705. +#ifdef CONFIG_IEEE80211_CRYPT_TKIP
  30706. + struct ieee80211_hdr *header;
  30707. +
  30708. + if (ieee->tkip_countermeasures &&
  30709. + crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
  30710. + header = (struct ieee80211_hdr *) frag->data;
  30711. + if (net_ratelimit()) {
  30712. + printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
  30713. + "TX packet to " MAC_FMT "\n",
  30714. + ieee->dev->name, MAC_ARG(header->addr1));
  30715. + }
  30716. + return -1;
  30717. + }
  30718. +#endif
  30719. + /* To encrypt, frame format is:
  30720. + * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
  30721. +
  30722. + // PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU encryption.
  30723. + /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
  30724. + * call both MSDU and MPDU encryption functions from here. */
  30725. + atomic_inc(&crypt->refcnt);
  30726. + res = 0;
  30727. + if (crypt->ops->encrypt_msdu)
  30728. + res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
  30729. + if (res == 0 && crypt->ops->encrypt_mpdu)
  30730. + res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
  30731. + atomic_dec(&crypt->refcnt);
  30732. + if (res < 0) {
  30733. + printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
  30734. + ieee->dev->name, frag->len);
  30735. + ieee->ieee_stats.tx_discards++;
  30736. + return -1;
  30737. + }
  30738. +
  30739. + return 0;
  30740. +}
  30741. +
  30742. +
  30743. +void ieee80211_txb_free(struct ieee80211_txb *txb) {
  30744. + int i;
  30745. + if (unlikely(!txb))
  30746. + return;
  30747. + for (i = 0; i < txb->nr_frags; i++)
  30748. + if (txb->fragments[i])
  30749. + dev_kfree_skb_any(txb->fragments[i]);
  30750. + kfree(txb);
  30751. +}
  30752. +
  30753. +struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
  30754. + int gfp_mask)
  30755. +{
  30756. + struct ieee80211_txb *txb;
  30757. + int i;
  30758. + txb = kmalloc(
  30759. + sizeof(struct ieee80211_txb) + (sizeof(u8*) * nr_frags),
  30760. + gfp_mask);
  30761. + if (!txb)
  30762. + return NULL;
  30763. +
  30764. + memset(txb, 0, sizeof(struct ieee80211_txb));
  30765. + txb->nr_frags = nr_frags;
  30766. + txb->frag_size = txb_size;
  30767. +
  30768. + for (i = 0; i < nr_frags; i++) {
  30769. + txb->fragments[i] = dev_alloc_skb(txb_size);
  30770. + if (unlikely(!txb->fragments[i])) {
  30771. + i--;
  30772. + break;
  30773. + }
  30774. + }
  30775. + if (unlikely(i != nr_frags)) {
  30776. + while (i >= 0)
  30777. + dev_kfree_skb_any(txb->fragments[i--]);
  30778. + kfree(txb);
  30779. + return NULL;
  30780. + }
  30781. + return txb;
  30782. +}
  30783. +
  30784. +// Classify the to-be send data packet
  30785. +// Need to acquire the sent queue index.
  30786. +static int
  30787. +ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)
  30788. +{
  30789. + struct ether_header *eh = (struct ether_header*)skb->data;
  30790. + unsigned int wme_UP = 0;
  30791. +
  30792. + if(!network->QoS_Enable) {
  30793. + skb->priority = 0;
  30794. + return(wme_UP);
  30795. + }
  30796. +
  30797. + if(eh->ether_type == __constant_htons(ETHERTYPE_IP)) {
  30798. + const struct iphdr *ih = (struct iphdr*)(skb->data + \
  30799. + sizeof(struct ether_header));
  30800. + wme_UP = (ih->tos >> 5)&0x07;
  30801. + } else if (vlan_tx_tag_present(skb)) {//vtag packet
  30802. +#ifndef VLAN_PRI_SHIFT
  30803. +#define VLAN_PRI_SHIFT 13 /* Shift to find VLAN user priority */
  30804. +#define VLAN_PRI_MASK 7 /* Mask for user priority bits in VLAN */
  30805. +#endif
  30806. + u32 tag = vlan_tx_tag_get(skb);
  30807. + wme_UP = (tag >> VLAN_PRI_SHIFT) & VLAN_PRI_MASK;
  30808. + } else if(ETH_P_PAE == ntohs(((struct ethhdr *)skb->data)->h_proto)) {
  30809. + //printk(KERN_WARNING "type = normal packet\n");
  30810. + wme_UP = 7;
  30811. + }
  30812. + skb->priority = wme_UP;
  30813. +/*
  30814. + if (network->QoS_Enable) {
  30815. + skb->priority = wme_UP;
  30816. + }else {
  30817. + skb->priority = 0;
  30818. + }
  30819. +*/
  30820. + return(wme_UP);
  30821. +}
  30822. +
  30823. +#ifdef _RTL8187_EXT_PATCH_
  30824. +// based on part of ieee80211_xmit. Mainly allocate txb. ieee->lock is held
  30825. +struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)
  30826. +{
  30827. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  30828. + struct ieee80211_device *ieee = netdev_priv(dev);
  30829. +#else
  30830. + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
  30831. +#endif
  30832. + struct ieee80211_txb *txb = NULL;
  30833. + struct ieee80211_hdr_3addr *frag_hdr;
  30834. + int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
  30835. + int ether_type;
  30836. + int bytes, QOS_ctl;
  30837. + struct sk_buff *skb_frag;
  30838. +
  30839. + ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
  30840. +
  30841. + /* Advance the SKB to the start of the payload */
  30842. + skb_pull(skb, sizeof(struct ethhdr));
  30843. +
  30844. + /* Determine total amount of storage required for TXB packets */
  30845. + bytes = skb->len + SNAP_SIZE + sizeof(u16);
  30846. +
  30847. + /* Determine fragmentation size based on destination (multicast
  30848. + * and broadcast are not fragmented) */
  30849. + // if (is_multicast_ether_addr(dest) ||
  30850. + // is_broadcast_ether_addr(dest)) {
  30851. + if (is_multicast_ether_addr(header->addr1) ||
  30852. + is_broadcast_ether_addr(header->addr1)) {
  30853. + frag_size = MAX_FRAG_THRESHOLD;
  30854. + QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
  30855. + }
  30856. + else {
  30857. + //printk(KERN_WARNING "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&frag_size = %d\n", frag_size);
  30858. + frag_size = ieee->fts;//default:392
  30859. + QOS_ctl = 0;
  30860. + }
  30861. +
  30862. + if(isQoS) {
  30863. + QOS_ctl |= skb->priority; //set in the ieee80211_classify
  30864. + *pQOS_ctl = cpu_to_le16(QOS_ctl);
  30865. + }
  30866. + //printk(KERN_WARNING "header size = %d, QOS_ctl = %x\n", hdr_len,QOS_ctl);
  30867. + /* Determine amount of payload per fragment. Regardless of if
  30868. + * this stack is providing the full 802.11 header, one will
  30869. + * eventually be affixed to this fragment -- so we must account for
  30870. + * it when determining the amount of payload space. */
  30871. + //bytes_per_frag = frag_size - (IEEE80211_3ADDR_LEN + (ieee->current_network->QoS_Enable ? 2:0));
  30872. + bytes_per_frag = frag_size - hdr_len;
  30873. + if (ieee->config &
  30874. + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
  30875. + bytes_per_frag -= IEEE80211_FCS_LEN;
  30876. +
  30877. + /* Each fragment may need to have room for encryptiong pre/postfix */
  30878. + if (isEncrypt)
  30879. + bytes_per_frag -= crypt->ops->extra_prefix_len +
  30880. + crypt->ops->extra_postfix_len;
  30881. +
  30882. + /* Number of fragments is the total bytes_per_frag /
  30883. + * payload_per_fragment */
  30884. + nr_frags = bytes / bytes_per_frag;
  30885. + bytes_last_frag = bytes % bytes_per_frag;
  30886. + if (bytes_last_frag)
  30887. + nr_frags++;
  30888. + else
  30889. + bytes_last_frag = bytes_per_frag;
  30890. +
  30891. + /* When we allocate the TXB we allocate enough space for the reserve
  30892. + * and full fragment bytes (bytes_per_frag doesn't include prefix,
  30893. + * postfix, header, FCS, etc.) */
  30894. + txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
  30895. + if (unlikely(!txb)) {
  30896. + printk(KERN_WARNING "%s: Could not allocate TXB\n",
  30897. + ieee->dev->name);
  30898. + return NULL;
  30899. + }
  30900. + txb->encrypted = isEncrypt;
  30901. + txb->payload_size = bytes;
  30902. +
  30903. + for (i = 0; i < nr_frags; i++) {
  30904. + skb_frag = txb->fragments[i];
  30905. + skb_frag->priority = UP2AC(skb->priority);
  30906. + if (isEncrypt)
  30907. + skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
  30908. +
  30909. + frag_hdr = (struct ieee80211_hdr_3addr *)skb_put(skb_frag, hdr_len);
  30910. + memcpy(frag_hdr, (void *)header, hdr_len);
  30911. +
  30912. + /* If this is not the last fragment, then add the MOREFRAGS
  30913. + * bit to the frame control */
  30914. + if (i != nr_frags - 1) {
  30915. + frag_hdr->frame_ctl = cpu_to_le16(
  30916. + header->frame_ctl | IEEE80211_FCTL_MOREFRAGS);
  30917. + bytes = bytes_per_frag;
  30918. +
  30919. + } else {
  30920. + /* The last fragment takes the remaining length */
  30921. + bytes = bytes_last_frag;
  30922. + }
  30923. +
  30924. + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
  30925. + //frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl<<4 | i);
  30926. + //
  30927. +
  30928. + /* Put a SNAP header on the first fragment */
  30929. + if (i == 0) {
  30930. + ieee80211_put_snap(
  30931. + skb_put(skb_frag, SNAP_SIZE + sizeof(u16)), ether_type);
  30932. + bytes -= SNAP_SIZE + sizeof(u16);
  30933. + }
  30934. +
  30935. + memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
  30936. +
  30937. + /* Advance the SKB... */
  30938. + skb_pull(skb, bytes);
  30939. +
  30940. + /* Encryption routine will move the header forward in order
  30941. + * to insert the IV between the header and the payload */
  30942. + if (isEncrypt)
  30943. + ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
  30944. + if (ieee->config &
  30945. + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
  30946. + skb_put(skb_frag, 4);
  30947. + }
  30948. + // Advance sequence number in data frame.
  30949. + //printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");
  30950. + if (ieee->seq_ctrl[0] == 0xFFF)
  30951. + ieee->seq_ctrl[0] = 0;
  30952. + else
  30953. + ieee->seq_ctrl[0]++;
  30954. + // stanley, just for debug
  30955. +/*
  30956. +{
  30957. + int j=0;
  30958. + for(j=0;j<nr_frags;j++)
  30959. + {
  30960. + int i;
  30961. + struct sk_buff *skb = txb->fragments[j];
  30962. + printk("send(%d): ", j);
  30963. + for (i=0;i<skb->len;i++)
  30964. + printk("%02X ", skb->data[i]&0xff);
  30965. + printk("\n");
  30966. + }
  30967. +}
  30968. +*/
  30969. +
  30970. + return txb;
  30971. +}
  30972. +
  30973. +
  30974. +// based on part of ieee80211_xmit. Mainly allocate txb. ieee->lock is held
  30975. +// Assume no encryption, no FCS computing
  30976. +struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)
  30977. +{
  30978. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  30979. + struct ieee80211_device *ieee = netdev_priv(dev);
  30980. +#else
  30981. + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
  30982. +#endif
  30983. + struct ieee80211_txb *txb = NULL;
  30984. + struct ieee80211_hdr_3addr *frag_hdr;
  30985. + int ether_type;
  30986. + int bytes, QOS_ctl;
  30987. +
  30988. + ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
  30989. +
  30990. + /* Advance the SKB to the start of the payload */
  30991. + skb_pull(skb, sizeof(struct ethhdr));
  30992. +
  30993. + /* Determine total amount of storage required for TXB packets */
  30994. + bytes = skb->len + SNAP_SIZE + sizeof(u16);
  30995. +
  30996. + if (is_multicast_ether_addr(header->addr1) ||
  30997. + is_broadcast_ether_addr(header->addr1)) {
  30998. + QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
  30999. + }
  31000. + else {
  31001. + QOS_ctl = 0;
  31002. + }
  31003. +
  31004. + if(isQoS) {
  31005. + QOS_ctl |= skb->priority; //set in the ieee80211_classify
  31006. + *pQOS_ctl = cpu_to_le16(QOS_ctl);
  31007. + }
  31008. +
  31009. + txb = kmalloc( sizeof(struct ieee80211_txb) + sizeof(u8*), GFP_ATOMIC );
  31010. + if (unlikely(!txb)) {
  31011. + printk(KERN_WARNING "%s: Could not allocate TXB\n",
  31012. + ieee->dev->name);
  31013. + return NULL;
  31014. + }
  31015. +
  31016. + txb->nr_frags = 1;
  31017. + txb->frag_size = bytes;
  31018. + txb->encrypted = isEncrypt;
  31019. + txb->payload_size = bytes;
  31020. +
  31021. + txb->fragments[0] = skb;
  31022. + ieee80211_put_snap(
  31023. + skb_push(skb, SNAP_SIZE + sizeof(u16)), ether_type);
  31024. + frag_hdr = (struct ieee80211_hdr_3addr *)skb_push(skb, hdr_len);
  31025. + memcpy(frag_hdr, (void *)header, hdr_len);
  31026. + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | 0);
  31027. + skb->priority = UP2AC(skb->priority);
  31028. + if(isEncrypt)
  31029. + ieee80211_encrypt_fragment(ieee,skb,hdr_len);
  31030. +
  31031. + // Advance sequence number in data frame.
  31032. + //printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");
  31033. + if (ieee->seq_ctrl[0] == 0xFFF)
  31034. + ieee->seq_ctrl[0] = 0;
  31035. + else
  31036. + ieee->seq_ctrl[0]++;
  31037. +
  31038. + return txb;
  31039. +}
  31040. +
  31041. +#endif // _RTL8187_EXT_PATCH_
  31042. +
  31043. +/* SKBs are added to the ieee->tx_queue. */
  31044. +int ieee80211_xmit(struct sk_buff *skb,
  31045. + struct net_device *dev)
  31046. +{
  31047. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
  31048. + struct ieee80211_device *ieee = netdev_priv(dev);
  31049. +#else
  31050. + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
  31051. +#endif
  31052. + struct ieee80211_txb *txb = NULL;
  31053. + struct ieee80211_hdr_3addr_QOS *frag_hdr;
  31054. + int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
  31055. + unsigned long flags;
  31056. + struct net_device_stats *stats = &ieee->stats;
  31057. + int ether_type, encrypt;
  31058. + int bytes, fc, QOS_ctl, hdr_len;
  31059. + struct sk_buff *skb_frag;
  31060. + //struct ieee80211_hdr header = { /* Ensure zero initialized */
  31061. + // .duration_id = 0,
  31062. + // .seq_ctl = 0
  31063. + //};
  31064. + struct ieee80211_hdr_3addr_QOS header = { /* Ensure zero initialized */
  31065. + .duration_id = 0,
  31066. + .seq_ctl = 0,
  31067. + .QOS_ctl = 0
  31068. + };
  31069. + u8 dest[ETH_ALEN], src[ETH_ALEN];
  31070. +
  31071. + struct ieee80211_crypt_data* crypt;
  31072. +
  31073. + //printk(KERN_WARNING "upper layer packet!\n");
  31074. + spin_lock_irqsave(&ieee->lock, flags);
  31075. +
  31076. + /* If there is no driver handler to take the TXB, dont' bother
  31077. + * creating it... */
  31078. + if ((!ieee->hard_start_xmit && !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE))||
  31079. + ((!ieee->softmac_data_hard_start_xmit && (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
  31080. + printk(KERN_WARNING "%s: No xmit handler.\n",
  31081. + ieee->dev->name);
  31082. + goto success;
  31083. + }
  31084. +
  31085. + ieee80211_classify(skb,&ieee->current_network);
  31086. + if(likely(ieee->raw_tx == 0)){
  31087. +
  31088. + if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
  31089. + printk(KERN_WARNING "%s: skb too small (%d).\n",
  31090. + ieee->dev->name, skb->len);
  31091. + goto success;
  31092. + }
  31093. +
  31094. +
  31095. +#ifdef _RTL8187_EXT_PATCH_
  31096. + // note, skb->priority which was set by ieee80211_classify, and used by physical tx
  31097. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_xmit))
  31098. + {
  31099. + txb = ieee->ext_patch_ieee80211_xmit(skb, dev);
  31100. + goto success;
  31101. + }
  31102. +#endif
  31103. +
  31104. + ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
  31105. +#ifdef _RTL8187_EXT_PATCH_
  31106. + crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
  31107. +#else
  31108. + crypt = ieee->crypt[ieee->tx_keyidx];
  31109. +#endif
  31110. + encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
  31111. + ieee->host_encrypt && crypt && crypt->ops;
  31112. +
  31113. + if (!encrypt && ieee->ieee802_1x &&
  31114. + ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
  31115. + stats->tx_dropped++;
  31116. + goto success;
  31117. + }
  31118. +
  31119. + #ifdef CONFIG_IEEE80211_DEBUG
  31120. + if (crypt && !encrypt && ether_type == ETH_P_PAE) {
  31121. + struct eapol *eap = (struct eapol *)(skb->data +
  31122. + sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
  31123. + IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
  31124. + eap_get_type(eap->type));
  31125. + }
  31126. + #endif
  31127. +
  31128. + /* Save source and destination addresses */
  31129. + memcpy(&dest, skb->data, ETH_ALEN);
  31130. + memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
  31131. +
  31132. + /* Advance the SKB to the start of the payload */
  31133. + skb_pull(skb, sizeof(struct ethhdr));
  31134. +
  31135. + /* Determine total amount of storage required for TXB packets */
  31136. + bytes = skb->len + SNAP_SIZE + sizeof(u16);
  31137. +
  31138. + if(ieee->current_network.QoS_Enable) {
  31139. + if (encrypt)
  31140. + fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA |
  31141. + IEEE80211_FCTL_WEP;
  31142. + else
  31143. + fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
  31144. +
  31145. + } else {
  31146. + if (encrypt)
  31147. + fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
  31148. + IEEE80211_FCTL_WEP;
  31149. + else
  31150. + fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
  31151. + }
  31152. +
  31153. + if (ieee->iw_mode == IW_MODE_INFRA) {
  31154. + fc |= IEEE80211_FCTL_TODS;
  31155. + /* To DS: Addr1 = BSSID, Addr2 = SA,
  31156. + Addr3 = DA */
  31157. + memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
  31158. + memcpy(&header.addr2, &src, ETH_ALEN);
  31159. + memcpy(&header.addr3, &dest, ETH_ALEN);
  31160. + } else if (ieee->iw_mode == IW_MODE_ADHOC) {
  31161. + /* not From/To DS: Addr1 = DA, Addr2 = SA,
  31162. + Addr3 = BSSID */
  31163. + memcpy(&header.addr1, dest, ETH_ALEN);
  31164. + memcpy(&header.addr2, src, ETH_ALEN);
  31165. + memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
  31166. + }
  31167. + // printk(KERN_WARNING "essid MAC address is "MAC_FMT, MAC_ARG(&header.addr1));
  31168. + header.frame_ctl = cpu_to_le16(fc);
  31169. + //hdr_len = IEEE80211_3ADDR_LEN;
  31170. +
  31171. + /* Determine fragmentation size based on destination (multicast
  31172. + * and broadcast are not fragmented) */
  31173. +// if (is_multicast_ether_addr(dest) ||
  31174. +// is_broadcast_ether_addr(dest)) {
  31175. + if (is_multicast_ether_addr(header.addr1) ||
  31176. + is_broadcast_ether_addr(header.addr1)) {
  31177. + frag_size = MAX_FRAG_THRESHOLD;
  31178. + QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
  31179. + }
  31180. + else {
  31181. + //printk(KERN_WARNING "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&frag_size = %d\n", frag_size);
  31182. + frag_size = ieee->fts;//default:392
  31183. + QOS_ctl = 0;
  31184. + }
  31185. +
  31186. + if (ieee->current_network.QoS_Enable) {
  31187. + hdr_len = IEEE80211_3ADDR_LEN + 2;
  31188. + QOS_ctl |= skb->priority; //set in the ieee80211_classify
  31189. + header.QOS_ctl = cpu_to_le16(QOS_ctl);
  31190. + } else {
  31191. + hdr_len = IEEE80211_3ADDR_LEN;
  31192. + }
  31193. + //printk(KERN_WARNING "header size = %d, QOS_ctl = %x\n", hdr_len,QOS_ctl);
  31194. + /* Determine amount of payload per fragment. Regardless of if
  31195. + * this stack is providing the full 802.11 header, one will
  31196. + * eventually be affixed to this fragment -- so we must account for
  31197. + * it when determining the amount of payload space. */
  31198. + //bytes_per_frag = frag_size - (IEEE80211_3ADDR_LEN + (ieee->current_network->QoS_Enable ? 2:0));
  31199. + bytes_per_frag = frag_size - hdr_len;
  31200. + if (ieee->config &
  31201. + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
  31202. + bytes_per_frag -= IEEE80211_FCS_LEN;
  31203. +
  31204. + /* Each fragment may need to have room for encryptiong pre/postfix */
  31205. + if (encrypt)
  31206. + bytes_per_frag -= crypt->ops->extra_prefix_len +
  31207. + crypt->ops->extra_postfix_len;
  31208. +
  31209. + /* Number of fragments is the total bytes_per_frag /
  31210. + * payload_per_fragment */
  31211. + nr_frags = bytes / bytes_per_frag;
  31212. + bytes_last_frag = bytes % bytes_per_frag;
  31213. + if (bytes_last_frag)
  31214. + nr_frags++;
  31215. + else
  31216. + bytes_last_frag = bytes_per_frag;
  31217. +
  31218. + /* When we allocate the TXB we allocate enough space for the reserve
  31219. + * and full fragment bytes (bytes_per_frag doesn't include prefix,
  31220. + * postfix, header, FCS, etc.) */
  31221. + txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
  31222. + if (unlikely(!txb)) {
  31223. + printk(KERN_WARNING "%s: Could not allocate TXB\n",
  31224. + ieee->dev->name);
  31225. + goto failed;
  31226. + }
  31227. + txb->encrypted = encrypt;
  31228. + txb->payload_size = bytes;
  31229. +
  31230. + for (i = 0; i < nr_frags; i++) {
  31231. + skb_frag = txb->fragments[i];
  31232. + skb_frag->priority = UP2AC(skb->priority);
  31233. + if (encrypt)
  31234. + skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
  31235. +
  31236. + frag_hdr = (struct ieee80211_hdr_3addr_QOS *)skb_put(skb_frag, hdr_len);
  31237. + memcpy(frag_hdr, &header, hdr_len);
  31238. +
  31239. + /* If this is not the last fragment, then add the MOREFRAGS
  31240. + * bit to the frame control */
  31241. + if (i != nr_frags - 1) {
  31242. + frag_hdr->frame_ctl = cpu_to_le16(
  31243. + fc | IEEE80211_FCTL_MOREFRAGS);
  31244. + bytes = bytes_per_frag;
  31245. +
  31246. + } else {
  31247. + /* The last fragment takes the remaining length */
  31248. + bytes = bytes_last_frag;
  31249. + }
  31250. + if(ieee->current_network.QoS_Enable) {
  31251. + // add 1 only indicate to corresponding seq number control 2006/7/12
  31252. + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i);
  31253. + //printk(KERN_WARNING "skb->priority = %d,", skb->priority);
  31254. + //printk(KERN_WARNING "type:%d: seq = %d\n",UP2AC(skb->priority),ieee->seq_ctrl[UP2AC(skb->priority)+1]);
  31255. + } else {
  31256. + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
  31257. + }
  31258. + //frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl<<4 | i);
  31259. + //
  31260. +
  31261. + /* Put a SNAP header on the first fragment */
  31262. + if (i == 0) {
  31263. + ieee80211_put_snap(
  31264. + skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
  31265. + ether_type);
  31266. + bytes -= SNAP_SIZE + sizeof(u16);
  31267. + }
  31268. +
  31269. + memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
  31270. +
  31271. + /* Advance the SKB... */
  31272. + skb_pull(skb, bytes);
  31273. +
  31274. + /* Encryption routine will move the header forward in order
  31275. + * to insert the IV between the header and the payload */
  31276. + if (encrypt)
  31277. + ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
  31278. + if (ieee->config &
  31279. + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
  31280. + skb_put(skb_frag, 4);
  31281. + }
  31282. + // Advance sequence number in data frame.
  31283. + //printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");
  31284. + if (ieee->current_network.QoS_Enable) {
  31285. + if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
  31286. + ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
  31287. + else
  31288. + ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
  31289. + } else {
  31290. + if (ieee->seq_ctrl[0] == 0xFFF)
  31291. + ieee->seq_ctrl[0] = 0;
  31292. + else
  31293. + ieee->seq_ctrl[0]++;
  31294. + }
  31295. + //---
  31296. + }else{
  31297. + if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) {
  31298. + printk(KERN_WARNING "%s: skb too small (%d).\n",
  31299. + ieee->dev->name, skb->len);
  31300. + goto success;
  31301. + }
  31302. +
  31303. + txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC);
  31304. + if(!txb){
  31305. + printk(KERN_WARNING "%s: Could not allocate TXB\n",
  31306. + ieee->dev->name);
  31307. + goto failed;
  31308. + }
  31309. +
  31310. + txb->encrypted = 0;
  31311. + txb->payload_size = skb->len;
  31312. + memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
  31313. + }
  31314. +
  31315. + success:
  31316. + spin_unlock_irqrestore(&ieee->lock, flags);
  31317. +#ifdef _RTL8187_EXT_PATCH_
  31318. + // Sometimes, extension mode can reuse skb (by txb->fragments[0])
  31319. + if( ! ((ieee->iw_mode == ieee->iw_ext_mode) && txb && (txb->fragments[0] == skb)) )
  31320. +#endif
  31321. + dev_kfree_skb_any(skb);
  31322. + if (txb) {
  31323. + if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){
  31324. + ieee80211_softmac_xmit(txb, ieee);
  31325. + }else{
  31326. + if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
  31327. + stats->tx_packets++;
  31328. + stats->tx_bytes += txb->payload_size;
  31329. + return 0;
  31330. + }
  31331. + ieee80211_txb_free(txb);
  31332. + }
  31333. + }
  31334. +
  31335. + return 0;
  31336. +
  31337. + failed:
  31338. + spin_unlock_irqrestore(&ieee->lock, flags);
  31339. + netif_stop_queue(dev);
  31340. + printk("netif_stop_queue in ieee80211_xmit \n");
  31341. + stats->tx_errors++;
  31342. + return 1;
  31343. +
  31344. +}
  31345. +
  31346. +
  31347. +
  31348. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  31349. +EXPORT_SYMBOL(ieee80211_txb_free);
  31350. +#ifdef _RTL8187_EXT_PATCH_
  31351. +EXPORT_SYMBOL(ieee80211_alloc_txb);
  31352. +EXPORT_SYMBOL(ieee80211_ext_alloc_txb);
  31353. +EXPORT_SYMBOL(ieee80211_ext_reuse_txb);
  31354. +
  31355. +EXPORT_SYMBOL(ieee80211_encrypt_fragment);
  31356. +#endif // _RTL8187_EXT_PATCH_
  31357. +#else
  31358. +EXPORT_SYMBOL_NOVERS(ieee80211_txb_free);
  31359. +#ifdef _RTL8187_EXT_PATCH_
  31360. +EXPORT_SYMBOL_NOVERS(ieee80211_alloc_txb);
  31361. +EXPORT_SYMBOL_NOVERS(ieee80211_ext_reuse_txb);
  31362. +
  31363. +EXPORT_SYMBOL_NOVERS(ieee80211_encrypt_fragment);
  31364. +#endif // _RTL8187_EXT_PATCH_
  31365. +#endif
  31366. +
  31367. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_wx.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_wx.c
  31368. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_wx.c 1970-01-01 01:00:00.000000000 +0100
  31369. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/ieee80211_wx.c 2009-08-23 19:01:04.000000000 +0200
  31370. @@ -0,0 +1,926 @@
  31371. +/******************************************************************************
  31372. +
  31373. + Copyright(c) 2004 Intel Corporation. All rights reserved.
  31374. +
  31375. + Portions of this file are based on the WEP enablement code provided by the
  31376. + Host AP project hostap-drivers v0.1.3
  31377. + Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
  31378. + <jkmaline@cc.hut.fi>
  31379. + Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
  31380. +
  31381. + This program is free software; you can redistribute it and/or modify it
  31382. + under the terms of version 2 of the GNU General Public License as
  31383. + published by the Free Software Foundation.
  31384. +
  31385. + This program is distributed in the hope that it will be useful, but WITHOUT
  31386. + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  31387. + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  31388. + more details.
  31389. +
  31390. + You should have received a copy of the GNU General Public License along with
  31391. + this program; if not, write to the Free Software Foundation, Inc., 59
  31392. + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  31393. +
  31394. + The full GNU General Public License is included in this distribution in the
  31395. + file called LICENSE.
  31396. +
  31397. + Contact Information:
  31398. + James P. Ketrenos <ipw2100-admin@linux.intel.com>
  31399. + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31400. +
  31401. +******************************************************************************/
  31402. +#include <linux/wireless.h>
  31403. +#include <linux/version.h>
  31404. +#include <linux/kmod.h>
  31405. +#include <linux/module.h>
  31406. +
  31407. +#include "ieee80211.h"
  31408. +static const char *ieee80211_modes[] = {
  31409. + "?", "a", "b", "ab", "g", "ag", "bg", "abg"
  31410. +};
  31411. +
  31412. +#define MAX_CUSTOM_LEN 64
  31413. +static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
  31414. + char *start, char *stop,
  31415. + struct ieee80211_network *network,
  31416. + struct iw_request_info *info)
  31417. +{
  31418. + char custom[MAX_CUSTOM_LEN];
  31419. + char *p;
  31420. + struct iw_event iwe;
  31421. + int i, j;
  31422. + u8 max_rate, rate;
  31423. +
  31424. + /* First entry *MUST* be the AP MAC address */
  31425. + iwe.cmd = SIOCGIWAP;
  31426. + iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
  31427. + memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
  31428. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31429. + start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
  31430. +#else
  31431. + start = iwe_stream_add_event(start, stop, &iwe, IW_EV_ADDR_LEN);
  31432. +#endif
  31433. + /* Remaining entries will be displayed in the order we provide them */
  31434. +
  31435. + /* Add the ESSID */
  31436. + iwe.cmd = SIOCGIWESSID;
  31437. + iwe.u.data.flags = 1;
  31438. + //YJ,modified,080903,for hidden ap
  31439. + //if (network->flags & NETWORK_EMPTY_ESSID) {
  31440. + if (network->ssid_len == 0) {
  31441. + iwe.u.data.length = sizeof("<hidden>");
  31442. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31443. + start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
  31444. +#else
  31445. + start = iwe_stream_add_point(start, stop, &iwe, "<hidden>");
  31446. +#endif
  31447. + } else {
  31448. + iwe.u.data.length = min(network->ssid_len, (u8)32);
  31449. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31450. + start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
  31451. +#else
  31452. + start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
  31453. +#endif
  31454. + }
  31455. +
  31456. + /* Add the protocol name */
  31457. + iwe.cmd = SIOCGIWNAME;
  31458. + snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11%s", ieee80211_modes[network->mode]);
  31459. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31460. + start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN);
  31461. +#else
  31462. + start = iwe_stream_add_event(start, stop, &iwe, IW_EV_CHAR_LEN);
  31463. +#endif
  31464. + /* Add mode */
  31465. + iwe.cmd = SIOCGIWMODE;
  31466. + if (network->capability &
  31467. + (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) {
  31468. + if (network->capability & WLAN_CAPABILITY_BSS)
  31469. + iwe.u.mode = IW_MODE_MASTER;
  31470. + else
  31471. + iwe.u.mode = IW_MODE_ADHOC;
  31472. +
  31473. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31474. + start = iwe_stream_add_event(info, start, stop, &iwe,
  31475. + IW_EV_UINT_LEN);
  31476. +#else
  31477. + start = iwe_stream_add_event(start, stop, &iwe,
  31478. + IW_EV_UINT_LEN);
  31479. +#endif
  31480. + }
  31481. +
  31482. + /* Add frequency/channel */
  31483. + iwe.cmd = SIOCGIWFREQ;
  31484. +/* iwe.u.freq.m = ieee80211_frequency(network->channel, network->mode);
  31485. + iwe.u.freq.e = 3; */
  31486. + iwe.u.freq.m = network->channel;
  31487. + iwe.u.freq.e = 0;
  31488. + iwe.u.freq.i = 0;
  31489. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31490. + start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN);
  31491. +#else
  31492. + start = iwe_stream_add_event(start, stop, &iwe, IW_EV_FREQ_LEN);
  31493. +#endif
  31494. + /* Add encryption capability */
  31495. + iwe.cmd = SIOCGIWENCODE;
  31496. + if (network->capability & WLAN_CAPABILITY_PRIVACY)
  31497. + iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
  31498. + else
  31499. + iwe.u.data.flags = IW_ENCODE_DISABLED;
  31500. + iwe.u.data.length = 0;
  31501. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31502. + start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
  31503. +#else
  31504. + start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
  31505. +#endif
  31506. + /* Add basic and extended rates */
  31507. + max_rate = 0;
  31508. + p = custom;
  31509. + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
  31510. + for (i = 0, j = 0; i < network->rates_len; ) {
  31511. + if (j < network->rates_ex_len &&
  31512. + ((network->rates_ex[j] & 0x7F) <
  31513. + (network->rates[i] & 0x7F)))
  31514. + rate = network->rates_ex[j++] & 0x7F;
  31515. + else
  31516. + rate = network->rates[i++] & 0x7F;
  31517. + if (rate > max_rate)
  31518. + max_rate = rate;
  31519. + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
  31520. + "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
  31521. + }
  31522. + for (; j < network->rates_ex_len; j++) {
  31523. + rate = network->rates_ex[j] & 0x7F;
  31524. + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
  31525. + "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
  31526. + if (rate > max_rate)
  31527. + max_rate = rate;
  31528. + }
  31529. +
  31530. + iwe.cmd = SIOCGIWRATE;
  31531. + iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
  31532. + iwe.u.bitrate.value = max_rate * 500000;
  31533. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31534. + start = iwe_stream_add_event(info, start, stop, &iwe,IW_EV_PARAM_LEN);
  31535. +#else
  31536. + start = iwe_stream_add_event(start, stop, &iwe,IW_EV_PARAM_LEN);
  31537. +#endif
  31538. + iwe.cmd = IWEVCUSTOM;
  31539. + iwe.u.data.length = p - custom;
  31540. + if (iwe.u.data.length)
  31541. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31542. + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
  31543. +#else
  31544. + start = iwe_stream_add_point(start, stop, &iwe, custom);
  31545. +#endif
  31546. + /* Add quality statistics */
  31547. + /* TODO: Fix these values... */
  31548. + iwe.cmd = IWEVQUAL;
  31549. + iwe.u.qual.qual = network->stats.signalstrength;//network->stats.signal;
  31550. + iwe.u.qual.level = network->stats.signal;//network->stats.rssi;
  31551. + iwe.u.qual.noise = network->stats.noise;
  31552. +#if 0
  31553. + iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
  31554. + if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
  31555. + iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
  31556. + if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
  31557. + iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
  31558. + if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
  31559. + iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
  31560. +#endif
  31561. +
  31562. + iwe.u.qual.updated = 0x7;//network->stats.mask & IEEE80211_STATMASK_WEMASK;
  31563. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31564. + start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN);
  31565. +#else
  31566. + start = iwe_stream_add_event(start, stop, &iwe, IW_EV_QUAL_LEN);
  31567. +#endif
  31568. + iwe.cmd = IWEVCUSTOM;
  31569. + p = custom;
  31570. +
  31571. + iwe.u.data.length = p - custom;
  31572. + if (iwe.u.data.length)
  31573. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31574. + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
  31575. +#else
  31576. + start = iwe_stream_add_point(start, stop, &iwe, custom);
  31577. +#endif
  31578. +#if 0
  31579. + if (ieee->wpa_enabled && network->wpa_ie_len){
  31580. + char buf[MAX_WPA_IE_LEN * 2 + 30];
  31581. + // printk("WPA IE\n");
  31582. + u8 *p = buf;
  31583. + p += sprintf(p, "wpa_ie=");
  31584. + for (i = 0; i < network->wpa_ie_len; i++) {
  31585. + p += sprintf(p, "%02x", network->wpa_ie[i]);
  31586. + }
  31587. +
  31588. + memset(&iwe, 0, sizeof(iwe));
  31589. + iwe.cmd = IWEVCUSTOM;
  31590. + iwe.u.data.length = strlen(buf);
  31591. + start = iwe_stream_add_point(start, stop, &iwe, buf);
  31592. + }
  31593. +
  31594. + if (ieee->wpa_enabled && network->rsn_ie_len){
  31595. + char buf[MAX_WPA_IE_LEN * 2 + 30];
  31596. +
  31597. + u8 *p = buf;
  31598. + p += sprintf(p, "rsn_ie=");
  31599. + for (i = 0; i < network->rsn_ie_len; i++) {
  31600. + p += sprintf(p, "%02x", network->rsn_ie[i]);
  31601. + }
  31602. +
  31603. +
  31604. +#else
  31605. + memset(&iwe, 0, sizeof(iwe));
  31606. + if (network->wpa_ie_len) {
  31607. + //printk("wpa_ie_len:%d\n", network->wpa_ie_len);
  31608. + char buf[MAX_WPA_IE_LEN];
  31609. + memcpy(buf, network->wpa_ie, network->wpa_ie_len);
  31610. + iwe.cmd = IWEVGENIE;
  31611. + iwe.u.data.length = network->wpa_ie_len;
  31612. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31613. + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
  31614. +#else
  31615. + start = iwe_stream_add_point(start, stop, &iwe, buf);
  31616. +#endif
  31617. + }
  31618. +
  31619. + memset(&iwe, 0, sizeof(iwe));
  31620. + if (network->rsn_ie_len) {
  31621. + //printk("=====>rsn_ie_len:\n", network->rsn_ie_len);
  31622. + #if 0
  31623. + {
  31624. + int i;
  31625. + for (i=0; i<network->rsn_ie_len; i++);
  31626. + printk("%2x ", network->rsn_ie[i]);
  31627. + printk("\n");
  31628. + }
  31629. + #endif
  31630. + char buf[MAX_WPA_IE_LEN];
  31631. + memcpy(buf, network->rsn_ie, network->rsn_ie_len);
  31632. + iwe.cmd = IWEVGENIE;
  31633. + iwe.u.data.length = network->rsn_ie_len;
  31634. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31635. + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
  31636. +#else
  31637. + start = iwe_stream_add_point(start, stop, &iwe, buf);
  31638. +#endif
  31639. + }
  31640. +
  31641. +#endif
  31642. +
  31643. + /* Add EXTRA: Age to display seconds since last beacon/probe response
  31644. + * for given network. */
  31645. + iwe.cmd = IWEVCUSTOM;
  31646. + p = custom;
  31647. + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
  31648. + " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
  31649. + iwe.u.data.length = p - custom;
  31650. + if (iwe.u.data.length)
  31651. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
  31652. + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
  31653. +#else
  31654. + start = iwe_stream_add_point(start, stop, &iwe, custom);
  31655. +#endif
  31656. +
  31657. + return start;
  31658. +}
  31659. +
  31660. +int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
  31661. + struct iw_request_info *info,
  31662. + union iwreq_data *wrqu, char *extra)
  31663. +{
  31664. + struct ieee80211_network *network;
  31665. + unsigned long flags;
  31666. + int err = 0;
  31667. + char *ev = extra;
  31668. + char *stop = ev + wrqu->data.length;//IW_SCAN_MAX_DATA;
  31669. + //char *stop = ev + IW_SCAN_MAX_DATA;
  31670. + int i = 0;
  31671. +
  31672. + IEEE80211_DEBUG_WX("Getting scan\n");
  31673. + down(&ieee->wx_sem);
  31674. + spin_lock_irqsave(&ieee->lock, flags);
  31675. +
  31676. + if(!ieee->bHwRadioOff)
  31677. + {
  31678. + list_for_each_entry(network, &ieee->network_list, list) {
  31679. + i++;
  31680. +
  31681. + if((stop-ev)<200)
  31682. + {
  31683. + err = -E2BIG;
  31684. + break;
  31685. + }
  31686. +
  31687. + if (ieee->scan_age == 0 ||
  31688. + time_after(network->last_scanned + ieee->scan_age, jiffies))
  31689. + {
  31690. + ev = rtl819x_translate_scan(ieee, ev, stop, network, info);
  31691. + }
  31692. + else
  31693. + IEEE80211_DEBUG_SCAN(
  31694. + "Not showing network '%s ("
  31695. + MAC_FMT ")' due to age (%lums).\n",
  31696. + escape_essid(network->ssid,
  31697. + network->ssid_len),
  31698. + MAC_ARG(network->bssid),
  31699. + (jiffies - network->last_scanned) / (HZ / 100));
  31700. + }
  31701. + }
  31702. + spin_unlock_irqrestore(&ieee->lock, flags);
  31703. + up(&ieee->wx_sem);
  31704. + wrqu->data.length = ev - extra;
  31705. + wrqu->data.flags = 0;
  31706. +
  31707. + IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
  31708. +
  31709. + return err;
  31710. +}
  31711. +
  31712. +int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
  31713. + struct iw_request_info *info,
  31714. + union iwreq_data *wrqu, char *keybuf)
  31715. +{
  31716. + struct iw_point *erq = &(wrqu->encoding);
  31717. + struct net_device *dev = ieee->dev;
  31718. + struct ieee80211_security sec = {
  31719. + .flags = 0
  31720. + };
  31721. + int i, key, key_provided, len;
  31722. + struct ieee80211_crypt_data **crypt;
  31723. +
  31724. + IEEE80211_DEBUG_WX("SET_ENCODE\n");
  31725. +
  31726. + key = erq->flags & IW_ENCODE_INDEX;
  31727. + if (key) {
  31728. + if (key > WEP_KEYS)
  31729. + return -EINVAL;
  31730. + key--;
  31731. + key_provided = 1;
  31732. + } else {
  31733. + key_provided = 0;
  31734. + key = ieee->tx_keyidx;
  31735. + }
  31736. +
  31737. + IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
  31738. + "provided" : "default");
  31739. +#ifdef _RTL8187_EXT_PATCH_
  31740. +#if 0
  31741. +{
  31742. + int j;
  31743. + for(j=0; j<MAX_MP; j++){
  31744. + crypt = &ieee->cryptlist[j]->crypt[key];
  31745. +#else
  31746. + crypt = &ieee->cryptlist[0]->crypt[key];
  31747. +#endif
  31748. +#else
  31749. + crypt = &ieee->crypt[key];
  31750. +#endif
  31751. + if (erq->flags & IW_ENCODE_DISABLED) {
  31752. + if (key_provided && *crypt) {
  31753. + IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
  31754. + key);
  31755. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  31756. + } else
  31757. + IEEE80211_DEBUG_WX("Disabling encryption.\n");
  31758. +
  31759. + /* Check all the keys to see if any are still configured,
  31760. + * and if no key index was provided, de-init them all */
  31761. + for (i = 0; i < WEP_KEYS; i++) {
  31762. +#ifdef _RTL8187_EXT_PATCH_
  31763. +
  31764. + if (ieee->cryptlist[0]->crypt[i] != NULL){
  31765. +#else
  31766. +
  31767. + if (ieee->crypt[i] != NULL) {
  31768. +#endif
  31769. + if (key_provided)
  31770. + break;
  31771. + ieee80211_crypt_delayed_deinit(
  31772. +#ifdef _RTL8187_EXT_PATCH_
  31773. + ieee, &ieee->cryptlist[0]->crypt[i]);
  31774. +#else
  31775. + ieee, &ieee->crypt[i]);
  31776. +#endif
  31777. + }
  31778. + }
  31779. +
  31780. + if (i == WEP_KEYS) {
  31781. + sec.enabled = 0;
  31782. + sec.level = SEC_LEVEL_0;
  31783. + sec.flags |= SEC_ENABLED | SEC_LEVEL;
  31784. + }
  31785. +
  31786. + goto done;
  31787. + }
  31788. +
  31789. +
  31790. +
  31791. + sec.enabled = 1;
  31792. + sec.flags |= SEC_ENABLED;
  31793. +
  31794. + if (*crypt != NULL && (*crypt)->ops != NULL &&
  31795. + strcmp((*crypt)->ops->name, "WEP") != 0) {
  31796. + /* changing to use WEP; deinit previously used algorithm
  31797. + * on this key */
  31798. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  31799. + }
  31800. +
  31801. + if (*crypt == NULL) {
  31802. + struct ieee80211_crypt_data *new_crypt;
  31803. +
  31804. + /* take WEP into use */
  31805. + new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data),
  31806. + GFP_KERNEL);
  31807. + if (new_crypt == NULL)
  31808. + return -ENOMEM;
  31809. + memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
  31810. + new_crypt->ops = ieee80211_get_crypto_ops("WEP");
  31811. + if (!new_crypt->ops) {
  31812. + request_module("ieee80211_crypt_wep");
  31813. + new_crypt->ops = ieee80211_get_crypto_ops("WEP");
  31814. + }
  31815. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  31816. + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
  31817. +#else
  31818. + if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
  31819. +#endif
  31820. + new_crypt->priv = new_crypt->ops->init(key);
  31821. +
  31822. + if (!new_crypt->ops || !new_crypt->priv) {
  31823. + kfree(new_crypt);
  31824. + new_crypt = NULL;
  31825. +
  31826. + printk(KERN_WARNING "%s: could not initialize WEP: "
  31827. + "load module ieee80211_crypt_wep\n",
  31828. + dev->name);
  31829. + return -EOPNOTSUPP;
  31830. + }
  31831. + *crypt = new_crypt;
  31832. + }
  31833. +
  31834. + /* If a new key was provided, set it up */
  31835. + if (erq->length > 0) {
  31836. + len = erq->length <= 5 ? 5 : 13;
  31837. + memcpy(sec.keys[key], keybuf, erq->length);
  31838. + if (len > erq->length)
  31839. + memset(sec.keys[key] + erq->length, 0,
  31840. + len - erq->length);
  31841. + IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
  31842. + key, escape_essid(sec.keys[key], len),
  31843. + erq->length, len);
  31844. + sec.key_sizes[key] = len;
  31845. + (*crypt)->ops->set_key(sec.keys[key], len, NULL,
  31846. + (*crypt)->priv);
  31847. + sec.flags |= (1 << key);
  31848. + /* This ensures a key will be activated if no key is
  31849. + * explicitely set */
  31850. + if (key == sec.active_key)
  31851. + sec.flags |= SEC_ACTIVE_KEY;
  31852. +
  31853. + ieee->tx_keyidx = key; //we need it to support multi_key setting. added by wb 2008_2_22
  31854. + } else {
  31855. + len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
  31856. + NULL, (*crypt)->priv);
  31857. + if (len == 0) {
  31858. + /* Set a default key of all 0 */
  31859. + IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
  31860. + key);
  31861. + memset(sec.keys[key], 0, 13);
  31862. + (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
  31863. + (*crypt)->priv);
  31864. + sec.key_sizes[key] = 13;
  31865. + sec.flags |= (1 << key);
  31866. + }
  31867. +
  31868. + /* No key data - just set the default TX key index */
  31869. + if (key_provided) {
  31870. + IEEE80211_DEBUG_WX(
  31871. + "Setting key %d to default Tx key.\n", key);
  31872. + ieee->tx_keyidx = key;
  31873. + sec.active_key = key;
  31874. + sec.flags |= SEC_ACTIVE_KEY;
  31875. + }
  31876. + }
  31877. +#ifdef _RTL8187_EXT_PATCH_
  31878. +#if 0
  31879. +}
  31880. +}
  31881. +#endif
  31882. +#endif
  31883. + done:
  31884. + ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
  31885. + sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
  31886. + sec.flags |= SEC_AUTH_MODE;
  31887. + IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
  31888. + "OPEN" : "SHARED KEY");
  31889. +
  31890. + /* For now we just support WEP, so only set that security level...
  31891. + * TODO: When WPA is added this is one place that needs to change */
  31892. + sec.flags |= SEC_LEVEL;
  31893. + sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
  31894. +
  31895. + if (ieee->set_security)
  31896. + ieee->set_security(dev, &sec);
  31897. +
  31898. + /* Do not reset port if card is in Managed mode since resetting will
  31899. + * generate new IEEE 802.11 authentication which may end up in looping
  31900. + * with IEEE 802.1X. If your hardware requires a reset after WEP
  31901. + * configuration (for example... Prism2), implement the reset_port in
  31902. + * the callbacks structures used to initialize the 802.11 stack. */
  31903. + if (ieee->reset_on_keychange &&
  31904. + ieee->iw_mode != IW_MODE_INFRA &&
  31905. + ieee->reset_port && ieee->reset_port(dev)) {
  31906. + printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
  31907. + return -EINVAL;
  31908. + }
  31909. + return 0;
  31910. +}
  31911. +
  31912. +int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
  31913. + struct iw_request_info *info,
  31914. + union iwreq_data *wrqu, char *keybuf)
  31915. +{
  31916. + struct iw_point *erq = &(wrqu->encoding);
  31917. + int len, key;
  31918. + struct ieee80211_crypt_data *crypt;
  31919. +
  31920. + IEEE80211_DEBUG_WX("GET_ENCODE\n");
  31921. +
  31922. + if(ieee->iw_mode == IW_MODE_MONITOR)
  31923. + return -1;
  31924. +
  31925. + key = erq->flags & IW_ENCODE_INDEX;
  31926. + if (key) {
  31927. + if (key > WEP_KEYS)
  31928. + return -EINVAL;
  31929. + key--;
  31930. + } else
  31931. + key = ieee->tx_keyidx;
  31932. +#ifdef _RTL8187_EXT_PATCH_
  31933. + crypt = ieee->cryptlist[0]->crypt[key];
  31934. +#else
  31935. + crypt = ieee->crypt[key];
  31936. +#endif
  31937. + erq->flags = key + 1;
  31938. +
  31939. + if (crypt == NULL || crypt->ops == NULL) {
  31940. + erq->length = 0;
  31941. + erq->flags |= IW_ENCODE_DISABLED;
  31942. + return 0;
  31943. + }
  31944. +
  31945. + if (strcmp(crypt->ops->name, "WEP") != 0) {
  31946. + /* only WEP is supported with wireless extensions, so just
  31947. + * report that encryption is used */
  31948. + erq->length = 0;
  31949. + erq->flags |= IW_ENCODE_ENABLED;
  31950. + return 0;
  31951. + }
  31952. +
  31953. + len = crypt->ops->get_key(keybuf, WEP_KEY_LEN, NULL, crypt->priv);
  31954. + erq->length = (len >= 0 ? len : 0);
  31955. +
  31956. + erq->flags |= IW_ENCODE_ENABLED;
  31957. +
  31958. + if (ieee->open_wep)
  31959. + erq->flags |= IW_ENCODE_OPEN;
  31960. + else
  31961. + erq->flags |= IW_ENCODE_RESTRICTED;
  31962. +
  31963. + return 0;
  31964. +}
  31965. +
  31966. +int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
  31967. + struct iw_request_info *info,
  31968. + union iwreq_data *wrqu, char *extra)
  31969. +{
  31970. + struct net_device *dev = ieee->dev;
  31971. + struct iw_point *encoding = &wrqu->encoding;
  31972. + struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
  31973. + int i, idx, ret = 0;
  31974. + int group_key = 0;
  31975. + const char *alg, *module;
  31976. + struct ieee80211_crypto_ops *ops;
  31977. + struct ieee80211_crypt_data **crypt;
  31978. +
  31979. + struct ieee80211_security sec = {
  31980. + .flags = 0,
  31981. + };
  31982. + //printk("======>encoding flag:%x,ext flag:%x, ext alg:%d\n", encoding->flags,ext->ext_flags, ext->alg);
  31983. + idx = encoding->flags & IW_ENCODE_INDEX;
  31984. + if (idx) {
  31985. + if (idx < 1 || idx > WEP_KEYS)
  31986. + return -EINVAL;
  31987. + idx--;
  31988. + } else
  31989. + idx = ieee->tx_keyidx;
  31990. +
  31991. + if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
  31992. +#ifdef _RTL8187_EXT_PATCH_
  31993. + crypt = &ieee->cryptlist[0]->crypt[idx];
  31994. +#else
  31995. + crypt = &ieee->crypt[idx];
  31996. +#endif
  31997. + group_key = 1;
  31998. + } else {
  31999. + /* some Cisco APs use idx>0 for unicast in dynamic WEP */
  32000. + //printk("not group key, flags:%x, ext->alg:%d\n", ext->ext_flags, ext->alg);
  32001. + if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
  32002. + return -EINVAL;
  32003. + if (ieee->iw_mode == IW_MODE_INFRA)
  32004. +#ifdef _RTL8187_EXT_PATCH_
  32005. + crypt = &ieee->cryptlist[0]->crypt[idx];
  32006. +#else
  32007. + crypt = &ieee->crypt[idx];
  32008. +#endif
  32009. + else
  32010. + return -EINVAL;
  32011. + }
  32012. +
  32013. + sec.flags |= SEC_ENABLED;// | SEC_ENCRYPT;
  32014. + if ((encoding->flags & IW_ENCODE_DISABLED) ||
  32015. + ext->alg == IW_ENCODE_ALG_NONE) {
  32016. + if (*crypt)
  32017. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  32018. +
  32019. + for (i = 0; i < WEP_KEYS; i++)
  32020. +#ifdef _RTL8187_EXT_PATCH_
  32021. + if (ieee->cryptlist[0]->crypt[i] != NULL)
  32022. +#else
  32023. + if (ieee->crypt[i] != NULL)
  32024. +#endif
  32025. + break;
  32026. +
  32027. + if (i == WEP_KEYS) {
  32028. + sec.enabled = 0;
  32029. + // sec.encrypt = 0;
  32030. + sec.level = SEC_LEVEL_0;
  32031. + sec.flags |= SEC_LEVEL;
  32032. + }
  32033. + //printk("disabled: flag:%x\n", encoding->flags);
  32034. + goto done;
  32035. + }
  32036. +
  32037. + sec.enabled = 1;
  32038. + // sec.encrypt = 1;
  32039. +#if 0
  32040. + if (group_key ? !ieee->host_mc_decrypt :
  32041. + !(ieee->host_encrypt || ieee->host_decrypt ||
  32042. + ieee->host_encrypt_msdu))
  32043. + goto skip_host_crypt;
  32044. +#endif
  32045. + switch (ext->alg) {
  32046. + case IW_ENCODE_ALG_WEP:
  32047. + alg = "WEP";
  32048. + module = "ieee80211_crypt_wep";
  32049. + break;
  32050. + case IW_ENCODE_ALG_TKIP:
  32051. + alg = "TKIP";
  32052. + module = "ieee80211_crypt_tkip";
  32053. + break;
  32054. + case IW_ENCODE_ALG_CCMP:
  32055. + alg = "CCMP";
  32056. + module = "ieee80211_crypt_ccmp";
  32057. + break;
  32058. + default:
  32059. + IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
  32060. + dev->name, ext->alg);
  32061. + ret = -EINVAL;
  32062. + goto done;
  32063. + }
  32064. + printk("alg name:%s\n",alg);
  32065. +
  32066. + ops = ieee80211_get_crypto_ops(alg);
  32067. + if (ops == NULL) {
  32068. + request_module(module);
  32069. + ops = ieee80211_get_crypto_ops(alg);
  32070. + }
  32071. + if (ops == NULL) {
  32072. + IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
  32073. + dev->name, ext->alg);
  32074. + printk("========>unknown crypto alg %d\n", ext->alg);
  32075. + ret = -EINVAL;
  32076. + goto done;
  32077. + }
  32078. +
  32079. + if (*crypt == NULL || (*crypt)->ops != ops) {
  32080. + struct ieee80211_crypt_data *new_crypt;
  32081. +
  32082. + ieee80211_crypt_delayed_deinit(ieee, crypt);
  32083. +
  32084. + new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
  32085. + if (new_crypt == NULL) {
  32086. + ret = -ENOMEM;
  32087. + goto done;
  32088. + }
  32089. + new_crypt->ops = ops;
  32090. + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
  32091. + new_crypt->priv = new_crypt->ops->init(idx);
  32092. + if (new_crypt->priv == NULL) {
  32093. + kfree(new_crypt);
  32094. + ret = -EINVAL;
  32095. + goto done;
  32096. + }
  32097. + *crypt = new_crypt;
  32098. +
  32099. + }
  32100. + //I need to deinit other crypt here in mesh mode instead deinit them while use them to tx&rx.
  32101. +#ifdef _RTL8187_EXT_PATCH_
  32102. + if (ieee->iw_mode == ieee->iw_ext_mode)
  32103. + {
  32104. + int j;
  32105. + for (j=1; j<MAX_MP; j++)
  32106. + {
  32107. + struct ieee80211_crypt_data ** crypttmp = &ieee->cryptlist[j]->crypt[idx];
  32108. + if (*crypttmp == NULL)
  32109. + break;
  32110. + if (*crypttmp && (*crypttmp)->ops != ops)
  32111. + ieee80211_crypt_delayed_deinit(ieee, crypttmp);
  32112. + }
  32113. + }
  32114. +#endif
  32115. + if (ext->key_len > 0 && (*crypt)->ops->set_key &&
  32116. + (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
  32117. + (*crypt)->priv) < 0) {
  32118. + IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name);
  32119. + printk("key setting failed\n");
  32120. + ret = -EINVAL;
  32121. + goto done;
  32122. + }
  32123. +#if 1
  32124. +// skip_host_crypt:
  32125. + //printk("skip_host_crypt:ext_flags:%x\n", ext->ext_flags);
  32126. + if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
  32127. + ieee->tx_keyidx = idx;
  32128. + sec.active_key = idx;
  32129. + sec.flags |= SEC_ACTIVE_KEY;
  32130. + }
  32131. +
  32132. + if (ext->alg != IW_ENCODE_ALG_NONE) {
  32133. + memcpy(sec.keys[idx], ext->key, ext->key_len);
  32134. + sec.key_sizes[idx] = ext->key_len;
  32135. + sec.flags |= (1 << idx);
  32136. + if (ext->alg == IW_ENCODE_ALG_WEP) {
  32137. + // sec.encode_alg[idx] = SEC_ALG_WEP;
  32138. + sec.flags |= SEC_LEVEL;
  32139. + sec.level = SEC_LEVEL_1;
  32140. + } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
  32141. + // sec.encode_alg[idx] = SEC_ALG_TKIP;
  32142. + sec.flags |= SEC_LEVEL;
  32143. + sec.level = SEC_LEVEL_2;
  32144. + } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
  32145. + // sec.encode_alg[idx] = SEC_ALG_CCMP;
  32146. + sec.flags |= SEC_LEVEL;
  32147. + sec.level = SEC_LEVEL_3;
  32148. + }
  32149. + /* Don't set sec level for group keys. */
  32150. + if (group_key)
  32151. + sec.flags &= ~SEC_LEVEL;
  32152. + }
  32153. +#endif
  32154. +done:
  32155. + if (ieee->set_security)
  32156. + ieee->set_security(ieee->dev, &sec);
  32157. +
  32158. + if (ieee->reset_on_keychange &&
  32159. + ieee->iw_mode != IW_MODE_INFRA &&
  32160. + ieee->reset_port && ieee->reset_port(dev)) {
  32161. + IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name);
  32162. + return -EINVAL;
  32163. + }
  32164. +
  32165. + return ret;
  32166. +}
  32167. +int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
  32168. + struct iw_request_info *info,
  32169. + union iwreq_data *wrqu, char *extra)
  32170. +{
  32171. + struct iw_mlme *mlme = (struct iw_mlme *) extra;
  32172. +// printk("\ndkgadfslkdjgalskdf===============>%s(), cmd:%x\n", __FUNCTION__, mlme->cmd);
  32173. +#if 1
  32174. + switch (mlme->cmd) {
  32175. + case IW_MLME_DEAUTH:
  32176. + case IW_MLME_DISASSOC:
  32177. + // printk("disassoc now\n");
  32178. + ieee80211_disassociate(ieee);
  32179. + break;
  32180. + default:
  32181. + return -EOPNOTSUPP;
  32182. + }
  32183. +#endif
  32184. + return 0;
  32185. +}
  32186. +
  32187. +int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
  32188. + struct iw_request_info *info,
  32189. + struct iw_param *data, char *extra)
  32190. +{
  32191. +/*
  32192. + struct ieee80211_security sec = {
  32193. + .flags = SEC_AUTH_MODE,
  32194. + }
  32195. +*/
  32196. + //printk("set auth:flag:%x, data value:%x\n", data->flags, data->value);
  32197. + switch (data->flags & IW_AUTH_INDEX) {
  32198. + case IW_AUTH_WPA_VERSION:
  32199. + /*need to support wpa2 here*/
  32200. + //printk("wpa version:%x\n", data->value);
  32201. + break;
  32202. + case IW_AUTH_CIPHER_PAIRWISE:
  32203. + case IW_AUTH_CIPHER_GROUP:
  32204. + case IW_AUTH_KEY_MGMT:
  32205. + /*
  32206. + * * Host AP driver does not use these parameters and allows
  32207. + * * wpa_supplicant to control them internally.
  32208. + * */
  32209. + break;
  32210. + case IW_AUTH_TKIP_COUNTERMEASURES:
  32211. + ieee->tkip_countermeasures = data->value;
  32212. + break;
  32213. + case IW_AUTH_DROP_UNENCRYPTED:
  32214. + ieee->drop_unencrypted = data->value;
  32215. + break;
  32216. +
  32217. + case IW_AUTH_80211_AUTH_ALG:
  32218. + ieee->open_wep = (data->value&IW_AUTH_ALG_OPEN_SYSTEM)?1:0;
  32219. + //printk("open_wep:%d\n", ieee->open_wep);
  32220. + break;
  32221. +
  32222. +#if 1
  32223. + case IW_AUTH_WPA_ENABLED:
  32224. + ieee->wpa_enabled = (data->value)?1:0;
  32225. + //printk("enalbe wpa:%d\n", ieee->wpa_enabled);
  32226. + break;
  32227. +
  32228. +#endif
  32229. + case IW_AUTH_RX_UNENCRYPTED_EAPOL:
  32230. + ieee->ieee802_1x = data->value;
  32231. + break;
  32232. + case IW_AUTH_PRIVACY_INVOKED:
  32233. + ieee->privacy_invoked = data->value;
  32234. + break;
  32235. + default:
  32236. + return -EOPNOTSUPP;
  32237. + }
  32238. + return 0;
  32239. +}
  32240. +
  32241. +#if 1
  32242. +int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
  32243. +{
  32244. +#if 0
  32245. + printk("====>%s()\n", __FUNCTION__);
  32246. + {
  32247. + int i;
  32248. + for (i=0; i<len; i++)
  32249. + printk("%2x ", ie[i]&0xff);
  32250. + printk("\n");
  32251. + }
  32252. +#endif
  32253. + u8 *buf = NULL;
  32254. +
  32255. + if (len>MAX_WPA_IE_LEN || (len && ie == NULL))
  32256. + {
  32257. + // printk("return error out, len:%d\n", len);
  32258. + return -EINVAL;
  32259. + }
  32260. + if (len)
  32261. + {
  32262. +
  32263. + if (len != ie[1]+2) printk("len:%d, ie:%d\n", (int)len, ie[1]);
  32264. + buf = kmalloc(len, GFP_KERNEL);
  32265. + if (buf == NULL)
  32266. + return -ENOMEM;
  32267. + memcpy(buf, ie, len);
  32268. + kfree(ieee->wpa_ie);
  32269. + ieee->wpa_ie = buf;
  32270. + ieee->wpa_ie_len = len;
  32271. + }
  32272. + else{
  32273. + if (ieee->wpa_ie)
  32274. + kfree(ieee->wpa_ie);
  32275. + ieee->wpa_ie = NULL;
  32276. + ieee->wpa_ie_len = 0;
  32277. + }
  32278. +// printk("<=====out %s()\n", __FUNCTION__);
  32279. +
  32280. + return 0;
  32281. +
  32282. +}
  32283. +#endif
  32284. +
  32285. +EXPORT_SYMBOL(ieee80211_wx_set_gen_ie);
  32286. +EXPORT_SYMBOL(ieee80211_wx_set_mlme);
  32287. +EXPORT_SYMBOL(ieee80211_wx_set_auth);
  32288. +EXPORT_SYMBOL(ieee80211_wx_set_encode_ext);
  32289. +EXPORT_SYMBOL(ieee80211_wx_get_scan);
  32290. +EXPORT_SYMBOL(ieee80211_wx_set_encode);
  32291. +EXPORT_SYMBOL(ieee80211_wx_get_encode);
  32292. +#if 0
  32293. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_scan);
  32294. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_encode);
  32295. +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_encode);
  32296. +#endif
  32297. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/internal.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/internal.h
  32298. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/internal.h 1970-01-01 01:00:00.000000000 +0100
  32299. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/internal.h 2009-08-23 19:01:04.000000000 +0200
  32300. @@ -0,0 +1,115 @@
  32301. +/*
  32302. + * Cryptographic API.
  32303. + *
  32304. + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
  32305. + *
  32306. + * This program is free software; you can redistribute it and/or modify it
  32307. + * under the terms of the GNU General Public License as published by the Free
  32308. + * Software Foundation; either version 2 of the License, or (at your option)
  32309. + * any later version.
  32310. + *
  32311. + */
  32312. +#ifndef _CRYPTO_INTERNAL_H
  32313. +#define _CRYPTO_INTERNAL_H
  32314. +
  32315. +
  32316. +//#include <linux/crypto.h>
  32317. +#include "rtl_crypto.h"
  32318. +#include <linux/mm.h>
  32319. +#include <linux/highmem.h>
  32320. +#include <linux/init.h>
  32321. +#include <asm/hardirq.h>
  32322. +#include <asm/softirq.h>
  32323. +#include <asm/kmap_types.h>
  32324. +
  32325. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20))
  32326. +#define list_for_each_entry(pos, head, member) \
  32327. + for (pos = list_entry((head)->next, typeof(*pos), member), \
  32328. + prefetch(pos->member.next); \
  32329. + &pos->member != (head); \
  32330. + pos = list_entry(pos->member.next, typeof(*pos), member), \
  32331. + prefetch(pos->member.next))
  32332. +
  32333. +static inline void cond_resched(void)
  32334. +{
  32335. + if (need_resched()) {
  32336. + set_current_state(TASK_RUNNING);
  32337. + schedule();
  32338. + }
  32339. +}
  32340. +#endif
  32341. +
  32342. +extern enum km_type crypto_km_types[];
  32343. +
  32344. +static inline enum km_type crypto_kmap_type(int out)
  32345. +{
  32346. + return crypto_km_types[(in_softirq() ? 2 : 0) + out];
  32347. +}
  32348. +
  32349. +static inline void *crypto_kmap(struct page *page, int out)
  32350. +{
  32351. + return kmap_atomic(page, crypto_kmap_type(out));
  32352. +}
  32353. +
  32354. +static inline void crypto_kunmap(void *vaddr, int out)
  32355. +{
  32356. + kunmap_atomic(vaddr, crypto_kmap_type(out));
  32357. +}
  32358. +
  32359. +static inline void crypto_yield(struct crypto_tfm *tfm)
  32360. +{
  32361. + if (!in_softirq())
  32362. + cond_resched();
  32363. +}
  32364. +
  32365. +static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
  32366. +{
  32367. + return (void *)&tfm[1];
  32368. +}
  32369. +
  32370. +struct crypto_alg *crypto_alg_lookup(const char *name);
  32371. +
  32372. +#ifdef CONFIG_KMOD
  32373. +void crypto_alg_autoload(const char *name);
  32374. +struct crypto_alg *crypto_alg_mod_lookup(const char *name);
  32375. +#else
  32376. +static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
  32377. +{
  32378. + return crypto_alg_lookup(name);
  32379. +}
  32380. +#endif
  32381. +
  32382. +#ifdef CONFIG_CRYPTO_HMAC
  32383. +int crypto_alloc_hmac_block(struct crypto_tfm *tfm);
  32384. +void crypto_free_hmac_block(struct crypto_tfm *tfm);
  32385. +#else
  32386. +static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
  32387. +{
  32388. + return 0;
  32389. +}
  32390. +
  32391. +static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
  32392. +{ }
  32393. +#endif
  32394. +
  32395. +#ifdef CONFIG_PROC_FS
  32396. +void __init crypto_init_proc(void);
  32397. +#else
  32398. +static inline void crypto_init_proc(void)
  32399. +{ }
  32400. +#endif
  32401. +
  32402. +int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
  32403. +int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
  32404. +int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
  32405. +
  32406. +int crypto_init_digest_ops(struct crypto_tfm *tfm);
  32407. +int crypto_init_cipher_ops(struct crypto_tfm *tfm);
  32408. +int crypto_init_compress_ops(struct crypto_tfm *tfm);
  32409. +
  32410. +void crypto_exit_digest_ops(struct crypto_tfm *tfm);
  32411. +void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
  32412. +void crypto_exit_compress_ops(struct crypto_tfm *tfm);
  32413. +
  32414. +#endif /* _CRYPTO_INTERNAL_H */
  32415. +
  32416. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/kmap_types.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/kmap_types.h
  32417. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/kmap_types.h 1970-01-01 01:00:00.000000000 +0100
  32418. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/kmap_types.h 2009-08-23 19:01:04.000000000 +0200
  32419. @@ -0,0 +1,20 @@
  32420. +#ifndef __KMAP_TYPES_H
  32421. +
  32422. +#define __KMAP_TYPES_H
  32423. +
  32424. +
  32425. +enum km_type {
  32426. + KM_BOUNCE_READ,
  32427. + KM_SKB_SUNRPC_DATA,
  32428. + KM_SKB_DATA_SOFTIRQ,
  32429. + KM_USER0,
  32430. + KM_USER1,
  32431. + KM_BH_IRQ,
  32432. + KM_SOFTIRQ0,
  32433. + KM_SOFTIRQ1,
  32434. + KM_TYPE_NR
  32435. +};
  32436. +
  32437. +#define _ASM_KMAP_TYPES_H
  32438. +
  32439. +#endif
  32440. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/readme linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/readme
  32441. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/readme 1970-01-01 01:00:00.000000000 +0100
  32442. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/readme 2009-08-23 19:01:04.000000000 +0200
  32443. @@ -0,0 +1,162 @@
  32444. +What this layer should do
  32445. +
  32446. +- It mantain the old mechanism as alternative, so the
  32447. + ipw2100 driver works with really few changes.
  32448. +- Encapsulate / Decapsulate ieee80211 packet
  32449. +- Handle fragmentation
  32450. +- Optionally provide an alterantive mechanism for netif queue stop/wake,
  32451. + so that the ieee80211 layer will pass one fragment per time instead of
  32452. + one txb struct per time. so the driver can stop the queue in the middle
  32453. + of a packet.
  32454. +- Provide two different TX interfaces for cards that can handle management
  32455. + frames on one HW queue, and data on another, and for cards that have only
  32456. + one HW queue (the latter untested and very, very rough).
  32457. +- Optionally provide the logic for handling IBSS/MASTER/MONITOR/BSS modes
  32458. + and for the channel, essid and wap get/set wireless extension requests.
  32459. + so that the driver has only to change channel when the ieee stack tell it.
  32460. +- Optionally provide a scanning mechanism so that the driver has not to
  32461. + worry about this, just implement the set channel calback and pass
  32462. + frames to the upper layer
  32463. +- Optionally provide the bss client protocol handshaking (just with open
  32464. + authentication)
  32465. +- Optionally provide the probe request send mechanism
  32466. +- Optionally provide the bss master mode logic to handle association
  32467. + protocol (only open authentication) and probe responses.
  32468. +- SW wep encryption (with open authentication)
  32469. +- It collects some stats
  32470. +- It provides beacons to the card when it ask for them
  32471. +
  32472. +What this layer doesn't do (yet)
  32473. +- Perform shared authentication
  32474. +- Have full support for master mode (the AP should loop back in the air
  32475. + frames from an associated client to another. This could be done easily
  32476. + with few lines of code, and it is done in my previous version of the
  32477. + stach, but a table of association must be keept and a disassociation
  32478. + policy must be decided and implemented.
  32479. +- Handle cleanly the full ieee 802.11 protocol. In AP mode it never
  32480. + disassociate clients, and it is really prone to always allow access.
  32481. + In bss client mode it is a bit rough with AP deauth and disassoc requests.
  32482. +- It has not any entry point to view the collected stats.
  32483. +- Altought it takes care of the card supported rates in the management frame
  32484. + it sends, support for rate changing on TXed packet is not complete.
  32485. +- Give up once associated in bss client mode (it never detect a
  32486. + signal loss condition to disassociate and restart scanning)
  32487. +- Provide a mechanism for enabling the TX in monitor mode, so
  32488. + userspace programs can TX raw packets.
  32489. +- Provide a mechanism for cards that need that the SW take care of beacon
  32490. + TX completely, in sense that the SW has to enqueue by itself beacons
  32491. + to the card so it TX them (if any...)
  32492. +APIs
  32493. +
  32494. +Callback functions in the original stack has been mantained.
  32495. +following has been added (from ieee80211.h)
  32496. +
  32497. + /* Softmac-generated frames (mamagement) are TXed via this
  32498. + * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
  32499. + * not set. As some cards may have different HW queues that
  32500. + * one might want to use for data and management frames
  32501. + * the option to have two callbacks might be useful.
  32502. + * This fucntion can't sleep.
  32503. + */
  32504. + int (*softmac_hard_start_xmit)(struct sk_buff *skb,
  32505. + struct net_device *dev);
  32506. +
  32507. + /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
  32508. + * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
  32509. + * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
  32510. + * then also management frames are sent via this callback.
  32511. + * This function can't sleep.
  32512. + */
  32513. + void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
  32514. + struct net_device *dev);
  32515. +
  32516. + /* stops the HW queue for DATA frames. Useful to avoid
  32517. + * waste time to TX data frame when we are reassociating
  32518. + * This function can sleep.
  32519. + */
  32520. + void (*data_hard_stop)(struct net_device *dev);
  32521. +
  32522. + /* OK this is complementar to data_poll_hard_stop */
  32523. + void (*data_hard_resume)(struct net_device *dev);
  32524. +
  32525. + /* ask to the driver to retune the radio .
  32526. + * This function can sleep. the driver should ensure
  32527. + * the radio has been swithced before return.
  32528. + */
  32529. + void (*set_chan)(struct net_device *dev,short ch);
  32530. +
  32531. + /* These are not used if the ieee stack takes care of
  32532. + * scanning (IEEE_SOFTMAC_SCAN feature set).
  32533. + * In this case only the set_chan is used.
  32534. + *
  32535. + * The syncro version is similar to the start_scan but
  32536. + * does not return until all channels has been scanned.
  32537. + * this is called in user context and should sleep,
  32538. + * it is called in a work_queue when swithcing to ad-hoc mode
  32539. + * or in behalf of iwlist scan when the card is associated
  32540. + * and root user ask for a scan.
  32541. + * the fucntion stop_scan should stop both the syncro and
  32542. + * background scanning and can sleep.
  32543. + * The fucntion start_scan should initiate the background
  32544. + * scanning and can't sleep.
  32545. + */
  32546. + void (*scan_syncro)(struct net_device *dev);
  32547. + void (*start_scan)(struct net_device *dev);
  32548. + void (*stop_scan)(struct net_device *dev);
  32549. +
  32550. + /* indicate the driver that the link state is changed
  32551. + * for example it may indicate the card is associated now.
  32552. + * Driver might be interested in this to apply RX filter
  32553. + * rules or simply light the LINK led
  32554. + */
  32555. + void (*link_change)(struct net_device *dev);
  32556. +
  32557. +Functions hard_data_[resume/stop] are optional and should not be used
  32558. +if the driver decides to uses data+management frames enqueue in a
  32559. +single HQ queue (thus using just the softmac_hard_data_start_xmit
  32560. +callback).
  32561. +
  32562. +Function that the driver can use are:
  32563. +
  32564. +ieee80211_get_beacon - this is called by the driver when
  32565. + the HW needs a beacon.
  32566. +ieee80211_softmac_start_protocol - this should normally be called in the
  32567. + driver open function
  32568. +ieee80211_softmac_stop_protocol - the opposite of the above
  32569. +ieee80211_wake_queue - this is similar to netif_wake_queue
  32570. +ieee80211_reset_queue - this throw away fragments pending(if any)
  32571. +ieee80211_stop_queue - this is similar to netif_stop_queue
  32572. +
  32573. +
  32574. +known BUGS:
  32575. +- When performing syncro scan (possiblily when swithcing to ad-hoc mode
  32576. + and when running iwlist scan when associated) there is still an odd
  32577. + behaviour.. I have not looked in this more accurately (yet).
  32578. +
  32579. +locking:
  32580. +locking is done by means of three structures.
  32581. +1- ieee->lock (by means of spin_[un]lock_irq[save/restore]
  32582. +2- ieee->wx_sem
  32583. +3- ieee->scan_sem
  32584. +
  32585. +the lock 1 is what protect most of the critical sections in the ieee stack.
  32586. +the lock 2 is used to avoid that more than one of the SET wireless extension
  32587. +handlers (as well as start/stop protocol function) are running at the same time.
  32588. +the lock 1 is used when we need to modify or read the shared data in the wx handlers.
  32589. +In other words the lock 2 will prevent one SET action will run across another SET
  32590. +action (by make sleep the 2nd one) but allow GET actions, while the lock 1
  32591. +make atomic those little shared data access in both GET and SET operation.
  32592. +So get operation will be never be delayed really: they will never sleep..
  32593. +Furthermore in the top of some SET operations a flag is set before acquiring
  32594. +the lock. This is an help to make the previous running SET operation to
  32595. +finish faster if needed (just in case the second one will totally undo the
  32596. +first, so there is not need to complete the 1st really.. ).
  32597. +The background scanning mechaninsm is protected by the lock 1 except for the
  32598. +workqueue. this wq is here just to let the set_chan callback sleep (I thinked it
  32599. +might be appreciated by USB network card driver developer). In this case the lock 3
  32600. +take its turn.
  32601. +Thus the stop function needs both the locks.
  32602. +Funny in the syncro scan the lock 2 play its role (as both the syncro_scan
  32603. +function and the stop scan function are called with this semaphore held).
  32604. +
  32605. +
  32606. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/rtl8187_mesh.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/rtl8187_mesh.h
  32607. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/rtl8187_mesh.h 1970-01-01 01:00:00.000000000 +0100
  32608. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/rtl8187_mesh.h 2009-08-23 19:01:04.000000000 +0200
  32609. @@ -0,0 +1,282 @@
  32610. +#ifndef _RTL8187_MESH_H_
  32611. +#define _RTL8187_MESH_H_
  32612. +
  32613. +#include "msh_class.h" // struct mshclass
  32614. +#include "mesh.h" // struct MESH-Neighbor-Entry
  32615. +#include "ieee80211.h" // struct ieee80211-network
  32616. +#include "mesh_8185_util.h" // DOT11-QUEUE
  32617. +#include "hash_table.h" // hash-table
  32618. +#include "8185s_pathsel.h"
  32619. +#include <linux/list.h>
  32620. +
  32621. +#define GET_MESH_PRIV(x) ((struct mshclass_priv *)(x->priv))
  32622. +
  32623. +struct ieee80211_hdr_mesh {
  32624. + u16 frame_ctl;
  32625. + u16 duration_id;
  32626. + u8 addr1[ETH_ALEN];
  32627. + u8 addr2[ETH_ALEN];
  32628. + u8 addr3[ETH_ALEN];
  32629. + u16 seq_ctl;
  32630. + u8 addr4[ETH_ALEN];
  32631. + unsigned char mesh_flag;
  32632. + INT8 TTL;
  32633. + UINT16 segNum;
  32634. + unsigned char DestMACAddr[ETH_ALEN]; // modify for 6 address
  32635. + unsigned char SrcMACAddr[ETH_ALEN];
  32636. +} __attribute__ ((packed));
  32637. +
  32638. +struct myMeshIDNode {
  32639. + struct list_head list;
  32640. + char id[MESH_ID_LEN+1];
  32641. + short popEN;
  32642. + char tried;
  32643. + unsigned long expire;
  32644. + struct ieee80211_network mesh_network;
  32645. +};
  32646. +
  32647. +struct ieee80211_hdr_mesh_QOS {
  32648. + u16 frame_ctl;
  32649. + u16 duration_id;
  32650. + u8 addr1[ETH_ALEN];
  32651. + u8 addr2[ETH_ALEN];
  32652. + u8 addr3[ETH_ALEN];
  32653. + u16 seq_ctl;
  32654. + u8 addr4[ETH_ALEN];
  32655. + u16 QOS_ctl;
  32656. + unsigned char mesh_flag;
  32657. + INT8 TTL;
  32658. + UINT16 segNum;
  32659. + unsigned char DestMACAddr[ETH_ALEN]; // modify for 6 address
  32660. + unsigned char SrcMACAddr[ETH_ALEN];
  32661. +} __attribute__ ((packed));
  32662. +
  32663. +
  32664. +struct mesh_PeerEntry {
  32665. + // based on 8185ag.h
  32666. + struct list_head hash_list;
  32667. + unsigned int used; ///< used == TRUE => has been allocated, \n used == FALSE => can be allocated
  32668. + unsigned char hwaddr[MACADDRLEN]; ///< hardware address
  32669. +
  32670. + // struct list_head mesh_unEstablish_ptr; // 尚未(或從已連線 -> 未連線) 之 MP list
  32671. + struct list_head mesh_mp_ptr; // MP list
  32672. +
  32673. + /*mesh_neighbor:
  32674. + * Inited by "Neighbor Discovering"
  32675. + * cleaned by "Disassociation" or "Expired"
  32676. + */
  32677. + struct MESH_Neighbor_Entry mesh_neighbor_TBL;
  32678. +
  32679. + struct ieee80211_network * pstat; // a backward pointer
  32680. +
  32681. + // 802.11 seq checking
  32682. + u16 last_rxseq; /* rx seq previous per-tid */
  32683. + u16 last_rxfrag;/* tx frag previous per-tid */
  32684. + unsigned long last_time;
  32685. + //
  32686. +};
  32687. +
  32688. +
  32689. +struct mshclass_priv {
  32690. +
  32691. + struct mesh_PeerEntry *meshEntries; // 1-to-1 for priv->ieee80211->networks
  32692. +
  32693. + spinlock_t lock_stainfo; // lock for accessing the data structure of stat info
  32694. + spinlock_t lock_queue; // lock for DOT11_EnQueue2/DOT11_DeQueue2/enque/dequeue
  32695. + spinlock_t lock_Rreq; // lock for rreq_retry. Some function like aodv_expire/tx use lock_queue simultaneously
  32696. +// spinlock_t lock_meshlist;
  32697. +
  32698. + // struct _DOT11_QUEUE *pevent_queue; ///< 802.11 QUEUE結構
  32699. + // struct hash_table *pathsel_table; // GANTOE
  32700. + //tsananiu
  32701. + struct _DOT11_QUEUE *pathsel_queue; ///< 802.11 QUEUE結構
  32702. +
  32703. + //tsananiu end
  32704. +
  32705. + //add by shlu 20070518
  32706. + unsigned char RreqMAC[AODV_RREQ_TABLE_SIZE][6];
  32707. + unsigned int RreqBegin;
  32708. + unsigned int RreqEnd;
  32709. +
  32710. +#if defined(MESH_ROLE_ROOT) || defined(MESH_ROLE_PORTAL)
  32711. +#define MAX_SZ_BAD_MAC 3
  32712. + unsigned char BadMac[MAX_SZ_BAD_MAC][MACADDRLEN];
  32713. + int idx_BadMac;
  32714. +#endif // MESH_ROLE_ROOT || MESH_ROLE_PORTAL
  32715. +
  32716. + //-------------
  32717. + unsigned char root_mac[MACADDRLEN];
  32718. + struct mesh_info dot11MeshInfo; // extrated from wifi_mib (ieee802_mib.h)
  32719. + struct hash_table *proxy_table, *mesh_rreq_retry_queue; //GANTOE //GANTOE
  32720. + struct hash_table *pathsel_table; // add by chuangch 2007.09.13
  32721. + // add by Jason
  32722. + struct mpp_tb *pann_mpp_tb;
  32723. +
  32724. + struct timer_list expire_timer; // 1sec timer
  32725. +
  32726. + struct timer_list beacon_timer; // 1sec timer
  32727. + struct list_head stat_hash[MAX_NETWORK_COUNT]; // sta_info hash table (aid_obj)
  32728. +
  32729. + struct list_head meshList[MAX_CHANNEL_NUMBER];
  32730. + int scanMode;
  32731. +
  32732. + struct {
  32733. + struct ieee80211_network *pstat;
  32734. + unsigned char hwaddr[MACADDRLEN];
  32735. + } stainfo_cache;
  32736. +
  32737. + // The following elements are used by 802.11s.
  32738. + // For copyright-pretection, we use an independent (binary) module.
  32739. + // Note that it can also be put either under r8180_priv or ieee80211_device. The adv of put under
  32740. + // r8180_priv is to get "higher encapsulation". On the other hand, r8180_priv was originally designed
  32741. + // for "hardward specific."
  32742. + char mesh_mac_filter_allow[8][13];
  32743. + char mesh_mac_filter_deny[8][13];
  32744. +
  32745. + struct MESH_Share meshare; // mesh share data
  32746. +
  32747. + struct {
  32748. +
  32749. + int prev_iw_mode; // Save this->iw_mode for r8180_wx->r8180_wx_enable_mesh. No init requirement
  32750. +
  32751. + struct MESH_Profile mesh_profile; // contains MESHID
  32752. +
  32753. + struct mesh_info dot11MeshInfo; // contains meshMaxAssocNum
  32754. +
  32755. + struct net_device_stats mesh_stats;
  32756. +
  32757. + UINT8 mesh_Version; // 使用的版本
  32758. + // WLAN Mesh Capability
  32759. + INT16 mesh_PeerCAP_cap; // peer capability-Cap number (有號數)
  32760. + UINT8 mesh_PeerCAP_flags; // peer capability-flags
  32761. + UINT8 mesh_PowerSaveCAP; // Power Save capability
  32762. + UINT8 mesh_SyncCAP; // Synchronization capability
  32763. + UINT8 mesh_MDA_CAP; // MDA capability
  32764. + UINT32 mesh_ChannelPrecedence; // Channel Precedence
  32765. +
  32766. + // neighbor -> candidate neighbor, if mesh_available_peerlink > 0, page 56, D0.02
  32767. + UINT8 mesh_AvailablePeerLink; // 此是否有需要?(因它等同於 mesh_PeerCAP)=>暫 時保 留
  32768. +
  32769. + UINT8 mesh_HeaderFlags; // mesh header 內的 mesh flags field
  32770. +
  32771. + // MKD domain element [MKDDIE]
  32772. + UINT8 mesh_MKD_DomainID[6];
  32773. + UINT8 mesh_MKDDIE_SecurityConfiguration;
  32774. +
  32775. + // EMSA Handshake element [EMSAIE]
  32776. + UINT8 mesh_EMSAIE_ANonce[32];
  32777. + UINT8 mesh_EMSAIE_SNonce[32];
  32778. + UINT8 mesh_EMSAIE_MA_ID[6];
  32779. + UINT16 mesh_EMSAIE_MIC_Control;
  32780. + UINT8 mesh_EMSAIE_MIC[16];
  32781. +
  32782. + struct timer_list mesh_peer_link_timer; ///< 對尚未連 線(與連線退至未連線) MP mesh_unEstablish_hdr 作 peer link time out
  32783. +
  32784. +// struct timer_list mesh_beacon_timer;
  32785. + // mesh_unEstablish_hdr:
  32786. + // It is a list structure, only stores unEstablish (or Establish -> unEstablish [MP_HOLDING])MP entry
  32787. + // Each entry is a pointer pointing to an entry in "stat_info->mesh_mp_ptr"
  32788. + // and removed by successful "Peer link setup" or "Expired"
  32789. + struct list_head mesh_unEstablish_hdr;
  32790. +
  32791. + // mesh_mp_hdr:
  32792. + // It is a list of MP/MAP/MPP who has already passed "Peer link setup"
  32793. + // Each entry is a pointer pointing to an entry in "stat_info->mesh_mp_ptr"
  32794. + // Every entry is inserted by "successful peer link setup"
  32795. + // and removed by "Expired"
  32796. + struct list_head mesh_mp_hdr;
  32797. +
  32798. + } mesh;
  32799. +
  32800. + int iCurChannel; // remember the working channel
  32801. +};
  32802. +
  32803. +// Stanley, 04/23/07
  32804. +// The following mode is used by ieee80211_device->iw_mode
  32805. +// Although it is better to put the definition under linux/wireless.h (or wireless_copy.h), it is a system file
  32806. +// that we shouldn't modify directly.
  32807. +#define IW_MODE_MESH 11 /* 802.11s mesh mode */
  32808. +
  32809. +// Default MESHID
  32810. +#define IEEE80211S_DEFAULT_MESHID "802.11s"
  32811. +
  32812. +// callback for 802.11s
  32813. +extern short rtl8187_patch_ieee80211_probe_req_1 (struct ieee80211_device *ieee);
  32814. +extern u8* rtl8187_patch_ieee80211_probe_req_2 (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag);
  32815. +
  32816. +// wx
  32817. +extern int rtl8187_patch_r8180_wx_get_meshinfo(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32818. +extern int rtl8187_patch_r8180_wx_enable_mesh(struct net_device *dev);
  32819. +extern int rtl8187_patch_r8180_wx_disable_mesh(struct net_device *dev);
  32820. +extern int rtl8187_patch_r8180_wx_wx_set_meshID(struct net_device *dev, char *ext,unsigned char channel);
  32821. +extern void rtl8187_patch_r8180_wx_set_channel (struct ieee80211_device *ieee, int ch);
  32822. +extern int rtl8187_patch_r8180_wx_set_add_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32823. +extern int rtl8187_patch_r8180_wx_set_del_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32824. +extern int rtl8187_patch_r8180_wx_set_add_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32825. +extern int rtl8187_patch_r8180_wx_set_del_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32826. +extern int rtl8187_patch_r8180_wx_get_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32827. +extern int rtl8187_patch_r8180_wx_get_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32828. +
  32829. +extern int rtl8187_patch_r8180_wx_get_mesh_list(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32830. +extern int rtl8187_patch_r8180_wx_mesh_scan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  32831. +extern int rtl8187_patch_r8180_wx_get_selected_mesh(struct net_device *dev, int en, char *cho, char* id);
  32832. +//by amy for networkmanager UI
  32833. +extern int rtl8187_patch_r8180_wx_get_selected_mesh_channel(struct net_device *dev, char *extmeshid, char *cho);
  32834. +//by amy for networkmanager UI
  32835. +// osdep
  32836. +extern int rtl8187_patch_ieee80211_start_protocol (struct ieee80211_device *ieee);
  32837. +extern u8 rtl8187_patch_rtl8180_up(struct mshclass *priv);
  32838. +extern void rtl8187_patch_ieee80211_stop_protocol(struct ieee80211_device *ieee);
  32839. +
  32840. +// issue_assocreq_MP
  32841. +extern void rtl8187_patch_ieee80211_association_req_1 (struct ieee80211_assoc_request_frame *hdr);
  32842. +extern u8* rtl8187_patch_ieee80211_association_req_2 (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);
  32843. +
  32844. +// OnAssocReq_MP
  32845. +extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_assoc_req (struct ieee80211_device *ieee, struct sk_buff *skb);
  32846. +
  32847. +// issue_assocrsp_MP
  32848. +extern void rtl8187_patch_ieee80211_assoc_resp_by_net_1 (struct ieee80211_assoc_response_frame *assoc);
  32849. +u8* rtl8187_patch_ieee80211_assoc_resp_by_net_2 (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);
  32850. +
  32851. +// OnAssocRsp_MP
  32852. +extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_assoc_rsp (struct ieee80211_device *ieee, struct sk_buff *skb);
  32853. +
  32854. +
  32855. +extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_auth(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  32856. +extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_deauth(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  32857. +extern unsigned int rtl8187_patch_ieee80211_process_probe_response_1( struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_rx_stats *stats);
  32858. +extern void rtl8187_patch_ieee80211_rx_mgt_on_probe_req( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);
  32859. +extern void rtl8187_patch_ieee80211_rx_mgt_update_expire ( struct ieee80211_device *ieee, struct sk_buff *skb);
  32860. +
  32861. +// set channel
  32862. +extern int rtl8187_patch_ieee80211_ext_stop_scan_wq_set_channel (struct ieee80211_device *ieee);
  32863. +
  32864. +// on rx (rx isr)
  32865. +extern int rtl8187_patch_ieee80211_rx_on_rx (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);
  32866. +
  32867. +// r8187_core
  32868. +// handle ioctl
  32869. +extern int rtl8187_patch_rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  32870. +// create proc
  32871. +extern void rtl8187_patch_create_proc(struct r8180_priv *priv);
  32872. +extern void rtl8187_patch_remove_proc(struct r8180_priv *priv);
  32873. +
  32874. +// tx, xmit
  32875. +// locked by ieee->lock. Call ieee80211_softmac_xmit afterward
  32876. +extern struct ieee80211_txb* rtl8187_patch_ieee80211_xmit (struct sk_buff *skb, struct net_device *dev);
  32877. +
  32878. +// given a skb, output header's length
  32879. +extern int rtl8187_patch_ieee80211_rx_frame_get_hdrlen (struct ieee80211_device *ieee, struct sk_buff *skb);
  32880. +
  32881. +// check the frame control field, return 0: not accept, 1: accept
  32882. +extern int rtl8187_patch_ieee80211_rx_is_valid_framectl (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);
  32883. +
  32884. +// process_dataframe
  32885. +extern int rtl8187_patch_ieee80211_rx_process_dataframe (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  32886. +
  32887. +extern int rtl8187_patch_is_duplicate_packet (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);
  32888. +
  32889. +extern int rtl8187_patch_ieee80211_softmac_xmit_get_rate (struct ieee80211_device *ieee, struct sk_buff *skb);
  32890. +extern void ieee80211_start_mesh(struct ieee80211_device *ieee);
  32891. +#endif // _RTL8187_MESH_H_
  32892. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/rtl_crypto.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/rtl_crypto.h
  32893. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/rtl_crypto.h 1970-01-01 01:00:00.000000000 +0100
  32894. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/rtl_crypto.h 2009-08-23 19:01:04.000000000 +0200
  32895. @@ -0,0 +1,399 @@
  32896. +/*
  32897. + * Scatterlist Cryptographic API.
  32898. + *
  32899. + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
  32900. + * Copyright (c) 2002 David S. Miller (davem@redhat.com)
  32901. + *
  32902. + * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
  32903. + * and Nettle, by Niels M敿ēer.
  32904. + *
  32905. + * This program is free software; you can redistribute it and/or modify it
  32906. + * under the terms of the GNU General Public License as published by the Free
  32907. + * Software Foundation; either version 2 of the License, or (at your option)
  32908. + * any later version.
  32909. + *
  32910. + */
  32911. +#ifndef _LINUX_CRYPTO_H
  32912. +#define _LINUX_CRYPTO_H
  32913. +
  32914. +#include <linux/module.h>
  32915. +#include <linux/kernel.h>
  32916. +#include <linux/types.h>
  32917. +#include <linux/list.h>
  32918. +#include <linux/string.h>
  32919. +#include <asm/page.h>
  32920. +#include <asm/errno.h>
  32921. +
  32922. +#define crypto_register_alg crypto_register_alg_rtl
  32923. +#define crypto_unregister_alg crypto_unregister_alg_rtl
  32924. +#define crypto_alloc_tfm crypto_alloc_tfm_rtl
  32925. +#define crypto_free_tfm crypto_free_tfm_rtl
  32926. +#define crypto_alg_available crypto_alg_available_rtl
  32927. +
  32928. +/*
  32929. + * Algorithm masks and types.
  32930. + */
  32931. +#define CRYPTO_ALG_TYPE_MASK 0x000000ff
  32932. +#define CRYPTO_ALG_TYPE_CIPHER 0x00000001
  32933. +#define CRYPTO_ALG_TYPE_DIGEST 0x00000002
  32934. +#define CRYPTO_ALG_TYPE_COMPRESS 0x00000004
  32935. +
  32936. +/*
  32937. + * Transform masks and values (for crt_flags).
  32938. + */
  32939. +#define CRYPTO_TFM_MODE_MASK 0x000000ff
  32940. +#define CRYPTO_TFM_REQ_MASK 0x000fff00
  32941. +#define CRYPTO_TFM_RES_MASK 0xfff00000
  32942. +
  32943. +#define CRYPTO_TFM_MODE_ECB 0x00000001
  32944. +#define CRYPTO_TFM_MODE_CBC 0x00000002
  32945. +#define CRYPTO_TFM_MODE_CFB 0x00000004
  32946. +#define CRYPTO_TFM_MODE_CTR 0x00000008
  32947. +
  32948. +#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100
  32949. +#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000
  32950. +#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000
  32951. +#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000
  32952. +#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 0x00800000
  32953. +#define CRYPTO_TFM_RES_BAD_FLAGS 0x01000000
  32954. +
  32955. +/*
  32956. + * Miscellaneous stuff.
  32957. + */
  32958. +#define CRYPTO_UNSPEC 0
  32959. +#define CRYPTO_MAX_ALG_NAME 64
  32960. +
  32961. +struct scatterlist;
  32962. +
  32963. +/*
  32964. + * Algorithms: modular crypto algorithm implementations, managed
  32965. + * via crypto_register_alg() and crypto_unregister_alg().
  32966. + */
  32967. +struct cipher_alg {
  32968. + unsigned int cia_min_keysize;
  32969. + unsigned int cia_max_keysize;
  32970. + int (*cia_setkey)(void *ctx, const u8 *key,
  32971. + unsigned int keylen, u32 *flags);
  32972. + void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);
  32973. + void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);
  32974. +};
  32975. +
  32976. +struct digest_alg {
  32977. + unsigned int dia_digestsize;
  32978. + void (*dia_init)(void *ctx);
  32979. + void (*dia_update)(void *ctx, const u8 *data, unsigned int len);
  32980. + void (*dia_final)(void *ctx, u8 *out);
  32981. + int (*dia_setkey)(void *ctx, const u8 *key,
  32982. + unsigned int keylen, u32 *flags);
  32983. +};
  32984. +
  32985. +struct compress_alg {
  32986. + int (*coa_init)(void *ctx);
  32987. + void (*coa_exit)(void *ctx);
  32988. + int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,
  32989. + u8 *dst, unsigned int *dlen);
  32990. + int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,
  32991. + u8 *dst, unsigned int *dlen);
  32992. +};
  32993. +
  32994. +#define cra_cipher cra_u.cipher
  32995. +#define cra_digest cra_u.digest
  32996. +#define cra_compress cra_u.compress
  32997. +
  32998. +struct crypto_alg {
  32999. + struct list_head cra_list;
  33000. + u32 cra_flags;
  33001. + unsigned int cra_blocksize;
  33002. + unsigned int cra_ctxsize;
  33003. + const char cra_name[CRYPTO_MAX_ALG_NAME];
  33004. +
  33005. + union {
  33006. + struct cipher_alg cipher;
  33007. + struct digest_alg digest;
  33008. + struct compress_alg compress;
  33009. + } cra_u;
  33010. +
  33011. + struct module *cra_module;
  33012. +};
  33013. +
  33014. +/*
  33015. + * Algorithm registration interface.
  33016. + */
  33017. +int crypto_register_alg(struct crypto_alg *alg);
  33018. +int crypto_unregister_alg(struct crypto_alg *alg);
  33019. +
  33020. +/*
  33021. + * Algorithm query interface.
  33022. + */
  33023. +int crypto_alg_available(const char *name, u32 flags);
  33024. +
  33025. +/*
  33026. + * Transforms: user-instantiated objects which encapsulate algorithms
  33027. + * and core processing logic. Managed via crypto_alloc_tfm() and
  33028. + * crypto_free_tfm(), as well as the various helpers below.
  33029. + */
  33030. +struct crypto_tfm;
  33031. +
  33032. +struct cipher_tfm {
  33033. + void *cit_iv;
  33034. + unsigned int cit_ivsize;
  33035. + u32 cit_mode;
  33036. + int (*cit_setkey)(struct crypto_tfm *tfm,
  33037. + const u8 *key, unsigned int keylen);
  33038. + int (*cit_encrypt)(struct crypto_tfm *tfm,
  33039. + struct scatterlist *dst,
  33040. + struct scatterlist *src,
  33041. + unsigned int nbytes);
  33042. + int (*cit_encrypt_iv)(struct crypto_tfm *tfm,
  33043. + struct scatterlist *dst,
  33044. + struct scatterlist *src,
  33045. + unsigned int nbytes, u8 *iv);
  33046. + int (*cit_decrypt)(struct crypto_tfm *tfm,
  33047. + struct scatterlist *dst,
  33048. + struct scatterlist *src,
  33049. + unsigned int nbytes);
  33050. + int (*cit_decrypt_iv)(struct crypto_tfm *tfm,
  33051. + struct scatterlist *dst,
  33052. + struct scatterlist *src,
  33053. + unsigned int nbytes, u8 *iv);
  33054. + void (*cit_xor_block)(u8 *dst, const u8 *src);
  33055. +};
  33056. +
  33057. +struct digest_tfm {
  33058. + void (*dit_init)(struct crypto_tfm *tfm);
  33059. + void (*dit_update)(struct crypto_tfm *tfm,
  33060. + struct scatterlist *sg, unsigned int nsg);
  33061. + void (*dit_final)(struct crypto_tfm *tfm, u8 *out);
  33062. + void (*dit_digest)(struct crypto_tfm *tfm, struct scatterlist *sg,
  33063. + unsigned int nsg, u8 *out);
  33064. + int (*dit_setkey)(struct crypto_tfm *tfm,
  33065. + const u8 *key, unsigned int keylen);
  33066. +#ifdef CONFIG_CRYPTO_HMAC
  33067. + void *dit_hmac_block;
  33068. +#endif
  33069. +};
  33070. +
  33071. +struct compress_tfm {
  33072. + int (*cot_compress)(struct crypto_tfm *tfm,
  33073. + const u8 *src, unsigned int slen,
  33074. + u8 *dst, unsigned int *dlen);
  33075. + int (*cot_decompress)(struct crypto_tfm *tfm,
  33076. + const u8 *src, unsigned int slen,
  33077. + u8 *dst, unsigned int *dlen);
  33078. +};
  33079. +
  33080. +#define crt_cipher crt_u.cipher
  33081. +#define crt_digest crt_u.digest
  33082. +#define crt_compress crt_u.compress
  33083. +
  33084. +struct crypto_tfm {
  33085. +
  33086. + u32 crt_flags;
  33087. +
  33088. + union {
  33089. + struct cipher_tfm cipher;
  33090. + struct digest_tfm digest;
  33091. + struct compress_tfm compress;
  33092. + } crt_u;
  33093. +
  33094. + struct crypto_alg *__crt_alg;
  33095. +};
  33096. +
  33097. +/*
  33098. + * Transform user interface.
  33099. + */
  33100. +
  33101. +/*
  33102. + * crypto_alloc_tfm() will first attempt to locate an already loaded algorithm.
  33103. + * If that fails and the kernel supports dynamically loadable modules, it
  33104. + * will then attempt to load a module of the same name or alias. A refcount
  33105. + * is grabbed on the algorithm which is then associated with the new transform.
  33106. + *
  33107. + * crypto_free_tfm() frees up the transform and any associated resources,
  33108. + * then drops the refcount on the associated algorithm.
  33109. + */
  33110. +struct crypto_tfm *crypto_alloc_tfm(const char *alg_name, u32 tfm_flags);
  33111. +void crypto_free_tfm(struct crypto_tfm *tfm);
  33112. +
  33113. +/*
  33114. + * Transform helpers which query the underlying algorithm.
  33115. + */
  33116. +static inline const char *crypto_tfm_alg_name(struct crypto_tfm *tfm)
  33117. +{
  33118. + return tfm->__crt_alg->cra_name;
  33119. +}
  33120. +
  33121. +static inline const char *crypto_tfm_alg_modname(struct crypto_tfm *tfm)
  33122. +{
  33123. + struct crypto_alg *alg = tfm->__crt_alg;
  33124. +
  33125. + if (alg->cra_module)
  33126. + return alg->cra_module->name;
  33127. + else
  33128. + return NULL;
  33129. +}
  33130. +
  33131. +static inline u32 crypto_tfm_alg_type(struct crypto_tfm *tfm)
  33132. +{
  33133. + return tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK;
  33134. +}
  33135. +
  33136. +static inline unsigned int crypto_tfm_alg_min_keysize(struct crypto_tfm *tfm)
  33137. +{
  33138. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33139. + return tfm->__crt_alg->cra_cipher.cia_min_keysize;
  33140. +}
  33141. +
  33142. +static inline unsigned int crypto_tfm_alg_max_keysize(struct crypto_tfm *tfm)
  33143. +{
  33144. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33145. + return tfm->__crt_alg->cra_cipher.cia_max_keysize;
  33146. +}
  33147. +
  33148. +static inline unsigned int crypto_tfm_alg_ivsize(struct crypto_tfm *tfm)
  33149. +{
  33150. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33151. + return tfm->crt_cipher.cit_ivsize;
  33152. +}
  33153. +
  33154. +static inline unsigned int crypto_tfm_alg_blocksize(struct crypto_tfm *tfm)
  33155. +{
  33156. + return tfm->__crt_alg->cra_blocksize;
  33157. +}
  33158. +
  33159. +static inline unsigned int crypto_tfm_alg_digestsize(struct crypto_tfm *tfm)
  33160. +{
  33161. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33162. + return tfm->__crt_alg->cra_digest.dia_digestsize;
  33163. +}
  33164. +
  33165. +/*
  33166. + * API wrappers.
  33167. + */
  33168. +static inline void crypto_digest_init(struct crypto_tfm *tfm)
  33169. +{
  33170. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33171. + tfm->crt_digest.dit_init(tfm);
  33172. +}
  33173. +
  33174. +static inline void crypto_digest_update(struct crypto_tfm *tfm,
  33175. + struct scatterlist *sg,
  33176. + unsigned int nsg)
  33177. +{
  33178. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33179. + tfm->crt_digest.dit_update(tfm, sg, nsg);
  33180. +}
  33181. +
  33182. +static inline void crypto_digest_final(struct crypto_tfm *tfm, u8 *out)
  33183. +{
  33184. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33185. + tfm->crt_digest.dit_final(tfm, out);
  33186. +}
  33187. +
  33188. +static inline void crypto_digest_digest(struct crypto_tfm *tfm,
  33189. + struct scatterlist *sg,
  33190. + unsigned int nsg, u8 *out)
  33191. +{
  33192. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33193. + tfm->crt_digest.dit_digest(tfm, sg, nsg, out);
  33194. +}
  33195. +
  33196. +static inline int crypto_digest_setkey(struct crypto_tfm *tfm,
  33197. + const u8 *key, unsigned int keylen)
  33198. +{
  33199. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
  33200. + if (tfm->crt_digest.dit_setkey == NULL)
  33201. + return -ENOSYS;
  33202. + return tfm->crt_digest.dit_setkey(tfm, key, keylen);
  33203. +}
  33204. +
  33205. +static inline int crypto_cipher_setkey(struct crypto_tfm *tfm,
  33206. + const u8 *key, unsigned int keylen)
  33207. +{
  33208. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33209. + return tfm->crt_cipher.cit_setkey(tfm, key, keylen);
  33210. +}
  33211. +
  33212. +static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
  33213. + struct scatterlist *dst,
  33214. + struct scatterlist *src,
  33215. + unsigned int nbytes)
  33216. +{
  33217. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33218. + return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
  33219. +}
  33220. +
  33221. +static inline int crypto_cipher_encrypt_iv(struct crypto_tfm *tfm,
  33222. + struct scatterlist *dst,
  33223. + struct scatterlist *src,
  33224. + unsigned int nbytes, u8 *iv)
  33225. +{
  33226. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33227. + BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
  33228. + return tfm->crt_cipher.cit_encrypt_iv(tfm, dst, src, nbytes, iv);
  33229. +}
  33230. +
  33231. +static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
  33232. + struct scatterlist *dst,
  33233. + struct scatterlist *src,
  33234. + unsigned int nbytes)
  33235. +{
  33236. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33237. + return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
  33238. +}
  33239. +
  33240. +static inline int crypto_cipher_decrypt_iv(struct crypto_tfm *tfm,
  33241. + struct scatterlist *dst,
  33242. + struct scatterlist *src,
  33243. + unsigned int nbytes, u8 *iv)
  33244. +{
  33245. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33246. + BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
  33247. + return tfm->crt_cipher.cit_decrypt_iv(tfm, dst, src, nbytes, iv);
  33248. +}
  33249. +
  33250. +static inline void crypto_cipher_set_iv(struct crypto_tfm *tfm,
  33251. + const u8 *src, unsigned int len)
  33252. +{
  33253. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33254. + memcpy(tfm->crt_cipher.cit_iv, src, len);
  33255. +}
  33256. +
  33257. +static inline void crypto_cipher_get_iv(struct crypto_tfm *tfm,
  33258. + u8 *dst, unsigned int len)
  33259. +{
  33260. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
  33261. + memcpy(dst, tfm->crt_cipher.cit_iv, len);
  33262. +}
  33263. +
  33264. +static inline int crypto_comp_compress(struct crypto_tfm *tfm,
  33265. + const u8 *src, unsigned int slen,
  33266. + u8 *dst, unsigned int *dlen)
  33267. +{
  33268. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
  33269. + return tfm->crt_compress.cot_compress(tfm, src, slen, dst, dlen);
  33270. +}
  33271. +
  33272. +static inline int crypto_comp_decompress(struct crypto_tfm *tfm,
  33273. + const u8 *src, unsigned int slen,
  33274. + u8 *dst, unsigned int *dlen)
  33275. +{
  33276. + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
  33277. + return tfm->crt_compress.cot_decompress(tfm, src, slen, dst, dlen);
  33278. +}
  33279. +
  33280. +/*
  33281. + * HMAC support.
  33282. + */
  33283. +#ifdef CONFIG_CRYPTO_HMAC
  33284. +void crypto_hmac_init(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen);
  33285. +void crypto_hmac_update(struct crypto_tfm *tfm,
  33286. + struct scatterlist *sg, unsigned int nsg);
  33287. +void crypto_hmac_final(struct crypto_tfm *tfm, u8 *key,
  33288. + unsigned int *keylen, u8 *out);
  33289. +void crypto_hmac(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen,
  33290. + struct scatterlist *sg, unsigned int nsg, u8 *out);
  33291. +#endif /* CONFIG_CRYPTO_HMAC */
  33292. +
  33293. +#endif /* _LINUX_CRYPTO_H */
  33294. +
  33295. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/scatterwalk.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/scatterwalk.h
  33296. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/ieee80211/scatterwalk.h 1970-01-01 01:00:00.000000000 +0100
  33297. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/ieee80211/scatterwalk.h 2009-08-23 19:01:04.000000000 +0200
  33298. @@ -0,0 +1,51 @@
  33299. +/*
  33300. + * Cryptographic API.
  33301. + *
  33302. + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
  33303. + * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
  33304. + * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
  33305. + *
  33306. + * This program is free software; you can redistribute it and/or modify it
  33307. + * under the terms of the GNU General Public License as published by the Free
  33308. + * Software Foundation; either version 2 of the License, or (at your option)
  33309. + * any later version.
  33310. + *
  33311. + */
  33312. +
  33313. +#ifndef _CRYPTO_SCATTERWALK_H
  33314. +#define _CRYPTO_SCATTERWALK_H
  33315. +#include <linux/mm.h>
  33316. +#include <asm/scatterlist.h>
  33317. +
  33318. +struct scatter_walk {
  33319. + struct scatterlist *sg;
  33320. + struct page *page;
  33321. + void *data;
  33322. + unsigned int len_this_page;
  33323. + unsigned int len_this_segment;
  33324. + unsigned int offset;
  33325. +};
  33326. +
  33327. +/* Define sg_next is an inline routine now in case we want to change
  33328. + scatterlist to a linked list later. */
  33329. +static inline struct scatterlist *sg_next(struct scatterlist *sg)
  33330. +{
  33331. + return sg + 1;
  33332. +}
  33333. +
  33334. +static inline int scatterwalk_samebuf(struct scatter_walk *walk_in,
  33335. + struct scatter_walk *walk_out,
  33336. + void *src_p, void *dst_p)
  33337. +{
  33338. + return walk_in->page == walk_out->page &&
  33339. + walk_in->offset == walk_out->offset &&
  33340. + walk_in->data == src_p && walk_out->data == dst_p;
  33341. +}
  33342. +
  33343. +void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch);
  33344. +void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg);
  33345. +int scatterwalk_copychunks(void *buf, struct scatter_walk *walk, size_t nbytes, int out);
  33346. +void scatterwalk_map(struct scatter_walk *walk, int out);
  33347. +void scatterwalk_done(struct scatter_walk *walk, int out, int more);
  33348. +
  33349. +#endif /* _CRYPTO_SCATTERWALK_H */
  33350. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/Makefile linux-2.6.30.5/drivers/net/wireless/rtl8187b/Makefile
  33351. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/Makefile 1970-01-01 01:00:00.000000000 +0100
  33352. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/Makefile 2009-08-23 19:01:04.000000000 +0200
  33353. @@ -0,0 +1,41 @@
  33354. +obj-$(CONFIG_RTL8187B) += rtl8187b.o
  33355. +
  33356. +rtl8187b-objs := r8187_core.o \
  33357. + r8180_93cx6.o \
  33358. + r8180_wx.o \
  33359. + r8180_rtl8225.o \
  33360. + r8180_rtl8225z2.o \
  33361. + r8180_pm.o \
  33362. + r8180_dm.o \
  33363. + r8187_led.o \
  33364. + ieee80211/dot11d.o \
  33365. + ieee80211/ieee80211_softmac.o \
  33366. + ieee80211/ieee80211_rx.o \
  33367. + ieee80211/ieee80211_tx.o \
  33368. + ieee80211/ieee80211_wx.o \
  33369. + ieee80211/ieee80211_module.o \
  33370. + ieee80211/ieee80211_softmac_wx.o \
  33371. + ieee80211/ieee80211_crypt.o \
  33372. + ieee80211/ieee80211_crypt_tkip.o \
  33373. + ieee80211/ieee80211_crypt_ccmp.o \
  33374. + ieee80211/ieee80211_crypt_wep.o
  33375. +
  33376. +EXTRA_CFLAGS += -DCONFIG_RTL8180_PM
  33377. +EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX
  33378. +EXTRA_CFLAGS += -DTHOMAS_BEACON -DTHOMAS_TASKLET -DTHOMAS_SKB -DTHOMAS_TURBO
  33379. +EXTRA_CFLAGS += -DJOHN_IOCTL
  33380. +EXTRA_CFLAGS += -DLED
  33381. +#EXTRA_CFLAGS += -DLED_SHIN
  33382. +EXTRA_CFLAGS += -DPOLLING_METHOD_FOR_RADIO
  33383. +#EXTRA_CFLAGS += -DSW_ANTE_DIVERSITY
  33384. +EXTRA_CFLAGS += -DCPU_64BIT
  33385. +EXTRA_CFLAGS += -DCONFIG_IPS
  33386. +#CFLAGS += -DJOHN_HWSEC -DJOHN_TKIP
  33387. +#CFLAGS += -DJOHN_DUMP_TX
  33388. +#EXTRA_CFLAGS += -DJOHN_DUMP_TXPKT
  33389. +
  33390. +#Radio On/Off debug
  33391. +EXTRA_CFLAGS += -DCONFIG_RADIO_DEBUG
  33392. +
  33393. +#for dot11d
  33394. +EXTRA_CFLAGS += -DENABLE_DOT11D
  33395. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/msh_class.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/msh_class.h
  33396. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/msh_class.h 1970-01-01 01:00:00.000000000 +0100
  33397. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/msh_class.h 2009-08-23 19:01:04.000000000 +0200
  33398. @@ -0,0 +1,117 @@
  33399. +/*! \file msh_class.h
  33400. + \brief msh CLASS extension
  33401. +
  33402. + \date 2007/5/2
  33403. + \author Stanley Chang <chagnsl@cs.nctu.edu.tw>
  33404. +*/
  33405. +
  33406. +#ifndef _MESH_CLASS_HDR_H_
  33407. +#define _MESH_CLASS_HDR_H_
  33408. +
  33409. +#include <linux/if_ether.h> /* ETH_ALEN */
  33410. +#include <linux/kernel.h> /* ARRAY_SIZE */
  33411. +#include <linux/version.h>
  33412. +#include <linux/jiffies.h>
  33413. +#include <linux/timer.h>
  33414. +#include <linux/sched.h>
  33415. +
  33416. +#include "ieee80211/ieee80211.h" // for struct ieee80211-xxxx
  33417. +#include "r8187.h" // for struct r8180-priv
  33418. +
  33419. +#define MAC_TABLE_SIZE 8
  33420. +
  33421. +struct mshclass {
  33422. + struct r8180_priv * p8187;
  33423. +
  33424. + // callback functions
  33425. + // ieee80211_softmac.c
  33426. + int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); // start special mode
  33427. +
  33428. + short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); // return = 0: no more phases, >0: another phase
  33429. + u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); // return tag
  33430. +
  33431. + void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);
  33432. + u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);
  33433. +
  33434. + int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);
  33435. + int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);
  33436. +
  33437. + void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); // stop timer
  33438. +
  33439. + void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);
  33440. + u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);
  33441. +
  33442. + int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);
  33443. +
  33444. + struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
  33445. +
  33446. + int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);
  33447. + int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  33448. + int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  33449. +//by amy for mesh
  33450. + void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);
  33451. +//by amy for mesh
  33452. + /// r8180_wx.c
  33453. + int (*ext_patch_r8180_wx_get_meshinfo) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33454. + int (*ext_patch_r8180_wx_enable_mesh) (struct net_device *dev);
  33455. + int (*ext_patch_r8180_wx_disable_mesh) (struct net_device *dev);
  33456. + int (*ext_patch_r8180_wx_set_meshID) ( struct net_device *dev, char *ext);
  33457. +//by amy for mesh
  33458. + int (*ext_patch_r8180_wx_set_mesh_chan)(struct net_device *dev, unsigned char channel);
  33459. +//by amy for mesh
  33460. + void (*ext_patch_r8180_wx_set_channel) (struct ieee80211_device *ieee, int ch);
  33461. +
  33462. + int (*ext_patch_r8180_wx_set_add_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33463. + int (*ext_patch_r8180_wx_set_del_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33464. + int (*ext_patch_r8180_wx_set_add_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33465. + int (*ext_patch_r8180_wx_set_del_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33466. + int (*ext_patch_r8180_wx_get_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33467. + int (*ext_patch_r8180_wx_get_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33468. +
  33469. + int (*ext_patch_r8180_wx_get_mesh_list) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33470. + int (*ext_patch_r8180_wx_mesh_scan) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  33471. + int (*ext_patch_r8180_wx_get_selected_mesh)(struct net_device *dev, int en, char *cho, char* id);
  33472. +//by amy for networkmanager UI
  33473. + int (*ext_patch_r8180_wx_get_selected_mesh_channel)(struct net_device *dev, char* extmeshid, char *cho);
  33474. +//by amy for networkmanager UI
  33475. + /// r8187_core.c
  33476. + u8 (*ext_patch_rtl8180_up) (struct mshclass *priv);
  33477. +
  33478. + // ieee80211_rx.c
  33479. + unsigned int (*ext_patch_ieee80211_process_probe_response_1) ( struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_rx_stats *stats);
  33480. + void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);
  33481. +
  33482. + void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);
  33483. +
  33484. + int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);
  33485. +
  33486. + int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);
  33487. +
  33488. + int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);
  33489. +
  33490. + // return > 0 is success. 0 when failed
  33491. + int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
  33492. +
  33493. + int (*ext_patch_is_duplicate_packet) (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);
  33494. + /* added by david for setting acl dynamically */
  33495. + u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);
  33496. +
  33497. + // r8187_core.c
  33498. + int (*ext_patch_rtl8180_ioctl) (struct net_device *dev, struct ifreq *rq, int cmd);
  33499. + void (*ext_patch_create_proc) (struct r8180_priv *priv);
  33500. + void (*ext_patch_remove_proc) (struct r8180_priv *priv);
  33501. +
  33502. + // ieee80211_tx.c
  33503. +
  33504. + // locked by ieee->lock. Call ieee80211_softmac_xmit afterward
  33505. + struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);
  33506. +
  33507. + // DO NOT MODIFY ANY STRUCTURE BELOW THIS LINE
  33508. + u8 priv[0]; // mshclass_priv;
  33509. +};
  33510. +
  33511. +extern void free_mshobj(struct mshclass **pObj);
  33512. +extern struct mshclass *alloc_mshobj(struct r8180_priv *caller_priv);
  33513. +
  33514. +
  33515. +#endif // _MESH_CLASS_HDR_H_
  33516. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_93cx6.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_93cx6.c
  33517. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_93cx6.c 1970-01-01 01:00:00.000000000 +0100
  33518. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_93cx6.c 2009-08-23 19:01:04.000000000 +0200
  33519. @@ -0,0 +1,146 @@
  33520. +/*
  33521. + This files contains card eeprom (93c46 or 93c56) programming routines,
  33522. + memory is addressed by 16 bits words.
  33523. +
  33524. + This is part of rtl8180 OpenSource driver.
  33525. + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
  33526. + Released under the terms of GPL (General Public Licence)
  33527. +
  33528. + Parts of this driver are based on the GPL part of the
  33529. + official realtek driver.
  33530. +
  33531. + Parts of this driver are based on the rtl8180 driver skeleton
  33532. + from Patric Schenke & Andres Salomon.
  33533. +
  33534. + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  33535. +
  33536. + We want to tanks the Authors of those projects and the Ndiswrapper
  33537. + project Authors.
  33538. +*/
  33539. +
  33540. +#include "r8180_93cx6.h"
  33541. +
  33542. +void eprom_cs(struct net_device *dev, short bit)
  33543. +{
  33544. + if(bit)
  33545. + write_nic_byte(dev, EPROM_CMD,
  33546. + (1<<EPROM_CS_SHIFT) | \
  33547. + read_nic_byte(dev, EPROM_CMD)); //enable EPROM
  33548. + else
  33549. + write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
  33550. + &~(1<<EPROM_CS_SHIFT)); //disable EPROM
  33551. +
  33552. + force_pci_posting(dev);
  33553. + udelay(EPROM_DELAY);
  33554. +}
  33555. +
  33556. +
  33557. +void eprom_ck_cycle(struct net_device *dev)
  33558. +{
  33559. + write_nic_byte(dev, EPROM_CMD,
  33560. + (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD));
  33561. + force_pci_posting(dev);
  33562. + udelay(EPROM_DELAY);
  33563. + write_nic_byte(dev, EPROM_CMD,
  33564. + read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
  33565. + force_pci_posting(dev);
  33566. + udelay(EPROM_DELAY);
  33567. +}
  33568. +
  33569. +
  33570. +void eprom_w(struct net_device *dev,short bit)
  33571. +{
  33572. + if(bit)
  33573. + write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
  33574. + read_nic_byte(dev,EPROM_CMD));
  33575. + else
  33576. + write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
  33577. + &~(1<<EPROM_W_SHIFT));
  33578. +
  33579. + force_pci_posting(dev);
  33580. + udelay(EPROM_DELAY);
  33581. +}
  33582. +
  33583. +
  33584. +short eprom_r(struct net_device *dev)
  33585. +{
  33586. + short bit;
  33587. +
  33588. + bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
  33589. + udelay(EPROM_DELAY);
  33590. +
  33591. + if(bit) return 1;
  33592. + return 0;
  33593. +}
  33594. +
  33595. +
  33596. +void eprom_send_bits_string(struct net_device *dev, short b[], int len)
  33597. +{
  33598. + int i;
  33599. +
  33600. + for(i=0; i<len; i++){
  33601. + eprom_w(dev, b[i]);
  33602. + eprom_ck_cycle(dev);
  33603. + }
  33604. +}
  33605. +
  33606. +
  33607. +u32 eprom_read(struct net_device *dev, u32 addr)
  33608. +{
  33609. + struct r8180_priv *priv = ieee80211_priv(dev);
  33610. + short read_cmd[]={1,1,0};
  33611. + short addr_str[8];
  33612. + int i;
  33613. + int addr_len;
  33614. + u32 ret;
  33615. +
  33616. + ret=0;
  33617. + //enable EPROM programming
  33618. + write_nic_byte(dev, EPROM_CMD,
  33619. + (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
  33620. + force_pci_posting(dev);
  33621. + udelay(EPROM_DELAY);
  33622. +
  33623. + if (priv->epromtype==EPROM_93c56){
  33624. + addr_str[7]=addr & 1;
  33625. + addr_str[6]=addr & (1<<1);
  33626. + addr_str[5]=addr & (1<<2);
  33627. + addr_str[4]=addr & (1<<3);
  33628. + addr_str[3]=addr & (1<<4);
  33629. + addr_str[2]=addr & (1<<5);
  33630. + addr_str[1]=addr & (1<<6);
  33631. + addr_str[0]=addr & (1<<7);
  33632. + addr_len=8;
  33633. + }else{
  33634. + addr_str[5]=addr & 1;
  33635. + addr_str[4]=addr & (1<<1);
  33636. + addr_str[3]=addr & (1<<2);
  33637. + addr_str[2]=addr & (1<<3);
  33638. + addr_str[1]=addr & (1<<4);
  33639. + addr_str[0]=addr & (1<<5);
  33640. + addr_len=6;
  33641. + }
  33642. + eprom_cs(dev, 1);
  33643. + eprom_ck_cycle(dev);
  33644. + eprom_send_bits_string(dev, read_cmd, 3);
  33645. + eprom_send_bits_string(dev, addr_str, addr_len);
  33646. +
  33647. + //keep chip pin D to low state while reading.
  33648. + //I'm unsure if it is necessary, but anyway shouldn't hurt
  33649. + eprom_w(dev, 0);
  33650. +
  33651. + for(i=0;i<16;i++){
  33652. + //eeprom needs a clk cycle between writing opcode&adr
  33653. + //and reading data. (eeprom outs a dummy 0)
  33654. + eprom_ck_cycle(dev);
  33655. + ret |= (eprom_r(dev)<<(15-i));
  33656. + }
  33657. +
  33658. + eprom_cs(dev, 0);
  33659. + eprom_ck_cycle(dev);
  33660. +
  33661. + //disable EPROM programming
  33662. + write_nic_byte(dev, EPROM_CMD,
  33663. + (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
  33664. + return ret;
  33665. +}
  33666. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_93cx6.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_93cx6.h
  33667. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_93cx6.h 1970-01-01 01:00:00.000000000 +0100
  33668. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_93cx6.h 2009-08-23 19:01:04.000000000 +0200
  33669. @@ -0,0 +1,46 @@
  33670. +/*
  33671. + This is part of rtl8187 OpenSource driver
  33672. + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
  33673. + Released under the terms of GPL (General Public Licence)
  33674. +
  33675. + Parts of this driver are based on the GPL part of the official realtek driver
  33676. + Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
  33677. + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
  33678. +
  33679. + We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
  33680. +*/
  33681. +
  33682. +/*This files contains card eeprom (93c46 or 93c56) programming routines*/
  33683. +/*memory is addressed by WORDS*/
  33684. +
  33685. +#include "r8187.h"
  33686. +#include "r8180_hw.h"
  33687. +
  33688. +#define EPROM_DELAY 10
  33689. +
  33690. +#define EPROM_ANAPARAM_ADDRLWORD 0xd
  33691. +#define EPROM_ANAPARAM_ADDRHWORD 0xe
  33692. +
  33693. +#define EPROM_CHANNEL_PLAN 0x3 //0x6>>1
  33694. +//0x77 BIT[0]0:use gpio 1 bit 1, 1:use gpio 1 bit 2.
  33695. +#define EPROM_SELECT_GPIO (0x77 >> 1)
  33696. +//#define EEPROM_COUNTRY_CODE 0x2E//87se channel plan is here
  33697. +
  33698. +#define EPROM_RFCHIPID 0x6
  33699. +#define EPROM_TXPW_BASE 0x05
  33700. +#define EPROM_RFCHIPID_RTL8225U 5
  33701. +#define EPROM_RFCHIPID_RTL8225U_VF 6
  33702. +#define EPROM_RF_PARAM 0x4
  33703. +#define EPROM_CONFIG2 0xc
  33704. +
  33705. +#define EPROM_VERSION 0x1E
  33706. +#define MAC_ADR 0x7
  33707. +
  33708. +#define CIS 0x18
  33709. +
  33710. +#define EPROM_TXPW0 0x16
  33711. +#define EPROM_TXPW2 0x1b
  33712. +#define EPROM_TXPW1 0x3d
  33713. +
  33714. +
  33715. +u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
  33716. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_dm.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_dm.c
  33717. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_dm.c 1970-01-01 01:00:00.000000000 +0100
  33718. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_dm.c 2009-08-23 19:01:04.000000000 +0200
  33719. @@ -0,0 +1,882 @@
  33720. +/*++
  33721. +Copyright (c) Realtek Semiconductor Corp. All rights reserved.
  33722. +
  33723. +Module Name:
  33724. + r8180_dig.c
  33725. +
  33726. +Abstract:
  33727. + Hardware dynamic mechanism for RTL8187B
  33728. +
  33729. +Major Change History:
  33730. + When Who What
  33731. + ---------- --------------- -------------------------------
  33732. + 2006-11-15 david Created
  33733. +
  33734. +Notes:
  33735. + This file is ported from RTL8187B Windows driver.
  33736. +
  33737. +
  33738. +--*/
  33739. +#include "r8180_dm.h"
  33740. +#include "r8180_hw.h"
  33741. +#include "r8180_rtl8225.h"
  33742. +
  33743. +//================================================================================
  33744. +// Local Constant.
  33745. +//================================================================================
  33746. +#define Z1_HIPWR_UPPER_TH 99
  33747. +#define Z1_HIPWR_LOWER_TH 70
  33748. +#define Z2_HIPWR_UPPER_TH 99
  33749. +#define Z2_HIPWR_LOWER_TH 90
  33750. +
  33751. +bool CheckDig(struct net_device *dev)
  33752. +{
  33753. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  33754. + struct ieee80211_device *ieee = priv->ieee80211;
  33755. +
  33756. + if(ieee->state != IEEE80211_LINKED)
  33757. + return false;
  33758. +
  33759. + if(priv->card_8187 == NIC_8187B) {
  33760. + //
  33761. + // We need to schedule dig workitem on either of the below mechanisms.
  33762. + // By Bruce, 2007-06-01.
  33763. + //
  33764. + if(!priv->bDigMechanism && !priv->bCCKThMechanism)
  33765. + return false;
  33766. +
  33767. + if(priv->CurrentOperaRate < 36) // Schedule Dig under all OFDM rates. By Bruce, 2007-06-01.
  33768. + return false;
  33769. + } else {
  33770. + if(!priv->bDigMechanism)
  33771. + return false;
  33772. +
  33773. + if(priv->CurrentOperaRate < 48)
  33774. + return false;
  33775. + }
  33776. + return true;
  33777. +}
  33778. +
  33779. +
  33780. +//
  33781. +// Description:
  33782. +// Implementation of DIG for Zebra and Zebra2.
  33783. +//
  33784. +void DIG_Zebra(struct net_device *dev)
  33785. +{
  33786. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  33787. + //PHAL_DATA_8187 pHalData = GetHalData8187(Adapter);
  33788. + u16 CCKFalseAlarm, OFDMFalseAlarm;
  33789. + u16 OfdmFA1, OfdmFA2;
  33790. + int InitialGainStep = 7; // The number of initial gain stages.
  33791. + int LowestGainStage = 4; // The capable lowest stage of performing dig workitem.
  33792. +
  33793. +// printk("---------> DIG_Zebra()\n");
  33794. +
  33795. + //Read only 1 byte because of HW bug. This is a temporal modification. Joseph
  33796. + // Modify by Isaiah 2006-06-27
  33797. + if(priv->card_8187_Bversion == VERSION_8187B_B)
  33798. + {
  33799. + CCKFalseAlarm = 0;
  33800. + OFDMFalseAlarm = (u16)(priv->FalseAlarmRegValue);
  33801. + OfdmFA1 = 0x01;
  33802. + OfdmFA2 = priv->RegDigOfdmFaUpTh;
  33803. + }
  33804. + else
  33805. + {
  33806. + CCKFalseAlarm = (u16)(priv->FalseAlarmRegValue & 0x0000ffff);
  33807. + OFDMFalseAlarm = (u16)((priv->FalseAlarmRegValue >> 16) & 0x0000ffff);
  33808. + OfdmFA1 = 0x15;
  33809. + //OfdmFA2 = 0xC00;
  33810. + OfdmFA2 = ((u16)(priv->RegDigOfdmFaUpTh)) << 8;
  33811. + }
  33812. +
  33813. +// printk("DIG**********CCK False Alarm: %#X \n",CCKFalseAlarm);
  33814. +// printk("DIG**********OFDM False Alarm: %#X \n",OFDMFalseAlarm);
  33815. +
  33816. +
  33817. +
  33818. + // The number of initial gain steps is different, by Bruce, 2007-04-13.
  33819. + if(priv->card_8187 == NIC_8187) {
  33820. + if (priv->InitialGain == 0 ) //autoDIG
  33821. + {
  33822. + switch( priv->rf_chip)
  33823. + {
  33824. + case RF_ZEBRA:
  33825. + priv->InitialGain = 5; // m74dBm;
  33826. + break;
  33827. + case RF_ZEBRA2:
  33828. + priv->InitialGain = 4; // m78dBm;
  33829. + break;
  33830. + default:
  33831. + priv->InitialGain = 5; // m74dBm;
  33832. + break;
  33833. + }
  33834. + }
  33835. + InitialGainStep = 7;
  33836. + if(priv->InitialGain > 7)
  33837. + priv->InitialGain = 5;
  33838. + LowestGainStage = 4;
  33839. + } else {
  33840. + if (priv->InitialGain == 0 ) //autoDIG
  33841. + { // Advised from SD3 DZ, by Bruce, 2007-06-05.
  33842. + priv->InitialGain = 4; // In 87B, m74dBm means State 4 (m82dBm)
  33843. + }
  33844. + if(priv->card_8187_Bversion != VERSION_8187B_B)
  33845. + { // Advised from SD3 DZ, by Bruce, 2007-06-05.
  33846. + OfdmFA1 = 0x20;
  33847. + }
  33848. + InitialGainStep = 8;
  33849. + LowestGainStage = priv->RegBModeGainStage; // Lowest gain stage.
  33850. + }
  33851. +
  33852. + if (OFDMFalseAlarm > OfdmFA1)
  33853. + {
  33854. + if (OFDMFalseAlarm > OfdmFA2)
  33855. + {
  33856. + priv->DIG_NumberFallbackVote++;
  33857. + if (priv->DIG_NumberFallbackVote >1)
  33858. + {
  33859. + //serious OFDM False Alarm, need fallback
  33860. + // By Bruce, 2007-03-29.
  33861. + // if (pHalData->InitialGain < 7) // In 87B, m66dBm means State 7 (m74dBm)
  33862. + if (priv->InitialGain < InitialGainStep)
  33863. + {
  33864. + priv->InitialGain = (priv->InitialGain + 1);
  33865. + //printk("DIG**********OFDM False Alarm: %#X, OfdmFA1: %#X, OfdmFA2: %#X\n", OFDMFalseAlarm, OfdmFA1, OfdmFA2);
  33866. + //printk("DIG+++++++ fallback OFDM:%d \n", priv->InitialGain);
  33867. + UpdateInitialGain(dev); // 2005.01.06, by rcnjko.
  33868. + }
  33869. + priv->DIG_NumberFallbackVote = 0;
  33870. + priv->DIG_NumberUpgradeVote=0;
  33871. + }
  33872. + }
  33873. + else
  33874. + {
  33875. + if (priv->DIG_NumberFallbackVote)
  33876. + priv->DIG_NumberFallbackVote--;
  33877. + }
  33878. + priv->DIG_NumberUpgradeVote=0;
  33879. + }
  33880. + else //OFDM False Alarm < 0x15
  33881. + {
  33882. + if (priv->DIG_NumberFallbackVote)
  33883. + priv->DIG_NumberFallbackVote--;
  33884. + priv->DIG_NumberUpgradeVote++;
  33885. +
  33886. + if (priv->DIG_NumberUpgradeVote>9)
  33887. + {
  33888. + if (priv->InitialGain > LowestGainStage) // In 87B, m78dBm means State 4 (m864dBm)
  33889. + {
  33890. + priv->InitialGain = (priv->InitialGain - 1);
  33891. + //printk("DIG**********OFDM False Alarm: %#X, OfdmFA1: %#X, OfdmFA2: %#X\n", OFDMFalseAlarm, OfdmFA1, OfdmFA2);
  33892. + //printk("DIG--------- Upgrade OFDM:%d \n", priv->InitialGain);
  33893. + UpdateInitialGain(dev); // 2005.01.06, by rcnjko.
  33894. + }
  33895. + priv->DIG_NumberFallbackVote = 0;
  33896. + priv->DIG_NumberUpgradeVote=0;
  33897. + }
  33898. + }
  33899. +
  33900. +// printk("DIG+++++++ OFDM:%d\n", priv->InitialGain);
  33901. +// printk("<--------- DIG_Zebra()\n");
  33902. +}
  33903. +
  33904. +//
  33905. +// Description:
  33906. +// Dispatch DIG implementation according to RF.
  33907. +//
  33908. +void DynamicInitGain(struct net_device *dev)
  33909. +{
  33910. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  33911. +
  33912. + switch(priv->rf_chip)
  33913. + {
  33914. + case RF_ZEBRA:
  33915. + case RF_ZEBRA2: // [AnnieWorkaround] For Zebra2, 2005-08-01.
  33916. + //case RF_ZEBRA4:
  33917. + DIG_Zebra(dev);
  33918. + break;
  33919. +
  33920. + default:
  33921. + printk("DynamicInitGain(): unknown RFChipID(%d) !!!\n", priv->rf_chip);
  33922. + break;
  33923. + }
  33924. +}
  33925. +
  33926. +// By Bruce, 2007-03-29.
  33927. +//
  33928. +// Description:
  33929. +// Dispatch CCK Power Detection implementation according to RF.
  33930. +//
  33931. +void DynamicCCKThreshold(struct net_device *dev)
  33932. +{
  33933. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  33934. + u16 CCK_Up_Th;
  33935. + u16 CCK_Lw_Th;
  33936. + u16 CCKFalseAlarm;
  33937. +
  33938. + printk("=====>DynamicCCKThreshold()\n");
  33939. +
  33940. + CCK_Up_Th = priv->CCKUpperTh;
  33941. + CCK_Lw_Th = priv->CCKLowerTh;
  33942. + CCKFalseAlarm = (u16)((priv->FalseAlarmRegValue & 0x0000ffff) >> 8); // We only care about the higher byte.
  33943. + printk("DynamicCCKThreshold(): CCK Upper Threshold: 0x%02X, Lower Threshold: 0x%02X, CCKFalseAlarmHighByte: 0x%02X\n", CCK_Up_Th, CCK_Lw_Th, CCKFalseAlarm);
  33944. +
  33945. + if(priv->StageCCKTh < 3 && CCKFalseAlarm >= CCK_Up_Th)
  33946. + {
  33947. + priv->StageCCKTh ++;
  33948. + UpdateCCKThreshold(dev);
  33949. + }
  33950. + else if(priv->StageCCKTh > 0 && CCKFalseAlarm <= CCK_Lw_Th)
  33951. + {
  33952. + priv->StageCCKTh --;
  33953. + UpdateCCKThreshold(dev);
  33954. + }
  33955. +
  33956. + printk("<=====DynamicCCKThreshold()\n");
  33957. +}
  33958. +
  33959. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  33960. +void rtl8180_hw_dig_wq (struct work_struct *work)
  33961. +{
  33962. + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
  33963. + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq);
  33964. + struct net_device *dev = ieee->dev;
  33965. +#else
  33966. +void rtl8180_hw_dig_wq(struct net_device *dev)
  33967. +{
  33968. + // struct r8180_priv *priv = ieee80211_priv(dev);
  33969. +#endif
  33970. + struct r8180_priv *priv = ieee80211_priv(dev);
  33971. +
  33972. + // Read CCK and OFDM False Alarm.
  33973. + if(priv->card_8187_Bversion == VERSION_8187B_B) {
  33974. + // Read only 1 byte because of HW bug. This is a temporal modification. Joseph
  33975. + // Modify by Isaiah 2006-06-27
  33976. + priv->FalseAlarmRegValue = (u32)read_nic_byte(dev, (OFDM_FALSE_ALARM+1));
  33977. + } else {
  33978. + priv->FalseAlarmRegValue = read_nic_dword(dev, CCK_FALSE_ALARM);
  33979. + }
  33980. +
  33981. + // Adjust Initial Gain dynamically.
  33982. + if(priv->bDigMechanism) {
  33983. + DynamicInitGain(dev);
  33984. + }
  33985. +
  33986. + //
  33987. + // Move from DynamicInitGain to be independent of the OFDM DIG mechanism, by Bruce, 2007-06-01.
  33988. + //
  33989. + if(priv->card_8187 == NIC_8187B) {
  33990. + // By Bruce, 2007-03-29.
  33991. + // Dynamically update CCK Power Detection Threshold.
  33992. + if(priv->bCCKThMechanism)
  33993. + {
  33994. + DynamicCCKThreshold(dev);
  33995. + }
  33996. + }
  33997. +}
  33998. +
  33999. +void SetTxPowerLevel8187(struct net_device *dev, short chan)
  34000. +{
  34001. + struct r8180_priv *priv = ieee80211_priv(dev);
  34002. +
  34003. + switch(priv->rf_chip)
  34004. + {
  34005. + case RF_ZEBRA:
  34006. + rtl8225_SetTXPowerLevel(dev,chan);
  34007. + break;
  34008. +
  34009. + case RF_ZEBRA2:
  34010. + //case RF_ZEBRA4:
  34011. + rtl8225z2_SetTXPowerLevel(dev,chan);
  34012. + break;
  34013. + }
  34014. +}
  34015. +
  34016. +//
  34017. +// Description:
  34018. +// Check if input power signal strength exceeds maximum input power threshold
  34019. +// of current HW.
  34020. +// If yes, we set our HW to high input power state:
  34021. +// RX: always force TR switch to SW Tx mode to reduce input power.
  34022. +// TX: turn off smaller Tx output power (see RtUsbCheckForHang).
  34023. +//
  34024. +// If no, we restore our HW to normal input power state:
  34025. +/// RX: restore TR switch to HW controled mode.
  34026. +// TX: restore TX output power (see RtUsbCheckForHang).
  34027. +//
  34028. +// TODO:
  34029. +// 1. Tx power control shall not be done in Platform-dependent timer (e.g. RtUsbCheckForHang).
  34030. +// 2. Allow these threshold adjustable by RF SD.
  34031. +//
  34032. +void DoRxHighPower(struct net_device *dev)
  34033. +{
  34034. + struct r8180_priv *priv = ieee80211_priv(dev);
  34035. + TR_SWITCH_STATE TrSwState;
  34036. + u16 HiPwrUpperTh = 0;
  34037. + u16 HiPwrLowerTh = 0;
  34038. + u16 RSSIHiPwrUpperTh = 0;
  34039. + u16 RSSIHiPwrLowerTh = 0;
  34040. +
  34041. + //87S remove TrSwitch mechanism
  34042. + if((priv->card_8187 == NIC_8187B)||(priv->card_8187 == NIC_8187)) {
  34043. +
  34044. + //printk("----> DoRxHighPower()\n");
  34045. +
  34046. + //
  34047. + // Get current TR switch setting.
  34048. + //
  34049. + //Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_TR_SWITCH, (pu1Byte)(&TrSwState));
  34050. + TrSwState = priv->TrSwitchState;
  34051. +
  34052. + //
  34053. + // Determine threshold according to RF type.
  34054. + //
  34055. + switch(priv->rf_chip)
  34056. + {
  34057. + case RF_ZEBRA:
  34058. + HiPwrUpperTh = Z1_HIPWR_UPPER_TH;
  34059. + HiPwrLowerTh = Z1_HIPWR_LOWER_TH;
  34060. + printk("DoRxHighPower(): RF_ZEBRA, Upper Threshold: %d LOWER Threshold: %d\n",
  34061. + HiPwrUpperTh, HiPwrLowerTh);
  34062. + break;
  34063. +
  34064. + case RF_ZEBRA2:
  34065. + if((priv->card_8187 == NIC_8187)) {
  34066. + HiPwrUpperTh = Z2_HIPWR_UPPER_TH;
  34067. + HiPwrLowerTh = Z2_HIPWR_LOWER_TH;
  34068. + } else {
  34069. + // By Bruce, 2007-04-11.
  34070. + // HiPwrUpperTh = Z2_HIPWR_UPPER_TH;
  34071. + // HiPwrLowerTh = Z2_HIPWR_LOWER_TH;
  34072. +
  34073. + HiPwrUpperTh = priv->Z2HiPwrUpperTh;
  34074. + HiPwrLowerTh = priv->Z2HiPwrLowerTh;
  34075. + HiPwrUpperTh = HiPwrUpperTh * 10;
  34076. + HiPwrLowerTh = HiPwrLowerTh * 10;
  34077. +
  34078. + RSSIHiPwrUpperTh = priv->Z2RSSIHiPwrUpperTh;
  34079. + RSSIHiPwrLowerTh = priv->Z2RSSIHiPwrLowerTh;
  34080. + //printk("DoRxHighPower(): RF_ZEBRA2, Upper Threshold: %d LOWER Threshold: %d, RSSI Upper Th: %d, RSSI Lower Th: %d\n",HiPwrUpperTh, HiPwrLowerTh, RSSIHiPwrUpperTh, RSSIHiPwrLowerTh);
  34081. + }
  34082. + break;
  34083. +
  34084. + default:
  34085. + printk("DoRxHighPower(): Unknown RFChipID(%d), UndecoratedSmoothedSS(%d), TrSwState(%d)!!!\n",
  34086. + priv->rf_chip, priv->UndecoratedSmoothedSS, TrSwState);
  34087. + return;
  34088. + break;
  34089. + }
  34090. +
  34091. + /*printk(">>>>>>>>>>Set TR switch to software control, UndecoratedSmoothedSS:%d, CurCCKRSSI = %d\n",\
  34092. + priv->UndecoratedSmoothedSS, priv->CurCCKRSSI);
  34093. + */
  34094. + if((priv->card_8187 == NIC_8187)) {
  34095. + //
  34096. + // Perform Rx part High Power Mechanism by UndecoratedSmoothedSS.
  34097. + //
  34098. + if (priv->UndecoratedSmoothedSS > HiPwrUpperTh)
  34099. + { // High input power state.
  34100. + if( priv->TrSwitchState == TR_HW_CONTROLLED )
  34101. + {
  34102. + /* printk(">>>>>>>>>>Set TR switch to software control, UndecoratedSmoothedSS:%d \n", \
  34103. + priv->UndecoratedSmoothedSS);
  34104. + // printk(">>>>>>>>>> TR_SW_TX\n");
  34105. + */
  34106. + write_nic_byte(dev, RFPinsSelect,
  34107. + (u8)(priv->wMacRegRfPinsSelect | TR_SW_MASK_8187 ));
  34108. + write_nic_byte(dev, RFPinsOutput,
  34109. + (u8)((priv->wMacRegRfPinsOutput&(~TR_SW_MASK_8187))|TR_SW_MASK_TX_8187));
  34110. + priv->TrSwitchState = TR_SW_TX;
  34111. + priv->bToUpdateTxPwr = true;
  34112. + }
  34113. + }
  34114. + else if (priv->UndecoratedSmoothedSS < HiPwrLowerTh)
  34115. + { // Normal input power state.
  34116. + if( priv->TrSwitchState == TR_SW_TX)
  34117. + {
  34118. + /* printk("<<<<<<<<<<<Set TR switch to hardware control UndecoratedSmoothedSS:%d \n", \
  34119. + priv->UndecoratedSmoothedSS);
  34120. + // printk("<<<<<<<<<< TR_HW_CONTROLLED\n");
  34121. + */
  34122. + write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
  34123. + write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
  34124. + priv->TrSwitchState = TR_HW_CONTROLLED;
  34125. + priv->bToUpdateTxPwr = true;
  34126. + }
  34127. + }
  34128. + }else {
  34129. + /*printk("=====>TrSwState = %s\n", (TrSwState==TR_HW_CONTROLLED)?"TR_HW_CONTROLLED":"TR_SW_TX");
  34130. + //printk("UndecoratedSmoothedSS:%d, CurCCKRSSI = %d\n",priv->UndecoratedSmoothedSS, priv->CurCCKRSSI); */
  34131. + // Asked by SD3 DZ, by Bruce, 2007-04-12.
  34132. + if(TrSwState == TR_HW_CONTROLLED)
  34133. + {
  34134. + if((priv->UndecoratedSmoothedSS > HiPwrUpperTh) ||
  34135. + (priv->bCurCCKPkt && (priv->CurCCKRSSI > RSSIHiPwrUpperTh)))
  34136. + {
  34137. + //printk("===============================> high power!\n");
  34138. + write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect|TR_SW_MASK_8187 ));
  34139. + write_nic_byte(dev, RFPinsOutput,
  34140. + (u8)((priv->wMacRegRfPinsOutput&(~TR_SW_MASK_8187))|TR_SW_MASK_TX_8187));
  34141. + priv->TrSwitchState = TR_SW_TX;
  34142. + priv->bToUpdateTxPwr = true;
  34143. + }
  34144. + }
  34145. + else
  34146. + {
  34147. + if((priv->UndecoratedSmoothedSS < HiPwrLowerTh) &&
  34148. + (!priv->bCurCCKPkt || priv->CurCCKRSSI < RSSIHiPwrLowerTh))
  34149. + {
  34150. + write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
  34151. + write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
  34152. + priv->TrSwitchState = TR_HW_CONTROLLED;
  34153. + priv->bToUpdateTxPwr = true;
  34154. + }
  34155. + }
  34156. + //printk("<=======TrSwState = %s\n", (TrSwState==TR_HW_CONTROLLED)?"TR_HW_CONTROLLED":"TR_SW_TX");
  34157. + }
  34158. + //printk("<---- DoRxHighPower()\n");
  34159. + }
  34160. +}
  34161. +
  34162. +
  34163. +//
  34164. +// Description:
  34165. +// Callback function of UpdateTxPowerWorkItem.
  34166. +// Because of some event happend, e.g. CCX TPC, High Power Mechanism,
  34167. +// We update Tx power of current channel again.
  34168. +//
  34169. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  34170. +void rtl8180_tx_pw_wq (struct work_struct *work)
  34171. +{
  34172. + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
  34173. + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,tx_pw_wq);
  34174. + struct net_device *dev = ieee->dev;
  34175. +#else
  34176. +void rtl8180_tx_pw_wq(struct net_device *dev)
  34177. +{
  34178. + // struct r8180_priv *priv = ieee80211_priv(dev);
  34179. +#endif
  34180. +
  34181. + struct r8180_priv *priv = ieee80211_priv(dev);
  34182. +
  34183. + //printk("----> UpdateTxPowerWorkItemCallback()\n");
  34184. +
  34185. + if(priv->bToUpdateTxPwr)
  34186. + {
  34187. + //printk("DoTxHighPower(): schedule UpdateTxPowerWorkItem......\n");
  34188. + priv->bToUpdateTxPwr = false;
  34189. + SetTxPowerLevel8187(dev, priv->chan);
  34190. + }
  34191. +
  34192. + DoRxHighPower(dev);
  34193. + //printk("<---- UpdateTxPowerWorkItemCallback()\n");
  34194. +}
  34195. +
  34196. +//
  34197. +// Description:
  34198. +// Return TRUE if we shall perform High Power Mecahnism, FALSE otherwise.
  34199. +//
  34200. +bool CheckHighPower(struct net_device *dev)
  34201. +{
  34202. + struct r8180_priv *priv = ieee80211_priv(dev);
  34203. + struct ieee80211_device *ieee = priv->ieee80211;
  34204. +
  34205. + if(!priv->bRegHighPowerMechanism)
  34206. + {
  34207. + return false;
  34208. + }
  34209. +
  34210. + if((ieee->state == IEEE80211_LINKED_SCANNING)||(ieee->state == IEEE80211_MESH_SCANNING))
  34211. + {
  34212. + return false;
  34213. + }
  34214. +
  34215. + return true;
  34216. +}
  34217. +
  34218. +#ifdef SW_ANTE_DIVERSITY
  34219. +
  34220. +#define ANTENNA_DIVERSITY_TIMER_PERIOD 1000 // 1000 m
  34221. +
  34222. +void
  34223. +SwAntennaDiversityRxOk8185(
  34224. + struct net_device *dev,
  34225. + u8 SignalStrength
  34226. + )
  34227. +{
  34228. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  34229. +
  34230. + //printk("+SwAntennaDiversityRxOk8185: RxSs: %d\n", SignalStrength);
  34231. +
  34232. + priv->AdRxOkCnt++;
  34233. +
  34234. + if( priv->AdRxSignalStrength != -1)
  34235. + {
  34236. + priv->AdRxSignalStrength = ((priv->AdRxSignalStrength*7) + (SignalStrength*3)) / 10;
  34237. + }
  34238. + else
  34239. + { // Initialization case.
  34240. + priv->AdRxSignalStrength = SignalStrength;
  34241. + }
  34242. +
  34243. + //printk("====>pkt rcvd by %d\n", priv->LastRxPktAntenna);
  34244. + if( priv->LastRxPktAntenna ) //Main antenna.
  34245. + priv->AdMainAntennaRxOkCnt++;
  34246. + else // Aux antenna.
  34247. + priv->AdAuxAntennaRxOkCnt++;
  34248. + //printk("-SwAntennaDiversityRxOk8185: AdRxOkCnt: %d AdRxSignalStrength: %d\n", priv->AdRxOkCnt, priv->AdRxSignalStrength);
  34249. +}
  34250. +
  34251. +//
  34252. +// Description: Change Antenna Switch.
  34253. +//
  34254. +bool
  34255. +SetAntenna8185(
  34256. + struct net_device *dev,
  34257. + u8 u1bAntennaIndex
  34258. + )
  34259. +{
  34260. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  34261. + bool bAntennaSwitched = false;
  34262. +
  34263. +// printk("+SetAntenna8185(): Antenna is switching to: %d \n", u1bAntennaIndex);
  34264. +
  34265. + switch(u1bAntennaIndex)
  34266. + {
  34267. + case 0://main antenna
  34268. + switch(priv->rf_chip)
  34269. + {
  34270. + case RF_ZEBRA:
  34271. + case RF_ZEBRA2:
  34272. + //case RF_ZEBRA4:
  34273. + // Tx Antenna.
  34274. + write_nic_byte(dev, ANTSEL, 0x03); // Config TX antenna.
  34275. +
  34276. + //PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x01009b90); // Config CCK RX antenna.
  34277. + //PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x5c8D); // Config OFDM RX antenna.
  34278. +
  34279. + // Rx CCK .
  34280. + write_nic_byte(dev, 0x7f, ((0x01009b90 & 0xff000000) >> 24));
  34281. + write_nic_byte(dev, 0x7e, ((0x01009b90 & 0x00ff0000) >> 16));
  34282. + write_nic_byte(dev, 0x7d, ((0x01009b90 & 0x0000ff00) >> 8));
  34283. + write_nic_byte(dev, 0x7c, ((0x01009b90 & 0x000000ff) >> 0));
  34284. +
  34285. + // Rx OFDM.
  34286. + write_nic_byte(dev, 0x7f, ((0x00005c8D & 0xff000000) >> 24));
  34287. + write_nic_byte(dev, 0x7e, ((0x00005c8D & 0x00ff0000) >> 16));
  34288. + write_nic_byte(dev, 0x7d, ((0x00005c8D & 0x0000ff00) >> 8));
  34289. + write_nic_byte(dev, 0x7c, ((0x00005c8D & 0x000000ff) >> 0));
  34290. +
  34291. + bAntennaSwitched = true;
  34292. + break;
  34293. +
  34294. + default:
  34295. + printk("SetAntenna8185: unkown RFChipID(%d)\n", priv->rf_chip);
  34296. + break;
  34297. + }
  34298. + break;
  34299. +
  34300. + case 1:
  34301. + switch(priv->rf_chip)
  34302. + {
  34303. + case RF_ZEBRA:
  34304. + case RF_ZEBRA2:
  34305. + //case RF_ZEBRA4:
  34306. + // Tx Antenna.
  34307. + write_nic_byte(dev, ANTSEL, 0x00); // Config TX antenna.
  34308. +
  34309. + //PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x0100bb90); // Config CCK RX antenna.
  34310. + //PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x548D); // Config OFDM RX antenna.
  34311. +
  34312. + // Rx CCK.
  34313. + write_nic_byte(dev, 0x7f, ((0x0100bb90 & 0xff000000) >> 24));
  34314. + write_nic_byte(dev, 0x7e, ((0x0100bb90 & 0x00ff0000) >> 16));
  34315. + write_nic_byte(dev, 0x7d, ((0x0100bb90 & 0x0000ff00) >> 8));
  34316. + write_nic_byte(dev, 0x7c, ((0x0100bb90 & 0x000000ff) >> 0));
  34317. +
  34318. + // Rx OFDM.
  34319. + write_nic_byte(dev, 0x7f, ((0x0000548D & 0xff000000) >> 24));
  34320. + write_nic_byte(dev, 0x7e, ((0x0000548D & 0x00ff0000) >> 16));
  34321. + write_nic_byte(dev, 0x7d, ((0x0000548D & 0x0000ff00) >> 8));
  34322. + write_nic_byte(dev, 0x7c, ((0x0000548D & 0x000000ff) >> 0));
  34323. +
  34324. + bAntennaSwitched = true;
  34325. + break;
  34326. +
  34327. + default:
  34328. + printk("SetAntenna8185: unkown RFChipID(%d)\n", priv->rf_chip);
  34329. + break;
  34330. + }
  34331. + break;
  34332. +
  34333. + default:
  34334. + printk("SetAntenna8185: unkown u1bAntennaIndex(%d)\n", u1bAntennaIndex);
  34335. + break;
  34336. + }
  34337. +
  34338. + if(bAntennaSwitched)
  34339. + {
  34340. + priv->CurrAntennaIndex = u1bAntennaIndex;
  34341. + }
  34342. +
  34343. +// printk("-SetAntenna8185(): return (%#X)\n", bAntennaSwitched);
  34344. +
  34345. + return bAntennaSwitched;
  34346. +}
  34347. +
  34348. +//
  34349. +// Description: Toggle Antenna switch.
  34350. +//
  34351. +bool SwitchAntenna(struct net_device *dev)
  34352. +{
  34353. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  34354. +
  34355. + bool bResult = false;
  34356. +
  34357. + if(priv->CurrAntennaIndex == 0)
  34358. + {
  34359. + bResult = SetAntenna8185(dev, 1);
  34360. + if(priv->ieee80211->state == IEEE80211_LINKED)
  34361. + printk("Switching to Aux antenna 1 \n");
  34362. + }
  34363. + else
  34364. + {
  34365. + bResult = SetAntenna8185(dev, 0);
  34366. + if(priv->ieee80211->state == IEEE80211_LINKED)
  34367. + printk("Switching to Main antenna 0 \n");
  34368. + }
  34369. +
  34370. + return bResult;
  34371. +}
  34372. +
  34373. +//
  34374. +// Description:
  34375. +// Engine of SW Antenna Diversity mechanism.
  34376. +// Since 8187 has no Tx part information,
  34377. +// this implementation is only dependend on Rx part information.
  34378. +//
  34379. +// 2006.04.17, by rcnjko.
  34380. +//
  34381. +void SwAntennaDiversity(struct net_device *dev)
  34382. +{
  34383. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  34384. + //bool bSwCheckSS=false;
  34385. + bool bSwCheckSS=true;//open the SignalStrength check if not switched by rx ok pkt.
  34386. +
  34387. +// printk("+SwAntennaDiversity(): CurrAntennaIndex: %d\n", priv->CurrAntennaIndex);
  34388. +
  34389. +//by amy 080312
  34390. + if(bSwCheckSS){
  34391. + priv->AdTickCount++;
  34392. +
  34393. + //printk("(1) AdTickCount: %d, AdCheckPeriod: %d\n", priv->AdTickCount, priv->AdCheckPeriod);
  34394. + //printk("(2) AdRxSignalStrength: %ld, AdRxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);
  34395. + }
  34396. +// priv->AdTickCount++;//-by amy 080312
  34397. +
  34398. + // Case 1. No Link.
  34399. + if(priv->ieee80211->state != IEEE80211_LINKED){
  34400. + //printk("SwAntennaDiversity(): Case 1. No Link.\n");
  34401. +
  34402. + priv->bAdSwitchedChecking = false;
  34403. + // I switch antenna here to prevent any one of antenna is broken before link established, 2006.04.18, by rcnjko..
  34404. + SwitchAntenna(dev);
  34405. + }
  34406. + // Case 2. Linked but no packet received.
  34407. + else if(priv->AdRxOkCnt == 0){
  34408. + printk("SwAntennaDiversity(): Case 2. Linked but no packet received.\n");
  34409. +
  34410. + priv->bAdSwitchedChecking = false;
  34411. + SwitchAntenna(dev);
  34412. + }
  34413. + // Case 3. Evaluate last antenna switch action in case4. and undo it if necessary.
  34414. + else if(priv->bAdSwitchedChecking == true){
  34415. + //printk("SwAntennaDiversity(): Case 3. Evaluate last antenna switch action.\n");
  34416. +
  34417. + priv->bAdSwitchedChecking = false;
  34418. +
  34419. + // Adjust Rx signal strength threashold.
  34420. + priv->AdRxSsThreshold = (priv->AdRxSignalStrength + priv->AdRxSsBeforeSwitched) / 2;
  34421. +
  34422. + priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
  34423. + priv->AdMaxRxSsThreshold: priv->AdRxSsThreshold;
  34424. + if(priv->AdRxSignalStrength < priv->AdRxSsBeforeSwitched){
  34425. + // Rx signal strength is not improved after we swtiched antenna. => Swich back.
  34426. + printk("SwAntennaDiversity(): Rx Signal Strength is not improved, CurrRxSs: %ld, LastRxSs: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsBeforeSwitched);
  34427. +
  34428. + //by amy 080312
  34429. + // Increase Antenna Diversity checking period due to bad decision.
  34430. + priv->AdCheckPeriod *= 2;
  34431. + //by amy 080312
  34432. + //
  34433. + // Increase Antenna Diversity checking period.
  34434. + if(priv->AdCheckPeriod > priv->AdMaxCheckPeriod)
  34435. + priv->AdCheckPeriod = priv->AdMaxCheckPeriod;
  34436. +
  34437. + // Wrong deceision => switch back.
  34438. + SwitchAntenna(dev);
  34439. + }else{ // Rx Signal Strength is improved.
  34440. + printk("SwAntennaDiversity(): Rx Signal Strength is improved, CurrRxSs: %ld, LastRxSs: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsBeforeSwitched);
  34441. +
  34442. + // Reset Antenna Diversity checking period to its min value.
  34443. + priv->AdCheckPeriod = priv->AdMinCheckPeriod;
  34444. + }
  34445. +
  34446. + //printk("SwAntennaDiversity(): AdRxSsThreshold: %ld, AdCheckPeriod: %d\n",
  34447. + // priv->AdRxSsThreshold, priv->AdCheckPeriod);
  34448. + }
  34449. + // Case 4. Evaluate if we shall switch antenna now.
  34450. + // Cause Table Speed is very fast in TRC Dell Lab, we check it every time.
  34451. + else// if(priv->AdTickCount >= priv->AdCheckPeriod)//-by amy 080312
  34452. + {
  34453. + //printk("SwAntennaDiversity(): Case 4. Evaluate if we shall switch antenna now.\n");
  34454. +
  34455. + priv->AdTickCount = 0;
  34456. +
  34457. + //
  34458. + // <Roger_Notes> We evaluate RxOk counts for each antenna first and than
  34459. + // evaluate signal strength.
  34460. + // The following operation can overcome the disability of CCA on both two antennas
  34461. + // When signal strength was extremely low or high.
  34462. + // 2008.01.30.
  34463. + //
  34464. +
  34465. + //
  34466. + // Evaluate RxOk count from each antenna if we shall switch default antenna now.
  34467. + // Added by Roger, 2008.02.21.
  34468. +
  34469. + //{by amy 080312
  34470. + if((priv->AdMainAntennaRxOkCnt < priv->AdAuxAntennaRxOkCnt) && (priv->CurrAntennaIndex == 0)){
  34471. + // We set Main antenna as default but RxOk count was less than Aux ones.
  34472. +
  34473. + printk("SwAntennaDiversity(): Main antenna %d RxOK is poor, AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
  34474. +
  34475. + // Switch to Aux antenna.
  34476. + SwitchAntenna(dev);
  34477. + priv->bHWAdSwitched = true;
  34478. + }else if((priv->AdAuxAntennaRxOkCnt < priv->AdMainAntennaRxOkCnt) && (priv->CurrAntennaIndex == 1)){
  34479. + // We set Aux antenna as default but RxOk count was less than Main ones.
  34480. +
  34481. + printk("SwAntennaDiversity(): Aux antenna %d RxOK is poor, AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
  34482. +
  34483. + // Switch to Main antenna.
  34484. + SwitchAntenna(dev);
  34485. + priv->bHWAdSwitched = true;
  34486. + }else{// Default antenna is better.
  34487. +
  34488. + printk("SwAntennaDiversity(): Current Antenna %d is better., AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
  34489. +
  34490. + // Still need to check current signal strength.
  34491. + priv->bHWAdSwitched = false;
  34492. + }
  34493. + //
  34494. + // <Roger_Notes> We evaluate Rx signal strength ONLY when default antenna
  34495. + // didn't changed by HW evaluation.
  34496. + // 2008.02.27.
  34497. + //
  34498. + // [TRC Dell Lab] SignalStrength is inaccuracy. Isaiah 2008-03-05
  34499. + // For example, Throughput of aux is better than main antenna(about 10M v.s 2M),
  34500. + // but AdRxSignalStrength is less than main.
  34501. + // Our guess is that main antenna have lower throughput and get many change
  34502. + // to receive more CCK packets(ex.Beacon) which have stronger SignalStrength.
  34503. + //
  34504. + if( (!priv->bHWAdSwitched) && (bSwCheckSS)){
  34505. + //by amy 080312}
  34506. +
  34507. + // Evaluate Rx signal strength if we shall switch antenna now.
  34508. + if(priv->AdRxSignalStrength < priv->AdRxSsThreshold){
  34509. + // Rx signal strength is weak => Switch Antenna.
  34510. + printk("SwAntennaDiversity(): Rx Signal Strength is weak, CurrRxSs: %ld, RxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);
  34511. +
  34512. + priv->AdRxSsBeforeSwitched = priv->AdRxSignalStrength;
  34513. + priv->bAdSwitchedChecking = true;
  34514. +
  34515. + SwitchAntenna(dev);
  34516. + }else{ // Rx signal strength is OK.
  34517. + printk("SwAntennaDiversity(): Rx Signal Strength is OK, CurrRxSs: %ld, RxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);
  34518. +
  34519. + priv->bAdSwitchedChecking = false;
  34520. + // Increase Rx signal strength threashold if necessary.
  34521. + if( (priv->AdRxSignalStrength > (priv->AdRxSsThreshold + 10)) && // Signal is much stronger than current threshold
  34522. + priv->AdRxSsThreshold <= priv->AdMaxRxSsThreshold) // Current threhold is not yet reach upper limit.
  34523. + {
  34524. + priv->AdRxSsThreshold = (priv->AdRxSsThreshold + priv->AdRxSignalStrength) / 2;
  34525. + priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
  34526. + priv->AdMaxRxSsThreshold: priv->AdRxSsThreshold;//+by amy 080312
  34527. + }
  34528. +
  34529. + // Reduce Antenna Diversity checking period if possible.
  34530. + if( priv->AdCheckPeriod > priv->AdMinCheckPeriod )
  34531. + {
  34532. + priv->AdCheckPeriod /= 2;
  34533. + }
  34534. + }
  34535. + }
  34536. + }
  34537. +//by amy 080312
  34538. + // Reset antenna diversity Rx related statistics.
  34539. + priv->AdRxOkCnt = 0;
  34540. + priv->AdMainAntennaRxOkCnt = 0;
  34541. + priv->AdAuxAntennaRxOkCnt = 0;
  34542. +//by amy 080312
  34543. +
  34544. +// priv->AdRxOkCnt = 0;//-by amy 080312
  34545. +
  34546. + //printk("-SwAntennaDiversity()\n");
  34547. +}
  34548. +
  34549. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  34550. +void SwAntennaWorkItemCallback(struct work_struct *work)
  34551. +{
  34552. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, SwAntennaWorkItem.work);
  34553. + struct net_device *dev = ieee->dev;
  34554. +#else
  34555. +void SwAntennaWorkItemCallback(struct net_device *dev)
  34556. +{
  34557. +#endif
  34558. + //printk("==>%s \n", __func__);
  34559. + SwAntennaDiversity(dev);
  34560. +}
  34561. +
  34562. +//
  34563. +// Description: Timer callback function of SW Antenna Diversity.
  34564. +//
  34565. +void SwAntennaDiversityTimerCallback(struct net_device *dev)
  34566. +{
  34567. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  34568. + RT_RF_POWER_STATE rtState;
  34569. +
  34570. + //printk("+SwAntennaDiversityTimerCallback()\n");
  34571. +
  34572. + //
  34573. + // We do NOT need to switch antenna while RF is off.
  34574. + // 2007.05.09, added by Roger.
  34575. + //
  34576. + rtState = priv->eRFPowerState;
  34577. + do{
  34578. + if (rtState == eRfOff){
  34579. +// printk("SwAntennaDiversityTimer - RF is OFF.\n");
  34580. + break;
  34581. + }else if (rtState == eRfSleep){
  34582. + // Don't access BB/RF under Disable PLL situation.
  34583. + //RT_TRACE((COMP_RF|COMP_ANTENNA), DBG_LOUD, ("SwAntennaDiversityTimerCallback(): RF is Sleep => skip it\n"));
  34584. + break;
  34585. + }
  34586. +
  34587. + queue_work(priv->ieee80211->wq,(void *)&priv->ieee80211->SwAntennaWorkItem);
  34588. +
  34589. + }while(false);
  34590. +
  34591. + if(priv->up){
  34592. + //priv->SwAntennaDiversityTimer.expires = jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD);
  34593. + //add_timer(&priv->SwAntennaDiversityTimer);
  34594. + mod_timer(&priv->SwAntennaDiversityTimer, jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD));
  34595. + }
  34596. +
  34597. +}
  34598. +#endif
  34599. +
  34600. +
  34601. +
  34602. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_dm.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_dm.h
  34603. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_dm.h 1970-01-01 01:00:00.000000000 +0100
  34604. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_dm.h 2009-08-23 19:01:04.000000000 +0200
  34605. @@ -0,0 +1,38 @@
  34606. +/*
  34607. + Hardware dynamic mechanism for RTL8187B.
  34608. +Notes:
  34609. + This file is ported from RTL8187B Windows driver
  34610. +*/
  34611. +
  34612. +#ifndef R8180_DM_H
  34613. +#define R8180_DM_H
  34614. +
  34615. +#include "r8187.h"
  34616. +
  34617. +bool CheckDig(struct net_device *dev);
  34618. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  34619. +void rtl8180_hw_dig_wq (struct work_struct *work);
  34620. +#else
  34621. +void rtl8180_hw_dig_wq(struct net_device *dev);
  34622. +#endif
  34623. +
  34624. +bool CheckHighPower(struct net_device *dev);
  34625. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  34626. +void rtl8180_tx_pw_wq (struct work_struct *work);
  34627. +#else
  34628. +void rtl8180_tx_pw_wq(struct net_device *dev);
  34629. +#endif
  34630. +
  34631. +//by lzm for antenna
  34632. +#ifdef SW_ANTE_DIVERSITY
  34633. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  34634. +void SwAntennaWorkItemCallback(struct work_struct *work);
  34635. +#else
  34636. +void SwAntennaWorkItemCallback(struct net_device *dev);
  34637. +#endif
  34638. +void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength);
  34639. +void SwAntennaDiversityTimerCallback(struct net_device *dev);
  34640. +#endif
  34641. +//by lzm for antenna
  34642. +
  34643. +#endif //R8180_PM_H
  34644. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_hw.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_hw.h
  34645. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_hw.h 1970-01-01 01:00:00.000000000 +0100
  34646. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_hw.h 2009-08-23 19:01:04.000000000 +0200
  34647. @@ -0,0 +1,788 @@
  34648. +/*
  34649. + This is part of rtl8187 OpenSource driver.
  34650. + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
  34651. + Released under the terms of GPL (General Public Licence)
  34652. +
  34653. + Parts of this driver are based on the GPL part of the
  34654. + official Realtek driver.
  34655. + Parts of this driver are based on the rtl8180 driver skeleton
  34656. + from Patric Schenke & Andres Salomon.
  34657. + Parts of this driver are based on the Intel Pro Wireless
  34658. + 2100 GPL driver.
  34659. +
  34660. + We want to tanks the Authors of those projects
  34661. + and the Ndiswrapper project Authors.
  34662. +*/
  34663. +
  34664. +/* Mariusz Matuszek added full registers definition with Realtek's name */
  34665. +
  34666. +/* this file contains register definitions for the rtl8187 MAC controller */
  34667. +#ifndef R8180_HW
  34668. +#define R8180_HW
  34669. +
  34670. +typedef enum _RF_TYPE_8187{
  34671. + RF_TYPE_MIN,
  34672. + RF_ZEBRA = 5,
  34673. + RF_ZEBRA2, // added by Annie, 2005-08-01.
  34674. + RF_TYPE_MAX,
  34675. +}RF_TYPE_8187,*PRF_TYPE_8187;
  34676. +
  34677. +typedef enum _VERSION_8187{
  34678. + // RTL8187
  34679. + VERSION_8187_B, // B-cut
  34680. + VERSION_8187_D, // D-cut
  34681. + // RTL8187B
  34682. + VERSION_8187B_B, // B-cut
  34683. + VERSION_8187B_D, //D-cut //added 2007-9-14
  34684. + VERSION_8187B_E, //E-cut //added 2007-9-14
  34685. +}VERSION_8187,*PVERSION_8187;
  34686. +
  34687. +//by lzm for antenna
  34688. +#ifdef SW_ANTE_DIVERSITY
  34689. +#define RF_PARAM 0x19
  34690. +#define RF_PARAM_DIGPHY_SHIFT 0
  34691. +#define RF_PARAM_ANTBDEFAULT_SHIFT 1
  34692. +#define EEPROM_VERSION 0x3c
  34693. +#define EEPROM_CONFIG2 0x18
  34694. +#define EEPROM_CS_THRESHOLD 0x2F
  34695. +#define EEPROM_RF_PARAM 0x08
  34696. +//// BIT[8-9] is for SW Antenna Diversity. Only the value EEPROM_SW_AD_ENABLE means enable, other values are diable.
  34697. +#define EEPROM_SW_AD_MASK 0x0300
  34698. +#define EEPROM_SW_AD_ENABLE 0x0100
  34699. +//// BIT[10-11] determine if Antenna 1 is the Default Antenna. Only the value EEPROM_DEF_ANT_1 means TRUE, other values are FALSE.
  34700. +#define EEPROM_DEF_ANT_MASK 0x0C00
  34701. +#define EEPROM_DEF_ANT_1 0x0400
  34702. +
  34703. +#define RCR_EnCS1 BIT29 // enable carrier sense method 1
  34704. +#define RCR_EnCS2 BIT30 // enable carrier sense method 2
  34705. +#endif
  34706. +//by lzm for antenna
  34707. +
  34708. +#define RTL8187_RF_INDEX 0x8225
  34709. +#define RTL8187_REQT_READ 0xc0
  34710. +#define RTL8187_REQT_WRITE 0x40
  34711. +#define RTL8187_REQ_GET_REGS 0x05
  34712. +#define RTL8187_REQ_SET_REGS 0x05
  34713. +
  34714. +
  34715. +
  34716. +#define MAX_TX_URB 5
  34717. +#define MAX_RX_URB 16
  34718. +#define RX_URB_SIZE 0x9C4
  34719. +
  34720. +
  34721. +
  34722. +
  34723. +
  34724. +#define BB_ANTATTEN_CHAN14 0x0c
  34725. +#define BB_ANTENNA_B 0x40
  34726. +
  34727. +#define BB_HOST_BANG (1<<30)
  34728. +#define BB_HOST_BANG_EN (1<<2)
  34729. +#define BB_HOST_BANG_CLK (1<<1)
  34730. +#define BB_HOST_BANG_RW (1<<3)
  34731. +#define BB_HOST_BANG_DATA 1
  34732. +
  34733. +#define ANAPARAM_TXDACOFF_SHIFT 27
  34734. +#define ANAPARAM_PWR0_MASK ((1<<30)|(1<<29)|(1<<28))
  34735. +#define ANAPARAM_PWR0_SHIFT 28
  34736. +#define ANAPARAM_PWR1_MASK ((1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20))
  34737. +#define ANAPARAM_PWR1_SHIFT 20
  34738. +
  34739. +#define MAC0 0
  34740. +#define MAC1 1
  34741. +#define MAC2 2
  34742. +#define MAC3 3
  34743. +#define MAC4 4
  34744. +#define MAC5 5
  34745. +
  34746. +#define RXFIFOCOUNT 0x10
  34747. +#define TXFIFOCOUNT 0x12
  34748. +#define BcnIntTime 0x74
  34749. +#define TALLY_SEL 0xfc
  34750. +#define BQREQ 0x13
  34751. +
  34752. +#define CMD 0x37
  34753. +#define CMD_RST_SHIFT 4
  34754. +#define CMD_RESERVED_MASK ((1<<1) | (1<<5) | (1<<6) | (1<<7))
  34755. +#define CMD_RX_ENABLE_SHIFT 3
  34756. +#define CMD_TX_ENABLE_SHIFT 2
  34757. +
  34758. +#define EPROM_CMD 0x50
  34759. +#define EPROM_CMD_RESERVED_MASK ((1<<5)|(1<<4))
  34760. +#define EPROM_CMD_OPERATING_MODE_SHIFT 6
  34761. +#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
  34762. +#define EPROM_CMD_CONFIG 0x3
  34763. +#define EPROM_CMD_NORMAL 0
  34764. +#define EPROM_CMD_LOAD 1
  34765. +#define EPROM_CMD_PROGRAM 2
  34766. +#define EPROM_CS_SHIFT 3
  34767. +#define EPROM_CK_SHIFT 2
  34768. +#define EPROM_W_SHIFT 1
  34769. +#define EPROM_R_SHIFT 0
  34770. +#define CONFIG2_DMA_POLLING_MODE_SHIFT 3
  34771. +#define INTA 0x3e
  34772. +#define INTA_TXOVERFLOW (1<<15)
  34773. +#define INTA_TIMEOUT (1<<14)
  34774. +#define INTA_BEACONTIMEOUT (1<<13)
  34775. +#define INTA_ATIM (1<<12)
  34776. +#define INTA_BEACONDESCERR (1<<11)
  34777. +#define INTA_BEACONDESCOK (1<<10)
  34778. +#define INTA_HIPRIORITYDESCERR (1<<9)
  34779. +#define INTA_HIPRIORITYDESCOK (1<<8)
  34780. +#define INTA_NORMPRIORITYDESCERR (1<<7)
  34781. +#define INTA_NORMPRIORITYDESCOK (1<<6)
  34782. +#define INTA_RXOVERFLOW (1<<5)
  34783. +#define INTA_RXDESCERR (1<<4)
  34784. +#define INTA_LOWPRIORITYDESCERR (1<<3)
  34785. +#define INTA_LOWPRIORITYDESCOK (1<<2)
  34786. +#define INTA_RXCRCERR (1<<1)
  34787. +#define INTA_RXOK (1)
  34788. +#define INTA_MASK 0x3c
  34789. +#define RXRING_ADDR 0xe4 // page 0
  34790. +#define PGSELECT 0x5e
  34791. +#define PGSELECT_PG_SHIFT 0
  34792. +#define RX_CONF 0x44
  34793. +#define MAC_FILTER_MASK ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
  34794. +(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))
  34795. +#define RX_CHECK_BSSID_SHIFT 23
  34796. +#define ACCEPT_PWR_FRAME_SHIFT 22
  34797. +#define ACCEPT_MNG_FRAME_SHIFT 20
  34798. +#define ACCEPT_CTL_FRAME_SHIFT 19
  34799. +#define ACCEPT_DATA_FRAME_SHIFT 18
  34800. +#define ACCEPT_ICVERR_FRAME_SHIFT 12
  34801. +#define ACCEPT_CRCERR_FRAME_SHIFT 5
  34802. +#define ACCEPT_BCAST_FRAME_SHIFT 3
  34803. +#define ACCEPT_MCAST_FRAME_SHIFT 2
  34804. +#define ACCEPT_ALLMAC_FRAME_SHIFT 0
  34805. +#define ACCEPT_NICMAC_FRAME_SHIFT 1
  34806. +#define RX_FIFO_THRESHOLD_MASK ((1<<13) | (1<<14) | (1<<15))
  34807. +#define RX_FIFO_THRESHOLD_SHIFT 13
  34808. +#define RX_FIFO_THRESHOLD_128 3
  34809. +#define RX_FIFO_THRESHOLD_256 4
  34810. +#define RX_FIFO_THRESHOLD_512 5
  34811. +#define RX_FIFO_THRESHOLD_1024 6
  34812. +#define RX_FIFO_THRESHOLD_NONE 7
  34813. +#define RX_AUTORESETPHY_SHIFT 28
  34814. +#define EPROM_TYPE_SHIFT 6
  34815. +#define TX_CONF 0x40
  34816. +#define TX_CONF_HEADER_AUTOICREMENT_SHIFT 30
  34817. +#define TX_LOOPBACK_SHIFT 17
  34818. +#define TX_LOOPBACK_MAC 1
  34819. +#define TX_LOOPBACK_BASEBAND 2
  34820. +#define TX_LOOPBACK_NONE 0
  34821. +#define TX_LOOPBACK_CONTINUE 3
  34822. +#define TX_LOOPBACK_MASK ((1<<17)|(1<<18))
  34823. +#define TX_LRLRETRY_SHIFT 0
  34824. +#define R8180_MAX_RETRY 255
  34825. +#define TX_SRLRETRY_SHIFT 8
  34826. +#define TX_NOICV_SHIFT 19
  34827. +#define TX_NOCRC_SHIFT 16
  34828. +#define TX_DMA_POLLING 0xd9
  34829. +#define TX_DMA_POLLING_BEACON_SHIFT 7
  34830. +#define TX_DMA_POLLING_HIPRIORITY_SHIFT 6
  34831. +#define TX_DMA_POLLING_NORMPRIORITY_SHIFT 5
  34832. +#define TX_DMA_POLLING_LOWPRIORITY_SHIFT 4
  34833. +#define TX_DMA_STOP_BEACON_SHIFT 3
  34834. +#define TX_DMA_STOP_HIPRIORITY_SHIFT 2
  34835. +#define TX_DMA_STOP_NORMPRIORITY_SHIFT 1
  34836. +#define TX_DMA_STOP_LOWPRIORITY_SHIFT 0
  34837. +#define TX_NORMPRIORITY_RING_ADDR 0x24
  34838. +#define TX_HIGHPRIORITY_RING_ADDR 0x28
  34839. +#define TX_LOWPRIORITY_RING_ADDR 0x20
  34840. +#define MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
  34841. +#define MAX_RX_DMA_2048 7
  34842. +#define MAX_RX_DMA_1024 6
  34843. +#define MAX_RX_DMA_SHIFT 10
  34844. +#define INT_TIMEOUT 0x48
  34845. +#define CONFIG3_CLKRUN_SHIFT 2
  34846. +#define CONFIG3_ANAPARAM_W_SHIFT 6
  34847. +#define ANAPARAM 0x54
  34848. +#define BEACON_INTERVAL 0x70
  34849. +#define BEACON_INTERVAL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
  34850. +(1<<6)|(1<<7)|(1<<8)|(1<<9))
  34851. +#define ATIM_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)| \
  34852. +(1<<8)|(1<<9))
  34853. +#define ATIM 0x72
  34854. +#define EPROM_CS_SHIFT 3
  34855. +#define EPROM_CK_SHIFT 2
  34856. +#define PHY_DELAY 0x78
  34857. +#define PHY_CONFIG 0x80
  34858. +#define PHY_ADR 0x7c
  34859. +#define PHY_READ 0x7e
  34860. +#define CARRIER_SENSE_COUNTER 0x79 //byte
  34861. +#define SECURITY 0x5f
  34862. +#define SECURITY_WEP_TX_ENABLE_SHIFT 1
  34863. +#define SECURITY_WEP_RX_ENABLE_SHIFT 0
  34864. +#define SECURITY_ENCRYP_104 1
  34865. +#define SECURITY_ENCRYP_SHIFT 4
  34866. +#define SECURITY_ENCRYP_MASK ((1<<4)|(1<<5))
  34867. +#define KEY0 0x90
  34868. +#define CONFIG2_ANTENNA_SHIFT 6
  34869. +#define TX_BEACON_RING_ADDR 0x4c
  34870. +#define CONFIG0_WEP40_SHIFT 7
  34871. +#define CONFIG0_WEP104_SHIFT 6
  34872. +#define AGCRESET_SHIFT 5
  34873. +
  34874. +
  34875. +
  34876. +/*
  34877. + * Operational registers offsets in PCI (I/O) space.
  34878. + * RealTek names are used.
  34879. + */
  34880. +
  34881. +#define IDR0 0x0000
  34882. +#define IDR1 0x0001
  34883. +#define IDR2 0x0002
  34884. +#define IDR3 0x0003
  34885. +#define IDR4 0x0004
  34886. +#define IDR5 0x0005
  34887. +
  34888. +/* 0x0006 - 0x0007 - reserved */
  34889. +
  34890. +#define MAR0 0x0008
  34891. +#define MAR1 0x0009
  34892. +#define MAR2 0x000A
  34893. +#define MAR3 0x000B
  34894. +#define MAR4 0x000C
  34895. +#define MAR5 0x000D
  34896. +#define MAR6 0x000E
  34897. +#define MAR7 0x000F
  34898. +
  34899. +/* 0x0010 - 0x0017 - reserved */
  34900. +
  34901. +#define TSFTR 0x0018
  34902. +#define TSFTR_END 0x001F
  34903. +
  34904. +#define TLPDA 0x0020
  34905. +#define TLPDA_END 0x0023
  34906. +#define TNPDA 0x0024
  34907. +#define TNPDA_END 0x0027
  34908. +#define THPDA 0x0028
  34909. +#define THPDA_END 0x002B
  34910. +
  34911. +#define BRSR_8187 0x002C
  34912. +#define BRSR_8187_END 0x002D
  34913. +#define BRSR_8187B 0x0034
  34914. +#define BRSR_8187B_END 0x0035
  34915. +
  34916. +#define BSSID 0x002E
  34917. +#define BSSID_END 0x0033
  34918. +
  34919. +/* 0x0034 - 0x0034 - reserved */
  34920. +
  34921. +/* 0x0038 - 0x003B - reserved */
  34922. +
  34923. +#define IMR 0x003C
  34924. +#define IMR_END 0x003D
  34925. +
  34926. +#define ISR 0x003E
  34927. +#define ISR_END 0x003F
  34928. +
  34929. +#define TCR 0x0040
  34930. +#define TCR_END 0x0043
  34931. +
  34932. +#define RCR 0x0044
  34933. +#define RCR_END 0x0047
  34934. +
  34935. +#define TimerInt 0x0048
  34936. +#define TimerInt_END 0x004B
  34937. +
  34938. +#define TBDA 0x004C
  34939. +#define TBDA_END 0x004F
  34940. +
  34941. +#define CR9346 0x0050
  34942. +
  34943. +#define CONFIG0 0x0051
  34944. +#define CONFIG1 0x0052
  34945. +#define CONFIG2 0x0053
  34946. +
  34947. +#define ANA_PARAM 0x0054
  34948. +#define ANA_PARAM_END 0x0x0057
  34949. +
  34950. +#define MSR 0x0058
  34951. +
  34952. +#define CONFIG3 0x0059
  34953. +#define CONFIG4 0x005A
  34954. +
  34955. +#define TESTR 0x005B
  34956. +
  34957. +/* 0x005C - 0x005D - reserved */
  34958. +#define TFPC_AC 0x005C
  34959. +#define PSR 0x005E
  34960. +
  34961. +#define SCR 0x005F
  34962. +
  34963. +/* 0x0060 - 0x006F - reserved */
  34964. +#define ANA_PARAM2 0x0060
  34965. +#define ANA_PARAM2_END 0x0063
  34966. +
  34967. +#define BcnIntv 0x0070
  34968. +#define BcnItv_END 0x0071
  34969. +
  34970. +#define AtimWnd 0x0072
  34971. +#define AtimWnd_END 0x0073
  34972. +
  34973. +#define BintrItv 0x0074
  34974. +#define BintrItv_END 0x0075
  34975. +
  34976. +#define AtimtrItv 0x0076
  34977. +#define AtimtrItv_END 0x0077
  34978. +
  34979. +#define PhyDelay 0x0078
  34980. +
  34981. +//#define CRCount 0x0079
  34982. +
  34983. +#define AckTimeOutReg 0x79 // ACK timeout register, in unit of 4 us.
  34984. +/* 0x007A - 0x007B - reserved */
  34985. +#define BBAddr 0x007C
  34986. +
  34987. +
  34988. +#define PhyAddr 0x007C
  34989. +#define PhyDataW 0x007D
  34990. +#define PhyDataR 0x007E
  34991. +#define RF_Ready 0x007F
  34992. +
  34993. +#define PhyCFG 0x0080
  34994. +#define PhyCFG_END 0x0083
  34995. +
  34996. +/* following are for rtl8185 */
  34997. +#define RFPinsOutput 0x80
  34998. +#define RFPinsEnable 0x82
  34999. +#define RF_TIMING 0x8c
  35000. +#define RFPinsSelect 0x84
  35001. +#define ANAPARAM2 0x60
  35002. +#define RF_PARA 0x88
  35003. +#define RFPinsInput 0x86
  35004. +#define GP_ENABLE 0x90
  35005. +#define GPIO 0x91
  35006. +#define HSSI_PARA 0x94 // HSS Parameter
  35007. +#define SW_CONTROL_GPIO 0x400
  35008. +#define CCK_TXAGC 0x9d
  35009. +#define OFDM_TXAGC 0x9e
  35010. +#define ANTSEL 0x9f
  35011. +#define TXAGC_CTL_PER_PACKET_ANT_SEL 0x02
  35012. +#define WPA_CONFIG 0xb0
  35013. +#define TX_AGC_CTL 0x9c
  35014. +#define TX_AGC_CTL_PER_PACKET_TXAGC 0x01
  35015. +#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT 0
  35016. +#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT 1
  35017. +#define TX_AGC_CTL_FEEDBACK_ANT 2
  35018. +#define RESP_RATE 0x34
  35019. +#define SIFS 0xb4
  35020. +#define DIFS 0xb5
  35021. +#define EIFS_8187 0x35
  35022. +#define EIFS_8187B 0x2D
  35023. +#define SLOT 0xb6
  35024. +#define CW_VAL 0xbd
  35025. +#define CW_CONF 0xbc
  35026. +#define CW_CONF_PERPACKET_RETRY_LIMIT 0x02
  35027. +#define CW_CONF_PERPACKET_CW 0x01
  35028. +#define CW_CONF_PERPACKET_RETRY_SHIFT 1
  35029. +#define CW_CONF_PERPACKET_CW_SHIFT 0
  35030. +#define MAX_RESP_RATE_SHIFT 4
  35031. +#define MIN_RESP_RATE_SHIFT 0
  35032. +#define RATE_FALLBACK 0xbe
  35033. +#define RATE_FALLBACK_CTL_ENABLE 0x80
  35034. +#define RATE_FALLBACK_CTL_AUTO_STEP0 0x00
  35035. +
  35036. +#define ARFR 0x1E0 // Auto Rate Fallback Register (0x1e0 ~ 0x1e2)
  35037. +#define RMS 0x1EC // Rx Max Pacetk Size (0x1ec[0:12])
  35038. +
  35039. +/*
  35040. + * 0x0084 - 0x00D3 is selected to page 1 when PSEn bit (bit0, PSR)
  35041. + * is set to 1
  35042. + */
  35043. +
  35044. +#define Wakeup0 0x0084
  35045. +#define Wakeup0_END 0x008B
  35046. +
  35047. +#define Wakeup1 0x008C
  35048. +#define Wakeup1_END 0x0093
  35049. +
  35050. +#define Wakeup2LD 0x0094
  35051. +#define Wakeup2LD_END 0x009B
  35052. +#define Wakeup2HD 0x009C
  35053. +#define Wakeup2HD_END 0x00A3
  35054. +
  35055. +#define Wakeup3LD 0x00A4
  35056. +#define Wakeup3LD_END 0x00AB
  35057. +#define Wakeup3HD 0x00AC
  35058. +#define Wakeup3HD_END 0x00B3
  35059. +
  35060. +#define Wakeup4LD 0x00B4
  35061. +#define Wakeup4LD_END 0x00BB
  35062. +#define Wakeup4HD 0x00BC
  35063. +#define Wakeup4HD_END 0x00C3
  35064. +
  35065. +#define CRC0 0x00C4
  35066. +#define CRC0_END 0x00C5
  35067. +#define CRC1 0x00C6
  35068. +#define CRC1_END 0x00C7
  35069. +#define CRC2 0x00C8
  35070. +#define CRC2_END 0x00C9
  35071. +#define CRC3 0x00CA
  35072. +#define CRC3_END 0x00CB
  35073. +#define CRC4 0x00CC
  35074. +#define CRC4_END 0x00CD
  35075. +
  35076. +/* 0x00CE - 0x00D3 - reserved */
  35077. +
  35078. +
  35079. +
  35080. +/*
  35081. + * 0x0084 - 0x00D3 is selected to page 0 when PSEn bit (bit0, PSR)
  35082. + * is set to 0
  35083. + */
  35084. +
  35085. +/* 0x0084 - 0x008F - reserved */
  35086. +
  35087. +#define DK0 0x0090
  35088. +#define DK0_END 0x009F
  35089. +#define DK1 0x00A0
  35090. +#define DK1_END 0x00AF
  35091. +#define DK2 0x00B0
  35092. +#define DK2_END 0x00BF
  35093. +#define DK3 0x00C0
  35094. +#define DK3_END 0x00CF
  35095. +
  35096. +#define GPO 0x90
  35097. +#define GPE 0x91
  35098. +#define GPI 0x92
  35099. +
  35100. +#define RFTiming 0x008C
  35101. +#define ACM_CONTROL 0x00BF // ACM Control Registe
  35102. +#define INT_MIG 0x00E2 // Interrupt Migration (0xE2 ~ 0xE3)
  35103. +#define TID_AC_MAP 0x00E8 // TID to AC Mapping Register
  35104. +
  35105. +#define AC_VO_PARAM 0x00F0 // AC_VO Parameters Record
  35106. +#define AC_VI_PARAM 0x00F4 // AC_VI Parameters Record
  35107. +#define AC_BE_PARAM 0x00F8 // AC_BE Parameters Record
  35108. +#define AC_BK_PARAM 0x00FC // AC_BK Parameters Record
  35109. +
  35110. +/* 0x00D0 - 0x00D3 - reserved */
  35111. +#define CCK_FALSE_ALARM 0x00D0
  35112. +#define OFDM_FALSE_ALARM 0x00D2
  35113. +
  35114. +
  35115. +/* 0x00D4 - 0x00D7 - reserved */
  35116. +
  35117. +#define CONFIG5 0x00D8
  35118. +
  35119. +#define TPPoll 0x00D9
  35120. +
  35121. +/* 0x00DA - 0x00DB - reserved */
  35122. +
  35123. +#define CWR 0x00DC
  35124. +#define CWR_END 0x00DD
  35125. +
  35126. +#define RetryCTR 0x00DE
  35127. +
  35128. +/* 0x00DF - 0x00E3 - reserved */
  35129. +
  35130. +#define RDSAR 0x00E4
  35131. +#define RDSAR_END 0x00E7
  35132. +
  35133. +/* 0x00E8 - 0x00EF - reserved */
  35134. +#define ANA_PARAM3 0x00EE
  35135. +
  35136. +#define FER 0x00F0
  35137. +#define FER_END 0x00F3
  35138. +
  35139. +#define FEMR 0x1D4 // Function Event Mask register (0xf4 ~ 0xf7)
  35140. +//#define FEMR 0x00F4
  35141. +#define FEMR_END 0x00F7
  35142. +
  35143. +#define FPSR 0x00F8
  35144. +#define FPSR_END 0x00FB
  35145. +
  35146. +#define FFER 0x00FC
  35147. +#define FFER_END 0x00FF
  35148. +
  35149. +/*
  35150. + * 0x0000 - 0x00ff is selected to page 0 when PSEn bit (bit0, PSR)
  35151. + * is set to 2
  35152. + */
  35153. +#define RFSW_CTRL 0x272 // 0x272-0x273.
  35154. +
  35155. +
  35156. +
  35157. +//----------------------------------------------------------------------------
  35158. +// 8187B AC_XX_PARAM bits
  35159. +//----------------------------------------------------------------------------
  35160. +#define AC_PARAM_TXOP_LIMIT_OFFSET 16
  35161. +#define AC_PARAM_ECW_MAX_OFFSET 12
  35162. +#define AC_PARAM_ECW_MIN_OFFSET 8
  35163. +#define AC_PARAM_AIFS_OFFSET 0
  35164. +
  35165. +//----------------------------------------------------------------------------
  35166. +// 8187B ACM_CONTROL bits (Offset 0xBF, 1 Byte)
  35167. +//----------------------------------------------------------------------------
  35168. +#define VOQ_ACM_EN (0x01 << 7) //BIT7
  35169. +#define VIQ_ACM_EN (0x01 << 6) //BIT6
  35170. +#define BEQ_ACM_EN (0x01 << 5) //BIT5
  35171. +#define ACM_HW_EN (0x01 << 4) //BIT4
  35172. +#define TXOPSEL (0x01 << 3) //BIT3
  35173. +#define VOQ_ACM_CTL (0x01 << 2) //BIT2 // Set to 1 when AC_VO used time reaches or exceeds the admitted time
  35174. +#define VIQ_ACM_CTL (0x01 << 1) //BIT1 // Set to 1 when AC_VI used time reaches or exceeds the admitted time
  35175. +#define BEQ_ACM_CTL (0x01 << 0) //BIT0 // Set to 1 when AC_BE used time reaches or exceeds the admitted time
  35176. +
  35177. +//----------------------------------------------------------------------------
  35178. +// 8187B RF pins related setting (offset 0xFF80-0xFF87,)
  35179. +//----------------------------------------------------------------------------
  35180. +#define TR_SW_MASK_TX_8187 BIT5
  35181. +#define TR_SW_MASK_RX_8187 BIT6
  35182. +#define TR_SW_MASK_8187 (TR_SW_MASK_TX_8187 | TR_SW_MASK_RX_8187)
  35183. +
  35184. +/*
  35185. + * Bitmasks for specific register functions.
  35186. + * Names are derived from the register name and function name.
  35187. + *
  35188. + * <REGISTER>_<FUNCTION>[<bit>]
  35189. + *
  35190. + * this leads to some awkward names...
  35191. + */
  35192. +
  35193. +#define BRSR_BPLCP ((1<< 8))
  35194. +#define BRSR_MBR ((1<< 1)|(1<< 0))
  35195. +#define BRSR_MBR_8185 ((1<< 11)|(1<< 10)|(1<< 9)|(1<< 8)|(1<< 7)|(1<< 6)|(1<< 5)|(1<< 4)|(1<< 3)|(1<< 2)|(1<< 1)|(1<< 0))
  35196. +#define BRSR_MBR0 ((1<< 0))
  35197. +#define BRSR_MBR1 ((1<< 1))
  35198. +
  35199. +#define CR_RST ((1<< 4))
  35200. +#define CR_RE ((1<< 3))
  35201. +#define CR_TE ((1<< 2))
  35202. +#define CR_MulRW ((1<< 0))
  35203. +
  35204. +#define IMR_TXFOVW ((1<<15))
  35205. +#define IMR_TimeOut ((1<<14))
  35206. +#define IMR_BcnInt ((1<<13))
  35207. +#define IMR_ATIMInt ((1<<12))
  35208. +#define IMR_TBDER ((1<<11))
  35209. +#define IMR_TBDOK ((1<<10))
  35210. +#define IMR_THPDER ((1<< 9))
  35211. +#define IMR_THPDOK ((1<< 8))
  35212. +#define IMR_TNPDER ((1<< 7))
  35213. +#define IMR_TNPDOK ((1<< 6))
  35214. +#define IMR_RXFOVW ((1<< 5))
  35215. +#define IMR_RDU ((1<< 4))
  35216. +#define IMR_TLPDER ((1<< 3))
  35217. +#define IMR_TLPDOK ((1<< 2))
  35218. +#define IMR_RER ((1<< 1))
  35219. +#define IMR_ROK ((1<< 0))
  35220. +
  35221. +#define ISR_TXFOVW ((1<<15))
  35222. +#define ISR_TimeOut ((1<<14))
  35223. +#define ISR_BcnInt ((1<<13))
  35224. +#define ISR_ATIMInt ((1<<12))
  35225. +#define ISR_TBDER ((1<<11))
  35226. +#define ISR_TBDOK ((1<<10))
  35227. +#define ISR_THPDER ((1<< 9))
  35228. +#define ISR_THPDOK ((1<< 8))
  35229. +#define ISR_TNPDER ((1<< 7))
  35230. +#define ISR_TNPDOK ((1<< 6))
  35231. +#define ISR_RXFOVW ((1<< 5))
  35232. +#define ISR_RDU ((1<< 4))
  35233. +#define ISR_TLPDER ((1<< 3))
  35234. +#define ISR_TLPDOK ((1<< 2))
  35235. +#define ISR_RER ((1<< 1))
  35236. +#define ISR_ROK ((1<< 0))
  35237. +
  35238. +#define HW_VERID_R8180_F 3
  35239. +#define HW_VERID_R8180_ABCD 2
  35240. +#define HW_VERID_R8185_ABC 4
  35241. +#define HW_VERID_R8185_D 5
  35242. +
  35243. +#define TCR_DurProcMode ((1<<30))
  35244. +#define TCR_DISReqQsize ((1<<28))
  35245. +#define TCR_HWVERID_MASK ((1<<27)|(1<<26)|(1<<25))
  35246. +#define TCR_HWVERID_SHIFT 25
  35247. +#define TCR_SWPLCPLEN ((1<<24))
  35248. +#define TCR_PLCP_LEN TCR_SAT // rtl8180
  35249. +#define TCR_MXDMA_MASK ((1<<23)|(1<<22)|(1<<21))
  35250. +#define TCR_MXDMA_1024 6
  35251. +#define TCR_MXDMA_2048 7
  35252. +#define TCR_MXDMA_SHIFT 21
  35253. +#define TCR_DISCW ((1<<20))
  35254. +#define TCR_ICV ((1<<19))
  35255. +#define TCR_LBK ((1<<18)|(1<<17))
  35256. +#define TCR_LBK1 ((1<<18))
  35257. +#define TCR_LBK0 ((1<<17))
  35258. +#define TCR_CRC ((1<<16))
  35259. +#define TCR_SRL_MASK ((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8))
  35260. +#define TCR_LRL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7))
  35261. +#define TCR_PROBE_NOTIMESTAMP_SHIFT 29 //rtl8185
  35262. +
  35263. +#define RCR_ONLYERLPKT ((1<<31))
  35264. +#define RCR_CS_SHIFT 29
  35265. +#define RCR_CS_MASK ((1<<30) | (1<<29))
  35266. +#define RCR_ENMARP ((1<<28))
  35267. +#define RCR_CBSSID ((1<<23))
  35268. +#define RCR_APWRMGT ((1<<22))
  35269. +#define RCR_ADD3 ((1<<21))
  35270. +#define RCR_AMF ((1<<20))
  35271. +#define RCR_ACF ((1<<19))
  35272. +#define RCR_ADF ((1<<18))
  35273. +#define RCR_RXFTH ((1<<15)|(1<<14)|(1<<13))
  35274. +#define RCR_RXFTH2 ((1<<15))
  35275. +#define RCR_RXFTH1 ((1<<14))
  35276. +#define RCR_RXFTH0 ((1<<13))
  35277. +#define RCR_AICV ((1<<12))
  35278. +#define RCR_MXDMA ((1<<10)|(1<< 9)|(1<< 8))
  35279. +#define RCR_MXDMA2 ((1<<10))
  35280. +#define RCR_MXDMA1 ((1<< 9))
  35281. +#define RCR_MXDMA0 ((1<< 8))
  35282. +#define RCR_9356SEL ((1<< 6))
  35283. +#define RCR_ACRC32 ((1<< 5))
  35284. +#define RCR_AB ((1<< 3))
  35285. +#define RCR_AM ((1<< 2))
  35286. +#define RCR_APM ((1<< 1))
  35287. +#define RCR_AAP ((1<< 0))
  35288. +
  35289. +#define CR9346_EEM ((1<<7)|(1<<6))
  35290. +#define CR9346_EEM1 ((1<<7))
  35291. +#define CR9346_EEM0 ((1<<6))
  35292. +#define CR9346_EECS ((1<<3))
  35293. +#define CR9346_EESK ((1<<2))
  35294. +#define CR9346_EED1 ((1<<1))
  35295. +#define CR9346_EED0 ((1<<0))
  35296. +
  35297. +#define CONFIG0_WEP104 ((1<<6))
  35298. +#define CONFIG0_LEDGPO_En ((1<<4))
  35299. +#define CONFIG0_Aux_Status ((1<<3))
  35300. +#define CONFIG0_GL ((1<<1)|(1<<0))
  35301. +#define CONFIG0_GL1 ((1<<1))
  35302. +#define CONFIG0_GL0 ((1<<0))
  35303. +
  35304. +#define CONFIG1_LEDS ((1<<7)|(1<<6))
  35305. +#define CONFIG1_LEDS1 ((1<<7))
  35306. +#define CONFIG1_LEDS0 ((1<<6))
  35307. +#define CONFIG1_LWACT ((1<<4))
  35308. +#define CONFIG1_MEMMAP ((1<<3))
  35309. +#define CONFIG1_IOMAP ((1<<2))
  35310. +#define CONFIG1_VPD ((1<<1))
  35311. +#define CONFIG1_PMEn ((1<<0))
  35312. +
  35313. +#define CONFIG2_LCK ((1<<7))
  35314. +#define CONFIG2_ANT ((1<<6))
  35315. +#define CONFIG2_DPS ((1<<3))
  35316. +#define CONFIG2_PAPE_sign ((1<<2))
  35317. +#define CONFIG2_PAPE_time ((1<<1)|(1<<0))
  35318. +#define CONFIG2_PAPE_time1 ((1<<1))
  35319. +#define CONFIG2_PAPE_time0 ((1<<0))
  35320. +
  35321. +#define CONFIG3_GNTSel ((1<<7))
  35322. +#define CONFIG3_PARM_En ((1<<6))
  35323. +#define CONFIG3_Magic ((1<<5))
  35324. +#define CONFIG3_CardB_En ((1<<3))
  35325. +#define CONFIG3_CLKRUN_En ((1<<2))
  35326. +#define CONFIG3_FuncRegEn ((1<<1))
  35327. +#define CONFIG3_FBtbEn ((1<<0))
  35328. +
  35329. +#define CONFIG4_VCOPDN ((1<<7))
  35330. +#define CONFIG4_PWROFF ((1<<6))
  35331. +#define CONFIG4_PWRMGT ((1<<5))
  35332. +#define CONFIG4_LWPME ((1<<4))
  35333. +#define CONFIG4_LWPTN ((1<<2))
  35334. +#define CONFIG4_RFTYPE ((1<<1)|(1<<0))
  35335. +#define CONFIG4_RFTYPE1 ((1<<1))
  35336. +#define CONFIG4_RFTYPE0 ((1<<0))
  35337. +
  35338. +#define CONFIG5_TX_FIFO_OK ((1<<7))
  35339. +#define CONFIG5_RX_FIFO_OK ((1<<6))
  35340. +#define CONFIG5_CALON ((1<<5))
  35341. +#define CONFIG5_EACPI ((1<<2))
  35342. +#define CONFIG5_LANWake ((1<<1))
  35343. +#define CONFIG5_PME_STS ((1<<0))
  35344. +
  35345. +#define MSR_LINK_MASK ((1<<2)|(1<<3))
  35346. +#define MSR_LINK_MANAGED 2
  35347. +#define MSR_LINK_NONE 0
  35348. +#define MSR_LINK_SHIFT 2
  35349. +#define MSR_LINK_ADHOC 1
  35350. +#define MSR_LINK_MASTER 3
  35351. +#define MSR_LINK_ENEDCA (1<<4)
  35352. +
  35353. +#define PSR_GPO ((1<<7))
  35354. +#define PSR_GPI ((1<<6))
  35355. +#define PSR_LEDGPO1 ((1<<5))
  35356. +#define PSR_LEDGPO0 ((1<<4))
  35357. +#define PSR_UWF ((1<<1))
  35358. +#define PSR_PSEn ((1<<0))
  35359. +
  35360. +#define SCR_KM ((1<<5)|(1<<4))
  35361. +#define SCR_KM1 ((1<<5))
  35362. +#define SCR_KM0 ((1<<4))
  35363. +#define SCR_TXSECON ((1<<1))
  35364. +#define SCR_RXSECON ((1<<0))
  35365. +
  35366. +#define BcnItv_BcnItv (0x01FF)
  35367. +
  35368. +#define AtimWnd_AtimWnd (0x01FF)
  35369. +
  35370. +#define BintrItv_BintrItv (0x01FF)
  35371. +
  35372. +#define AtimtrItv_AtimtrItv (0x01FF)
  35373. +
  35374. +#define PhyDelay_PhyDelay ((1<<2)|(1<<1)|(1<<0))
  35375. +
  35376. +#define TPPoll_BQ ((1<<7))
  35377. +#define TPPoll_HPQ ((1<<6))
  35378. +#define TPPoll_NPQ ((1<<5))
  35379. +#define TPPoll_LPQ ((1<<4))
  35380. +#define TPPoll_SBQ ((1<<3))
  35381. +#define TPPoll_SHPQ ((1<<2))
  35382. +#define TPPoll_SNPQ ((1<<1))
  35383. +#define TPPoll_SLPQ ((1<<0))
  35384. +
  35385. +#define CWR_CW (0x01FF)
  35386. +
  35387. +#define FER_INTR ((1<<15))
  35388. +#define FER_GWAKE ((1<< 4))
  35389. +
  35390. +#define FEMR_INTR ((1<<15))
  35391. +#define FEMR_WKUP ((1<<14))
  35392. +#define FEMR_GWAKE ((1<< 4))
  35393. +
  35394. +#define FPSR_INTR ((1<<15))
  35395. +#define FPSR_GWAKE ((1<< 4))
  35396. +
  35397. +#define FFER_INTR ((1<<15))
  35398. +#define FFER_GWAKE ((1<< 4))
  35399. +
  35400. +
  35401. +//----------------------------------------------------------------------------
  35402. +// 818xB AnaParm & AnaParm2 Register
  35403. +//----------------------------------------------------------------------------
  35404. +/*
  35405. +#ifdef RTL8185B_FPGA
  35406. +#define ANAPARM_FPGA_ON 0xa0000b59
  35407. +//#define ANAPARM_FPGA_OFF
  35408. +#define ANAPARM2_FPGA_ON 0x860dec11
  35409. +//#define ANAPARM2_FPGA_OFF
  35410. +#else //ASIC
  35411. +*/
  35412. +#define ANAPARM_ASIC_ON 0x45090658
  35413. +//#define ANAPARM_ASIC_OFF
  35414. +#define ANAPARM2_ASIC_ON 0x727f3f52
  35415. +//#define ANAPARM2_ASIC_OFF
  35416. +//#endif
  35417. +//by amy for power save
  35418. +#define RF_CHANGE_BY_SW BIT31
  35419. +#define RF_CHANGE_BY_HW BIT30
  35420. +#define RF_CHANGE_BY_PS BIT29
  35421. +#define RF_CHANGE_BY_IPS BIT28
  35422. +#define ANAPARM_ASIC_ON 0x45090658
  35423. +#define ANAPARM2_ASIC_ON 0x727f3f52
  35424. +
  35425. +#define ANAPARM_ON ANAPARM_ASIC_ON
  35426. +#define ANAPARM2_ON ANAPARM2_ASIC_ON
  35427. +#define TFPC 0x5C // Tx FIFO Packet Count for BK, BE, VI, VO queues (2 bytes)
  35428. +#define Config4_PowerOff BIT6 // Turn ON/Off RF Power(RFMD)
  35429. +#define ANAPARM_OFF 0x51480658
  35430. +#define ANAPARM2_OFF 0x72003f70
  35431. +//by amy for power save
  35432. +
  35433. +#define MAX_DOZE_WAITING_TIMES_87B 500
  35434. +
  35435. +#endif
  35436. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_pm.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_pm.c
  35437. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_pm.c 1970-01-01 01:00:00.000000000 +0100
  35438. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_pm.c 2009-08-23 19:01:04.000000000 +0200
  35439. @@ -0,0 +1,99 @@
  35440. +/*
  35441. + Power management interface routines.
  35442. + Written by Mariusz Matuszek.
  35443. + This code is currently just a placeholder for later work and
  35444. + does not do anything useful.
  35445. +
  35446. + This is part of rtl8180 OpenSource driver.
  35447. + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
  35448. + Released under the terms of GPL (General Public Licence)
  35449. +*/
  35450. +
  35451. +#ifdef CONFIG_RTL8180_PM
  35452. +
  35453. +
  35454. +#include "r8180_hw.h"
  35455. +#include "r8180_pm.h"
  35456. +#include "r8187.h"
  35457. +int rtl8180_save_state (struct pci_dev *dev, u32 state)
  35458. +{
  35459. + printk(KERN_NOTICE "r8180 save state call (state %u).\n", state);
  35460. + return(-EAGAIN);
  35461. +}
  35462. +
  35463. +//netif_running is set to 0 before system call rtl8180_close,
  35464. +//netif_running is set to 1 before system call rtl8180_open,
  35465. +//if open success it will not change, or it change to 0;
  35466. +int rtl8187_suspend (struct usb_interface *intf, pm_message_t state)
  35467. +{
  35468. + struct r8180_priv *priv;
  35469. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  35470. + struct net_device *dev = usb_get_intfdata(intf);
  35471. +#else
  35472. + //struct net_device *dev = (struct net_device *)ptr;
  35473. +#endif
  35474. +
  35475. + printk("====>%s \n", __func__);
  35476. + priv=ieee80211_priv(dev);
  35477. +
  35478. + if(dev) {
  35479. +#ifdef POLLING_METHOD_FOR_RADIO
  35480. + del_timer_sync(&priv->gpio_polling_timer);
  35481. + cancel_delayed_work(&priv->ieee80211->GPIOChangeRFWorkItem);
  35482. + priv->polling_timer_on = 0;
  35483. +#endif
  35484. + if (!netif_running(dev)) {
  35485. + //printk(KERN_WARNING "UI or other close dev before suspend, go out suspend function\n");
  35486. + return 0;
  35487. + }
  35488. +
  35489. + dev->netdev_ops->ndo_stop(dev);
  35490. + netif_device_detach(dev);
  35491. + }
  35492. + return 0;
  35493. +}
  35494. +
  35495. +
  35496. +int rtl8187_resume (struct usb_interface *intf)
  35497. +{
  35498. + struct r8180_priv *priv;
  35499. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  35500. + struct net_device *dev = usb_get_intfdata(intf);
  35501. +#else
  35502. + //struct net_device *dev = (struct net_device *)ptr;
  35503. +#endif
  35504. +
  35505. + printk("====>%s \n", __func__);
  35506. + priv=ieee80211_priv(dev);
  35507. +
  35508. + if(dev) {
  35509. +#ifdef POLLING_METHOD_FOR_RADIO
  35510. + if(priv->polling_timer_on == 0){//add for S3/S4
  35511. + gpio_change_polling((unsigned long)dev);
  35512. + }
  35513. +#endif
  35514. + if (!netif_running(dev)){
  35515. + //printk(KERN_WARNING "UI or other close dev before suspend, go out resume function\n");
  35516. + return 0;
  35517. + }
  35518. +
  35519. + netif_device_attach(dev);
  35520. + dev->netdev_ops->ndo_open(dev);
  35521. + }
  35522. +
  35523. + return 0;
  35524. +}
  35525. +
  35526. +
  35527. +int rtl8180_enable_wake (struct pci_dev *dev, u32 state, int enable)
  35528. +{
  35529. +
  35530. + //printk(KERN_NOTICE "r8180 enable wake call (state %u, enable %d).\n",
  35531. + // state, enable);
  35532. + return 0;
  35533. + //return(-EAGAIN);
  35534. +}
  35535. +
  35536. +
  35537. +
  35538. +#endif //CONFIG_RTL8180_PM
  35539. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_pm.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_pm.h
  35540. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_pm.h 1970-01-01 01:00:00.000000000 +0100
  35541. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_pm.h 2009-08-23 19:01:04.000000000 +0200
  35542. @@ -0,0 +1,28 @@
  35543. +/*
  35544. + Power management interface routines.
  35545. + Written by Mariusz Matuszek.
  35546. + This code is currently just a placeholder for later work and
  35547. + does not do anything useful.
  35548. +
  35549. + This is part of rtl8180 OpenSource driver.
  35550. + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
  35551. + Released under the terms of GPL (General Public Licence)
  35552. +
  35553. +*/
  35554. +
  35555. +#ifdef CONFIG_RTL8180_PM
  35556. +
  35557. +#ifndef R8180_PM_H
  35558. +#define R8180_PM_H
  35559. +
  35560. +#include <linux/types.h>
  35561. +#include <linux/usb.h>
  35562. +
  35563. +int rtl8180_save_state (struct pci_dev *dev, u32 state);
  35564. +int rtl8187_suspend (struct usb_interface *intf,pm_message_t state);
  35565. +int rtl8187_resume (struct usb_interface *intf);
  35566. +int rtl8180_enable_wake (struct pci_dev *dev, u32 state, int enable);
  35567. +
  35568. +#endif //R8180_PM_H
  35569. +
  35570. +#endif // CONFIG_RTL8180_PM
  35571. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225.c
  35572. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225.c 1970-01-01 01:00:00.000000000 +0100
  35573. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225.c 2009-08-23 19:01:04.000000000 +0200
  35574. @@ -0,0 +1,1007 @@
  35575. +/*
  35576. + This is part of the rtl8180-sa2400 driver
  35577. + released under the GPL (See file COPYING for details).
  35578. + Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  35579. +
  35580. + This files contains programming code for the rtl8225
  35581. + radio frontend.
  35582. +
  35583. + *Many* thanks to Realtek Corp. for their great support!
  35584. +
  35585. +*/
  35586. +
  35587. +
  35588. +
  35589. +#include "r8180_hw.h"
  35590. +#include "r8180_rtl8225.h"
  35591. +#ifdef ENABLE_DOT11D
  35592. +#include "dot11d.h"
  35593. +#endif
  35594. +
  35595. +#define USE_8051_3WIRE 1
  35596. +
  35597. +u8 rtl8225_threshold[]={
  35598. + 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
  35599. +};
  35600. +
  35601. +u8 rtl8225_gain[]={
  35602. + 0x23,0x88,0x7c,0xa5,// -82dbm
  35603. + 0x23,0x88,0x7c,0xb5,// -82dbm
  35604. + 0x23,0x88,0x7c,0xc5,// -82dbm
  35605. + 0x33,0x80,0x79,0xc5,// -78dbm
  35606. + 0x43,0x78,0x76,0xc5,// -74dbm
  35607. + 0x53,0x60,0x73,0xc5,// -70dbm
  35608. + 0x63,0x58,0x70,0xc5,// -66dbm
  35609. +};
  35610. +
  35611. +u16 rtl8225bcd_rxgain[]={
  35612. + 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
  35613. + 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
  35614. + 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
  35615. + 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
  35616. + 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
  35617. + 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
  35618. + 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
  35619. + 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
  35620. + 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
  35621. + 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
  35622. + 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
  35623. + 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
  35624. +
  35625. +};
  35626. +
  35627. +
  35628. +
  35629. +u8 rtl8225_tx_gain_cck_ofdm[]={
  35630. + 0x02,0x06,0x0e,0x1e,0x3e,0x7e
  35631. +};
  35632. +
  35633. +
  35634. +u8 rtl8225_tx_power_ofdm[]={
  35635. + 0x80,0x90,0xa2,0xb5,0xcb,0xe4
  35636. +};
  35637. +
  35638. +
  35639. +u8 rtl8225_tx_power_cck_ch14[]={
  35640. + 0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00,
  35641. + 0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00,
  35642. + 0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00,
  35643. + 0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00,
  35644. + 0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00,
  35645. + 0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00
  35646. +};
  35647. +
  35648. +
  35649. +u8 rtl8225_tx_power_cck[]={
  35650. + 0x18,0x17,0x15,0x11,0x0c,0x08,0x04,0x02,
  35651. + 0x1b,0x1a,0x17,0x13,0x0e,0x09,0x04,0x02,
  35652. + 0x1f,0x1e,0x1a,0x15,0x10,0x0a,0x05,0x02,
  35653. + 0x22,0x21,0x1d,0x18,0x11,0x0b,0x06,0x02,
  35654. + 0x26,0x25,0x21,0x1b,0x14,0x0d,0x06,0x03,
  35655. + 0x2b,0x2a,0x25,0x1e,0x16,0x0e,0x07,0x03
  35656. +};
  35657. +
  35658. +u8 rtl8225_agc[]={
  35659. + 0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9d,0x9c,0x9b,0x9a,0x99,0x98,0x97,0x96,
  35660. + 0x95,0x94,0x93,0x92,0x91,0x90,0x8f,0x8e,0x8d,0x8c,0x8b,0x8a,0x89,0x88,0x87,0x86,
  35661. + 0x85,0x84,0x83,0x82,0x81,0x80,0x3f,0x3e,0x3d,0x3c,0x3b,0x3a,0x39,0x38,0x37,0x36,
  35662. + 0x35,0x34,0x33,0x32,0x31,0x30,0x2f,0x2e,0x2d,0x2c,0x2b,0x2a,0x29,0x28,0x27,0x26,
  35663. + 0x25,0x24,0x23,0x22,0x21,0x20,0x1f,0x1e,0x1d,0x1c,0x1b,0x1a,0x19,0x18,0x17,0x16,
  35664. + 0x15,0x14,0x13,0x12,0x11,0x10,0x0f,0x0e,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,
  35665. + 0x05,0x04,0x03,0x02,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
  35666. + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
  35667. +};
  35668. +
  35669. +u32 rtl8225_chan[] = {
  35670. + 0, //dummy channel 0
  35671. + 0x085c, //1
  35672. + 0x08dc, //2
  35673. + 0x095c, //3
  35674. + 0x09dc, //4
  35675. + 0x0a5c, //5
  35676. + 0x0adc, //6
  35677. + 0x0b5c, //7
  35678. + 0x0bdc, //8
  35679. + 0x0c5c, //9
  35680. + 0x0cdc, //10
  35681. + 0x0d5c, //11
  35682. + 0x0ddc, //12
  35683. + 0x0e5c, //13
  35684. + //0x0f5c, //14
  35685. + 0x0f72, // 14
  35686. +};
  35687. +
  35688. +void rtl8225_set_gain(struct net_device *dev, short gain)
  35689. +{
  35690. + write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 4]);
  35691. + write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 4 + 2]);
  35692. + write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 4 + 3]);
  35693. + write_phy_ofdm(dev, 0x23, rtl8225_gain[gain * 4 + 1]);
  35694. +
  35695. +}
  35696. +
  35697. +
  35698. +void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
  35699. +{
  35700. +//in windows the delays in this function was del from 85 to 87,
  35701. +//here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008
  35702. +
  35703. +#ifdef USE_8051_3WIRE
  35704. +
  35705. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  35706. + struct usb_device *udev = priv->udev;
  35707. + //u8 bit;
  35708. + //u16 wReg80, wReg82, wReg84;
  35709. + u16 wReg80, wReg84;
  35710. +
  35711. + wReg80 = read_nic_word(dev, RFPinsOutput);
  35712. + wReg80 &= 0xfff3;
  35713. +// wReg82 = read_nic_word(dev, RFPinsEnable);
  35714. + wReg84 = read_nic_word(dev, RFPinsSelect);
  35715. + // <RJ_NOTE> 3-wire should be controled by HW when we finish SW 3-wire programming. 2005.08.10, by rcnjko.
  35716. + //wReg84 &= 0xfff0;
  35717. + wReg84 &= 0xfff8; //modified by david according to windows segment code.
  35718. +
  35719. + // We must set SW enabled before terminating HW 3-wire, 2005.07.29, by rcnjko.
  35720. +// write_nic_word(dev, RFPinsEnable, (wReg82|0x0007)); // Set To Output Enable
  35721. + write_nic_word(dev, RFPinsSelect, (wReg84|0x0007)); // Set To SW Switch
  35722. +// force_pci_posting(dev);
  35723. +// udelay(10); //
  35724. +
  35725. + write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80)); // Set SI_EN (RFLE)
  35726. +// force_pci_posting(dev);
  35727. +// udelay(2);
  35728. + //twreg.struc.enableB = 0;
  35729. + write_nic_word(dev, 0x80, (wReg80)); // Clear SI_EN (RFLE)
  35730. +// force_pci_posting(dev);
  35731. +// udelay(10);
  35732. +
  35733. + usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  35734. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  35735. + adr, 0x8225, &data, 2, HZ / 2);
  35736. +
  35737. + // write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80));
  35738. +// force_pci_posting(dev);
  35739. +// udelay(10);
  35740. +
  35741. + write_nic_word(dev, 0x80, (wReg80|0x0004));
  35742. + write_nic_word(dev, 0x84, (wReg84|0x0000));// Set To SW Switch
  35743. +
  35744. + if(priv->card_type == USB)
  35745. + ;// msleep(2);
  35746. + else
  35747. + ; // rtl8185_rf_pins_enable(dev);
  35748. +
  35749. +#else
  35750. + int i;
  35751. + u16 out,select;
  35752. + u8 bit;
  35753. + u32 bangdata = (data << 4) | (adr & 0xf);
  35754. + struct r8180_priv *priv = ieee80211_priv(dev);
  35755. +
  35756. + out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
  35757. +
  35758. + write_nic_word(dev,RFPinsEnable,
  35759. + (read_nic_word(dev,RFPinsEnable) | 0x7));
  35760. +
  35761. + select = read_nic_word(dev, RFPinsSelect);
  35762. +
  35763. + write_nic_word(dev, RFPinsSelect, select | 0x7 |
  35764. + ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
  35765. +
  35766. +// force_pci_posting(dev);
  35767. +// udelay(10);
  35768. +
  35769. + write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
  35770. +
  35771. +// force_pci_posting(dev);
  35772. +// udelay(2);
  35773. +
  35774. + write_nic_word(dev, RFPinsOutput, out);
  35775. +
  35776. +// force_pci_posting(dev);
  35777. +// udelay(10);
  35778. +
  35779. +
  35780. + for(i=15; i>=0;i--){
  35781. +
  35782. + bit = (bangdata & (1<<i)) >> i;
  35783. +
  35784. + write_nic_word(dev, RFPinsOutput, bit | out);
  35785. +
  35786. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35787. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35788. +
  35789. + i--;
  35790. + bit = (bangdata & (1<<i)) >> i;
  35791. +
  35792. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35793. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35794. +
  35795. + write_nic_word(dev, RFPinsOutput, bit | out);
  35796. +
  35797. + }
  35798. +
  35799. + write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
  35800. +
  35801. +// force_pci_posting(dev);
  35802. +// udelay(10);
  35803. +
  35804. + write_nic_word(dev, RFPinsOutput, out |
  35805. + ((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
  35806. +
  35807. + write_nic_word(dev, RFPinsSelect, select |
  35808. + ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
  35809. +
  35810. + if(priv->card_type == USB)
  35811. + ;// msleep(2);
  35812. + else
  35813. +// rtl8185_rf_pins_enable(dev);
  35814. +#endif
  35815. +}
  35816. +
  35817. +
  35818. +void write_rtl8225_patch(struct net_device *dev, u8 adr, u16 data)
  35819. +{
  35820. +
  35821. + int i;
  35822. + u16 out,select;
  35823. + u8 bit;
  35824. + u32 bangdata = (data << 4) | (adr & 0xf);
  35825. + struct r8180_priv *priv = ieee80211_priv(dev);
  35826. +
  35827. + out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
  35828. +
  35829. + write_nic_word(dev,RFPinsEnable,
  35830. + (read_nic_word(dev,RFPinsEnable) | 0x7));
  35831. +
  35832. + select = read_nic_word(dev, RFPinsSelect);
  35833. +
  35834. + write_nic_word(dev, RFPinsSelect, select | 0x7 |
  35835. + ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
  35836. +
  35837. + force_pci_posting(dev);
  35838. + udelay(10);
  35839. +
  35840. + write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
  35841. +
  35842. + force_pci_posting(dev);
  35843. + udelay(2);
  35844. +
  35845. + write_nic_word(dev, RFPinsOutput, out);
  35846. +
  35847. + force_pci_posting(dev);
  35848. + udelay(10);
  35849. +
  35850. + for(i=15; i>=0;i--){
  35851. +
  35852. + bit = (bangdata & (1<<i)) >> i;
  35853. +
  35854. + write_nic_word(dev, RFPinsOutput, bit | out);
  35855. +
  35856. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35857. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35858. +
  35859. + i--;
  35860. + bit = (bangdata & (1<<i)) >> i;
  35861. +
  35862. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35863. + write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
  35864. +
  35865. + write_nic_word(dev, RFPinsOutput, bit | out);
  35866. +
  35867. + }
  35868. +
  35869. + write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
  35870. +
  35871. + force_pci_posting(dev);
  35872. + udelay(10);
  35873. +
  35874. + write_nic_word(dev, RFPinsOutput, out |
  35875. + ((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
  35876. +
  35877. + write_nic_word(dev, RFPinsSelect, select |
  35878. + ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
  35879. +
  35880. + if(priv->card_type == USB)
  35881. + mdelay(2);
  35882. + else
  35883. + rtl8185_rf_pins_enable(dev);
  35884. +
  35885. +}
  35886. +
  35887. +void rtl8225_rf_close(struct net_device *dev)
  35888. +{
  35889. + write_rtl8225(dev, 0x4, 0x1f);
  35890. +
  35891. + force_pci_posting(dev);
  35892. + mdelay(1);
  35893. +
  35894. + rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
  35895. + rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
  35896. +}
  35897. +
  35898. +#ifdef ENABLE_DOT11D
  35899. +//
  35900. +// Description:
  35901. +// Map dBm into Tx power index according to
  35902. +// current HW model, for example, RF and PA, and
  35903. +// current wireless mode.
  35904. +//
  35905. +s8
  35906. +DbmToTxPwrIdx(
  35907. + struct r8180_priv *priv,
  35908. + WIRELESS_MODE WirelessMode,
  35909. + s32 PowerInDbm
  35910. + )
  35911. +{
  35912. + bool bUseDefault = true;
  35913. + s8 TxPwrIdx = 0;
  35914. +
  35915. +#ifdef CONFIG_RTL818X_S
  35916. + //
  35917. + // 071011, SD3 SY:
  35918. + // OFDM Power in dBm = Index * 0.5 + 0
  35919. + // CCK Power in dBm = Index * 0.25 + 13
  35920. + //
  35921. + if(priv->card_8185 >= VERSION_8187S_B)
  35922. + {
  35923. + s32 tmp = 0;
  35924. +
  35925. + if(WirelessMode == WIRELESS_MODE_G)
  35926. + {
  35927. + bUseDefault = false;
  35928. + tmp = (2 * PowerInDbm);
  35929. +
  35930. + if(tmp < 0)
  35931. + TxPwrIdx = 0;
  35932. + else if(tmp > 40) // 40 means 20 dBm.
  35933. + TxPwrIdx = 40;
  35934. + else
  35935. + TxPwrIdx = (s8)tmp;
  35936. + }
  35937. + else if(WirelessMode == WIRELESS_MODE_B)
  35938. + {
  35939. + bUseDefault = false;
  35940. + tmp = (4 * PowerInDbm) - 52;
  35941. +
  35942. + if(tmp < 0)
  35943. + TxPwrIdx = 0;
  35944. + else if(tmp > 28) // 28 means 20 dBm.
  35945. + TxPwrIdx = 28;
  35946. + else
  35947. + TxPwrIdx = (s8)tmp;
  35948. + }
  35949. + }
  35950. +#endif
  35951. +
  35952. + //
  35953. + // TRUE if we want to use a default implementation.
  35954. + // We shall set it to FALSE when we have exact translation formular
  35955. + // for target IC. 070622, by rcnjko.
  35956. + //
  35957. + if(bUseDefault)
  35958. + {
  35959. + if(PowerInDbm < 0)
  35960. + TxPwrIdx = 0;
  35961. + else if(PowerInDbm > 35)
  35962. + TxPwrIdx = 35;
  35963. + else
  35964. + TxPwrIdx = (u8)PowerInDbm;
  35965. + }
  35966. +
  35967. + return TxPwrIdx;
  35968. +}
  35969. +#endif
  35970. +
  35971. +
  35972. +short rtl8225_rf_set_sens(struct net_device *dev, short sens)
  35973. +{
  35974. + if (sens <0 || sens > 6) return -1;
  35975. +
  35976. + if(sens > 4)
  35977. + write_rtl8225(dev, 0x0c, 0x850);
  35978. + else
  35979. + write_rtl8225(dev, 0x0c, 0x50);
  35980. +
  35981. + sens= 6-sens;
  35982. + rtl8225_set_gain(dev, sens);
  35983. +
  35984. + write_phy_cck(dev, 0x41, rtl8225_threshold[sens]);
  35985. + return 0;
  35986. +
  35987. +}
  35988. +
  35989. +void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
  35990. +{
  35991. + struct r8180_priv *priv = ieee80211_priv(dev);
  35992. +
  35993. + int GainIdx;
  35994. + int GainSetting;
  35995. + int i;
  35996. + u8 power;
  35997. + u8 *cck_power_table;
  35998. + u8 max_cck_power_level;
  35999. + u8 max_ofdm_power_level;
  36000. + u8 min_ofdm_power_level;
  36001. + u8 cck_power_level = 0xff & priv->chtxpwr[ch];
  36002. + u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
  36003. +
  36004. +#ifdef ENABLE_DOT11D
  36005. + if(IS_DOT11D_ENABLE(priv->ieee80211) &&
  36006. + IS_DOT11D_STATE_DONE(priv->ieee80211) )
  36007. + {
  36008. + //PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(priv->ieee80211);
  36009. + u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
  36010. + u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B, MaxTxPwrInDbm);
  36011. + u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G, MaxTxPwrInDbm);
  36012. +
  36013. + //printk("Max Tx Power dBm (%d) => CCK Tx power index : %d, OFDM Tx power index: %d\n", MaxTxPwrInDbm, CckMaxPwrIdx, OfdmMaxPwrIdx);
  36014. +
  36015. + //printk("EEPROM channel(%d) => CCK Tx power index: %d, OFDM Tx power index: %d\n",
  36016. + // ch, cck_power_level, ofdm_power_level);
  36017. +
  36018. + if(cck_power_level > CckMaxPwrIdx)
  36019. + cck_power_level = CckMaxPwrIdx;
  36020. + if(ofdm_power_level > OfdmMaxPwrIdx)
  36021. + ofdm_power_level = OfdmMaxPwrIdx;
  36022. + }
  36023. +
  36024. + //priv->CurrentCckTxPwrIdx = cck_power_level;
  36025. + //priv->CurrentOfdmTxPwrIdx = ofdm_power_level;
  36026. +#endif
  36027. +
  36028. +
  36029. + if(priv->card_type == USB){
  36030. + max_cck_power_level = 11;
  36031. + max_ofdm_power_level = 25; // 12 -> 25
  36032. + min_ofdm_power_level = 10;
  36033. + }else{
  36034. + max_cck_power_level = 35;
  36035. + max_ofdm_power_level = 35;
  36036. + min_ofdm_power_level = 0;
  36037. + }
  36038. + if( priv->TrSwitchState == TR_SW_TX )
  36039. + {
  36040. + printk("SetTxPowerLevel8187(): Origianl OFDM Tx power level %d\n", ofdm_power_level);
  36041. + ofdm_power_level -= GetTxOfdmHighPowerBias(dev);
  36042. + cck_power_level -= GetTxCckHighPowerBias(dev);
  36043. + printk("SetTxPowerLevel8187(): Adjusted OFDM Tx power level %d for we are in High Power state\n",
  36044. + ofdm_power_level);
  36045. + printk("SetTxPowerLevel8187(): Adjusted CCK Tx power level %d for we are in High Power state\n",
  36046. + cck_power_level);
  36047. + }
  36048. +
  36049. +
  36050. +
  36051. + /* CCK power setting */
  36052. + if(cck_power_level > max_cck_power_level)
  36053. + cck_power_level = max_cck_power_level;
  36054. + GainIdx=cck_power_level % 6;
  36055. + GainSetting=cck_power_level / 6;
  36056. +
  36057. + if(ch == 14)
  36058. + cck_power_table = rtl8225_tx_power_cck_ch14;
  36059. + else
  36060. + cck_power_table = rtl8225_tx_power_cck;
  36061. +
  36062. +// if(priv->card_8185 == 1 && priv->card_8185_Bversion ){
  36063. + /*Ver B*/
  36064. +// write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]);
  36065. +// }else{
  36066. + /*Ver C - D */
  36067. + write_nic_byte(dev, CCK_TXAGC, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
  36068. +// }
  36069. +
  36070. + for(i=0;i<8;i++){
  36071. +
  36072. + power = cck_power_table[GainIdx * 8 + i];
  36073. + write_phy_cck(dev, 0x44 + i, power);
  36074. + }
  36075. +
  36076. + /* FIXME Is this delay really needeed ? */
  36077. + force_pci_posting(dev);
  36078. + mdelay(1);
  36079. +
  36080. + /* OFDM power setting */
  36081. +// Old:
  36082. +// if(ofdm_power_level > max_ofdm_power_level)
  36083. +// ofdm_power_level = 35;
  36084. +// ofdm_power_level += min_ofdm_power_level;
  36085. +// Latest:
  36086. + if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
  36087. + ofdm_power_level = max_ofdm_power_level;
  36088. + else
  36089. + ofdm_power_level += min_ofdm_power_level;
  36090. + if(ofdm_power_level > 35)
  36091. + ofdm_power_level = 35;
  36092. +//
  36093. +
  36094. + GainIdx=ofdm_power_level % 6;
  36095. + GainSetting=ofdm_power_level / 6;
  36096. +#if 1
  36097. +// if(priv->card_type == USB){
  36098. + rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
  36099. +
  36100. + write_phy_ofdm(dev,2,0x42);
  36101. + write_phy_ofdm(dev,6,0);
  36102. + write_phy_ofdm(dev,8,0);
  36103. +// }
  36104. +#endif
  36105. +// if(priv->card_8185 == 1 && priv->card_8185_Bversion){
  36106. +// /*Ver B*/
  36107. +// write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]);
  36108. +// }else{
  36109. + /*Ver C - D */
  36110. + write_nic_byte(dev, OFDM_TXAGC, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
  36111. +// }
  36112. +
  36113. +
  36114. + power = rtl8225_tx_power_ofdm[GainIdx];
  36115. +
  36116. + write_phy_ofdm(dev, 0x5, power);
  36117. + write_phy_ofdm(dev, 0x7, power);
  36118. +
  36119. + force_pci_posting(dev);
  36120. + mdelay(1);
  36121. + //write_nic_byte(dev, TX_AGC_CONTROL,4);
  36122. +}
  36123. +
  36124. +void rtl8225_rf_set_chan(struct net_device *dev, short ch)
  36125. +{
  36126. + struct r8180_priv *priv = ieee80211_priv(dev);
  36127. + short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
  36128. + ieee80211_is_54g(priv->ieee80211->current_network)) ||
  36129. + priv->ieee80211->iw_mode == IW_MODE_MONITOR;
  36130. + int eifs_addr;
  36131. +
  36132. + if(NIC_8187 == priv->card_8187) {
  36133. + eifs_addr = EIFS_8187;
  36134. + } else {
  36135. + eifs_addr = EIFS_8187B;
  36136. + }
  36137. +
  36138. +#ifdef ENABLE_DOT11D
  36139. + if(!IsLegalChannel(priv->ieee80211, ch) )
  36140. + {
  36141. + printk("channel(%d). is invalide\n", ch);
  36142. + return;
  36143. + }
  36144. +#endif
  36145. +
  36146. + rtl8225_SetTXPowerLevel(dev, ch);
  36147. +
  36148. + write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
  36149. +
  36150. + force_pci_posting(dev);
  36151. + mdelay(10);
  36152. +
  36153. + write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
  36154. +
  36155. + if(gset)
  36156. + write_nic_byte(dev,DIFS,20); //DIFS: 20
  36157. + else
  36158. + write_nic_byte(dev,DIFS,0x24); //DIFS: 36
  36159. +
  36160. + if(priv->ieee80211->state == IEEE80211_LINKED &&
  36161. + ieee80211_is_shortslot(priv->ieee80211->current_network))
  36162. + write_nic_byte(dev,SLOT,0x9); //SLOT: 9
  36163. +
  36164. + else
  36165. + write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
  36166. +
  36167. +
  36168. + if(gset){
  36169. + write_nic_byte(dev,eifs_addr,91 - 20); // EIFS: 91 (0x5B)
  36170. + write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
  36171. + //DMESG("using G net params");
  36172. + }else{
  36173. + write_nic_byte(dev,eifs_addr,91 - 0x24); // EIFS: 91 (0x5B)
  36174. + write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
  36175. + //DMESG("using B net params");
  36176. + }
  36177. +
  36178. +
  36179. +}
  36180. +
  36181. +void rtl8225_host_pci_init(struct net_device *dev)
  36182. +{
  36183. + write_nic_word(dev, RFPinsOutput, 0x480);
  36184. +
  36185. + rtl8185_rf_pins_enable(dev);
  36186. +
  36187. + //if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
  36188. + //write_nic_word(dev, RFPinsSelect, 0x88);
  36189. + //else
  36190. + write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO); /* 0x488 | SW_CONTROL_GPIO */
  36191. +
  36192. + write_nic_byte(dev, GP_ENABLE, 0);
  36193. +
  36194. + force_pci_posting(dev);
  36195. + mdelay(200);
  36196. +
  36197. + write_nic_word(dev, GP_ENABLE, 0xff & (~(1<<6))); /* bit 6 is for RF on/off detection */
  36198. +
  36199. +
  36200. +}
  36201. +
  36202. +void rtl8225_host_usb_init(struct net_device *dev)
  36203. +{
  36204. + write_nic_byte(dev,RFPinsSelect+1,0);
  36205. +
  36206. + write_nic_byte(dev,GPIO,0);
  36207. +
  36208. + write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
  36209. +
  36210. + write_nic_byte(dev,RFPinsSelect+1,4);
  36211. +
  36212. + write_nic_byte(dev,GPIO,0x20);
  36213. +
  36214. + write_nic_byte(dev,GP_ENABLE,0);
  36215. +
  36216. +
  36217. + /* Config BB & RF */
  36218. + write_nic_word(dev, RFPinsOutput, 0x80);
  36219. +
  36220. + write_nic_word(dev, RFPinsSelect, 0x80);
  36221. +
  36222. + write_nic_word(dev, RFPinsEnable, 0x80);
  36223. +
  36224. +
  36225. + mdelay(100);
  36226. +
  36227. + mdelay(1000);
  36228. +
  36229. +}
  36230. +
  36231. +void rtl8225_rf_init(struct net_device *dev)
  36232. +{
  36233. + struct r8180_priv *priv = ieee80211_priv(dev);
  36234. + int i;
  36235. + short channel = 1;
  36236. + u16 brsr;
  36237. + int brsr_addr;
  36238. +
  36239. + if(NIC_8187 == priv->card_8187) {
  36240. + brsr_addr = BRSR_8187;
  36241. + } else {
  36242. + brsr_addr = BRSR_8187B;
  36243. + }
  36244. +
  36245. +
  36246. + priv->chan = channel;
  36247. +
  36248. + rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  36249. +
  36250. +
  36251. + if(priv->card_type == USB)
  36252. + rtl8225_host_usb_init(dev);
  36253. + else
  36254. + rtl8225_host_pci_init(dev);
  36255. +
  36256. + write_nic_dword(dev, RF_TIMING, 0x000a8008);
  36257. +
  36258. + //brsr = read_nic_word(dev, BRSR);
  36259. + brsr = read_nic_word(dev, brsr_addr);
  36260. +
  36261. + //write_nic_word(dev, BRSR, 0xffff);
  36262. + write_nic_word(dev, brsr_addr, 0xffff);
  36263. +
  36264. + write_nic_dword(dev, RF_PARA, 0x100044);
  36265. +
  36266. + #if 1 //0->1
  36267. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  36268. + write_nic_byte(dev, CONFIG3, 0x44);
  36269. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  36270. + #endif
  36271. +
  36272. + if(priv->card_type == USB){
  36273. + rtl8185_rf_pins_enable(dev);
  36274. +
  36275. + mdelay(1000);
  36276. + }
  36277. +
  36278. + write_rtl8225(dev, 0x0, 0x67); mdelay(1);
  36279. +
  36280. +
  36281. + write_rtl8225(dev, 0x1, 0xfe0); mdelay(1);
  36282. +
  36283. + write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
  36284. +
  36285. + write_rtl8225(dev, 0x3, 0x441); mdelay(1);
  36286. +
  36287. + if(priv->card_type == USB)
  36288. + write_rtl8225(dev, 0x4, 0x486);
  36289. + else
  36290. + write_rtl8225(dev, 0x4, 0x8be);
  36291. +
  36292. + mdelay(1);
  36293. +
  36294. +
  36295. + /* version B & C */
  36296. +
  36297. + if(priv->card_type == USB)
  36298. + write_rtl8225(dev, 0x5, 0xbc0);
  36299. + else if(priv->card_type == MINIPCI)
  36300. + write_rtl8225(dev, 0x5, 0xbc0 + 3 +(6<<3));
  36301. + else
  36302. + write_rtl8225(dev, 0x5, 0xbc0 + (6<<3));
  36303. +
  36304. + mdelay(1);
  36305. +// }
  36306. +
  36307. + write_rtl8225(dev, 0x6, 0xae6); mdelay(1);
  36308. +
  36309. + write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel])); mdelay(1);
  36310. +
  36311. + write_rtl8225(dev, 0x8, 0x1f); mdelay(1);
  36312. +
  36313. + write_rtl8225(dev, 0x9, 0x334); mdelay(1);
  36314. +
  36315. + write_rtl8225(dev, 0xa, 0xfd4); mdelay(1);
  36316. +
  36317. + write_rtl8225(dev, 0xb, 0x391); mdelay(1);
  36318. +
  36319. + write_rtl8225(dev, 0xc, 0x50); mdelay(1);
  36320. +
  36321. +
  36322. + write_rtl8225(dev, 0xd, 0x6db); mdelay(1);
  36323. +
  36324. + write_rtl8225(dev, 0xe, 0x29); mdelay(1);
  36325. +
  36326. + write_rtl8225(dev, 0xf, 0x914);
  36327. +
  36328. + if(priv->card_type == USB){
  36329. + //force_pci_posting(dev);
  36330. + mdelay(100);
  36331. + }
  36332. +
  36333. + write_rtl8225(dev, 0x2, 0xc4d);
  36334. +
  36335. + if(priv->card_type == USB){
  36336. + // force_pci_posting(dev);
  36337. + mdelay(200);
  36338. +
  36339. + write_rtl8225(dev, 0x2, 0x44d);
  36340. +
  36341. + // force_pci_posting(dev);
  36342. + mdelay(100);
  36343. +
  36344. + }//End of if(priv->card_type == USB)
  36345. + /* FIXME!! rtl8187 we have to check if calibrarion
  36346. + * is successful and eventually cal. again (repeat
  36347. + * the two write on reg 2)
  36348. + */
  36349. + force_pci_posting(dev);
  36350. +
  36351. + mdelay(100); //200 for 8187
  36352. +
  36353. + //if(priv->card_type != USB) /* maybe not needed even for 8185 */
  36354. +// write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
  36355. +
  36356. + write_rtl8225(dev, 0x0, 0x127);
  36357. +
  36358. + for(i=0;i<95;i++){
  36359. + write_rtl8225(dev, 0x1, (u8)(i+1));
  36360. +
  36361. + /* version B & C & D*/
  36362. +
  36363. + write_rtl8225(dev, 0x2, rtl8225bcd_rxgain[i]);
  36364. + }
  36365. +
  36366. + write_rtl8225(dev, 0x0, 0x27);
  36367. +
  36368. +
  36369. +// //if(priv->card_type != USB){
  36370. +// write_rtl8225(dev, 0x2, 0x44d);
  36371. +// write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
  36372. +// write_rtl8225(dev, 0x2, 0x47d);
  36373. +//
  36374. +// force_pci_posting(dev);
  36375. +// mdelay(100);
  36376. +//
  36377. +// write_rtl8225(dev, 0x2, 0x44d);
  36378. +// //}
  36379. +
  36380. + write_rtl8225(dev, 0x0, 0x22f);
  36381. +
  36382. + if(priv->card_type != USB)
  36383. + rtl8185_rf_pins_enable(dev);
  36384. +
  36385. + for(i=0;i<128;i++){
  36386. + write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
  36387. +
  36388. + mdelay(1);
  36389. + write_phy_ofdm(dev, 0xa, (u8)i+ 0x80);
  36390. +
  36391. + mdelay(1);
  36392. + }
  36393. +
  36394. + force_pci_posting(dev);
  36395. + mdelay(1);
  36396. +
  36397. + write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
  36398. + write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
  36399. + write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
  36400. + write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
  36401. + write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
  36402. + write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
  36403. + write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
  36404. + write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
  36405. + write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
  36406. + write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
  36407. +
  36408. + /* ver C & D */
  36409. + write_phy_ofdm(dev, 0xa, 0x9); mdelay(1);
  36410. +
  36411. + //write_phy_ofdm(dev, 0x18, 0xef);
  36412. + // }
  36413. + //}
  36414. + write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
  36415. +
  36416. + write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
  36417. +
  36418. +
  36419. + //if(priv->card_type != USB)
  36420. + //write_phy_ofdm(dev, 0xd, 0x33); // <>
  36421. +
  36422. + write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
  36423. +
  36424. + write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
  36425. +/*ver D & 8187*/
  36426. +// }
  36427. +
  36428. +// if(priv->card_8185 == 1 && priv->card_8185_Bversion)
  36429. +// write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
  36430. +// else
  36431. + write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
  36432. +/*ver C & D & 8187*/
  36433. +
  36434. + write_phy_ofdm(dev, 0x11, 0x06);mdelay(1);
  36435. +/*agc resp time 700*/
  36436. +
  36437. +
  36438. +// if(priv->card_8185 == 2){
  36439. + /* Ver D & 8187*/
  36440. + write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
  36441. +
  36442. + write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
  36443. +
  36444. + write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
  36445. + write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
  36446. + write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
  36447. + write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
  36448. +
  36449. +// if (priv->card_type == USB)
  36450. +// write_phy_ofdm(dev, 0x18, 0xef);
  36451. +
  36452. + write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
  36453. +
  36454. +
  36455. + write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
  36456. + write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
  36457. +
  36458. +// if (priv->card_type != USB){
  36459. +// if(priv->card_8185 == 1 && priv->card_8185_Bversion)
  36460. +// write_phy_ofdm(dev, 0x1b, 0x66); /* Ver B */
  36461. +// else
  36462. + write_phy_ofdm(dev, 0x1b, 0x76);mdelay(1);
  36463. + /* Ver C & D */ //FIXME:MAYBE not needed
  36464. +// }
  36465. +
  36466. + write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
  36467. +
  36468. + /*ver D & 8187*/
  36469. + write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
  36470. +
  36471. + write_phy_ofdm(dev, 0x1f, 0x75); mdelay(1);
  36472. +
  36473. +// }
  36474. +
  36475. + write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
  36476. +
  36477. + write_phy_ofdm(dev, 0x21, 0x27);mdelay(1);
  36478. +
  36479. + write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
  36480. +
  36481. +// if(priv->card_type != USB)
  36482. + //write_phy_ofdm(dev, 0x23, 0x43); //FIXME maybe not needed // <>
  36483. +
  36484. + write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
  36485. + write_phy_ofdm(dev, 0x25, 0x20); mdelay(1);
  36486. + write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
  36487. + write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
  36488. +/* Ver C & D & 8187*/
  36489. +
  36490. + // <> Set init. gain to m74dBm.
  36491. +
  36492. + rtl8225_set_gain(dev,4);
  36493. + /*write_phy_ofdm(dev, 0x0d, 0x43); mdelay(1);
  36494. + write_phy_ofdm(dev, 0x1b, 0x76); mdelay(1);
  36495. + write_phy_ofdm(dev, 0x1d, 0xc5); mdelay(1);
  36496. + write_phy_ofdm(dev, 0x23, 0x78); mdelay(1);
  36497. +*/
  36498. + //if(priv->card_type == USB);
  36499. + // rtl8225_set_gain_usb(dev, 1); /* FIXME this '2' is random */
  36500. +
  36501. + write_phy_cck(dev, 0x0, 0x98); mdelay(1);
  36502. + write_phy_cck(dev, 0x3, 0x20); mdelay(1);
  36503. + write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
  36504. + write_phy_cck(dev, 0x5, 0x12); mdelay(1);
  36505. + write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
  36506. + write_phy_cck(dev, 0x7, 0x78);mdelay(1);
  36507. + /* Ver C & D & 8187*/
  36508. +
  36509. + write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
  36510. +
  36511. + write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
  36512. + write_phy_cck(dev, 0x11, 0x88); mdelay(1);
  36513. + write_phy_cck(dev, 0x12, 0x47); mdelay(1);
  36514. + write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
  36515. +
  36516. + write_phy_cck(dev, 0x19, 0x0);
  36517. + write_phy_cck(dev, 0x1a, 0xa0);
  36518. + write_phy_cck(dev, 0x1b, 0x8);
  36519. + write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
  36520. +
  36521. + write_phy_cck(dev, 0x41, 0x8d);mdelay(1);
  36522. +
  36523. +
  36524. + write_phy_cck(dev, 0x42, 0x15); mdelay(1);
  36525. + write_phy_cck(dev, 0x43, 0x18); mdelay(1);
  36526. + write_phy_cck(dev, 0x44, 0x1f); mdelay(1);
  36527. + write_phy_cck(dev, 0x45, 0x1e); mdelay(1);
  36528. + write_phy_cck(dev, 0x46, 0x1a); mdelay(1);
  36529. + write_phy_cck(dev, 0x47, 0x15); mdelay(1);
  36530. + write_phy_cck(dev, 0x48, 0x10); mdelay(1);
  36531. + write_phy_cck(dev, 0x49, 0xa); mdelay(1);
  36532. + write_phy_cck(dev, 0x4a, 0x5); mdelay(1);
  36533. + write_phy_cck(dev, 0x4b, 0x2); mdelay(1);
  36534. + write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
  36535. +
  36536. +
  36537. + write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
  36538. +
  36539. +
  36540. +
  36541. +// <>
  36542. +// // TESTR 0xb 8187
  36543. +// write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
  36544. +//
  36545. +// //if(priv->card_type != USB){
  36546. +// write_phy_ofdm(dev, 0x2, 0x62);
  36547. +// write_phy_ofdm(dev, 0x6, 0x0);
  36548. +// write_phy_ofdm(dev, 0x8, 0x0);
  36549. +// //}
  36550. +
  36551. + rtl8225_SetTXPowerLevel(dev, channel);
  36552. +
  36553. + write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
  36554. + write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
  36555. +
  36556. + rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
  36557. +
  36558. + /* switch to high-speed 3-wire
  36559. + * last digit. 2 for both cck and ofdm
  36560. + */
  36561. + if(priv->card_type == USB)
  36562. + write_nic_dword(dev, 0x94, 0x3dc00002);
  36563. + else{
  36564. + write_nic_dword(dev, 0x94, 0x15c00002);
  36565. + rtl8185_rf_pins_enable(dev);
  36566. + }
  36567. +
  36568. +// if(priv->card_type != USB)
  36569. +// rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
  36570. +// rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
  36571. +//
  36572. +// /* make sure is waken up! */
  36573. +// write_rtl8225(dev,0x4, 0x9ff);
  36574. +// rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  36575. +// rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
  36576. +
  36577. + rtl8225_rf_set_chan(dev, priv->chan);
  36578. +
  36579. + //write_nic_word(dev,BRSR,brsr);
  36580. +
  36581. +}
  36582. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225.h
  36583. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225.h 1970-01-01 01:00:00.000000000 +0100
  36584. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225.h 2009-08-23 19:01:04.000000000 +0200
  36585. @@ -0,0 +1,77 @@
  36586. +/*
  36587. + This is part of the rtl8180-sa2400 driver
  36588. + released under the GPL (See file COPYING for details).
  36589. + Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  36590. +
  36591. + This files contains programming code for the rtl8225
  36592. + radio frontend.
  36593. +
  36594. + *Many* thanks to Realtek Corp. for their great support!
  36595. +
  36596. +*/
  36597. +
  36598. +#ifndef RTL8225H
  36599. +#define RTL8225H
  36600. +
  36601. +#include "r8187.h"
  36602. +
  36603. +#define RTL8225_ANAPARAM_ON 0xa0000a59
  36604. +
  36605. +// FIXME: OFF ANAPARAM MIGHT BE WRONG!
  36606. +#define RTL8225_ANAPARAM_OFF 0xa00beb59
  36607. +#define RTL8225_ANAPARAM2_OFF 0x840dec11
  36608. +
  36609. +#define RTL8225_ANAPARAM2_ON 0x860c7312
  36610. +
  36611. +void rtl8225_rf_init(struct net_device *dev);
  36612. +void rtl8225z2_rf_init(struct net_device *dev);
  36613. +void rtl8225z2_rf_set_chan(struct net_device *dev, short ch);
  36614. +short rtl8225_is_V_z2(struct net_device *dev);
  36615. +void rtl8225_rf_set_chan(struct net_device *dev,short ch);
  36616. +void rtl8225_rf_close(struct net_device *dev);
  36617. +short rtl8225_rf_set_sens(struct net_device *dev, short sens);
  36618. +void rtl8225_host_pci_init(struct net_device *dev);
  36619. +void rtl8225_host_usb_init(struct net_device *dev);
  36620. +void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
  36621. +void rtl8225z2_rf_set_mode(struct net_device *dev) ;
  36622. +void rtl8185_rf_pins_enable(struct net_device *dev);
  36623. +void rtl8180_set_mode(struct net_device *dev,int mode);
  36624. +void UpdateInitialGain(struct net_device *dev);
  36625. +void UpdateCCKThreshold(struct net_device *dev);
  36626. +void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch);
  36627. +void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch);
  36628. +
  36629. +#define RTL8225_RF_MAX_SENS 6
  36630. +#define RTL8225_RF_DEF_SENS 4
  36631. +
  36632. +extern inline char GetTxOfdmHighPowerBias(struct net_device *dev)
  36633. +{
  36634. + //
  36635. + // We should always adjust our Tx Power for 8187 and 8187B.
  36636. + // It was ever recommended not to adjust Tx Power of 8187B with Atheros AP
  36637. + // for throughput by David, but now we found it is not the issue to impact
  36638. + // the Atheros's problem and also no adjustion for Tx Power will cause "low"
  36639. + // throughput. By Bruce, 2007-07-03.
  36640. + //
  36641. + return 10;
  36642. +}
  36643. +
  36644. +//
  36645. +// Description:
  36646. +// Return Tx power level to minus if we are in high power state.
  36647. +//
  36648. +// Note:
  36649. +// Adjust it according to RF if required.
  36650. +//
  36651. +extern inline char GetTxCckHighPowerBias(struct net_device *dev)
  36652. +{
  36653. + return 7;
  36654. +}
  36655. +
  36656. +
  36657. +
  36658. +extern u8 rtl8225_agc[];
  36659. +
  36660. +extern u32 rtl8225_chan[];
  36661. +
  36662. +#endif
  36663. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225z2.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225z2.c
  36664. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_rtl8225z2.c 1970-01-01 01:00:00.000000000 +0100
  36665. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_rtl8225z2.c 2009-08-23 19:01:04.000000000 +0200
  36666. @@ -0,0 +1,2090 @@
  36667. +/*
  36668. + This is part of the rtl8180-sa2400 driver
  36669. + released under the GPL (See file COPYING for details).
  36670. + Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  36671. +
  36672. + This files contains programming code for the rtl8225
  36673. + radio frontend.
  36674. +
  36675. + *Many* thanks to Realtek Corp. for their great support!
  36676. +
  36677. +*/
  36678. +
  36679. +
  36680. +
  36681. +#include "r8180_hw.h"
  36682. +#include "r8180_rtl8225.h"
  36683. +#ifdef ENABLE_DOT11D
  36684. +#include "dot11d.h"
  36685. +#endif
  36686. +
  36687. +//2005.11.16
  36688. +u8 rtl8225z2_threshold[]={
  36689. + 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
  36690. +};
  36691. +
  36692. +// 0xd 0x19 0x1b 0x21
  36693. +u8 rtl8225z2_gain_bg[]={
  36694. + 0x23, 0x15, 0xa5, // -82-1dbm
  36695. + 0x23, 0x15, 0xb5, // -82-2dbm
  36696. + 0x23, 0x15, 0xc5, // -82-3dbm
  36697. + 0x33, 0x15, 0xc5, // -78dbm
  36698. + 0x43, 0x15, 0xc5, // -74dbm
  36699. + 0x53, 0x15, 0xc5, // -70dbm
  36700. + 0x63, 0x15, 0xc5, // -66dbm
  36701. +};
  36702. +
  36703. +u8 rtl8225z2_gain_a[]={
  36704. + 0x13,0x27,0x5a,//,0x37,// -82dbm
  36705. + 0x23,0x23,0x58,//,0x37,// -82dbm
  36706. + 0x33,0x1f,0x56,//,0x37,// -82dbm
  36707. + 0x43,0x1b,0x54,//,0x37,// -78dbm
  36708. + 0x53,0x17,0x51,//,0x37,// -74dbm
  36709. + 0x63,0x24,0x4f,//,0x37,// -70dbm
  36710. + 0x73,0x0f,0x4c,//,0x37,// -66dbm
  36711. +};
  36712. +static u32 MAC_REG_TABLE[][3]={
  36713. + {0xf0, 0x32, 0000}, {0xf1, 0x32, 0000}, {0xf2, 0x00, 0000}, {0xf3, 0x00, 0000},
  36714. + {0xf4, 0x32, 0000}, {0xf5, 0x43, 0000}, {0xf6, 0x00, 0000}, {0xf7, 0x00, 0000},
  36715. + {0xf8, 0x46, 0000}, {0xf9, 0xa4, 0000}, {0xfa, 0x00, 0000}, {0xfb, 0x00, 0000},
  36716. + {0xfc, 0x96, 0000}, {0xfd, 0xa4, 0000}, {0xfe, 0x00, 0000}, {0xff, 0x00, 0000},
  36717. +
  36718. + {0x58, 0x4b, 0001}, {0x59, 0x00, 0001}, {0x5a, 0x4b, 0001}, {0x5b, 0x00, 0001},
  36719. + {0x60, 0x4b, 0001}, {0x61, 0x09, 0001}, {0x62, 0x4b, 0001}, {0x63, 0x09, 0001},
  36720. + {0xce, 0x0f, 0001}, {0xcf, 0x00, 0001}, {0xe0, 0xff, 0001}, {0xe1, 0x0f, 0001},
  36721. + {0xe2, 0x00, 0001}, {0xf0, 0x4e, 0001}, {0xf1, 0x01, 0001}, {0xf2, 0x02, 0001},
  36722. + {0xf3, 0x03, 0001}, {0xf4, 0x04, 0001}, {0xf5, 0x05, 0001}, {0xf6, 0x06, 0001},
  36723. + {0xf7, 0x07, 0001}, {0xf8, 0x08, 0001},
  36724. +
  36725. + {0x4e, 0x00, 0002}, {0x0c, 0x04, 0002}, {0x21, 0x61, 0002}, {0x22, 0x68, 0002},
  36726. + {0x23, 0x6f, 0002}, {0x24, 0x76, 0002}, {0x25, 0x7d, 0002}, {0x26, 0x84, 0002},
  36727. + {0x27, 0x8d, 0002}, {0x4d, 0x08, 0002}, {0x50, 0x05, 0002}, {0x51, 0xf5, 0002},
  36728. + {0x52, 0x04, 0002}, {0x53, 0xa0, 0002}, {0x54, 0x1f, 0002}, {0x55, 0x23, 0002},
  36729. + {0x56, 0x45, 0002}, {0x57, 0x67, 0002}, {0x58, 0x08, 0002}, {0x59, 0x08, 0002},
  36730. + {0x5a, 0x08, 0002}, {0x5b, 0x08, 0002}, {0x60, 0x08, 0002}, {0x61, 0x08, 0002},
  36731. + {0x62, 0x08, 0002}, {0x63, 0x08, 0002}, {0x64, 0xcf, 0002}, {0x72, 0x56, 0002},
  36732. + {0x73, 0x9a, 0002},
  36733. +
  36734. + {0x34, 0xf0, 0000}, {0x35, 0x0f, 0000}, {0x5b, 0x40, 0000}, {0x84, 0x88, 0000},
  36735. + {0x85, 0x24, 0000}, {0x88, 0x54, 0000}, {0x8b, 0xb8, 0000}, {0x8c, 0x07, 0000},
  36736. + {0x8d, 0x00, 0000}, {0x94, 0x1b, 0000}, {0x95, 0x12, 0000}, {0x96, 0x00, 0000},
  36737. + {0x97, 0x06, 0000}, {0x9d, 0x1a, 0000}, {0x9f, 0x10, 0000}, {0xb4, 0x22, 0000},
  36738. + {0xbe, 0x80, 0000}, {0xdb, 0x00, 0000}, {0xee, 0x00, 0000}, {0x91, 0x01, 0000},
  36739. + //lzm mode 0x91 form 0x03->0x01 open GPIO BIT1,
  36740. + //because Polling methord will rurn off Radio
  36741. + //the first time when read GPI(0x92).
  36742. + //because after 0x91:bit1 form 1->0, there will
  36743. + //be time for 0x92:bit1 form 0->1
  36744. +
  36745. + {0x4c, 0x00, 0002}, {0x9f, 0x00, 0003}, {0x8c, 0x01, 0000}, {0x8d, 0x10, 0000},
  36746. + {0x8e, 0x08, 0000}, {0x8f, 0x00, 0000}
  36747. +};
  36748. +
  36749. +static u8 ZEBRA_AGC[]={
  36750. + 0,
  36751. + 0x5e,0x5e,0x5e,0x5e,0x5d,0x5b,0x59,0x57,0x55,0x53,0x51,0x4f,0x4d,0x4b,0x49,0x47,
  36752. + 0x45,0x43,0x41,0x3f,0x3d,0x3b,0x39,0x37,0x35,0x33,0x31,0x2f,0x2d,0x2b,0x29,0x27,
  36753. + 0x25,0x23,0x21,0x1f,0x1d,0x1b,0x19,0x17,0x15,0x13,0x11,0x0f,0x0d,0x0b,0x09,0x07,
  36754. + 0x05,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
  36755. + 0x19,0x19,0x19,0x019,0x19,0x19,0x19,0x19,0x19,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
  36756. + 0x26,0x27,0x27,0x28,0x28,0x29,0x2a,0x2a,0x2a,0x2b,0x2b,0x2b,0x2c,0x2c,0x2c,0x2d,
  36757. + 0x2d,0x2d,0x2d,0x2e,0x2e,0x2e,0x2e,0x2f,0x2f,0x2f,0x30,0x30,0x31,0x31,0x31,0x31,
  36758. + 0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31
  36759. +};
  36760. +
  36761. +static u32 ZEBRA_RF_RX_GAIN_TABLE[]={
  36762. + 0,
  36763. + 0x0400,0x0401,0x0402,0x0403,0x0404,0x0405,0x0408,0x0409,
  36764. + 0x040a,0x040b,0x0502,0x0503,0x0504,0x0505,0x0540,0x0541,
  36765. + 0x0542,0x0543,0x0544,0x0545,0x0580,0x0581,0x0582,0x0583,
  36766. + 0x0584,0x0585,0x0588,0x0589,0x058a,0x058b,0x0643,0x0644,
  36767. + 0x0645,0x0680,0x0681,0x0682,0x0683,0x0684,0x0685,0x0688,
  36768. + 0x0689,0x068a,0x068b,0x068c,0x0742,0x0743,0x0744,0x0745,
  36769. + 0x0780,0x0781,0x0782,0x0783,0x0784,0x0785,0x0788,0x0789,
  36770. + 0x078a,0x078b,0x078c,0x078d,0x0790,0x0791,0x0792,0x0793,
  36771. + 0x0794,0x0795,0x0798,0x0799,0x079a,0x079b,0x079c,0x079d,
  36772. + 0x07a0,0x07a1,0x07a2,0x07a3,0x07a4,0x07a5,0x07a8,0x07a9,
  36773. + 0x03aa,0x03ab,0x03ac,0x03ad,0x03b0,0x03b1,0x03b2,0x03b3,
  36774. + 0x03b4,0x03b5,0x03b8,0x03b9,0x03ba,0x03bb,0x03bb
  36775. +};
  36776. +
  36777. +// Use the new SD3 given param, by shien chang, 2006.07.14
  36778. +
  36779. +static u8 OFDM_CONFIG[]={
  36780. + // 0x00
  36781. + 0x10, 0x0d, 0x01, 0x00, 0x14, 0xfb, 0xfb, 0x60,
  36782. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x5c, 0x00, 0x00,
  36783. +
  36784. + // 0x10
  36785. + 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xa8, 0x26,
  36786. + 0x32, 0x33, 0x07, 0xa5, 0x6f, 0x55, 0xc8, 0xb3,
  36787. +
  36788. + // 0x20
  36789. + 0x0a, 0xe1, 0x2C, 0x8a, 0x86, 0x83, 0x34, 0x0f,
  36790. + 0x4f, 0x24, 0x6f, 0xc2, 0x6b, 0x40, 0x80, 0x00,
  36791. +
  36792. + // 0x30
  36793. + 0xc0, 0xc1, 0x58, 0xf1, 0x00, 0xe4, 0x90, 0x3e,
  36794. + 0x6d, 0x3c, 0xfb, 0x07//0xc7
  36795. + };
  36796. +
  36797. +//2005.11.16,
  36798. +u8 ZEBRA2_CCK_OFDM_GAIN_SETTING[]={
  36799. + 0x00,0x01,0x02,0x03,0x04,0x05,
  36800. + 0x06,0x07,0x08,0x09,0x0a,0x0b,
  36801. + 0x0c,0x0d,0x0e,0x0f,0x10,0x11,
  36802. + 0x12,0x13,0x14,0x15,0x16,0x17,
  36803. + 0x18,0x19,0x1a,0x1b,0x1c,0x1d,
  36804. + 0x1e,0x1f,0x20,0x21,0x22,0x23,
  36805. +};
  36806. +//-
  36807. +u16 rtl8225z2_rxgain[]={
  36808. + 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
  36809. + 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
  36810. + 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
  36811. + 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
  36812. + 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
  36813. + 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
  36814. + 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
  36815. + 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
  36816. + 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
  36817. + 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
  36818. + 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
  36819. + 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
  36820. +
  36821. +};
  36822. +
  36823. +
  36824. +/*
  36825. + from 0 to 0x23
  36826. +u8 rtl8225_tx_gain_cck_ofdm[]={
  36827. + 0x02,0x06,0x0e,0x1e,0x3e,0x7e
  36828. +};
  36829. +*/
  36830. +
  36831. +//-
  36832. +u8 rtl8225z2_tx_power_ofdm[]={
  36833. + 0x42,0x00,0x40,0x00,0x40
  36834. +};
  36835. +
  36836. +
  36837. +//-
  36838. +u8 rtl8225z2_tx_power_cck_ch14[]={
  36839. + 0x36,0x35,0x2e,0x1b,0x00,0x00,0x00,0x00,
  36840. + 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
  36841. + 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
  36842. + 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
  36843. +};
  36844. +
  36845. +
  36846. +//-
  36847. +u8 rtl8225z2_tx_power_cck[]={
  36848. + 0x36,0x35,0x2e,0x25,0x1c,0x12,0x09,0x04,
  36849. + 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
  36850. + 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
  36851. + 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
  36852. +};
  36853. +
  36854. +#ifdef ENABLE_DOT11D
  36855. +//
  36856. +// Description:
  36857. +// Map dBm into Tx power index according to
  36858. +// current HW model, for example, RF and PA, and
  36859. +// current wireless mode.
  36860. +//
  36861. +s8
  36862. +rtl8187B_DbmToTxPwrIdx(
  36863. + struct r8180_priv *priv,
  36864. + WIRELESS_MODE WirelessMode,
  36865. + s32 PowerInDbm
  36866. + )
  36867. +{
  36868. + bool bUseDefault = true;
  36869. + s8 TxPwrIdx = 0;
  36870. +
  36871. +#ifdef CONFIG_RTL818X_S
  36872. + //
  36873. + // 071011, SD3 SY:
  36874. + // OFDM Power in dBm = Index * 0.5 + 0
  36875. + // CCK Power in dBm = Index * 0.25 + 13
  36876. + //
  36877. + if(priv->card_8185 >= VERSION_8187S_B)
  36878. + {
  36879. + s32 tmp = 0;
  36880. +
  36881. + if(WirelessMode == WIRELESS_MODE_G)
  36882. + {
  36883. + bUseDefault = false;
  36884. + tmp = (2 * PowerInDbm);
  36885. +
  36886. + if(tmp < 0)
  36887. + TxPwrIdx = 0;
  36888. + else if(tmp > 40) // 40 means 20 dBm.
  36889. + TxPwrIdx = 40;
  36890. + else
  36891. + TxPwrIdx = (s8)tmp;
  36892. + }
  36893. + else if(WirelessMode == WIRELESS_MODE_B)
  36894. + {
  36895. + bUseDefault = false;
  36896. + tmp = (4 * PowerInDbm) - 52;
  36897. +
  36898. + if(tmp < 0)
  36899. + TxPwrIdx = 0;
  36900. + else if(tmp > 28) // 28 means 20 dBm.
  36901. + TxPwrIdx = 28;
  36902. + else
  36903. + TxPwrIdx = (s8)tmp;
  36904. + }
  36905. + }
  36906. +#endif
  36907. +
  36908. + //
  36909. + // TRUE if we want to use a default implementation.
  36910. + // We shall set it to FALSE when we have exact translation formular
  36911. + // for target IC. 070622, by rcnjko.
  36912. + //
  36913. + if(bUseDefault)
  36914. + {
  36915. + if(PowerInDbm < 0)
  36916. + TxPwrIdx = 0;
  36917. + else if(PowerInDbm > 35)
  36918. + TxPwrIdx = 35;
  36919. + else
  36920. + TxPwrIdx = (u8)PowerInDbm;
  36921. + }
  36922. +
  36923. + return TxPwrIdx;
  36924. +}
  36925. +#endif
  36926. +
  36927. +
  36928. +void rtl8225z2_set_gain(struct net_device *dev, short gain)
  36929. +{
  36930. + u8* rtl8225_gain;
  36931. + struct r8180_priv *priv = ieee80211_priv(dev);
  36932. +
  36933. + u8 mode = priv->ieee80211->mode;
  36934. +
  36935. + if(mode == IEEE_B || mode == IEEE_G)
  36936. + rtl8225_gain = rtl8225z2_gain_bg;
  36937. + else
  36938. + rtl8225_gain = rtl8225z2_gain_a;
  36939. +
  36940. + //write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 3]);
  36941. + //write_phy_ofdm(dev, 0x19, rtl8225_gain[gain * 3 + 1]);
  36942. + //write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 2]);
  36943. + //2005.11.17, by ch-hsu
  36944. + write_phy_ofdm(dev, 0x0b, rtl8225_gain[gain * 3]);
  36945. + write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 1]);
  36946. + write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 3 + 2]);
  36947. + write_phy_ofdm(dev, 0x21, 0x37);
  36948. +
  36949. +}
  36950. +
  36951. +u32 read_rtl8225(struct net_device *dev, u8 adr)
  36952. +{
  36953. + u32 data2Write = ((u32)(adr & 0x1f)) << 27;
  36954. + u32 dataRead;
  36955. + u32 mask;
  36956. + u16 oval,oval2,oval3,tmp;
  36957. +// ThreeWireReg twreg;
  36958. +// ThreeWireReg tdata;
  36959. + int i;
  36960. + short bit, rw;
  36961. +
  36962. + u8 wLength = 6;
  36963. + u8 rLength = 12;
  36964. + u8 low2high = 0;
  36965. +
  36966. + oval = read_nic_word(dev, RFPinsOutput);
  36967. + oval2 = read_nic_word(dev, RFPinsEnable);
  36968. + oval3 = read_nic_word(dev, RFPinsSelect);
  36969. + write_nic_word(dev, RFPinsEnable, (oval2|0xf));
  36970. + write_nic_word(dev, RFPinsSelect, (oval3|0xf));
  36971. +
  36972. + dataRead = 0;
  36973. +
  36974. + oval &= ~0xf;
  36975. +
  36976. + write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN ); udelay(4);
  36977. +
  36978. + write_nic_word(dev, RFPinsOutput, oval ); udelay(5);
  36979. +
  36980. + rw = 0;
  36981. +
  36982. + mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
  36983. + for(i = 0; i < wLength/2; i++)
  36984. + {
  36985. + bit = ((data2Write&mask) != 0) ? 1 : 0;
  36986. + write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(1);
  36987. +
  36988. + write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
  36989. + write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
  36990. +
  36991. + mask = (low2high) ? (mask<<1): (mask>>1);
  36992. +
  36993. + if(i == 2)
  36994. + {
  36995. + rw = BB_HOST_BANG_RW;
  36996. + write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
  36997. + write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(2);
  36998. + break;
  36999. + }
  37000. +
  37001. + bit = ((data2Write&mask) != 0) ? 1: 0;
  37002. +
  37003. + write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
  37004. + write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
  37005. +
  37006. + write_nic_word(dev, RFPinsOutput, oval| bit |rw); udelay(1);
  37007. +
  37008. + mask = (low2high) ? (mask<<1) : (mask>>1);
  37009. + }
  37010. +
  37011. + //twreg.struc.clk = 0;
  37012. + //twreg.struc.data = 0;
  37013. + write_nic_word(dev, RFPinsOutput, rw|oval); udelay(2);
  37014. + mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
  37015. +
  37016. + // We must set data pin to HW controled, otherwise RF can't driver it and
  37017. + // value RF register won't be able to read back properly. 2006.06.13, by rcnjko.
  37018. + write_nic_word(dev, RFPinsEnable,((oval2|0xe) & (~0x01)));
  37019. +
  37020. + for(i = 0; i < rLength; i++)
  37021. + {
  37022. + write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
  37023. +
  37024. + write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
  37025. + write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
  37026. + write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
  37027. + tmp = read_nic_word(dev, RFPinsInput);
  37028. +
  37029. + dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
  37030. +
  37031. + write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
  37032. +
  37033. + mask = (low2high) ? (mask<<1) : (mask>>1);
  37034. + }
  37035. +
  37036. + write_nic_word(dev, RFPinsOutput, BB_HOST_BANG_EN|BB_HOST_BANG_RW|oval); udelay(2);
  37037. +
  37038. + write_nic_word(dev, RFPinsEnable, oval2);
  37039. + write_nic_word(dev, RFPinsSelect, oval3); // Set To SW Switch
  37040. + write_nic_word(dev, RFPinsOutput, 0x3a0);
  37041. +
  37042. + return dataRead;
  37043. +
  37044. +}
  37045. +short rtl8225_is_V_z2(struct net_device *dev)
  37046. +{
  37047. + short vz2 = 1;
  37048. + //set VCO-PDN pin
  37049. +// printk("%s()\n", __FUNCTION__);
  37050. + write_nic_word(dev, RFPinsOutput, 0x0080);
  37051. + write_nic_word(dev, RFPinsSelect, 0x0080);
  37052. + write_nic_word(dev, RFPinsEnable, 0x0080);
  37053. +
  37054. + //lzm mod for up take too long time 20081201
  37055. + //mdelay(100);
  37056. + //mdelay(1000);
  37057. +
  37058. + /* sw to reg pg 1 */
  37059. + write_rtl8225(dev, 0, 0x1b7);
  37060. + /* reg 8 pg 1 = 23*/
  37061. + if( read_rtl8225(dev, 8) != 0x588)
  37062. + vz2 = 0;
  37063. +
  37064. + else /* reg 9 pg 1 = 24 */
  37065. + if( read_rtl8225(dev, 9) != 0x700)
  37066. + vz2 = 0;
  37067. +
  37068. + /* sw back to pg 0 */
  37069. + write_rtl8225(dev, 0, 0xb7);
  37070. +
  37071. + return vz2;
  37072. +
  37073. +}
  37074. +
  37075. +void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
  37076. +{
  37077. + struct r8180_priv *priv = ieee80211_priv(dev);
  37078. +
  37079. +// int GainIdx;
  37080. +// int GainSetting;
  37081. + int i;
  37082. + u8 power;
  37083. + u8 *cck_power_table;
  37084. + u8 max_cck_power_level;
  37085. + u8 min_cck_power_level;
  37086. + u8 max_ofdm_power_level;
  37087. + u8 min_ofdm_power_level;
  37088. + s8 cck_power_level = 0xff & priv->chtxpwr[ch];
  37089. + s8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
  37090. + u8 hw_version = priv->card_8187_Bversion;
  37091. +
  37092. +#ifdef ENABLE_DOT11D
  37093. + if(IS_DOT11D_ENABLE(priv->ieee80211) &&
  37094. + IS_DOT11D_STATE_DONE(priv->ieee80211) )
  37095. + {
  37096. + //PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(priv->ieee80211);
  37097. + u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
  37098. + u8 CckMaxPwrIdx = rtl8187B_DbmToTxPwrIdx(priv, WIRELESS_MODE_B, MaxTxPwrInDbm);
  37099. + u8 OfdmMaxPwrIdx = rtl8187B_DbmToTxPwrIdx(priv, WIRELESS_MODE_G, MaxTxPwrInDbm);
  37100. +
  37101. + //printk("Max Tx Power dBm (%d) => CCK Tx power index : %d, OFDM Tx power index: %d\n", MaxTxPwrInDbm, CckMaxPwrIdx, OfdmMaxPwrIdx);
  37102. +
  37103. + //printk("EEPROM channel(%d) => CCK Tx power index: %d, OFDM Tx power index: %d\n",
  37104. + // ch, cck_power_level, ofdm_power_level);
  37105. +
  37106. + if(cck_power_level > CckMaxPwrIdx)
  37107. + cck_power_level = CckMaxPwrIdx;
  37108. + if(ofdm_power_level > OfdmMaxPwrIdx)
  37109. + ofdm_power_level = OfdmMaxPwrIdx;
  37110. + }
  37111. +
  37112. + //priv->CurrentCckTxPwrIdx = cck_power_level;
  37113. + //priv->CurrentOfdmTxPwrIdx = ofdm_power_level;
  37114. +#endif
  37115. +
  37116. + if (NIC_8187B == priv->card_8187)
  37117. + {
  37118. + if (hw_version == VERSION_8187B_B)
  37119. + {
  37120. + min_cck_power_level = 0;
  37121. + max_cck_power_level = 15;
  37122. + min_ofdm_power_level = 2;
  37123. + max_ofdm_power_level = 17;
  37124. + }else
  37125. + {
  37126. + min_cck_power_level = 7;
  37127. + max_cck_power_level = 22;
  37128. + min_ofdm_power_level = 10;
  37129. + max_ofdm_power_level = 25;
  37130. + }
  37131. +
  37132. + if( priv->TrSwitchState == TR_SW_TX )
  37133. + {
  37134. + //printk("SetTxPowerLevel8187(): Origianl OFDM Tx power level %d, adjust value = %d\n", ofdm_power_level,GetTxOfdmHighPowerBias(dev));
  37135. + ofdm_power_level -= GetTxOfdmHighPowerBias(dev);
  37136. + cck_power_level -= GetTxCckHighPowerBias(dev);
  37137. + //printk("SetTxPowerLevel8187(): Adjusted OFDM Tx power level %d for we are in High Power state\n",
  37138. + // ofdm_power_level);
  37139. + //printk("SetTxPowerLevel8187(): Adjusted CCK Tx power level %d for we are in High Power state\n",
  37140. + // cck_power_level);
  37141. + }
  37142. + /* CCK power setting */
  37143. + if(cck_power_level > (max_cck_power_level -min_cck_power_level))
  37144. + cck_power_level = max_cck_power_level;
  37145. + else
  37146. + cck_power_level += min_cck_power_level;
  37147. + cck_power_level += priv->cck_txpwr_base;
  37148. +
  37149. + if(cck_power_level > 35)
  37150. + cck_power_level = 35;
  37151. + if(cck_power_level < 0)
  37152. + cck_power_level = 0;
  37153. +
  37154. + if(ch == 14)
  37155. + cck_power_table = rtl8225z2_tx_power_cck_ch14;
  37156. + else
  37157. + cck_power_table = rtl8225z2_tx_power_cck;
  37158. + if (hw_version == VERSION_8187B_B)
  37159. + {
  37160. + if (cck_power_level <= 6){
  37161. + }
  37162. + else if (cck_power_level <=11){
  37163. + cck_power_table += 8;
  37164. + }
  37165. + else{
  37166. + cck_power_table += (8*2);
  37167. + }
  37168. + }else{
  37169. + if (cck_power_level<=5){
  37170. + }else if(cck_power_level<=11){
  37171. + cck_power_table += 8;
  37172. + }else if(cck_power_level <= 17){
  37173. + cck_power_table += 8*2;
  37174. + }else{
  37175. + cck_power_table += 8*3;
  37176. + }
  37177. + }
  37178. +
  37179. +
  37180. +
  37181. + for(i=0;i<8;i++){
  37182. +
  37183. + power = cck_power_table[i];
  37184. + write_phy_cck(dev, 0x44 + i, power);
  37185. + }
  37186. +
  37187. + //write_nic_byte(dev, TX_GAIN_CCK, power);
  37188. + //2005.11.17,
  37189. + write_nic_byte(dev, CCK_TXAGC, (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]*2));
  37190. +
  37191. +// force_pci_posting(dev);
  37192. +// msleep(1);
  37193. +//in windows the delay was del from 85 to 87,
  37194. +//here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008
  37195. +
  37196. + /* OFDM power setting */
  37197. + // Old:
  37198. + // if(ofdm_power_level > max_ofdm_power_level)
  37199. + // ofdm_power_level = 35;
  37200. + // ofdm_power_level += min_ofdm_power_level;
  37201. + // Latest:
  37202. + if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
  37203. + ofdm_power_level = max_ofdm_power_level;
  37204. + else
  37205. + ofdm_power_level += min_ofdm_power_level;
  37206. +
  37207. + ofdm_power_level += priv->ofdm_txpwr_base;
  37208. +
  37209. + if(ofdm_power_level > 35)
  37210. + ofdm_power_level = 35;
  37211. +
  37212. + if(ofdm_power_level < 0)
  37213. + ofdm_power_level = 0;
  37214. + write_nic_byte(dev, OFDM_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[ofdm_power_level]*2);
  37215. +
  37216. + if (hw_version == VERSION_8187B_B)
  37217. + {
  37218. + if(ofdm_power_level<=11){
  37219. + write_phy_ofdm(dev, 0x87, 0x60);
  37220. + write_phy_ofdm(dev, 0x89, 0x60);
  37221. + }
  37222. + else{
  37223. + write_phy_ofdm(dev, 0x87, 0x5c);
  37224. + write_phy_ofdm(dev, 0x89, 0x5c);
  37225. + }
  37226. + }else{
  37227. + if(ofdm_power_level<=11){
  37228. + write_phy_ofdm(dev, 0x87, 0x5c);
  37229. + write_phy_ofdm(dev, 0x89, 0x5c);
  37230. + }
  37231. + if(ofdm_power_level<=17){
  37232. + write_phy_ofdm(dev, 0x87, 0x54);
  37233. + write_phy_ofdm(dev, 0x89, 0x54);
  37234. + }
  37235. + else{
  37236. + write_phy_ofdm(dev, 0x87, 0x50);
  37237. + write_phy_ofdm(dev, 0x89, 0x50);
  37238. + }
  37239. + }
  37240. +// force_pci_posting(dev);
  37241. +// msleep(1);
  37242. +//in windows the delay was del from 85 to 87,
  37243. +//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008
  37244. + }else if(NIC_8187 == priv->card_8187) {
  37245. + min_cck_power_level = 0;
  37246. + max_cck_power_level = 15;
  37247. + min_ofdm_power_level = 10;
  37248. + max_ofdm_power_level = 25;
  37249. + if(cck_power_level > (max_cck_power_level -min_cck_power_level))
  37250. + cck_power_level = max_cck_power_level;
  37251. + else
  37252. + cck_power_level += min_cck_power_level;
  37253. + cck_power_level += priv->cck_txpwr_base;
  37254. +
  37255. + if(cck_power_level > 35)
  37256. + cck_power_level = 35;
  37257. +
  37258. + if(ch == 14)
  37259. + cck_power_table = rtl8225z2_tx_power_cck_ch14;
  37260. + else
  37261. + cck_power_table = rtl8225z2_tx_power_cck;
  37262. + for(i=0;i<8;i++){
  37263. + power = cck_power_table[i];
  37264. + write_phy_cck(dev, 0x44 + i, power);
  37265. + }
  37266. +
  37267. + //write_nic_byte(dev, TX_GAIN_CCK, power);
  37268. + //2005.11.17,
  37269. + write_nic_byte(dev, CCK_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]);
  37270. +
  37271. +// force_pci_posting(dev);
  37272. +// msleep(1);
  37273. +//in windows the delay was del from 85 to 87,
  37274. +//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008
  37275. + if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
  37276. + ofdm_power_level = max_ofdm_power_level;
  37277. + else
  37278. + ofdm_power_level += min_ofdm_power_level;
  37279. +
  37280. + ofdm_power_level += priv->ofdm_txpwr_base;
  37281. +
  37282. + if(ofdm_power_level > 35)
  37283. + ofdm_power_level = 35;
  37284. + write_nic_byte(dev, OFDM_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[ofdm_power_level]);
  37285. +
  37286. + rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
  37287. +
  37288. + write_phy_ofdm(dev,2,0x42);
  37289. + write_phy_ofdm(dev,5,0);
  37290. + write_phy_ofdm(dev,6,0x40);
  37291. + write_phy_ofdm(dev,7,0);
  37292. + write_phy_ofdm(dev,8,0x40);
  37293. + }
  37294. +
  37295. +}
  37296. +
  37297. +void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)
  37298. +{
  37299. + struct r8180_priv *priv = ieee80211_priv(dev);
  37300. + short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
  37301. + ieee80211_is_54g(priv->ieee80211->current_network)) ||
  37302. + priv->ieee80211->iw_mode == IW_MODE_MONITOR;
  37303. + int eifs_addr;
  37304. +
  37305. + down(&priv->set_chan_sem);
  37306. +
  37307. + if(NIC_8187 == priv->card_8187) {
  37308. + eifs_addr = EIFS_8187;
  37309. + } else {
  37310. + eifs_addr = EIFS_8187B;
  37311. + }
  37312. +
  37313. +#ifdef ENABLE_DOT11D
  37314. + if(!IsLegalChannel(priv->ieee80211, ch) )
  37315. + {
  37316. + printk("channel(%d). is invalide\n", ch);
  37317. + up(&priv->set_chan_sem);
  37318. + return;
  37319. + }
  37320. +#endif
  37321. + //87B not do it FIXME
  37322. + rtl8225z2_SetTXPowerLevel(dev, ch);
  37323. +
  37324. + //write_nic_byte(dev,0x7,(u8)rtl8225_chan[ch]);
  37325. + write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
  37326. +
  37327. + force_pci_posting(dev);
  37328. + //mdelay(10);
  37329. +//in windows the delay was del from 85 to 87,
  37330. +//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008
  37331. + if(NIC_8187 == priv->card_8187){
  37332. + write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
  37333. +
  37334. + if(gset)
  37335. + write_nic_byte(dev,DIFS,20); //DIFS: 20
  37336. + else
  37337. + write_nic_byte(dev,DIFS,0x24); //DIFS: 36
  37338. +
  37339. + if(priv->ieee80211->state == IEEE80211_LINKED &&
  37340. + ieee80211_is_shortslot(priv->ieee80211->current_network))
  37341. + write_nic_byte(dev,SLOT,0x9); //SLOT: 9
  37342. +
  37343. + else
  37344. + write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
  37345. +
  37346. +
  37347. + if(gset){
  37348. + write_nic_byte(dev,eifs_addr,91 - 20); // EIFS: 91 (0x5B)
  37349. + write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
  37350. + //DMESG("using G net params");
  37351. + }else{
  37352. + write_nic_byte(dev,eifs_addr,91 - 0x24); // EIFS: 91 (0x5B)
  37353. + write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
  37354. + //DMESG("using B net params");
  37355. + }
  37356. + }
  37357. +
  37358. + else {
  37359. +#ifdef THOMAS_TURBO
  37360. + if(priv->ieee80211->current_network.Turbo_Enable && priv->ieee80211->iw_mode == IW_MODE_INFRA){
  37361. + write_nic_word(dev,AC_VO_PARAM,0x5114);
  37362. + write_nic_word(dev,AC_VI_PARAM,0x5114);
  37363. + write_nic_word(dev,AC_BE_PARAM,0x5114);
  37364. + write_nic_word(dev,AC_BK_PARAM,0x5114);
  37365. + } else {
  37366. + write_nic_word(dev,AC_VO_PARAM,0x731c);
  37367. + write_nic_word(dev,AC_VI_PARAM,0x731c);
  37368. + write_nic_word(dev,AC_BE_PARAM,0x731c);
  37369. + write_nic_word(dev,AC_BK_PARAM,0x731c);
  37370. + }
  37371. +#endif
  37372. + }
  37373. +
  37374. + up(&priv->set_chan_sem);
  37375. +}
  37376. +void
  37377. +MacConfig_87BASIC_HardCode(struct net_device *dev)
  37378. +{
  37379. + //============================================================================
  37380. + // MACREG.TXT
  37381. + //============================================================================
  37382. + int nLinesRead = 0;
  37383. + u32 u4bRegOffset, u4bRegValue, u4bPageIndex;
  37384. + int i;
  37385. +
  37386. + nLinesRead=(sizeof(MAC_REG_TABLE)/3)/4;
  37387. +
  37388. + for(i = 0; i < nLinesRead; i++)
  37389. + {
  37390. + u4bRegOffset=MAC_REG_TABLE[i][0];
  37391. + u4bRegValue=MAC_REG_TABLE[i][1];
  37392. + u4bPageIndex=MAC_REG_TABLE[i][2];
  37393. +
  37394. + u4bRegOffset|= (u4bPageIndex << 8);
  37395. +
  37396. + write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue);
  37397. + }
  37398. + //============================================================================
  37399. +}
  37400. +
  37401. +static void MacConfig_87BASIC(struct net_device *dev)
  37402. +{
  37403. + MacConfig_87BASIC_HardCode(dev);
  37404. +
  37405. + //============================================================================
  37406. +
  37407. + // Follow TID_AC_MAP of WMac.
  37408. + //PlatformEFIOWrite2Byte(dev, TID_AC_MAP, 0xfa50);
  37409. + write_nic_word(dev, TID_AC_MAP, 0xfa50);
  37410. +
  37411. + // Interrupt Migration, Jong suggested we use set 0x0000 first, 2005.12.14, by rcnjko.
  37412. + write_nic_word(dev, INT_MIG, 0x0000);
  37413. +
  37414. + // Prevent TPC to cause CRC error. Added by Annie, 2006-06-10.
  37415. + write_nic_dword(dev, 0x1F0, 0x00000000);
  37416. + write_nic_dword(dev, 0x1F4, 0x00000000);
  37417. + write_nic_byte(dev, 0x1F8, 0x00);
  37418. +
  37419. + // For WiFi 5.2.2.5 Atheros AP performance. Added by Annie, 2006-06-12.
  37420. + // PlatformIOWrite4Byte(dev, RFTiming, 0x0008e00f);
  37421. + // Asked for by SD3 CM Lin, 2006.06.27, by rcnjko.
  37422. + write_nic_dword(dev, RFTiming, 0x00004001);
  37423. +
  37424. +#ifdef TODO
  37425. + // Asked for by Victor, for 87B B-cut Rx FIFO overflow bug, 2006.06.27, by rcnjko.
  37426. + if(dev->NdisUsbDev.CardInfo.USBIsHigh == FALSE)
  37427. + {
  37428. + PlatformEFIOWrite1Byte(dev, 0x24E, 0x01);
  37429. + }
  37430. +#endif
  37431. +}
  37432. +
  37433. +
  37434. +//
  37435. +// Description:
  37436. +// Initialize RFE and read Zebra2 version code.
  37437. +//
  37438. +// 2005-08-01, by Annie.
  37439. +//
  37440. +void
  37441. +SetupRFEInitialTiming(struct net_device* dev)
  37442. +{
  37443. + //u32 data8, data9;
  37444. + struct r8180_priv *priv = ieee80211_priv(dev);
  37445. +
  37446. + // setup initial timing for RFE
  37447. + // Set VCO-PDN pin.
  37448. + write_nic_word(dev, RFPinsOutput, 0x0480);
  37449. + write_nic_word(dev, RFPinsSelect, 0x2488);
  37450. + write_nic_word(dev, RFPinsEnable, 0x1FFF);
  37451. +
  37452. + mdelay(100);
  37453. + // Steven recommends: delay 1 sec for setting RF 1.8V. by Annie, 2005-04-28.
  37454. + mdelay(1000);
  37455. +
  37456. + //
  37457. + // TODO: Read Zebra version code if necessary.
  37458. + //
  37459. + priv->rf_chip = RF_ZEBRA2;
  37460. +}
  37461. +
  37462. +
  37463. +void ZEBRA_Config_87BASIC_HardCode(struct net_device* dev)
  37464. +{
  37465. + u32 i;
  37466. + u32 addr,data;
  37467. + u32 u4bRegOffset, u4bRegValue;
  37468. +
  37469. +
  37470. + //=============================================================================
  37471. + // RADIOCFG.TXT
  37472. + //=============================================================================
  37473. + write_rtl8225(dev, 0x00, 0x00b7); mdelay(1);
  37474. + write_rtl8225(dev, 0x01, 0x0ee0); mdelay(1);
  37475. + write_rtl8225(dev, 0x02, 0x044d); mdelay(1);
  37476. + write_rtl8225(dev, 0x03, 0x0441); mdelay(1);
  37477. + write_rtl8225(dev, 0x04, 0x08c3); mdelay(1);
  37478. + write_rtl8225(dev, 0x05, 0x0c72); mdelay(1);
  37479. + write_rtl8225(dev, 0x06, 0x00e6); mdelay(1);
  37480. + write_rtl8225(dev, 0x07, 0x082a); mdelay(1);
  37481. + write_rtl8225(dev, 0x08, 0x003f); mdelay(1);
  37482. + write_rtl8225(dev, 0x09, 0x0335); mdelay(1);
  37483. + write_rtl8225(dev, 0x0a, 0x09d4); mdelay(1);
  37484. + write_rtl8225(dev, 0x0b, 0x07bb); mdelay(1);
  37485. + write_rtl8225(dev, 0x0c, 0x0850); mdelay(1);
  37486. + write_rtl8225(dev, 0x0d, 0x0cdf); mdelay(1);
  37487. + write_rtl8225(dev, 0x0e, 0x002b); mdelay(1);
  37488. + write_rtl8225(dev, 0x0f, 0x0114); mdelay(1);
  37489. +
  37490. + write_rtl8225(dev, 0x00, 0x01b7); mdelay(1);
  37491. +
  37492. +
  37493. + for(i=1;i<=95;i++)
  37494. + {
  37495. + write_rtl8225(dev, 0x01, i);mdelay(1);
  37496. + write_rtl8225(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
  37497. + //DbgPrint("RF - 0x%x = 0x%x\n", i, ZEBRA_RF_RX_GAIN_TABLE[i]);
  37498. + }
  37499. +
  37500. + write_rtl8225(dev, 0x03, 0x0080); mdelay(1); // write reg 18
  37501. + write_rtl8225(dev, 0x05, 0x0004); mdelay(1); // write reg 20
  37502. + write_rtl8225(dev, 0x00, 0x00b7); mdelay(1); // switch to reg0-reg15
  37503. + //lzm mod for up take too long time 20081201
  37504. +#ifdef THOMAS_BEACON
  37505. + msleep(1000);// Deay 1 sec. //0xfd
  37506. + //msleep(1000);// Deay 1 sec. //0xfd
  37507. + //msleep(1000);// Deay 1 sec. //0xfd
  37508. + msleep(400);// Deay 1 sec. //0xfd
  37509. +#else
  37510. +
  37511. + mdelay(1000);
  37512. + //mdelay(1000);
  37513. + //mdelay(1000);
  37514. + mdelay(400);
  37515. +#endif
  37516. + write_rtl8225(dev, 0x02, 0x0c4d); mdelay(1);
  37517. + //lzm mod for up take too long time 20081201
  37518. + //mdelay(1000);
  37519. + //mdelay(1000);
  37520. + msleep(100);// Deay 100 ms. //0xfe
  37521. + msleep(100);// Deay 100 ms. //0xfe
  37522. + write_rtl8225(dev, 0x02, 0x044d); mdelay(1);
  37523. + write_rtl8225(dev, 0x00, 0x02bf); mdelay(1); //0x002f disable 6us corner change, 06f--> enable
  37524. +
  37525. + //=============================================================================
  37526. +
  37527. + //=============================================================================
  37528. + // CCKCONF.TXT
  37529. + //=============================================================================
  37530. + /*
  37531. + u4bRegOffset=0x41;
  37532. + u4bRegValue=0xc8;
  37533. +
  37534. + //DbgPrint("\nCCK- 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue);
  37535. + WriteBB(dev, (0x01000080 | (u4bRegOffset & 0x7f) | ((u4bRegValue & 0xff) << 8)));
  37536. + */
  37537. +
  37538. +
  37539. + //=============================================================================
  37540. +
  37541. + //=============================================================================
  37542. + // Follow WMAC RTL8225_Config()
  37543. + //=============================================================================
  37544. +// //
  37545. +// // enable EEM0 and EEM1 in 9346CR
  37546. +// PlatformEFIOWrite1Byte(dev, CR9346, PlatformEFIORead1Byte(dev, CR9346)|0xc0);
  37547. +// // enable PARM_En in Config3
  37548. +// PlatformEFIOWrite1Byte(dev, CONFIG3, PlatformEFIORead1Byte(dev, CONFIG3)|0x40);
  37549. +//
  37550. +// PlatformEFIOWrite4Byte(dev, AnaParm2, ANAPARM2_ASIC_ON); //0x727f3f52
  37551. +// PlatformEFIOWrite4Byte(dev, AnaParm, ANAPARM_ASIC_ON); //0x45090658
  37552. +
  37553. + // power control
  37554. + write_nic_byte(dev, CCK_TXAGC, 0x03);
  37555. + write_nic_byte(dev, OFDM_TXAGC, 0x07);
  37556. + write_nic_byte(dev, ANTSEL, 0x03);
  37557. +
  37558. +// // disable PARM_En in Config3
  37559. +// PlatformEFIOWrite1Byte(dev, CONFIG3, PlatformEFIORead1Byte(dev, CONFIG3)&0xbf);
  37560. +// // disable EEM0 and EEM1 in 9346CR
  37561. +// PlatformEFIOWrite1Byte(dev, CR9346, PlatformEFIORead1Byte(dev, CR9346)&0x3f);
  37562. + //=============================================================================
  37563. +
  37564. + //=============================================================================
  37565. + // AGC.txt
  37566. + //=============================================================================
  37567. + //write_nic_dword( dev, PhyAddr, 0x00001280); // Annie, 2006-05-05
  37568. + //write_phy_ofdm( dev, 0x00, 0x12); // David, 2006-08-01
  37569. + write_phy_ofdm( dev, 0x80, 0x12); // David, 2006-08-09
  37570. +
  37571. + for (i=0; i<128; i++)
  37572. + {
  37573. + //DbgPrint("AGC - [%x+1] = 0x%x\n", i, ZEBRA_AGC[i+1]);
  37574. +
  37575. + data = ZEBRA_AGC[i+1];
  37576. + data = data << 8;
  37577. + data = data | 0x0000008F;
  37578. +
  37579. + addr = i + 0x80; //enable writing AGC table
  37580. + addr = addr << 8;
  37581. + addr = addr | 0x0000008E;
  37582. +
  37583. + write_phy_ofdm(dev,data&0x7f,(data>>8)&0xff);
  37584. + write_phy_ofdm(dev,addr&0x7f,(addr>>8)&0xff);
  37585. + write_phy_ofdm(dev,0x0E,0x00);
  37586. + }
  37587. +
  37588. + //write_nic_dword(dev, PhyAddr, 0x00001080); // Annie, 2006-05-05
  37589. + //write_phy_ofdm( dev, 0x00, 0x10); // David, 2006-08-01
  37590. + write_phy_ofdm( dev, 0x80, 0x10); // David, 2006-08-09
  37591. +
  37592. + //=============================================================================
  37593. +
  37594. + //=============================================================================
  37595. + // OFDMCONF.TXT
  37596. + //=============================================================================
  37597. +
  37598. + for(i=0; i<60; i++)
  37599. + {
  37600. + u4bRegOffset=i;
  37601. + u4bRegValue=OFDM_CONFIG[i];
  37602. + //u4bRegValue=OFDM_CONFIG3m82[i];
  37603. +
  37604. + // write_nic_dword(dev,PhyAddr,(0x00000080 | (u4bRegOffset & 0x7f) | ((u4bRegValue & 0xff) << 8)));
  37605. + write_phy_ofdm(dev,i,u4bRegValue);
  37606. + }
  37607. +
  37608. +
  37609. + //=============================================================================
  37610. +}
  37611. +
  37612. +void ZEBRA_Config_87BASIC(struct net_device *dev)
  37613. +{
  37614. + ZEBRA_Config_87BASIC_HardCode(dev);
  37615. +}
  37616. +//by amy for DIG
  37617. +//
  37618. +// Description:
  37619. +// Update initial gain into PHY.
  37620. +//
  37621. +void
  37622. +UpdateCCKThreshold(
  37623. + struct net_device *dev
  37624. + )
  37625. +{
  37626. + struct r8180_priv *priv = ieee80211_priv(dev);
  37627. + // Update CCK Power Detection(0x41) value.
  37628. + switch(priv->StageCCKTh)
  37629. + {
  37630. + case 0:
  37631. +// printk("Update CCK Stage 0: 88 \n");
  37632. + write_phy_cck(dev, 0xc1, 0x88);mdelay(1);
  37633. + break;
  37634. +
  37635. + case 1:
  37636. +// printk("Update CCK Stage 1: 98 \n");
  37637. + write_phy_cck(dev, 0xc1, 0x98);mdelay(1);
  37638. + break;
  37639. +
  37640. + case 2:
  37641. +// printk("Update CCK Stage 2: C8 \n");
  37642. + write_phy_cck(dev, 0xc1, 0xC8);mdelay(1);
  37643. + break;
  37644. +
  37645. + case 3:
  37646. +// printk("Update CCK Stage 3: D8 \n");
  37647. + write_phy_cck(dev, 0xc1, 0xD8);mdelay(1);
  37648. + break;
  37649. +
  37650. + default:
  37651. +// printk("Update CCK Stage %d ERROR!\n", pHalData->StageCCKTh);
  37652. + break;
  37653. + }
  37654. +}
  37655. +//
  37656. +// Description:
  37657. +// Update initial gain into PHY.
  37658. +//
  37659. +void
  37660. +UpdateInitialGain(
  37661. + struct net_device *dev
  37662. + )
  37663. +{
  37664. + struct r8180_priv *priv = ieee80211_priv(dev);
  37665. + //u8 u1Tmp=0;
  37666. +
  37667. + //printk("UpdateInitialGain(): InitialGain: %d RFChipID: %d\n", priv->InitialGain, priv->rf_chip);
  37668. +
  37669. + switch(priv->rf_chip)
  37670. + {
  37671. + case RF_ZEBRA:
  37672. + case RF_ZEBRA2:
  37673. +
  37674. + //
  37675. + // Note:
  37676. + // Whenever we update this gain table, we should be careful about those who call it.
  37677. + // Functions which call UpdateInitialGain as follows are important:
  37678. + // (1)StaRateAdaptive87B
  37679. + // (2)DIG_Zebra
  37680. + // (3)ActSetWirelessMode8187 (when the wireless mode is "B" mode, we set the
  37681. + // OFDM[0x17] = 0x26 to improve the Rx sensitivity).
  37682. + // By Bruce, 2007-06-01.
  37683. + //
  37684. +
  37685. + //
  37686. + // SD3 C.M. Lin Initial Gain Table, by Bruce, 2007-06-01.
  37687. + //
  37688. + switch(priv->InitialGain)
  37689. + {
  37690. + case 1: //m861dBm
  37691. + DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm ");
  37692. + write_phy_ofdm(dev, 0x97, 0x26); mdelay(1);
  37693. + write_phy_ofdm(dev, 0xa4, 0x86); mdelay(1);
  37694. + write_phy_ofdm(dev, 0x85, 0xfa); mdelay(1);
  37695. + break;
  37696. +
  37697. + case 2: //m862dBm
  37698. + DMESG("RTL8187 + 8225 Initial Gain State 2: -78 dBm ");
  37699. + write_phy_ofdm(dev, 0x97, 0x36); mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
  37700. + write_phy_ofdm(dev, 0xa4, 0x86); mdelay(1);
  37701. + write_phy_ofdm(dev, 0x85, 0xfa); mdelay(1);
  37702. + break;
  37703. +
  37704. + case 3: //m863dBm
  37705. + DMESG("RTL8187 + 8225 Initial Gain State 3: -78 dBm ");
  37706. + write_phy_ofdm(dev, 0x97, 0x36); mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
  37707. + write_phy_ofdm(dev, 0xa4, 0x86); mdelay(1);
  37708. + write_phy_ofdm(dev, 0x85, 0xfb); mdelay(1);
  37709. + break;
  37710. +
  37711. + case 4: //m864dBm
  37712. + DMESG("RTL8187 + 8225 Initial Gain State 4: -74 dBm ");
  37713. + write_phy_ofdm(dev, 0x97, 0x46); mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
  37714. + write_phy_ofdm(dev, 0xa4, 0x86); mdelay(1);
  37715. + write_phy_ofdm(dev, 0x85, 0xfb); mdelay(1);
  37716. + break;
  37717. +
  37718. + case 5: //m82dBm
  37719. + DMESG("RTL8187 + 8225 Initial Gain State 5: -74 dBm ");
  37720. + write_phy_ofdm(dev, 0x97, 0x46); mdelay(1);
  37721. + write_phy_ofdm(dev, 0xa4, 0x96); mdelay(1);
  37722. + write_phy_ofdm(dev, 0x85, 0xfb); mdelay(1);
  37723. + break;
  37724. +
  37725. + case 6: //m78dBm
  37726. + DMESG("RTL8187 + 8225 Initial Gain State 6: -70 dBm ");
  37727. + write_phy_ofdm(dev, 0x97, 0x56); mdelay(1);
  37728. + write_phy_ofdm(dev, 0xa4, 0x96); mdelay(1);
  37729. + write_phy_ofdm(dev, 0x85, 0xfc); mdelay(1);
  37730. + break;
  37731. +
  37732. + case 7: //m74dBm
  37733. + DMESG("RTL8187 + 8225 Initial Gain State 7: -70 dBm ");
  37734. + write_phy_ofdm(dev, 0x97, 0x56); mdelay(1);
  37735. + write_phy_ofdm(dev, 0xa4, 0xa6); mdelay(1);
  37736. + write_phy_ofdm(dev, 0x85, 0xfc); mdelay(1);
  37737. + break;
  37738. +
  37739. + // By Bruce, 2007-03-29.
  37740. + case 8:
  37741. + write_phy_ofdm(dev, 0x97, 0x66); mdelay(1);
  37742. + write_phy_ofdm(dev, 0xa4, 0xb6); mdelay(1);
  37743. + write_phy_ofdm(dev, 0x85, 0xfc); mdelay(1);
  37744. + break;
  37745. +
  37746. + default: //MP
  37747. + DMESG("RTL8187 + 8225 Initial Gain State: -82 dBm (default), InitialGain(%d)", priv->InitialGain);
  37748. + write_phy_ofdm(dev, 0x97, 0x26); mdelay(1);
  37749. + write_phy_ofdm(dev, 0xa4, 0x86); mdelay(1);
  37750. + write_phy_ofdm(dev, 0x85, 0xfa); mdelay(1);
  37751. + break;
  37752. + }
  37753. + break;
  37754. +
  37755. + default:
  37756. + break;
  37757. + }
  37758. +}
  37759. +//by amy for DIG
  37760. +void PhyConfig8187(struct net_device *dev)
  37761. +{
  37762. + struct r8180_priv *priv = ieee80211_priv(dev);
  37763. + u8 btConfig4;
  37764. +
  37765. + btConfig4 = read_nic_byte(dev, CONFIG4);
  37766. + priv->RFProgType = (btConfig4 & 0x03);
  37767. +
  37768. +
  37769. +
  37770. + switch(priv->rf_chip)
  37771. + {
  37772. + case RF_ZEBRA2:
  37773. + ZEBRA_Config_87BASIC(dev);
  37774. + break;
  37775. + }
  37776. + if(priv->bDigMechanism)
  37777. + {
  37778. + if(priv->InitialGain == 0)
  37779. + priv->InitialGain = 4;
  37780. + DMESG("DIG is enabled, set default initial gain index to %d", priv->InitialGain);
  37781. + }
  37782. +
  37783. + // By Bruce, 2007-03-29.
  37784. + UpdateCCKThreshold(dev);
  37785. + // Update initial gain after PhyConfig comleted, asked for by SD3 CMLin.
  37786. + UpdateInitialGain(dev);
  37787. + return ;
  37788. +}
  37789. +
  37790. +u8 GetSupportedWirelessMode8187(struct net_device* dev)
  37791. +{
  37792. + u8 btSupportedWirelessMode;
  37793. + struct r8180_priv *priv = ieee80211_priv(dev);
  37794. +
  37795. + btSupportedWirelessMode = 0;
  37796. +
  37797. + switch(priv->rf_chip)
  37798. + {
  37799. + case RF_ZEBRA:
  37800. + case RF_ZEBRA2:
  37801. + btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
  37802. + break;
  37803. + default:
  37804. + btSupportedWirelessMode = WIRELESS_MODE_B;
  37805. + break;
  37806. + }
  37807. + return btSupportedWirelessMode;
  37808. +}
  37809. +
  37810. +void ActUpdateChannelAccessSetting(struct net_device *dev,
  37811. + int WirelessMode,
  37812. + PCHANNEL_ACCESS_SETTING ChnlAccessSetting)
  37813. +{
  37814. + AC_CODING eACI;
  37815. + AC_PARAM AcParam;
  37816. +#ifdef TODO
  37817. + PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
  37818. +#endif
  37819. + //bool bFollowLegacySetting = false;
  37820. +
  37821. +
  37822. + switch( WirelessMode )
  37823. + {
  37824. + case WIRELESS_MODE_A:
  37825. + ChnlAccessSetting->SIFS_Timer = 0x22;
  37826. + ChnlAccessSetting->DIFS_Timer = 34; // 34 = 16 + 2*9. 2006.06.07, by rcnjko.
  37827. + ChnlAccessSetting->SlotTimeTimer = 9;
  37828. + ChnlAccessSetting->EIFS_Timer = 23;
  37829. + ChnlAccessSetting->CWminIndex = 4;
  37830. + ChnlAccessSetting->CWmaxIndex = 10;
  37831. + break;
  37832. +
  37833. + case WIRELESS_MODE_B:
  37834. + ChnlAccessSetting->SIFS_Timer = 0x22;
  37835. + ChnlAccessSetting->DIFS_Timer = 50; // 50 = 10 + 2*20. 2006.06.07, by rcnjko.
  37836. + ChnlAccessSetting->SlotTimeTimer = 20;
  37837. + ChnlAccessSetting->EIFS_Timer = 91;
  37838. + ChnlAccessSetting->CWminIndex = 5;
  37839. + ChnlAccessSetting->CWmaxIndex = 10;
  37840. + break;
  37841. +
  37842. + case WIRELESS_MODE_G:
  37843. + //
  37844. + // <RJ_TODO_8185B>
  37845. + // TODO: We still don't know how to set up these registers, just follow WMAC to
  37846. + // verify 8185B FPAG.
  37847. + //
  37848. + // <RJ_TODO_8185B>
  37849. + // Jong said CWmin/CWmax register are not functional in 8185B,
  37850. + // so we shall fill channel access realted register into AC parameter registers,
  37851. + // even in nQBss.
  37852. + //
  37853. + ChnlAccessSetting->SIFS_Timer = 0x22; // Suggested by Jong, 2005.12.08.
  37854. + ChnlAccessSetting->SlotTimeTimer = 9; // 2006.06.07, by rcnjko.
  37855. + ChnlAccessSetting->DIFS_Timer = 28; // 28 = 10 + 2*9. 2006.06.07, by rcnjko.
  37856. + ChnlAccessSetting->EIFS_Timer = 0x5B; // Suggested by wcchu, it is the default value of EIFS register, 2005.12.08.
  37857. +#ifdef TODO
  37858. + switch (Adapter->NdisUsbDev.CWinMaxMin)
  37859. +#else
  37860. + switch (2)
  37861. +#endif
  37862. + {
  37863. + case 0:// 0: [max:7 min:1 ]
  37864. + ChnlAccessSetting->CWminIndex = 1;
  37865. + ChnlAccessSetting->CWmaxIndex = 7;
  37866. + break;
  37867. + case 1:// 1: [max:7 min:2 ]
  37868. + ChnlAccessSetting->CWminIndex = 2;
  37869. + ChnlAccessSetting->CWmaxIndex = 7;
  37870. + break;
  37871. + case 2:// 2: [max:7 min:3 ]
  37872. + ChnlAccessSetting->CWminIndex = 3;
  37873. + ChnlAccessSetting->CWmaxIndex = 7;
  37874. + break;
  37875. + case 3:// 3: [max:9 min:1 ]
  37876. + ChnlAccessSetting->CWminIndex = 1;
  37877. + ChnlAccessSetting->CWmaxIndex = 9;
  37878. + break;
  37879. + case 4:// 4: [max:9 min:2 ]
  37880. + ChnlAccessSetting->CWminIndex = 2;
  37881. + ChnlAccessSetting->CWmaxIndex = 9;
  37882. + break;
  37883. + case 5:// 5: [max:9 min:3 ]
  37884. + ChnlAccessSetting->CWminIndex = 3;
  37885. + ChnlAccessSetting->CWmaxIndex = 9;
  37886. + break;
  37887. + case 6:// 6: [max:A min:5 ]
  37888. + ChnlAccessSetting->CWminIndex = 5;
  37889. + ChnlAccessSetting->CWmaxIndex = 10;
  37890. + break;
  37891. + case 7:// 7: [max:A min:4 ]
  37892. + ChnlAccessSetting->CWminIndex = 4;
  37893. + ChnlAccessSetting->CWmaxIndex = 10;
  37894. + break;
  37895. +
  37896. + default:
  37897. + ChnlAccessSetting->CWminIndex = 1;
  37898. + ChnlAccessSetting->CWmaxIndex = 7;
  37899. + break;
  37900. + }
  37901. +#ifdef TODO
  37902. + if( Adapter->MgntInfo.OpMode == RT_OP_MODE_IBSS)
  37903. + {
  37904. + ChnlAccessSetting->CWminIndex= 4;
  37905. + ChnlAccessSetting->CWmaxIndex= 10;
  37906. + }
  37907. +#endif
  37908. + break;
  37909. + }
  37910. +
  37911. +
  37912. + write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer);
  37913. +//{ update slot time related by david, 2006-7-21
  37914. + write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29.
  37915. +#ifdef TODO
  37916. + if(pStaQos->CurrentQosMode > QOS_DISABLE)
  37917. + {
  37918. + for(eACI = 0; eACI < AC_MAX; eACI++)
  37919. + {
  37920. + Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, \
  37921. + (pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) );
  37922. + }
  37923. + }
  37924. + else
  37925. +#endif
  37926. + {
  37927. + u8 u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer );
  37928. +
  37929. + write_nic_byte(dev, AC_VO_PARAM, u1bAIFS);
  37930. + write_nic_byte(dev, AC_VI_PARAM, u1bAIFS);
  37931. + write_nic_byte(dev, AC_BE_PARAM, u1bAIFS);
  37932. + write_nic_byte(dev, AC_BK_PARAM, u1bAIFS);
  37933. + }
  37934. +//}
  37935. +
  37936. + write_nic_byte(dev, EIFS_8187B, ChnlAccessSetting->EIFS_Timer);
  37937. + write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08.
  37938. +#ifdef TODO
  37939. + // <RJ_TODO_NOW_8185B> Update ECWmin/ECWmax, AIFS, TXOP Limit of each AC to the value defined by SPEC.
  37940. + if( pStaQos->CurrentQosMode > QOS_DISABLE )
  37941. + { // QoS mode.
  37942. + if(pStaQos->QBssWirelessMode == WirelessMode)
  37943. + {
  37944. + // Follow AC Parameters of the QBSS.
  37945. + for(eACI = 0; eACI < AC_MAX; eACI++)
  37946. + {
  37947. + Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, (pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) );
  37948. + }
  37949. + }
  37950. + else
  37951. + {
  37952. + // Follow Default WMM AC Parameters.
  37953. + bFollowLegacySetting = TRUE;
  37954. + }
  37955. + }
  37956. + else
  37957. + { // Legacy 802.11.
  37958. + bFollowLegacySetting = TRUE;
  37959. + }
  37960. +
  37961. + if(bFollowLegacySetting)
  37962. +#endif
  37963. + if(true)
  37964. + {
  37965. + //
  37966. + // Follow 802.11 seeting to AC parameter, all AC shall use the same parameter.
  37967. + // 2005.12.01, by rcnjko.
  37968. + //
  37969. + AcParam.longData = 0;
  37970. + AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
  37971. + AcParam.f.AciAifsn.f.ACM = 0;
  37972. + AcParam.f.Ecw.f.ECWmin = ChnlAccessSetting->CWminIndex; // Follow 802.11 CWmin.
  37973. + AcParam.f.Ecw.f.ECWmax = ChnlAccessSetting->CWmaxIndex; // Follow 802.11 CWmax.
  37974. + AcParam.f.TXOPLimit = 0;
  37975. + for(eACI = 0; eACI < AC_MAX; eACI++)
  37976. + {
  37977. + AcParam.f.AciAifsn.f.ACI = (u8)eACI;
  37978. + {
  37979. + PAC_PARAM pAcParam = (PAC_PARAM)(&AcParam);
  37980. + AC_CODING eACI;
  37981. + u8 u1bAIFS;
  37982. + u32 u4bAcParam;
  37983. +
  37984. + // Retrive paramters to udpate.
  37985. + eACI = pAcParam->f.AciAifsn.f.ACI;
  37986. + u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * ChnlAccessSetting->SlotTimeTimer + aSifsTime;
  37987. + u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
  37988. + (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
  37989. + (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
  37990. + (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
  37991. +
  37992. + switch(eACI)
  37993. + {
  37994. + case AC1_BK:
  37995. + write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
  37996. + break;
  37997. +
  37998. + case AC0_BE:
  37999. + write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
  38000. + break;
  38001. +
  38002. + case AC2_VI:
  38003. + write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
  38004. + break;
  38005. +
  38006. + case AC3_VO:
  38007. + write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
  38008. + break;
  38009. +
  38010. + default:
  38011. + printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
  38012. + break;
  38013. + }
  38014. +
  38015. + // Cehck ACM bit.
  38016. + // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
  38017. + //write_nic_byte(dev, ACM_CONTROL, pAcParam->f.AciAifsn);
  38018. + {
  38019. + PACI_AIFSN pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn);
  38020. + AC_CODING eACI = pAciAifsn->f.ACI;
  38021. +
  38022. + //modified Joseph
  38023. + //for 8187B AsynIORead issue
  38024. +#ifdef TODO
  38025. + u8 AcmCtrl = pHalData->AcmControl;
  38026. +#else
  38027. + u8 AcmCtrl = 0;
  38028. +#endif
  38029. + if( pAciAifsn->f.ACM )
  38030. + { // ACM bit is 1.
  38031. + switch(eACI)
  38032. + {
  38033. + case AC0_BE:
  38034. + AcmCtrl |= (BEQ_ACM_EN|BEQ_ACM_CTL|ACM_HW_EN); // or 0x21
  38035. + break;
  38036. +
  38037. + case AC2_VI:
  38038. + AcmCtrl |= (VIQ_ACM_EN|VIQ_ACM_CTL|ACM_HW_EN); // or 0x42
  38039. + break;
  38040. +
  38041. + case AC3_VO:
  38042. + AcmCtrl |= (VOQ_ACM_EN|VOQ_ACM_CTL|ACM_HW_EN); // or 0x84
  38043. + break;
  38044. +
  38045. + default:
  38046. + printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] ACM set\
  38047. + failed: eACI is %d\n", eACI );
  38048. + break;
  38049. + }
  38050. + }
  38051. + else
  38052. + { // ACM bit is 0.
  38053. + switch(eACI)
  38054. + {
  38055. + case AC0_BE:
  38056. + AcmCtrl &= ( (~BEQ_ACM_EN) & (~BEQ_ACM_CTL) & (~ACM_HW_EN) ); // and 0xDE
  38057. + break;
  38058. +
  38059. + case AC2_VI:
  38060. + AcmCtrl &= ( (~VIQ_ACM_EN) & (~VIQ_ACM_CTL) & (~ACM_HW_EN) ); // and 0xBD
  38061. + break;
  38062. +
  38063. + case AC3_VO:
  38064. + AcmCtrl &= ( (~VOQ_ACM_EN) & (~VOQ_ACM_CTL) & (~ACM_HW_EN) ); // and 0x7B
  38065. + break;
  38066. +
  38067. + default:
  38068. + break;
  38069. + }
  38070. + }
  38071. +
  38072. + //printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
  38073. +
  38074. +#ifdef TO_DO
  38075. + pHalData->AcmControl = AcmCtrl;
  38076. +#endif
  38077. + write_nic_byte(dev, ACM_CONTROL, AcmCtrl);
  38078. + }
  38079. + }
  38080. + }
  38081. + }
  38082. +}
  38083. +
  38084. +void ActSetWirelessMode8187(struct net_device* dev, u8 btWirelessMode)
  38085. +{
  38086. + struct r8180_priv *priv = ieee80211_priv(dev);
  38087. + struct ieee80211_device *ieee = priv->ieee80211;
  38088. + //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
  38089. + u8 btSupportedWirelessMode = GetSupportedWirelessMode8187(dev);
  38090. +
  38091. + if( (btWirelessMode & btSupportedWirelessMode) == 0 )
  38092. + { // Don't switch to unsupported wireless mode, 2006.02.15, by rcnjko.
  38093. + printk(KERN_WARNING "ActSetWirelessMode8187(): WirelessMode(%d) is not supported (%d)!\n",
  38094. + btWirelessMode, btSupportedWirelessMode);
  38095. + return;
  38096. + }
  38097. +
  38098. + // 1. Assign wireless mode to swtich if necessary.
  38099. + if( (btWirelessMode == WIRELESS_MODE_AUTO) ||
  38100. + (btWirelessMode & btSupportedWirelessMode) == 0 )
  38101. + {
  38102. + if((btSupportedWirelessMode & WIRELESS_MODE_A))
  38103. + {
  38104. + btWirelessMode = WIRELESS_MODE_A;
  38105. + }
  38106. + else if((btSupportedWirelessMode & WIRELESS_MODE_G))
  38107. + {
  38108. + btWirelessMode = WIRELESS_MODE_G;
  38109. + }
  38110. + else if((btSupportedWirelessMode & WIRELESS_MODE_B))
  38111. + {
  38112. + btWirelessMode = WIRELESS_MODE_B;
  38113. + }
  38114. + else
  38115. + {
  38116. + printk(KERN_WARNING "MptActSetWirelessMode8187(): No valid wireless mode supported, \
  38117. + btSupportedWirelessMode(%x)!!!\n", btSupportedWirelessMode);
  38118. + btWirelessMode = WIRELESS_MODE_B;
  38119. + }
  38120. + }
  38121. +
  38122. + // 2. Swtich band.
  38123. + switch(priv->rf_chip)
  38124. + {
  38125. + case RF_ZEBRA:
  38126. + case RF_ZEBRA2:
  38127. + {
  38128. + // Update current wireless mode if we swtich to specified band successfully.
  38129. + ieee->mode = (WIRELESS_MODE)btWirelessMode;
  38130. + }
  38131. + break;
  38132. +
  38133. + default:
  38134. + printk(KERN_WARNING "MptActSetWirelessMode8187(): unsupported RF: 0x%X !!!\n", priv->rf_chip);
  38135. + break;
  38136. + }
  38137. +
  38138. + // 4. Change related setting.
  38139. + if( ieee->mode == WIRELESS_MODE_A ){
  38140. + DMESG("WIRELESS_MODE_A");
  38141. + }
  38142. + else if(ieee->mode == WIRELESS_MODE_B ){
  38143. + DMESG("WIRELESS_MODE_B");
  38144. + }
  38145. + else if( ieee->mode == WIRELESS_MODE_G ){
  38146. + DMESG("WIRELESS_MODE_G");
  38147. + }
  38148. + ActUpdateChannelAccessSetting(dev, ieee->mode, &priv->ChannelAccessSetting );
  38149. +//by amy 0305
  38150. +#ifdef TODO
  38151. + if(ieee->mode == WIRELESS_MODE_B && priv->InitialGain > pHalData->RegBModeGainStage)
  38152. + {
  38153. + pHalData->InitialGain = pHalData->RegBModeGainStage; // B mode, OFDM[0x17] = 26.
  38154. + RT_TRACE(COMP_INIT | COMP_DIG, DBG_LOUD, ("ActSetWirelessMode8187(): update init_gain to index %d for B mode\n",pHalData->InitialGain));
  38155. + PlatformScheduleWorkItem( &(pHalData->UpdateDigWorkItem) );
  38156. + }
  38157. +// pAdapter->MgntInfo.dot11CurrentWirelessMode = pHalData->CurrentWirelessMode;
  38158. +// MgntSetRegdot11OperationalRateSet( pAdapter );
  38159. +#endif
  38160. +//by amy 0305
  38161. +}
  38162. +
  38163. +
  38164. +void
  38165. +InitializeExtraRegsOn8185(struct net_device *dev)
  38166. +{
  38167. + struct r8180_priv *priv = ieee80211_priv(dev);
  38168. + struct ieee80211_device *ieee = priv->ieee80211;
  38169. + //RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control.
  38170. + bool bUNIVERSAL_CONTROL_RL = false; // Enable per-packet tx retry, 2005.03.31, by rcnjko.
  38171. + bool bUNIVERSAL_CONTROL_AGC = true;//false;
  38172. + bool bUNIVERSAL_CONTROL_ANT = true;//false;
  38173. + bool bAUTO_RATE_FALLBACK_CTL = true;
  38174. + u8 val8;
  38175. +
  38176. + // Set up ACK rate.
  38177. + // Suggested by wcchu, 2005.08.25, by rcnjko.
  38178. + // 1. Initialize (MinRR, MaxRR) to (6,24) for A/G.
  38179. + // 2. MUST Set RR before BRSR.
  38180. + // 3. CCK must be basic rate.
  38181. + if((ieee->mode == IEEE_G)||(ieee->mode == IEEE_A))
  38182. + {
  38183. + write_nic_word(dev, BRSR_8187B, 0x0fff);
  38184. + }
  38185. + else
  38186. + {
  38187. + write_nic_word(dev, BRSR_8187B, 0x000f);
  38188. + }
  38189. +
  38190. +
  38191. + // Retry limit
  38192. + val8 = read_nic_byte(dev, CW_CONF);
  38193. + if(bUNIVERSAL_CONTROL_RL)
  38194. + {
  38195. + val8 &= (~CW_CONF_PERPACKET_RETRY_LIMIT);
  38196. + }
  38197. + else
  38198. + {
  38199. + val8 |= CW_CONF_PERPACKET_RETRY_LIMIT;
  38200. + }
  38201. +
  38202. + write_nic_byte(dev, CW_CONF, val8);
  38203. +
  38204. + // Tx AGC
  38205. + val8 = read_nic_byte(dev, TX_AGC_CTL);
  38206. + if(bUNIVERSAL_CONTROL_AGC)
  38207. + {
  38208. + val8 &= (~TX_AGC_CTL_PER_PACKET_TXAGC);
  38209. + write_nic_byte(dev, CCK_TXAGC, 128);
  38210. + write_nic_byte(dev, OFDM_TXAGC, 128);
  38211. + }
  38212. + else
  38213. + {
  38214. + val8 |= TX_AGC_CTL_PER_PACKET_TXAGC;
  38215. + }
  38216. + write_nic_byte(dev, TX_AGC_CTL, val8);
  38217. +
  38218. + // Tx Antenna including Feedback control
  38219. + val8 = read_nic_byte(dev, TX_AGC_CTL);
  38220. +
  38221. + if(bUNIVERSAL_CONTROL_ANT)
  38222. + {
  38223. + write_nic_byte(dev, ANTSEL, 0x00);
  38224. + val8 &= (~TXAGC_CTL_PER_PACKET_ANT_SEL);
  38225. + }
  38226. + else
  38227. + {
  38228. + val8 |= TXAGC_CTL_PER_PACKET_ANT_SEL;
  38229. + }
  38230. + write_nic_byte(dev, TX_AGC_CTL, val8);
  38231. +
  38232. + // Auto Rate fallback control
  38233. + val8 = read_nic_byte(dev, RATE_FALLBACK);
  38234. + if( bAUTO_RATE_FALLBACK_CTL )
  38235. + {
  38236. + val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP0;
  38237. +
  38238. + // <RJ_TODO_8187B> We shall set up the ARFR according to user's setting.
  38239. + write_nic_word(dev, ARFR, 0x0fff); // set 1M ~ 54M
  38240. + }
  38241. + else
  38242. + {
  38243. + val8 &= (~RATE_FALLBACK_CTL_ENABLE);
  38244. + }
  38245. + write_nic_byte(dev, RATE_FALLBACK, val8);
  38246. +
  38247. +}
  38248. +///////////////////////////
  38249. +void rtl8225z2_rf_init(struct net_device *dev)
  38250. +{
  38251. +
  38252. + struct r8180_priv *priv = ieee80211_priv(dev);
  38253. + if (NIC_8187B == priv->card_8187){
  38254. + struct ieee80211_device *ieee = priv->ieee80211;
  38255. + u8 InitWirelessMode;
  38256. + u8 SupportedWirelessMode;
  38257. + bool bInvalidWirelessMode = false;
  38258. + InitializeExtraRegsOn8185(dev);
  38259. +
  38260. + write_nic_byte(dev, MSR, read_nic_byte(dev,MSR) & 0xf3); // default network type to 'No Link'
  38261. + //{to avoid tx stall
  38262. + write_nic_byte(dev, MSR, read_nic_byte(dev, MSR)|MSR_LINK_ENEDCA);//should always set ENDCA bit
  38263. + write_nic_byte(dev, ACM_CONTROL, priv->AcmControl);
  38264. +
  38265. + write_nic_word(dev, BcnIntv, 100);
  38266. + write_nic_word(dev, AtimWnd, 2);
  38267. + write_nic_word(dev, FEMR, 0xFFFF);
  38268. + //LED TYPE
  38269. + {
  38270. + write_nic_byte(dev, CONFIG1,((read_nic_byte(dev, CONFIG1)&0x3f)|0x80)); //turn on bit 5:Clkrun_mode
  38271. + }
  38272. + write_nic_byte(dev, CR9346, 0x0); // disable config register write
  38273. +
  38274. + //{ add some info here
  38275. + write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
  38276. + write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
  38277. +
  38278. + write_nic_byte(dev, WPA_CONFIG, 0);
  38279. + //}
  38280. +
  38281. + MacConfig_87BASIC(dev);
  38282. +
  38283. + // Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko.
  38284. + write_nic_word(dev, RFSW_CTRL, 0x569a);
  38285. +#ifdef JOHN_TKIP
  38286. + {
  38287. + void CamResetAllEntry(struct net_device *dev);
  38288. + void EnableHWSecurityConfig8187(struct net_device *dev);
  38289. + CamResetAllEntry(dev);
  38290. + EnableHWSecurityConfig8187(dev);
  38291. + write_nic_word(dev, AESMSK_FC, AESMSK_FC_DEFAULT); mdelay(1);
  38292. + write_nic_word(dev, AESMSK_SC, AESMSK_SC_DEFAULT); mdelay(1);
  38293. + write_nic_word(dev, AESMSK_QC, AESMSK_QC_DEFAULT); mdelay(1);
  38294. + }
  38295. +#endif
  38296. + //-----------------------------------------------------------------------------
  38297. + // Set up PHY related.
  38298. + //-----------------------------------------------------------------------------
  38299. + // Enable Config3.PARAM_En to revise AnaaParm.
  38300. + write_nic_byte(dev, CR9346, 0xC0);
  38301. + write_nic_byte(dev, CONFIG3, read_nic_byte(dev,CONFIG3)|CONFIG3_PARM_En);
  38302. + write_nic_byte(dev, CR9346, 0x0);
  38303. +
  38304. + // Initialize RFE and read Zebra2 version code. Added by Annie, 2005-08-01.
  38305. + SetupRFEInitialTiming(dev);
  38306. + // PHY config.
  38307. + PhyConfig8187(dev);
  38308. +
  38309. + // We assume RegWirelessMode has already been initialized before,
  38310. + // however, we has to validate the wireless mode here and provide a reasonble
  38311. + // initialized value if necessary. 2005.01.13, by rcnjko.
  38312. + SupportedWirelessMode = GetSupportedWirelessMode8187(dev);
  38313. +
  38314. + if((ieee->mode != WIRELESS_MODE_B) &&
  38315. + (ieee->mode != WIRELESS_MODE_G) &&
  38316. + (ieee->mode != WIRELESS_MODE_A) &&
  38317. + (ieee->mode != WIRELESS_MODE_AUTO))
  38318. + { // It should be one of B, G, A, or AUTO.
  38319. + bInvalidWirelessMode = true;
  38320. + }
  38321. + else
  38322. + { // One of B, G, A, or AUTO.
  38323. + // Check if the wireless mode is supported by RF.
  38324. + if( (ieee->mode != WIRELESS_MODE_AUTO) &&
  38325. + (ieee->mode & SupportedWirelessMode) == 0 )
  38326. + {
  38327. + bInvalidWirelessMode = true;
  38328. + }
  38329. + }
  38330. +
  38331. + if(bInvalidWirelessMode || ieee->mode==WIRELESS_MODE_AUTO)
  38332. + { // Auto or other invalid value.
  38333. + // Assigne a wireless mode to initialize.
  38334. + if((SupportedWirelessMode & WIRELESS_MODE_A))
  38335. + {
  38336. + InitWirelessMode = WIRELESS_MODE_A;
  38337. + }
  38338. + else if((SupportedWirelessMode & WIRELESS_MODE_G))
  38339. + {
  38340. +
  38341. + InitWirelessMode = WIRELESS_MODE_G;
  38342. + }
  38343. + else if((SupportedWirelessMode & WIRELESS_MODE_B))
  38344. + {
  38345. +
  38346. + InitWirelessMode = WIRELESS_MODE_B;
  38347. + }
  38348. + else
  38349. + {
  38350. + printk(KERN_WARNING
  38351. + "InitializeAdapter8187(): No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n",
  38352. + SupportedWirelessMode);
  38353. + InitWirelessMode = WIRELESS_MODE_B;
  38354. + }
  38355. +
  38356. + // Initialize RegWirelessMode if it is not a valid one.
  38357. + if(bInvalidWirelessMode)
  38358. + {
  38359. + ieee->mode = (WIRELESS_MODE)InitWirelessMode;
  38360. + }
  38361. + }
  38362. + else
  38363. + { // One of B, G, A.
  38364. + InitWirelessMode = ieee->mode;
  38365. + }
  38366. + ActSetWirelessMode8187(dev, (u8)(InitWirelessMode));
  38367. + {//added for init gain
  38368. + write_phy_ofdm(dev, 0x97, 0x46); mdelay(1);
  38369. + write_phy_ofdm(dev, 0xa4, 0xb6); mdelay(1);
  38370. + write_phy_ofdm(dev, 0x85, 0xfc); mdelay(1);
  38371. + write_phy_cck(dev, 0xc1, 0x88); mdelay(1);
  38372. + }
  38373. +
  38374. + }
  38375. + else{
  38376. + int i;
  38377. + short channel = 1;
  38378. + u16 brsr;
  38379. + u32 data,addr;
  38380. +
  38381. + priv->chan = channel;
  38382. +
  38383. + rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  38384. +
  38385. + if(priv->card_type == USB)
  38386. + rtl8225_host_usb_init(dev);
  38387. + else
  38388. + rtl8225_host_pci_init(dev);
  38389. +
  38390. + write_nic_dword(dev, RF_TIMING, 0x000a8008);
  38391. +
  38392. + brsr = read_nic_word(dev, BRSR_8187);
  38393. +
  38394. + write_nic_word(dev, BRSR_8187, 0xffff);
  38395. +
  38396. +
  38397. + write_nic_dword(dev, RF_PARA, 0x100044);
  38398. +
  38399. + #if 1 //0->1
  38400. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  38401. + write_nic_byte(dev, CONFIG3, 0x44);
  38402. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  38403. + #endif
  38404. +
  38405. +
  38406. + rtl8185_rf_pins_enable(dev);
  38407. +
  38408. + // mdelay(1000);
  38409. +
  38410. + write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
  38411. +
  38412. +
  38413. + write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
  38414. +
  38415. + write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
  38416. +
  38417. + write_rtl8225(dev, 0x3, 0x441); mdelay(1);
  38418. +
  38419. +
  38420. + write_rtl8225(dev, 0x4, 0x8c3);mdelay(1);
  38421. +
  38422. +
  38423. +
  38424. + write_rtl8225(dev, 0x5, 0xc72);mdelay(1);
  38425. + // }
  38426. +
  38427. + write_rtl8225(dev, 0x6, 0xe6); mdelay(1);
  38428. +
  38429. + write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel])); mdelay(1);
  38430. +
  38431. + write_rtl8225(dev, 0x8, 0x3f); mdelay(1);
  38432. +
  38433. + write_rtl8225(dev, 0x9, 0x335); mdelay(1);
  38434. +
  38435. + write_rtl8225(dev, 0xa, 0x9d4); mdelay(1);
  38436. +
  38437. + write_rtl8225(dev, 0xb, 0x7bb); mdelay(1);
  38438. +
  38439. + write_rtl8225(dev, 0xc, 0x850); mdelay(1);
  38440. +
  38441. +
  38442. + write_rtl8225(dev, 0xd, 0xcdf); mdelay(1);
  38443. +
  38444. + write_rtl8225(dev, 0xe, 0x2b); mdelay(1);
  38445. +
  38446. + write_rtl8225(dev, 0xf, 0x114);
  38447. +
  38448. +
  38449. + mdelay(100);
  38450. +
  38451. +
  38452. + //if(priv->card_type != USB) /* maybe not needed even for 8185 */
  38453. + // write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
  38454. +
  38455. + write_rtl8225(dev, 0x0, 0x1b7);
  38456. +
  38457. + for(i=0;i<95;i++){
  38458. + write_rtl8225(dev, 0x1, (u8)(i+1));
  38459. + /* version B & C & D*/
  38460. + write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
  38461. + }
  38462. + //write_rtl8225(dev, 0x3, 0x80);
  38463. + write_rtl8225(dev, 0x3, 0x2);
  38464. + write_rtl8225(dev, 0x5, 0x4);
  38465. +
  38466. + write_rtl8225(dev, 0x0, 0xb7);
  38467. +
  38468. + write_rtl8225(dev, 0x2, 0xc4d);
  38469. +
  38470. + if(priv->card_type == USB){
  38471. + // force_pci_posting(dev);
  38472. + mdelay(200);
  38473. +
  38474. + write_rtl8225(dev, 0x2, 0x44d);
  38475. +
  38476. + // force_pci_posting(dev);
  38477. + mdelay(200);
  38478. +
  38479. + }//End of if(priv->card_type == USB)
  38480. + /* FIXME!! rtl8187 we have to check if calibrarion
  38481. + * is successful and eventually cal. again (repeat
  38482. + * the two write on reg 2)
  38483. + */
  38484. + // Check for calibration status, 2005.11.17,
  38485. + data = read_rtl8225(dev, 6);
  38486. + if (!(data&0x00000080))
  38487. + {
  38488. + write_rtl8225(dev, 0x02, 0x0c4d);
  38489. + force_pci_posting(dev); mdelay(200);
  38490. + write_rtl8225(dev, 0x02, 0x044d);
  38491. + force_pci_posting(dev); mdelay(100);
  38492. + data = read_rtl8225(dev, 6);
  38493. + if (!(data&0x00000080))
  38494. + {
  38495. + DMESGW("RF Calibration Failed!!!!\n");
  38496. + }
  38497. + }
  38498. + //force_pci_posting(dev);
  38499. +
  38500. + mdelay(200); //200 for 8187
  38501. +
  38502. +
  38503. + // //if(priv->card_type != USB){
  38504. + // write_rtl8225(dev, 0x2, 0x44d);
  38505. + // write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
  38506. + // write_rtl8225(dev, 0x2, 0x47d);
  38507. + //
  38508. + // force_pci_posting(dev);
  38509. + // mdelay(100);
  38510. + //
  38511. + // write_rtl8225(dev, 0x2, 0x44d);
  38512. + // //}
  38513. +
  38514. + write_rtl8225(dev, 0x0, 0x2bf);
  38515. +
  38516. + if(priv->card_type != USB)
  38517. + rtl8185_rf_pins_enable(dev);
  38518. + //set up ZEBRA AGC table, 2005.11.17,
  38519. + for(i=0;i<128;i++){
  38520. + data = rtl8225_agc[i];
  38521. +
  38522. + addr = i + 0x80; //enable writing AGC table
  38523. + write_phy_ofdm(dev, 0xb, data);
  38524. +
  38525. + mdelay(1);
  38526. + write_phy_ofdm(dev, 0xa, addr);
  38527. +
  38528. + mdelay(1);
  38529. + }
  38530. +
  38531. + force_pci_posting(dev);
  38532. + mdelay(1);
  38533. +
  38534. + write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
  38535. + write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
  38536. + write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
  38537. + write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
  38538. + write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
  38539. + write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
  38540. + write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
  38541. + write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
  38542. + write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
  38543. + write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
  38544. +
  38545. + write_phy_ofdm(dev, 0xa, 0x8); mdelay(1);
  38546. +
  38547. + //write_phy_ofdm(dev, 0x18, 0xef);
  38548. + // }
  38549. + //}
  38550. + write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
  38551. +
  38552. + write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
  38553. +
  38554. +
  38555. + //if(priv->card_type != USB)
  38556. + write_phy_ofdm(dev, 0xd, 0x43);
  38557. +
  38558. + write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
  38559. +
  38560. + write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
  38561. + /*ver D & 8187*/
  38562. + // }
  38563. +
  38564. + // if(priv->card_8185 == 1 && priv->card_8185_Bversion)
  38565. + // write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
  38566. + // else
  38567. + write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
  38568. + /*ver C & D & 8187*/
  38569. +
  38570. + write_phy_ofdm(dev, 0x11, 0x07);mdelay(1);
  38571. + /*agc resp time 700*/
  38572. +
  38573. +
  38574. + // if(priv->card_8185 == 2){
  38575. + /* Ver D & 8187*/
  38576. + write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
  38577. +
  38578. + write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
  38579. +
  38580. + write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
  38581. + write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
  38582. + write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
  38583. + write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
  38584. +
  38585. + // if (priv->card_type == USB)
  38586. + // write_phy_ofdm(dev, 0x18, 0xef);
  38587. +
  38588. + write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
  38589. +
  38590. +
  38591. + write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
  38592. + write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
  38593. + write_phy_ofdm(dev, 0x1b, 0x15);mdelay(1);
  38594. +
  38595. + write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
  38596. +
  38597. + write_phy_ofdm(dev, 0x1d, 0xc5);mdelay(1); //2005.11.17,
  38598. +
  38599. + write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
  38600. +
  38601. + write_phy_ofdm(dev, 0x1f, 0x75); mdelay(1);
  38602. +
  38603. + // }
  38604. +
  38605. + write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
  38606. +
  38607. + write_phy_ofdm(dev, 0x21, 0x17);mdelay(1);
  38608. +
  38609. + write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
  38610. +
  38611. + // if(priv->card_type != USB)
  38612. + write_phy_ofdm(dev, 0x23, 0x80);mdelay(1); //FIXME maybe not needed // <>
  38613. +
  38614. + write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
  38615. + write_phy_ofdm(dev, 0x25, 0x00); mdelay(1);
  38616. + write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
  38617. +
  38618. + write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
  38619. +
  38620. +
  38621. + // <> Set init. gain to m74dBm.
  38622. +
  38623. + rtl8225z2_set_gain(dev,4);
  38624. + //rtl8225z2_set_gain(dev,2);
  38625. +
  38626. + write_phy_cck(dev, 0x0, 0x98); mdelay(1);
  38627. + write_phy_cck(dev, 0x3, 0x20); mdelay(1);
  38628. + write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
  38629. + write_phy_cck(dev, 0x5, 0x12); mdelay(1);
  38630. + write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
  38631. + write_phy_cck(dev, 0x7, 0x78);mdelay(1);
  38632. + /* Ver C & D & 8187*/
  38633. + write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
  38634. +
  38635. + write_phy_cck(dev, 0x9, 0x11);mdelay(1);
  38636. + write_phy_cck(dev, 0xa, 0x17);mdelay(1);
  38637. + write_phy_cck(dev, 0xb, 0x11);mdelay(1);
  38638. +
  38639. + write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
  38640. + write_phy_cck(dev, 0x11, 0x88); mdelay(1);
  38641. + write_phy_cck(dev, 0x12, 0x47); mdelay(1);
  38642. + write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
  38643. +
  38644. + write_phy_cck(dev, 0x19, 0x0); mdelay(1);
  38645. + write_phy_cck(dev, 0x1a, 0xa0); mdelay(1);
  38646. + write_phy_cck(dev, 0x1b, 0x8); mdelay(1);
  38647. + write_phy_cck(dev, 0x1d, 0x0); mdelay(1);
  38648. +
  38649. + write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */ mdelay(1);
  38650. +
  38651. + write_phy_cck(dev, 0x41, 0x9d);mdelay(1);
  38652. +
  38653. +
  38654. + write_phy_cck(dev, 0x42, 0x15); mdelay(1);
  38655. + write_phy_cck(dev, 0x43, 0x18); mdelay(1);
  38656. +
  38657. +
  38658. + write_phy_cck(dev, 0x44, 0x36); mdelay(1);
  38659. + write_phy_cck(dev, 0x45, 0x35); mdelay(1);
  38660. + write_phy_cck(dev, 0x46, 0x2e); mdelay(1);
  38661. + write_phy_cck(dev, 0x47, 0x25); mdelay(1);
  38662. + write_phy_cck(dev, 0x48, 0x1c); mdelay(1);
  38663. + write_phy_cck(dev, 0x49, 0x12); mdelay(1);
  38664. + write_phy_cck(dev, 0x4a, 0x09); mdelay(1);
  38665. + write_phy_cck(dev, 0x4b, 0x04); mdelay(1);
  38666. + write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
  38667. +
  38668. +
  38669. + write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
  38670. +
  38671. +
  38672. +
  38673. + // <>
  38674. + // // TESTR 0xb 8187
  38675. + // write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
  38676. + //
  38677. + // //if(priv->card_type != USB){
  38678. + // write_phy_ofdm(dev, 0x2, 0x62);
  38679. + // write_phy_ofdm(dev, 0x6, 0x0);
  38680. + // write_phy_ofdm(dev, 0x8, 0x0);
  38681. + // //}
  38682. +
  38683. + rtl8225z2_SetTXPowerLevel(dev, channel);
  38684. +
  38685. + write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
  38686. + write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
  38687. +
  38688. + rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
  38689. +
  38690. + /* switch to high-speed 3-wire
  38691. + * last digit. 2 for both cck and ofdm
  38692. + */
  38693. + if(priv->card_type == USB)
  38694. + write_nic_dword(dev, 0x94, 0x3dc00002);
  38695. + else{
  38696. + write_nic_dword(dev, 0x94, 0x15c00002);
  38697. + rtl8185_rf_pins_enable(dev);
  38698. + }
  38699. +
  38700. + // if(priv->card_type != USB)
  38701. + // rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
  38702. + // rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
  38703. + //
  38704. + // /* make sure is waken up! */
  38705. + // write_rtl8225(dev,0x4, 0x9ff);
  38706. + // rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  38707. + // rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
  38708. +
  38709. + rtl8225_rf_set_chan(dev, priv->chan);
  38710. +
  38711. + //write_nic_word(dev,BRSR,brsr);
  38712. +
  38713. + //rtl8225z2_rf_set_mode(dev);
  38714. + }
  38715. +}
  38716. +
  38717. +void rtl8225z2_rf_set_mode(struct net_device *dev)
  38718. +{
  38719. + struct r8180_priv *priv = ieee80211_priv(dev);
  38720. +
  38721. + if(priv->ieee80211->mode == IEEE_A)
  38722. + {
  38723. + write_rtl8225(dev, 0x5, 0x1865);
  38724. + write_nic_dword(dev, RF_PARA, 0x10084);
  38725. + write_nic_dword(dev, RF_TIMING, 0xa8008);
  38726. + write_phy_ofdm(dev, 0x0, 0x0);
  38727. + write_phy_ofdm(dev, 0xa, 0x6);
  38728. + write_phy_ofdm(dev, 0xb, 0x99);
  38729. + write_phy_ofdm(dev, 0xf, 0x20);
  38730. + write_phy_ofdm(dev, 0x11, 0x7);
  38731. +
  38732. + rtl8225z2_set_gain(dev,4);
  38733. +
  38734. + write_phy_ofdm(dev,0x15, 0x40);
  38735. + write_phy_ofdm(dev,0x17, 0x40);
  38736. +
  38737. + write_nic_dword(dev, 0x94,0x10000000);
  38738. + }else{
  38739. +
  38740. + write_rtl8225(dev, 0x5, 0x1864);
  38741. + write_nic_dword(dev, RF_PARA, 0x10044);
  38742. + write_nic_dword(dev, RF_TIMING, 0xa8008);
  38743. + write_phy_ofdm(dev, 0x0, 0x1);
  38744. + write_phy_ofdm(dev, 0xa, 0x6);
  38745. + write_phy_ofdm(dev, 0xb, 0x99);
  38746. + write_phy_ofdm(dev, 0xf, 0x20);
  38747. + write_phy_ofdm(dev, 0x11, 0x7);
  38748. +
  38749. + rtl8225z2_set_gain(dev,4);
  38750. +
  38751. + write_phy_ofdm(dev,0x15, 0x40);
  38752. + write_phy_ofdm(dev,0x17, 0x40);
  38753. +
  38754. + write_nic_dword(dev, 0x94,0x04000002);
  38755. + }
  38756. +}
  38757. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_wx.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_wx.c
  38758. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_wx.c 1970-01-01 01:00:00.000000000 +0100
  38759. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_wx.c 2009-08-23 19:01:04.000000000 +0200
  38760. @@ -0,0 +1,2067 @@
  38761. +/*
  38762. + This file contains wireless extension handlers.
  38763. +
  38764. + This is part of rtl8180 OpenSource driver.
  38765. + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
  38766. + Released under the terms of GPL (General Public Licence)
  38767. +
  38768. + Parts of this driver are based on the GPL part
  38769. + of the official realtek driver.
  38770. +
  38771. + Parts of this driver are based on the rtl8180 driver skeleton
  38772. + from Patric Schenke & Andres Salomon.
  38773. +
  38774. + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  38775. +
  38776. + We want to tanks the Authors of those projects and the Ndiswrapper
  38777. + project Authors.
  38778. +*/
  38779. +
  38780. +
  38781. +
  38782. +#include "r8187.h"
  38783. +#include "r8180_hw.h"
  38784. +//added 1117
  38785. +#include "ieee80211/ieee80211.h"
  38786. +#ifdef ENABLE_DOT11D
  38787. +#include "dot11d.h"
  38788. +#endif
  38789. +
  38790. +
  38791. +//#define RATE_COUNT 4
  38792. +u32 rtl8180_rates[] = {1000000,2000000,5500000,11000000,
  38793. + 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
  38794. +#define RATE_COUNT sizeof(rtl8180_rates)/(sizeof(rtl8180_rates[0]))
  38795. +
  38796. +#ifdef _RTL8187_EXT_PATCH_
  38797. +#define IW_MODE_MESH 11
  38798. +static int r8180_wx_join_mesh(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  38799. +int r8180_wx_set_channel(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  38800. +static int r8180_wx_mesh_scan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  38801. +static int r8180_wx_get_mesh_list(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  38802. +#endif
  38803. +
  38804. +static int r8180_wx_get_freq(struct net_device *dev,
  38805. + struct iw_request_info *a,
  38806. + union iwreq_data *wrqu, char *b)
  38807. +{
  38808. + struct r8180_priv *priv = ieee80211_priv(dev);
  38809. +
  38810. + return ieee80211_wx_get_freq(priv->ieee80211,a,wrqu,b);
  38811. +}
  38812. +
  38813. +
  38814. +#if 0
  38815. +
  38816. +static int r8180_wx_set_beaconinterval(struct net_device *dev, struct iw_request_info *aa,
  38817. + union iwreq_data *wrqu, char *b)
  38818. +{
  38819. + int *parms = (int *)b;
  38820. + int bi = parms[0];
  38821. +
  38822. + struct r8180_priv *priv = ieee80211_priv(dev);
  38823. + if(priv->ieee80211->bHwRadioOff)
  38824. + return 0;
  38825. + down(&priv->wx_sem);
  38826. + DMESG("setting beacon interval to %x",bi);
  38827. +
  38828. + priv->ieee80211->beacon_interval=bi;
  38829. + rtl8180_commit(dev);
  38830. + up(&priv->wx_sem);
  38831. +
  38832. + return 0;
  38833. +}
  38834. +
  38835. +
  38836. +static int r8180_wx_set_forceassociate(struct net_device *dev, struct iw_request_info *aa,
  38837. + union iwreq_data *wrqu, char *extra)
  38838. +{
  38839. + struct r8180_priv *priv=ieee80211_priv(dev);
  38840. + int *parms = (int *)extra;
  38841. + if(priv->ieee80211->bHwRadioOff)
  38842. + return 0;
  38843. +
  38844. + priv->ieee80211->force_associate = (parms[0] > 0);
  38845. +
  38846. +
  38847. + return 0;
  38848. +}
  38849. +
  38850. +#endif
  38851. +static int r8180_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
  38852. + union iwreq_data *wrqu, char *b)
  38853. +{
  38854. + struct r8180_priv *priv=ieee80211_priv(dev);
  38855. +
  38856. + return ieee80211_wx_get_mode(priv->ieee80211,a,wrqu,b);
  38857. +}
  38858. +
  38859. +
  38860. +
  38861. +static int r8180_wx_get_rate(struct net_device *dev,
  38862. + struct iw_request_info *info,
  38863. + union iwreq_data *wrqu, char *extra)
  38864. +{
  38865. + struct r8180_priv *priv = ieee80211_priv(dev);
  38866. + return ieee80211_wx_get_rate(priv->ieee80211,info,wrqu,extra);
  38867. +}
  38868. +
  38869. +
  38870. +
  38871. +static int r8180_wx_set_rate(struct net_device *dev,
  38872. + struct iw_request_info *info,
  38873. + union iwreq_data *wrqu, char *extra)
  38874. +{
  38875. + int ret;
  38876. + struct r8180_priv *priv = ieee80211_priv(dev);
  38877. + if(priv->ieee80211->bHwRadioOff)
  38878. + return 0;
  38879. +
  38880. + down(&priv->wx_sem);
  38881. +
  38882. + ret = ieee80211_wx_set_rate(priv->ieee80211,info,wrqu,extra);
  38883. +
  38884. + up(&priv->wx_sem);
  38885. +
  38886. + return ret;
  38887. +}
  38888. +#ifdef JOHN_IOCTL
  38889. +u16 read_rtl8225(struct net_device *dev, u8 addr);
  38890. +void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
  38891. +u32 john_read_rtl8225(struct net_device *dev, u8 adr);
  38892. +void _write_rtl8225(struct net_device *dev, u8 adr, u16 data);
  38893. +
  38894. +static int r8180_wx_read_regs(struct net_device *dev,
  38895. + struct iw_request_info *info,
  38896. + union iwreq_data *wrqu, char *extra)
  38897. +{
  38898. + struct r8180_priv *priv = ieee80211_priv(dev);
  38899. + u8 addr = 0;
  38900. + u16 data1;
  38901. +
  38902. + down(&priv->wx_sem);
  38903. +
  38904. +
  38905. + get_user(addr,(u8*)wrqu->data.pointer);
  38906. + data1 = read_rtl8225(dev, addr);
  38907. + wrqu->data.length = data1;
  38908. +
  38909. + up(&priv->wx_sem);
  38910. + return 0;
  38911. +
  38912. +}
  38913. +
  38914. +static int r8180_wx_write_regs(struct net_device *dev,
  38915. + struct iw_request_info *info,
  38916. + union iwreq_data *wrqu, char *extra)
  38917. +{
  38918. + struct r8180_priv *priv = ieee80211_priv(dev);
  38919. + u8 addr = 0;
  38920. +
  38921. + down(&priv->wx_sem);
  38922. +
  38923. + get_user(addr, (u8*)wrqu->data.pointer);
  38924. + write_rtl8225(dev, addr, wrqu->data.length);
  38925. +
  38926. + up(&priv->wx_sem);
  38927. + return 0;
  38928. +
  38929. +}
  38930. +
  38931. +void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
  38932. +u8 rtl8187_read_phy(struct net_device *dev,u8 adr, u32 data);
  38933. +
  38934. +static int r8180_wx_read_bb(struct net_device *dev,
  38935. + struct iw_request_info *info,
  38936. + union iwreq_data *wrqu, char *extra)
  38937. +{
  38938. + struct r8180_priv *priv = ieee80211_priv(dev);
  38939. + u8 databb;
  38940. +#if 0
  38941. + int i;
  38942. + for(i=0;i<12;i++) printk("%8x\n", read_cam(dev, i) );
  38943. +#endif
  38944. +
  38945. + down(&priv->wx_sem);
  38946. +
  38947. + databb = rtl8187_read_phy(dev, (u8)wrqu->data.length, 0x00000000);
  38948. + wrqu->data.length = databb;
  38949. +
  38950. + up(&priv->wx_sem);
  38951. + return 0;
  38952. +}
  38953. +
  38954. +void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
  38955. +static int r8180_wx_write_bb(struct net_device *dev,
  38956. + struct iw_request_info *info,
  38957. + union iwreq_data *wrqu, char *extra)
  38958. +{
  38959. + struct r8180_priv *priv = ieee80211_priv(dev);
  38960. + u8 databb = 0;
  38961. +
  38962. + down(&priv->wx_sem);
  38963. +
  38964. + get_user(databb, (u8*)wrqu->data.pointer);
  38965. + rtl8187_write_phy(dev, wrqu->data.length, databb);
  38966. +
  38967. + up(&priv->wx_sem);
  38968. + return 0;
  38969. +
  38970. +}
  38971. +
  38972. +
  38973. +static int r8180_wx_write_nicb(struct net_device *dev,
  38974. + struct iw_request_info *info,
  38975. + union iwreq_data *wrqu, char *extra)
  38976. +{
  38977. + struct r8180_priv *priv = ieee80211_priv(dev);
  38978. + u32 addr = 0;
  38979. +
  38980. + down(&priv->wx_sem);
  38981. +
  38982. + get_user(addr, (u32*)wrqu->data.pointer);
  38983. + write_nic_byte(dev, addr, wrqu->data.length);
  38984. +
  38985. + up(&priv->wx_sem);
  38986. + return 0;
  38987. +
  38988. +}
  38989. +static int r8180_wx_read_nicb(struct net_device *dev,
  38990. + struct iw_request_info *info,
  38991. + union iwreq_data *wrqu, char *extra)
  38992. +{
  38993. + struct r8180_priv *priv = ieee80211_priv(dev);
  38994. + u32 addr = 0;
  38995. + u16 data1;
  38996. +
  38997. + down(&priv->wx_sem);
  38998. +
  38999. + get_user(addr,(u32*)wrqu->data.pointer);
  39000. + data1 = read_nic_byte(dev, addr);
  39001. + wrqu->data.length = data1;
  39002. +
  39003. + up(&priv->wx_sem);
  39004. + return 0;
  39005. +}
  39006. +
  39007. +static inline int is_same_network(struct ieee80211_network *src,
  39008. + struct ieee80211_network *dst,
  39009. + struct ieee80211_device *ieee)
  39010. +{
  39011. + /* A network is only a duplicate if the channel, BSSID, ESSID
  39012. + * and the capability field (in particular IBSS and BSS) all match.
  39013. + * We treat all <hidden> with the same BSSID and channel
  39014. + * as one network */
  39015. + return (((src->ssid_len == dst->ssid_len)||(ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod, 080819,for hidden ap
  39016. + //((src->ssid_len == dst->ssid_len) &&
  39017. + (src->channel == dst->channel) &&
  39018. + !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
  39019. + (!memcmp(src->ssid, dst->ssid, src->ssid_len)||(ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod, 080819,for hidden ap
  39020. + //!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
  39021. + ((src->capability & WLAN_CAPABILITY_IBSS) ==
  39022. + (dst->capability & WLAN_CAPABILITY_IBSS)) &&
  39023. + ((src->capability & WLAN_CAPABILITY_BSS) ==
  39024. + (dst->capability & WLAN_CAPABILITY_BSS)));
  39025. +}
  39026. +
  39027. +static int r8180_wx_get_ap_status(struct net_device *dev,
  39028. + struct iw_request_info *info,
  39029. + union iwreq_data *wrqu, char *extra)
  39030. +{
  39031. + struct r8180_priv *priv = ieee80211_priv(dev);
  39032. + struct ieee80211_device *ieee = priv->ieee80211;
  39033. + struct ieee80211_network *target;
  39034. + int name_len;
  39035. +
  39036. + down(&priv->wx_sem);
  39037. +
  39038. + //count the length of input ssid
  39039. + for(name_len=0 ; ((char*)wrqu->data.pointer)[name_len]!='\0' ; name_len++);
  39040. +
  39041. + //search for the correspoding info which is received
  39042. + list_for_each_entry(target, &ieee->network_list, list) {
  39043. + if ( (target->ssid_len == name_len) &&
  39044. + (strncmp(target->ssid, (char*)wrqu->data.pointer, name_len)==0)){
  39045. + if( ((jiffies-target->last_scanned)/HZ > 1) && (ieee->state == IEEE80211_LINKED) && (is_same_network(&ieee->current_network,target, ieee)) )
  39046. + wrqu->data.length = 999;
  39047. + else
  39048. + wrqu->data.length = target->SignalStrength;
  39049. + if(target->wpa_ie_len>0 || target->rsn_ie_len>0 )
  39050. + //set flags=1 to indicate this ap is WPA
  39051. + wrqu->data.flags = 1;
  39052. + else wrqu->data.flags = 0;
  39053. +
  39054. +
  39055. + break;
  39056. + }
  39057. + }
  39058. +
  39059. + if (&target->list == &ieee->network_list){
  39060. + wrqu->data.flags = 3;
  39061. + }
  39062. + up(&priv->wx_sem);
  39063. + return 0;
  39064. +}
  39065. +
  39066. +
  39067. +
  39068. +#endif
  39069. +
  39070. +static int r8180_wx_set_rawtx(struct net_device *dev,
  39071. + struct iw_request_info *info,
  39072. + union iwreq_data *wrqu, char *extra)
  39073. +{
  39074. + struct r8180_priv *priv = ieee80211_priv(dev);
  39075. + int ret;
  39076. +
  39077. + if(priv->ieee80211->bHwRadioOff)
  39078. + return 0;
  39079. +
  39080. + down(&priv->wx_sem);
  39081. +
  39082. + ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra);
  39083. +
  39084. + up(&priv->wx_sem);
  39085. +
  39086. + return ret;
  39087. +
  39088. +}
  39089. +
  39090. +static int r8180_wx_set_crcmon(struct net_device *dev,
  39091. + struct iw_request_info *info,
  39092. + union iwreq_data *wrqu, char *extra)
  39093. +{
  39094. + struct r8180_priv *priv = ieee80211_priv(dev);
  39095. + int *parms = (int *)extra;
  39096. + int enable = (parms[0] > 0);
  39097. + short prev = priv->crcmon;
  39098. +
  39099. + if(priv->ieee80211->bHwRadioOff)
  39100. + return 0;
  39101. +
  39102. + down(&priv->wx_sem);
  39103. +
  39104. + if(enable)
  39105. + priv->crcmon=1;
  39106. + else
  39107. + priv->crcmon=0;
  39108. +
  39109. + DMESG("bad CRC in monitor mode are %s",
  39110. + priv->crcmon ? "accepted" : "rejected");
  39111. +
  39112. + if(prev != priv->crcmon && priv->up){
  39113. + rtl8180_down(dev);
  39114. + rtl8180_up(dev);
  39115. + }
  39116. +
  39117. + up(&priv->wx_sem);
  39118. +
  39119. + return 0;
  39120. +}
  39121. +
  39122. +static int r8180_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
  39123. + union iwreq_data *wrqu, char *b)
  39124. +{
  39125. + struct r8180_priv *priv = ieee80211_priv(dev);
  39126. + int ret;
  39127. + if(priv->ieee80211->bHwRadioOff)
  39128. + return 0;
  39129. +
  39130. +#ifdef _RTL8187_EXT_PATCH_
  39131. + if (priv->mshobj && (priv->ieee80211->iw_ext_mode==11)) return 0;
  39132. +#endif
  39133. + down(&priv->wx_sem);
  39134. +
  39135. +#ifdef CONFIG_IPS
  39136. + if(priv->bInactivePs){
  39137. + if(wrqu->mode != IW_MODE_INFRA){
  39138. + down(&priv->ieee80211->ips_sem);
  39139. + IPSLeave(dev);
  39140. + up(&priv->ieee80211->ips_sem);
  39141. + }
  39142. + }
  39143. +#endif
  39144. + ret = ieee80211_wx_set_mode(priv->ieee80211,a,wrqu,b);
  39145. +
  39146. + rtl8187_set_rxconf(dev);
  39147. +
  39148. + up(&priv->wx_sem);
  39149. + return ret;
  39150. +}
  39151. +
  39152. +
  39153. +//YJ,add,080819,for hidden ap
  39154. +struct iw_range_with_scan_capa
  39155. +{
  39156. + /* Informative stuff (to choose between different interface) */
  39157. + __u32 throughput; /* To give an idea... */
  39158. + /* In theory this value should be the maximum benchmarked
  39159. + * TCP/IP throughput, because with most of these devices the
  39160. + * bit rate is meaningless (overhead an co) to estimate how
  39161. + * fast the connection will go and pick the fastest one.
  39162. + * I suggest people to play with Netperf or any benchmark...
  39163. + */
  39164. +
  39165. + /* NWID (or domain id) */
  39166. + __u32 min_nwid; /* Minimal NWID we are able to set */
  39167. + __u32 max_nwid; /* Maximal NWID we are able to set */
  39168. +
  39169. + /* Old Frequency (backward compat - moved lower ) */
  39170. + __u16 old_num_channels;
  39171. + __u8 old_num_frequency;
  39172. +
  39173. + /* Scan capabilities */
  39174. + __u8 scan_capa;
  39175. +};
  39176. +//YJ,add,080819,for hidden ap
  39177. +
  39178. +static int rtl8180_wx_get_range(struct net_device *dev,
  39179. + struct iw_request_info *info,
  39180. + union iwreq_data *wrqu, char *extra)
  39181. +{
  39182. + struct iw_range *range = (struct iw_range *)extra;
  39183. + struct r8180_priv *priv = ieee80211_priv(dev);
  39184. + u16 val;
  39185. + int i;
  39186. + struct iw_range_with_scan_capa* tmp = (struct iw_range_with_scan_capa*)range; //YJ,add,080819,for hidden ap
  39187. +
  39188. + wrqu->data.length = sizeof(*range);
  39189. + memset(range, 0, sizeof(*range));
  39190. +
  39191. + /* Let's try to keep this struct in the same order as in
  39192. + * linux/include/wireless.h
  39193. + */
  39194. +
  39195. + /* TODO: See what values we can set, and remove the ones we can't
  39196. + * set, or fill them with some default data.
  39197. + */
  39198. +
  39199. + /* ~5 Mb/s real (802.11b) */
  39200. + range->throughput = 5 * 1000 * 1000;
  39201. +
  39202. + // TODO: Not used in 802.11b?
  39203. +// range->min_nwid; /* Minimal NWID we are able to set */
  39204. + // TODO: Not used in 802.11b?
  39205. +// range->max_nwid; /* Maximal NWID we are able to set */
  39206. +
  39207. + /* Old Frequency (backward compat - moved lower ) */
  39208. +// range->old_num_channels;
  39209. +// range->old_num_frequency;
  39210. +// range->old_freq[6]; /* Filler to keep "version" at the same offset */
  39211. + if(priv->rf_set_sens != NULL)
  39212. + range->sensitivity = priv->max_sens; /* signal level threshold range */
  39213. +
  39214. + range->max_qual.qual = 100;
  39215. + /* TODO: Find real max RSSI and stick here */
  39216. + range->max_qual.level = 0;
  39217. + range->max_qual.noise = -98;
  39218. + range->max_qual.updated = 7; /* Updated all three */
  39219. +
  39220. + range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
  39221. + /* TODO: Find real 'good' to 'bad' threshol value for RSSI */
  39222. + range->avg_qual.level = 20 + -98;
  39223. + range->avg_qual.noise = 0;
  39224. + range->avg_qual.updated = 7; /* Updated all three */
  39225. +
  39226. + range->num_bitrates = RATE_COUNT;
  39227. +
  39228. + for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) {
  39229. + range->bitrate[i] = rtl8180_rates[i];
  39230. + }
  39231. +
  39232. + range->min_frag = MIN_FRAG_THRESHOLD;
  39233. + range->max_frag = MAX_FRAG_THRESHOLD;
  39234. +
  39235. + range->pm_capa = 0;
  39236. +
  39237. + range->we_version_compiled = WIRELESS_EXT;
  39238. + range->we_version_source = 16;
  39239. +
  39240. +// range->retry_capa; /* What retry options are supported */
  39241. +// range->retry_flags; /* How to decode max/min retry limit */
  39242. +// range->r_time_flags; /* How to decode max/min retry life */
  39243. +// range->min_retry; /* Minimal number of retries */
  39244. +// range->max_retry; /* Maximal number of retries */
  39245. +// range->min_r_time; /* Minimal retry lifetime */
  39246. +// range->max_r_time; /* Maximal retry lifetime */
  39247. +
  39248. + range->num_channels = 14;
  39249. +
  39250. + for (i = 0, val = 0; i < 14; i++) {
  39251. +
  39252. + // Include only legal frequencies for some countries
  39253. +#ifdef ENABLE_DOT11D
  39254. + if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
  39255. +#else
  39256. + if ((priv->ieee80211->channel_map)[i+1]) {
  39257. +#endif
  39258. + range->freq[val].i = i + 1;
  39259. + range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
  39260. + range->freq[val].e = 1;
  39261. + val++;
  39262. + } else {
  39263. + // FIXME: do we need to set anything for channels
  39264. + // we don't use ?
  39265. + }
  39266. +
  39267. + if (val == IW_MAX_FREQUENCIES)
  39268. + break;
  39269. + }
  39270. +
  39271. + range->num_frequency = val;
  39272. + range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
  39273. + IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
  39274. +
  39275. + tmp->scan_capa = 0x01; //YJ,add,080819,for hidden ap
  39276. +
  39277. + return 0;
  39278. +}
  39279. +
  39280. +
  39281. +static int r8180_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
  39282. + union iwreq_data *wrqu, char *b)
  39283. +{
  39284. + struct r8180_priv *priv = ieee80211_priv(dev);
  39285. + struct ieee80211_device* ieee = priv->ieee80211;
  39286. + int ret;
  39287. +
  39288. + if(priv->ieee80211->bHwRadioOff)
  39289. + return 0;
  39290. + //printk("==============>%s()\n",__FUNCTION__);
  39291. + if(!priv->up)
  39292. + return -1;
  39293. +
  39294. + if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
  39295. + {
  39296. + struct iw_scan_req* req = (struct iw_scan_req*)b;
  39297. + if (req->essid_len)
  39298. + {
  39299. + ieee->current_network.ssid_len = req->essid_len;
  39300. + memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
  39301. + }
  39302. + }
  39303. +
  39304. + //set Tr switch to hardware control to scan more bss
  39305. + if(priv->TrSwitchState == TR_SW_TX) {
  39306. + //YJ,add,080611
  39307. + write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
  39308. + write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
  39309. + //YJ,add,080611,end
  39310. + priv->TrSwitchState = TR_HW_CONTROLLED;
  39311. + }
  39312. +#ifdef _RTL8187_EXT_PATCH_
  39313. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  39314. + r8180_wx_mesh_scan(dev,a,wrqu,b);
  39315. + ret = 0;
  39316. + }
  39317. + else
  39318. +#endif
  39319. + {
  39320. + down(&priv->wx_sem);
  39321. + if(priv->ieee80211->state != IEEE80211_LINKED){
  39322. + //printk("===>start no link scan\n");
  39323. + //ieee80211_start_scan(priv->ieee80211);
  39324. + //lzm mod 090115 because wq can't scan complete once
  39325. + //because after start protocal wq scan is in doing
  39326. + //so we should stop it first.
  39327. + ieee80211_stop_scan(priv->ieee80211);
  39328. + ieee80211_start_scan_syncro(priv->ieee80211);
  39329. + ret = 0;
  39330. + } else {
  39331. + ret = ieee80211_wx_set_scan(priv->ieee80211,a,wrqu,b);
  39332. + }
  39333. + up(&priv->wx_sem);
  39334. + }
  39335. + return ret;
  39336. +}
  39337. +
  39338. +
  39339. +static int r8180_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
  39340. + union iwreq_data *wrqu, char *b)
  39341. +{
  39342. +
  39343. + int ret;
  39344. + struct r8180_priv *priv = ieee80211_priv(dev);
  39345. +
  39346. + if(!priv->up) return -1;
  39347. +#ifdef _RTL8187_EXT_PATCH_
  39348. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  39349. + ret = r8180_wx_get_mesh_list(dev, a, wrqu, b);
  39350. + }
  39351. + else
  39352. +#endif
  39353. + {
  39354. + down(&priv->wx_sem);
  39355. +
  39356. + ret = ieee80211_wx_get_scan(priv->ieee80211,a,wrqu,b);
  39357. +
  39358. + up(&priv->wx_sem);
  39359. + }
  39360. + return ret;
  39361. +}
  39362. +
  39363. +
  39364. +static int r8180_wx_set_essid(struct net_device *dev,
  39365. + struct iw_request_info *a,
  39366. + union iwreq_data *wrqu, char *b)
  39367. +{
  39368. + struct r8180_priv *priv = ieee80211_priv(dev);
  39369. + int ret;
  39370. +#ifdef _RTL8187_EXT_PATCH_
  39371. + struct ieee80211_device *ieee = priv->ieee80211;
  39372. + char ch = 0;
  39373. + char tmpmeshid[32];
  39374. + char *p;
  39375. + int tmpmeshid_len=0;
  39376. + int i;
  39377. + short proto_started;
  39378. +#endif
  39379. + if(priv->ieee80211->bHwRadioOff)
  39380. + return 0;
  39381. + //printk("==========>%s()\n",__FUNCTION__);
  39382. + down(&priv->wx_sem);
  39383. +
  39384. +#ifdef _RTL8187_EXT_PATCH_
  39385. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  39386. + if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
  39387. + ret= -E2BIG;
  39388. + goto out;
  39389. + }
  39390. + if (wrqu->essid.flags && (wrqu->essid.length > 1)) {
  39391. + memset(tmpmeshid,0,32);
  39392. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  39393. + tmpmeshid_len=wrqu->essid.length;
  39394. +#else
  39395. + tmpmeshid_len=wrqu->essid.length + 1;
  39396. +#endif
  39397. + p=b+tmpmeshid_len-2;
  39398. + for(i=tmpmeshid_len-1;i>0;i--)
  39399. + {
  39400. + if((*p)=='@')
  39401. + break;
  39402. + p--;
  39403. + }
  39404. + if((i == 0) || (i == 1)){
  39405. + printk("error:wrong meshid\n");
  39406. + ret = -1;
  39407. + goto out;
  39408. + }
  39409. +
  39410. + memcpy(tmpmeshid,b,(i-1));
  39411. + p++;
  39412. + if((tmpmeshid_len-1-i)==1)
  39413. + {
  39414. + if(*p > '9'|| *p <= '0'){
  39415. + goto out;
  39416. + } else {
  39417. + ch = *p - '0';
  39418. + }
  39419. + }
  39420. + else if((tmpmeshid_len-1-i)==2)
  39421. + {
  39422. + if((*p == '1') && (*(p+1) >= '0') && (*(p+1) <= '9'))
  39423. + ch = (*p - '0') * 10 + (*(p+1) - '0');
  39424. + else
  39425. + goto out;
  39426. + }
  39427. + else {
  39428. + ret = 0;
  39429. + goto out;
  39430. + }
  39431. + if(ch > 14)
  39432. + {
  39433. + ret = 0;
  39434. + printk("channel is invalid: %d\n",ch);
  39435. + goto out;
  39436. + }
  39437. + ieee->sync_scan_hurryup = 1;
  39438. +
  39439. + proto_started = ieee->proto_started;
  39440. + if(proto_started)
  39441. + ieee80211_stop_protocol(ieee);
  39442. +
  39443. + printk("==============>tmpmeshid is %s\n",tmpmeshid);
  39444. + priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, tmpmeshid);
  39445. + priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
  39446. + r8180_wx_set_channel(dev, NULL, NULL, &ch);
  39447. + if (proto_started)
  39448. + ieee80211_start_protocol(ieee);
  39449. + }
  39450. + else{
  39451. + printk("BUG:meshid is null\n");
  39452. + ret=0;
  39453. + goto out;
  39454. + }
  39455. +
  39456. + ret = 0;
  39457. + }
  39458. + else
  39459. +#endif
  39460. + {
  39461. + ret = ieee80211_wx_set_essid(priv->ieee80211,a,wrqu,b);
  39462. + }
  39463. +
  39464. +#ifdef _RTL8187_EXT_PATCH_
  39465. +out:
  39466. +#endif
  39467. + up(&priv->wx_sem);
  39468. + return ret;
  39469. +}
  39470. +
  39471. +
  39472. +static int r8180_wx_get_essid(struct net_device *dev,
  39473. + struct iw_request_info *a,
  39474. + union iwreq_data *wrqu, char *b)
  39475. +{
  39476. + int ret;
  39477. + struct r8180_priv *priv = ieee80211_priv(dev);
  39478. +
  39479. + down(&priv->wx_sem);
  39480. +
  39481. + ret = ieee80211_wx_get_essid(priv->ieee80211, a, wrqu, b);
  39482. +
  39483. + up(&priv->wx_sem);
  39484. +
  39485. + return ret;
  39486. +}
  39487. +
  39488. +
  39489. +static int r8180_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
  39490. + union iwreq_data *wrqu, char *b)
  39491. +{
  39492. + int ret;
  39493. + struct r8180_priv *priv = ieee80211_priv(dev);
  39494. +
  39495. + if(priv->ieee80211->bHwRadioOff)
  39496. + return 0;
  39497. +
  39498. + down(&priv->wx_sem);
  39499. +
  39500. + ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b);
  39501. +
  39502. + up(&priv->wx_sem);
  39503. + return ret;
  39504. +}
  39505. +
  39506. +static int r8180_wx_get_name(struct net_device *dev,
  39507. + struct iw_request_info *info,
  39508. + union iwreq_data *wrqu, char *extra)
  39509. +{
  39510. + struct r8180_priv *priv = ieee80211_priv(dev);
  39511. + return ieee80211_wx_get_name(priv->ieee80211, info, wrqu, extra);
  39512. +}
  39513. +
  39514. +
  39515. +static int r8180_wx_set_frag(struct net_device *dev,
  39516. + struct iw_request_info *info,
  39517. + union iwreq_data *wrqu, char *extra)
  39518. +{
  39519. + struct r8180_priv *priv = ieee80211_priv(dev);
  39520. +
  39521. + if(priv->ieee80211->bHwRadioOff)
  39522. + return 0;
  39523. +
  39524. + if (wrqu->frag.disabled)
  39525. + priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
  39526. + else {
  39527. + if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
  39528. + wrqu->frag.value > MAX_FRAG_THRESHOLD)
  39529. + return -EINVAL;
  39530. +
  39531. + priv->ieee80211->fts = wrqu->frag.value & ~0x1;
  39532. + }
  39533. +
  39534. + return 0;
  39535. +}
  39536. +
  39537. +
  39538. +static int r8180_wx_get_frag(struct net_device *dev,
  39539. + struct iw_request_info *info,
  39540. + union iwreq_data *wrqu, char *extra)
  39541. +{
  39542. + struct r8180_priv *priv = ieee80211_priv(dev);
  39543. +
  39544. + wrqu->frag.value = priv->ieee80211->fts;
  39545. + wrqu->frag.fixed = 0; /* no auto select */
  39546. + wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
  39547. +
  39548. + return 0;
  39549. +}
  39550. +
  39551. +
  39552. +static int r8180_wx_set_wap(struct net_device *dev,
  39553. + struct iw_request_info *info,
  39554. + union iwreq_data *awrq,
  39555. + char *extra)
  39556. +{
  39557. + int ret;
  39558. + struct r8180_priv *priv = ieee80211_priv(dev);
  39559. + if(priv->ieee80211->bHwRadioOff)
  39560. + return 0;
  39561. +
  39562. + //printk("in function %s\n",__FUNCTION__);
  39563. +#ifdef _RTL8187_EXT_PATCH_
  39564. + if (priv->mshobj && (priv->ieee80211->iw_ext_mode==11)){
  39565. + return 0;
  39566. + }
  39567. +#endif
  39568. + down(&priv->wx_sem);
  39569. +
  39570. + ret = ieee80211_wx_set_wap(priv->ieee80211,info,awrq,extra);
  39571. +
  39572. + up(&priv->wx_sem);
  39573. + return ret;
  39574. +
  39575. +}
  39576. +
  39577. +
  39578. +static int r8180_wx_get_wap(struct net_device *dev,
  39579. + struct iw_request_info *info,
  39580. + union iwreq_data *wrqu, char *extra)
  39581. +{
  39582. + struct r8180_priv *priv = ieee80211_priv(dev);
  39583. +
  39584. + return ieee80211_wx_get_wap(priv->ieee80211,info,wrqu,extra);
  39585. +}
  39586. +
  39587. +
  39588. +static int r8180_wx_get_enc(struct net_device *dev,
  39589. + struct iw_request_info *info,
  39590. + union iwreq_data *wrqu, char *key)
  39591. +{
  39592. + struct r8180_priv *priv = ieee80211_priv(dev);
  39593. +
  39594. + return ieee80211_wx_get_encode(priv->ieee80211, info, wrqu, key);
  39595. +}
  39596. +
  39597. +static int r8180_wx_set_enc(struct net_device *dev,
  39598. + struct iw_request_info *info,
  39599. + union iwreq_data *wrqu, char *key)
  39600. +{
  39601. + struct r8180_priv *priv = ieee80211_priv(dev);
  39602. + int ret;
  39603. +#ifdef JOHN_HWSEC
  39604. +// struct ieee80211_device *ieee = priv->ieee80211;
  39605. +// u32 TargetContent;
  39606. + u32 hwkey[4]={0,0,0,0};
  39607. + u8 mask=0xff;
  39608. + u32 key_idx=0;
  39609. + u8 broadcast_addr[6] ={ 0xff,0xff,0xff,0xff,0xff,0xff};
  39610. + u8 zero_addr[4][6] ={ {0x00,0x00,0x00,0x00,0x00,0x00},
  39611. + {0x00,0x00,0x00,0x00,0x00,0x01},
  39612. + {0x00,0x00,0x00,0x00,0x00,0x02},
  39613. + {0x00,0x00,0x00,0x00,0x00,0x03} };
  39614. + int i;
  39615. +
  39616. +#endif
  39617. +
  39618. + if(priv->ieee80211->bHwRadioOff)
  39619. + return 0;
  39620. +
  39621. + down(&priv->wx_sem);
  39622. +
  39623. + DMESG("Setting SW wep key");
  39624. + ret = ieee80211_wx_set_encode(priv->ieee80211,info,wrqu,key);
  39625. +
  39626. + up(&priv->wx_sem);
  39627. +
  39628. +#ifdef JOHN_HWSEC
  39629. +
  39630. + //sometimes, the length is zero while we do not type key value
  39631. + if(wrqu->encoding.length!=0){
  39632. +
  39633. + for(i=0 ; i<4 ; i++){
  39634. + hwkey[i] |= key[4*i+0]&mask;
  39635. + if(i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
  39636. + if(i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
  39637. + hwkey[i] |= (key[4*i+1]&mask)<<8;
  39638. + hwkey[i] |= (key[4*i+2]&mask)<<16;
  39639. + hwkey[i] |= (key[4*i+3]&mask)<<24;
  39640. + }
  39641. +
  39642. + #define CONF_WEP40 0x4
  39643. + #define CONF_WEP104 0x14
  39644. +
  39645. + switch(wrqu->encoding.flags){
  39646. + case 0:
  39647. + case 1: key_idx = 0; break;
  39648. + case 2: key_idx = 1; break;
  39649. + case 3: key_idx = 2; break;
  39650. + case 4: key_idx = 3; break;
  39651. + default: break;
  39652. + }
  39653. +
  39654. + if(wrqu->encoding.length==0x5){
  39655. + setKey( dev,
  39656. + key_idx, //EntryNo
  39657. + key_idx, //KeyIndex
  39658. + KEY_TYPE_WEP40, //KeyType
  39659. + zero_addr[key_idx],
  39660. + 0, //DefaultKey
  39661. + hwkey); //KeyContent
  39662. +
  39663. + if(key_idx == 0){
  39664. +
  39665. + write_nic_byte(dev, WPA_CONFIG, 7);
  39666. +
  39667. + setKey( dev,
  39668. + 4, //EntryNo
  39669. + key_idx, //KeyIndex
  39670. + KEY_TYPE_WEP40, //KeyType
  39671. + broadcast_addr, //addr
  39672. + 0, //DefaultKey
  39673. + hwkey); //KeyContent
  39674. + }
  39675. + }
  39676. +
  39677. + else if(wrqu->encoding.length==0xd){
  39678. + setKey( dev,
  39679. + key_idx, //EntryNo
  39680. + key_idx, //KeyIndex
  39681. + KEY_TYPE_WEP104, //KeyType
  39682. + zero_addr[key_idx],
  39683. + 0, //DefaultKey
  39684. + hwkey); //KeyContent
  39685. +
  39686. + if(key_idx == 0){
  39687. +
  39688. + write_nic_byte(dev, WPA_CONFIG, 7);
  39689. +
  39690. + setKey( dev,
  39691. + 4, //EntryNo
  39692. + key_idx, //KeyIndex
  39693. + KEY_TYPE_WEP104, //KeyType
  39694. + broadcast_addr, //addr
  39695. + 0, //DefaultKey
  39696. + hwkey); //KeyContent
  39697. + }
  39698. + }
  39699. + else printk("wrong type in WEP, not WEP40 and WEP104\n");
  39700. +
  39701. + }
  39702. +
  39703. + //consider the setting different key index situation
  39704. + //wrqu->encoding.flags = 801 means that we set key with index "1"
  39705. + if(wrqu->encoding.length==0 && (wrqu->encoding.flags >>8) == 0x8 ){
  39706. +
  39707. + write_nic_byte(dev, WPA_CONFIG, 7);
  39708. +
  39709. + //copy wpa config from default key(key0~key3) to broadcast key(key5)
  39710. + //
  39711. + key_idx = (wrqu->encoding.flags & 0xf)-1 ;
  39712. + write_cam(dev, (4*6), 0xffff0000|read_cam(dev, key_idx*6) );
  39713. + write_cam(dev, (4*6)+1, 0xffffffff);
  39714. + write_cam(dev, (4*6)+2, read_cam(dev, (key_idx*6)+2) );
  39715. + write_cam(dev, (4*6)+3, read_cam(dev, (key_idx*6)+3) );
  39716. + write_cam(dev, (4*6)+4, read_cam(dev, (key_idx*6)+4) );
  39717. + write_cam(dev, (4*6)+5, read_cam(dev, (key_idx*6)+5) );
  39718. + }
  39719. +
  39720. +#endif /*JOHN_HWSEC*/
  39721. + return ret;
  39722. +}
  39723. +
  39724. +
  39725. +static int r8180_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union
  39726. + iwreq_data *wrqu, char *p){
  39727. +
  39728. + struct r8180_priv *priv = ieee80211_priv(dev);
  39729. + int *parms=(int*)p;
  39730. + int mode=parms[0];
  39731. +
  39732. + if(priv->ieee80211->bHwRadioOff)
  39733. + return 0;
  39734. +
  39735. + priv->ieee80211->active_scan = mode;
  39736. +
  39737. + return 1;
  39738. +}
  39739. +
  39740. +
  39741. +
  39742. +static int r8180_wx_set_retry(struct net_device *dev,
  39743. + struct iw_request_info *info,
  39744. + union iwreq_data *wrqu, char *extra)
  39745. +{
  39746. + struct r8180_priv *priv = ieee80211_priv(dev);
  39747. + int err = 0;
  39748. +
  39749. + if(priv->ieee80211->bHwRadioOff)
  39750. + return 0;
  39751. +
  39752. + down(&priv->wx_sem);
  39753. +
  39754. + if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
  39755. + wrqu->retry.disabled){
  39756. + err = -EINVAL;
  39757. + goto exit;
  39758. + }
  39759. + if (!(wrqu->retry.flags & IW_RETRY_LIMIT)){
  39760. + err = -EINVAL;
  39761. + goto exit;
  39762. + }
  39763. +
  39764. + if(wrqu->retry.value > R8180_MAX_RETRY){
  39765. + err= -EINVAL;
  39766. + goto exit;
  39767. + }
  39768. + if (wrqu->retry.flags & IW_RETRY_MAX) {
  39769. + priv->retry_rts = wrqu->retry.value;
  39770. + DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
  39771. +
  39772. + }else {
  39773. + priv->retry_data = wrqu->retry.value;
  39774. + DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
  39775. + }
  39776. +
  39777. + /* FIXME !
  39778. + * We might try to write directly the TX config register
  39779. + * or to restart just the (R)TX process.
  39780. + * I'm unsure if whole reset is really needed
  39781. + */
  39782. +
  39783. + rtl8180_commit(dev);
  39784. + /*
  39785. + if(priv->up){
  39786. + rtl8180_rtx_disable(dev);
  39787. + rtl8180_rx_enable(dev);
  39788. + rtl8180_tx_enable(dev);
  39789. +
  39790. + }
  39791. + */
  39792. +exit:
  39793. + up(&priv->wx_sem);
  39794. +
  39795. + return err;
  39796. +}
  39797. +
  39798. +static int r8180_wx_get_retry(struct net_device *dev,
  39799. + struct iw_request_info *info,
  39800. + union iwreq_data *wrqu, char *extra)
  39801. +{
  39802. + struct r8180_priv *priv = ieee80211_priv(dev);
  39803. +
  39804. +
  39805. + wrqu->retry.disabled = 0; /* can't be disabled */
  39806. +
  39807. + if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
  39808. + IW_RETRY_LIFETIME)
  39809. + return -EINVAL;
  39810. +
  39811. + if (wrqu->retry.flags & IW_RETRY_MAX) {
  39812. + wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
  39813. + wrqu->retry.value = priv->retry_rts;
  39814. + } else {
  39815. + wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MIN;
  39816. + wrqu->retry.value = priv->retry_data;
  39817. + }
  39818. + //DMESG("returning %d",wrqu->retry.value);
  39819. +
  39820. +
  39821. + return 0;
  39822. +}
  39823. +
  39824. +static int r8180_wx_get_sens(struct net_device *dev,
  39825. + struct iw_request_info *info,
  39826. + union iwreq_data *wrqu, char *extra)
  39827. +{
  39828. + struct r8180_priv *priv = ieee80211_priv(dev);
  39829. + if(priv->rf_set_sens == NULL)
  39830. + return -1; /* we have not this support for this radio */
  39831. + wrqu->sens.value = priv->sens;
  39832. + return 0;
  39833. +}
  39834. +
  39835. +
  39836. +static int r8180_wx_set_sens(struct net_device *dev,
  39837. + struct iw_request_info *info,
  39838. + union iwreq_data *wrqu, char *extra)
  39839. +{
  39840. +
  39841. + struct r8180_priv *priv = ieee80211_priv(dev);
  39842. +
  39843. + short err = 0;
  39844. +
  39845. + if(priv->ieee80211->bHwRadioOff)
  39846. + return 0;
  39847. +
  39848. + down(&priv->wx_sem);
  39849. + //DMESG("attempt to set sensivity to %ddb",wrqu->sens.value);
  39850. + if(priv->rf_set_sens == NULL) {
  39851. + err= -1; /* we have not this support for this radio */
  39852. + goto exit;
  39853. + }
  39854. + if(priv->rf_set_sens(dev, wrqu->sens.value) == 0)
  39855. + priv->sens = wrqu->sens.value;
  39856. + else
  39857. + err= -EINVAL;
  39858. +
  39859. +exit:
  39860. + up(&priv->wx_sem);
  39861. +
  39862. + return err;
  39863. +}
  39864. +
  39865. +
  39866. +static int dummy(struct net_device *dev, struct iw_request_info *a,
  39867. + union iwreq_data *wrqu,char *b)
  39868. +{
  39869. + return -1;
  39870. +}
  39871. +static int r8180_wx_set_enc_ext(struct net_device *dev,
  39872. + struct iw_request_info *info,
  39873. + union iwreq_data *wrqu, char *extra)
  39874. +{
  39875. +
  39876. + struct r8180_priv *priv = ieee80211_priv(dev);
  39877. + //printk("===>%s()\n", __FUNCTION__);
  39878. +
  39879. + int ret=0;
  39880. +
  39881. + if(priv->ieee80211->bHwRadioOff)
  39882. + return 0;
  39883. +
  39884. + down(&priv->wx_sem);
  39885. + ret = ieee80211_wx_set_encode_ext(priv->ieee80211, info, wrqu, extra);
  39886. + up(&priv->wx_sem);
  39887. + return ret;
  39888. +
  39889. +}
  39890. +static int r8180_wx_set_auth(struct net_device *dev,
  39891. + struct iw_request_info *info,
  39892. + union iwreq_data* data, char *extra)
  39893. +{
  39894. + //printk("====>%s()\n", __FUNCTION__);
  39895. + struct r8180_priv *priv = ieee80211_priv(dev);
  39896. + int ret=0;
  39897. +
  39898. + if(priv->ieee80211->bHwRadioOff)
  39899. + return 0;
  39900. +
  39901. + down(&priv->wx_sem);
  39902. + ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra);
  39903. + up(&priv->wx_sem);
  39904. + return ret;
  39905. +}
  39906. +
  39907. +static int r8180_wx_set_mlme(struct net_device *dev,
  39908. + struct iw_request_info *info,
  39909. + union iwreq_data *wrqu, char *extra)
  39910. +{
  39911. + //printk("====>%s()\n", __FUNCTION__);
  39912. +
  39913. + int ret=0;
  39914. + struct r8180_priv *priv = ieee80211_priv(dev);
  39915. +
  39916. + if(priv->ieee80211->bHwRadioOff)
  39917. + return 0;
  39918. +
  39919. + down(&priv->wx_sem);
  39920. +#if 1
  39921. + ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra);
  39922. +#endif
  39923. + up(&priv->wx_sem);
  39924. + return ret;
  39925. +}
  39926. +
  39927. +static int r8180_wx_set_gen_ie(struct net_device *dev,
  39928. + struct iw_request_info *info,
  39929. + union iwreq_data* data, char *extra)
  39930. +{
  39931. + //printk("====>%s(), len:%d\n", __FUNCTION__, data->length);
  39932. + int ret=0;
  39933. + struct r8180_priv *priv = ieee80211_priv(dev);
  39934. +
  39935. + if(priv->ieee80211->bHwRadioOff)
  39936. + return 0;
  39937. +
  39938. + down(&priv->wx_sem);
  39939. +#if 1
  39940. + ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length);
  39941. +#endif
  39942. + up(&priv->wx_sem);
  39943. + //printk("<======%s(), ret:%d\n", __FUNCTION__, ret);
  39944. + return ret;
  39945. +
  39946. +
  39947. +}
  39948. +
  39949. +#ifdef _RTL8187_EXT_PATCH_
  39950. +/*
  39951. + Output:
  39952. + (case 1) Mesh: Enable. MESHID=[%s] (max length of %s is 32 bytes).
  39953. + (case 2) Mesh: Disable.
  39954. +*/
  39955. +static int r8180_wx_get_meshinfo(struct net_device *dev,
  39956. + struct iw_request_info *info,
  39957. + union iwreq_data *wrqu, char *extra)
  39958. +{
  39959. + struct r8180_priv *priv = ieee80211_priv(dev);
  39960. +
  39961. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_meshinfo )
  39962. + return 0;
  39963. + return priv->mshobj->ext_patch_r8180_wx_get_meshinfo(dev, info, wrqu, extra);
  39964. +}
  39965. +
  39966. +
  39967. +static int r8180_wx_enable_mesh(struct net_device *dev,
  39968. + struct iw_request_info *info,
  39969. + union iwreq_data *wrqu, char *extra)
  39970. +{
  39971. + struct r8180_priv *priv = ieee80211_priv(dev);
  39972. + struct ieee80211_device *ieee = priv->ieee80211;
  39973. +
  39974. + int ret = 0;
  39975. +
  39976. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_enable_mesh )
  39977. + return 0;
  39978. +
  39979. + down(&priv->wx_sem);
  39980. + if(priv->mshobj->ext_patch_r8180_wx_enable_mesh(dev))
  39981. + {
  39982. + union iwreq_data tmprqu;
  39983. + tmprqu.mode = ieee->iw_mode;
  39984. + ieee->iw_mode = 0;
  39985. + ret = ieee80211_wx_set_mode(ieee, info, &tmprqu, extra);
  39986. + rtl8187_set_rxconf(dev);
  39987. + }
  39988. +
  39989. + up(&priv->wx_sem);
  39990. +
  39991. + return ret;
  39992. +
  39993. +}
  39994. +
  39995. +static int r8180_wx_disable_mesh(struct net_device *dev,
  39996. + struct iw_request_info *info,
  39997. + union iwreq_data *wrqu, char *extra)
  39998. +{
  39999. + struct r8180_priv *priv = ieee80211_priv(dev);
  40000. + struct ieee80211_device *ieee = priv->ieee80211;
  40001. +
  40002. + int ret = 0;
  40003. +
  40004. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_disable_mesh )
  40005. + return 0;
  40006. +
  40007. + down(&priv->wx_sem);
  40008. + if(priv->mshobj->ext_patch_r8180_wx_disable_mesh(dev))
  40009. + {
  40010. + union iwreq_data tmprqu;
  40011. + tmprqu.mode = ieee->iw_mode;
  40012. + ieee->iw_mode = 999;
  40013. + ret = ieee80211_wx_set_mode(ieee, info, &tmprqu, extra);
  40014. + rtl8187_set_rxconf(dev);
  40015. + }
  40016. +
  40017. + up(&priv->wx_sem);
  40018. +
  40019. + return ret;
  40020. +}
  40021. +
  40022. +
  40023. +int r8180_wx_set_channel(struct net_device *dev,
  40024. + struct iw_request_info *info,
  40025. + union iwreq_data *wrqu, char *extra)
  40026. +{
  40027. + int ch = *extra;
  40028. + struct r8180_priv *priv = ieee80211_priv(dev);
  40029. + struct ieee80211_device *ieee = priv->ieee80211;
  40030. +
  40031. + if(priv->ieee80211->bHwRadioOff)
  40032. + return 0;
  40033. +
  40034. + // is 11s ?
  40035. + if (!priv->mshobj || (ieee->iw_mode != ieee->iw_ext_mode) || !priv->mshobj->ext_patch_r8180_wx_set_channel )
  40036. + return 0;
  40037. +
  40038. + printk("set channel = %d\n", ch);
  40039. + if ( ch < 0 )
  40040. + {
  40041. + ieee80211_start_scan(ieee); // auto
  40042. + ieee->meshScanMode =2;
  40043. + }
  40044. + else
  40045. + {
  40046. +//#ifdef NETWORKMANAGER_UI
  40047. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  40048. + }
  40049. +//#else
  40050. + else{
  40051. + down(&priv->wx_sem);}
  40052. +//#endif
  40053. + ieee->meshScanMode =0;
  40054. + // ieee->set_chan(dev, ch);
  40055. +//#ifdef _RTL8187_EXT_PATCH_
  40056. + if(priv->mshobj->ext_patch_r8180_wx_set_channel)
  40057. + {
  40058. + priv->mshobj->ext_patch_r8180_wx_set_channel(ieee, ch);
  40059. + priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
  40060. + }
  40061. +//#endif
  40062. + ieee->set_chan(ieee->dev, ch);
  40063. + ieee->current_network.channel = ch;
  40064. + queue_work(ieee->wq, &ieee->ext_stop_scan_wq);
  40065. + ieee80211_ext_send_11s_beacon(ieee);
  40066. +//#ifdef NETWORKMANAGER_UI
  40067. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  40068. + }
  40069. +//#else
  40070. + else{
  40071. + up(&priv->wx_sem);}
  40072. +//#endif
  40073. + //up(&ieee->wx_sem);
  40074. +
  40075. + // ieee80211_stop_scan(ieee); // user set
  40076. + //
  40077. +
  40078. + /*
  40079. + netif_carrier_off(ieee->dev);
  40080. +
  40081. + if (ieee->data_hard_stop)
  40082. + ieee->data_hard_stop(ieee->dev);
  40083. +
  40084. + ieee->state = IEEE80211_NOLINK;
  40085. + ieee->link_change(ieee->dev);
  40086. +
  40087. + ieee->current_network.channel = fwrq->m;
  40088. + ieee->set_chan(ieee->dev, ieee->current_network.channel);
  40089. +
  40090. +
  40091. + if (ieee->data_hard_resume)
  40092. + ieee->data_hard_resume(ieee->dev);
  40093. +
  40094. + netif_carrier_on(ieee->dev);
  40095. + */
  40096. +
  40097. + }
  40098. +
  40099. + return 0;
  40100. +}
  40101. +
  40102. +static int r8180_wx_set_meshID(struct net_device *dev,
  40103. + struct iw_request_info *info,
  40104. + union iwreq_data *wrqu, char *extra)
  40105. +{
  40106. + struct r8180_priv *priv = ieee80211_priv(dev);
  40107. +
  40108. + if(priv->ieee80211->bHwRadioOff)
  40109. + return 0;
  40110. +
  40111. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_meshID )
  40112. + return 0;
  40113. +
  40114. + //printk("len=%d\n", wrqu->data.length);
  40115. + //printk("\nCall setMeshid.");
  40116. + return priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, wrqu->data.pointer);
  40117. +}
  40118. +
  40119. +
  40120. +/* reserved for future
  40121. +static int r8180_wx_add_mac_allow(struct net_device *dev,
  40122. + struct iw_request_info *info,
  40123. + union iwreq_data *wrqu, char *extra)
  40124. +{
  40125. + struct r8180_priv *priv = ieee80211_priv(dev);
  40126. +
  40127. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_add_mac_allow )
  40128. + return 0;
  40129. +
  40130. + return priv->mshobj->ext_patch_r8180_wx_set_add_mac_allow(dev, info, wrqu, extra);
  40131. +}
  40132. +
  40133. +static int r8180_wx_del_mac_allow(struct net_device *dev,
  40134. + struct iw_request_info *info,
  40135. + union iwreq_data *wrqu, char *extra)
  40136. +{
  40137. + struct r8180_priv *priv = ieee80211_priv(dev);
  40138. +
  40139. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_del_mac_allow )
  40140. + return 0;
  40141. +
  40142. + return priv->mshobj->ext_patch_r8180_wx_set_del_mac_allow(dev, info, wrqu, extra);
  40143. +}
  40144. +*/
  40145. +static int r8180_wx_add_mac_deny(struct net_device *dev,
  40146. + struct iw_request_info *info,
  40147. + union iwreq_data *wrqu, char *extra)
  40148. +{
  40149. + struct r8180_priv *priv = ieee80211_priv(dev);
  40150. +
  40151. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_add_mac_deny )
  40152. + return 0;
  40153. +
  40154. + return priv->mshobj->ext_patch_r8180_wx_set_add_mac_deny(dev, info, wrqu, extra);
  40155. +}
  40156. +
  40157. +static int r8180_wx_del_mac_deny(struct net_device *dev,
  40158. + struct iw_request_info *info,
  40159. + union iwreq_data *wrqu, char *extra)
  40160. +{
  40161. + struct r8180_priv *priv = ieee80211_priv(dev);
  40162. +
  40163. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_del_mac_deny )
  40164. + return 0;
  40165. +
  40166. + return priv->mshobj->ext_patch_r8180_wx_set_del_mac_deny(dev, info, wrqu, extra);
  40167. +}
  40168. +
  40169. +/* reserved for future
  40170. +static int r8180_wx_get_mac_allow(struct net_device *dev,
  40171. + struct iw_request_info *info,
  40172. + union iwreq_data *wrqu, char *extra)
  40173. +{
  40174. + struct r8180_priv *priv = ieee80211_priv(dev);
  40175. +
  40176. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mac_allow )
  40177. + return 0;
  40178. +
  40179. + return priv->mshobj->ext_patch_r8180_wx_get_mac_allow(dev, info, wrqu, extra);
  40180. +}
  40181. +*/
  40182. +
  40183. +static int r8180_wx_get_mac_deny(struct net_device *dev,
  40184. + struct iw_request_info *info,
  40185. + union iwreq_data *wrqu, char *extra)
  40186. +{
  40187. + struct r8180_priv *priv = ieee80211_priv(dev);
  40188. +
  40189. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mac_deny )
  40190. + return 0;
  40191. +
  40192. + return priv->mshobj->ext_patch_r8180_wx_get_mac_deny(dev, info, wrqu, extra);
  40193. +}
  40194. +
  40195. +
  40196. +static int r8180_wx_get_mesh_list(struct net_device *dev,
  40197. + struct iw_request_info *info,
  40198. + union iwreq_data *wrqu, char *extra)
  40199. +{
  40200. + struct r8180_priv *priv = ieee80211_priv(dev);
  40201. +
  40202. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mesh_list )
  40203. + return 0;
  40204. +
  40205. + return priv->mshobj->ext_patch_r8180_wx_get_mesh_list(dev, info, wrqu, extra);
  40206. +}
  40207. +
  40208. +static int r8180_wx_mesh_scan(struct net_device *dev,
  40209. + struct iw_request_info *info,
  40210. + union iwreq_data *wrqu, char *extra)
  40211. +{
  40212. + struct r8180_priv *priv = ieee80211_priv(dev);
  40213. +
  40214. + if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_mesh_scan )
  40215. + return 0;
  40216. +
  40217. + return priv->mshobj->ext_patch_r8180_wx_mesh_scan(dev, info, wrqu, extra);
  40218. +}
  40219. +
  40220. +static int r8180_wx_join_mesh(struct net_device *dev,
  40221. + struct iw_request_info *info,
  40222. + union iwreq_data *wrqu, char *extra)
  40223. +{
  40224. + struct r8180_priv *priv = ieee80211_priv(dev);
  40225. + int index;
  40226. + int ret=0;
  40227. + char extmeshid[32];
  40228. + int len=0;
  40229. + char id[50], ch;
  40230. +//#ifdef NETWORKMANAGER_UI
  40231. +
  40232. + if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
  40233. + printk("join mesh %s\n",extra);
  40234. + if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
  40235. + ret= -E2BIG;
  40236. + goto out;
  40237. + }
  40238. + //printk("wrqu->essid.length is %d\n",wrqu->essid.length);
  40239. + //printk("wrqu->essid.flags is %d\n",wrqu->essid.flags);
  40240. + if((wrqu->essid.length == 1) && (wrqu->essid.flags == 1)){
  40241. + ret = 0;
  40242. + goto out;
  40243. + }
  40244. + if (wrqu->essid.flags && wrqu->essid.length) {
  40245. + if(priv->mshobj->ext_patch_r8180_wx_get_selected_mesh_channel(dev, extra, &ch))
  40246. + {
  40247. + priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, extra);
  40248. + priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
  40249. + r8180_wx_set_channel(dev, NULL, NULL, &ch);
  40250. + }
  40251. + else
  40252. + printk("invalid mesh #\n");
  40253. +
  40254. + }
  40255. +#if 0
  40256. + else{
  40257. + if(priv->mshobj->ext_patch_r8180_wx_get_selected_mesh_channel(dev, 0, &ch))
  40258. + {
  40259. + priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, extra);
  40260. + priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
  40261. + r8180_wx_set_channel(dev, NULL, NULL, &ch);
  40262. + }
  40263. + else
  40264. + printk("invalid mesh #\n");
  40265. +
  40266. + }
  40267. +#endif
  40268. + }
  40269. + else{
  40270. +//#else
  40271. + index = *(extra);
  40272. +// printk("index=%d\n", index);
  40273. +
  40274. + if( ! priv->mshobj
  40275. + || !priv->mshobj->ext_patch_r8180_wx_set_meshID
  40276. + || !priv->mshobj->ext_patch_r8180_wx_get_selected_mesh )
  40277. + return 0;
  40278. +
  40279. + if( priv->mshobj->ext_patch_r8180_wx_get_selected_mesh(dev, index, &ch, id) )
  40280. + {
  40281. + // printk("ch=%d, id=%s\n", ch, id);
  40282. + priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, id);
  40283. + priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
  40284. + r8180_wx_set_channel(dev, NULL, NULL, &ch);
  40285. + }
  40286. + else
  40287. + printk("invalid mesh #\n");
  40288. + }
  40289. +//#endif
  40290. +out:
  40291. + return ret;
  40292. +}
  40293. +
  40294. +#endif // _RTL8187_EXT_PATCH_
  40295. +
  40296. +
  40297. +static int r8180_wx_get_radion(struct net_device *dev,
  40298. + struct iw_request_info *info,
  40299. + union iwreq_data *wrqu, char *extra)
  40300. +{
  40301. + struct r8180_priv *priv = ieee80211_priv(dev);
  40302. +// u8 addr;
  40303. +
  40304. + down(&priv->wx_sem);
  40305. + if(priv->radion == 1) {
  40306. + *(int *)extra = 1;
  40307. + } else {
  40308. +
  40309. + *(int *)extra = 0;
  40310. + }
  40311. + up(&priv->wx_sem);
  40312. + return 0;
  40313. +
  40314. +}
  40315. +
  40316. +static int r8180_wx_set_radion(struct net_device *dev,
  40317. + struct iw_request_info *info,
  40318. + union iwreq_data *wrqu, char *extra)
  40319. +{
  40320. + int radion = *extra;
  40321. + struct r8180_priv *priv = ieee80211_priv(dev);
  40322. +// struct ieee80211_device *ieee = priv->ieee80211;
  40323. + u8 btCR9346, btConfig3;
  40324. + int i;
  40325. + u16 u2bTFPC = 0;
  40326. + u8 u1bTmp;
  40327. +
  40328. + if(priv->ieee80211->bHwRadioOff)
  40329. + return 0;
  40330. +
  40331. + down(&priv->wx_sem);
  40332. + printk("set radion = %d\n", radion);
  40333. +
  40334. +#ifdef _RTL8187_EXT_PATCH_
  40335. + if(ieee->iw_mode == ieee->iw_ext_mode) {
  40336. + printk("mesh mode:: could not set radi on/off = %d\n", radion);
  40337. + up(&priv->wx_sem);
  40338. + return 0;
  40339. + }
  40340. +#endif
  40341. + // Set EEM0 and EEM1 in 9346CR.
  40342. + btCR9346 = read_nic_byte(dev, CR9346);
  40343. + write_nic_byte(dev, CR9346, (btCR9346|0xC0) );
  40344. + // Set PARM_En in Config3.
  40345. + btConfig3 = read_nic_byte(dev, CONFIG3);
  40346. + write_nic_byte(dev, CONFIG3, (btConfig3|CONFIG3_PARM_En) );
  40347. +
  40348. + if ( radion == 1) //radion off
  40349. + {
  40350. + printk("==================>RF on\n");
  40351. + write_nic_dword(dev, ANAPARAM, ANAPARM_ON);
  40352. + write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON);
  40353. + write_nic_byte(dev, CONFIG4, (priv->RFProgType));
  40354. +
  40355. + write_nic_byte(dev, 0x085, 0x24); // 061219, SD3 ED: for minicard CCK power leakage issue.
  40356. + write_rtl8225(dev, 0x4, 0x9FF);
  40357. +
  40358. + u1bTmp = read_nic_byte(dev, 0x24E);
  40359. + write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5|BIT6))) );// 070124 SD1 Alex: turn on CCK and OFDM.
  40360. + priv->radion = 1; //radion on
  40361. + }
  40362. + else
  40363. + {
  40364. + printk("==================>RF off\n");
  40365. + for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B; i++)
  40366. + { // Make sure TX FIFO is empty befor turn off RFE pwoer.
  40367. + u2bTFPC = read_nic_word(dev, TFPC);
  40368. + if(u2bTFPC == 0)
  40369. + {
  40370. + break;
  40371. + }
  40372. + else
  40373. + {
  40374. + printk("%d times TFPC: %d != 0 before doze!\n", (i+1), u2bTFPC);
  40375. + udelay(10);
  40376. + }
  40377. + }
  40378. + if( i == MAX_DOZE_WAITING_TIMES_87B )
  40379. + {
  40380. + printk("\n\n\n SetZebraRFPowerState8187B(): %d times TFPC: %d != 0 !!!\n\n\n",\
  40381. + MAX_DOZE_WAITING_TIMES_87B, u2bTFPC);
  40382. + }
  40383. +
  40384. + u1bTmp = read_nic_byte(dev, 0x24E);
  40385. + write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
  40386. +
  40387. + write_rtl8225(dev, 0x4,0x1FF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
  40388. + write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
  40389. +
  40390. + write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
  40391. +
  40392. + write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
  40393. + write_nic_dword(dev, ANAPARAM2, ANAPARM2_OFF); // 070301, SD1 William: to reduce RF off power consumption to 80 mA.
  40394. + priv->radion = 0; //radion off
  40395. + }
  40396. + // Clear PARM_En in Config3.
  40397. + btConfig3 &= ~(CONFIG3_PARM_En);
  40398. + write_nic_byte(dev, CONFIG3, btConfig3);
  40399. + // Clear EEM0 and EEM1 in 9346CR.
  40400. + btCR9346 &= ~(0xC0);
  40401. + write_nic_byte(dev, CR9346, btCR9346);
  40402. +
  40403. + up(&priv->wx_sem);
  40404. +
  40405. + return 0;
  40406. +}
  40407. +
  40408. +static int r8180_wx_set_ratadpt (struct net_device *dev,
  40409. + struct iw_request_info *info,
  40410. + union iwreq_data *wrqu, char *extra)
  40411. +{
  40412. + int ratadapt = *extra;
  40413. + struct r8180_priv *priv = ieee80211_priv(dev);
  40414. + struct ieee80211_device *ieee = priv->ieee80211;
  40415. +
  40416. + if(priv->ieee80211->bHwRadioOff)
  40417. + return 0;
  40418. +
  40419. + down(&priv->wx_sem);
  40420. + printk("Set rate adaptive %s\n", (ratadapt==0)?"on":"off");
  40421. + if(ratadapt == 0) {
  40422. + del_timer_sync(&priv->rateadapter_timer);
  40423. + cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
  40424. + priv->rateadapter_timer.function((unsigned long)dev);
  40425. + } else {
  40426. + del_timer_sync(&priv->rateadapter_timer);
  40427. + cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
  40428. + printk("force rate to %d\n", ratadapt);
  40429. + ieee->rate = ratadapt;
  40430. + }
  40431. + up(&priv->wx_sem);
  40432. + return 0;
  40433. +}
  40434. +
  40435. +#ifdef ENABLE_TOSHIBA_CONFIG
  40436. +static int r8180_wx_get_tblidx(struct net_device *dev,
  40437. + struct iw_request_info *info,
  40438. + union iwreq_data *wrqu, char *extra)
  40439. +{
  40440. + struct r8180_priv *priv = ieee80211_priv(dev);
  40441. + //extern u8 chan_plan_index;
  40442. + //printk("=========>%s(), %x\n", __FUNCTION__, priv->channel_plan);
  40443. + down(&priv->wx_sem);
  40444. + put_user(priv->channel_plan, (u8*)wrqu->data.pointer);
  40445. + up(&priv->wx_sem);
  40446. + return 0;
  40447. +
  40448. +}
  40449. +
  40450. +//This func will be called after probe auto
  40451. +static int r8180_wx_set_tbl (struct net_device *dev,
  40452. + struct iw_request_info *info,
  40453. + union iwreq_data *wrqu, char *extra)
  40454. +{
  40455. + struct r8180_priv *priv = ieee80211_priv(dev);
  40456. + u8 len = 0;
  40457. + s8 err = -1;
  40458. + extern CHANNEL_LIST Current_tbl;
  40459. + down(&priv->wx_sem);
  40460. + if (!wrqu->data.pointer)
  40461. + {
  40462. + printk("user data pointer is null\n");
  40463. + goto exit;
  40464. + }
  40465. + len = wrqu->data.length;
  40466. + //printk("=========>%s(), len:%d\n", __FUNCTION__, len);
  40467. + //memset(&Current_tbl, 0, sizeof(CHANNEL_LIST));
  40468. + if (copy_from_user((u8*)&Current_tbl, (void*)wrqu->data.pointer, len))
  40469. + {
  40470. + printk("error copy from user\n");
  40471. + goto exit;
  40472. + }
  40473. + {
  40474. + int i;
  40475. + Current_tbl.Len = len;
  40476. + //printk("%d\n", Current_tbl.Len);
  40477. +
  40478. + Dot11d_Init(priv->ieee80211);
  40479. + priv->ieee80211->bGlobalDomain = false;
  40480. + priv->ieee80211->bWorldWide13 = false;
  40481. +
  40482. + //lzm add 081205
  40483. + priv->ieee80211->MinPassiveChnlNum=12;
  40484. + priv->ieee80211->IbssStartChnl= 10;
  40485. +
  40486. + for (i=0; i<Current_tbl.Len; i++){
  40487. + //printk("%2d ", Current_tbl.Channel[i]);
  40488. + if(priv->channel_plan == COUNTRY_CODE_ETSI)
  40489. + {
  40490. + if(Current_tbl.Channel[i] <= 11)
  40491. + {
  40492. +#ifdef ENABLE_DOT11D
  40493. + GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 1;
  40494. +#else
  40495. + priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 1;
  40496. +#endif
  40497. + }
  40498. + else if((Current_tbl.Channel[i] >= 11) && (Current_tbl.Channel[i] <= 13))
  40499. + {
  40500. +#ifdef ENABLE_DOT11D
  40501. + GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 2;
  40502. +#else
  40503. + priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 2;
  40504. +#endif
  40505. + }
  40506. + }
  40507. + else
  40508. + {
  40509. + if(Current_tbl.Channel[i] <= 14)
  40510. + {
  40511. +#ifdef ENABLE_DOT11D
  40512. + GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 1;
  40513. +#else
  40514. + priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 1;
  40515. +#endif
  40516. + }
  40517. + }
  40518. + }
  40519. +#if 0
  40520. + printk("\n");
  40521. + for(i=1; i<MAX_CHANNEL_NUMBER; i++)
  40522. + {
  40523. +#ifdef ENABLE_DOT11D
  40524. + printk("%2d ", GET_DOT11D_INFO(priv->ieee80211)->channel_map[i]);
  40525. +#else
  40526. + printk("%2d ", priv->ieee80211->channel_map[i]);
  40527. +#endif
  40528. + }
  40529. + printk("\n");
  40530. +
  40531. +#endif
  40532. + if(priv->ieee80211->proto_started)
  40533. + {//we need to restart protocol now if it was start before channel map
  40534. + ieee80211_softmac_stop_protocol(priv->ieee80211);
  40535. + //mdelay(1);
  40536. + ieee80211_softmac_start_protocol(priv->ieee80211);
  40537. + }
  40538. + }
  40539. + err = 0;
  40540. +exit:
  40541. + up(&priv->wx_sem);
  40542. + return err;
  40543. +
  40544. +
  40545. +}
  40546. +
  40547. +#endif
  40548. +
  40549. +
  40550. +static iw_handler r8180_wx_handlers[] =
  40551. +{
  40552. + NULL, /* SIOCSIWCOMMIT */
  40553. + r8180_wx_get_name, /* SIOCGIWNAME */
  40554. + dummy, /* SIOCSIWNWID */
  40555. + dummy, /* SIOCGIWNWID */
  40556. + r8180_wx_set_freq, /* SIOCSIWFREQ */
  40557. + r8180_wx_get_freq, /* SIOCGIWFREQ */
  40558. + r8180_wx_set_mode, /* SIOCSIWMODE */
  40559. + r8180_wx_get_mode, /* SIOCGIWMODE */
  40560. + r8180_wx_set_sens, /* SIOCSIWSENS */
  40561. + r8180_wx_get_sens, /* SIOCGIWSENS */
  40562. + NULL, /* SIOCSIWRANGE */
  40563. + rtl8180_wx_get_range, /* SIOCGIWRANGE */
  40564. + NULL, /* SIOCSIWPRIV */
  40565. + NULL, /* SIOCGIWPRIV */
  40566. + NULL, /* SIOCSIWSTATS */
  40567. + NULL, /* SIOCGIWSTATS */
  40568. + dummy, /* SIOCSIWSPY */
  40569. + dummy, /* SIOCGIWSPY */
  40570. + NULL, /* SIOCGIWTHRSPY */
  40571. + NULL, /* SIOCWIWTHRSPY */
  40572. + r8180_wx_set_wap, /* SIOCSIWAP */
  40573. + r8180_wx_get_wap, /* SIOCGIWAP */
  40574. + r8180_wx_set_mlme, //NULL, /* SIOCSIWMLME*/ /* -- hole -- */
  40575. + dummy, /* SIOCGIWAPLIST -- depricated */
  40576. + r8180_wx_set_scan, /* SIOCSIWSCAN */
  40577. + r8180_wx_get_scan, /* SIOCGIWSCAN */
  40578. + r8180_wx_set_essid, /* SIOCSIWESSID */
  40579. + r8180_wx_get_essid, /* SIOCGIWESSID */
  40580. + dummy, /* SIOCSIWNICKN */
  40581. + dummy, /* SIOCGIWNICKN */
  40582. + NULL, /* -- hole -- */
  40583. + NULL, /* -- hole -- */
  40584. + r8180_wx_set_rate, /* SIOCSIWRATE */
  40585. + r8180_wx_get_rate, /* SIOCGIWRATE */
  40586. + dummy, /* SIOCSIWRTS */
  40587. + dummy, /* SIOCGIWRTS */
  40588. + r8180_wx_set_frag, /* SIOCSIWFRAG */
  40589. + r8180_wx_get_frag, /* SIOCGIWFRAG */
  40590. + dummy, /* SIOCSIWTXPOW */
  40591. + dummy, /* SIOCGIWTXPOW */
  40592. + r8180_wx_set_retry, /* SIOCSIWRETRY */
  40593. + r8180_wx_get_retry, /* SIOCGIWRETRY */
  40594. + r8180_wx_set_enc, /* SIOCSIWENCODE */
  40595. + r8180_wx_get_enc, /* SIOCGIWENCODE */
  40596. + dummy, /* SIOCSIWPOWER */
  40597. + dummy, /* SIOCGIWPOWER */
  40598. + NULL, /*---hole---*/
  40599. + NULL, /*---hole---*/
  40600. + r8180_wx_set_gen_ie,//NULL, /* SIOCSIWGENIE */
  40601. + NULL, /* SIOCSIWGENIE */
  40602. + r8180_wx_set_auth,//NULL, /* SIOCSIWAUTH */
  40603. + NULL,//r8180_wx_get_auth,//NULL, /* SIOCSIWAUTH */
  40604. + r8180_wx_set_enc_ext, /* SIOCSIWENCODEEXT */
  40605. + NULL,//r8180_wx_get_enc_ext,//NULL, /* SIOCSIWENCODEEXT */
  40606. + NULL, /* SIOCSIWPMKSA */
  40607. + NULL, /*---hole---*/
  40608. +};
  40609. +
  40610. +
  40611. +static const struct iw_priv_args r8180_private_args[] = {
  40612. + {
  40613. + SIOCIWFIRSTPRIV + 0x0,
  40614. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "badcrc"
  40615. + },
  40616. +
  40617. + {
  40618. + SIOCIWFIRSTPRIV + 0x1,
  40619. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
  40620. +
  40621. + },
  40622. + {
  40623. + SIOCIWFIRSTPRIV + 0x2,
  40624. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx"
  40625. + },
  40626. +#ifdef JOHN_IOCTL
  40627. + {
  40628. + SIOCIWFIRSTPRIV + 0x3,
  40629. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readRF"
  40630. + }
  40631. + ,
  40632. + {
  40633. + SIOCIWFIRSTPRIV + 0x4,
  40634. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeRF"
  40635. + }
  40636. + ,
  40637. + {
  40638. + SIOCIWFIRSTPRIV + 0x5,
  40639. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readBB"
  40640. + }
  40641. + ,
  40642. + {
  40643. + SIOCIWFIRSTPRIV + 0x6,
  40644. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeBB"
  40645. + }
  40646. + ,
  40647. + {
  40648. + SIOCIWFIRSTPRIV + 0x7,
  40649. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readnicb"
  40650. + }
  40651. + ,
  40652. + {
  40653. + SIOCIWFIRSTPRIV + 0x8,
  40654. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writenicb"
  40655. + }
  40656. + ,
  40657. + {
  40658. + SIOCIWFIRSTPRIV + 0x9,
  40659. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo"
  40660. + },
  40661. +#endif
  40662. + {
  40663. + SIOCIWFIRSTPRIV + 0xA,
  40664. + 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED |1, "getradion"
  40665. + },
  40666. + {
  40667. + SIOCIWFIRSTPRIV + 0xB,
  40668. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setradion"
  40669. + },
  40670. + {
  40671. + SIOCIWFIRSTPRIV + 0xC,
  40672. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "ratadpt"
  40673. + },
  40674. +#ifdef ENABLE_TOSHIBA_CONFIG
  40675. + {
  40676. + SIOCIWFIRSTPRIV + 0xD,
  40677. + 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gettblidx"
  40678. + },
  40679. + {
  40680. + SIOCIWFIRSTPRIV + 0xE,
  40681. + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,0, "settblidx"
  40682. + },
  40683. +
  40684. +#endif
  40685. +
  40686. +};
  40687. +
  40688. +/*
  40689. + * Private ioctl interface information
  40690. +
  40691. +struct iw_priv_args
  40692. +{
  40693. +// __u32 cmd;
  40694. +// __u16 set_args;
  40695. +// __u16 get_args;
  40696. +// char name[IFNAMSIZ];
  40697. +//};
  40698. +*/
  40699. +//If get cmd's number is big,there may cause some problemes.
  40700. +//So modified by Lawrence,071120
  40701. +
  40702. +static iw_handler r8180_private_handler[] = {
  40703. +// r8180_wx_set_monitor, /* SIOCIWFIRSTPRIV */
  40704. + r8180_wx_set_crcmon, /*SIOCIWSECONDPRIV*/
  40705. +// r8180_wx_set_forceassociate,
  40706. +// r8180_wx_set_beaconinterval,
  40707. +// r8180_wx_set_monitor_type,
  40708. + r8180_wx_set_scan_type,
  40709. + r8180_wx_set_rawtx,
  40710. +
  40711. +#if 0
  40712. +#ifdef _RTL8187_EXT_PATCH_
  40713. + r8180_wx_get_meshinfo,
  40714. + r8180_wx_enable_mesh,
  40715. + r8180_wx_disable_mesh,
  40716. + r8180_wx_set_channel,
  40717. + r8180_wx_set_meshID,
  40718. +
  40719. +// r8180_wx_add_mac_allow,
  40720. +// r8180_wx_get_mac_allow,
  40721. +// r8180_wx_del_mac_allow,
  40722. + r8180_wx_add_mac_deny,
  40723. + r8180_wx_get_mac_deny,
  40724. + r8180_wx_del_mac_deny,
  40725. + r8180_wx_get_mesh_list,
  40726. + r8180_wx_mesh_scan,
  40727. + r8180_wx_join_mesh,
  40728. +#endif
  40729. +#endif
  40730. +
  40731. +#ifdef JOHN_IOCTL
  40732. + r8180_wx_read_regs,
  40733. + r8180_wx_write_regs,
  40734. + r8180_wx_read_bb,
  40735. + r8180_wx_write_bb,
  40736. + r8180_wx_read_nicb,
  40737. + r8180_wx_write_nicb,
  40738. + r8180_wx_get_ap_status,
  40739. +#endif
  40740. + r8180_wx_get_radion,
  40741. + r8180_wx_set_radion,
  40742. + r8180_wx_set_ratadpt,
  40743. +#ifdef ENABLE_TOSHIBA_CONFIG
  40744. + r8180_wx_get_tblidx,
  40745. + r8180_wx_set_tbl,
  40746. +#endif
  40747. +};
  40748. +
  40749. +#if WIRELESS_EXT >= 17
  40750. +//WB modefied to show signal to GUI on 18-01-2008
  40751. +static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
  40752. +{
  40753. + struct r8180_priv *priv = ieee80211_priv(dev);
  40754. + struct ieee80211_device* ieee = priv->ieee80211;
  40755. + struct iw_statistics* wstats = &priv->wstats;
  40756. +// struct ieee80211_network* target = NULL;
  40757. + int tmp_level = 0;
  40758. + int tmp_qual = 0;
  40759. + int tmp_noise = 0;
  40760. +// unsigned long flag;
  40761. +
  40762. + if (ieee->state < IEEE80211_LINKED)
  40763. + {
  40764. + wstats->qual.qual = 0;
  40765. + wstats->qual.level = 0;
  40766. + wstats->qual.noise = 0;
  40767. + wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
  40768. + return wstats;
  40769. + }
  40770. +#if 0
  40771. + spin_lock_irqsave(&ieee->lock, flag);
  40772. + list_for_each_entry(target, &ieee->network_list, list)
  40773. + {
  40774. + if (is_same_network(target, &ieee->current_network))
  40775. + {
  40776. + printk("it's same network:%s\n", target->ssid);
  40777. +#if 0
  40778. + if (!tmp_level)
  40779. + {
  40780. + tmp_level = target->stats.signalstrength;
  40781. + tmp_qual = target->stats.signal;
  40782. + }
  40783. + else
  40784. + {
  40785. +
  40786. + tmp_level = (15*tmp_level + target->stats.signalstrength)/16;
  40787. + tmp_qual = (15*tmp_qual + target->stats.signal)/16;
  40788. + }
  40789. +#else
  40790. + tmp_level = target->stats.signal;
  40791. + tmp_qual = target->stats.signalstrength;
  40792. + tmp_noise = target->stats.noise;
  40793. + printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
  40794. +#endif
  40795. + break;
  40796. + }
  40797. + }
  40798. + spin_unlock_irqrestore(&ieee->lock, flag);
  40799. +#endif
  40800. + tmp_level = (&ieee->current_network)->stats.signal;
  40801. + tmp_qual = (&ieee->current_network)->stats.signalstrength;
  40802. + tmp_noise = (&ieee->current_network)->stats.noise;
  40803. + //printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
  40804. +
  40805. + wstats->qual.level = tmp_level;
  40806. + wstats->qual.qual = tmp_qual;
  40807. + wstats->qual.noise = tmp_noise;
  40808. + wstats->qual.updated = IW_QUAL_ALL_UPDATED| IW_QUAL_DBM;
  40809. + return wstats;
  40810. +}
  40811. +#endif
  40812. +
  40813. +
  40814. +struct iw_handler_def r8180_wx_handlers_def={
  40815. + .standard = r8180_wx_handlers,
  40816. + .num_standard = sizeof(r8180_wx_handlers) / sizeof(iw_handler),
  40817. + .private = r8180_private_handler,
  40818. + .num_private = sizeof(r8180_private_handler) / sizeof(iw_handler),
  40819. + .num_private_args = sizeof(r8180_private_args) / sizeof(struct iw_priv_args),
  40820. +#if WIRELESS_EXT >= 17
  40821. + .get_wireless_stats = r8180_get_wireless_stats,
  40822. +#endif
  40823. + .private_args = (struct iw_priv_args *)r8180_private_args,
  40824. +};
  40825. +#ifdef _RTL8187_EXT_PATCH_
  40826. +EXPORT_SYMBOL(r8180_wx_set_channel);
  40827. +#endif
  40828. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_wx.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_wx.h
  40829. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8180_wx.h 1970-01-01 01:00:00.000000000 +0100
  40830. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8180_wx.h 2009-08-23 19:01:04.000000000 +0200
  40831. @@ -0,0 +1,21 @@
  40832. +/*
  40833. + This is part of rtl8180 OpenSource driver - v 0.3
  40834. + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
  40835. + Released under the terms of GPL (General Public Licence)
  40836. +
  40837. + Parts of this driver are based on the GPL part of the official realtek driver
  40838. + Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
  40839. + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
  40840. +
  40841. + We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
  40842. +*/
  40843. +
  40844. +/* this file (will) contains wireless extension handlers*/
  40845. +
  40846. +#ifndef R8180_WX_H
  40847. +#define R8180_WX_H
  40848. +#include <linux/wireless.h>
  40849. +#include "ieee80211/ieee80211.h"
  40850. +extern struct iw_handler_def r8180_wx_handlers_def;
  40851. +
  40852. +#endif
  40853. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_core.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_core.c
  40854. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_core.c 1970-01-01 01:00:00.000000000 +0100
  40855. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_core.c 2009-08-23 19:01:04.000000000 +0200
  40856. @@ -0,0 +1,7194 @@
  40857. +/*
  40858. + This is part of rtl8187 OpenSource driver - v 0.1
  40859. + Copyright (C) Andrea Merello 2005 <andreamrl@tiscali.it>
  40860. + Released under the terms of GPL (General Public License)
  40861. +
  40862. +
  40863. + Parts of this driver are based on the rtl8180 driver skeleton
  40864. + from Patric Schenke & Andres Salomon.
  40865. +
  40866. + Parts of this driver are based on the Intel Pro Wireless 2*00 GPL drivers.
  40867. +
  40868. + some ideas might be derived from David Young rtl8180 netbsd driver.
  40869. +
  40870. + Parts of the usb code are from the r8150.c driver in linux kernel
  40871. +
  40872. + Some ideas borrowed from the 8139too.c driver included in linux kernel.
  40873. +
  40874. + We (I?) want to thanks the Authors of those projecs and also the
  40875. + Ndiswrapper's project Authors.
  40876. +
  40877. + A special big thanks goes also to Realtek corp. for their help in my
  40878. + attempt to add RTL8187 and RTL8225 support, and to David Young also.
  40879. +
  40880. + - Please note that this file is a modified version from rtl8180-sa2400
  40881. + drv. So some other people have contributed to this project, and they are
  40882. + thanked in the rtl8180-sa2400 CHANGELOG.
  40883. +*/
  40884. +
  40885. +#undef LOOP_TEST
  40886. +#undef DUMP_RX
  40887. +#undef DUMP_TX
  40888. +#undef DEBUG_TX_DESC2
  40889. +#undef RX_DONT_PASS_UL
  40890. +#undef DEBUG_EPROM
  40891. +#undef DEBUG_RX_VERBOSE
  40892. +#undef DUMMY_RX
  40893. +#undef DEBUG_ZERO_RX
  40894. +#undef DEBUG_RX_SKB
  40895. +#undef DEBUG_TX_FRAG
  40896. +#undef DEBUG_RX_FRAG
  40897. +#undef DEBUG_TX_FILLDESC
  40898. +#undef DEBUG_TX
  40899. +#undef DEBUG_IRQ
  40900. +#undef DEBUG_RX
  40901. +#undef DEBUG_RXALLOC
  40902. +#undef DEBUG_REGISTERS
  40903. +#undef DEBUG_RING
  40904. +#undef DEBUG_IRQ_TASKLET
  40905. +#undef DEBUG_TX_ALLOC
  40906. +#undef DEBUG_TX_DESC
  40907. +#undef CONFIG_SOFT_BEACON
  40908. +#undef DEBUG_RW_REGISTER
  40909. +
  40910. +#define CONFIG_RTL8180_IO_MAP
  40911. +//#define CONFIG_SOFT_BEACON
  40912. +//#define DEBUG_RW_REGISTER
  40913. +
  40914. +#include <linux/dmapool.h>
  40915. +
  40916. +#include "r8180_hw.h"
  40917. +#include "r8187.h"
  40918. +#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  40919. +#include "r8180_93cx6.h" /* Card EEPROM */
  40920. +#include "r8180_wx.h"
  40921. +#include "r8180_dm.h"
  40922. +
  40923. +#include <linux/usb.h>
  40924. +// FIXME: check if 2.6.7 is ok
  40925. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7))
  40926. +#define usb_kill_urb usb_unlink_urb
  40927. +#endif
  40928. +
  40929. +#ifdef CONFIG_RTL8180_PM
  40930. +#include "r8180_pm.h"
  40931. +#endif
  40932. +
  40933. +#ifdef ENABLE_DOT11D
  40934. +#include "dot11d.h"
  40935. +#endif
  40936. +
  40937. +#ifndef USB_VENDOR_ID_REALTEK
  40938. +#define USB_VENDOR_ID_REALTEK 0x0bda
  40939. +#endif
  40940. +#ifndef USB_VENDOR_ID_NETGEAR
  40941. +#define USB_VENDOR_ID_NETGEAR 0x0846
  40942. +#endif
  40943. +
  40944. +#define TXISR_SELECT(priority) ((priority == MANAGE_PRIORITY)?rtl8187_managetx_isr:\
  40945. + (priority == BEACON_PRIORITY)?rtl8187_beacontx_isr: \
  40946. + (priority == VO_PRIORITY)?rtl8187_votx_isr: \
  40947. + (priority == VI_PRIORITY)?rtl8187_vitx_isr:\
  40948. + (priority == BE_PRIORITY)?rtl8187_betx_isr:rtl8187_bktx_isr)
  40949. +
  40950. +static struct usb_device_id rtl8187_usb_id_tbl[] = {
  40951. + {USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8187)},
  40952. + {USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8189)},
  40953. +// {USB_DEVICE_VER(USB_VENDOR_ID_REALTEK, 0x8187,0x0200,0x0200)},
  40954. + {USB_DEVICE(USB_VENDOR_ID_NETGEAR, 0x6100)},
  40955. + {USB_DEVICE(USB_VENDOR_ID_NETGEAR, 0x6a00)},
  40956. + {USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8197)},
  40957. + {USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8198)},
  40958. + {}
  40959. +};
  40960. +
  40961. +static char* ifname = "wlan%d";
  40962. +#if 0
  40963. +static int hwseqnum = 0;
  40964. +static int hwwep = 0;
  40965. +#endif
  40966. +static int channels = 0x3fff;
  40967. +//static int channels = 0x7ff;// change by thomas, use 1 - 11 channel 0907-2007
  40968. +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
  40969. +//by amy for rate adaptive
  40970. +#define DEFAULT_RATE_ADAPTIVE_TIMER_PERIOD 300
  40971. +//by amy for rate adaptive
  40972. +//by amy for ps
  40973. +#define IEEE80211_WATCH_DOG_TIME 2000
  40974. +//by amy for ps
  40975. +MODULE_LICENSE("GPL");
  40976. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  40977. +MODULE_VERSION("V 1.1");
  40978. +#endif
  40979. +MODULE_DEVICE_TABLE(usb, rtl8187_usb_id_tbl);
  40980. +MODULE_AUTHOR("Realsil Wlan");
  40981. +MODULE_DESCRIPTION("Linux driver for Realtek RTL8187 WiFi cards");
  40982. +
  40983. +#if 0
  40984. +MODULE_PARM(ifname,"s");
  40985. +MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
  40986. +
  40987. +MODULE_PARM(hwseqnum,"i");
  40988. +MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
  40989. +
  40990. +MODULE_PARM(hwwep,"i");
  40991. +MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
  40992. +
  40993. +MODULE_PARM(channels,"i");
  40994. +MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
  40995. +#endif
  40996. +
  40997. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
  40998. +module_param(ifname, charp, S_IRUGO|S_IWUSR );
  40999. +//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
  41000. +//module_param(hwwep,int, S_IRUGO|S_IWUSR);
  41001. +module_param(channels,int, S_IRUGO|S_IWUSR);
  41002. +#else
  41003. +MODULE_PARM(ifname, "s");
  41004. +//MODULE_PARM(hwseqnum,"i");
  41005. +//MODULE_PARM(hwwep,"i");
  41006. +MODULE_PARM(channels,"i");
  41007. +#endif
  41008. +
  41009. +MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
  41010. +//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
  41011. +//MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
  41012. +MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
  41013. +
  41014. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  41015. +static int __devinit rtl8187_usb_probe(struct usb_interface *intf,
  41016. + const struct usb_device_id *id);
  41017. +static void __devexit rtl8187_usb_disconnect(struct usb_interface *intf);
  41018. +#else
  41019. +static void *__devinit rtl8187_usb_probe(struct usb_device *udev,unsigned int ifnum,
  41020. + const struct usb_device_id *id);
  41021. +static void __devexit rtl8187_usb_disconnect(struct usb_device *udev, void *ptr);
  41022. +#endif
  41023. +
  41024. +
  41025. +static struct usb_driver rtl8187_usb_driver = {
  41026. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
  41027. + .owner = THIS_MODULE,
  41028. +#endif
  41029. + .name = RTL8187_MODULE_NAME, /* Driver name */
  41030. + .id_table = rtl8187_usb_id_tbl, /* PCI_ID table */
  41031. + .probe = rtl8187_usb_probe, /* probe fn */
  41032. + .disconnect = rtl8187_usb_disconnect, /* remove fn */
  41033. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0)
  41034. +#ifdef CONFIG_RTL8180_PM
  41035. + .suspend = rtl8187_suspend, /* PM suspend fn */
  41036. + .resume = rtl8187_resume, /* PM resume fn */
  41037. +#else
  41038. + .suspend = NULL, /* PM suspend fn */
  41039. + .resume = NULL, /* PM resume fn */
  41040. +#endif
  41041. +#endif
  41042. +};
  41043. +
  41044. +#ifdef JOHN_HWSEC
  41045. +void CAM_mark_invalid(struct net_device *dev, u8 ucIndex)
  41046. +{
  41047. + u32 ulContent=0;
  41048. + u32 ulCommand=0;
  41049. + u32 ulEncAlgo=CAM_AES;
  41050. +
  41051. + // keyid must be set in config field
  41052. + ulContent |= (ucIndex&3) | ((u16)(ulEncAlgo)<<2);
  41053. +
  41054. + ulContent |= BIT15;
  41055. + // polling bit, and No Write enable, and address
  41056. + ulCommand= CAM_CONTENT_COUNT*ucIndex;
  41057. + ulCommand= ulCommand | BIT31|BIT16;
  41058. + // write content 0 is equall to mark invalid
  41059. +
  41060. + write_nic_dword(dev, WCAMI, ulContent); //delay_ms(40);
  41061. + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_mark_invalid(): WRITE A4: %x \n",ulContent));
  41062. + write_nic_dword(dev, RWCAM, ulCommand); //delay_ms(40);
  41063. + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_mark_invalid(): WRITE A0: %x \n",ulCommand));
  41064. +}
  41065. +
  41066. +void CAM_empty_entry(struct net_device *dev, u8 ucIndex)
  41067. +{
  41068. + u32 ulCommand=0;
  41069. + u32 ulContent=0;
  41070. + u8 i;
  41071. + u32 ulEncAlgo=CAM_AES;
  41072. +
  41073. + for(i=0;i<6;i++)
  41074. + {
  41075. +
  41076. + // filled id in CAM config 2 byte
  41077. + if( i == 0)
  41078. + {
  41079. + ulContent |=(ucIndex & 0x03) | (ulEncAlgo<<2);
  41080. + ulContent |= BIT15;
  41081. +
  41082. + }
  41083. + else
  41084. + {
  41085. + ulContent = 0;
  41086. + }
  41087. + // polling bit, and No Write enable, and address
  41088. + ulCommand= CAM_CONTENT_COUNT*ucIndex+i;
  41089. + ulCommand= ulCommand | BIT31|BIT16;
  41090. + // write content 0 is equall to mark invalid
  41091. + write_nic_dword(dev, WCAMI, ulContent); //delay_ms(40);
  41092. + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %x \n",ulContent));
  41093. + write_nic_dword(dev, RWCAM, ulCommand); //delay_ms(40);
  41094. + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %x \n",ulCommand));
  41095. + }
  41096. +}
  41097. +
  41098. +void CamResetAllEntry(struct net_device *dev)
  41099. +{
  41100. + u8 ucIndex;
  41101. +
  41102. + //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
  41103. + // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
  41104. + // In this condition, Cam can not be reset because upper layer will not set this static key again.
  41105. + //if(Adapter->EncAlgorithm == WEP_Encryption)
  41106. + // return;
  41107. + //debug
  41108. + //DbgPrint("========================================\n");
  41109. + //DbgPrint(" Call ResetAllEntry \n");
  41110. + //DbgPrint("========================================\n\n");
  41111. +
  41112. + for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
  41113. + CAM_mark_invalid(dev, ucIndex);
  41114. + for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
  41115. + CAM_empty_entry(dev, ucIndex);
  41116. +
  41117. +}
  41118. +
  41119. +
  41120. +void write_cam(struct net_device *dev, u8 addr, u32 data)
  41121. +{
  41122. + write_nic_dword(dev, WCAMI, data);
  41123. + write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
  41124. +}
  41125. +u32 read_cam(struct net_device *dev, u8 addr)
  41126. +{
  41127. + write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
  41128. + return read_nic_dword(dev, 0xa8);
  41129. +}
  41130. +#endif /*JOHN_HWSEC*/
  41131. +
  41132. +#ifdef DEBUG_RW_REGISTER
  41133. +//lzm add for write time out test
  41134. +void add_into_rw_registers(struct net_device *dev, u32 addr, u32 cont, u8 flag)
  41135. +{
  41136. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41137. + int reg_index = (priv->write_read_register_index % 200) ;
  41138. +
  41139. + priv->write_read_registers[reg_index].address = 0;
  41140. + priv->write_read_registers[reg_index].content = 0;
  41141. + priv->write_read_registers[reg_index].flag = 0;
  41142. +
  41143. + priv->write_read_registers[reg_index].address = addr;
  41144. + priv->write_read_registers[reg_index].content = cont;
  41145. + priv->write_read_registers[reg_index].flag = flag;
  41146. +
  41147. + priv->write_read_register_index = (priv->write_read_register_index + 1) % 200;
  41148. +}
  41149. +
  41150. +bool print_once = 0;
  41151. +
  41152. +void print_rw_registers(struct net_device *dev)
  41153. +{
  41154. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41155. + int reg_index = 0;
  41156. + int watchdog = 0;
  41157. + if(print_once == false)
  41158. + {
  41159. + print_once = true;
  41160. + for(reg_index = ((priv->write_read_register_index + 1) % 200); watchdog <= 199; reg_index++)
  41161. + {
  41162. + watchdog++;
  41163. + printk("====>reg_addr:0x%x, reg_cont:0x%x, read_or_write:0x%d\n",
  41164. + priv->write_read_registers[reg_index].address,
  41165. + priv->write_read_registers[reg_index].content,
  41166. + priv->write_read_registers[reg_index].flag);
  41167. + }
  41168. + }
  41169. +}
  41170. +//lzm add for write time out test
  41171. +#endif
  41172. +
  41173. +#ifdef CPU_64BIT
  41174. +void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
  41175. +{
  41176. + int status;
  41177. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41178. + struct usb_device *udev = priv->udev;
  41179. +
  41180. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41181. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41182. + indx|0xfe00, 0, &data, 1, HZ / 2);
  41183. +
  41184. +//lzm add for write time out test
  41185. +#ifdef DEBUG_RW_REGISTER
  41186. + add_into_rw_registers(dev, indx, data, 2);
  41187. +#endif
  41188. +
  41189. + if (status < 0)
  41190. + {
  41191. + printk("write_nic_byte_E TimeOut!addr:%x, status:%x\n", indx, status);
  41192. +#ifdef DEBUG_RW_REGISTER
  41193. + print_rw_registers(dev);
  41194. +#endif
  41195. + }
  41196. +}
  41197. +
  41198. +u8 read_nic_byte_E(struct net_device *dev, int indx)
  41199. +{
  41200. + int status;
  41201. + u8 data, *buf;
  41202. + dma_addr_t dma_handle;
  41203. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41204. + struct usb_device *udev = priv->udev;
  41205. +
  41206. + buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
  41207. + if (!buf) {
  41208. + printk("read_nic_byte_E out of memory\n");
  41209. + return -ENOMEM;
  41210. + }
  41211. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41212. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41213. + indx|0xfe00, 0, buf, 1, HZ / 2);
  41214. +//lzm add for write time out test
  41215. +#ifdef DEBUG_RW_REGISTER
  41216. + add_into_rw_registers(dev, indx, buf[0], 1);
  41217. +#endif
  41218. +
  41219. + if (status < 0)
  41220. + {
  41221. + printk("read_nic_byte_E TimeOut!addr:%x, status:%x\n",indx, status);
  41222. +#ifdef DEBUG_RW_REGISTER
  41223. + print_rw_registers(dev);
  41224. +#endif
  41225. + }
  41226. +
  41227. + data = buf[0];
  41228. + dma_pool_free(priv->usb_pool, buf, dma_handle);
  41229. + return data;
  41230. +}
  41231. +
  41232. +void write_nic_byte(struct net_device *dev, int indx, u8 data)
  41233. +{
  41234. + int status;
  41235. +
  41236. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41237. + struct usb_device *udev = priv->udev;
  41238. +
  41239. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41240. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41241. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 1, HZ / 2);
  41242. +
  41243. +//lzm add for write time out test
  41244. +#ifdef DEBUG_RW_REGISTER
  41245. + add_into_rw_registers(dev, indx, data, 2);
  41246. +#endif
  41247. + if (status < 0)
  41248. + {
  41249. + printk("write_nic_byte TimeOut!addr:%x, status:%x\n",indx, status);
  41250. +#ifdef DEBUG_RW_REGISTER
  41251. + print_rw_registers(dev);
  41252. +#endif
  41253. + }
  41254. +
  41255. +
  41256. +}
  41257. +
  41258. +void write_nic_word(struct net_device *dev, int indx, u16 data)
  41259. +{
  41260. +
  41261. + int status;
  41262. +
  41263. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41264. + struct usb_device *udev = priv->udev;
  41265. +
  41266. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41267. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41268. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 2, HZ / 2);
  41269. +
  41270. +//lzm add for write time out test
  41271. +#ifdef DEBUG_RW_REGISTER
  41272. + add_into_rw_registers(dev, indx, data, 2);
  41273. +
  41274. + if(priv->write_read_register_index == 199)
  41275. + {
  41276. + //print_rw_registers(dev);
  41277. + }
  41278. +#endif
  41279. + if (status < 0)
  41280. + {
  41281. + printk("write_nic_word TimeOut!addr:%x, status:%x\n",indx, status);
  41282. +#ifdef DEBUG_RW_REGISTER
  41283. + print_rw_registers(dev);
  41284. +#endif
  41285. + }
  41286. +
  41287. +}
  41288. +
  41289. +void write_nic_dword(struct net_device *dev, int indx, u32 data)
  41290. +{
  41291. +
  41292. + int status;
  41293. +
  41294. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41295. + struct usb_device *udev = priv->udev;
  41296. +
  41297. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41298. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41299. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 4, HZ / 2);
  41300. +//lzm add for write time out test
  41301. +#ifdef DEBUG_RW_REGISTER
  41302. + add_into_rw_registers(dev, indx, data, 2);
  41303. +#endif
  41304. +
  41305. +
  41306. + if (status < 0)
  41307. + {
  41308. + printk("write_nic_dword TimeOut!addr:%x, status:%x\n",indx, status);
  41309. +#ifdef DEBUG_RW_REGISTER
  41310. + print_rw_registers(dev);
  41311. +#endif
  41312. + }
  41313. +
  41314. +}
  41315. +
  41316. + u8 read_nic_byte(struct net_device *dev, int indx)
  41317. +{
  41318. + u8 data, *buf;
  41319. + int status;
  41320. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41321. + struct usb_device *udev = priv->udev;
  41322. + dma_addr_t dma_handle;
  41323. +
  41324. + buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
  41325. + if (!buf) {
  41326. + printk("read_nic_byte: out of memory\n");
  41327. + return -ENOMEM;
  41328. + }
  41329. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41330. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41331. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 1, HZ / 2);
  41332. +//lzm add for write time out test
  41333. +#ifdef DEBUG_RW_REGISTER
  41334. + add_into_rw_registers(dev, indx, buf[0], 1);
  41335. +#endif
  41336. +
  41337. + if (status < 0)
  41338. + {
  41339. + printk("read_nic_byte TimeOut!addr:%x, status:%x\n",indx, status);
  41340. +#ifdef DEBUG_RW_REGISTER
  41341. + print_rw_registers(dev);
  41342. +#endif
  41343. + }
  41344. +
  41345. + data = buf[0];
  41346. + dma_pool_free(priv->usb_pool, buf, dma_handle);
  41347. + return data;
  41348. +}
  41349. +
  41350. +u16 read_nic_word(struct net_device *dev, int indx)
  41351. +{
  41352. + u16 data, *buf;
  41353. + int status;
  41354. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41355. + struct usb_device *udev = priv->udev;
  41356. + dma_addr_t dma_handle;
  41357. +
  41358. + buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
  41359. + if (!buf) {
  41360. + printk("read_nic_word: out of memory\n");
  41361. + return -ENOMEM;
  41362. + }
  41363. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41364. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41365. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 2, HZ / 2);
  41366. +//lzm add for write time out test
  41367. +#ifdef DEBUG_RW_REGISTER
  41368. + add_into_rw_registers(dev, indx, buf[0], 1);
  41369. +#endif
  41370. +
  41371. + if (status < 0)
  41372. + {
  41373. + printk("read_nic_word TimeOut!addr:%x, status:%x\n",indx, status);
  41374. +#ifdef DEBUG_RW_REGISTER
  41375. + print_rw_registers(dev);
  41376. +#endif
  41377. + }
  41378. +
  41379. +
  41380. + data = buf[0];
  41381. + dma_pool_free(priv->usb_pool, buf, dma_handle);
  41382. + return data;
  41383. +}
  41384. +
  41385. +u32 read_nic_dword(struct net_device *dev, int indx)
  41386. +{
  41387. + u32 data, *buf;
  41388. + int status;
  41389. + dma_addr_t dma_handle;
  41390. +// int result;
  41391. +
  41392. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41393. + struct usb_device *udev = priv->udev;
  41394. +
  41395. + buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
  41396. + if (!buf){
  41397. + printk("read_nic_dword: out of memory\n");
  41398. + return -ENOMEM;
  41399. + }
  41400. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41401. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41402. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 4, HZ / 2);
  41403. +//lzm add for write time out test
  41404. +#ifdef DEBUG_RW_REGISTER
  41405. + add_into_rw_registers(dev, indx, buf[0], 1);
  41406. +#endif
  41407. +
  41408. + if (status < 0)
  41409. + {
  41410. + printk("read_nic_dword TimeOut!addr:%x, status:%x\n",indx, status);
  41411. +#ifdef DEBUG_RW_REGISTER
  41412. + print_rw_registers(dev);
  41413. +#endif
  41414. + }
  41415. +
  41416. +
  41417. +
  41418. + data = buf[0];
  41419. + dma_pool_free(priv->usb_pool, buf, dma_handle);
  41420. + return data;
  41421. +}
  41422. +#else
  41423. +void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
  41424. +{
  41425. + int status;
  41426. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41427. + struct usb_device *udev = priv->udev;
  41428. +
  41429. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41430. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41431. + indx|0xfe00, 0, &data, 1, HZ / 2);
  41432. +
  41433. + if (status < 0)
  41434. + {
  41435. + printk("write_nic_byte_E TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data,status);
  41436. + }
  41437. +}
  41438. +
  41439. +u8 read_nic_byte_E(struct net_device *dev, int indx)
  41440. +{
  41441. + int status;
  41442. + u8 data = 0;
  41443. + u8 buf[64];
  41444. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41445. + struct usb_device *udev = priv->udev;
  41446. +
  41447. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41448. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41449. + indx|0xfe00, 0, buf, 1, HZ / 2);
  41450. +
  41451. + if (status < 0)
  41452. + {
  41453. + printk("read_nic_byte_E TimeOut!addr:0x%x, status:%x\n", indx, status);
  41454. + }
  41455. +
  41456. + data = *(u8*)buf;
  41457. + return data;
  41458. +}
  41459. +
  41460. +void write_nic_byte(struct net_device *dev, int indx, u8 data)
  41461. +{
  41462. + int status;
  41463. +
  41464. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41465. + struct usb_device *udev = priv->udev;
  41466. +
  41467. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41468. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41469. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 1, HZ / 2);
  41470. +
  41471. + if (status < 0)
  41472. + {
  41473. + printk("write_nic_byte TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
  41474. + }
  41475. +
  41476. +
  41477. +}
  41478. +
  41479. +void write_nic_word(struct net_device *dev, int indx, u16 data)
  41480. +{
  41481. +
  41482. + int status;
  41483. +
  41484. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41485. + struct usb_device *udev = priv->udev;
  41486. +
  41487. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41488. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41489. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 2, HZ / 2);
  41490. +
  41491. + if (status < 0)
  41492. + {
  41493. + printk("write_nic_word TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
  41494. + }
  41495. +
  41496. +}
  41497. +
  41498. +void write_nic_dword(struct net_device *dev, int indx, u32 data)
  41499. +{
  41500. +
  41501. + int status;
  41502. +
  41503. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41504. + struct usb_device *udev = priv->udev;
  41505. +
  41506. + status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
  41507. + RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
  41508. + (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 4, HZ / 2);
  41509. +
  41510. +
  41511. + if (status < 0)
  41512. + {
  41513. + printk("write_nic_dword TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
  41514. + }
  41515. +
  41516. +}
  41517. +
  41518. +u8 read_nic_byte(struct net_device *dev, int indx)
  41519. +{
  41520. + u8 data = 0;
  41521. + u8 buf[64];
  41522. + int status;
  41523. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41524. + struct usb_device *udev = priv->udev;
  41525. +
  41526. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41527. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41528. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 1, HZ / 2);
  41529. +
  41530. + if (status < 0)
  41531. + {
  41532. + printk("read_nic_byte TimeOut!addr:0x%x,status:%x\n", indx,status);
  41533. + }
  41534. +
  41535. +
  41536. + data = *(u8*)buf;
  41537. + return data;
  41538. +}
  41539. +
  41540. +u16 read_nic_word(struct net_device *dev, int indx)
  41541. +{
  41542. + u16 data = 0;
  41543. + u8 buf[64];
  41544. + int status;
  41545. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41546. + struct usb_device *udev = priv->udev;
  41547. +
  41548. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41549. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41550. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 2, HZ / 2);
  41551. +
  41552. + if (status < 0)
  41553. + {
  41554. + printk("read_nic_word TimeOut!addr:0x%x,status:%x\n", indx,status);
  41555. + }
  41556. +
  41557. + data = *(u16*)buf;
  41558. + return data;
  41559. +}
  41560. +
  41561. +u32 read_nic_dword(struct net_device *dev, int indx)
  41562. +{
  41563. + u32 data = 0;
  41564. + u8 buf[64];
  41565. + int status;
  41566. +
  41567. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41568. + struct usb_device *udev = priv->udev;
  41569. +
  41570. + status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
  41571. + RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
  41572. + (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 4, HZ / 2);
  41573. +
  41574. + if (status < 0)
  41575. + {
  41576. + printk("read_nic_dword TimeOut!addr:0x%x,status:%x\n", indx, status);
  41577. + }
  41578. +
  41579. +
  41580. + data = *(u32*)buf;
  41581. + return data;
  41582. +}
  41583. +#endif
  41584. +
  41585. +
  41586. +u8 read_phy_cck(struct net_device *dev, u8 adr);
  41587. +u8 read_phy_ofdm(struct net_device *dev, u8 adr);
  41588. +/* this might still called in what was the PHY rtl8185/rtl8187 common code
  41589. + * plans are to possibilty turn it again in one common code...
  41590. + */
  41591. +inline void force_pci_posting(struct net_device *dev)
  41592. +{
  41593. +}
  41594. +
  41595. +
  41596. +static struct net_device_stats *rtl8180_stats(struct net_device *dev);
  41597. +void rtl8180_commit(struct net_device *dev);
  41598. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  41599. +void rtl8180_restart(struct work_struct *work);
  41600. +#else
  41601. +void rtl8180_restart(struct net_device *dev);
  41602. +#endif
  41603. +/****************************************************************************
  41604. + -----------------------------PROCFS STUFF-------------------------
  41605. +*****************************************************************************/
  41606. +
  41607. +static struct proc_dir_entry *rtl8180_proc = NULL;
  41608. +static int proc_get_stats_ap(char *page, char **start,
  41609. + off_t offset, int count,
  41610. + int *eof, void *data)
  41611. +{
  41612. + struct net_device *dev = data;
  41613. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41614. + struct ieee80211_device *ieee = priv->ieee80211;
  41615. + struct ieee80211_network *target;
  41616. +
  41617. + int len = 0;
  41618. +
  41619. + list_for_each_entry(target, &ieee->network_list, list) {
  41620. +
  41621. + len += snprintf(page + len, count - len,
  41622. + "%s ", target->ssid);
  41623. + len += snprintf(page + len, count - len,
  41624. + "%ld ", (jiffies-target->last_scanned)/HZ);
  41625. +
  41626. +
  41627. +
  41628. + if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
  41629. + len += snprintf(page + len, count - len,
  41630. + "WPA\n");
  41631. + }
  41632. + else{
  41633. + len += snprintf(page + len, count - len,
  41634. + "non_WPA\n");
  41635. + }
  41636. +
  41637. + }
  41638. +
  41639. + *eof = 1;
  41640. + return len;
  41641. +}
  41642. +
  41643. +static int proc_get_registers(char *page, char **start,
  41644. + off_t offset, int count,
  41645. + int *eof, void *data)
  41646. +{
  41647. + struct net_device *dev = data;
  41648. +
  41649. + int len = 0;
  41650. + int i,n;
  41651. +
  41652. + int max=0xff;
  41653. +
  41654. + /* This dump the current register page */
  41655. +len += snprintf(page + len, count - len,
  41656. + "\n####################page 0##################\n ");
  41657. +
  41658. + for(n=0;n<=max;)
  41659. + {
  41660. + //printk( "\nD: %2x> ", n);
  41661. + len += snprintf(page + len, count - len,
  41662. + "\nD: %2x > ",n);
  41663. +
  41664. + for(i=0;i<16 && n<=max;i++,n++)
  41665. + len += snprintf(page + len, count - len,
  41666. + "%2x ",read_nic_byte(dev,n));
  41667. +
  41668. + // printk("%2x ",read_nic_byte(dev,n));
  41669. + }
  41670. + len += snprintf(page + len, count - len,"\n");
  41671. +len += snprintf(page + len, count - len,
  41672. + "\n####################page 1##################\n ");
  41673. + for(n=0;n<=max;)
  41674. + {
  41675. + //printk( "\nD: %2x> ", n);
  41676. + len += snprintf(page + len, count - len,
  41677. + "\nD: %2x > ",n);
  41678. +
  41679. + for(i=0;i<16 && n<=max;i++,n++)
  41680. + len += snprintf(page + len, count - len,
  41681. + "%2x ",read_nic_byte(dev,0x100|n));
  41682. +
  41683. + // printk("%2x ",read_nic_byte(dev,n));
  41684. + }
  41685. +len += snprintf(page + len, count - len,
  41686. + "\n####################page 2##################\n ");
  41687. + for(n=0;n<=max;)
  41688. + {
  41689. + //printk( "\nD: %2x> ", n);
  41690. + len += snprintf(page + len, count - len,
  41691. + "\nD: %2x > ",n);
  41692. +
  41693. + for(i=0;i<16 && n<=max;i++,n++)
  41694. + len += snprintf(page + len, count - len,
  41695. + "%2x ",read_nic_byte(dev,0x200|n));
  41696. +
  41697. + // printk("%2x ",read_nic_byte(dev,n));
  41698. + }
  41699. +
  41700. +
  41701. +
  41702. + *eof = 1;
  41703. + return len;
  41704. +
  41705. +}
  41706. +
  41707. +
  41708. +static int proc_get_cck_reg(char *page, char **start,
  41709. + off_t offset, int count,
  41710. + int *eof, void *data)
  41711. +{
  41712. + struct net_device *dev = data;
  41713. +
  41714. + int len = 0;
  41715. + int i,n;
  41716. +
  41717. + int max = 0x5F;
  41718. +
  41719. + /* This dump the current register page */
  41720. + for(n=0;n<=max;)
  41721. + {
  41722. + //printk( "\nD: %2x> ", n);
  41723. + len += snprintf(page + len, count - len,
  41724. + "\nD: %2x > ",n);
  41725. +
  41726. + for(i=0;i<16 && n<=max;i++,n++)
  41727. + len += snprintf(page + len, count - len,
  41728. + "%2x ",read_phy_cck(dev,n));
  41729. +
  41730. + // printk("%2x ",read_nic_byte(dev,n));
  41731. + }
  41732. + len += snprintf(page + len, count - len,"\n");
  41733. +
  41734. +
  41735. + *eof = 1;
  41736. + return len;
  41737. +
  41738. +}
  41739. +
  41740. +
  41741. +static int proc_get_ofdm_reg(char *page, char **start,
  41742. + off_t offset, int count,
  41743. + int *eof, void *data)
  41744. +{
  41745. + struct net_device *dev = data;
  41746. +
  41747. + int len = 0;
  41748. + int i,n;
  41749. +
  41750. + //int max=0xff;
  41751. + int max = 0x40;
  41752. +
  41753. + /* This dump the current register page */
  41754. + for(n=0;n<=max;)
  41755. + {
  41756. + //printk( "\nD: %2x> ", n);
  41757. + len += snprintf(page + len, count - len,
  41758. + "\nD: %2x > ",n);
  41759. +
  41760. + for(i=0;i<16 && n<=max;i++,n++)
  41761. + len += snprintf(page + len, count - len,
  41762. + "%2x ",read_phy_ofdm(dev,n));
  41763. +
  41764. + // printk("%2x ",read_nic_byte(dev,n));
  41765. + }
  41766. + len += snprintf(page + len, count - len,"\n");
  41767. +
  41768. +
  41769. +
  41770. + *eof = 1;
  41771. + return len;
  41772. +
  41773. +}
  41774. +
  41775. +
  41776. +#if 0
  41777. +static int proc_get_stats_hw(char *page, char **start,
  41778. + off_t offset, int count,
  41779. + int *eof, void *data)
  41780. +{
  41781. + struct net_device *dev = data;
  41782. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41783. +
  41784. + int len = 0;
  41785. +
  41786. + len += snprintf(page + len, count - len,
  41787. + "NIC int: %lu\n"
  41788. + "Total int: %lu\n",
  41789. + priv->stats.ints,
  41790. + priv->stats.shints);
  41791. +
  41792. + *eof = 1;
  41793. + return len;
  41794. +}
  41795. +#endif
  41796. +
  41797. +static int proc_get_stats_tx(char *page, char **start,
  41798. + off_t offset, int count,
  41799. + int *eof, void *data)
  41800. +{
  41801. + struct net_device *dev = data;
  41802. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41803. +
  41804. + int len = 0;
  41805. +
  41806. + len += snprintf(page + len, count - len,
  41807. + "TX VI priority ok int: %lu\n"
  41808. + "TX VI priority error int: %lu\n"
  41809. + "TX VO priority ok int: %lu\n"
  41810. + "TX VO priority error int: %lu\n"
  41811. + "TX BE priority ok int: %lu\n"
  41812. + "TX BE priority error int: %lu\n"
  41813. + "TX BK priority ok int: %lu\n"
  41814. + "TX BK priority error int: %lu\n"
  41815. + "TX MANAGE priority ok int: %lu\n"
  41816. + "TX MANAGE priority error int: %lu\n"
  41817. + "TX BEACON priority ok int: %lu\n"
  41818. + "TX BEACON priority error int: %lu\n"
  41819. +// "TX high priority ok int: %lu\n"
  41820. +// "TX high priority failed error int: %lu\n"
  41821. + "TX queue resume: %lu\n"
  41822. + "TX queue stopped?: %d\n"
  41823. + "TX fifo overflow: %lu\n"
  41824. +// "TX beacon: %lu\n"
  41825. + "TX VI queue: %d\n"
  41826. + "TX VO queue: %d\n"
  41827. + "TX BE queue: %d\n"
  41828. + "TX BK queue: %d\n"
  41829. + "TX BEACON queue: %d\n"
  41830. + "TX MANAGE queue: %d\n"
  41831. +// "TX HW queue: %d\n"
  41832. + "TX VI dropped: %lu\n"
  41833. + "TX VO dropped: %lu\n"
  41834. + "TX BE dropped: %lu\n"
  41835. + "TX BK dropped: %lu\n"
  41836. + "TX total data packets %lu\n",
  41837. +// "TX beacon aborted: %lu\n",
  41838. + priv->stats.txviokint,
  41839. + priv->stats.txvierr,
  41840. + priv->stats.txvookint,
  41841. + priv->stats.txvoerr,
  41842. + priv->stats.txbeokint,
  41843. + priv->stats.txbeerr,
  41844. + priv->stats.txbkokint,
  41845. + priv->stats.txbkerr,
  41846. + priv->stats.txmanageokint,
  41847. + priv->stats.txmanageerr,
  41848. + priv->stats.txbeaconokint,
  41849. + priv->stats.txbeaconerr,
  41850. +// priv->stats.txhpokint,
  41851. +// priv->stats.txhperr,
  41852. + priv->stats.txresumed,
  41853. + netif_queue_stopped(dev),
  41854. + priv->stats.txoverflow,
  41855. +// priv->stats.txbeacon,
  41856. + atomic_read(&(priv->tx_pending[VI_PRIORITY])),
  41857. + atomic_read(&(priv->tx_pending[VO_PRIORITY])),
  41858. + atomic_read(&(priv->tx_pending[BE_PRIORITY])),
  41859. + atomic_read(&(priv->tx_pending[BK_PRIORITY])),
  41860. + atomic_read(&(priv->tx_pending[BEACON_PRIORITY])),
  41861. + atomic_read(&(priv->tx_pending[MANAGE_PRIORITY])),
  41862. +// read_nic_byte(dev, TXFIFOCOUNT),
  41863. + priv->stats.txvidrop,
  41864. + priv->stats.txvodrop,
  41865. + priv->stats.txbedrop,
  41866. + priv->stats.txbkdrop,
  41867. + priv->stats.txdatapkt
  41868. +// priv->stats.txbeaconerr
  41869. + );
  41870. +
  41871. + *eof = 1;
  41872. + return len;
  41873. +}
  41874. +
  41875. +
  41876. +
  41877. +static int proc_get_stats_rx(char *page, char **start,
  41878. + off_t offset, int count,
  41879. + int *eof, void *data)
  41880. +{
  41881. + struct net_device *dev = data;
  41882. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41883. +
  41884. + int len = 0;
  41885. +
  41886. + len += snprintf(page + len, count - len,
  41887. + "RX packets: %lu\n"
  41888. + "RX urb status error: %lu\n"
  41889. + "RX invalid urb error: %lu\n",
  41890. + priv->stats.rxok,
  41891. + priv->stats.rxstaterr,
  41892. + priv->stats.rxurberr);
  41893. +
  41894. + *eof = 1;
  41895. + return len;
  41896. +}
  41897. +
  41898. +#if WIRELESS_EXT < 17
  41899. +static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
  41900. +{
  41901. + struct r8180_priv *priv = ieee80211_priv(dev);
  41902. +
  41903. + return &priv->wstats;
  41904. +}
  41905. +#endif
  41906. +
  41907. +void rtl8180_proc_module_init(void)
  41908. +{
  41909. + DMESG("Initializing proc filesystem");
  41910. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
  41911. + rtl8180_proc=create_proc_entry(RTL8187_MODULE_NAME, S_IFDIR, proc_net);
  41912. +#else
  41913. + rtl8180_proc=create_proc_entry(RTL8187_MODULE_NAME, S_IFDIR, init_net.proc_net);
  41914. +#endif
  41915. +}
  41916. +
  41917. +
  41918. +void rtl8180_proc_module_remove(void)
  41919. +{
  41920. +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
  41921. + remove_proc_entry(RTL8187_MODULE_NAME, proc_net);
  41922. +#else
  41923. + remove_proc_entry(RTL8187_MODULE_NAME, init_net.proc_net);
  41924. +#endif
  41925. +}
  41926. +
  41927. +
  41928. +void rtl8180_proc_remove_one(struct net_device *dev)
  41929. +{
  41930. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41931. + if (priv->dir_dev) {
  41932. + // remove_proc_entry("stats-hw", priv->dir_dev);
  41933. + remove_proc_entry("stats-tx", priv->dir_dev);
  41934. + remove_proc_entry("stats-rx", priv->dir_dev);
  41935. + // remove_proc_entry("stats-ieee", priv->dir_dev);
  41936. + remove_proc_entry("stats-ap", priv->dir_dev);
  41937. + remove_proc_entry("registers", priv->dir_dev);
  41938. + remove_proc_entry("cck-registers",priv->dir_dev);
  41939. + remove_proc_entry("ofdm-registers",priv->dir_dev);
  41940. + remove_proc_entry(dev->name, rtl8180_proc);
  41941. + priv->dir_dev = NULL;
  41942. + }
  41943. +}
  41944. +
  41945. +
  41946. +void rtl8180_proc_init_one(struct net_device *dev)
  41947. +{
  41948. + struct proc_dir_entry *e;
  41949. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  41950. + priv->dir_dev = create_proc_entry(dev->name,
  41951. + S_IFDIR | S_IRUGO | S_IXUGO,
  41952. + rtl8180_proc);
  41953. + if (!priv->dir_dev) {
  41954. + DMESGE("Unable to initialize /proc/net/rtl8187/%s\n",
  41955. + dev->name);
  41956. + return;
  41957. + }
  41958. + #if 0
  41959. + e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
  41960. + priv->dir_dev, proc_get_stats_hw, dev);
  41961. +
  41962. + if (!e) {
  41963. + DMESGE("Unable to initialize "
  41964. + "/proc/net/rtl8187/%s/stats-hw\n",
  41965. + dev->name);
  41966. + }
  41967. + #endif
  41968. + e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
  41969. + priv->dir_dev, proc_get_stats_rx, dev);
  41970. +
  41971. + if (!e) {
  41972. + DMESGE("Unable to initialize "
  41973. + "/proc/net/rtl8187/%s/stats-rx\n",
  41974. + dev->name);
  41975. + }
  41976. +
  41977. +
  41978. + e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
  41979. + priv->dir_dev, proc_get_stats_tx, dev);
  41980. +
  41981. + if (!e) {
  41982. + DMESGE("Unable to initialize "
  41983. + "/proc/net/rtl8187/%s/stats-tx\n",
  41984. + dev->name);
  41985. + }
  41986. + #if 0
  41987. + e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
  41988. + priv->dir_dev, proc_get_stats_ieee, dev);
  41989. +
  41990. + if (!e) {
  41991. + DMESGE("Unable to initialize "
  41992. + "/proc/net/rtl8187/%s/stats-ieee\n",
  41993. + dev->name);
  41994. + }
  41995. +
  41996. + #endif
  41997. +
  41998. + e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
  41999. + priv->dir_dev, proc_get_stats_ap, dev);
  42000. +
  42001. + if (!e) {
  42002. + DMESGE("Unable to initialize "
  42003. + "/proc/net/rtl8187/%s/stats-ap\n",
  42004. + dev->name);
  42005. + }
  42006. +
  42007. + e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
  42008. + priv->dir_dev, proc_get_registers, dev);
  42009. + if (!e) {
  42010. + DMESGE("Unable to initialize "
  42011. + "/proc/net/rtl8187/%s/registers\n",
  42012. + dev->name);
  42013. + }
  42014. +
  42015. + e = create_proc_read_entry("cck-registers", S_IFREG | S_IRUGO,
  42016. + priv->dir_dev, proc_get_cck_reg, dev);
  42017. + if (!e) {
  42018. + DMESGE("Unable to initialize "
  42019. + "/proc/net/rtl8187/%s/cck-registers\n",
  42020. + dev->name);
  42021. + }
  42022. +
  42023. + e = create_proc_read_entry("ofdm-registers", S_IFREG | S_IRUGO,
  42024. + priv->dir_dev, proc_get_ofdm_reg, dev);
  42025. + if (!e) {
  42026. + DMESGE("Unable to initialize "
  42027. + "/proc/net/rtl8187/%s/ofdm-registers\n",
  42028. + dev->name);
  42029. + }
  42030. +
  42031. +#ifdef _RTL8187_EXT_PATCH_
  42032. + if( priv->mshobj && priv->mshobj->ext_patch_create_proc )
  42033. + priv->mshobj->ext_patch_create_proc(priv);
  42034. +#endif
  42035. +
  42036. +}
  42037. +/****************************************************************************
  42038. + -----------------------------MISC STUFF-------------------------
  42039. +*****************************************************************************/
  42040. +
  42041. +/* this is only for debugging */
  42042. +void print_buffer(u32 *buffer, int len)
  42043. +{
  42044. + int i;
  42045. + u8 *buf =(u8*)buffer;
  42046. +
  42047. + printk("ASCII BUFFER DUMP (len: %x):\n",len);
  42048. +
  42049. + for(i=0;i<len;i++)
  42050. + printk("%c",buf[i]);
  42051. +
  42052. + printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
  42053. +
  42054. + for(i=0;i<len;i++)
  42055. + printk("%x",buf[i]);
  42056. +
  42057. + printk("\n");
  42058. +}
  42059. +
  42060. +short check_nic_enought_desc(struct net_device *dev, priority_t priority)
  42061. +{
  42062. + struct r8180_priv *priv = ieee80211_priv(dev);
  42063. + //int used = atomic_read((priority == NORM_PRIORITY) ?
  42064. + // &priv->tx_np_pending : &priv->tx_lp_pending);
  42065. + int used = atomic_read(&priv->tx_pending[priority]);
  42066. +
  42067. + return (used < MAX_TX_URB);
  42068. +}
  42069. +
  42070. +void tx_timeout(struct net_device *dev)
  42071. +{
  42072. + struct r8180_priv *priv = ieee80211_priv(dev);
  42073. + //rtl8180_commit(dev);
  42074. + printk("@@@@ Transmit timeout at %ld, latency %ld\n", jiffies,
  42075. + jiffies - dev->trans_start);
  42076. +
  42077. + printk("@@@@ netif_queue_stopped = %d\n", netif_queue_stopped(dev));
  42078. +
  42079. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  42080. + schedule_work(&priv->reset_wq);
  42081. +#else
  42082. + schedule_task(&priv->reset_wq);
  42083. +#endif
  42084. + //DMESG("TXTIMEOUT");
  42085. +}
  42086. +
  42087. +
  42088. +/* this is only for debug */
  42089. +void dump_eprom(struct net_device *dev)
  42090. +{
  42091. + int i;
  42092. + for(i=0; i<63; i++)
  42093. + DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
  42094. +}
  42095. +
  42096. +/* this is only for debug */
  42097. +void rtl8180_dump_reg(struct net_device *dev)
  42098. +{
  42099. + int i;
  42100. + int n;
  42101. + int max=0xff;
  42102. +
  42103. + DMESG("Dumping NIC register map");
  42104. +
  42105. + for(n=0;n<=max;)
  42106. + {
  42107. + printk( "\nD: %2x> ", n);
  42108. + for(i=0;i<16 && n<=max;i++,n++)
  42109. + printk("%2x ",read_nic_byte(dev,n));
  42110. + }
  42111. + printk("\n");
  42112. +}
  42113. +
  42114. +/****************************************************************************
  42115. + ------------------------------HW STUFF---------------------------
  42116. +*****************************************************************************/
  42117. +
  42118. +
  42119. +void rtl8180_irq_enable(struct net_device *dev)
  42120. +{
  42121. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42122. + //priv->irq_enabled = 1;
  42123. +
  42124. + //write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |
  42125. + // INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |
  42126. + // INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |
  42127. + // INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
  42128. +
  42129. + write_nic_word(dev,INTA_MASK, priv->irq_mask);
  42130. +}
  42131. +
  42132. +
  42133. +void rtl8180_irq_disable(struct net_device *dev)
  42134. +{
  42135. + write_nic_word(dev,INTA_MASK,0);
  42136. + force_pci_posting(dev);
  42137. +// priv->irq_enabled = 0;
  42138. +}
  42139. +
  42140. +
  42141. +void rtl8180_set_mode(struct net_device *dev,int mode)
  42142. +{
  42143. + u8 ecmd;
  42144. + ecmd=read_nic_byte(dev, EPROM_CMD);
  42145. + ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
  42146. + ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
  42147. + ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
  42148. + ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
  42149. + write_nic_byte(dev, EPROM_CMD, ecmd);
  42150. +}
  42151. +
  42152. +
  42153. +void rtl8180_update_msr(struct net_device *dev)
  42154. +{
  42155. + struct r8180_priv *priv = ieee80211_priv(dev);
  42156. + u8 msr;
  42157. +
  42158. + msr = read_nic_byte(dev, MSR);
  42159. + msr &= ~ MSR_LINK_MASK;
  42160. +
  42161. + /* do not change in link_state != WLAN_LINK_ASSOCIATED.
  42162. + * msr must be updated if the state is ASSOCIATING.
  42163. + * this is intentional and make sense for ad-hoc and
  42164. + * master (see the create BSS/IBSS func)
  42165. + */
  42166. + if (priv->ieee80211->state == IEEE80211_LINKED){
  42167. +
  42168. + if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
  42169. + msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
  42170. + else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
  42171. + msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
  42172. + else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
  42173. + msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
  42174. +
  42175. + }else
  42176. + msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
  42177. +
  42178. + write_nic_byte(dev, MSR, msr);
  42179. +}
  42180. +
  42181. +void rtl8180_set_chan(struct net_device *dev,short ch)
  42182. +{
  42183. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42184. + u32 tx;
  42185. +
  42186. + priv->chan=ch;
  42187. + #if 0
  42188. + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
  42189. + priv->ieee80211->iw_mode == IW_MODE_MASTER){
  42190. +
  42191. + priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
  42192. + priv->ieee80211->master_chan = ch;
  42193. + rtl8180_update_beacon_ch(dev);
  42194. + }
  42195. + #endif
  42196. +
  42197. + /* this hack should avoid frame TX during channel setting*/
  42198. + tx = read_nic_dword(dev,TX_CONF);
  42199. + tx &= ~TX_LOOPBACK_MASK;
  42200. +
  42201. +#ifndef LOOP_TEST
  42202. + write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
  42203. + priv->rf_set_chan(dev,priv->chan);
  42204. + //mdelay(10); //CPU occupany is too high. LZM 31/10/2008
  42205. + write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
  42206. +#endif
  42207. +}
  42208. +
  42209. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  42210. +void rtl8187_rx_isr(struct urb *rx_urb, struct pt_regs *regs);
  42211. +#else
  42212. +void rtl8187_rx_isr(struct urb* rx_urb);
  42213. +#endif
  42214. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  42215. +void rtl8187_rx_manage_isr(struct urb *rx_urb, struct pt_regs *regs);
  42216. +#else
  42217. +void rtl8187_rx_manage_isr(struct urb* rx_urb);
  42218. +#endif
  42219. +
  42220. +
  42221. +
  42222. +void rtl8187_rx_urbsubmit(struct net_device *dev, struct urb* rx_urb)
  42223. +{
  42224. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42225. + int err;
  42226. +
  42227. + usb_fill_bulk_urb(rx_urb,priv->udev,
  42228. + usb_rcvbulkpipe(priv->udev,(NIC_8187 == priv->card_8187)?0x81:0x83),
  42229. + rx_urb->transfer_buffer,
  42230. + RX_URB_SIZE,
  42231. + rtl8187_rx_isr,
  42232. + dev);
  42233. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  42234. + err = usb_submit_urb(rx_urb, GFP_ATOMIC);
  42235. +#else
  42236. + err = usb_submit_urb(rx_urb);
  42237. +#endif
  42238. + if(err && err != -EPERM){
  42239. + DMESGE("cannot submit RX command. URB_STATUS %x",rx_urb->status);
  42240. + }
  42241. +}
  42242. +
  42243. +
  42244. +void rtl8187_rx_manage_urbsubmit(struct net_device *dev, struct urb* rx_urb)
  42245. +{
  42246. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42247. + int err;
  42248. +#ifdef THOMAS_BEACON
  42249. + usb_fill_bulk_urb(rx_urb,priv->udev,
  42250. + usb_rcvbulkpipe(priv->udev,0x09),
  42251. + rx_urb->transfer_buffer,
  42252. + rx_urb->transfer_buffer_length,
  42253. + rtl8187_rx_manage_isr, dev);
  42254. +#endif
  42255. +
  42256. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  42257. + err = usb_submit_urb(rx_urb, GFP_ATOMIC);
  42258. +#else
  42259. + err = usb_submit_urb(rx_urb);
  42260. +#endif
  42261. + if(err && err != -EPERM){
  42262. + DMESGE("cannot submit RX command. URB_STATUS %x",rx_urb->status);
  42263. + }
  42264. +}
  42265. +
  42266. +
  42267. +
  42268. +void rtl8187_rx_initiate(struct net_device *dev)
  42269. +{
  42270. + int i;
  42271. + unsigned long flags;
  42272. + struct urb *purb;
  42273. +
  42274. + struct sk_buff *pskb;
  42275. +
  42276. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42277. +
  42278. + priv->tx_urb_index = 0;
  42279. +
  42280. + if ((!priv->rx_urb) || (!priv->pp_rxskb)) {
  42281. +
  42282. + DMESGE("Cannot intiate RX urb mechanism");
  42283. + return;
  42284. +
  42285. + }
  42286. +
  42287. + priv->rx_inx = 0;
  42288. +#ifdef THOMAS_TASKLET
  42289. + atomic_set(&priv->irt_counter,0);
  42290. +#endif
  42291. + for(i = 0;i < MAX_RX_URB; i++){
  42292. +
  42293. + purb = priv->rx_urb[i] = usb_alloc_urb(0,GFP_KERNEL);
  42294. +
  42295. + if(!priv->rx_urb[i])
  42296. + goto destroy;
  42297. +
  42298. + pskb = priv->pp_rxskb[i] = dev_alloc_skb (RX_URB_SIZE);
  42299. +
  42300. + if (pskb == NULL)
  42301. + goto destroy;
  42302. +
  42303. + purb->transfer_buffer_length = RX_URB_SIZE;
  42304. + purb->transfer_buffer = pskb->data;
  42305. + }
  42306. +
  42307. + spin_lock_irqsave(&priv->irq_lock,flags);//added by thomas
  42308. +
  42309. + for(i=0;i<MAX_RX_URB;i++)
  42310. + rtl8187_rx_urbsubmit(dev,priv->rx_urb[i]);
  42311. +
  42312. + spin_unlock_irqrestore(&priv->irq_lock,flags);//added by thomas
  42313. +
  42314. + return;
  42315. +
  42316. +destroy:
  42317. +
  42318. + for(i = 0; i < MAX_RX_URB; i++) {
  42319. +
  42320. + purb = priv->rx_urb[i];
  42321. +
  42322. + if (purb)
  42323. + usb_free_urb(purb);
  42324. +
  42325. + pskb = priv->pp_rxskb[i];
  42326. +
  42327. + if (pskb)
  42328. + dev_kfree_skb_any(pskb);
  42329. +
  42330. + }
  42331. +
  42332. + return;
  42333. +}
  42334. +
  42335. +
  42336. +void rtl8187_rx_manage_initiate(struct net_device *dev)
  42337. +{
  42338. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42339. + if(!priv->rx_urb)
  42340. + DMESGE("Cannot intiate RX urb mechanism");
  42341. +
  42342. + rtl8187_rx_manage_urbsubmit(dev,priv->rx_urb[MAX_RX_URB]);
  42343. +
  42344. +}
  42345. +
  42346. +
  42347. +void rtl8187_set_rxconf(struct net_device *dev)
  42348. +{
  42349. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42350. + u32 rxconf;
  42351. +
  42352. + rxconf=read_nic_dword(dev,RX_CONF);
  42353. + rxconf = rxconf &~ MAC_FILTER_MASK;
  42354. + rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
  42355. + rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
  42356. + rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
  42357. + rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
  42358. + //rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
  42359. +#ifdef SW_ANTE_DIVERSITY
  42360. + rxconf = rxconf | priv->EEPROMCSMethod;//for antenna
  42361. +#endif
  42362. +
  42363. + if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
  42364. +
  42365. + if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
  42366. + dev->flags & IFF_PROMISC){
  42367. + rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
  42368. + } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
  42369. + rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
  42370. + rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
  42371. + }*/else{
  42372. + rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
  42373. + rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
  42374. + }
  42375. +
  42376. +
  42377. + if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
  42378. + rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
  42379. + rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
  42380. + }
  42381. +
  42382. + if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
  42383. + rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
  42384. +
  42385. +
  42386. + rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
  42387. + rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
  42388. + rxconf = rxconf &~ MAX_RX_DMA_MASK;
  42389. + rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
  42390. +
  42391. + rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
  42392. + rxconf = rxconf | RCR_ONLYERLPKT;
  42393. +
  42394. + //rxconf = rxconf &~ RCR_CS_MASK;
  42395. + //rxconf = rxconf | (1<<RCR_CS_SHIFT);
  42396. +
  42397. + write_nic_dword(dev, RX_CONF, rxconf);
  42398. +
  42399. + #ifdef DEBUG_RX
  42400. + DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
  42401. + #endif
  42402. +}
  42403. +
  42404. +void rtl8180_rx_enable(struct net_device *dev)
  42405. +{
  42406. + u8 cmd;
  42407. +
  42408. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42409. +
  42410. + rtl8187_rx_initiate(dev);
  42411. + rtl8187_set_rxconf(dev);
  42412. +
  42413. + if(NIC_8187 == priv->card_8187) {
  42414. + cmd=read_nic_byte(dev,CMD);
  42415. + write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
  42416. + } else {
  42417. + //write_nic_dword(dev, RCR, priv->ReceiveConfig);
  42418. + }
  42419. +}
  42420. +
  42421. +
  42422. +void rtl8180_tx_enable(struct net_device *dev)
  42423. +{
  42424. + u8 cmd;
  42425. + u8 byte;
  42426. + u32 txconf = 0;
  42427. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42428. +
  42429. + if(NIC_8187B == priv->card_8187){
  42430. + write_nic_dword(dev, TCR, priv->TransmitConfig);
  42431. + byte = read_nic_byte(dev, MSR);
  42432. + byte |= MSR_LINK_ENEDCA;
  42433. + write_nic_byte(dev, MSR, byte);
  42434. +#ifdef LOOP_TEST
  42435. + txconf= read_nic_dword(dev,TX_CONF);
  42436. + txconf = txconf | (TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT);
  42437. + write_nic_dword(dev,TX_CONF,txconf);
  42438. +#endif
  42439. + } else {
  42440. + byte = read_nic_byte(dev,CW_CONF);
  42441. + byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
  42442. + byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
  42443. + write_nic_byte(dev, CW_CONF, byte);
  42444. +
  42445. + byte = read_nic_byte(dev, TX_AGC_CTL);
  42446. + byte &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
  42447. + byte &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
  42448. + byte &= ~(1<<TX_AGC_CTL_FEEDBACK_ANT);
  42449. + write_nic_byte(dev, TX_AGC_CTL, byte);
  42450. +
  42451. + txconf= read_nic_dword(dev,TX_CONF);
  42452. +
  42453. +
  42454. + txconf = txconf &~ TX_LOOPBACK_MASK;
  42455. +
  42456. +#ifndef LOOP_TEST
  42457. + txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
  42458. +#else
  42459. + txconf = txconf | (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
  42460. +#endif
  42461. + txconf = txconf &~ TCR_SRL_MASK;
  42462. + txconf = txconf &~ TCR_LRL_MASK;
  42463. +
  42464. + txconf = txconf | (priv->retry_data<<TX_LRLRETRY_SHIFT); // long
  42465. + txconf = txconf | (priv->retry_rts<<TX_SRLRETRY_SHIFT); // short
  42466. +
  42467. + txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
  42468. +
  42469. + txconf = txconf &~ TCR_MXDMA_MASK;
  42470. + txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
  42471. +
  42472. + txconf = txconf | TCR_DISReqQsize;
  42473. + txconf = txconf | TCR_DISCW;
  42474. + txconf = txconf &~ TCR_SWPLCPLEN;
  42475. +
  42476. + txconf=txconf | (1<<TX_NOICV_SHIFT);
  42477. +
  42478. + write_nic_dword(dev,TX_CONF,txconf);
  42479. +
  42480. +#ifdef DEBUG_TX
  42481. + DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
  42482. +#endif
  42483. +
  42484. + cmd=read_nic_byte(dev,CMD);
  42485. + write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
  42486. + }
  42487. +}
  42488. +
  42489. +#if 0
  42490. +void rtl8180_beacon_tx_enable(struct net_device *dev)
  42491. +{
  42492. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42493. + priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
  42494. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  42495. + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
  42496. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  42497. +}
  42498. +
  42499. +
  42500. +void rtl8180_
  42501. +_disable(struct net_device *dev)
  42502. +{
  42503. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42504. + priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
  42505. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  42506. + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
  42507. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  42508. +}
  42509. +
  42510. +#endif
  42511. +
  42512. +
  42513. +void rtl8180_rtx_disable(struct net_device *dev)
  42514. +{
  42515. + u8 cmd;
  42516. + int i;
  42517. + struct r8180_priv *priv = ieee80211_priv(dev);
  42518. +
  42519. + cmd=read_nic_byte(dev,CMD);
  42520. + write_nic_byte(dev, CMD, cmd &~ \
  42521. + ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
  42522. + force_pci_posting(dev);
  42523. + mdelay(10);
  42524. +
  42525. +#ifdef THOMAS_BEACON
  42526. + {
  42527. + int index = priv->rx_inx;//0
  42528. + i=0;
  42529. + if(priv->rx_urb){
  42530. + while(i<MAX_RX_URB){
  42531. + if(priv->rx_urb[index]){
  42532. + usb_kill_urb(priv->rx_urb[index]);
  42533. + }
  42534. + if( index == (MAX_RX_URB-1) )
  42535. + index=0;
  42536. + else
  42537. + index=index+1;
  42538. + i++;
  42539. + }
  42540. + if(priv->rx_urb[MAX_RX_URB])
  42541. + usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
  42542. + }
  42543. + }
  42544. +#endif
  42545. +}
  42546. +
  42547. +
  42548. +int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
  42549. +{
  42550. + #if 0
  42551. + int i;
  42552. + u32 *tmp;
  42553. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42554. +
  42555. + priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
  42556. + sizeof(u32)*8*count,
  42557. + &priv->txbeaconringdma);
  42558. + if (!priv->txbeaconring) return -1;
  42559. + for (tmp=priv->txbeaconring,i=0;i<count;i++){
  42560. + *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
  42561. + /*
  42562. + *(tmp+2) = (u32)dma_tmp;
  42563. + *(tmp+3) = bufsize;
  42564. + */
  42565. + if(i+1<count)
  42566. + *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
  42567. + else
  42568. + *(tmp+4) = (u32)priv->txbeaconringdma;
  42569. +
  42570. + tmp=tmp+8;
  42571. + }
  42572. + #endif
  42573. + return 0;
  42574. +}
  42575. +
  42576. +long NetgearSignalStrengthTranslate(long LastSS,long CurrSS)
  42577. +{
  42578. + long RetSS;
  42579. +
  42580. + // Step 1. Scale mapping.
  42581. + if(CurrSS >= 71 && CurrSS <= 100){
  42582. + RetSS = 90 + ((CurrSS - 70) / 3);
  42583. + }else if(CurrSS >= 41 && CurrSS <= 70){
  42584. + RetSS = 78 + ((CurrSS - 40) / 3);
  42585. + }else if(CurrSS >= 31 && CurrSS <= 40){
  42586. + RetSS = 66 + (CurrSS - 30);
  42587. + }else if(CurrSS >= 21 && CurrSS <= 30){
  42588. + RetSS = 54 + (CurrSS - 20);
  42589. + }else if(CurrSS >= 5 && CurrSS <= 20){
  42590. + RetSS = 42 + (((CurrSS - 5) * 2) / 3);
  42591. + }else if(CurrSS == 4){
  42592. + RetSS = 36;
  42593. + }else if(CurrSS == 3){
  42594. + RetSS = 27;
  42595. + }else if(CurrSS == 2){
  42596. + RetSS = 18;
  42597. + }else if(CurrSS == 1){
  42598. + RetSS = 9;
  42599. + }else{
  42600. + RetSS = CurrSS;
  42601. + }
  42602. + //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
  42603. +
  42604. + // Step 2. Smoothing.
  42605. + if(LastSS > 0){
  42606. + RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
  42607. + }
  42608. + //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
  42609. +
  42610. + return RetSS;
  42611. +}
  42612. +
  42613. +extern long TranslateToDbm8187(u8 SignalStrengthIndex); // 0-100 index.
  42614. +//long TranslateToDbm8187(u8 SignalStrengthIndex) // 0-100 index.
  42615. +//{
  42616. + // long SignalPower; // in dBm.
  42617. +
  42618. + // Translate to dBm (x=0.5y-95).
  42619. + // SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
  42620. + // SignalPower -= 95;
  42621. +
  42622. + // return SignalPower;
  42623. +//}
  42624. +
  42625. +
  42626. +void rtl8180_reset(struct net_device *dev)
  42627. +{
  42628. +
  42629. + struct r8180_priv *priv = ieee80211_priv(dev);
  42630. + u8 cr;
  42631. + int i;
  42632. +
  42633. +
  42634. + /* make sure the analog power is on before
  42635. + * reset, otherwise reset may fail
  42636. + */
  42637. + if(NIC_8187 == priv->card_8187) {
  42638. + rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  42639. + rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
  42640. + rtl8180_irq_disable(dev);
  42641. + mdelay(200);
  42642. + write_nic_byte_E(dev,0x18,0x10);
  42643. + write_nic_byte_E(dev,0x18,0x11);
  42644. + write_nic_byte_E(dev,0x18,0x00);
  42645. + mdelay(200);
  42646. + }
  42647. +
  42648. +
  42649. + cr=read_nic_byte(dev,CMD);
  42650. + cr = cr & 2;
  42651. + cr = cr | (1<<CMD_RST_SHIFT);
  42652. + write_nic_byte(dev,CMD,cr);
  42653. +
  42654. + //lzm mod for up take too long time 20081201
  42655. + //force_pci_posting(dev);
  42656. + //mdelay(200);
  42657. + udelay(20);
  42658. +
  42659. + if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
  42660. + DMESGW("Card reset timeout!");
  42661. + else
  42662. + DMESG("Card successfully reset");
  42663. +
  42664. + if(NIC_8187 == priv->card_8187) {
  42665. +
  42666. + //printk("This is RTL8187 Reset procedure\n");
  42667. + rtl8180_set_mode(dev,EPROM_CMD_LOAD);
  42668. + force_pci_posting(dev);
  42669. + mdelay(200);
  42670. +
  42671. + /* after the eeprom load cycle, make sure we have
  42672. + * correct anaparams
  42673. + */
  42674. + rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
  42675. + rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
  42676. + }
  42677. + else {
  42678. + //printk("This is RTL8187B Reset procedure\n");
  42679. + //test pending bug, john 20070815
  42680. + //initialize tx_pending
  42681. + for(i=0;i<0x10;i++) atomic_set(&(priv->tx_pending[i]), 0);
  42682. +
  42683. + }
  42684. +
  42685. +}
  42686. +
  42687. +inline u16 ieeerate2rtlrate(int rate)
  42688. +{
  42689. + switch(rate){
  42690. + case 10:
  42691. + return 0;
  42692. + case 20:
  42693. + return 1;
  42694. + case 55:
  42695. + return 2;
  42696. + case 110:
  42697. + return 3;
  42698. + case 60:
  42699. + return 4;
  42700. + case 90:
  42701. + return 5;
  42702. + case 120:
  42703. + return 6;
  42704. + case 180:
  42705. + return 7;
  42706. + case 240:
  42707. + return 8;
  42708. + case 360:
  42709. + return 9;
  42710. + case 480:
  42711. + return 10;
  42712. + case 540:
  42713. + return 11;
  42714. + default:
  42715. + return 3;
  42716. +
  42717. + }
  42718. +}
  42719. +static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
  42720. +inline u16 rtl8180_rate2rate(short rate)
  42721. +{
  42722. + if (rate >12) return 10;
  42723. + return rtl_rate[rate];
  42724. +}
  42725. +
  42726. +void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
  42727. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  42728. +void rtl8187_rx_isr(struct urb *rx_urb, struct pt_regs *regs)
  42729. +#else
  42730. +void rtl8187_rx_isr(struct urb* rx_urb)
  42731. +#endif
  42732. +{
  42733. + struct net_device *dev = (struct net_device*)rx_urb->context;
  42734. + struct r8180_priv *priv = ieee80211_priv(dev);
  42735. + priv->rxurb_task = rx_urb;
  42736. +
  42737. +
  42738. + //DMESGW("David: Rx tasklet start!");
  42739. +
  42740. +#ifdef THOMAS_TASKLET
  42741. + atomic_inc( &priv->irt_counter );
  42742. +
  42743. + //if( likely(priv->irt_counter_head+1 != priv->irt_counter_tail) ){
  42744. + // priv->irt_counter_head = (priv->irt_counter_head+1)&0xffff ;
  42745. + tasklet_schedule(&priv->irq_rx_tasklet);
  42746. + //} else{
  42747. + //DMESG("error: priv->irt_counter_head is going to pass through priv->irt_counter_tail\n");
  42748. + /*
  42749. + skb = priv->pp_rxskb[priv->rx_inx];
  42750. + dev_kfree_skb_any(skb);
  42751. +
  42752. + skb = dev_alloc_skb(RX_URB_SIZE);
  42753. + if (skb == NULL)
  42754. + panic("No Skb For RX!/n");
  42755. +
  42756. + rx_urb->transfer_buffer = skb->data;
  42757. +
  42758. + priv->pp_rxskb[priv->rx_inx] = skb;
  42759. + if(status == 0)
  42760. + rtl8187_rx_urbsubmit(dev,rx_urb);
  42761. + else {
  42762. + priv->pp_rxskb[priv->rx_inx] = NULL;
  42763. + dev_kfree_skb_any(skb);
  42764. + printk("RX process aborted due to explicit shutdown (%x) ", status);
  42765. + }
  42766. +
  42767. + if (*prx_inx == (MAX_RX_URB -1))
  42768. + *prx_inx = 0;
  42769. + else
  42770. + *prx_inx = *prx_inx + 1;
  42771. +
  42772. + */
  42773. + //}
  42774. +#endif
  42775. +
  42776. +}
  42777. +
  42778. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  42779. +void rtl8187_rx_manage_isr(struct urb *rx_urb, struct pt_regs *regs)
  42780. +#else
  42781. +void rtl8187_rx_manage_isr(struct urb* rx_urb)
  42782. +#endif
  42783. +{
  42784. + struct net_device *dev = (struct net_device*)rx_urb->context;
  42785. + struct r8180_priv *priv = ieee80211_priv(dev);
  42786. + int status,cmd;
  42787. + struct sk_buff *skb;
  42788. + u32 *desc;
  42789. + int ret;
  42790. + unsigned long flag;
  42791. +
  42792. + //DMESG("RX %d ",rx_urb->status);
  42793. + status = rx_urb->status;
  42794. + if(status == 0){
  42795. +
  42796. + desc = (u32*)(rx_urb->transfer_buffer);
  42797. + cmd = (desc[0] >> 30) & 0x03;
  42798. + //printk(KERN_ALERT "buffersize = %d, length = %d, pipe = %p\n",
  42799. + //rx_urb->transfer_buffer_length, rx_urb->actual_length, rx_urb->pipe>>15);
  42800. +
  42801. + if(cmd == 0x00) {//beacon interrupt
  42802. + //send beacon packet
  42803. +
  42804. + spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
  42805. + if(priv->flag_beacon == true){
  42806. + //printk("rtl8187_rx_manage_isr(): CMD_TYPE0_BCN_INTR\n");
  42807. +
  42808. + skb = ieee80211_get_beacon(priv->ieee80211);
  42809. + if(!skb){
  42810. + DMESG("not enought memory for allocating beacon");
  42811. + return;
  42812. + }
  42813. + //printk(KERN_WARNING "to send beacon packet through beacon endpoint!\n");
  42814. + ret = rtl8180_tx(dev, (u32*)skb->data, skb->len, BEACON_PRIORITY,
  42815. + 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
  42816. +
  42817. + if( ret != 0 ){
  42818. + printk(KERN_ALERT "tx beacon packet error : %d !\n", ret);
  42819. + }
  42820. + dev_kfree_skb_any(skb);
  42821. +
  42822. + //} else {//0x00
  42823. + //{ log the device information
  42824. + // At present, It is not implemented just now.
  42825. + //}
  42826. + //}
  42827. +
  42828. + }
  42829. + spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
  42830. + }
  42831. + else if(cmd == 0x01){
  42832. + //printk("rtl8187_rx_manage_isr(): CMD_TYPE1_TX_CLOSE\n");
  42833. + priv->CurrRetryCnt += (u16)desc[0]&0x000000ff;
  42834. + //printk("priv->CurrRetryCnt is %d\n",priv->CurrRetryCnt);
  42835. + }
  42836. + else
  42837. + printk("HalUsbInCommandComplete8187B(): unknown Type(%#X) !!!\n", cmd);
  42838. +
  42839. + }else{
  42840. + priv->stats.rxstaterr++;
  42841. + priv->ieee80211->stats.rx_errors++;
  42842. + }
  42843. +
  42844. +
  42845. + if( status == 0 )
  42846. + //if(status != -ENOENT)
  42847. + rtl8187_rx_manage_urbsubmit(dev, rx_urb);
  42848. + else
  42849. + ;//DMESG("Mangement RX process aborted due to explicit shutdown");
  42850. +}
  42851. +
  42852. +#if 0
  42853. +void rtl8180_tx_queues_stop(struct net_device *dev)
  42854. +{
  42855. + //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42856. + u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
  42857. + dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
  42858. + dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
  42859. + dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
  42860. +
  42861. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  42862. + write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
  42863. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  42864. +}
  42865. +#endif
  42866. +
  42867. +void rtl8180_data_hard_stop(struct net_device *dev)
  42868. +{
  42869. + //FIXME !!
  42870. + #if 0
  42871. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42872. + priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
  42873. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  42874. + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
  42875. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  42876. + #endif
  42877. +}
  42878. +
  42879. +
  42880. +void rtl8180_data_hard_resume(struct net_device *dev)
  42881. +{
  42882. + // FIXME !!
  42883. + #if 0
  42884. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42885. + priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
  42886. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  42887. + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
  42888. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  42889. + #endif
  42890. +}
  42891. +
  42892. +unsigned int PRI2EP[4] = {0x06,0x07,0x05,0x04};
  42893. +// this function TX data frames when the ieee80211 stack requires this.
  42894. +// It checks also if we need to stop the ieee tx queue, eventually do it
  42895. +void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
  42896. +{
  42897. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42898. +
  42899. + short morefrag = 0;
  42900. + unsigned long flags;
  42901. + struct ieee80211_hdr *h = (struct ieee80211_hdr *) skb->data;
  42902. +
  42903. + unsigned char ep;
  42904. + short ret; //john
  42905. +
  42906. + if (le16_to_cpu(h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS)
  42907. + morefrag = 1;
  42908. + //DMESG("%x %x", h->frame_ctl, h->seq_ctl);
  42909. + /*
  42910. + * This function doesn't require lock because we make
  42911. + * sure it's called with the tx_lock already acquired.
  42912. + * this come from the kernel's hard_xmit callback (trought
  42913. + * the ieee stack, or from the try_wake_queue (again trought
  42914. + * the ieee stack.
  42915. + */
  42916. + spin_lock_irqsave(&priv->tx_lock,flags);
  42917. +
  42918. + //lzm mod 20081128 for sometimes wlan down but it still have some pkt to tx
  42919. + if((priv->ieee80211->bHwRadioOff)||(!priv->up))
  42920. + {
  42921. + spin_unlock_irqrestore(&priv->tx_lock,flags);
  42922. +
  42923. + return;
  42924. + }
  42925. +
  42926. + if(NIC_8187B == priv->card_8187){
  42927. + ep = PRI2EP[skb->priority];
  42928. + } else {
  42929. + ep = LOW_PRIORITY;
  42930. + }
  42931. + //if (!check_nic_enought_desc(dev, PRI2EP[skb->priority])){
  42932. + if (!check_nic_enought_desc(dev, ep)){
  42933. + DMESG("Error: no TX slot ");
  42934. + ieee80211_stop_queue(priv->ieee80211);
  42935. + }
  42936. +
  42937. +#ifdef LED_SHIN
  42938. + priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_TX);
  42939. +#endif
  42940. +
  42941. + ret = rtl8180_tx(dev, (u32*)skb->data, skb->len, ep, morefrag,ieeerate2rtlrate(rate));
  42942. + if(ret!=0) DMESG("Error: rtl8180_tx failed in rtl8180_hard_data_xmit\n");//john
  42943. +
  42944. + priv->stats.txdatapkt++;
  42945. +
  42946. + //if (!check_nic_enought_desc(dev, PRI2EP[skb->priority])){
  42947. + if (!check_nic_enought_desc(dev, ep)){
  42948. + ieee80211_stop_queue(priv->ieee80211);
  42949. + }
  42950. +
  42951. + spin_unlock_irqrestore(&priv->tx_lock,flags);
  42952. +
  42953. +}
  42954. +
  42955. +//This is a rough attempt to TX a frame
  42956. +//This is called by the ieee 80211 stack to TX management frames.
  42957. +//If the ring is full packet are dropped (for data frame the queue
  42958. +//is stopped before this can happen).
  42959. +
  42960. +int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
  42961. +{
  42962. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  42963. + struct ieee80211_device *ieee = priv->ieee80211;
  42964. + int ret;
  42965. + unsigned long flags;
  42966. + spin_lock_irqsave(&priv->tx_lock,flags);
  42967. +
  42968. + //lzm mod 20081128 for sometimes wlan down but it still have some pkt to tx
  42969. + if((priv->ieee80211->bHwRadioOff)||(!priv->up))
  42970. + {
  42971. + spin_unlock_irqrestore(&priv->tx_lock,flags);
  42972. + return 0;
  42973. + }
  42974. +
  42975. + ret = rtl8180_tx(dev, (u32*)skb->data, skb->len, MANAGE_PRIORITY, 0, ieeerate2rtlrate(ieee->basic_rate));
  42976. +
  42977. + priv->ieee80211->stats.tx_bytes+=skb->len;
  42978. + priv->ieee80211->stats.tx_packets++;
  42979. +
  42980. + spin_unlock_irqrestore(&priv->tx_lock,flags);
  42981. +
  42982. + return ret;
  42983. +}
  42984. +
  42985. +
  42986. +#if 0
  42987. +// longpre 144+48 shortpre 72+24
  42988. +u16 rtl8180_len2duration(u32 len, short rate,short* ext)
  42989. +{
  42990. + u16 duration;
  42991. + u16 drift;
  42992. + *ext=0;
  42993. +
  42994. + switch(rate){
  42995. + case 0://1mbps
  42996. + *ext=0;
  42997. + duration = ((len+4)<<4) /0x2;
  42998. + drift = ((len+4)<<4) % 0x2;
  42999. + if(drift ==0 ) break;
  43000. + duration++;
  43001. + break;
  43002. +
  43003. + case 1://2mbps
  43004. + *ext=0;
  43005. + duration = ((len+4)<<4) /0x4;
  43006. + drift = ((len+4)<<4) % 0x4;
  43007. + if(drift ==0 ) break;
  43008. + duration++;
  43009. + break;
  43010. +
  43011. + case 2: //5.5mbps
  43012. + *ext=0;
  43013. + duration = ((len+4)<<4) /0xb;
  43014. + drift = ((len+4)<<4) % 0xb;
  43015. + if(drift ==0 )
  43016. + break;
  43017. + duration++;
  43018. + break;
  43019. +
  43020. + default:
  43021. + case 3://11mbps
  43022. + *ext=0;
  43023. + duration = ((len+4)<<4) /0x16;
  43024. + drift = ((len+4)<<4) % 0x16;
  43025. + if(drift ==0 )
  43026. + break;
  43027. + duration++;
  43028. + if(drift > 6)
  43029. + break;
  43030. + *ext=1;
  43031. + break;
  43032. + }
  43033. +
  43034. + return duration;
  43035. +}
  43036. +#endif
  43037. +
  43038. +void rtl8180_try_wake_queue(struct net_device *dev, int pri);
  43039. +
  43040. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43041. +void rtl8187_lptx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43042. +#else
  43043. +void rtl8187_lptx_isr(struct urb* tx_urb)
  43044. +#endif
  43045. +{
  43046. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43047. + struct r8180_priv *priv = ieee80211_priv(dev);
  43048. +
  43049. + if(tx_urb->status == 0){
  43050. + dev->trans_start = jiffies; //john
  43051. + priv->stats.txlpokint++;
  43052. + priv->txokbytestotal+=tx_urb->actual_length;
  43053. + }else{
  43054. + priv->stats.txlperr++;
  43055. + }
  43056. +
  43057. + kfree(tx_urb->transfer_buffer);
  43058. + usb_free_urb(tx_urb);
  43059. +
  43060. + if(atomic_read(&priv->tx_pending[LOW_PRIORITY]) >= 1)
  43061. + atomic_dec(&priv->tx_pending[LOW_PRIORITY]);
  43062. +
  43063. + rtl8180_try_wake_queue(dev,LOW_PRIORITY);
  43064. +}
  43065. +
  43066. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43067. +void rtl8187_nptx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43068. +#else
  43069. +void rtl8187_nptx_isr(struct urb* tx_urb)
  43070. +#endif
  43071. +{
  43072. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43073. + struct r8180_priv *priv = ieee80211_priv(dev);
  43074. +
  43075. + if(tx_urb->status == 0){
  43076. + dev->trans_start = jiffies; //john
  43077. + priv->stats.txnpokint++;
  43078. + }else{
  43079. + priv->stats.txnperr++;
  43080. + }
  43081. +
  43082. + kfree(tx_urb->transfer_buffer);
  43083. + usb_free_urb(tx_urb);
  43084. +
  43085. + if(atomic_read(&priv->tx_pending[NORM_PRIORITY]) >= 1)
  43086. + atomic_dec(&priv->tx_pending[NORM_PRIORITY]);
  43087. + //rtl8180_try_wake_queue(dev,NORM_PRIORITY);
  43088. +}
  43089. +
  43090. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43091. +void rtl8187_votx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43092. +#else
  43093. +void rtl8187_votx_isr(struct urb* tx_urb)
  43094. +#endif
  43095. +{
  43096. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43097. + struct r8180_priv *priv = ieee80211_priv(dev);
  43098. +
  43099. + if(tx_urb->status == 0){
  43100. + dev->trans_start = jiffies; //john
  43101. + priv->stats.txvookint++;
  43102. + priv->txokbytestotal+=tx_urb->actual_length;
  43103. + }else{
  43104. + priv->stats.txvoerr++;
  43105. + }
  43106. +
  43107. + kfree(tx_urb->transfer_buffer);
  43108. + usb_free_urb(tx_urb);
  43109. +
  43110. + if(atomic_read(&priv->tx_pending[VO_PRIORITY]) >= 1)
  43111. + atomic_dec(&priv->tx_pending[VO_PRIORITY]);
  43112. + rtl8180_try_wake_queue(dev,VO_PRIORITY);
  43113. +}
  43114. +
  43115. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43116. +void rtl8187_vitx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43117. +#else
  43118. +void rtl8187_vitx_isr(struct urb* tx_urb)
  43119. +#endif
  43120. +{
  43121. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43122. + struct r8180_priv *priv = ieee80211_priv(dev);
  43123. +
  43124. + if(tx_urb->status == 0){
  43125. + dev->trans_start = jiffies; //john
  43126. + priv->stats.txviokint++;
  43127. + priv->txokbytestotal+=tx_urb->actual_length;
  43128. + }else{
  43129. + priv->stats.txvierr++;
  43130. + }
  43131. +
  43132. + kfree(tx_urb->transfer_buffer);
  43133. + usb_free_urb(tx_urb);
  43134. +
  43135. + if(atomic_read(&priv->tx_pending[VI_PRIORITY]) >= 1)
  43136. + atomic_dec(&priv->tx_pending[VI_PRIORITY]);
  43137. + rtl8180_try_wake_queue(dev,VI_PRIORITY);
  43138. +}
  43139. +
  43140. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43141. +void rtl8187_betx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43142. +#else
  43143. +void rtl8187_betx_isr(struct urb* tx_urb)
  43144. +#endif
  43145. +{
  43146. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43147. + struct r8180_priv *priv = ieee80211_priv(dev);
  43148. +
  43149. + if(tx_urb->status == 0){
  43150. + dev->trans_start = jiffies; //john
  43151. + priv->stats.txbeokint++;
  43152. + priv->txokbytestotal+=tx_urb->actual_length;
  43153. + }else{
  43154. + priv->stats.txbeerr++;
  43155. + }
  43156. +
  43157. + kfree(tx_urb->transfer_buffer);
  43158. + usb_free_urb(tx_urb);
  43159. +
  43160. + if(atomic_read(&priv->tx_pending[BE_PRIORITY]) >= 1)
  43161. + atomic_dec(&priv->tx_pending[BE_PRIORITY]);
  43162. + rtl8180_try_wake_queue(dev, BE_PRIORITY);
  43163. +}
  43164. +
  43165. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43166. +void rtl8187_bktx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43167. +#else
  43168. +void rtl8187_bktx_isr(struct urb* tx_urb)
  43169. +#endif
  43170. +{
  43171. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43172. + struct r8180_priv *priv = ieee80211_priv(dev);
  43173. +
  43174. + if(tx_urb->status == 0){
  43175. + dev->trans_start = jiffies; //john
  43176. + priv->stats.txbkokint++;
  43177. + }else{
  43178. + priv->stats.txbkerr++;
  43179. + }
  43180. +
  43181. + kfree(tx_urb->transfer_buffer);
  43182. + usb_free_urb(tx_urb);
  43183. +
  43184. + if(atomic_read(&priv->tx_pending[BK_PRIORITY]) >= 1)
  43185. + atomic_dec(&priv->tx_pending[BK_PRIORITY]);
  43186. + rtl8180_try_wake_queue(dev,BK_PRIORITY);
  43187. +}
  43188. +
  43189. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43190. +void rtl8187_beacontx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43191. +#else
  43192. +void rtl8187_beacontx_isr(struct urb* tx_urb)
  43193. +#endif
  43194. +{
  43195. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43196. + struct r8180_priv *priv = ieee80211_priv(dev);
  43197. +
  43198. + if(tx_urb->status == 0){
  43199. + dev->trans_start = jiffies; //john
  43200. + priv->stats.txbeaconokint++;
  43201. + priv->txokbytestotal+=tx_urb->actual_length;
  43202. + }else{
  43203. + priv->stats.txbeaconerr++;
  43204. + }
  43205. +
  43206. + kfree(tx_urb->transfer_buffer);
  43207. + usb_free_urb(tx_urb);
  43208. +
  43209. + if(atomic_read(&priv->tx_pending[BEACON_PRIORITY]) >= 1)
  43210. + atomic_dec(&priv->tx_pending[BEACON_PRIORITY]);
  43211. + //rtl8180_try_wake_queue(dev,BEACON_PRIORITY);
  43212. +}
  43213. +
  43214. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  43215. +void rtl8187_managetx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43216. +#else
  43217. +void rtl8187_managetx_isr(struct urb* tx_urb)
  43218. +#endif
  43219. +{
  43220. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43221. + struct r8180_priv *priv = ieee80211_priv(dev);
  43222. +
  43223. + if(tx_urb->status == 0){
  43224. + dev->trans_start = jiffies; //john
  43225. + priv->stats.txmanageokint++;
  43226. + priv->txokbytestotal+=tx_urb->actual_length;
  43227. + }else{
  43228. + priv->stats.txmanageerr++;
  43229. + }
  43230. +
  43231. + kfree(tx_urb->transfer_buffer);
  43232. + usb_free_urb(tx_urb);
  43233. +
  43234. + if(atomic_read(&priv->tx_pending[MANAGE_PRIORITY]) >= 1)
  43235. + atomic_dec(&priv->tx_pending[MANAGE_PRIORITY]);
  43236. +// rtl8180_try_wake_queue(dev,MANAGE_PRIORITY);
  43237. +}
  43238. +
  43239. +void rtl8187_beacon_stop(struct net_device *dev)
  43240. +{
  43241. + u8 msr, msrm, msr2;
  43242. + struct r8180_priv *priv = ieee80211_priv(dev);
  43243. + unsigned long flag;
  43244. + msr = read_nic_byte(dev, MSR);
  43245. + msrm = msr & MSR_LINK_MASK;
  43246. + msr2 = msr & ~MSR_LINK_MASK;
  43247. + if(NIC_8187B == priv->card_8187) {
  43248. + spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
  43249. + priv->flag_beacon = false;
  43250. + spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
  43251. + }
  43252. + if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
  43253. + (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
  43254. + write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
  43255. + write_nic_byte(dev, MSR, msr);
  43256. + }
  43257. +}
  43258. +
  43259. +
  43260. +void rtl8187_net_update(struct net_device *dev)
  43261. +{
  43262. +
  43263. + struct r8180_priv *priv = ieee80211_priv(dev);
  43264. + struct ieee80211_network *net;
  43265. + net = & priv->ieee80211->current_network;
  43266. +
  43267. +
  43268. + write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
  43269. + write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
  43270. +
  43271. + rtl8180_update_msr(dev);
  43272. +
  43273. + //rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  43274. + write_nic_word(dev, AtimWnd, 2);
  43275. + write_nic_word(dev, AtimtrItv, 100);
  43276. + write_nic_word(dev, BEACON_INTERVAL, net->beacon_interval);
  43277. + //write_nic_word(dev, BcnIntTime, 100);
  43278. + write_nic_word(dev, BcnIntTime, 0x3FF);
  43279. +
  43280. +
  43281. +}
  43282. +
  43283. +void rtl8187_beacon_tx(struct net_device *dev)
  43284. +{
  43285. + struct r8180_priv *priv = ieee80211_priv(dev);
  43286. + struct sk_buff *skb;
  43287. + int i = 0;
  43288. + u8 cr;
  43289. + unsigned long flag;
  43290. + rtl8187_net_update(dev);
  43291. +
  43292. + if(NIC_8187B == priv->card_8187) {
  43293. + //Cause TSF timer of MAC reset to 0
  43294. + cr=read_nic_byte(dev,CMD);
  43295. + cr = cr | (1<<CMD_RST_SHIFT);
  43296. + write_nic_byte(dev,CMD,cr);
  43297. +
  43298. + //lzm mod 20081201
  43299. + //mdelay(200);
  43300. + mdelay(20);
  43301. +
  43302. + if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
  43303. + DMESGW("Card reset timeout for ad-hoc!");
  43304. + else
  43305. + DMESG("Card successfully reset for ad-hoc");
  43306. +
  43307. + write_nic_byte(dev,CMD, (read_nic_byte(dev,CMD)|CR_RE|CR_TE));
  43308. + spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
  43309. + priv->flag_beacon = true;
  43310. + spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
  43311. +
  43312. + //rtl8187_rx_manage_initiate(dev);
  43313. + } else {
  43314. + printk(KERN_WARNING "get the beacon!\n");
  43315. + skb = ieee80211_get_beacon(priv->ieee80211);
  43316. + if(!skb){
  43317. + DMESG("not enought memory for allocating beacon");
  43318. + return;
  43319. + }
  43320. +
  43321. + write_nic_byte(dev, BQREQ, read_nic_byte(dev, BQREQ) | (1<<7));
  43322. +
  43323. + i=0;
  43324. + //while(!read_nic_byte(dev,BQREQ & (1<<7)))
  43325. + while( (read_nic_byte(dev, BQREQ) & (1<<7)) == 0 )
  43326. + {
  43327. + msleep_interruptible_rtl(HZ/2);
  43328. + if(i++ > 10){
  43329. + DMESGW("get stuck to wait HW beacon to be ready");
  43330. + return ;
  43331. + }
  43332. + }
  43333. + //tx
  43334. + rtl8180_tx(dev, (u32*)skb->data, skb->len, NORM_PRIORITY,
  43335. + 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
  43336. + if(skb)
  43337. + dev_kfree_skb_any(skb);
  43338. + }
  43339. +}
  43340. +
  43341. +#if 0
  43342. +void rtl8187_nptx_isr(struct urb *tx_urb, struct pt_regs *regs)
  43343. +{
  43344. + struct net_device *dev = (struct net_device*)tx_urb->context;
  43345. + struct r8180_priv *priv = ieee80211_priv(dev);
  43346. +
  43347. + if(tx_urb->status == 0)
  43348. + priv->stats.txnpokint++;
  43349. + else
  43350. + priv->stats.txnperr++;
  43351. + kfree(tx_urb->transfer_buffer);
  43352. + usb_free_urb(tx_urb);
  43353. + atomic_dec(&priv->tx_np_pending);
  43354. + //rtl8180_try_wake_queue(dev,NORM_PRIORITY);
  43355. +}
  43356. +#endif
  43357. +inline u8 rtl8180_IsWirelessBMode(u16 rate)
  43358. +{
  43359. + if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
  43360. + return 1;
  43361. + else return 0;
  43362. +}
  43363. +
  43364. +u16 N_DBPSOfRate(u16 DataRate);
  43365. +
  43366. +u16 ComputeTxTime(
  43367. + u16 FrameLength,
  43368. + u16 DataRate,
  43369. + u8 bManagementFrame,
  43370. + u8 bShortPreamble
  43371. + )
  43372. +{
  43373. + u16 FrameTime;
  43374. + u16 N_DBPS;
  43375. + u16 Ceiling;
  43376. +
  43377. + if( rtl8180_IsWirelessBMode(DataRate) )
  43378. + {
  43379. + if( bManagementFrame || !bShortPreamble || DataRate == 10 ){ // long preamble
  43380. + FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
  43381. + }else{ // Short preamble
  43382. + FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
  43383. + }
  43384. + if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
  43385. + FrameTime ++;
  43386. + } else { //802.11g DSSS-OFDM PLCP length field calculation.
  43387. + N_DBPS = N_DBPSOfRate(DataRate);
  43388. + Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
  43389. + + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
  43390. + FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
  43391. + }
  43392. + return FrameTime;
  43393. +}
  43394. +
  43395. +u16 N_DBPSOfRate(u16 DataRate)
  43396. +{
  43397. + u16 N_DBPS = 24;
  43398. +
  43399. + switch(DataRate)
  43400. + {
  43401. + case 60:
  43402. + N_DBPS = 24;
  43403. + break;
  43404. +
  43405. + case 90:
  43406. + N_DBPS = 36;
  43407. + break;
  43408. +
  43409. + case 120:
  43410. + N_DBPS = 48;
  43411. + break;
  43412. +
  43413. + case 180:
  43414. + N_DBPS = 72;
  43415. + break;
  43416. +
  43417. + case 240:
  43418. + N_DBPS = 96;
  43419. + break;
  43420. +
  43421. + case 360:
  43422. + N_DBPS = 144;
  43423. + break;
  43424. +
  43425. + case 480:
  43426. + N_DBPS = 192;
  43427. + break;
  43428. +
  43429. + case 540:
  43430. + N_DBPS = 216;
  43431. + break;
  43432. +
  43433. + default:
  43434. + break;
  43435. + }
  43436. +
  43437. + return N_DBPS;
  43438. +}
  43439. +// NOte!!!
  43440. +// the rate filled in is the rtl_rate.
  43441. +// while the priv->ieee80211->basic_rate,used in the following code is ieee80211 rate.
  43442. +
  43443. +#ifdef JUST_FOR_87SEMESH
  43444. +#define ActionHeadLen 30
  43445. +#endif
  43446. +#define sCrcLng 4
  43447. +#define sAckCtsLng 112 // bits in ACK and CTS frames
  43448. +short rtl8180_tx(struct net_device *dev, u32* txbuf, int len, priority_t priority,
  43449. + short morefrag, short rate)
  43450. +{
  43451. + u32 *tx;
  43452. + int pend ;
  43453. + int status;
  43454. + struct urb *tx_urb;
  43455. + int urb_len;
  43456. + struct r8180_priv *priv = ieee80211_priv(dev);
  43457. + struct ieee80211_hdr_3addr_QOS *frag_hdr = (struct ieee80211_hdr_3addr_QOS *)txbuf;
  43458. + struct ieee80211_device *ieee;//added for descriptor
  43459. + u8 dest[ETH_ALEN];
  43460. +
  43461. + bool bUseShortPreamble = false;
  43462. + bool bCTSEnable = false;
  43463. + bool bRTSEnable = false;
  43464. + u16 Duration = 0;
  43465. + u16 RtsDur = 0;
  43466. + u16 ThisFrameTime = 0;
  43467. + u16 TxDescDuration = 0;
  43468. +
  43469. + ieee = priv->ieee80211;
  43470. +#if 0
  43471. +//{added by david for filter the packet listed in the filter table
  43472. +#ifdef _RTL8187_EXT_PATCH_
  43473. + if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_acl_query))
  43474. + {
  43475. + if(!ieee->ext_patch_ieee80211_acl_query(ieee, frag_hdr->addr1)) {
  43476. + return 0;
  43477. + }
  43478. + }
  43479. +#endif
  43480. +//}
  43481. +#endif
  43482. +
  43483. +#ifdef JUST_FOR_87SEMESH
  43484. +//#ifdef Lawrence_Mesh
  43485. + u8* meshtype = (u8*)txbuf;
  43486. + if(*meshtype == 0xA8)
  43487. + {
  43488. + //overflow??
  43489. + //memcpy(meshtype+ActionHeadLen+2,meshtype+ActionHeadLen,Len-ActionHeadLen);
  43490. + //memcpy(meshtype+ActionHeadLen,0,2);
  43491. + u8 actionframe[256];
  43492. + memset(actionframe,0,256);
  43493. + memcpy(actionframe,meshtype,ActionHeadLen);
  43494. + memcpy(actionframe+ActionHeadLen+2,meshtype+ActionHeadLen,len-ActionHeadLen);
  43495. + txbuf = (u32*)actionframe;
  43496. + len=len+2;
  43497. + frag_hdr = (struct ieee80211_hdr_3addr_QOS *)txbuf;
  43498. + }
  43499. +#endif
  43500. +
  43501. + //pend = atomic_read((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending);
  43502. + pend = atomic_read(&priv->tx_pending[priority]);
  43503. + /* we are locked here so the two atomic_read and inc are executed without interleaves */
  43504. + if( pend > MAX_TX_URB){
  43505. + if(NIC_8187 == priv->card_8187) {
  43506. + if(priority == NORM_PRIORITY)
  43507. + priv->stats.txnpdrop++;
  43508. + else
  43509. + priv->stats.txlpdrop++;
  43510. +
  43511. + } else {
  43512. + switch (priority) {
  43513. + case VO_PRIORITY:
  43514. + priv->stats.txvodrop++;
  43515. + break;
  43516. + case VI_PRIORITY:
  43517. + priv->stats.txvidrop++;
  43518. + break;
  43519. + case BE_PRIORITY:
  43520. + priv->stats.txbedrop++;
  43521. + break;
  43522. + case MANAGE_PRIORITY: //lzm for MANAGE_PRIORITY pending
  43523. + if(priv->commit == 0)
  43524. + {
  43525. + priv->commit = 1;
  43526. + printk(KERN_INFO "manage pkt pending will commit now....\n");
  43527. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  43528. + schedule_work(&priv->reset_wq);
  43529. +#else
  43530. + schedule_task(&priv->reset_wq);
  43531. +#endif
  43532. + }
  43533. + break;
  43534. + default://BK_PRIORITY
  43535. + priv->stats.txbkdrop++;
  43536. + break;
  43537. + }
  43538. + }
  43539. + //printk(KERN_INFO "tx_pending: %d > MAX_TX_URB\n", priority);
  43540. + return -1;
  43541. + }
  43542. +
  43543. + urb_len = len + ((NIC_8187 == priv->card_8187)?(4*3):(4*8));
  43544. + if((0 == (urb_len&63))||(0 == (urb_len&511))) {
  43545. + urb_len += 1;
  43546. + }
  43547. +
  43548. + tx = kmalloc(urb_len, GFP_ATOMIC);
  43549. + if(!tx) return -ENOMEM;
  43550. + memset(tx, 0, sizeof(u32) * 8);
  43551. +
  43552. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  43553. + tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
  43554. +#else
  43555. + tx_urb = usb_alloc_urb(0);
  43556. +#endif
  43557. +
  43558. + if(!tx_urb){
  43559. + kfree(tx);
  43560. + return -ENOMEM;
  43561. + }
  43562. +
  43563. + // Check multicast/broadcast
  43564. + if (ieee->iw_mode == IW_MODE_INFRA) {
  43565. + /* To DS: Addr1 = BSSID, Addr2 = SA,
  43566. + Addr3 = DA */
  43567. + //memcpy(&dest, frag_hdr->addr3, ETH_ALEN);
  43568. + memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
  43569. + } else if (ieee->iw_mode == IW_MODE_ADHOC) {
  43570. + /* not From/To DS: Addr1 = DA, Addr2 = SA,
  43571. + Addr3 = BSSID */
  43572. + memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
  43573. + }
  43574. +
  43575. + if (is_multicast_ether_addr(dest) ||is_broadcast_ether_addr(dest))
  43576. + {
  43577. + Duration = 0;
  43578. + RtsDur = 0;
  43579. + bRTSEnable = false;
  43580. + bCTSEnable = false;
  43581. +
  43582. + ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), false, bUseShortPreamble);
  43583. + TxDescDuration = ThisFrameTime;
  43584. + } else {// Unicast packet
  43585. + //u8 AckRate;
  43586. + u16 AckTime;
  43587. +
  43588. + // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
  43589. + //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
  43590. + // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
  43591. + //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
  43592. + //For simplicity, just use the 1M basic rate
  43593. + AckTime = ComputeTxTime(14, 10,false, false); // AckCTSLng = 14 use 1M bps send
  43594. + //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
  43595. +
  43596. + if ( ((len + sCrcLng) > priv->rts) && priv->rts ){ // RTS/CTS.
  43597. + u16 RtsTime, CtsTime;
  43598. + //u16 CtsRate;
  43599. + bRTSEnable = true;
  43600. + bCTSEnable = false;
  43601. +
  43602. + // Rate and time required for RTS.
  43603. + RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, false, false);
  43604. + // Rate and time required for CTS.
  43605. + CtsTime = ComputeTxTime(14, 10,false, false); // AckCTSLng = 14 use 1M bps send
  43606. +
  43607. + // Figure out time required to transmit this frame.
  43608. + ThisFrameTime = ComputeTxTime(len + sCrcLng,
  43609. + rtl8180_rate2rate(rate),
  43610. + false,
  43611. + bUseShortPreamble);
  43612. +
  43613. + // RTS-CTS-ThisFrame-ACK.
  43614. + RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
  43615. +
  43616. + TxDescDuration = RtsTime + RtsDur;
  43617. + }else {// Normal case.
  43618. + bCTSEnable = false;
  43619. + bRTSEnable = false;
  43620. + RtsDur = 0;
  43621. +
  43622. + ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), false, bUseShortPreamble);
  43623. + TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
  43624. + }
  43625. +
  43626. + if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
  43627. + // ThisFrame-ACK.
  43628. + Duration = aSifsTime + AckTime;
  43629. + } else { // One or more fragments remained.
  43630. + u16 NextFragTime;
  43631. + NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
  43632. + rtl8180_rate2rate(rate),
  43633. + false, bUseShortPreamble );
  43634. +
  43635. + //ThisFrag-ACk-NextFrag-ACK.
  43636. + Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
  43637. + }
  43638. +
  43639. + } // End of Unicast packet
  43640. +
  43641. +
  43642. + //fill the tx desriptor
  43643. + tx[0] |= len & 0xfff;
  43644. +#ifdef JOHN_HWSEC
  43645. + if(frag_hdr->frame_ctl & IEEE80211_FCTL_WEP ){
  43646. + tx[0] &= 0xffff7fff;
  43647. + //group key may be different from pairwise key
  43648. + if( frag_hdr->addr1[0]==0xff &&
  43649. + frag_hdr->addr1[0]==0xff &&
  43650. + frag_hdr->addr1[0]==0xff &&
  43651. + frag_hdr->addr1[0]==0xff &&
  43652. + frag_hdr->addr1[0]==0xff &&
  43653. + frag_hdr->addr1[0]==0xff ){
  43654. + if(ieee->broadcast_key_type == KEY_TYPE_CCMP) tx[7] |= 0x2;//ccmp
  43655. + else tx[7] |= 0x1;//wep and tkip
  43656. + }
  43657. + else {
  43658. + if(ieee->pairwise_key_type == KEY_TYPE_CCMP) tx[7] |= 0x2;//CCMP
  43659. + else tx[7] |= 0x1;//WEP and TKIP
  43660. + }
  43661. + }
  43662. + else
  43663. +#endif /*JOHN_HWSEC*/
  43664. +
  43665. + tx[0] |= (1<<15);
  43666. +
  43667. + if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE){
  43668. + if (priv->plcp_preamble_mode==1 && rate!=0) { // short mode now, not long!
  43669. + tx[0] |= (1<<16);
  43670. + } // enable short preamble mode.
  43671. + }
  43672. +
  43673. + if(morefrag) tx[0] |= (1<<17);
  43674. + //printk(KERN_WARNING "rtl_rate = %d\n", rate);
  43675. + tx[0] |= (rate << 24); //TX rate
  43676. + frag_hdr->duration_id = Duration;
  43677. +
  43678. + if(NIC_8187B == priv->card_8187) {
  43679. + if(bCTSEnable) {
  43680. + tx[0] |= (1<<18);
  43681. + }
  43682. +
  43683. + if(bRTSEnable) //rts enable
  43684. + {
  43685. + tx[0] |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
  43686. + tx[0] |= (1<<23);//rts enable
  43687. + tx[1] |= RtsDur;//RTS Duration
  43688. + }
  43689. + tx[3] |= (TxDescDuration<<16); //DURATION
  43690. + if( WLAN_FC_GET_STYPE(le16_to_cpu(frag_hdr->frame_ctl)) == IEEE80211_STYPE_PROBE_RESP )
  43691. + tx[5] |= (1<<8);//(priv->retry_data<<8); //retry lim ;
  43692. + else
  43693. + tx[5] |= (11<<8);//(priv->retry_data<<8); //retry lim ;
  43694. +
  43695. + //frag_hdr->duration_id = Duration;
  43696. + memcpy(tx+8,txbuf,len);
  43697. + } else {
  43698. + if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
  43699. + tx[0] |= (1<<23); //enalbe RTS function
  43700. + tx[1] |= RtsDur; //Need to edit here! ----hikaru
  43701. + }
  43702. + else {
  43703. + tx[1]=0;
  43704. + }
  43705. + tx[0] |= (ieeerate2rtlrate(priv->ieee80211->basic_rate) << 19); /* RTS RATE - should be basic rate */
  43706. +
  43707. + tx[2] = 3; // CW min
  43708. + tx[2] |= (7<<4); //CW max
  43709. + tx[2] |= (11<<8);//(priv->retry_data<<8); //retry lim
  43710. +
  43711. + // printk("%x\n%x\n",tx[0],tx[1]);
  43712. +
  43713. +#ifdef DUMP_TX
  43714. + int i;
  43715. + printk("<Tx pkt>--rate %x---",rate);
  43716. + for (i = 0; i < (len + 3); i++)
  43717. + printk("%2x", ((u8*)tx)[i]);
  43718. + printk("---------------\n");
  43719. +#endif
  43720. + memcpy(tx+3,txbuf,len);
  43721. + }
  43722. +
  43723. +#ifdef JOHN_DUMP_TXDESC
  43724. + int i;
  43725. + printk("<Tx descriptor>--rate %x---",rate);
  43726. + for (i = 0; i < 8; i++)
  43727. + printk("%8x ", tx[i]);
  43728. + printk("\n");
  43729. +#endif
  43730. +#ifdef JOHN_DUMP_TXPKT
  43731. + {
  43732. + int j;
  43733. + printk("\n---------------------------------------------------------------------\n");
  43734. + printk("<Tx packet>--rate %x--urb_len in decimal %d",rate, urb_len);
  43735. + for (j = 32; j < (urb_len); j++){
  43736. + if( ( (j-32)%24 )==0 ) printk("\n");
  43737. + printk("%2x ", ((u8*)tx)[j]);
  43738. + }
  43739. + printk("\n---------------------------------------------------------------------\n");
  43740. +
  43741. + }
  43742. +#endif
  43743. +
  43744. + if(NIC_8187 == priv->card_8187) {
  43745. + usb_fill_bulk_urb(tx_urb,priv->udev,
  43746. + usb_sndbulkpipe(priv->udev,priority), tx,
  43747. + urb_len, (priority == LOW_PRIORITY)?rtl8187_lptx_isr:rtl8187_nptx_isr, dev);
  43748. +
  43749. + } else {
  43750. + //printk(KERN_WARNING "Tx packet use by submit urb!\n");
  43751. + /* FIXME check what EP is for low/norm PRI */
  43752. + usb_fill_bulk_urb(tx_urb,priv->udev,
  43753. + usb_sndbulkpipe(priv->udev,priority), tx,
  43754. + urb_len, TXISR_SELECT(priority), dev);
  43755. + }
  43756. +
  43757. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  43758. + status = usb_submit_urb(tx_urb, GFP_ATOMIC);
  43759. +#else
  43760. + status = usb_submit_urb(tx_urb);
  43761. +#endif
  43762. +
  43763. + if (!status){
  43764. + //atomic_inc((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending);
  43765. + atomic_inc(&priv->tx_pending[priority]);
  43766. + dev->trans_start = jiffies;
  43767. + //printk("=====> tx_pending[%d]=%d\n", priority, atomic_read(&priv->tx_pending[priority]));
  43768. + return 0;
  43769. + }else{
  43770. + DMESGE("Error TX URB %d, error pending %d",
  43771. + //atomic_read((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending),
  43772. + atomic_read(&priv->tx_pending[priority]),
  43773. + status);
  43774. + return -1;
  43775. + }
  43776. +}
  43777. +
  43778. + short rtl8187_usb_initendpoints(struct net_device *dev)
  43779. +{
  43780. + struct r8180_priv *priv = ieee80211_priv(dev);
  43781. +
  43782. + priv->rx_urb = (struct urb**) kmalloc (sizeof(struct urb*) * (MAX_RX_URB+1), GFP_KERNEL);
  43783. +
  43784. + memset(priv->rx_urb, 0, sizeof(struct urb*) * MAX_RX_URB);
  43785. +
  43786. +#ifdef JACKSON_NEW_RX
  43787. + priv->pp_rxskb = (struct sk_buff **)kmalloc(sizeof(struct sk_buff *) * MAX_RX_URB, GFP_KERNEL);
  43788. + if (priv->pp_rxskb == NULL)
  43789. + goto destroy;
  43790. +
  43791. + memset(priv->pp_rxskb, 0, sizeof(struct sk_buff*) * MAX_RX_URB);
  43792. +#endif
  43793. +#ifdef THOMAS_BEACON
  43794. + {
  43795. + int align;
  43796. + unsigned long oldaddr,newaddr; //lzm mod for 64bit cpu crash 20081107
  43797. + priv->rx_urb[MAX_RX_URB] = usb_alloc_urb(0, GFP_KERNEL);
  43798. + priv->oldaddr = kmalloc(16, GFP_KERNEL);
  43799. + oldaddr = (unsigned long)priv->oldaddr;
  43800. + align = oldaddr&3;
  43801. + if(align != 0 ){
  43802. + newaddr = oldaddr + 4 - align;
  43803. + priv->rx_urb[MAX_RX_URB]->transfer_buffer_length = 16-4+align;
  43804. + }
  43805. + else{
  43806. + newaddr = oldaddr;
  43807. + priv->rx_urb[MAX_RX_URB]->transfer_buffer_length = 16;
  43808. + }
  43809. + priv->rx_urb[MAX_RX_URB]->transfer_buffer = (u32*)newaddr;
  43810. + }
  43811. +#endif
  43812. +
  43813. +
  43814. + goto _middle;
  43815. +
  43816. +
  43817. +destroy:
  43818. +
  43819. +#ifdef JACKSON_NEW_RX
  43820. + if (priv->pp_rxskb) {
  43821. + kfree(priv->pp_rxskb);
  43822. + priv->pp_rxskb = NULL;
  43823. +
  43824. + }
  43825. +#endif
  43826. + if (priv->rx_urb) {
  43827. + kfree(priv->rx_urb);
  43828. + }
  43829. + priv->rx_urb = NULL;
  43830. +
  43831. + DMESGE("Endpoint Alloc Failure");
  43832. + return -ENOMEM;
  43833. +
  43834. +
  43835. +_middle:
  43836. +
  43837. + return 0;
  43838. +
  43839. +}
  43840. +#ifdef THOMAS_BEACON
  43841. +void rtl8187_usb_deleteendpoints(struct net_device *dev)
  43842. +{
  43843. + int i;
  43844. + struct r8180_priv *priv = ieee80211_priv(dev);
  43845. +
  43846. + if( in_interrupt() )
  43847. + printk(KERN_ALERT " %ld in interrupt \n",in_interrupt() );
  43848. + if(priv->rx_urb){
  43849. + for(i=0;i<(MAX_RX_URB+1);i++){
  43850. + if(priv->rx_urb[i]) {
  43851. + usb_kill_urb(priv->rx_urb[i]);
  43852. + usb_free_urb(priv->rx_urb[i]);
  43853. + }
  43854. + }
  43855. + kfree(priv->rx_urb);
  43856. + priv->rx_urb = NULL;
  43857. + }
  43858. + if(priv->oldaddr){
  43859. + kfree(priv->oldaddr);
  43860. + priv->oldaddr = NULL;
  43861. + }
  43862. + if (priv->pp_rxskb) {
  43863. + kfree(priv->pp_rxskb);
  43864. + priv->pp_rxskb = 0;
  43865. + }
  43866. +}
  43867. +#endif
  43868. +
  43869. +void rtl8187_set_rate(struct net_device *dev)
  43870. +{
  43871. + int i;
  43872. + u16 word;
  43873. + int basic_rate,min_rr_rate,max_rr_rate;
  43874. +
  43875. + //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
  43876. + // priv->ieee80211->state == IEEE80211_LINKED){
  43877. + basic_rate = ieeerate2rtlrate(240);
  43878. + min_rr_rate = ieeerate2rtlrate(60);
  43879. + max_rr_rate = ieeerate2rtlrate(240);
  43880. +
  43881. + /*
  43882. + }else{
  43883. + basic_rate = ieeerate2rtlrate(20);
  43884. + min_rr_rate = ieeerate2rtlrate(10);
  43885. + max_rr_rate = ieeerate2rtlrate(110);
  43886. + }
  43887. + */
  43888. +
  43889. + write_nic_byte(dev, RESP_RATE,
  43890. + max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
  43891. +
  43892. + //word = read_nic_word(dev, BRSR);
  43893. + word = read_nic_word(dev, BRSR_8187);
  43894. + word &= ~BRSR_MBR_8185;
  43895. +
  43896. +
  43897. + for(i=0;i<=basic_rate;i++)
  43898. + word |= (1<<i);
  43899. +
  43900. + //write_nic_word(dev, BRSR, word);
  43901. + write_nic_word(dev, BRSR_8187, word);
  43902. +}
  43903. +
  43904. +
  43905. +void rtl8187_link_change(struct net_device *dev)
  43906. +{
  43907. + struct r8180_priv *priv = ieee80211_priv(dev);
  43908. + //write_nic_word(dev, BintrItv, net->beacon_interval);
  43909. + rtl8187_net_update(dev);
  43910. + /*update timing params*/
  43911. + rtl8180_set_chan(dev, priv->chan);
  43912. + rtl8187_set_rxconf(dev);
  43913. +}
  43914. +
  43915. +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
  43916. +void rtl8180_wmm_param_update(struct work_struct* work)
  43917. +{
  43918. + struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
  43919. + struct net_device *dev = ieee->dev;
  43920. + struct r8180_priv *priv = ieee80211_priv(dev);
  43921. +#else
  43922. +void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
  43923. +{
  43924. + struct net_device *dev = ieee->dev;
  43925. + struct r8180_priv *priv = ieee80211_priv(dev);
  43926. +#endif
  43927. + u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
  43928. + u8 mode = ieee->current_network.mode;
  43929. + AC_CODING eACI;
  43930. + AC_PARAM AcParam;
  43931. + PAC_PARAM pAcParam;
  43932. + u8 i;
  43933. +
  43934. + //8187 need not to update wmm param, added by David, 2006.9.8
  43935. + if(NIC_8187 == priv->card_8187) {
  43936. + return;
  43937. + }
  43938. +
  43939. + if(!ieee->current_network.QoS_Enable)
  43940. + {
  43941. + //legacy ac_xx_param update
  43942. +
  43943. + AcParam.longData = 0;
  43944. + AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
  43945. + AcParam.f.AciAifsn.f.ACM = 0;
  43946. + AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
  43947. + AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
  43948. + AcParam.f.TXOPLimit = 0;
  43949. + for(eACI = 0; eACI < AC_MAX; eACI++)
  43950. + {
  43951. + AcParam.f.AciAifsn.f.ACI = (u8)eACI;
  43952. + {
  43953. + u8 u1bAIFS;
  43954. + u32 u4bAcParam;
  43955. +
  43956. +
  43957. + pAcParam = (PAC_PARAM)(&AcParam);
  43958. + // Retrive paramters to udpate.
  43959. + u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
  43960. + u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
  43961. + (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
  43962. + (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
  43963. + (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
  43964. +
  43965. + switch(eACI)
  43966. + {
  43967. + case AC1_BK:
  43968. + write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
  43969. + break;
  43970. +
  43971. + case AC0_BE:
  43972. + write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
  43973. + break;
  43974. +
  43975. + case AC2_VI:
  43976. + write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
  43977. + break;
  43978. +
  43979. + case AC3_VO:
  43980. + write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
  43981. + break;
  43982. +
  43983. + default:
  43984. + printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
  43985. + break;
  43986. + }
  43987. + }
  43988. + }
  43989. +
  43990. + return;
  43991. + }
  43992. + //
  43993. + for(i = 0; i < AC_MAX; i++){
  43994. + pAcParam = (AC_PARAM * )ac_param;
  43995. + {
  43996. + AC_CODING eACI;
  43997. + u8 u1bAIFS;
  43998. + u32 u4bAcParam;
  43999. +
  44000. + // Retrive paramters to udpate.
  44001. + eACI = pAcParam->f.AciAifsn.f.ACI;
  44002. + //Mode G/A: slotTimeTimer = 9; Mode B: 20
  44003. + u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
  44004. + u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
  44005. + (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
  44006. + (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
  44007. + (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
  44008. +
  44009. + switch(eACI)
  44010. + {
  44011. + case AC1_BK:
  44012. + write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
  44013. + //printk(KERN_WARNING "[%04x]:0x%08x\n",AC_BK_PARAM,read_nic_dword(dev, AC_BK_PARAM));
  44014. + break;
  44015. +
  44016. + case AC0_BE:
  44017. + write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
  44018. + //printk(KERN_WARNING "[%04x]:0x%08x\n",AC_BE_PARAM,read_nic_dword(dev, AC_BE_PARAM));
  44019. + break;
  44020. +
  44021. + case AC2_VI:
  44022. + write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
  44023. + //printk(KERN_WARNING "[%04x]:0x%08x\n",AC_VI_PARAM,read_nic_dword(dev, AC_VI_PARAM));
  44024. + break;
  44025. +
  44026. + case AC3_VO:
  44027. + write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
  44028. + //printk(KERN_WARNING "[%04x]:0x%08x\n",AC_VO_PARAM,read_nic_dword(dev, AC_VO_PARAM));
  44029. + break;
  44030. +
  44031. + default:
  44032. + printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
  44033. + break;
  44034. + }
  44035. + }
  44036. + ac_param += (sizeof(AC_PARAM));
  44037. + }
  44038. +}
  44039. +
  44040. +int IncludedInSupportedRates(struct r8180_priv *priv, u8 TxRate )
  44041. +{
  44042. + u8 rate_len;
  44043. + u8 rate_ex_len;
  44044. + u8 RateMask = 0x7F;
  44045. + u8 idx;
  44046. + unsigned short Found = 0;
  44047. + u8 NaiveTxRate = TxRate&RateMask;
  44048. +
  44049. + rate_len = priv->ieee80211->current_network.rates_len;
  44050. + rate_ex_len = priv->ieee80211->current_network.rates_ex_len;
  44051. +
  44052. + for( idx=0; idx< rate_len; idx++ ){
  44053. + if( (priv->ieee80211->current_network.rates[idx] & RateMask) == NaiveTxRate ) {
  44054. + Found = 1;
  44055. + goto found_rate;
  44056. + }
  44057. + }
  44058. +
  44059. + for( idx=0; idx< rate_ex_len; idx++ ) {
  44060. + if( (priv->ieee80211->current_network.rates_ex[idx] & RateMask) == NaiveTxRate ) {
  44061. + Found = 1;
  44062. + goto found_rate;
  44063. + }
  44064. + }
  44065. +
  44066. + return Found;
  44067. + found_rate:
  44068. + return Found;
  44069. +}
  44070. +//
  44071. +// Description:
  44072. +// Get the Tx rate one degree up form the input rate in the supported rates.
  44073. +// Return the upgrade rate if it is successed, otherwise return the input rate.
  44074. +// By Bruce, 2007-06-05.
  44075. +//
  44076. +u8 GetUpgradeTxRate(struct net_device *dev, u8 rate)
  44077. +{
  44078. + struct r8180_priv *priv = ieee80211_priv(dev);
  44079. + u8 UpRate;
  44080. +
  44081. + // Upgrade 1 degree.
  44082. + switch(rate)
  44083. + {
  44084. + case 108: // Up to 54Mbps.
  44085. + UpRate = 108;
  44086. + break;
  44087. +
  44088. + case 96: // Up to 54Mbps.
  44089. + UpRate = 108;
  44090. + break;
  44091. +
  44092. + case 72: // Up to 48Mbps.
  44093. + UpRate = 96;
  44094. + break;
  44095. +
  44096. + case 48: // Up to 36Mbps.
  44097. + UpRate = 72;
  44098. + break;
  44099. +
  44100. + case 36: // Up to 24Mbps.
  44101. + UpRate = 48;
  44102. + break;
  44103. +
  44104. + case 22: // Up to 18Mbps.
  44105. + UpRate = 36;
  44106. + break;
  44107. +
  44108. + case 11: // Up to 11Mbps.
  44109. + UpRate = 22;
  44110. + break;
  44111. +
  44112. + case 4: // Up to 5.5Mbps.
  44113. + UpRate = 11;
  44114. + break;
  44115. +
  44116. + case 2: // Up to 2Mbps.
  44117. + UpRate = 4;
  44118. + break;
  44119. +
  44120. + default:
  44121. + printk("GetUpgradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
  44122. + return rate;
  44123. + }
  44124. + // Check if the rate is valid.
  44125. + if(IncludedInSupportedRates(priv, UpRate))
  44126. + {
  44127. +// printk("GetUpgradeTxRate(): GetUpgrade Tx rate(%d) from %d !\n", UpRate, priv->CurrentOperaRate);
  44128. + return UpRate;
  44129. + }
  44130. + else
  44131. + {
  44132. + printk("GetUpgradeTxRate(): Tx rate (%d) is not in supported rates\n", UpRate);
  44133. + return rate;
  44134. + }
  44135. + return rate;
  44136. +}
  44137. +//
  44138. +// Description:
  44139. +// Get the Tx rate one degree down form the input rate in the supported rates.
  44140. +// Return the degrade rate if it is successed, otherwise return the input rate.
  44141. +// By Bruce, 2007-06-05.
  44142. +//
  44143. +u8 GetDegradeTxRate( struct net_device *dev, u8 rate)
  44144. +{
  44145. + struct r8180_priv *priv = ieee80211_priv(dev);
  44146. + u8 DownRate;
  44147. +
  44148. + // Upgrade 1 degree.
  44149. + switch(rate)
  44150. + {
  44151. + case 108: // Down to 48Mbps.
  44152. + DownRate = 96;
  44153. + break;
  44154. +
  44155. + case 96: // Down to 36Mbps.
  44156. + DownRate = 72;
  44157. + break;
  44158. +
  44159. + case 72: // Down to 24Mbps.
  44160. + DownRate = 48;
  44161. + break;
  44162. +
  44163. + case 48: // Down to 18Mbps.
  44164. + DownRate = 36;
  44165. + break;
  44166. +
  44167. + case 36: // Down to 11Mbps.
  44168. + DownRate = 22;
  44169. + break;
  44170. +
  44171. + case 22: // Down to 5.5Mbps.
  44172. + DownRate = 11;
  44173. + break;
  44174. +
  44175. + case 11: // Down to 2Mbps.
  44176. + DownRate = 4;
  44177. + break;
  44178. +
  44179. + case 4: // Down to 1Mbps.
  44180. + DownRate = 2;
  44181. + break;
  44182. +
  44183. + case 2: // Down to 1Mbps.
  44184. + DownRate = 2;
  44185. + break;
  44186. +
  44187. + default:
  44188. + printk("GetDegradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
  44189. + return rate;
  44190. + }
  44191. + // Check if the rate is valid.
  44192. + if(IncludedInSupportedRates(priv, DownRate)){
  44193. +// printk("GetDegradeTxRate(): GetDegrade Tx rate(%d) from %d!\n", DownRate, priv->CurrentOperaRate);
  44194. + return DownRate;
  44195. + }else{
  44196. + printk("GetDegradeTxRate(): Tx rate (%d) is not in supported rates\n", DownRate);
  44197. + return rate;
  44198. + }
  44199. + return rate;
  44200. +}
  44201. +
  44202. +//
  44203. +// Helper function to determine if specified data rate is
  44204. +// CCK rate.
  44205. +// 2005.01.25, by rcnjko.
  44206. +//
  44207. +bool MgntIsCckRate(u16 rate )
  44208. +{
  44209. + bool bReturn = false;
  44210. +
  44211. + if((rate <= 22) && (rate != 12) && (rate != 18)){
  44212. + bReturn = true;
  44213. + }
  44214. +
  44215. + return bReturn;
  44216. +}
  44217. +//by amy for rate adaptive
  44218. +//
  44219. +// Description:
  44220. +// Core logic to adjust Tx data rate in STA mode according to
  44221. +// OFDM retry count ratio.
  44222. +//
  44223. +// Note:
  44224. +// RTL8187 : pHalData->CurrRetryCnt = TallyCnt
  44225. +// RTL8187B : pHalData->CurrRetryCnt = PktRetryCnt in TxClosedCommand
  44226. +//
  44227. +void sta_rateadaptive8187B(struct net_device *dev)
  44228. +{
  44229. + struct r8180_priv *priv = ieee80211_priv(dev);
  44230. + unsigned long CurrTxokCnt;
  44231. + u16 CurrRetryCnt;
  44232. + u16 CurrRetryRate;
  44233. + unsigned long CurrRxokCnt;
  44234. + bool bTryUp = false;
  44235. + bool bTryDown = false;
  44236. + u8 TryUpTh = 1;
  44237. + u8 TryDownTh = 2;
  44238. + u32 TxThroughput;
  44239. + long CurrSignalStrength;
  44240. + bool bUpdateInitialGain = false;
  44241. + CurrRetryCnt = priv->CurrRetryCnt;
  44242. + CurrTxokCnt = (priv->stats.txbeaconokint + priv->stats.txmanageokint +
  44243. + priv->stats.txvookint + priv->stats.txviokint + priv->stats.txbeokint)- priv->LastTxokCnt;
  44244. + CurrRxokCnt = priv->stats.rxok - priv->LastRxokCnt;
  44245. + CurrSignalStrength = priv->RecvSignalPower;
  44246. + TxThroughput = (u32)(priv->txokbytestotal - priv->LastTxOKBytes);
  44247. + priv->LastTxOKBytes = priv->txokbytestotal;
  44248. + priv->CurrentOperaRate = priv->ieee80211->rate / 5;
  44249. + //printk("priv->CurrentOperaRate is %d\n",priv->CurrentOperaRate);
  44250. +
  44251. +#if 1
  44252. + //2 Compute retry ratio.
  44253. + if (CurrTxokCnt>0)
  44254. + {
  44255. + CurrRetryRate = (u16)(CurrRetryCnt*100/CurrTxokCnt);
  44256. + }
  44257. + else
  44258. + { // It may be serious retry. To distinguish serious retry or no packets modified by Bruce
  44259. + CurrRetryRate = (u16)(CurrRetryCnt*100/1);
  44260. + }
  44261. +#endif
  44262. +
  44263. +
  44264. + //printk("\n(1) priv->LastRetryRate: %d \n",priv->LastRetryRate);
  44265. + //printk("(2) CurrRetryCnt = %d \n", CurrRetryCnt);
  44266. + //printk("(3) TxokCnt = %d \n", CurrTxokCnt);
  44267. + //printk("(4) CurrRetryRate = %d \n", CurrRetryRate);
  44268. + //printk("(5) SignalStrength = %d \n",priv->RecvSignalPower);
  44269. +
  44270. + priv->LastRetryCnt = priv->CurrRetryCnt;
  44271. + priv->LastTxokCnt = (priv->stats.txbeaconokint + priv->stats.txmanageokint +
  44272. + priv->stats.txvookint + priv->stats.txviokint + priv->stats.txbeokint);
  44273. + priv->LastRxokCnt = priv->stats.rxok;
  44274. + priv->CurrRetryCnt = 0;
  44275. + //2No Tx packets, return to init_rate or not?
  44276. + if (CurrRetryRate==0 && CurrTxokCnt == 0)
  44277. + {
  44278. + //
  44279. + // 2007.04.09, by Roger. after 4.5 seconds in this condition, we try to raise rate.
  44280. + //
  44281. + priv->TryupingCountNoData++;
  44282. +
  44283. + //printk("No Tx packets, TryupingCountNoData(%d)\n", priv->TryupingCountNoData);
  44284. + //printk("(6) priv->CurrentOperaRate =%d\n", priv->CurrentOperaRate);
  44285. +
  44286. + if (priv->TryupingCountNoData>15)
  44287. + {
  44288. + priv->TryupingCountNoData = 0;
  44289. + priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
  44290. + // Reset Fail Record
  44291. + priv->LastFailTxRate = 0;
  44292. + priv->LastFailTxRateSS = -200;
  44293. + priv->FailTxRateCount = 0;
  44294. + }
  44295. + goto SetInitialGain;
  44296. + }
  44297. + else
  44298. + {
  44299. + priv->TryupingCountNoData=0; //Reset trying up times.
  44300. + }
  44301. +
  44302. + //
  44303. + // For Netgear case, I comment out the following signal strength estimation,
  44304. + // which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).
  44305. + // 2007.04.09, by Roger.
  44306. + //
  44307. +#if 1
  44308. + // If sample is not enough, we use signalstrength.
  44309. + if ( CurrTxokCnt<10|| CurrRetryCnt<10)
  44310. + {
  44311. + //printk("Sample is not enough, we use signalstrength for rate adaptive\n");
  44312. + //After 3 sec, and trying up.
  44313. + priv->TryupingCountNoData++;
  44314. + if (priv->TryupingCountNoData>10)
  44315. + {
  44316. + //printk("Sample is not enough and After 3 sec try up\n");
  44317. + priv->TryupingCountNoData=0;
  44318. +
  44319. + //
  44320. + // Added by Roger, 2007.01.04.
  44321. + // Signal strength plus 3 for air link.
  44322. + //
  44323. +
  44324. + if ( CurrSignalStrength>-68 )//&& IncludedInSupportedRates(Adapter, 108) )
  44325. + {
  44326. + priv->ieee80211->rate = 540;
  44327. + //pMgntInfo->CurrentOperaRate = 108;
  44328. + }
  44329. + else if (CurrSignalStrength>-70)// && IncludedInSupportedRates(Adapter, 96) )
  44330. + {
  44331. + priv->ieee80211->rate = 480;
  44332. + //pMgntInfo->CurrentOperaRate = 96;
  44333. + }
  44334. + else if (CurrSignalStrength>-73)// && IncludedInSupportedRates(Adapter, 72) )
  44335. + {
  44336. + priv->ieee80211->rate = 360;
  44337. + //pMgntInfo->CurrentOperaRate = 72;
  44338. + }
  44339. + else if (CurrSignalStrength>-79)// && IncludedInSupportedRates(Adapter, 48) )
  44340. + {
  44341. + priv->ieee80211->rate = 240;
  44342. + //pMgntInfo->CurrentOperaRate = 48;
  44343. + }
  44344. + else if (CurrSignalStrength>-81)// && IncludedInSupportedRates(Adapter, 36) )
  44345. + {
  44346. + priv->ieee80211->rate = 180;
  44347. + //pMgntInfo->CurrentOperaRate = 36;
  44348. + }
  44349. + else if (CurrSignalStrength>-83)// && IncludedInSupportedRates(Adapter, 22) )
  44350. + {
  44351. + priv->ieee80211->rate = 110;
  44352. + //pMgntInfo->CurrentOperaRate = 22;
  44353. + }
  44354. + else if (CurrSignalStrength>-85)// && IncludedInSupportedRates(Adapter, 11) )
  44355. + {
  44356. + priv->ieee80211->rate = 55;
  44357. + //pMgntInfo->CurrentOperaRate = 11;
  44358. + }
  44359. + else if (CurrSignalStrength>-89)// && IncludedInSupportedRates(Adapter, 4) )
  44360. + {
  44361. + priv->ieee80211->rate = 20;
  44362. + //pMgntInfo->CurrentOperaRate = 4;
  44363. + }
  44364. +
  44365. +
  44366. + }
  44367. +
  44368. + //2004.12.23 skip record for 0
  44369. + //pHalData->LastRetryRate = CurrRetryRate;
  44370. + //printk("pMgntInfo->CurrentOperaRate =%d\n",priv->ieee80211->rate);
  44371. + return;
  44372. + }
  44373. + else
  44374. + {
  44375. + priv->TryupingCountNoData=0;
  44376. + }
  44377. +#endif
  44378. + //
  44379. + // Restructure rate adaptive as the following main stages:
  44380. + // (1) Add retry threshold in 54M upgrading condition with signal strength.
  44381. + // (2) Add the mechanism to degrade to CCK rate according to signal strength
  44382. + // and retry rate.
  44383. + // (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated
  44384. + // situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
  44385. + // (4) Add the mehanism of trying to upgrade tx rate.
  44386. + // (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
  44387. + // By Bruce, 2007-06-05.
  44388. + //
  44389. + //
  44390. +
  44391. + // 11Mbps or 36Mbps
  44392. + // Check more times in these rate(key rates).
  44393. + //
  44394. + if(priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
  44395. + {
  44396. + TryUpTh += 9;
  44397. + }
  44398. + //
  44399. + // Let these rates down more difficult.
  44400. + //
  44401. + if(MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
  44402. + {
  44403. + TryDownTh += 1;
  44404. + }
  44405. +
  44406. + //1 Adjust Rate.
  44407. + if (priv->bTryuping == true)
  44408. + {
  44409. + //2 For Test Upgrading mechanism
  44410. + // Note:
  44411. + // Sometimes the throughput is upon on the capability bwtween the AP and NIC,
  44412. + // thus the low data rate does not improve the performance.
  44413. + // We randomly upgrade the data rate and check if the retry rate is improved.
  44414. +
  44415. + // Upgrading rate did not improve the retry rate, fallback to the original rate.
  44416. + if ( (CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput)
  44417. + {
  44418. + //Not necessary raising rate, fall back rate.
  44419. + bTryDown = true;
  44420. + //printk("Not necessary raising rate, fall back rate....\n");
  44421. + //printk("(7) priv->CurrentOperaRate =%d, TxThroughput = %d, LastThroughput = %d\n",
  44422. + // priv->CurrentOperaRate, TxThroughput, priv->LastTxThroughput);
  44423. + }
  44424. + else
  44425. + {
  44426. + priv->bTryuping = false;
  44427. + }
  44428. + }
  44429. + else if (CurrSignalStrength > -51 && (CurrRetryRate < 100))
  44430. + {
  44431. + //2For High Power
  44432. + //
  44433. + // Added by Roger, 2007.04.09.
  44434. + // Return to highest data rate, if signal strength is good enough.
  44435. + // SignalStrength threshold(-50dbm) is for RTL8186.
  44436. + // Revise SignalStrength threshold to -51dbm.
  44437. + //
  44438. + // Also need to check retry rate for safety, by Bruce, 2007-06-05.
  44439. + if(priv->CurrentOperaRate != 108)
  44440. + {
  44441. + bTryUp = true;
  44442. + // Upgrade Tx Rate directly.
  44443. + priv->TryupingCount += TryUpTh;
  44444. + //printk("StaRateAdaptive87B: Power(%d) is high enough!!. \n", CurrSignalStrength);
  44445. + }
  44446. + }
  44447. + // To avoid unstable rate jumping, comment out this condition, by Bruce, 2007-06-26.
  44448. + /*
  44449. + else if(CurrSignalStrength < -86 && CurrRetryRate >= 100)
  44450. + {
  44451. + //2 For Low Power
  44452. + //
  44453. + // Low signal strength and high current tx rate may cause Tx rate to degrade too slowly.
  44454. + // Update Tx rate to CCK rate directly.
  44455. + // By Bruce, 2007-06-05.
  44456. + //
  44457. + if(!MgntIsCckRate(pMgntInfo->CurrentOperaRate))
  44458. + {
  44459. + if(CurrSignalStrength > -88 && IncludedInSupportedRates(Adapter, 22)) // 11M
  44460. + pMgntInfo->CurrentOperaRate = 22;
  44461. + else if(CurrSignalStrength > -90 && IncludedInSupportedRates(Adapter, 11)) // 5.5M
  44462. + pMgntInfo->CurrentOperaRate = 11;
  44463. + else if(CurrSignalStrength > -92 && IncludedInSupportedRates(Adapter, 4)) // 2M
  44464. + pMgntInfo->CurrentOperaRate = 4;
  44465. + else // 1M
  44466. + pMgntInfo->CurrentOperaRate = 2;
  44467. + }
  44468. + else if(CurrRetryRate >= 200)
  44469. + {
  44470. + pMgntInfo->CurrentOperaRate = GetDegradeTxRate(Adapter, pMgntInfo->CurrentOperaRate);
  44471. + }
  44472. + RT_TRACE(COMP_RATE, DBG_LOUD, ("RA: Low Power(%d), or High Retry Rate(%d), set rate to CCK rate (%d). \n",
  44473. + CurrSignalStrength, CurrRetryRate, pMgntInfo->CurrentOperaRate));
  44474. + bUpdateInitialGain = TRUE;
  44475. + // Reset Fail Record
  44476. + pHalData->LastFailTxRate = 0;
  44477. + pHalData->LastFailTxRateSS = -200;
  44478. + pHalData->FailTxRateCount = 0;
  44479. + goto SetInitialGain;
  44480. + }
  44481. + */
  44482. + else if(CurrTxokCnt< 100 && CurrRetryRate >= 600)
  44483. + {
  44484. + //2 For Serious Retry
  44485. + //
  44486. + // Traffic is not busy but our Tx retry is serious.
  44487. + //
  44488. + bTryDown = true;
  44489. + // Let Rate Mechanism to degrade tx rate directly.
  44490. + priv->TryDownCountLowData += TryDownTh;
  44491. + //printk("RA: Tx Retry is serious. Degrade Tx Rate to %d directly...\n", priv->CurrentOperaRate);
  44492. + }
  44493. + else if ( priv->CurrentOperaRate == 108 )
  44494. + {
  44495. + //2For 54Mbps
  44496. + // if ( (CurrRetryRate>38)&&(pHalData->LastRetryRate>35))
  44497. + if ( (CurrRetryRate>33)&&(priv->LastRetryRate>32))
  44498. + {
  44499. + //(30,25) for cable link threshold. (38,35) for air link.
  44500. + //Down to rate 48Mbps.
  44501. + bTryDown = true;
  44502. + }
  44503. + }
  44504. + else if ( priv->CurrentOperaRate == 96 )
  44505. + {
  44506. + //2For 48Mbps
  44507. + // if ( ((CurrRetryRate>73) && (pHalData->LastRetryRate>72)) && IncludedInSupportedRates(Adapter, 72) )
  44508. + if ( ((CurrRetryRate>48) && (priv->LastRetryRate>47)))
  44509. + {
  44510. + //(73, 72) for temp used.
  44511. + //(25, 23) for cable link, (60,59) for air link.
  44512. + //CurrRetryRate plus 25 and 26 respectively for air link.
  44513. + //Down to rate 36Mbps.
  44514. + bTryDown = true;
  44515. + }
  44516. + else if ( (CurrRetryRate<8) && (priv->LastRetryRate<8) ) //TO DO: need to consider (RSSI)
  44517. + {
  44518. + bTryUp = true;
  44519. + }
  44520. + }
  44521. + else if ( priv->CurrentOperaRate == 72 )
  44522. + {
  44523. + //2For 36Mbps
  44524. + //if ( (CurrRetryRate>97) && (pHalData->LastRetryRate>97))
  44525. + if ( (CurrRetryRate>55) && (priv->LastRetryRate>54))
  44526. + {
  44527. + //(30,25) for cable link threshold respectively. (103,10) for air link respectively.
  44528. + //CurrRetryRate plus 65 and 69 respectively for air link threshold.
  44529. + //Down to rate 24Mbps.
  44530. + bTryDown = true;
  44531. + }
  44532. + // else if ( (CurrRetryRate<20) && (pHalData->LastRetryRate<20) && IncludedInSupportedRates(Adapter, 96) )//&& (device->LastRetryRate<15) ) //TO DO: need to consider (RSSI)
  44533. + else if ( (CurrRetryRate<15) && (priv->LastRetryRate<16))//&& (device->LastRetryRate<15) ) //TO DO: need to consider (RSSI)
  44534. + {
  44535. + bTryUp = true;
  44536. + }
  44537. + }
  44538. + else if ( priv->CurrentOperaRate == 48 )
  44539. + {
  44540. + //2For 24Mbps
  44541. + // if ( ((CurrRetryRate>119) && (pHalData->LastRetryRate>119) && IncludedInSupportedRates(Adapter, 36)))
  44542. + if ( ((CurrRetryRate>63) && (priv->LastRetryRate>62)))
  44543. + {
  44544. + //(15,15) for cable link threshold respectively. (119, 119) for air link threshold.
  44545. + //Plus 84 for air link threshold.
  44546. + //Down to rate 18Mbps.
  44547. + bTryDown = true;
  44548. + }
  44549. + // else if ( (CurrRetryRate<14) && (pHalData->LastRetryRate<15) && IncludedInSupportedRates(Adapter, 72)) //TO DO: need to consider (RSSI)
  44550. + else if ( (CurrRetryRate<20) && (priv->LastRetryRate<21)) //TO DO: need to consider (RSSI)
  44551. + {
  44552. + bTryUp = true;
  44553. + }
  44554. + }
  44555. + else if ( priv->CurrentOperaRate == 36 )
  44556. + {
  44557. + //2For 18Mbps
  44558. + if ( ((CurrRetryRate>109) && (priv->LastRetryRate>109)))
  44559. + {
  44560. + //(99,99) for cable link, (109,109) for air link.
  44561. + //Down to rate 11Mbps.
  44562. + bTryDown = true;
  44563. + }
  44564. + // else if ( (CurrRetryRate<15) && (pHalData->LastRetryRate<16) && IncludedInSupportedRates(Adapter, 48)) //TO DO: need to consider (RSSI)
  44565. + else if ( (CurrRetryRate<25) && (priv->LastRetryRate<26)) //TO DO: need to consider (RSSI)
  44566. + {
  44567. + bTryUp = true;
  44568. + }
  44569. + }
  44570. + else if ( priv->CurrentOperaRate == 22 )
  44571. + {
  44572. + //2For 11Mbps
  44573. + // if (CurrRetryRate>299 && IncludedInSupportedRates(Adapter, 11))
  44574. + if (CurrRetryRate>95)
  44575. + {
  44576. + bTryDown = true;
  44577. + }
  44578. + else if (CurrRetryRate<55)//&& (device->LastRetryRate<55) ) //TO DO: need to consider (RSSI)
  44579. + {
  44580. + bTryUp = true;
  44581. + }
  44582. + }
  44583. + else if ( priv->CurrentOperaRate == 11 )
  44584. + {
  44585. + //2For 5.5Mbps
  44586. + // if (CurrRetryRate>159 && IncludedInSupportedRates(Adapter, 4) )
  44587. + if (CurrRetryRate>149)
  44588. + {
  44589. + bTryDown = true;
  44590. + }
  44591. + // else if ( (CurrRetryRate<30) && (pHalData->LastRetryRate<30) && IncludedInSupportedRates(Adapter, 22) )
  44592. + else if ( (CurrRetryRate<60) && (priv->LastRetryRate < 65))
  44593. + {
  44594. + bTryUp = true;
  44595. + }
  44596. + }
  44597. + else if ( priv->CurrentOperaRate == 4 )
  44598. + {
  44599. + //2For 2 Mbps
  44600. + if((CurrRetryRate>99) && (priv->LastRetryRate>99))
  44601. + {
  44602. + bTryDown = true;
  44603. + }
  44604. + // else if ( (CurrRetryRate<50) && (pHalData->LastRetryRate<65) && IncludedInSupportedRates(Adapter, 11) )
  44605. + else if ( (CurrRetryRate < 65) && (priv->LastRetryRate < 70))
  44606. + {
  44607. + bTryUp = true;
  44608. + }
  44609. + }
  44610. + else if ( priv->CurrentOperaRate == 2 )
  44611. + {
  44612. + //2For 1 Mbps
  44613. + // if ( (CurrRetryRate<50) && (pHalData->LastRetryRate<65) && IncludedInSupportedRates(Adapter, 4))
  44614. + if ( (CurrRetryRate<70) && (priv->LastRetryRate<75))
  44615. + {
  44616. + bTryUp = true;
  44617. + }
  44618. + }
  44619. + if(bTryUp && bTryDown)
  44620. + printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
  44621. +
  44622. + //1 Test Upgrading Tx Rate
  44623. + // Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
  44624. + // To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
  44625. + if(!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
  44626. + && priv->CurrentOperaRate != 108 && priv->FailTxRateCount < 2)
  44627. + {
  44628. +#if 1
  44629. + if(jiffies% (CurrRetryRate + 101) == 0)
  44630. + {
  44631. + bTryUp = true;
  44632. + priv->bTryuping = true;
  44633. + printk("======================================================>StaRateAdaptive87B(): Randomly try upgrading...\n");
  44634. + }
  44635. +#endif
  44636. + }
  44637. + //1 Rate Mechanism
  44638. + if(bTryUp)
  44639. + {
  44640. + priv->TryupingCount++;
  44641. + priv->TryDownCountLowData = 0;
  44642. +
  44643. + //
  44644. + // Check more times if we need to upgrade indeed.
  44645. + // Because the largest value of pHalData->TryupingCount is 0xFFFF and
  44646. + // the largest value of pHalData->FailTxRateCount is 0x14,
  44647. + // this condition will be satisfied at most every 2 min.
  44648. + //
  44649. + if((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
  44650. + (CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping)
  44651. + {
  44652. + priv->TryupingCount = 0;
  44653. + //
  44654. + // When transfering from CCK to OFDM, DIG is an important issue.
  44655. + //
  44656. + if(priv->CurrentOperaRate == 22)
  44657. + bUpdateInitialGain = true;
  44658. + // (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold.
  44659. + // (2)If the signal strength is increased, it may be able to upgrade.
  44660. + priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
  44661. + //printk("StaRateAdaptive87B(): Upgrade Tx Rate to %d\n", priv->CurrentOperaRate);
  44662. +
  44663. + // Update Fail Tx rate and count.
  44664. + if(priv->LastFailTxRate != priv->CurrentOperaRate)
  44665. + {
  44666. + priv->LastFailTxRate = priv->CurrentOperaRate;
  44667. + priv->FailTxRateCount = 0;
  44668. + priv->LastFailTxRateSS = -200; // Set lowest power.
  44669. + }
  44670. + }
  44671. + }
  44672. + else
  44673. + {
  44674. + if(priv->TryupingCount > 0)
  44675. + priv->TryupingCount --;
  44676. + }
  44677. +
  44678. + if(bTryDown)
  44679. + {
  44680. + priv->TryDownCountLowData++;
  44681. + priv->TryupingCount = 0;
  44682. +
  44683. +
  44684. + //Check if Tx rate can be degraded or Test trying upgrading should fallback.
  44685. + if(priv->TryDownCountLowData > TryDownTh || priv->bTryuping)
  44686. + {
  44687. + priv->TryDownCountLowData = 0;
  44688. + priv->bTryuping = false;
  44689. + // Update fail information.
  44690. + if(priv->LastFailTxRate == priv->CurrentOperaRate)
  44691. + {
  44692. + priv->FailTxRateCount ++;
  44693. + // Record the Tx fail rate signal strength.
  44694. + if(CurrSignalStrength > priv->LastFailTxRateSS)
  44695. + {
  44696. + priv->LastFailTxRateSS = CurrSignalStrength;
  44697. + }
  44698. + }
  44699. + else
  44700. + {
  44701. + priv->LastFailTxRate = priv->CurrentOperaRate;
  44702. + priv->FailTxRateCount = 1;
  44703. + priv->LastFailTxRateSS = CurrSignalStrength;
  44704. + }
  44705. + priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
  44706. + //
  44707. + // When it is CCK rate, it may need to update initial gain to receive lower power packets.
  44708. + //
  44709. + if(MgntIsCckRate(priv->CurrentOperaRate))
  44710. + {
  44711. + bUpdateInitialGain = true;
  44712. + }
  44713. + //printk("StaRateAdaptive87B(): Degrade Tx Rate to %d\n", priv->CurrentOperaRate);
  44714. + }
  44715. + }
  44716. + else
  44717. + {
  44718. + if(priv->TryDownCountLowData > 0)
  44719. + priv->TryDownCountLowData --;
  44720. + }
  44721. + // Keep the Tx fail rate count to equal to 0x15 at most.
  44722. + // Reduce the fail count at least to 10 sec if tx rate is tending stable.
  44723. + if(priv->FailTxRateCount >= 0x15 ||
  44724. + (!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6))
  44725. + {
  44726. + priv->FailTxRateCount --;
  44727. + }
  44728. +
  44729. + //
  44730. + // We need update initial gain when we set tx rate "from OFDM to CCK" or
  44731. + // "from CCK to OFDM".
  44732. + //
  44733. +SetInitialGain:
  44734. +#if 1 //to be done
  44735. + if(bUpdateInitialGain)
  44736. + {
  44737. + if(MgntIsCckRate(priv->CurrentOperaRate)) // CCK
  44738. + {
  44739. + if(priv->InitialGain > priv->RegBModeGainStage)
  44740. + {
  44741. + if(CurrSignalStrength < -85) // Low power, OFDM [0x17] = 26.
  44742. + {
  44743. + priv->InitialGain = priv->RegBModeGainStage;
  44744. + }
  44745. + else if(priv->InitialGain > priv->RegBModeGainStage + 1)
  44746. + {
  44747. + priv->InitialGain -= 2;
  44748. + }
  44749. + else
  44750. + {
  44751. + priv->InitialGain --;
  44752. + }
  44753. + UpdateInitialGain(dev);
  44754. + }
  44755. + }
  44756. + else // OFDM
  44757. + {
  44758. + if(priv->InitialGain < 4)
  44759. + {
  44760. + priv->InitialGain ++;
  44761. + UpdateInitialGain(dev);
  44762. + }
  44763. + }
  44764. + }
  44765. +#endif
  44766. + //Record the related info
  44767. + priv->LastRetryRate = CurrRetryRate;
  44768. + priv->LastTxThroughput = TxThroughput;
  44769. + priv->ieee80211->rate = priv->CurrentOperaRate * 5;
  44770. +}
  44771. +
  44772. +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
  44773. +void rtl8180_rate_adapter(struct work_struct * work)
  44774. +{
  44775. + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
  44776. + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,rate_adapter_wq);
  44777. + struct net_device *dev = ieee->dev;
  44778. +#else
  44779. +void rtl8180_rate_adapter(struct net_device *dev)
  44780. +{
  44781. +
  44782. +#endif
  44783. + sta_rateadaptive8187B(dev);
  44784. +}
  44785. +
  44786. +void timer_rate_adaptive(unsigned long data)
  44787. +{
  44788. + struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
  44789. + //DMESG("---->timer_rate_adaptive()\n");
  44790. + if(!priv->up)
  44791. + {
  44792. + //DMESG("<----timer_rate_adaptive():driver is not up!\n");
  44793. + return;
  44794. + }
  44795. + if( (priv->ieee80211->mode != IEEE_B) &&
  44796. + (priv->ieee80211->iw_mode != IW_MODE_MASTER)
  44797. + && ((priv->ieee80211->state == IEEE80211_LINKED)||(priv->ieee80211->state == IEEE80211_MESH_LINKED)))
  44798. + {
  44799. + //DMESG("timer_rate_adaptive():schedule rate_adapter_wq\n");
  44800. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  44801. + queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->rate_adapter_wq, 0);
  44802. +#else
  44803. + queue_work(priv->ieee80211->wq,&priv->ieee80211->rate_adapter_wq);
  44804. +#endif
  44805. + }
  44806. +
  44807. + mod_timer(&priv->rateadapter_timer, jiffies + MSECS(DEFAULT_RATE_ADAPTIVE_TIMER_PERIOD));
  44808. + //DMESG("<----timer_rate_adaptive()\n");
  44809. +}
  44810. +//by amy for rate adaptive
  44811. +
  44812. +
  44813. +void rtl8180_irq_rx_tasklet_new(struct r8180_priv *priv);
  44814. +void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
  44815. +
  44816. +//YJ,add,080828,for KeepAlive
  44817. +#if 0
  44818. +static void MgntLinkKeepAlive(struct r8180_priv *priv )
  44819. +{
  44820. + if (priv->keepAliveLevel == 0)
  44821. + return;
  44822. +
  44823. + if(priv->ieee80211->state == IEEE80211_LINKED)
  44824. + {
  44825. + //
  44826. + // Keep-Alive.
  44827. + //
  44828. + //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
  44829. +
  44830. + if ( (priv->keepAliveLevel== 2) ||
  44831. + (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
  44832. + priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
  44833. + )
  44834. + {
  44835. + priv->link_detect.IdleCount++;
  44836. +
  44837. + //
  44838. + // Send a Keep-Alive packet packet to AP if we had been idle for a while.
  44839. + //
  44840. + if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
  44841. + {
  44842. + priv->link_detect.IdleCount = 0;
  44843. + ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
  44844. + }
  44845. + }
  44846. + else
  44847. + {
  44848. + priv->link_detect.IdleCount = 0;
  44849. + }
  44850. + priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
  44851. + priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
  44852. + }
  44853. +}
  44854. +//YJ,add,080828,for KeepAlive,end
  44855. +#endif
  44856. +void InactivePowerSave(struct net_device *dev)
  44857. +{
  44858. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  44859. +
  44860. + //
  44861. + // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
  44862. + // is really scheduled.
  44863. + // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
  44864. + // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
  44865. + // blocks the IPS procedure of switching RF.
  44866. + // By Bruce, 2007-12-25.
  44867. + //
  44868. + priv->bSwRfProcessing = true;
  44869. + MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
  44870. +
  44871. + //
  44872. + // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
  44873. + //
  44874. +#if 0
  44875. + while( index < 4 )
  44876. + {
  44877. + if( ( pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP104_Encryption ) ||
  44878. + (pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP40_Encryption) )
  44879. + {
  44880. + if( pMgntInfo->SecurityInfo.KeyLen[index] != 0)
  44881. + pAdapter->HalFunc.SetKeyHandler(pAdapter, index, 0, FALSE, pMgntInfo->SecurityInfo.PairwiseEncAlgorithm, TRUE, FALSE);
  44882. +
  44883. + }
  44884. + index++;
  44885. + }
  44886. +#endif
  44887. + priv->bSwRfProcessing = false;
  44888. +}
  44889. +
  44890. +//
  44891. +// Description:
  44892. +// Enter the inactive power save mode. RF will be off
  44893. +// 2007.08.17, by shien chang.
  44894. +//
  44895. +void IPSEnter(struct net_device *dev)
  44896. +{
  44897. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  44898. + RT_RF_POWER_STATE rtState;
  44899. +
  44900. + if (priv->bInactivePs)
  44901. + {
  44902. + rtState = priv->eRFPowerState;
  44903. +
  44904. + //
  44905. + // Added by Bruce, 2007-12-25.
  44906. + // Do not enter IPS in the following conditions:
  44907. + // (1) RF is already OFF or Sleep
  44908. + // (2) bSwRfProcessing (indicates the IPS is still under going)
  44909. + // (3) Connectted (only disconnected can trigger IPS)
  44910. + // (4) IBSS (send Beacon)
  44911. + // (5) AP mode (send Beacon)
  44912. + //
  44913. + if (rtState == eRfOn && !priv->bSwRfProcessing && (priv->ieee80211->iw_mode != IW_MODE_ADHOC)
  44914. + && (priv->ieee80211->state != IEEE80211_LINKED ))
  44915. + {
  44916. +#ifdef CONFIG_RADIO_DEBUG
  44917. + DMESG("IPSEnter(): Turn off RF.");
  44918. +#endif
  44919. + priv->eInactivePowerState = eRfOff;
  44920. + InactivePowerSave(dev);
  44921. + //SetRFPowerState(dev, priv->eInactivePowerState);
  44922. + //MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
  44923. + }
  44924. + }
  44925. + //printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);
  44926. +}
  44927. +
  44928. +void IPSLeave(struct net_device *dev)
  44929. +{
  44930. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  44931. + RT_RF_POWER_STATE rtState;
  44932. + if (priv->bInactivePs)
  44933. + {
  44934. + rtState = priv->eRFPowerState;
  44935. + if (rtState == eRfOff && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS)
  44936. + {
  44937. +#ifdef CONFIG_RADIO_DEBUG
  44938. + DMESG("ISLeave(): Turn on RF.");
  44939. +#endif
  44940. + priv->eInactivePowerState = eRfOn;
  44941. + InactivePowerSave(dev);
  44942. + }
  44943. + }
  44944. +// printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);
  44945. +}
  44946. +//by amy for power save
  44947. +
  44948. +//YJ,add,081230
  44949. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  44950. +void IPSLeave_wq (struct work_struct *work)
  44951. +{
  44952. + struct ieee80211_device *ieee = container_of(work,struct ieee80211_device,ips_leave_wq);
  44953. + struct net_device *dev = ieee->dev;
  44954. +#else
  44955. +void IPSLeave_wq(struct net_device *dev)
  44956. +{
  44957. +#endif
  44958. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  44959. + down(&priv->ieee80211->ips_sem);
  44960. + IPSLeave(dev);
  44961. + up(&priv->ieee80211->ips_sem);
  44962. +}
  44963. +
  44964. +void ieee80211_ips_leave(struct net_device *dev)
  44965. +{
  44966. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  44967. + if(priv->bInactivePs){
  44968. + if(priv->eRFPowerState == eRfOff)
  44969. + {
  44970. + //DMESG("%s", __FUNCTION__);
  44971. + queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
  44972. + }
  44973. + }
  44974. +}
  44975. +//YJ,add,081230,end
  44976. +
  44977. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  44978. +void rtl8180_watch_dog_wq (struct work_struct *work)
  44979. +{
  44980. + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
  44981. + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,watch_dog_wq);
  44982. + struct net_device *dev = ieee->dev;
  44983. +#else
  44984. +void rtl8180_watch_dog_wq(struct net_device *dev)
  44985. +{
  44986. +#endif
  44987. + struct r8180_priv *priv = ieee80211_priv(dev);
  44988. + //bool bEnterPS = false;
  44989. + //bool bBusyTraffic = false;
  44990. + u32 TotalRxNum = 0;
  44991. + u16 SlotIndex = 0, i=0;
  44992. + //YJ,add,080828,for link state check
  44993. + if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
  44994. + SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
  44995. + priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
  44996. + for( i=0; i<priv->link_detect.SlotNum; i++ )
  44997. + TotalRxNum+= priv->link_detect.RxFrameNum[i];
  44998. +#if 0 //for roaming temp del
  44999. + if(TotalRxNum == 0){
  45000. + priv->ieee80211->state = IEEE80211_ASSOCIATING;
  45001. + printk("=========>turn to another AP\n");
  45002. + queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
  45003. + }
  45004. +#endif
  45005. + }
  45006. + priv->link_detect.NumRxOkInPeriod = 0;
  45007. + priv->link_detect.NumTxOkInPeriod = 0;
  45008. + priv->ieee80211->NumRxDataInPeriod = 0;
  45009. + priv->ieee80211->NumRxBcnInPeriod = 0;
  45010. +
  45011. +#ifdef CONFIG_IPS
  45012. + if(priv->ieee80211->actscanning == false){
  45013. + if((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
  45014. + (priv->ieee80211->state == IEEE80211_NOLINK) &&
  45015. + (priv->eRFPowerState == eRfOn))
  45016. + {
  45017. + //printk("actscanning:%d, state:%d, eRFPowerState:%d\n",
  45018. + // priv->ieee80211->actscanning,
  45019. + // priv->ieee80211->state,
  45020. + // priv->eRFPowerState);
  45021. +
  45022. + down(&priv->ieee80211->ips_sem);
  45023. + IPSEnter(dev);
  45024. + up(&priv->ieee80211->ips_sem);
  45025. + }
  45026. + }
  45027. + //queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq,IEEE80211_WATCH_DOG_TIME);
  45028. +#endif
  45029. +
  45030. + //printk("========================>leave rtl8180_watch_dog_wq()\n");
  45031. +}
  45032. +
  45033. +void watch_dog_adaptive(unsigned long data)
  45034. +{
  45035. + struct net_device* dev = (struct net_device*)data;
  45036. + struct r8180_priv* priv = ieee80211_priv(dev);
  45037. + //DMESG("---->watch_dog_adaptive()\n");
  45038. + if(!priv->up){
  45039. + //DMESG("<----watch_dog_adaptive():driver is not up!\n");
  45040. + return;
  45041. + }
  45042. + // Tx and Rx High Power Mechanism.
  45043. + if(CheckHighPower(dev)){
  45044. + //printk("===============================> high power!\n");
  45045. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  45046. + queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->tx_pw_wq, 0);
  45047. +#else
  45048. + queue_work(priv->ieee80211->wq,&priv->ieee80211->tx_pw_wq);
  45049. +#endif
  45050. + }
  45051. +
  45052. + // Schedule an workitem to perform DIG
  45053. + if(CheckDig(dev) == true){
  45054. +
  45055. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  45056. + queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_dig_wq,0);
  45057. +#else
  45058. + queue_work(priv->ieee80211->wq,&priv->ieee80211->hw_dig_wq);
  45059. +#endif
  45060. + }
  45061. +
  45062. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  45063. + queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq,0);
  45064. +#else
  45065. + queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
  45066. +#endif
  45067. +
  45068. + mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
  45069. + //DMESG("<----watch_dog_adaptive()\n");
  45070. +}
  45071. +
  45072. +#ifdef ENABLE_DOT11D
  45073. +
  45074. +CHANNEL_LIST Current_tbl;
  45075. +
  45076. +static CHANNEL_LIST ChannelPlan[] = {
  45077. + {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
  45078. + {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
  45079. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
  45080. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
  45081. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
  45082. + {{14,36,40,44,48,52,56,60,64},9}, //MKK
  45083. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
  45084. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
  45085. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
  45086. + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
  45087. + {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 081205
  45088. +};
  45089. +
  45090. +static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
  45091. +{
  45092. + int i;
  45093. +
  45094. + //lzm add 081205
  45095. + ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
  45096. + ieee->IbssStartChnl=0;
  45097. +
  45098. + switch (channel_plan)
  45099. + {
  45100. + case COUNTRY_CODE_FCC:
  45101. + case COUNTRY_CODE_IC:
  45102. + case COUNTRY_CODE_ETSI:
  45103. + case COUNTRY_CODE_SPAIN:
  45104. + case COUNTRY_CODE_FRANCE:
  45105. + case COUNTRY_CODE_MKK:
  45106. + case COUNTRY_CODE_MKK1:
  45107. + case COUNTRY_CODE_ISRAEL:
  45108. + case COUNTRY_CODE_TELEC:
  45109. + {
  45110. + Dot11d_Init(ieee);
  45111. + ieee->bGlobalDomain = false;
  45112. + ieee->bWorldWide13 = false;
  45113. + if (ChannelPlan[channel_plan].Len != 0){
  45114. + // Clear old channel map
  45115. + memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
  45116. + // Set new channel map
  45117. + for (i=0;i<ChannelPlan[channel_plan].Len;i++)
  45118. + {
  45119. + if(ChannelPlan[channel_plan].Channel[i] <= 14)
  45120. + GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
  45121. + }
  45122. + }
  45123. + break;
  45124. + }
  45125. + case COUNTRY_CODE_GLOBAL_DOMAIN:
  45126. + {
  45127. + GET_DOT11D_INFO(ieee)->bEnabled = 0;
  45128. + Dot11d_Reset(ieee);
  45129. + ieee->bGlobalDomain = true;
  45130. + ieee->bWorldWide13 = false;
  45131. +
  45132. + //lzm add 081205
  45133. + ieee->MinPassiveChnlNum=12;
  45134. + ieee->IbssStartChnl= 10;
  45135. +
  45136. + break;
  45137. + }
  45138. + case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 081205
  45139. + {
  45140. + Dot11d_Init(ieee);
  45141. + ieee->bGlobalDomain = false;
  45142. + ieee->bWorldWide13 = true;
  45143. +
  45144. + //lzm add 081205
  45145. + ieee->MinPassiveChnlNum=12;
  45146. + ieee->IbssStartChnl= 10;
  45147. +
  45148. + if (ChannelPlan[channel_plan].Len != 0){
  45149. + // Clear old channel map
  45150. + memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
  45151. + // Set new channel map
  45152. + for (i=0;i<ChannelPlan[channel_plan].Len;i++)
  45153. + {
  45154. + if(ChannelPlan[channel_plan].Channel[i] <= 11)//ch1~ch11 active scan
  45155. + GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
  45156. + else//ch12~13 passive scan
  45157. + GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 2;
  45158. + }
  45159. + }
  45160. +
  45161. + break;
  45162. + }
  45163. + default:
  45164. + {
  45165. + Dot11d_Init(ieee);
  45166. + ieee->bGlobalDomain = false;
  45167. + ieee->bWorldWide13 = false;
  45168. + memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
  45169. + for (i=1;i<=14;i++)
  45170. + {
  45171. + GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
  45172. + }
  45173. + break;
  45174. + }
  45175. + }
  45176. +}
  45177. +#endif
  45178. +
  45179. +
  45180. +//Add for RF power on power off by lizhaoming 080512
  45181. +#ifdef POLLING_METHOD_FOR_RADIO
  45182. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  45183. +void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
  45184. +#else
  45185. +void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
  45186. +#endif
  45187. +void gpio_change_polling(unsigned long data);
  45188. +#endif
  45189. +
  45190. +
  45191. +static void rtl8180_link_detect_init(plink_detect_t plink_detect)
  45192. +{
  45193. + memset(plink_detect, 0, sizeof(link_detect_t));
  45194. + plink_detect->SlotNum = DEFAULT_SLOT_NUM;
  45195. +}
  45196. +
  45197. +#ifdef SW_ANTE_DIVERSITY
  45198. +static void rtl8187_antenna_diversity_read(struct net_device *dev)
  45199. +{
  45200. + struct r8180_priv *priv = ieee80211_priv(dev);
  45201. + u16 usValue;
  45202. +
  45203. + //2 Read CustomerID
  45204. + usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET>>1);
  45205. + priv->EEPROMCustomerID = (u8)( usValue & EEPROM_CID_MASK );
  45206. + //DMESG("EEPROM Customer ID: %02X\n", priv->EEPROMCustomerID);
  45207. +
  45208. + //2 Read AntennaDiversity
  45209. + // SW Antenna Diversity.
  45210. + if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE ){
  45211. + priv->EEPROMSwAntennaDiversity = false;
  45212. + DMESG("EEPROM Disable SW Antenna Diversity");
  45213. + }else{
  45214. + priv->EEPROMSwAntennaDiversity = true;
  45215. + DMESG("EEPROM Enable SW Antenna Diversity");
  45216. + }
  45217. + // Default Antenna to use.
  45218. + if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 ) {
  45219. + priv->EEPROMDefaultAntenna1 = false;
  45220. + DMESG("EEPROM Default Main Antenna 0");
  45221. + }else{
  45222. + priv->EEPROMDefaultAntenna1 = false;
  45223. + DMESG( "EEPROM Default Aux Antenna 1");
  45224. + }
  45225. +
  45226. + //
  45227. + // Antenna diversity mechanism. Added by Roger, 2007.11.05.
  45228. + //
  45229. + if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto //set it to 0 when init
  45230. + {// 0: default from EEPROM.
  45231. + priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
  45232. + }else{// 1:disable antenna diversity, 2: enable antenna diversity.
  45233. + priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
  45234. + }
  45235. + //DMESG("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
  45236. +
  45237. +
  45238. + //
  45239. + // Default antenna settings. Added by Roger, 2007.11.05.
  45240. + //
  45241. + if( priv->RegDefaultAntenna == 0)//set it to 0 when init
  45242. + { // 0: default from EEPROM.
  45243. + priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
  45244. + }else{// 1: main, 2: aux.
  45245. + priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
  45246. + }
  45247. + //DMESG("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
  45248. +
  45249. +//by amy for antenna
  45250. +}
  45251. +#endif
  45252. +
  45253. +short rtl8180_init(struct net_device *dev)
  45254. +{
  45255. + struct r8180_priv *priv = ieee80211_priv(dev);
  45256. + int i, j;
  45257. + u16 word;
  45258. + //int ch;
  45259. + //u16 version;
  45260. + u8 hw_version;
  45261. + //u8 config3;
  45262. + struct usb_device *udev;
  45263. + u16 idProduct;
  45264. + u16 bcdDevice;
  45265. + //u8 chan_plan_index;
  45266. +
  45267. + //FIXME: these constants are placed in a bad pleace.
  45268. +
  45269. + //priv->txbuffsize = 1024;
  45270. + //priv->txringcount = 32;
  45271. + //priv->rxbuffersize = 1024;
  45272. + //priv->rxringcount = 32;
  45273. + //priv->txbeaconcount = 3;
  45274. + //priv->rx_skb_complete = 1;
  45275. + //priv->txnp_pending.ispending=0;
  45276. + /* ^^ the SKB does not containt a partial RXed packet (is empty) */
  45277. +
  45278. + //memcpy(priv->stats,0,sizeof(struct Stats));
  45279. +
  45280. + //priv->irq_enabled=0;
  45281. + priv->driver_upping = 0;
  45282. + priv->commit = 0;
  45283. +
  45284. + //priv->stats.rxdmafail=0;
  45285. + priv->stats.txrdu=0;
  45286. + //priv->stats.rxrdu=0;
  45287. + //priv->stats.rxnolast=0;
  45288. + //priv->stats.rxnodata=0;
  45289. + //priv->stats.rxreset=0;
  45290. + //priv->stats.rxwrkaround=0;
  45291. + //priv->stats.rxnopointer=0;
  45292. + priv->stats.txbeerr=0;
  45293. + priv->stats.txbkerr=0;
  45294. + priv->stats.txvierr=0;
  45295. + priv->stats.txvoerr=0;
  45296. + priv->stats.txmanageerr=0;
  45297. + priv->stats.txbeaconerr=0;
  45298. + priv->stats.txresumed=0;
  45299. + //priv->stats.rxerr=0;
  45300. + //priv->stats.rxoverflow=0;
  45301. + //priv->stats.rxint=0;
  45302. + priv->stats.txbeokint=0;
  45303. + priv->stats.txbkokint=0;
  45304. + priv->stats.txviokint=0;
  45305. + priv->stats.txvookint=0;
  45306. + priv->stats.txmanageokint=0;
  45307. + priv->stats.txbeaconokint=0;
  45308. + /*priv->stats.txhpokint=0;
  45309. + priv->stats.txhperr=0;*/
  45310. + priv->stats.rxurberr=0;
  45311. + priv->stats.rxstaterr=0;
  45312. + priv->stats.txoverflow=0;
  45313. + priv->stats.rxok=0;
  45314. + //priv->stats.txbeaconerr=0;
  45315. + //priv->stats.txlperr=0;
  45316. + //priv->stats.txlpokint=0;
  45317. +//john
  45318. + priv->stats.txnpdrop=0;
  45319. + priv->stats.txlpdrop =0;
  45320. + priv->stats.txbedrop =0;
  45321. + priv->stats.txbkdrop =0;
  45322. + priv->stats.txvidrop =0;
  45323. + priv->stats.txvodrop =0;
  45324. + priv->stats.txbeacondrop =0;
  45325. + priv->stats.txmanagedrop =0;
  45326. +
  45327. + // priv->stats.txokbytestotal =0;
  45328. +//by amy
  45329. + priv->LastSignalStrengthInPercent=0;
  45330. + priv->SignalStrength=0;
  45331. + priv->SignalQuality=0;
  45332. + priv->antenna_flag=0;
  45333. + priv->flag_beacon = false;
  45334. +//by amy
  45335. +//david
  45336. + //radion on defaultly
  45337. + priv->radion = 1;
  45338. +//david
  45339. +//by amy for rate adaptive
  45340. + priv->CurrRetryCnt=0;
  45341. + priv->LastRetryCnt=0;
  45342. + priv->LastTxokCnt=0;
  45343. + priv->LastRxokCnt=0;
  45344. + priv->LastRetryRate=0;
  45345. + priv->bTryuping=0;
  45346. + priv->CurrTxRate=0;
  45347. + priv->CurrRetryRate=0;
  45348. + priv->TryupingCount=0;
  45349. + priv->TryupingCountNoData=0;
  45350. + priv->TryDownCountLowData=0;
  45351. + priv->RecvSignalPower=0;
  45352. + priv->LastTxOKBytes=0;
  45353. + priv->LastFailTxRate=0;
  45354. + priv->LastFailTxRateSS=0;
  45355. + priv->FailTxRateCount=0;
  45356. + priv->LastTxThroughput=0;
  45357. + priv->txokbytestotal=0;
  45358. +//by amy for rate adaptive
  45359. +//by amy for ps
  45360. + priv->RFChangeInProgress = false;
  45361. + priv->SetRFPowerStateInProgress = false;
  45362. + priv->RFProgType = 0;
  45363. + priv->bInHctTest = false;
  45364. + priv->bInactivePs = true;//false;
  45365. + priv->ieee80211->bInactivePs = priv->bInactivePs;
  45366. + priv->eInactivePowerState = eRfOn;//lzm add for IPS and Polling methord
  45367. + priv->bSwRfProcessing = false;
  45368. + priv->eRFPowerState = eRfOff;
  45369. + priv->RfOffReason = 0;
  45370. + priv->NumRxOkInPeriod = 0;
  45371. + priv->NumTxOkInPeriod = 0;
  45372. + priv->bLeisurePs = true;
  45373. + priv->dot11PowerSaveMode = eActive;
  45374. + priv->RegThreeWireMode=HW_THREE_WIRE_BY_8051;
  45375. + priv->ps_mode = false;
  45376. +//by amy for ps
  45377. +//by amy for DIG
  45378. + priv->bDigMechanism = 1;
  45379. + priv->bCCKThMechanism = 0;
  45380. + priv->InitialGain = 0;
  45381. + priv->StageCCKTh = 0;
  45382. + priv->RegBModeGainStage = 2;
  45383. +//by amy for DIG
  45384. +// {by david for DIG, 2008.3.6
  45385. + priv->RegDigOfdmFaUpTh = 0x0c;
  45386. + priv->RegBModeGainStage = 0x02;
  45387. + priv->DIG_NumberFallbackVote = 0;
  45388. + priv->DIG_NumberUpgradeVote = 0;
  45389. + priv->CCKUpperTh = 0x100;
  45390. + priv->CCKLowerTh = 0x20;
  45391. +//}
  45392. +//{added by david for High tx power, 2008.3.11
  45393. + priv->bRegHighPowerMechanism = true;
  45394. + priv->bToUpdateTxPwr = false;
  45395. +
  45396. + priv->Z2HiPwrUpperTh = 77;
  45397. + priv->Z2HiPwrLowerTh = 75;
  45398. + priv->Z2RSSIHiPwrUpperTh = 70;
  45399. + priv->Z2RSSIHiPwrLowerTh = 20;
  45400. + //specify for rtl8187B
  45401. + priv->wMacRegRfPinsOutput = 0x0480;
  45402. + priv->wMacRegRfPinsSelect = 0x2488;
  45403. + //
  45404. + // Note that, we just set TrSwState to TR_HW_CONTROLLED here instead of changing
  45405. + // HW setting because we assume it should be inialized as HW controlled. 061010, by rcnjko.
  45406. + //
  45407. + priv->TrSwitchState = TR_HW_CONTROLLED;
  45408. +//}
  45409. + priv->ieee80211->iw_mode = IW_MODE_INFRA;
  45410. +//test pending bug, john 20070815
  45411. + for(i=0;i<0x10;i++) atomic_set(&(priv->tx_pending[i]), 0);
  45412. +//by lizhaoming
  45413. +#ifdef POLLING_METHOD_FOR_RADIO
  45414. + priv->wlan_first_up_flag1 = 0;
  45415. + priv->polling_timer_on = 0;//add for S3/S4
  45416. +#endif
  45417. +//by lizhaoming for LED
  45418. +#ifdef LED
  45419. + priv->ieee80211->ieee80211_led_contorl = LedControl8187;
  45420. +#endif
  45421. +#ifdef CONFIG_IPS
  45422. + priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;//IPSLeave;
  45423. +#endif
  45424. +
  45425. +#ifdef SW_ANTE_DIVERSITY
  45426. + priv->antb=0;
  45427. + priv->diversity=1;
  45428. + priv->LastRxPktAntenna = 0;
  45429. + priv->AdMinCheckPeriod = 5;
  45430. + priv->AdMaxCheckPeriod = 10;
  45431. + // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
  45432. + priv->AdMaxRxSsThreshold = 30;//60->30
  45433. + priv->AdRxSsThreshold = 20;//50->20
  45434. + priv->AdCheckPeriod = priv->AdMinCheckPeriod;
  45435. + priv->AdTickCount = 0;
  45436. + priv->AdRxSignalStrength = -1;
  45437. + priv->RegSwAntennaDiversityMechanism = 0;
  45438. + priv->RegDefaultAntenna = 0;
  45439. + priv->SignalStrength = 0;
  45440. + priv->AdRxOkCnt = 0;
  45441. + priv->CurrAntennaIndex = 0;
  45442. + priv->AdRxSsBeforeSwitched = 0;
  45443. + init_timer(&priv->SwAntennaDiversityTimer);
  45444. + priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
  45445. + priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
  45446. +#endif
  45447. +
  45448. + priv->retry_rts = DEFAULT_RETRY_RTS;
  45449. + priv->retry_data = DEFAULT_RETRY_DATA;
  45450. + priv->ieee80211->rate = 110; //11 mbps
  45451. + priv->CurrentOperaRate=priv->ieee80211->rate/5;
  45452. + priv->ieee80211->short_slot = 1;
  45453. + priv->ieee80211->mode = IEEE_G;
  45454. + priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
  45455. +
  45456. + rtl8180_link_detect_init(&priv->link_detect);
  45457. +
  45458. + spin_lock_init(&priv->tx_lock);
  45459. + spin_lock_init(&priv->irq_lock);//added by thomas
  45460. + spin_lock_init(&priv->rf_ps_lock);
  45461. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  45462. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  45463. + INIT_WORK(&priv->reset_wq, (void*)rtl8180_restart);
  45464. + INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq); //YJ,add,081230,for IPS
  45465. + INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);
  45466. + INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);
  45467. + INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*)rtl8180_watch_dog_wq);
  45468. + INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);
  45469. +
  45470. +//add for RF power on power off by lizhaoming 080512
  45471. +#ifdef POLLING_METHOD_FOR_RADIO
  45472. + INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem, (void*)GPIOChangeRFWorkItemCallBack);
  45473. +#endif
  45474. +
  45475. +#ifdef SW_ANTE_DIVERSITY
  45476. + INIT_DELAYED_WORK(&priv->ieee80211->SwAntennaWorkItem,(void*) SwAntennaWorkItemCallback);
  45477. +#endif
  45478. +
  45479. +#else
  45480. + INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart,dev);
  45481. + INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq,dev); //YJ,add,081230,for IPS
  45482. + INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);
  45483. + INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);
  45484. + INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*)rtl8180_watch_dog_wq,dev);
  45485. + INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);
  45486. +
  45487. +//add for RF power on power off by lizhaoming 080512
  45488. +#ifdef POLLING_METHOD_FOR_RADIO
  45489. + INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
  45490. +#endif
  45491. +
  45492. +#ifdef SW_ANTE_DIVERSITY
  45493. + INIT_WORK(&priv->ieee80211->SwAntennaWorkItem,(void*) SwAntennaWorkItemCallback, dev);
  45494. +#endif
  45495. +
  45496. +#endif
  45497. +#else
  45498. + tq_init(&priv->reset_wq,(void*) rtl8180_restart,dev);
  45499. +#endif
  45500. + sema_init(&priv->wx_sem,1);
  45501. + sema_init(&priv->set_chan_sem,1);
  45502. +#ifdef THOMAS_TASKLET
  45503. + tasklet_init(&priv->irq_rx_tasklet,
  45504. + (void(*)(unsigned long))rtl8180_irq_rx_tasklet_new,
  45505. + (unsigned long)priv);
  45506. +#else
  45507. + tasklet_init(&priv->irq_rx_tasklet,
  45508. + (void(*)(unsigned long))rtl8180_irq_rx_tasklet,
  45509. + (unsigned long)priv);
  45510. +#endif
  45511. +//by lizhaoming for Radio on/off
  45512. +#ifdef POLLING_METHOD_FOR_RADIO
  45513. + init_timer(&priv->gpio_polling_timer);
  45514. + priv->gpio_polling_timer.data = (unsigned long)dev;
  45515. + priv->gpio_polling_timer.function = gpio_change_polling;
  45516. +#endif
  45517. +//by amy for rate adaptive
  45518. + init_timer(&priv->rateadapter_timer);
  45519. + priv->rateadapter_timer.data = (unsigned long)dev;
  45520. + priv->rateadapter_timer.function = timer_rate_adaptive;
  45521. +//by amy for rate adaptive
  45522. +//by amy for ps
  45523. + init_timer(&priv->watch_dog_timer);
  45524. + priv->watch_dog_timer.data = (unsigned long)dev;
  45525. + priv->watch_dog_timer.function = watch_dog_adaptive;
  45526. +//by amy
  45527. +//by amy for ps
  45528. + priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
  45529. + priv->ieee80211->iw_mode = IW_MODE_INFRA;
  45530. + priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
  45531. + IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
  45532. +#ifdef CONFIG_SOFT_BEACON
  45533. + IEEE_SOFTMAC_BEACONS | //IEEE_SOFTMAC_SINGLE_QUEUE;
  45534. +#endif
  45535. + IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
  45536. +
  45537. + priv->ieee80211->active_scan = 1;
  45538. + //priv->ieee80211->ch_lock = 0;
  45539. + priv->ieee80211->rate = 110; //11 mbps
  45540. + priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
  45541. + priv->ieee80211->host_encrypt = 1;
  45542. + priv->ieee80211->host_decrypt = 1;
  45543. +#ifdef CONFIG_SOFT_BEACON
  45544. + priv->ieee80211->start_send_beacons = NULL;
  45545. + priv->ieee80211->stop_send_beacons = NULL;
  45546. +#else
  45547. + priv->ieee80211->start_send_beacons = rtl8187_beacon_tx;
  45548. + priv->ieee80211->stop_send_beacons = rtl8187_beacon_stop;
  45549. +#endif
  45550. + priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
  45551. + priv->ieee80211->set_chan = rtl8180_set_chan;
  45552. + priv->ieee80211->link_change = rtl8187_link_change;
  45553. + priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
  45554. + priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
  45555. + priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
  45556. +
  45557. +#ifdef _RTL8187_EXT_PATCH_
  45558. + priv->ieee80211->meshScanMode = 0;
  45559. + priv->mshobj = alloc_mshobj(priv);
  45560. + if(priv->mshobj)
  45561. + {
  45562. + priv->ieee80211->ext_patch_ieee80211_start_protocol = priv->mshobj->ext_patch_ieee80211_start_protocol;
  45563. + priv->ieee80211->ext_patch_ieee80211_stop_protocol = priv->mshobj->ext_patch_ieee80211_stop_protocol;
  45564. +//by amy for mesh
  45565. + priv->ieee80211->ext_patch_ieee80211_start_mesh = priv->mshobj->ext_patch_ieee80211_start_mesh;
  45566. +//by amy for mesh
  45567. + priv->ieee80211->ext_patch_ieee80211_probe_req_1 = priv->mshobj->ext_patch_ieee80211_probe_req_1;
  45568. + priv->ieee80211->ext_patch_ieee80211_probe_req_2 = priv->mshobj->ext_patch_ieee80211_probe_req_2;
  45569. + priv->ieee80211->ext_patch_ieee80211_association_req_1 = priv->mshobj->ext_patch_ieee80211_association_req_1;
  45570. + priv->ieee80211->ext_patch_ieee80211_association_req_2 = priv->mshobj->ext_patch_ieee80211_association_req_2;
  45571. + priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_1 = priv->mshobj->ext_patch_ieee80211_assoc_resp_by_net_1;
  45572. + priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_2 = priv->mshobj->ext_patch_ieee80211_assoc_resp_by_net_2;
  45573. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_auth = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_auth;
  45574. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_deauth = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_deauth;
  45575. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req;
  45576. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp;
  45577. + priv->ieee80211->ext_patch_ieee80211_ext_stop_scan_wq_set_channel = priv->mshobj->ext_patch_ieee80211_ext_stop_scan_wq_set_channel;
  45578. + priv->ieee80211->ext_patch_ieee80211_process_probe_response_1 = priv->mshobj->ext_patch_ieee80211_process_probe_response_1;
  45579. + priv->ieee80211->ext_patch_ieee80211_rx_mgt_on_probe_req = priv->mshobj->ext_patch_ieee80211_rx_mgt_on_probe_req;
  45580. + priv->ieee80211->ext_patch_ieee80211_rx_mgt_update_expire = priv->mshobj->ext_patch_ieee80211_rx_mgt_update_expire;
  45581. + priv->ieee80211->ext_patch_get_beacon_get_probersp = priv->mshobj->ext_patch_get_beacon_get_probersp;
  45582. + priv->ieee80211->ext_patch_ieee80211_rx_on_rx = priv->mshobj->ext_patch_ieee80211_rx_on_rx;
  45583. + priv->ieee80211->ext_patch_ieee80211_xmit = priv->mshobj->ext_patch_ieee80211_xmit;
  45584. + priv->ieee80211->ext_patch_ieee80211_rx_frame_get_hdrlen = priv->mshobj->ext_patch_ieee80211_rx_frame_get_hdrlen;
  45585. + priv->ieee80211->ext_patch_ieee80211_rx_is_valid_framectl = priv->mshobj->ext_patch_ieee80211_rx_is_valid_framectl;
  45586. + priv->ieee80211->ext_patch_ieee80211_rx_process_dataframe = priv->mshobj->ext_patch_ieee80211_rx_process_dataframe;
  45587. + // priv->ieee80211->ext_patch_is_duplicate_packet = priv->mshobj->ext_patch_is_duplicate_packet;
  45588. + priv->ieee80211->ext_patch_ieee80211_softmac_xmit_get_rate = priv->mshobj->ext_patch_ieee80211_softmac_xmit_get_rate;
  45589. + /* added by david for setting acl dynamically */
  45590. + priv->ieee80211->ext_patch_ieee80211_acl_query = priv->mshobj->ext_patch_ieee80211_acl_query;
  45591. + }
  45592. +
  45593. +#endif // _RTL8187_EXT_PATCH_
  45594. +
  45595. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  45596. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  45597. + INIT_WORK(&priv->ieee80211->wmm_param_update_wq,\
  45598. + (void(*)(void*)) rtl8180_wmm_param_update,\
  45599. + priv->ieee80211);
  45600. +#else
  45601. + INIT_WORK(&priv->ieee80211->wmm_param_update_wq,\
  45602. + rtl8180_wmm_param_update);
  45603. +#endif
  45604. +#else
  45605. + tq_init(&priv->ieee80211->wmm_param_update_wq,\
  45606. + (void(*)(void*)) rtl8180_wmm_param_update,\
  45607. + priv->ieee80211);
  45608. +#endif
  45609. + priv->ieee80211->init_wmmparam_flag = 0;
  45610. + priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
  45611. +
  45612. + //priv->card_8185 = 2;
  45613. + priv->phy_ver = 2;
  45614. + priv->card_type = USB;
  45615. +//{add for 87B
  45616. + priv->ShortRetryLimit = 7;
  45617. + priv->LongRetryLimit = 7;
  45618. + priv->EarlyRxThreshold = 7;
  45619. +
  45620. + priv->TransmitConfig =
  45621. + TCR_DurProcMode | //for RTL8185B, duration setting by HW
  45622. + TCR_DISReqQsize |
  45623. + (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT)| // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
  45624. + (priv->ShortRetryLimit<<TX_SRLRETRY_SHIFT)| // Short retry limit
  45625. + (priv->LongRetryLimit<<TX_LRLRETRY_SHIFT) | // Long retry limit
  45626. + (false ? TCR_SWPLCPLEN : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
  45627. +
  45628. + priv->ReceiveConfig =
  45629. + RCR_AMF | RCR_ADF | //accept management/data
  45630. + RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
  45631. + RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
  45632. + //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
  45633. + RCR_MXDMA | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
  45634. + (priv->EarlyRxThreshold<<RX_FIFO_THRESHOLD_SHIFT) | // Rx FIFO Threshold, 7: No Rx threshold.
  45635. + (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
  45636. +
  45637. + priv->AcmControl = 0;
  45638. +//}
  45639. + priv->rf_chip = 0xff & eprom_read(dev,EPROM_RFCHIPID);
  45640. + //DMESG("rf_chip:%x\n", priv->rf_chip);
  45641. + if (!priv->rf_chip)
  45642. + {
  45643. + DMESG("Can't get rf chip ID from EEPROM");
  45644. + DMESGW("So set rf chip ID to defalut EPROM_RFCHIPID_RTL8225U");
  45645. + DMESGW("use it with care and at your own risk and");
  45646. + DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO Realtek");
  45647. + priv->rf_chip = EPROM_RFCHIPID_RTL8225U;
  45648. +
  45649. + }
  45650. +
  45651. +
  45652. +//{put the card to detect different card here, mainly I/O processing
  45653. + udev = priv->udev;
  45654. + idProduct = le16_to_cpu(udev->descriptor.idProduct);
  45655. + //idProduct = 0x8197;
  45656. + bcdDevice = le16_to_cpu(udev->descriptor.bcdDevice);
  45657. + DMESG("idProduct:0x%x, bcdDevice:0x%x", idProduct,bcdDevice);
  45658. + switch (idProduct) {
  45659. + case 0x8189:
  45660. + case 0x8197:
  45661. + case 0x8198:
  45662. + /* check RF frontend chipset */
  45663. + priv->card_8187 = NIC_8187B;
  45664. + priv->rf_init = rtl8225z2_rf_init;
  45665. + priv->rf_set_chan = rtl8225z2_rf_set_chan;
  45666. + priv->rf_set_sens = NULL;
  45667. + break;
  45668. +
  45669. + case 0x8187:
  45670. + if(bcdDevice == 0x0200){
  45671. + priv->card_8187 = NIC_8187B;
  45672. + priv->rf_init = rtl8225z2_rf_init;
  45673. + priv->rf_set_chan = rtl8225z2_rf_set_chan;
  45674. + priv->rf_set_sens = NULL;
  45675. + break;
  45676. + }else{
  45677. + //0x0100 is for 8187
  45678. + //legacy 8187 NIC
  45679. + //delet
  45680. + ;
  45681. + }
  45682. + default:
  45683. + /* check RF frontend chipset */
  45684. + priv->ieee80211->softmac_features |= IEEE_SOFTMAC_SINGLE_QUEUE;
  45685. + priv->card_8187 = NIC_8187;
  45686. + switch (priv->rf_chip) {
  45687. + case EPROM_RFCHIPID_RTL8225U:
  45688. + DMESG("Card reports RF frontend Realtek 8225");
  45689. + DMESGW("This driver has EXPERIMENTAL support for this chipset.");
  45690. + DMESGW("use it with care and at your own risk and");
  45691. + DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO Realtek");
  45692. + if(rtl8225_is_V_z2(dev)){
  45693. + priv->rf_init = rtl8225z2_rf_init;
  45694. + priv->rf_set_chan = rtl8225z2_rf_set_chan;
  45695. + priv->rf_set_sens = NULL;
  45696. + DMESG("This seems a new V2 radio");
  45697. + }else{
  45698. + priv->rf_init = rtl8225_rf_init;
  45699. + priv->rf_set_chan = rtl8225_rf_set_chan;
  45700. + priv->rf_set_sens = rtl8225_rf_set_sens;
  45701. + DMESG("This seems a legacy 1st version radio");
  45702. + }
  45703. + break;
  45704. +
  45705. + case EPROM_RFCHIPID_RTL8225U_VF:
  45706. + priv->rf_init = rtl8225z2_rf_init;
  45707. + priv->rf_set_chan = rtl8225z2_rf_set_chan;
  45708. + priv->rf_set_sens = NULL;
  45709. + DMESG("This seems a new V2 radio");
  45710. + break;
  45711. +
  45712. + default:
  45713. + DMESGW("Unknown RF module %x",priv->rf_chip);
  45714. + DMESGW("Exiting...");
  45715. + return -1;
  45716. + }
  45717. + break;
  45718. + }
  45719. +
  45720. + priv->rf_close = rtl8225_rf_close;
  45721. + priv->max_sens = RTL8225_RF_MAX_SENS;
  45722. + priv->sens = RTL8225_RF_DEF_SENS;
  45723. +
  45724. +#ifdef ENABLE_DOT11D
  45725. +#if 0
  45726. + for(i=0;i<0xFF;i++) {
  45727. + if(i%16 == 0)
  45728. + printk("\n[%x]: ", i/16);
  45729. + printk("\t%4.4x", eprom_read(dev,i));
  45730. + }
  45731. +#endif
  45732. + priv->channel_plan = eprom_read(dev,EPROM_CHANNEL_PLAN) & 0xFF;
  45733. + //DMESG("EPROM_CHANNEL_PLAN is %x", priv->channel_plan);
  45734. +
  45735. + // lzm add 081205 for Toshiba:
  45736. + // For Toshiba,reading the value from EEPROM 0x6h bit[7] to determine the priority of
  45737. + // channel plan to be defined.
  45738. + // -If bit[7] is true, then the channel plan is defined by EEPROM but no user defined.
  45739. + // -If bit[7] is false, then the channel plan is defined by user first.
  45740. + //
  45741. + if(priv->channel_plan & 0x80) {
  45742. + DMESG("Toshiba channel plan is defined by EEPROM");
  45743. + priv->channel_plan &= 0xf;
  45744. + }
  45745. + else
  45746. + priv->channel_plan = 0;
  45747. +
  45748. + //if(priv->channel_plan > COUNTRY_CODE_WORLD_WIDE_13_INDEX){
  45749. + if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
  45750. + DMESG("rtl8180_init:Error channel plan! Set to default.\n");
  45751. + priv->channel_plan = 0;
  45752. + }
  45753. +
  45754. + //priv->channel_plan = 9; //Global Domain
  45755. + //priv->channel_plan = 2; //ETSI
  45756. +
  45757. +
  45758. + DMESG("Channel plan is %d ",priv->channel_plan);
  45759. +
  45760. + //for Toshiba card we read channel plan from ChanPlanBin
  45761. + if((idProduct != 0x8197) && (idProduct != 0x8198))
  45762. + rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
  45763. +#else
  45764. + int ch;
  45765. + priv->channel_plan = eprom_read(dev,EPROM_CHANNEL_PLAN) & 0xff;
  45766. + if(priv->channel_plan & 0x80) {
  45767. + priv->channel_plan &= 0x7f;
  45768. + if (ChannelPlan[priv->channel_plan].Len != 0){
  45769. + // force channel plan map
  45770. + for (i=0;i<ChannelPlan[priv->channel_plan].Len;i++)
  45771. + priv->ieee80211->channel_map[ChannelPlan[priv->channel_plan].Channel[i]] = 1;
  45772. + } else {
  45773. + DMESG("No channels, aborting");
  45774. + return -1;
  45775. + }
  45776. + } else {
  45777. + //default channel plan setting
  45778. + if(!channels){
  45779. + DMESG("No channels, aborting");
  45780. + return -1;
  45781. + }
  45782. + ch=channels;
  45783. + // set channels 1..14 allowed in given locale
  45784. + for (i=1; i<=14; i++) {
  45785. + (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
  45786. + ch >>= 1;
  45787. + }
  45788. + }
  45789. +#endif
  45790. +
  45791. + if((idProduct == 0x8197) || (idProduct == 0x8198)) {
  45792. + // lzm add 081205 for Toshiba:
  45793. + // 0x77h bit[0]=1: use GPIO bit[2], bit[0]=0: use GPIO bit[1]
  45794. + priv->EEPROMSelectNewGPIO =((u8)((eprom_read(dev,EPROM_SELECT_GPIO) & 0xff00) >> 8)) ? true : false;
  45795. + DMESG("EPROM_SELECT_GPIO:%d", priv->EEPROMSelectNewGPIO);
  45796. + } else {
  45797. + priv->EEPROMSelectNewGPIO = false;
  45798. + }
  45799. +
  45800. +
  45801. + if (NIC_8187 == priv->card_8187){
  45802. + hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
  45803. + switch (hw_version) {
  45804. + case 0x06:
  45805. + //priv->card_8187_Bversion = VERSION_8187B_B;
  45806. + break;
  45807. + case 0x05:
  45808. + priv->card_8187_Bversion = VERSION_8187_D;
  45809. + break;
  45810. + default:
  45811. + priv->card_8187_Bversion = VERSION_8187_B;
  45812. + break;
  45813. + }
  45814. + }else{
  45815. + hw_version = read_nic_byte(dev, 0xe1); //87B hw version reg
  45816. + switch (hw_version){
  45817. + case 0x00:
  45818. + priv->card_8187_Bversion = VERSION_8187B_B;
  45819. + break;
  45820. + case 0x01:
  45821. + priv->card_8187_Bversion = VERSION_8187B_D;
  45822. + break;
  45823. + case 0x02:
  45824. + priv->card_8187_Bversion = VERSION_8187B_E;
  45825. + break;
  45826. + default:
  45827. + priv->card_8187_Bversion = VERSION_8187B_B; //defalt
  45828. + break;
  45829. + }
  45830. + }
  45831. +
  45832. + //printk("=====hw_version:%x\n", priv->card_8187_Bversion);
  45833. + priv->enable_gpio0 = 0;
  45834. +
  45835. + /*the eeprom type is stored in RCR register bit #6 */
  45836. + if (RCR_9356SEL & read_nic_dword(dev, RCR)){
  45837. + priv->epromtype=EPROM_93c56;
  45838. + DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
  45839. + }else{
  45840. + priv->epromtype=EPROM_93c46;
  45841. + DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
  45842. + }
  45843. +
  45844. + dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
  45845. + dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
  45846. + dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
  45847. + dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
  45848. + dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
  45849. + dev->dev_addr[5]=((eprom_read(dev,MAC_ADR+2) & 0xff00)>>8)+1;
  45850. +
  45851. + DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
  45852. +
  45853. + for(i=1,j=0; i<6; i+=2,j++){
  45854. +
  45855. + word = eprom_read(dev,EPROM_TXPW0 + j);
  45856. + priv->chtxpwr[i]=word & 0xf;
  45857. + priv->chtxpwr_ofdm[i]=(word & 0xf0)>>4;
  45858. + priv->chtxpwr[i+1]=(word & 0xf00)>>8;
  45859. + priv->chtxpwr_ofdm[i+1]=(word & 0xf000)>>12;
  45860. + }
  45861. +
  45862. + for(i=1,j=0; i<4; i+=2,j++){
  45863. +
  45864. + word = eprom_read(dev,EPROM_TXPW1 + j);
  45865. + priv->chtxpwr[i+6]=word & 0xf;
  45866. + priv->chtxpwr_ofdm[i+6]=(word & 0xf0)>>4;
  45867. + priv->chtxpwr[i+6+1]=(word & 0xf00)>>8;
  45868. + priv->chtxpwr_ofdm[i+6+1]=(word & 0xf000)>>12;
  45869. + }
  45870. + if (priv->card_8187 == NIC_8187){
  45871. + for(i=1,j=0; i<4; i+=2,j++){
  45872. + word = eprom_read(dev,EPROM_TXPW2 + j);
  45873. + priv->chtxpwr[i+6+4]=word & 0xf;
  45874. + priv->chtxpwr_ofdm[i+6+4]=(word & 0xf0)>>4;
  45875. + priv->chtxpwr[i+6+4+1]=(word & 0xf00)>>8;
  45876. + priv->chtxpwr_ofdm[i+6+4+1]=(word & 0xf000)>>12;
  45877. + }
  45878. + } else{
  45879. + word = eprom_read(dev, 0x1B) & 0xff; //channel 11;
  45880. + priv->chtxpwr[11]=word & 0xf;
  45881. + priv->chtxpwr_ofdm[11] = (word & 0xf0)>>4;
  45882. +
  45883. + word = eprom_read(dev, 0xA) & 0xff; //channel 12;
  45884. + priv->chtxpwr[12]=word & 0xf;
  45885. + priv->chtxpwr_ofdm[12] = (word & 0xf0)>>4;
  45886. +
  45887. + word = eprom_read(dev, 0x1c) ; //channel 13 ,14;
  45888. + priv->chtxpwr[13]=word & 0xf;
  45889. + priv->chtxpwr_ofdm[13] = (word & 0xf0)>>4;
  45890. + priv->chtxpwr[14]=(word & 0xf00)>>8;
  45891. + priv->chtxpwr_ofdm[14] = (word & 0xf000)>>12;
  45892. + }
  45893. +
  45894. + word = eprom_read(dev,EPROM_TXPW_BASE);
  45895. + priv->cck_txpwr_base = word & 0xf;
  45896. + priv->ofdm_txpwr_base = (word>>4) & 0xf;
  45897. +
  45898. + //DMESG("PAPE from CONFIG2: %x",read_nic_byte(dev,CONFIG2)&0x7);
  45899. +
  45900. +#ifdef SW_ANTE_DIVERSITY
  45901. + rtl8187_antenna_diversity_read(dev);
  45902. +#endif
  45903. +
  45904. + if(rtl8187_usb_initendpoints(dev)!=0){
  45905. + DMESG("Endopoints initialization failed");
  45906. + return -ENOMEM;
  45907. + }
  45908. +#ifdef LED
  45909. + InitSwLeds(dev);
  45910. +#endif
  45911. +#ifdef DEBUG_EPROM
  45912. + dump_eprom(dev);
  45913. +#endif
  45914. + return 0;
  45915. +
  45916. +}
  45917. +
  45918. +void rtl8185_rf_pins_enable(struct net_device *dev)
  45919. +{
  45920. +/* u16 tmp;
  45921. + tmp = read_nic_word(dev, RFPinsEnable);*/
  45922. + write_nic_word(dev, RFPinsEnable, 0x1ff7);// | tmp);
  45923. +}
  45924. +
  45925. +
  45926. +void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
  45927. +{
  45928. + u8 conf3;
  45929. +
  45930. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  45931. +
  45932. + conf3 = read_nic_byte(dev, CONFIG3);
  45933. + write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
  45934. +
  45935. + write_nic_dword(dev, ANAPARAM2, a);
  45936. +
  45937. + conf3 = read_nic_byte(dev, CONFIG3);
  45938. + write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
  45939. +
  45940. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  45941. +
  45942. +}
  45943. +
  45944. +
  45945. +void rtl8180_set_anaparam(struct net_device *dev, u32 a)
  45946. +{
  45947. + u8 conf3;
  45948. +
  45949. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  45950. +
  45951. + conf3 = read_nic_byte(dev, CONFIG3);
  45952. + write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
  45953. +
  45954. + write_nic_dword(dev, ANAPARAM, a);
  45955. +
  45956. + conf3 = read_nic_byte(dev, CONFIG3);
  45957. + write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
  45958. +
  45959. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  45960. +
  45961. +}
  45962. +
  45963. +
  45964. +void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
  45965. +{
  45966. + write_nic_byte(dev, ANTSEL, ant);
  45967. + //lzm mod for up take too long time 20081201
  45968. + //mdelay(1);
  45969. +}
  45970. +
  45971. +
  45972. +void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data)
  45973. +{
  45974. + u32 phyw;
  45975. +
  45976. + adr |= 0x80;
  45977. +
  45978. + phyw= ((data<<8) | adr);
  45979. +
  45980. +
  45981. +
  45982. + // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
  45983. + write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
  45984. + write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
  45985. + write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
  45986. + write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
  45987. +
  45988. + //read_nic_dword(dev, PHY_ADR);
  45989. +#if 0
  45990. + for(i=0;i<10;i++){
  45991. + write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
  45992. + phyr = read_nic_byte(dev, PHY_READ);
  45993. + if(phyr == (data&0xff)) break;
  45994. +
  45995. + }
  45996. +#endif
  45997. + /* this is ok to fail when we write AGC table. check for AGC table might be
  45998. + * done by masking with 0x7f instead of 0xff */
  45999. + //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr);
  46000. + //msdelay(1);//CPU occupany is too high. LZM 31/10/2008
  46001. +}
  46002. +
  46003. +u8 rtl8187_read_phy(struct net_device *dev,u8 adr, u32 data)
  46004. +{
  46005. + u32 phyw;
  46006. +
  46007. + adr &= ~0x80;
  46008. + phyw= ((data<<8) | adr);
  46009. +
  46010. +
  46011. + // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
  46012. + write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
  46013. + write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
  46014. + write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
  46015. + write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
  46016. +
  46017. + return(read_nic_byte(dev,0x7e));
  46018. +
  46019. +}
  46020. +
  46021. +u8 read_phy_ofdm(struct net_device *dev, u8 adr)
  46022. +{
  46023. + return(rtl8187_read_phy(dev, adr, 0x000000));
  46024. +}
  46025. +
  46026. +u8 read_phy_cck(struct net_device *dev, u8 adr)
  46027. +{
  46028. + return(rtl8187_read_phy(dev, adr, 0x10000));
  46029. +}
  46030. +
  46031. +inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
  46032. +{
  46033. + data = data & 0xff;
  46034. + rtl8187_write_phy(dev, adr, data);
  46035. +}
  46036. +
  46037. +
  46038. +void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
  46039. +{
  46040. + data = data & 0xff;
  46041. + rtl8187_write_phy(dev, adr, data | 0x10000);
  46042. +}
  46043. +//
  46044. +// Description: Change ZEBRA's power state.
  46045. +//
  46046. +// Assumption: This function must be executed in PASSIVE_LEVEL.
  46047. +//
  46048. +// 061214, by rcnjko.
  46049. +//
  46050. +//#define MAX_DOZE_WAITING_TIMES_87B 1000//500
  46051. +#define MAX_DOZE_WAITING_TIMES_87B_MOD 500
  46052. +
  46053. +bool SetZebraRFPowerState8187B(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState)
  46054. +{
  46055. + struct r8180_priv *priv = ieee80211_priv(dev);
  46056. + u8 btCR9346, btConfig3;
  46057. + bool bResult = true;
  46058. + int i;
  46059. + u16 u2bTFPC = 0;
  46060. + u8 u1bTmp;
  46061. +
  46062. + // Set EEM0 and EEM1 in 9346CR.
  46063. + btCR9346 = read_nic_byte(dev, CR9346);
  46064. + write_nic_byte(dev, CR9346, (btCR9346|0xC0) );
  46065. + // Set PARM_En in Config3.
  46066. + btConfig3 = read_nic_byte(dev, CONFIG3);
  46067. + write_nic_byte(dev, CONFIG3, (btConfig3|CONFIG3_PARM_En) );
  46068. + // BB and RF related operations:
  46069. + switch(eRFPowerState)
  46070. + {
  46071. + case eRfOn:
  46072. +//#ifdef CONFIG_RADIO_DEBUG
  46073. + DMESG("Now Radio ON!");
  46074. +//#endif
  46075. + write_nic_dword(dev, ANAPARAM, ANAPARM_ON);
  46076. + write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON);
  46077. + //write_nic_byte(dev, CONFIG4, (priv->RFProgType));
  46078. +
  46079. + write_nic_byte(dev, 0x085, 0x24); // 061219, SD3 ED: for minicard CCK power leakage issue.
  46080. + write_rtl8225(dev, 0x4, 0x9FF);
  46081. + mdelay(1);
  46082. + //
  46083. + // <Roger_Notes> We reset PLL to reduce power consumption about 30 mA. 2008.01.16.
  46084. + //
  46085. + {
  46086. + u8 Reg62;
  46087. +
  46088. + write_nic_byte(dev, 0x61, 0x10);
  46089. + Reg62 = read_nic_byte(dev, 0x62);
  46090. + write_nic_byte(dev, 0x62, (Reg62 & (~BIT5)) );
  46091. + write_nic_byte(dev, 0x62, (Reg62 | BIT5) ); // Enable PLL.
  46092. + }
  46093. +
  46094. + u1bTmp = read_nic_byte(dev, 0x24E);
  46095. + write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5|BIT6))) );// 070124 SD1 Alex: turn on CCK and OFDM.
  46096. + break;
  46097. +
  46098. + case eRfSleep:
  46099. +#ifdef CONFIG_RADIO_DEBUG
  46100. + DMESG("Now Radio Sleep!");
  46101. +#endif
  46102. + for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B_MOD; i++)
  46103. + { // Make sure TX FIFO is empty befor turn off RFE pwoer.
  46104. + u2bTFPC = read_nic_word(dev, TFPC);
  46105. + if(u2bTFPC == 0){
  46106. + printk("%d times TFPC: %d == 0 before doze...\n", (i+1), u2bTFPC);
  46107. + break;
  46108. + }else{
  46109. + printk("%d times TFPC: %d != 0 before doze!\n", (i+1), u2bTFPC);
  46110. + udelay(10);
  46111. + }
  46112. + }
  46113. +
  46114. + if( i == MAX_DOZE_WAITING_TIMES_87B_MOD ){
  46115. + printk("\n\n\n SetZebraRFPowerState8187B(): %d times TFPC: %d != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_87B_MOD, u2bTFPC);
  46116. + }
  46117. +
  46118. + u1bTmp = read_nic_byte(dev, 0x24E);
  46119. + write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
  46120. +
  46121. + write_rtl8225(dev, 0x4, 0xDFF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
  46122. + write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
  46123. +
  46124. + //write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
  46125. +
  46126. + write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
  46127. + write_nic_dword(dev, ANAPARAM2, 0x72303f70); // 070126, by SD1 William.
  46128. + break;
  46129. +
  46130. + case eRfOff:
  46131. +//#ifdef CONFIG_RADIO_DEBUG
  46132. + DMESG("Now Radio OFF!");
  46133. +//#endif
  46134. + for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B_MOD; i++)
  46135. + { // Make sure TX FIFO is empty befor turn off RFE pwoer.
  46136. + u2bTFPC = read_nic_word(dev, TFPC);
  46137. + if(u2bTFPC == 0) {
  46138. + //printk("%d times TFPC: %d == 0 before doze...\n", (i+1), u2bTFPC);
  46139. + break;
  46140. + }else{
  46141. + //printk("%d times TFPC: 0x%x != 0 before doze!\n", (i+1), u2bTFPC);
  46142. + udelay(10);
  46143. + }
  46144. + }
  46145. +
  46146. + if( i == MAX_DOZE_WAITING_TIMES_87B_MOD){
  46147. + printk("\n\n\nSetZebraRFPowerState8187B(): %d times TFPC: 0x%x != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_87B_MOD, u2bTFPC);
  46148. + }
  46149. +
  46150. + u1bTmp = read_nic_byte(dev, 0x24E);
  46151. + write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
  46152. +
  46153. + write_rtl8225(dev, 0x4,0x1FF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
  46154. + write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
  46155. +
  46156. + //write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
  46157. +
  46158. + write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
  46159. + write_nic_dword(dev, ANAPARAM2, ANAPARM2_OFF); // 070301, SD1 William: to reduce RF off power consumption to 80 mA.
  46160. + break;
  46161. +
  46162. + default:
  46163. + bResult = false;
  46164. + printk("SetZebraRFPowerState8187B(): unknow state to set: 0x%X!!!\n", eRFPowerState);
  46165. + break;
  46166. + }
  46167. +
  46168. + // Clear PARM_En in Config3.
  46169. + btConfig3 &= ~(CONFIG3_PARM_En);
  46170. + write_nic_byte(dev, CONFIG3, btConfig3);
  46171. + // Clear EEM0 and EEM1 in 9346CR.
  46172. + btCR9346 &= ~(0xC0);
  46173. + write_nic_byte(dev, CR9346, btCR9346);
  46174. +
  46175. + if(bResult){
  46176. + // Update current RF state variable.
  46177. + priv->eRFPowerState = eRFPowerState;
  46178. + }
  46179. +
  46180. + return bResult;
  46181. +}
  46182. +//by amy for ps
  46183. +//
  46184. +// Description: Chang RF Power State.
  46185. +// Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE.
  46186. +//
  46187. +// Assumption:PASSIVE LEVEL.
  46188. +//
  46189. +bool SetRFPowerState(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState)
  46190. +{
  46191. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  46192. + bool bResult = false;
  46193. +
  46194. + //printk("---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
  46195. + if(eRFPowerState == priv->eRFPowerState)
  46196. + {
  46197. + //printk("<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState);
  46198. + return bResult;
  46199. + }
  46200. +
  46201. + switch(priv->rf_chip)
  46202. + {
  46203. + case RF_ZEBRA2:
  46204. + bResult = SetZebraRFPowerState8187B(dev, eRFPowerState);
  46205. + break;
  46206. +
  46207. + default:
  46208. + printk("SetRFPowerState8185(): unknown RFChipID: 0x%X!!!\n", priv->rf_chip);
  46209. + break;;
  46210. + }
  46211. + //printk("<--------- SetRFPowerState(): bResult(%d)\n", bResult);
  46212. +
  46213. + return bResult;
  46214. +}
  46215. +
  46216. +bool
  46217. +MgntActSet_RF_State(struct net_device *dev,RT_RF_POWER_STATE StateToSet,u32 ChangeSource)
  46218. +{
  46219. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  46220. + bool bActionAllowed = false;
  46221. + bool bConnectBySSID = false;
  46222. + RT_RF_POWER_STATE rtState;
  46223. + u16 RFWaitCounter = 0;
  46224. + unsigned long flag;
  46225. + // printk("===>MgntActSet_RF_State(): StateToSet(%d), ChangeSource(0x%x)\n",StateToSet, ChangeSource);
  46226. + //
  46227. + // Prevent the race condition of RF state change. By Bruce, 2007-11-28.
  46228. + // Only one thread can change the RF state at one time, and others should wait to be executed.
  46229. + //
  46230. +#if 1
  46231. + while(true)
  46232. + {
  46233. + //down(&priv->rf_state);
  46234. + spin_lock_irqsave(&priv->rf_ps_lock,flag);
  46235. + if(priv->RFChangeInProgress)
  46236. + {
  46237. + //up(&priv->rf_state);
  46238. + //RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet));
  46239. + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
  46240. + // Set RF after the previous action is done.
  46241. + while(priv->RFChangeInProgress)
  46242. + {
  46243. + RFWaitCounter ++;
  46244. + //RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter));
  46245. + udelay(1000); // 1 ms
  46246. +
  46247. + // Wait too long, return FALSE to avoid to be stuck here.
  46248. + if(RFWaitCounter > 1000) // 1sec
  46249. + {
  46250. + DMESG("MgntActSet_RF_State(): Wait too long to set RF");
  46251. + // TODO: Reset RF state?
  46252. + return false;
  46253. + }
  46254. + }
  46255. + }
  46256. + else
  46257. + {
  46258. + priv->RFChangeInProgress = true;
  46259. +// up(&priv->rf_state);
  46260. + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
  46261. + break;
  46262. + }
  46263. + }
  46264. +#endif
  46265. + rtState = priv->eRFPowerState;
  46266. +
  46267. + switch(StateToSet)
  46268. + {
  46269. + case eRfOn:
  46270. + //
  46271. + // Turn On RF no matter the IPS setting because we need to update the RF state to Ndis under Vista, or
  46272. + // the Windows does not allow the driver to perform site survey any more. By Bruce, 2007-10-02.
  46273. + //
  46274. + // leave last reasons and kick this reason till priv->RfOffReason = 0;
  46275. + // if one reason turn radio off check if off->on reason is the same.if so turn, or reject it.
  46276. + // if more than 1 reasons turn radio off we only turn on radio when all reasons turn on radio,
  46277. + // so first turn on trys will reject till priv->RfOffReason = 0;
  46278. + priv->RfOffReason &= (~ChangeSource);
  46279. +
  46280. + if(! priv->RfOffReason)
  46281. + {
  46282. + priv->RfOffReason = 0;
  46283. + bActionAllowed = true;
  46284. +
  46285. + if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW && !priv->bInHctTest)
  46286. + {
  46287. + bConnectBySSID = true;
  46288. + }
  46289. + } else {
  46290. + ;//lzm must or TX_PENDING 12>MAX_TX_URB
  46291. + //printk("Turn Radio On Reject because RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->RfOffReason, ChangeSource);
  46292. + }
  46293. + break;
  46294. +
  46295. + case eRfOff:
  46296. + // 070125, rcnjko: we always keep connected in AP mode.
  46297. + if (priv->RfOffReason > RF_CHANGE_BY_IPS)
  46298. + {
  46299. + //
  46300. + // 060808, Annie:
  46301. + // Disconnect to current BSS when radio off. Asked by QuanTa.
  46302. + //
  46303. +
  46304. + //
  46305. + // Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(),
  46306. + // because we do NOT need to set ssid to dummy ones.
  46307. + // Revised by Roger, 2007.12.04.
  46308. + //
  46309. +//by amy not supported
  46310. + //MgntDisconnect( dev, disas_lv_ss );
  46311. +
  46312. + // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI.
  46313. + // 2007.05.28, by shien chang.
  46314. + //PlatformZeroMemory( pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
  46315. + //pMgntInfo->NumBssDesc = 0;
  46316. + //PlatformZeroMemory( pMgntInfo->bssDesc4Query, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
  46317. + //pMgntInfo->NumBssDesc4Query = 0;
  46318. + }
  46319. +
  46320. +
  46321. +
  46322. + priv->RfOffReason |= ChangeSource;
  46323. + bActionAllowed = true;
  46324. + //printk("Turn Radio Off RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->RfOffReason, ChangeSource);
  46325. + break;
  46326. +
  46327. + case eRfSleep:
  46328. + priv->RfOffReason |= ChangeSource;
  46329. + bActionAllowed = true;
  46330. + break;
  46331. +
  46332. + default:
  46333. + break;
  46334. + }
  46335. +
  46336. + if(bActionAllowed)
  46337. + {
  46338. + // Config HW to the specified mode.
  46339. + //printk("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->RfOffReason);
  46340. + SetRFPowerState(dev, StateToSet);
  46341. + // Turn on RF.
  46342. + if(StateToSet == eRfOn)
  46343. + {
  46344. + //HalEnableRx8185Dummy(dev);
  46345. + if(bConnectBySSID)
  46346. + {
  46347. + // by amy not supported
  46348. + //MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE );
  46349. + }
  46350. + }
  46351. + // Turn off RF.
  46352. + else if(StateToSet == eRfOff)
  46353. + {
  46354. + //HalDisableRx8185Dummy(dev);
  46355. + }
  46356. + }
  46357. + else
  46358. + {
  46359. + //printk("Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n",
  46360. + // StateToSet, ChangeSource, priv->RfOffReason);
  46361. + }
  46362. +
  46363. + // Release RF spinlock
  46364. + //down(&priv->rf_state);
  46365. + spin_lock_irqsave(&priv->rf_ps_lock,flag);
  46366. + priv->RFChangeInProgress = false;
  46367. + //up(&priv->rf_state);
  46368. + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
  46369. + return bActionAllowed;
  46370. +}
  46371. +//by amy for ps
  46372. +
  46373. +void rtl8180_adapter_start(struct net_device *dev)
  46374. +{
  46375. + struct r8180_priv *priv = ieee80211_priv(dev);
  46376. +// struct ieee80211_device *ieee = priv->ieee80211;
  46377. +// u8 InitWirelessMode;
  46378. +// u8 SupportedWirelessMode;
  46379. +// bool bInvalidWirelessMode = false;
  46380. +
  46381. +
  46382. + if(NIC_8187 == priv->card_8187) {
  46383. + //rtl8180_rtx_disable(dev);
  46384. + rtl8180_reset(dev);
  46385. +
  46386. + write_nic_byte(dev,0x85,0);
  46387. + write_nic_byte(dev,0x91,0);
  46388. +
  46389. + /* light blink! */
  46390. + write_nic_byte(dev,0x85,4);
  46391. + write_nic_byte(dev,0x91,1);
  46392. + write_nic_byte(dev,0x90,0);
  46393. +
  46394. + //by lizhaoming for LED POWR ON
  46395. + //LedControl8187(dev, LED_CTL_POWER_ON);
  46396. +
  46397. + /*
  46398. + write_nic_byte(dev, CR9346, 0xC0);
  46399. + //LED TYPE
  46400. + write_nic_byte(dev, CONFIG1,((read_nic_byte(dev, CONFIG1)&0x3f)|0x80)); //turn on bit 5:Clkrun_mode
  46401. + write_nic_byte(dev, CR9346, 0x0); // disable config register write
  46402. + */
  46403. + priv->irq_mask = 0xffff;
  46404. + /*
  46405. + priv->dma_poll_mask = 0;
  46406. + priv->dma_poll_mask|= (1<<TX_DMA_STOP_BEACON_SHIFT);
  46407. + */
  46408. + // rtl8180_beacon_tx_disable(dev);
  46409. +
  46410. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  46411. + write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
  46412. + write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
  46413. +
  46414. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  46415. + rtl8180_update_msr(dev);
  46416. +
  46417. + rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
  46418. +
  46419. + write_nic_word(dev,0xf4,0xffff);
  46420. + write_nic_byte(dev,
  46421. + CONFIG1, (read_nic_byte(dev,CONFIG1) & 0x3f) | 0x80);
  46422. +
  46423. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  46424. +
  46425. + write_nic_dword(dev,INT_TIMEOUT,0);
  46426. +
  46427. +#ifdef DEBUG_REGISTERS
  46428. + rtl8180_dump_reg(dev);
  46429. +#endif
  46430. +
  46431. +
  46432. + write_nic_byte(dev, WPA_CONFIG, 0);
  46433. +
  46434. + write_nic_byte(dev, RATE_FALLBACK, 0x81);
  46435. + rtl8187_set_rate(dev);
  46436. +
  46437. + priv->rf_init(dev);
  46438. +
  46439. + if(priv->rf_set_sens != NULL) {
  46440. + priv->rf_set_sens(dev,priv->sens);
  46441. + }
  46442. +
  46443. + write_nic_word(dev,0x5e,1);
  46444. + //mdelay(1);
  46445. + write_nic_word(dev,0xfe,0x10);
  46446. + // mdelay(1);
  46447. + write_nic_byte(dev, TALLY_SEL, 0x80);//Set NQ retry count
  46448. + write_nic_byte(dev, 0xff, 0x60);
  46449. + write_nic_word(dev,0x5e,0);
  46450. +
  46451. + rtl8180_irq_enable(dev);
  46452. + } else {
  46453. + /**
  46454. + * IO part migrated from Windows Driver.
  46455. + */
  46456. + priv->irq_mask = 0xffff;
  46457. + // Enable Config3.PARAM_En.
  46458. + write_nic_byte(dev, CR9346, 0xC0);
  46459. +
  46460. + write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)| CONFIG3_PARM_En|CONFIG3_GNTSel));
  46461. + // Turn on Analog power.
  46462. + // setup A/D D/A parameter for 8185 b2
  46463. + // Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko.
  46464. + write_nic_dword(dev, ANA_PARAM2, ANAPARM2_ASIC_ON);
  46465. + write_nic_dword(dev, ANA_PARAM, ANAPARM_ASIC_ON);
  46466. + write_nic_byte(dev, ANA_PARAM3, 0x00);
  46467. +
  46468. + //by lizhaoming for LED POWR ON
  46469. + //LedControl8187(dev, LED_CTL_POWER_ON);
  46470. +
  46471. + {//added for reset PLL
  46472. + u8 bReg62;
  46473. + write_nic_byte(dev, 0x61, 0x10);
  46474. + bReg62 = read_nic_byte(dev, 0x62);
  46475. + write_nic_byte(dev, 0x62, bReg62&(~(0x1<<5)));
  46476. + write_nic_byte(dev, 0x62, bReg62|(0x1<<5));
  46477. + }
  46478. + write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)&(~CONFIG3_PARM_En)));
  46479. + write_nic_byte(dev, CR9346, 0x00);
  46480. +
  46481. + //rtl8180_rtx_disable(dev);
  46482. + rtl8180_reset(dev);
  46483. + write_nic_byte(dev, CR9346, 0xc0); // enable config register write
  46484. + priv->rf_init(dev);
  46485. + // Enable tx/rx
  46486. +
  46487. + write_nic_byte(dev, CMD, (CR_RE|CR_TE));// Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07.
  46488. +
  46489. + //add this is for 8187B Rx stall problem
  46490. +
  46491. + rtl8180_irq_enable(dev);
  46492. +
  46493. + write_nic_byte_E(dev, 0x41, 0xF4);
  46494. + write_nic_byte_E(dev, 0x40, 0x00);
  46495. + write_nic_byte_E(dev, 0x42, 0x00);
  46496. + write_nic_byte_E(dev, 0x42, 0x01);
  46497. + write_nic_byte_E(dev, 0x40, 0x0F);
  46498. + write_nic_byte_E(dev, 0x42, 0x00);
  46499. + write_nic_byte_E(dev, 0x42, 0x01);
  46500. +
  46501. + // 8187B demo board MAC and AFE power saving parameters from SD1 William, 2006.07.20.
  46502. + // Parameter revised by SD1 William, 2006.08.21:
  46503. + // 373h -> 0x4F // Original: 0x0F
  46504. + // 377h -> 0x59 // Original: 0x4F
  46505. + // Victor 2006/8/21: 竅�繒q簞�翹�竄��糧繕瞼SD3 簞穠禮C繚� and cable link test OK瞻~瞼聶礎癒 release,瞻瞿竄��糧瞻�禮�
  46506. + // 2006/9/5, Victor & ED: it is OK to use.
  46507. + //if(pHalData->RegBoardType == BT_DEMO_BOARD)
  46508. + //{
  46509. + // AFE.
  46510. + //
  46511. + // Revise the content of Reg0x372, 0x374, 0x378 and 0x37a to fix unusual electronic current
  46512. + // while CTS-To-Self occurs, by DZ's request.
  46513. + // Modified by Roger, 2007.06.22.
  46514. + //
  46515. + write_nic_byte(dev, 0x0DB, (read_nic_byte(dev, 0x0DB)|(BIT2)));
  46516. + write_nic_word(dev, 0x372, 0x59FA); // 0x4FFA-> 0x59FA.
  46517. + write_nic_word(dev, 0x374, 0x59D2); // 0x4FD2-> 0x59D2.
  46518. + write_nic_word(dev, 0x376, 0x59D2);
  46519. + write_nic_word(dev, 0x378, 0x19FA); // 0x0FFA-> 0x19FA.
  46520. + write_nic_word(dev, 0x37A, 0x19FA); // 0x0FFA-> 0x19FA.
  46521. + write_nic_word(dev, 0x37C, 0x00D0);
  46522. +
  46523. + write_nic_byte(dev, 0x061, 0x00);
  46524. +
  46525. + // MAC.
  46526. + write_nic_byte(dev, 0x180, 0x0F);
  46527. + write_nic_byte(dev, 0x183, 0x03);
  46528. + // 061218, lanhsin: for victorh request
  46529. + write_nic_byte(dev, 0x0DA, 0x10);
  46530. + //}
  46531. +
  46532. + //
  46533. + // 061213, rcnjko:
  46534. + // Set MAC.0x24D to 0x00 to prevent cts-to-self Tx/Rx stall symptom.
  46535. + // If we set MAC 0x24D to 0x08, OFDM and CCK will turn off
  46536. + // if not in use, and there is a bug about this action when
  46537. + // we try to send CCK CTS and OFDM data together.
  46538. + //
  46539. + //PlatformEFIOWrite1Byte(Adapter, 0x24D, 0x00);
  46540. + // 061218, lanhsin: for victorh request
  46541. + write_nic_byte(dev, 0x24D, 0x08);
  46542. +
  46543. + //
  46544. + // 061215, rcnjko:
  46545. + // Follow SD3 RTL8185B_87B_MacPhy_Register.doc v0.4.
  46546. + //
  46547. + write_nic_dword(dev, HSSI_PARA, 0x0600321B);
  46548. + //
  46549. + // 061226, rcnjko:
  46550. + // Babble found in HCT 2c_simultaneous test, server with 87B might
  46551. + // receive a packet size about 2xxx bytes.
  46552. + // So, we restrict RMS to 2048 (0x800), while as IC default value is 0xC00.
  46553. + //
  46554. + write_nic_word(dev, RMS, 0x0800);
  46555. +
  46556. + /*****20070321 Resolve HW page bug on system logo test
  46557. + u8 faketemp=read_nic_byte(dev, 0x50);*/
  46558. + }
  46559. +}
  46560. +
  46561. +/* this configures registers for beacon tx and enables it via
  46562. + * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
  46563. + * be used to stop beacon transmission
  46564. + */
  46565. +#if 0
  46566. +void rtl8180_start_tx_beacon(struct net_device *dev)
  46567. +{
  46568. + int i;
  46569. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  46570. + u16 word;
  46571. + DMESG("Enabling beacon TX");
  46572. + //write_nic_byte(dev, 0x42,0xe6);// TCR
  46573. + //rtl8180_init_beacon(dev);
  46574. + //set_nic_txring(dev);
  46575. +// rtl8180_prepare_beacon(dev);
  46576. + rtl8180_irq_disable(dev);
  46577. +// rtl8180_beacon_tx_enable(dev);
  46578. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  46579. + //write_nic_byte(dev,0x9d,0x20); //DMA Poll
  46580. + //write_nic_word(dev,0x7a,0);
  46581. + //write_nic_word(dev,0x7a,0x8000);
  46582. +
  46583. +
  46584. + word = read_nic_word(dev, BcnItv);
  46585. + word &= ~BcnItv_BcnItv; // clear Bcn_Itv
  46586. + write_nic_word(dev, BcnItv, word);
  46587. +
  46588. + write_nic_word(dev, AtimWnd,
  46589. + read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd);
  46590. +
  46591. + word = read_nic_word(dev, BintrItv);
  46592. + word &= ~BintrItv_BintrItv;
  46593. +
  46594. + //word |= priv->ieee80211->beacon_interval *
  46595. + // ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
  46596. + // FIXME:FIXME check if correct ^^ worked with 0x3e8;
  46597. +
  46598. + write_nic_word(dev, BintrItv, word);
  46599. +
  46600. + //write_nic_word(dev,0x2e,0xe002);
  46601. + //write_nic_dword(dev,0x30,0xb8c7832e);
  46602. + for(i=0; i<ETH_ALEN; i++)
  46603. + write_nic_byte(dev, BSSID+i, priv->ieee80211->beacon_cell_ssid[i]);
  46604. +
  46605. +// rtl8180_update_msr(dev);
  46606. +
  46607. +
  46608. + //write_nic_byte(dev,CONFIG4,3); /* !!!!!!!!!! */
  46609. +
  46610. + rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
  46611. +
  46612. + rtl8180_irq_enable(dev);
  46613. +
  46614. + /* VV !!!!!!!!!! VV*/
  46615. + /*
  46616. + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
  46617. + write_nic_byte(dev,0x9d,0x00);
  46618. + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
  46619. +*/
  46620. +}
  46621. +#endif
  46622. +/***************************************************************************
  46623. + -------------------------------NET STUFF---------------------------
  46624. +***************************************************************************/
  46625. +static struct net_device_stats *rtl8180_stats(struct net_device *dev)
  46626. +{
  46627. + struct r8180_priv *priv = ieee80211_priv(dev);
  46628. +
  46629. + return &priv->ieee80211->stats;
  46630. +}
  46631. +
  46632. +int _rtl8180_up(struct net_device *dev)
  46633. +{
  46634. + struct r8180_priv *priv = ieee80211_priv(dev);
  46635. + //int i;
  46636. +
  46637. + priv->driver_upping = 1;
  46638. + priv->up=1;
  46639. +
  46640. +#ifdef LED
  46641. + if(priv->ieee80211->bHwRadioOff == false)
  46642. + priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_ON);
  46643. +#endif
  46644. + MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_SW);
  46645. +
  46646. + rtl8180_adapter_start(dev);
  46647. + rtl8180_rx_enable(dev);
  46648. + rtl8180_tx_enable(dev);
  46649. +//by amy for rate adaptive
  46650. + timer_rate_adaptive((unsigned long)dev);
  46651. +//by amy for rate adaptive
  46652. +
  46653. +#ifdef SW_ANTE_DIVERSITY
  46654. + if(priv->bSwAntennaDiverity){
  46655. + //DMESG("SW Antenna Diversity Enable!");
  46656. + SwAntennaDiversityTimerCallback(dev);
  46657. + }
  46658. +#endif
  46659. +#ifdef POLLING_METHOD_FOR_RADIO
  46660. + if(priv->polling_timer_on == 0){//add for S3/S4
  46661. + gpio_change_polling((unsigned long)dev);
  46662. + }
  46663. +#endif
  46664. +
  46665. + ieee80211_softmac_start_protocol(priv->ieee80211);
  46666. +
  46667. +//by amy for ps
  46668. + watch_dog_adaptive((unsigned long)dev);
  46669. +//by amy for ps
  46670. +
  46671. + ieee80211_reset_queue(priv->ieee80211);
  46672. + if(!netif_queue_stopped(dev))
  46673. + netif_start_queue(dev);
  46674. + else
  46675. + netif_wake_queue(dev);
  46676. +
  46677. +#ifndef CONFIG_SOFT_BEACON
  46678. + if(NIC_8187B == priv->card_8187)
  46679. + rtl8187_rx_manage_initiate(dev);
  46680. +#endif
  46681. +
  46682. +#ifdef _RTL8187_EXT_PATCH_
  46683. + if(priv->mshobj && priv->mshobj->ext_patch_rtl8180_up )
  46684. + priv->mshobj->ext_patch_rtl8180_up(priv->mshobj);
  46685. +#endif
  46686. +
  46687. +
  46688. + priv->driver_upping = 0;
  46689. + DMESG("rtl8187_open process complete");
  46690. + return 0;
  46691. +}
  46692. +
  46693. +
  46694. +int rtl8180_open(struct net_device *dev)
  46695. +{
  46696. + struct r8180_priv *priv = ieee80211_priv(dev);
  46697. + int ret;
  46698. +//changed by lizhaoming for power on/off
  46699. + if(priv->ieee80211->bHwRadioOff == false){
  46700. + DMESG("rtl8187_open process ");
  46701. + down(&priv->wx_sem);
  46702. + ret = rtl8180_up(dev);
  46703. + up(&priv->wx_sem);
  46704. + return ret;
  46705. + }else{
  46706. + DMESG("rtl8187_open process failed because radio off");
  46707. + return -1;
  46708. + }
  46709. +
  46710. +}
  46711. +
  46712. +
  46713. +int rtl8180_up(struct net_device *dev)
  46714. +{
  46715. + struct r8180_priv *priv = ieee80211_priv(dev);
  46716. +
  46717. + if (priv->up == 1) return -1;
  46718. +
  46719. + return _rtl8180_up(dev);
  46720. +}
  46721. +
  46722. +
  46723. +int rtl8180_close(struct net_device *dev)
  46724. +{
  46725. + struct r8180_priv *priv = ieee80211_priv(dev);
  46726. + int ret;
  46727. +
  46728. + if (priv->up == 0) return -1;
  46729. +
  46730. + down(&priv->wx_sem);
  46731. +
  46732. + //DMESG("rtl8187_close process");
  46733. + ret = rtl8180_down(dev);
  46734. +#ifdef LED
  46735. + priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_OFF);
  46736. +#endif
  46737. + up(&priv->wx_sem);
  46738. +
  46739. + return ret;
  46740. +
  46741. +}
  46742. +
  46743. +int rtl8180_down(struct net_device *dev)
  46744. +{
  46745. + struct r8180_priv *priv = ieee80211_priv(dev);
  46746. +
  46747. + if (priv->up == 0) return -1;
  46748. +
  46749. + priv->up=0;
  46750. +
  46751. +/* FIXME */
  46752. + if (!netif_queue_stopped(dev))
  46753. + netif_stop_queue(dev);
  46754. +
  46755. + DMESG("rtl8180_down process");
  46756. + rtl8180_rtx_disable(dev);
  46757. + rtl8180_irq_disable(dev);
  46758. +//by amy for rate adaptive
  46759. + del_timer_sync(&priv->rateadapter_timer);
  46760. + cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
  46761. +//by amy for rate adaptive
  46762. + del_timer_sync(&priv->watch_dog_timer);
  46763. + cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
  46764. + cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
  46765. + cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
  46766. +
  46767. +#ifdef SW_ANTE_DIVERSITY
  46768. + del_timer_sync(&priv->SwAntennaDiversityTimer);
  46769. + cancel_delayed_work(&priv->ieee80211->SwAntennaWorkItem);
  46770. +#endif
  46771. +
  46772. + ieee80211_softmac_stop_protocol(priv->ieee80211);
  46773. + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
  46774. + //amy,081212
  46775. + memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
  46776. + return 0;
  46777. +}
  46778. +
  46779. +bool SetZebraRFPowerState8187B(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState);
  46780. +
  46781. +void rtl8180_commit(struct net_device *dev)
  46782. +{
  46783. + struct r8180_priv *priv = ieee80211_priv(dev);
  46784. + int i;
  46785. +
  46786. + if (priv->up == 0) return ;
  46787. + printk("==========>%s()\n", __FUNCTION__);
  46788. +
  46789. + /* FIXME */
  46790. + if (!netif_queue_stopped(dev))
  46791. + netif_stop_queue(dev);
  46792. +
  46793. +//by amy for rate adaptive
  46794. + del_timer_sync(&priv->rateadapter_timer);
  46795. + cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
  46796. +//by amy for rate adaptive
  46797. + del_timer_sync(&priv->watch_dog_timer);
  46798. + cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
  46799. + cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
  46800. + cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
  46801. +
  46802. +#ifdef SW_ANTE_DIVERSITY
  46803. + del_timer_sync(&priv->SwAntennaDiversityTimer);
  46804. + cancel_delayed_work(&priv->ieee80211->SwAntennaWorkItem);
  46805. +#endif
  46806. + ieee80211_softmac_stop_protocol(priv->ieee80211);
  46807. +
  46808. +#if 0
  46809. + if(priv->ieee80211->bHwRadioOff == false){
  46810. + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_HW);
  46811. + mdelay(10);
  46812. + MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_HW);
  46813. + }
  46814. +#endif
  46815. +
  46816. + rtl8180_irq_disable(dev);
  46817. + rtl8180_rtx_disable(dev);
  46818. +
  46819. + //test pending bug, john 20070815
  46820. + //initialize tx_pending
  46821. + for(i=0;i<0x10;i++) atomic_set(&(priv->tx_pending[i]), 0);
  46822. +
  46823. + _rtl8180_up(dev);
  46824. + priv->commit = 0;
  46825. +}
  46826. +
  46827. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  46828. +void rtl8180_restart(struct work_struct *work)
  46829. +{
  46830. + struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
  46831. + struct ieee80211_device* ieee = priv->ieee80211;//for commit crash
  46832. + struct net_device *dev = ieee->dev;//for commit crash
  46833. +#else
  46834. +void rtl8180_restart(struct net_device *dev)
  46835. +{
  46836. +
  46837. + struct r8180_priv *priv = ieee80211_priv(dev);
  46838. +#endif
  46839. +
  46840. + down(&priv->wx_sem);
  46841. +
  46842. + rtl8180_commit(dev);
  46843. +
  46844. + up(&priv->wx_sem);
  46845. +}
  46846. +
  46847. +static void r8180_set_multicast(struct net_device *dev)
  46848. +{
  46849. + struct r8180_priv *priv = ieee80211_priv(dev);
  46850. + short promisc;
  46851. +
  46852. + //down(&priv->wx_sem);
  46853. +
  46854. + /* FIXME FIXME */
  46855. +
  46856. + promisc = (dev->flags & IFF_PROMISC) ? 1:0;
  46857. +
  46858. + if (promisc != priv->promisc)
  46859. + // rtl8180_commit(dev);
  46860. +
  46861. + priv->promisc = promisc;
  46862. +
  46863. + //schedule_work(&priv->reset_wq);
  46864. + //up(&priv->wx_sem);
  46865. +}
  46866. +
  46867. +
  46868. +int r8180_set_mac_adr(struct net_device *dev, void *mac)
  46869. +{
  46870. + struct r8180_priv *priv = ieee80211_priv(dev);
  46871. + struct sockaddr *addr = mac;
  46872. +
  46873. + down(&priv->wx_sem);
  46874. +
  46875. + memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
  46876. +
  46877. +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  46878. + schedule_work(&priv->reset_wq);
  46879. +#else
  46880. + schedule_task(&priv->reset_wq);
  46881. +#endif
  46882. + up(&priv->wx_sem);
  46883. +
  46884. + return 0;
  46885. +}
  46886. +
  46887. +struct ipw_param {
  46888. + u32 cmd;
  46889. + u8 sta_addr[ETH_ALEN];
  46890. + union {
  46891. + struct {
  46892. + u8 name;
  46893. + u32 value;
  46894. + } wpa_param;
  46895. + struct {
  46896. + u32 len;
  46897. + u8 reserved[32];
  46898. + u8 data[0];
  46899. + } wpa_ie;
  46900. + struct{
  46901. + u32 command;
  46902. + u32 reason_code;
  46903. + } mlme;
  46904. + struct {
  46905. + u8 alg[16];
  46906. + u8 set_tx;
  46907. + u32 err;
  46908. + u8 idx;
  46909. + u8 seq[8];
  46910. + u16 key_len;
  46911. + u8 key[0];
  46912. + } crypt;
  46913. +
  46914. + } u;
  46915. +};
  46916. +
  46917. +
  46918. +/* based on ipw2200 driver */
  46919. +int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  46920. +{
  46921. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  46922. + struct iwreq *wrq = (struct iwreq *)rq;
  46923. + int ret=-1;
  46924. +
  46925. +#ifdef JOHN_TKIP
  46926. + u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
  46927. +
  46928. + struct ieee80211_device *ieee = priv->ieee80211;
  46929. + struct ipw_param *ipw = (struct ipw_param *)wrq->u.data.pointer;
  46930. + u32 key[4];
  46931. +
  46932. +#endif
  46933. +
  46934. +#ifdef _RTL8187_EXT_PATCH_
  46935. + if(priv->mshobj && (priv->ieee80211->iw_mode == priv->ieee80211->iw_ext_mode) && priv->mshobj->ext_patch_rtl8180_ioctl)
  46936. + {
  46937. + // DO NOT put the belowing function in critical section, due to it uses "spin lock"
  46938. + if((ret = priv->mshobj->ext_patch_rtl8180_ioctl(dev, rq, cmd)) != -EOPNOTSUPP)
  46939. + return ret;
  46940. + }
  46941. +#endif
  46942. +
  46943. + down(&priv->wx_sem);
  46944. +
  46945. + switch (cmd) {
  46946. + case RTL_IOCTL_WPA_SUPPLICANT:
  46947. +#ifdef JOHN_TKIP
  46948. +
  46949. +//the following code is specified for ipw driver in wpa_supplicant
  46950. + if( ((u32*)wrq->u.data.pointer)[0]==3 ){
  46951. +
  46952. +
  46953. + if( ((u32*)wrq->u.data.pointer)[7] &&
  46954. + ( ((u32*)wrq->u.data.pointer)[3]==0x504d4343 ||
  46955. + ((u32*)wrq->u.data.pointer)[3]==0x50494b54 )) {//50494b54 tkip and 504d4343 ccmp
  46956. +
  46957. + //enable HW security of TKIP and CCMP
  46958. + write_nic_byte(dev, WPA_CONFIG, SCR_TxSecEnable | SCR_RxSecEnable );
  46959. +
  46960. + //copy key from wpa_supplicant ioctl info
  46961. + key[0] = ((u32*)wrq->u.data.pointer)[12];
  46962. + key[1] = ((u32*)wrq->u.data.pointer)[13];
  46963. + key[2] = ((u32*)wrq->u.data.pointer)[14];
  46964. + key[3] = ((u32*)wrq->u.data.pointer)[15];
  46965. + switch (ieee->pairwise_key_type){
  46966. + case KEY_TYPE_TKIP:
  46967. + setKey( dev,
  46968. + 0, //EntryNo
  46969. + ipw->u.crypt.idx, //KeyIndex
  46970. + KEY_TYPE_TKIP, //KeyType
  46971. + (u8*)ieee->ap_mac_addr, //MacAddr
  46972. + 0, //DefaultKey
  46973. + key); //KeyContent
  46974. + break;
  46975. +
  46976. + case KEY_TYPE_CCMP:
  46977. + setKey( dev,
  46978. + 0, //EntryNo
  46979. + ipw->u.crypt.idx, //KeyIndex
  46980. + KEY_TYPE_CCMP, //KeyType
  46981. + (u8*)ieee->ap_mac_addr, //MacAddr
  46982. + 0, //DefaultKey
  46983. + key); //KeyContent
  46984. + break
  46985. +;
  46986. + default:
  46987. + printk("error on key_type: %d\n", ieee->pairwise_key_type);
  46988. + break;
  46989. + }
  46990. + }
  46991. +
  46992. + //group key for broadcast
  46993. + if( ((u32*)wrq->u.data.pointer)[9] ) {
  46994. +
  46995. + key[0] = ((u32*)wrq->u.data.pointer)[12];
  46996. + key[1] = ((u32*)wrq->u.data.pointer)[13];
  46997. + key[2] = ((u32*)wrq->u.data.pointer)[14];
  46998. + key[3] = ((u32*)wrq->u.data.pointer)[15];
  46999. +
  47000. + if( ((u32*)wrq->u.data.pointer)[3]==0x50494b54 ){//50494b54 is the ASCII code of TKIP in reversed order
  47001. + setKey( dev,
  47002. + 1, //EntryNo
  47003. + ipw->u.crypt.idx,//KeyIndex
  47004. + KEY_TYPE_TKIP, //KeyType
  47005. + broadcast_addr, //MacAddr
  47006. + 0, //DefaultKey
  47007. + key); //KeyContent
  47008. + }
  47009. + else if( ((u32*)wrq->u.data.pointer)[3]==0x504d4343 ){//CCMP
  47010. + setKey( dev,
  47011. + 1, //EntryNo
  47012. + ipw->u.crypt.idx,//KeyIndex
  47013. + KEY_TYPE_CCMP, //KeyType
  47014. + broadcast_addr, //MacAddr
  47015. + 0, //DefaultKey
  47016. + key); //KeyContent
  47017. + }
  47018. + else if( ((u32*)wrq->u.data.pointer)[3]==0x656e6f6e ){//none
  47019. + //do nothing
  47020. + }
  47021. + else if( ((u32*)wrq->u.data.pointer)[3]==0x504557 ){//WEP
  47022. + setKey( dev,
  47023. + 1, //EntryNo
  47024. + ipw->u.crypt.idx,//KeyIndex
  47025. + KEY_TYPE_WEP40, //KeyType
  47026. + broadcast_addr, //MacAddr
  47027. + 0, //DefaultKey
  47028. + key); //KeyContent
  47029. + }
  47030. + else printk("undefine group key type: %8x\n", ((u32*)wrq->u.data.pointer)[3]);
  47031. + }
  47032. +
  47033. + }
  47034. +#endif /*JOHN_TKIP*/
  47035. +
  47036. +
  47037. +#ifdef JOHN_HWSEC_DEBUG
  47038. + {
  47039. + int i;
  47040. + //john's test 0711
  47041. + printk("@@ wrq->u pointer = ");
  47042. + for(i=0;i<wrq->u.data.length;i++){
  47043. + if(i%10==0) printk("\n");
  47044. + printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
  47045. + }
  47046. + printk("\n");
  47047. + }
  47048. +#endif /*JOHN_HWSEC_DEBUG*/
  47049. + ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
  47050. + break;
  47051. +
  47052. + default:
  47053. + ret = -EOPNOTSUPP;
  47054. + break;
  47055. + }
  47056. +
  47057. + up(&priv->wx_sem);
  47058. +
  47059. + return ret;
  47060. +}
  47061. +
  47062. +
  47063. +struct tx_desc {
  47064. +
  47065. +#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
  47066. +
  47067. +
  47068. +//dword 0
  47069. +unsigned int tpktsize:12;
  47070. +unsigned int rsvd0:3;
  47071. +unsigned int no_encrypt:1;
  47072. +unsigned int splcp:1;
  47073. +unsigned int morefrag:1;
  47074. +unsigned int ctsen:1;
  47075. +unsigned int rtsrate:4;
  47076. +unsigned int rtsen:1;
  47077. +unsigned int txrate:4;
  47078. +unsigned int last:1;
  47079. +unsigned int first:1;
  47080. +unsigned int dmaok:1;
  47081. +unsigned int own:1;
  47082. +
  47083. +//dword 1
  47084. +unsigned short rtsdur;
  47085. +unsigned short length:15;
  47086. +unsigned short l_ext:1;
  47087. +
  47088. +//dword 2
  47089. +unsigned int bufaddr;
  47090. +
  47091. +
  47092. +//dword 3
  47093. +unsigned short rxlen:12;
  47094. +unsigned short rsvd1:3;
  47095. +unsigned short miccal:1;
  47096. +unsigned short dur;
  47097. +
  47098. +//dword 4
  47099. +unsigned int nextdescaddr;
  47100. +
  47101. +//dword 5
  47102. +unsigned char rtsagc;
  47103. +unsigned char retrylimit;
  47104. +unsigned short rtdb:1;
  47105. +unsigned short noacm:1;
  47106. +unsigned short pifs:1;
  47107. +unsigned short rsvd2:4;
  47108. +unsigned short rtsratefallback:4;
  47109. +unsigned short ratefallback:5;
  47110. +
  47111. +//dword 6
  47112. +unsigned short delaybound;
  47113. +unsigned short rsvd3:4;
  47114. +unsigned short agc:8;
  47115. +unsigned short antenna:1;
  47116. +unsigned short spc:2;
  47117. +unsigned short rsvd4:1;
  47118. +
  47119. +//dword 7
  47120. +unsigned char len_adjust:2;
  47121. +unsigned char rsvd5:1;
  47122. +unsigned char tpcdesen:1;
  47123. +unsigned char tpcpolarity:2;
  47124. +unsigned char tpcen:1;
  47125. +unsigned char pten:1;
  47126. +
  47127. +unsigned char bckey:6;
  47128. +unsigned char enbckey:1;
  47129. +unsigned char enpmpd:1;
  47130. +unsigned short fragqsz;
  47131. +
  47132. +
  47133. +#else
  47134. +
  47135. +#error "please modify tx_desc to your own\n"
  47136. +
  47137. +#endif
  47138. +
  47139. +
  47140. +} __attribute__((packed));
  47141. +
  47142. +struct rx_desc_rtl8187b {
  47143. +
  47144. +#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
  47145. +
  47146. +//dword 0
  47147. +unsigned int rxlen:12;
  47148. +unsigned int icv:1;
  47149. +unsigned int crc32:1;
  47150. +unsigned int pwrmgt:1;
  47151. +unsigned int res:1;
  47152. +unsigned int bar:1;
  47153. +unsigned int pam:1;
  47154. +unsigned int mar:1;
  47155. +unsigned int qos:1;
  47156. +unsigned int rxrate:4;
  47157. +unsigned int trsw:1;
  47158. +unsigned int splcp:1;
  47159. +unsigned int fovf:1;
  47160. +unsigned int dmafail:1;
  47161. +unsigned int last:1;
  47162. +unsigned int first:1;
  47163. +unsigned int eor:1;
  47164. +unsigned int own:1;
  47165. +
  47166. +
  47167. +//dword 1
  47168. +unsigned int tsftl;
  47169. +
  47170. +
  47171. +//dword 2
  47172. +unsigned int tsfth;
  47173. +
  47174. +
  47175. +//dword 3
  47176. +unsigned char sq;
  47177. +unsigned char rssi:7;
  47178. +unsigned char antenna:1;
  47179. +
  47180. +unsigned char agc;
  47181. +unsigned char decrypted:1;
  47182. +unsigned char wakeup:1;
  47183. +unsigned char shift:1;
  47184. +unsigned char rsvd0:5;
  47185. +
  47186. +//dword 4
  47187. +unsigned int num_mcsi:4;
  47188. +unsigned int snr_long2end:6;
  47189. +unsigned int cfo_bias:6;
  47190. +
  47191. +int pwdb_g12:8;
  47192. +unsigned int fot:8;
  47193. +
  47194. +
  47195. +
  47196. +
  47197. +#else
  47198. +
  47199. +#error "please modify tx_desc to your own\n"
  47200. +
  47201. +#endif
  47202. +
  47203. +}__attribute__((packed));
  47204. +
  47205. +
  47206. +
  47207. +struct rx_desc_rtl8187 {
  47208. +
  47209. +#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
  47210. +
  47211. +//dword 0
  47212. +unsigned int rxlen:12;
  47213. +unsigned int icv:1;
  47214. +unsigned int crc32:1;
  47215. +unsigned int pwrmgt:1;
  47216. +unsigned int res:1;
  47217. +unsigned int bar:1;
  47218. +unsigned int pam:1;
  47219. +unsigned int mar:1;
  47220. +unsigned int qos:1;
  47221. +unsigned int rxrate:4;
  47222. +unsigned int trsw:1;
  47223. +unsigned int splcp:1;
  47224. +unsigned int fovf:1;
  47225. +unsigned int dmafail:1;
  47226. +unsigned int last:1;
  47227. +unsigned int first:1;
  47228. +unsigned int eor:1;
  47229. +unsigned int own:1;
  47230. +
  47231. +//dword 1
  47232. +unsigned char sq;
  47233. +unsigned char rssi:7;
  47234. +unsigned char antenna:1;
  47235. +
  47236. +unsigned char agc;
  47237. +unsigned char decrypted:1;
  47238. +unsigned char wakeup:1;
  47239. +unsigned char shift:1;
  47240. +unsigned char rsvd0:5;
  47241. +
  47242. +//dword 2
  47243. +unsigned int tsftl;
  47244. +
  47245. +//dword 3
  47246. +unsigned int tsfth;
  47247. +
  47248. +
  47249. +
  47250. +#else
  47251. +
  47252. +#error "please modify tx_desc to your own\n"
  47253. +
  47254. +#endif
  47255. +
  47256. +
  47257. +}__attribute__((packed));
  47258. +
  47259. +
  47260. +
  47261. +union rx_desc {
  47262. +
  47263. +struct rx_desc_rtl8187b desc_87b;
  47264. +struct rx_desc_rtl8187 desc_87;
  47265. +
  47266. +}__attribute__((packed));
  47267. +
  47268. +//
  47269. +// Description:
  47270. +// Perform signal smoothing for dynamic mechanism.
  47271. +// This is different with PerformSignalSmoothing8187 in smoothing fomula.
  47272. +// No dramatic adjustion is apply because dynamic mechanism need some degree
  47273. +// of correctness.
  47274. +// 2007.01.23, by shien chang.
  47275. +//
  47276. +void PerformUndecoratedSignalSmoothing8187(struct net_device *dev, struct ieee80211_rx_stats *stats)
  47277. +{
  47278. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  47279. + bool bCckRate = rtl8180_IsWirelessBMode(rtl8180_rate2rate(stats->rate));
  47280. +
  47281. + if(NIC_8187 == priv->card_8187) {
  47282. + if(priv->UndecoratedSmoothedSS >= 0) {
  47283. + priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 50) + (stats->signalstrength * 11)) / 60;
  47284. + }else{
  47285. + priv->UndecoratedSmoothedSS = stats->signalstrength;
  47286. + }
  47287. + } else {
  47288. + // Determin the current packet is CCK rate, by Bruce, 2007-04-12.
  47289. + priv->bCurCCKPkt = bCckRate;
  47290. +
  47291. + // Tesing for SD3 DZ, by Bruce, 2007-04-11.
  47292. + if(priv->UndecoratedSmoothedSS >= 0) {
  47293. + priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (stats->signalstrength * 10)) / 6;
  47294. + }else{
  47295. + priv->UndecoratedSmoothedSS = stats->signalstrength * 10;
  47296. + }
  47297. +
  47298. + //
  47299. + // Bacause the AGC parameter is not exactly correct under high power (AGC saturation), we need to record the RSSI value to be
  47300. + // referenced by DoRxHighPower. It is not necessary to record this value when this packet is sent by OFDM rate.
  47301. + // Advised by SD3 DZ, by Bruce, 2007-04-12.
  47302. + //
  47303. + if(bCckRate){
  47304. + priv->CurCCKRSSI = stats->signal;
  47305. + }else{
  47306. + priv->CurCCKRSSI = 0;
  47307. + }
  47308. + }
  47309. + //printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", stats->signalstrength, priv->UndecoratedSmoothedSS);
  47310. +}
  47311. +
  47312. +#ifdef THOMAS_SKB
  47313. +void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
  47314. +{
  47315. + int status,len,flen;
  47316. +
  47317. +#ifdef SW_ANTE_DIVERSITY
  47318. + u8 Antenna = 0;
  47319. +#endif
  47320. + u32 SignalStrength = 0;
  47321. + u32 quality = 0;
  47322. + bool bCckRate = false;
  47323. + char RX_PWDB = 0;
  47324. + long RecvSignalPower=0;
  47325. + struct sk_buff *skb;
  47326. + struct sk_buff *skb2;//skb for check out of memory
  47327. + union rx_desc *desc;
  47328. + //struct urb *rx_urb = priv->rxurb_task;
  47329. + struct ieee80211_hdr *hdr;//by amy
  47330. + u16 fc,type;
  47331. + u8 bHwError=0,bCRC=0,bICV=0;
  47332. + long SignalStrengthIndex = 0;
  47333. + struct ieee80211_rx_stats stats = {
  47334. + .signal = 0,
  47335. + .noise = -98,
  47336. + .rate = 0,
  47337. + //.mac_time = jiffies,
  47338. + .freq = IEEE80211_24GHZ_BAND,
  47339. + };
  47340. +
  47341. + int *prx_inx=&priv->rx_inx;
  47342. + struct urb *rx_urb=priv->rx_urb[*prx_inx]; //changed by jackson
  47343. + struct net_device *dev = (struct net_device*)rx_urb->context;
  47344. + //DMESG("=====>RX %x ",rx_urb->status);
  47345. +
  47346. + skb = priv->pp_rxskb[*prx_inx];
  47347. + status = rx_urb->status;
  47348. + skb2 = dev_alloc_skb(RX_URB_SIZE);
  47349. +
  47350. + if (skb2 == NULL){
  47351. + printk(KERN_ALERT "No Skb For RX!/n");
  47352. + //rx_urb->transfer_buffer = skb->data;
  47353. + //priv->pp_rxskb[*prx_inx] = skb;
  47354. + } else {
  47355. +
  47356. + if(status == 0)
  47357. + {
  47358. + if(NIC_8187B == priv->card_8187)
  47359. + {
  47360. + stats.nic_type = NIC_8187B;
  47361. + len = rx_urb->actual_length;
  47362. + len -= sizeof (struct rx_desc_rtl8187b);
  47363. + desc = (union rx_desc *)(rx_urb->transfer_buffer + len);
  47364. + flen = desc->desc_87b.rxlen ;
  47365. +
  47366. + if( flen <= rx_urb->actual_length){
  47367. +#if 1
  47368. +#ifdef SW_ANTE_DIVERSITY
  47369. + Antenna = desc->desc_87b.antenna;
  47370. +#endif
  47371. + stats.mac_time[0] = desc->desc_87b.tsftl;
  47372. + stats.mac_time[1] = desc->desc_87b.tsfth;
  47373. +
  47374. + stats.signal = desc->desc_87b.rssi;
  47375. + //stats.noise = desc->desc_87b.sq;
  47376. + quality = desc->desc_87b.sq;
  47377. + stats.rate = desc->desc_87b.rxrate;
  47378. + bCckRate = rtl8180_IsWirelessBMode(rtl8180_rate2rate(stats.rate));
  47379. +
  47380. + if(!bCckRate) { // OFDM rate.
  47381. + if(desc->desc_87b.pwdb_g12 < -106)
  47382. + SignalStrength = 0;
  47383. + else
  47384. + SignalStrength = desc->desc_87b.pwdb_g12 + 106;
  47385. + RX_PWDB = (desc->desc_87b.pwdb_g12)/2 -42;
  47386. + } else { // CCK rate.
  47387. + if(desc->desc_87b.agc> 174)
  47388. + SignalStrength = 0;
  47389. + else
  47390. + SignalStrength = 174 - desc->desc_87b.agc;
  47391. + RX_PWDB = ((desc->desc_87b.agc)/2)*(-1) - 8;
  47392. + }
  47393. +
  47394. + //lzm mod 081028 based on windows driver
  47395. + //compensate SignalStrength when switch TR to SW controled
  47396. + if(priv->TrSwitchState == TR_SW_TX) {
  47397. + SignalStrength = SignalStrength + 54;
  47398. + RX_PWDB = RX_PWDB + 27;
  47399. + }
  47400. +
  47401. + if(SignalStrength > 100)
  47402. + SignalStrength = 100;
  47403. + SignalStrength = (SignalStrength * 70) / 100 + 30;
  47404. +
  47405. + if(SignalStrength > 50)
  47406. + SignalStrength = SignalStrength + 10;
  47407. + if(SignalStrength > 100)
  47408. + SignalStrength = 100;
  47409. +
  47410. + RecvSignalPower = RX_PWDB;
  47411. + //printk("SignalStrength = %d \n",SignalStrength);
  47412. + bHwError = (desc->desc_87b.fovf | desc->desc_87b.icv | desc->desc_87b.crc32);
  47413. + bCRC = desc->desc_87b.crc32;
  47414. + bICV = desc->desc_87b.icv;
  47415. + priv->wstats.qual.level = (u8)SignalStrength;
  47416. +
  47417. + if(!bCckRate){
  47418. + if (quality > 127)
  47419. + quality = 0;
  47420. + else if (quality <27)
  47421. + quality = 100;
  47422. + else
  47423. + quality = 127 - quality;
  47424. + } else {
  47425. + if(quality > 64)
  47426. + quality = 0;
  47427. + else
  47428. + quality = ((64-quality)*100)/64;
  47429. + }
  47430. +
  47431. +
  47432. + priv ->wstats.qual.qual = quality;
  47433. + priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
  47434. +
  47435. + stats.signalstrength = (u8)SignalStrength;
  47436. + stats.signal = (u8)quality;
  47437. + stats.noise = desc->desc_87b.snr_long2end;
  47438. +
  47439. + skb_put(skb,flen-4);
  47440. +
  47441. + priv->stats.rxok++;
  47442. + //by amy
  47443. + hdr = (struct ieee80211_hdr *)skb->data;
  47444. + fc = le16_to_cpu(hdr->frame_ctl);
  47445. + type = WLAN_FC_GET_TYPE(fc);
  47446. +
  47447. + if((IEEE80211_FTYPE_CTL != type) &&
  47448. + (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) && (!bHwError) && (!bCRC)&& (!bICV))
  47449. + {
  47450. + // Perform signal smoothing for dynamic mechanism on demand.
  47451. + // This is different with PerformSignalSmoothing8187 in smoothing fomula.
  47452. + // No dramatic adjustion is apply because dynamic mechanism need some degree
  47453. + // of correctness. 2007.01.23, by shien chang.
  47454. + PerformUndecoratedSignalSmoothing8187(dev, &stats);
  47455. +
  47456. + //Update signal strength and realted into private RxStats for UI query.
  47457. + SignalStrengthIndex = NetgearSignalStrengthTranslate(priv->LastSignalStrengthInPercent, priv->wstats.qual.level);
  47458. + priv->LastSignalStrengthInPercent = SignalStrengthIndex;
  47459. + priv->SignalStrength = TranslateToDbm8187((u8)SignalStrengthIndex);
  47460. + priv->SignalQuality = (priv->SignalQuality*5+quality+5)/6;
  47461. + priv->RecvSignalPower = (priv->RecvSignalPower * 5 + RecvSignalPower - 1) / 6;
  47462. +#ifdef SW_ANTE_DIVERSITY
  47463. + priv->LastRxPktAntenna = Antenna ? 1:0;
  47464. + SwAntennaDiversityRxOk8185(dev, SignalStrength);
  47465. +#endif
  47466. + }
  47467. + //by amy
  47468. +#endif
  47469. + if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
  47470. + dev_kfree_skb_any(skb);
  47471. + }
  47472. + }else {
  47473. + priv->stats.rxurberr++;
  47474. + printk("URB Error flen:%d actual_length:%d\n", flen , rx_urb->actual_length);
  47475. + dev_kfree_skb_any(skb);
  47476. + }
  47477. + } else {
  47478. + stats.nic_type = NIC_8187;
  47479. + len = rx_urb->actual_length;
  47480. + len -= sizeof (struct rx_desc_rtl8187);
  47481. + desc = (union rx_desc *)(rx_urb->transfer_buffer + len);
  47482. + flen = desc->desc_87.rxlen ;
  47483. +
  47484. + if(flen <= rx_urb->actual_length){
  47485. + stats.signal = desc->desc_87.rssi;
  47486. + stats.noise = desc->desc_87.sq;
  47487. + stats.rate = desc->desc_87.rxrate;
  47488. + stats.mac_time[0] = desc->desc_87.tsftl;
  47489. + stats.mac_time[1] = desc->desc_87.tsfth;
  47490. + SignalStrength = (desc->desc_87.agc&0xfe) >> 1;
  47491. + if( ((stats.rate <= 22) && (stats.rate != 12) && (stats.rate != 18)) || (stats.rate == 44) )//need to translate to real rate here
  47492. + bCckRate= TRUE;
  47493. + if (!bCckRate)
  47494. + {
  47495. + if (SignalStrength > 90) SignalStrength = 90;
  47496. + else if (SignalStrength < 25) SignalStrength = 25;
  47497. + SignalStrength = ((90 - SignalStrength)*100)/65;
  47498. + }
  47499. + else
  47500. + {
  47501. + if (SignalStrength >95) SignalStrength = 95;
  47502. + else if (SignalStrength < 30) SignalStrength = 30;
  47503. + SignalStrength = ((95 - SignalStrength)*100)/65;
  47504. + }
  47505. + stats.signalstrength = (u8)SignalStrength;
  47506. +
  47507. + skb_put(skb,flen-4);
  47508. +
  47509. + priv->stats.rxok++;
  47510. +
  47511. + if(!ieee80211_rx(priv->ieee80211,skb, &stats))
  47512. + dev_kfree_skb_any(skb);
  47513. +
  47514. +
  47515. + }else {
  47516. + priv->stats.rxurberr++;
  47517. + printk("URB Error flen:%d actual_length:%d\n", flen , rx_urb->actual_length);
  47518. + dev_kfree_skb_any(skb);
  47519. + }
  47520. + }
  47521. + }else{
  47522. +
  47523. + //printk("RX Status Error!\n");
  47524. + priv->stats.rxstaterr++;
  47525. + priv->ieee80211->stats.rx_errors++;
  47526. + dev_kfree_skb_any(skb);
  47527. +
  47528. + }
  47529. +
  47530. + rx_urb->transfer_buffer = skb2->data;
  47531. +
  47532. + priv->pp_rxskb[*prx_inx] = skb2;
  47533. + }
  47534. +
  47535. + if(status != -ENOENT ){
  47536. + rtl8187_rx_urbsubmit(dev,rx_urb);
  47537. + } else {
  47538. + priv->pp_rxskb[*prx_inx] = NULL;
  47539. + dev_kfree_skb_any(skb2);
  47540. + //printk("RX process %d aborted due to explicit shutdown (%x)(%d)\n ", *prx_inx, status, status);
  47541. + }
  47542. +
  47543. + if (*prx_inx == (MAX_RX_URB -1))
  47544. + *prx_inx = 0;
  47545. + else
  47546. + *prx_inx = *prx_inx + 1;
  47547. +}
  47548. +#endif
  47549. +
  47550. +#ifdef THOMAS_TASKLET
  47551. +void rtl8180_irq_rx_tasklet_new(struct r8180_priv *priv){
  47552. + unsigned long flags;
  47553. + while( atomic_read( &priv->irt_counter ) ){
  47554. + spin_lock_irqsave(&priv->irq_lock,flags);//added by thomas
  47555. + rtl8180_irq_rx_tasklet(priv);
  47556. + spin_unlock_irqrestore(&priv->irq_lock,flags);//added by thomas
  47557. + if(atomic_read(&priv->irt_counter) >= 1)
  47558. + atomic_dec( &priv->irt_counter );
  47559. + }
  47560. +}
  47561. +#endif
  47562. +/****************************************************************************
  47563. + ---------------------------- USB_STUFF---------------------------
  47564. +*****************************************************************************/
  47565. +
  47566. +static const struct net_device_ops rtl8187_netdev_ops = {
  47567. + .ndo_open = rtl8180_open,
  47568. + .ndo_stop = rtl8180_close,
  47569. + .ndo_tx_timeout = tx_timeout,
  47570. + .ndo_do_ioctl = rtl8180_ioctl,
  47571. + .ndo_set_multicast_list = r8180_set_multicast,
  47572. + .ndo_set_mac_address = r8180_set_mac_adr,
  47573. + .ndo_validate_addr = eth_validate_addr,
  47574. + .ndo_change_mtu = eth_change_mtu,
  47575. + .ndo_start_xmit = ieee80211_xmit,
  47576. + .ndo_get_stats = rtl8180_stats,
  47577. +};
  47578. +
  47579. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47580. +static int __devinit rtl8187_usb_probe(struct usb_interface *intf,
  47581. + const struct usb_device_id *id)
  47582. +#else
  47583. +static void * __devinit rtl8187_usb_probe(struct usb_device *udev,
  47584. + unsigned int ifnum,
  47585. + const struct usb_device_id *id)
  47586. +#endif
  47587. +{
  47588. + struct net_device *dev = NULL;
  47589. + struct r8180_priv *priv= NULL;
  47590. +
  47591. +
  47592. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47593. + struct usb_device *udev = interface_to_usbdev(intf);
  47594. +#endif
  47595. +
  47596. + dev = alloc_ieee80211(sizeof(struct r8180_priv));
  47597. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
  47598. + SET_MODULE_OWNER(dev);
  47599. +#endif
  47600. +
  47601. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47602. + usb_set_intfdata(intf, dev);
  47603. + SET_NETDEV_DEV(dev, &intf->dev);
  47604. +#endif
  47605. + priv = ieee80211_priv(dev);
  47606. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47607. + priv->ieee80211 = netdev_priv(dev);
  47608. +#else
  47609. + priv->ieee80211 = (struct net_device *)dev->priv;
  47610. +#endif
  47611. + priv->udev=udev;
  47612. +#ifdef CPU_64BIT
  47613. + priv->usb_buf = kmalloc(0x200, GFP_KERNEL);
  47614. + priv->usb_pool = dma_pool_create("rtl8187b", NULL, 64, 64, 0);
  47615. +#endif
  47616. +//lzm add for write time out test
  47617. +#ifdef DEBUG_RW_REGISTER
  47618. + {
  47619. + int reg_index = 0;
  47620. + for(reg_index = 0; reg_index <= 199; reg_index++)
  47621. + {
  47622. + priv->write_read_registers[reg_index].address = 0;
  47623. + priv->write_read_registers[reg_index].content = 0;
  47624. + priv->write_read_registers[reg_index].flag = 0;
  47625. + }
  47626. + priv->write_read_register_index = 0;
  47627. + }
  47628. +#endif
  47629. + //init netdev_ops, added by falcon....
  47630. + dev->netdev_ops = &rtl8187_netdev_ops;
  47631. +
  47632. + dev->wireless_handlers = &r8180_wx_handlers_def;
  47633. +#if WIRELESS_EXT >= 12
  47634. +#if WIRELESS_EXT < 17
  47635. + dev->get_wireless_stats = r8180_get_wireless_stats;
  47636. +#endif
  47637. + dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
  47638. +#endif
  47639. +
  47640. + dev->type=ARPHRD_ETHER;
  47641. + dev->watchdog_timeo = HZ*3; //modified by john, 0805
  47642. +
  47643. + if (dev_alloc_name(dev, ifname) < 0){
  47644. + DMESG("Oops: devname already taken! Trying wlan%%d...\n");
  47645. + ifname = "wlan%d";
  47646. + dev_alloc_name(dev, ifname);
  47647. + }
  47648. +
  47649. + if(rtl8180_init(dev)!=0){
  47650. + DMESG("Initialization failed");
  47651. + goto fail;
  47652. + }
  47653. +
  47654. + netif_carrier_off(dev);
  47655. + netif_stop_queue(dev);
  47656. +
  47657. + register_netdev(dev);
  47658. +
  47659. + rtl8180_proc_init_one(dev);
  47660. +
  47661. +//by lizhaoming for Radio power on/off
  47662. +#ifdef POLLING_METHOD_FOR_RADIO
  47663. + if(priv->polling_timer_on == 0){//add for S3/S4
  47664. + gpio_change_polling((unsigned long)dev);
  47665. + }
  47666. +#endif
  47667. +
  47668. + DMESG("Driver probe completed");
  47669. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
  47670. + return dev;
  47671. +#else
  47672. + return 0;
  47673. +#endif
  47674. +
  47675. +
  47676. +fail:
  47677. + free_ieee80211(dev);
  47678. +
  47679. + DMESG("wlan driver load failed\n");
  47680. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
  47681. + return NULL;
  47682. +#else
  47683. + return -ENODEV;
  47684. +#endif
  47685. +
  47686. +}
  47687. +
  47688. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47689. +static void __devexit rtl8187_usb_disconnect(struct usb_interface *intf)
  47690. +#else
  47691. +static void __devexit rtl8187_usb_disconnect(struct usb_device *udev, void *ptr)
  47692. +#endif
  47693. +{
  47694. + struct r8180_priv *priv = NULL;
  47695. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  47696. + struct net_device *dev = usb_get_intfdata(intf);
  47697. +#else
  47698. + struct net_device *dev = (struct net_device *)ptr;
  47699. +#endif
  47700. + if(dev){
  47701. + unregister_netdev(dev);
  47702. +
  47703. + priv=ieee80211_priv(dev);
  47704. +
  47705. +//add for RF power on power off by lizhaoming 080512
  47706. +#ifdef POLLING_METHOD_FOR_RADIO
  47707. + del_timer_sync(&priv->gpio_polling_timer);
  47708. + cancel_delayed_work(&priv->ieee80211->GPIOChangeRFWorkItem);
  47709. + priv->polling_timer_on = 0;//add for S3/S4
  47710. +#endif
  47711. + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
  47712. +
  47713. +#ifdef _RTL8187_EXT_PATCH_
  47714. + if(priv && priv->mshobj)
  47715. + {
  47716. + if(priv->mshobj->ext_patch_remove_proc)
  47717. + priv->mshobj->ext_patch_remove_proc(priv);
  47718. + priv->ieee80211->ext_patch_ieee80211_start_protocol = 0;
  47719. + priv->ieee80211->ext_patch_ieee80211_stop_protocol = 0;
  47720. + priv->ieee80211->ext_patch_ieee80211_probe_req_1 = 0;
  47721. + priv->ieee80211->ext_patch_ieee80211_probe_req_2 = 0;
  47722. + priv->ieee80211->ext_patch_ieee80211_association_req_1 = 0;
  47723. + priv->ieee80211->ext_patch_ieee80211_association_req_2 = 0;
  47724. + priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_1 = 0;
  47725. + priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_2 = 0;
  47726. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_auth =0;
  47727. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_deauth =0;
  47728. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req = 0;
  47729. + priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp = 0;
  47730. + priv->ieee80211->ext_patch_ieee80211_ext_stop_scan_wq_set_channel = 0;
  47731. + priv->ieee80211->ext_patch_ieee80211_process_probe_response_1 = 0;
  47732. + priv->ieee80211->ext_patch_ieee80211_rx_mgt_on_probe_req = 0;
  47733. + priv->ieee80211->ext_patch_ieee80211_rx_mgt_update_expire = 0;
  47734. + priv->ieee80211->ext_patch_ieee80211_rx_on_rx = 0;
  47735. + priv->ieee80211->ext_patch_get_beacon_get_probersp = 0;
  47736. + priv->ieee80211->ext_patch_ieee80211_xmit = 0;
  47737. + priv->ieee80211->ext_patch_ieee80211_rx_frame_get_hdrlen = 0;
  47738. + priv->ieee80211->ext_patch_ieee80211_rx_is_valid_framectl = 0;
  47739. + priv->ieee80211->ext_patch_ieee80211_rx_process_dataframe = 0;
  47740. + // priv->ieee80211->ext_patch_is_duplicate_packet = 0;
  47741. + priv->ieee80211->ext_patch_ieee80211_softmac_xmit_get_rate = 0;
  47742. + free_mshobj(&priv->mshobj);
  47743. + }
  47744. +#endif // _RTL8187_EXT_PATCH_
  47745. +
  47746. + rtl8180_proc_remove_one(dev);
  47747. +
  47748. + rtl8180_down(dev);
  47749. + priv->rf_close(dev);
  47750. +
  47751. + //rtl8180_rtx_disable(dev);
  47752. + rtl8187_usb_deleteendpoints(dev);
  47753. +#ifdef LED
  47754. + DeInitSwLeds(dev);
  47755. +#endif
  47756. + rtl8180_irq_disable(dev);
  47757. + rtl8180_reset(dev);
  47758. + mdelay(10);
  47759. +
  47760. + }
  47761. +
  47762. +#ifdef CPU_64BIT
  47763. + if(priv->usb_buf)
  47764. + kfree(priv->usb_buf);
  47765. + if(priv->usb_pool) {
  47766. + dma_pool_destroy(priv->usb_pool);
  47767. + priv->usb_pool = NULL;
  47768. + }
  47769. +#endif
  47770. + free_ieee80211(dev);
  47771. + DMESG("wlan driver removed");
  47772. +}
  47773. +
  47774. +/* fun with the built-in ieee80211 stack... */
  47775. +extern int ieee80211_crypto_init(void);
  47776. +extern void ieee80211_crypto_deinit(void);
  47777. +extern int ieee80211_crypto_tkip_init(void);
  47778. +extern void ieee80211_crypto_tkip_exit(void);
  47779. +extern int ieee80211_crypto_ccmp_init(void);
  47780. +extern void ieee80211_crypto_ccmp_exit(void);
  47781. +extern int ieee80211_crypto_wep_init(void);
  47782. +extern void ieee80211_crypto_wep_exit(void);
  47783. +
  47784. +static int __init rtl8187_usb_module_init(void)
  47785. +{
  47786. + int ret;
  47787. +
  47788. + ret = ieee80211_crypto_init();
  47789. + if (ret) {
  47790. + printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
  47791. + return ret;
  47792. + }
  47793. + ret = ieee80211_crypto_tkip_init();
  47794. + if (ret) {
  47795. + printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
  47796. + return ret;
  47797. + }
  47798. + ret = ieee80211_crypto_ccmp_init();
  47799. + if (ret) {
  47800. + printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
  47801. + return ret;
  47802. + }
  47803. + ret = ieee80211_crypto_wep_init();
  47804. + if (ret) {
  47805. + printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
  47806. + return ret;
  47807. + }
  47808. +
  47809. + printk("\nLinux kernel driver for RTL8187/RTL8187B based WLAN cards\n");
  47810. + printk("Copyright (c) 2004-2008, Realsil Wlan\n");
  47811. + DMESG("Initializing module");
  47812. + DMESG("Wireless extensions version %d", WIRELESS_EXT);
  47813. + rtl8180_proc_module_init();
  47814. + return usb_register(&rtl8187_usb_driver);
  47815. +}
  47816. +
  47817. +
  47818. +static void __exit rtl8187_usb_module_exit(void)
  47819. +{
  47820. + usb_deregister(&rtl8187_usb_driver);
  47821. + rtl8180_proc_module_remove();
  47822. + ieee80211_crypto_tkip_exit();
  47823. + ieee80211_crypto_ccmp_exit();
  47824. + ieee80211_crypto_wep_exit();
  47825. + ieee80211_crypto_deinit();
  47826. +
  47827. + DMESG("Exiting\n");
  47828. +}
  47829. +
  47830. +
  47831. +void rtl8180_try_wake_queue(struct net_device *dev, int pri)
  47832. +{
  47833. + unsigned long flags;
  47834. + short enough_desc;
  47835. + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
  47836. +
  47837. + spin_lock_irqsave(&priv->tx_lock,flags);
  47838. + enough_desc = check_nic_enought_desc(dev,pri);
  47839. + spin_unlock_irqrestore(&priv->tx_lock,flags);
  47840. +
  47841. + if(enough_desc)
  47842. + ieee80211_wake_queue(priv->ieee80211);
  47843. +}
  47844. +
  47845. +#ifdef JOHN_HWSEC
  47846. +void EnableHWSecurityConfig8187(struct net_device *dev)
  47847. +{
  47848. + u8 SECR_value = 0x0;
  47849. + SECR_value = SCR_TxSecEnable | SCR_RxSecEnable;
  47850. + {
  47851. + write_nic_byte(dev, WPA_CONFIG, 0x7);//SECR_value | SCR_UseDK );
  47852. + }
  47853. +}
  47854. +
  47855. +void setKey(struct net_device *dev,
  47856. + u8 EntryNo,
  47857. + u8 KeyIndex,
  47858. + u16 KeyType,
  47859. + u8 *MacAddr,
  47860. + u8 DefaultKey,
  47861. + u32 *KeyContent )
  47862. +{
  47863. + u32 TargetCommand = 0;
  47864. + u32 TargetContent = 0;
  47865. + u16 usConfig = 0;
  47866. + int i;
  47867. + usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
  47868. +
  47869. +
  47870. + for(i=0 ; i<6 ; i++){
  47871. + TargetCommand = i+6*EntryNo;
  47872. + TargetCommand |= BIT31|BIT16;
  47873. +
  47874. + if(i==0){//MAC|Config
  47875. + TargetContent = (u32)(*(MacAddr+0)) << 16|
  47876. + (u32)(*(MacAddr+1)) << 24|
  47877. + (u32)usConfig;
  47878. +
  47879. + write_nic_dword(dev, WCAMI, TargetContent);
  47880. + write_nic_dword(dev, RWCAM, TargetCommand);
  47881. + //printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
  47882. + } else if(i==1){//MAC
  47883. + TargetContent = (u32)(*(MacAddr+2)) |
  47884. + (u32)(*(MacAddr+3)) << 8|
  47885. + (u32)(*(MacAddr+4)) << 16|
  47886. + (u32)(*(MacAddr+5)) << 24;
  47887. + write_nic_dword(dev, WCAMI, TargetContent);
  47888. + write_nic_dword(dev, RWCAM, TargetCommand);
  47889. + } else { //Key Material
  47890. + write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
  47891. + write_nic_dword(dev, RWCAM, TargetCommand);
  47892. + }
  47893. + }
  47894. +
  47895. +}
  47896. +#endif
  47897. +
  47898. +/****************************************************************************
  47899. + --------------------------- RF power on/power off -----------------
  47900. +*****************************************************************************/
  47901. +
  47902. +#ifdef POLLING_METHOD_FOR_RADIO
  47903. +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
  47904. +void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
  47905. +{
  47906. + //struct delayed_work *dwork = container_of(work, struct delayed_work, work);
  47907. + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
  47908. + struct net_device *dev = ieee->dev;
  47909. + struct r8180_priv *priv = ieee80211_priv(dev);
  47910. +#else
  47911. +void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
  47912. +{
  47913. + struct net_device *dev = ieee->dev;
  47914. + struct r8180_priv *priv = ieee80211_priv(dev);
  47915. +#endif
  47916. +
  47917. + //u16 tmp2byte;
  47918. + u8 tmp1byte;
  47919. + //u8 btPSR;
  47920. + //u8 btConfig0;
  47921. + RT_RF_POWER_STATE eRfPowerStateToSet;
  47922. + bool bActuallySet=false;
  47923. +
  47924. + char *argv[3];
  47925. + static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
  47926. + static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
  47927. +
  47928. +#if 0
  47929. + if(priv->up == 0)//driver stopped
  47930. + {
  47931. + printk("\nDo nothing...");
  47932. + goto out;
  47933. + }
  47934. + else
  47935. +#endif
  47936. + {
  47937. + // We should turn off LED before polling FF51[4].
  47938. +
  47939. + //Turn off LED.
  47940. + //btPSR = read_nic_byte(dev, PSR);
  47941. + //write_nic_byte(dev, PSR, (btPSR & ~BIT3));
  47942. +
  47943. + //It need to delay 4us suggested by Jong, 2008-01-16
  47944. + //udelay(4);
  47945. +
  47946. + //HW radio On/Off according to the value of FF51[4](config0)
  47947. + //btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
  47948. +
  47949. + //Turn on LED.
  47950. + //write_nic_byte(dev, PSR, btPSR| BIT3);
  47951. +
  47952. + //eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
  47953. +
  47954. + // Get RF power state to set.
  47955. + //if Driver isn't stopped, we poll GPIO1
  47956. +
  47957. + //set 0x91 B1= 0 // 1: for output enable; 0: otherwise.
  47958. + // (William says) Note that, it will cause unstable if we set output enable 1 but not to write it. Annie, 2005-12-12.
  47959. + tmp1byte = read_nic_byte(dev,GPE);
  47960. + if(priv->EEPROMSelectNewGPIO == true)
  47961. + tmp1byte &= ~BIT2;//for toshiba new GPIO use bit2
  47962. + else
  47963. + tmp1byte &= ~BIT1;
  47964. +
  47965. + write_nic_byte(dev,GPE,tmp1byte);
  47966. +
  47967. + //read 0x92 B1(read GPIO1)
  47968. + tmp1byte = read_nic_byte(dev,GPI);
  47969. +
  47970. + //turn on or trun off RF according to the value of GPIO1
  47971. + if(priv->EEPROMSelectNewGPIO == true)
  47972. + eRfPowerStateToSet = (tmp1byte&BIT2) ? eRfOn : eRfOff;
  47973. + else
  47974. + eRfPowerStateToSet = (tmp1byte&BIT1) ? eRfOn : eRfOff;
  47975. +
  47976. + if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)){
  47977. + priv->ieee80211->bHwRadioOff = false;
  47978. + bActuallySet = true;
  47979. + }else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)){
  47980. + priv->ieee80211->bHwRadioOff = true;
  47981. + bActuallySet = true;
  47982. + }
  47983. +
  47984. + //if(priv->wlan_first_up_flag1 == 0){
  47985. + // bActuallySet = true;
  47986. + // priv->wlan_first_up_flag1 = 1;
  47987. + //}
  47988. +
  47989. + if(bActuallySet)
  47990. + {
  47991. + //printk("GPIO1:%x,eRfPowerStateToSet: %x, bHwRadioOff:%x\n",
  47992. + // tmp1byte,eRfPowerStateToSet,priv->ieee80211->bHwRadioOff);
  47993. +
  47994. + //GPIO Polling Methord Made Radio On/Off
  47995. + DMESG("GPIO Polling Methord Will Turn Radio %s",
  47996. + (priv->ieee80211->bHwRadioOff == true) ? "Off" : "On");
  47997. +
  47998. +#ifdef LED //by lizhaoming
  47999. + if(priv->ieee80211->bHwRadioOff == true){
  48000. + priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_OFF);
  48001. + }else{
  48002. + if(priv->up == 1){
  48003. + priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_ON);
  48004. + }
  48005. + }
  48006. +#endif
  48007. +
  48008. + MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
  48009. +
  48010. + /* To update the UI status for Power status changed */
  48011. + if(priv->ieee80211->bHwRadioOff == true)
  48012. + argv[1] = "RFOFF";
  48013. + else{
  48014. + //if(priv->eInactivePowerState != eRfOff)
  48015. + argv[1] = "RFON";
  48016. + //else
  48017. + // argv[1] = "RFOFF";
  48018. + }
  48019. + argv[0] = RadioPowerPath;
  48020. + argv[2] = NULL;
  48021. +
  48022. + call_usermodehelper(RadioPowerPath,argv,envp,1);
  48023. + }
  48024. +
  48025. + }
  48026. +}
  48027. +void gpio_change_polling(unsigned long data)
  48028. +{
  48029. + struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
  48030. + //struct net_device* dev = (struct net_device*)data;
  48031. +
  48032. + priv->polling_timer_on = 1;//add for S3/S4
  48033. +
  48034. + if(priv->driver_upping == 0){
  48035. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  48036. + queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,0);
  48037. +#else
  48038. + queue_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem);
  48039. +#endif
  48040. + }
  48041. +
  48042. + mod_timer(&priv->gpio_polling_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
  48043. +}
  48044. +#endif
  48045. +
  48046. +/***************************************************************************
  48047. + ------------------- module init / exit stubs ----------------
  48048. +****************************************************************************/
  48049. +module_init(rtl8187_usb_module_init);
  48050. +module_exit(rtl8187_usb_module_exit);
  48051. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187.h
  48052. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187.h 1970-01-01 01:00:00.000000000 +0100
  48053. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187.h 2009-08-23 19:01:04.000000000 +0200
  48054. @@ -0,0 +1,816 @@
  48055. +/*
  48056. + This is part of rtl8187 OpenSource driver.
  48057. + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
  48058. + Released under the terms of GPL (General Public Licence)
  48059. +
  48060. + Parts of this driver are based on the GPL part of the
  48061. + official realtek driver
  48062. +
  48063. + Parts of this driver are based on the rtl8180 driver skeleton
  48064. + from Patric Schenke & Andres Salomon
  48065. +
  48066. + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
  48067. +
  48068. + We want to tanks the Authors of those projects and the Ndiswrapper
  48069. + project Authors.
  48070. +*/
  48071. +
  48072. +#ifndef R8180H
  48073. +#define R8180H
  48074. +
  48075. +
  48076. +#define RTL8187_MODULE_NAME "rtl8187"
  48077. +#define DMESG(x,a...) printk(KERN_INFO RTL8187_MODULE_NAME ": " x "\n", ## a)
  48078. +#define DMESGW(x,a...) printk(KERN_WARNING RTL8187_MODULE_NAME ": WW:" x "\n", ## a)
  48079. +#define DMESGE(x,a...) printk(KERN_WARNING RTL8187_MODULE_NAME ": EE:" x "\n", ## a)
  48080. +
  48081. +#include <linux/module.h>
  48082. +#include <linux/kernel.h>
  48083. +//#include <linux/config.h>
  48084. +#include <linux/init.h>
  48085. +#include <linux/ioport.h>
  48086. +#include <linux/sched.h>
  48087. +#include <linux/types.h>
  48088. +#include <linux/slab.h>
  48089. +#include <linux/netdevice.h>
  48090. +//#include <linux/pci.h>
  48091. +#include <linux/usb.h>
  48092. +#include <linux/etherdevice.h>
  48093. +#include <linux/delay.h>
  48094. +#include <linux/rtnetlink.h> //for rtnl_lock()
  48095. +#include <linux/wireless.h>
  48096. +#include <linux/timer.h>
  48097. +#include <linux/proc_fs.h> // Necessary because we use the proc fs
  48098. +#include <linux/if_arp.h>
  48099. +#include <linux/random.h>
  48100. +#include <linux/version.h>
  48101. +#include <asm/io.h>
  48102. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
  48103. +#include <asm/semaphore.h>
  48104. +#endif
  48105. +#include "ieee80211/ieee80211.h"
  48106. +#ifdef _RTL8187_EXT_PATCH_
  48107. +#include "msh_class.h"
  48108. +#endif
  48109. +#ifdef LED
  48110. +#include "r8187_led.h"
  48111. +#endif
  48112. +
  48113. +//added for HW security, john.0629
  48114. +#define FALSE 0
  48115. +#define TRUE 1
  48116. +#define MAX_KEY_LEN 61
  48117. +#define KEY_BUF_SIZE 5
  48118. +
  48119. +#define BIT0 0x00000001
  48120. +#define BIT1 0x00000002
  48121. +#define BIT2 0x00000004
  48122. +#define BIT3 0x00000008
  48123. +#define BIT4 0x00000010
  48124. +#define BIT5 0x00000020
  48125. +#define BIT6 0x00000040
  48126. +#define BIT7 0x00000080
  48127. +#define BIT8 0x00000100
  48128. +#define BIT9 0x00000200
  48129. +#define BIT10 0x00000400
  48130. +#define BIT11 0x00000800
  48131. +#define BIT12 0x00001000
  48132. +#define BIT13 0x00002000
  48133. +#define BIT14 0x00004000
  48134. +#define BIT15 0x00008000
  48135. +#define BIT16 0x00010000
  48136. +#define BIT17 0x00020000
  48137. +#define BIT18 0x00040000
  48138. +#define BIT19 0x00080000
  48139. +#define BIT20 0x00100000
  48140. +#define BIT21 0x00200000
  48141. +#define BIT22 0x00400000
  48142. +#define BIT23 0x00800000
  48143. +#define BIT24 0x01000000
  48144. +#define BIT25 0x02000000
  48145. +#define BIT26 0x04000000
  48146. +#define BIT27 0x08000000
  48147. +#define BIT28 0x10000000
  48148. +#define BIT29 0x20000000
  48149. +#define BIT30 0x40000000
  48150. +#define BIT31 0x80000000
  48151. +
  48152. +//8187B Security
  48153. +#define RWCAM 0xA0 // Software read/write CAM config
  48154. +#define WCAMI 0xA4 // Software write CAM input content
  48155. +#define RCAMO 0xA8 // Output value from CAM according to 0xa0 setting
  48156. +#define DCAM 0xAC // Debug CAM Interface
  48157. +#define SECR 0xB0 // Security configuration register
  48158. +#define AESMSK_FC 0xB2 // AES Mask register for frame control (0xB2~0xB3). Added by Annie, 2006-03-06.
  48159. +#define AESMSK_SC 0x1FC // AES Mask for Sequence Control (0x1FC~0X1FD). Added by Annie, 2006-03-06.
  48160. +#define AESMSK_QC 0x1CE // AES Mask register for QoS Control when computing AES MIC, default = 0x000F. (2 bytes)
  48161. +
  48162. +#define AESMSK_FC_DEFAULT 0xC78F // default value of AES MASK for Frame Control Field. (2 bytes)
  48163. +#define AESMSK_SC_DEFAULT 0x000F // default value of AES MASK for Sequence Control Field. (2 bytes)
  48164. +#define AESMSK_QC_DEFAULT 0x000F // default value of AES MASK for QoS Control Field. (2 bytes)
  48165. +
  48166. +#define CAM_CONTENT_COUNT 6
  48167. +#define CFG_DEFAULT_KEY BIT5
  48168. +#define CFG_VALID BIT15
  48169. +
  48170. +//----------------------------------------------------------------------------
  48171. +// 8187B WPA Config Register (offset 0xb0, 1 byte)
  48172. +//----------------------------------------------------------------------------
  48173. +#define SCR_UseDK 0x01
  48174. +#define SCR_TxSecEnable 0x02
  48175. +#define SCR_RxSecEnable 0x04
  48176. +
  48177. +//----------------------------------------------------------------------------
  48178. +// 8187B CAM Config Setting (offset 0xb0, 1 byte)
  48179. +//----------------------------------------------------------------------------
  48180. +#define CAM_VALID 0x8000
  48181. +#define CAM_NOTVALID 0x0000
  48182. +#define CAM_USEDK 0x0020
  48183. +
  48184. +
  48185. +#define CAM_NONE 0x0
  48186. +#define CAM_WEP40 0x01
  48187. +#define CAM_TKIP 0x02
  48188. +#define CAM_AES 0x04
  48189. +#define CAM_WEP104 0x05
  48190. +
  48191. +
  48192. +//#define CAM_SIZE 16
  48193. +#define TOTAL_CAM_ENTRY 16
  48194. +#define CAM_ENTRY_LEN_IN_DW 6 // 6, unit: in u4byte. Added by Annie, 2006-05-25.
  48195. +#define CAM_ENTRY_LEN_IN_BYTE (CAM_ENTRY_LEN_IN_DW*sizeof(u4Byte)) // 24, unit: in u1byte. Added by Annie, 2006-05-25.
  48196. +
  48197. +#define CAM_CONFIG_USEDK 1
  48198. +#define CAM_CONFIG_NO_USEDK 0
  48199. +
  48200. +#define CAM_WRITE 0x00010000
  48201. +#define CAM_READ 0x00000000
  48202. +#define CAM_POLLINIG 0x80000000
  48203. +
  48204. +//=================================================================
  48205. +//=================================================================
  48206. +
  48207. +#define EPROM_93c46 0
  48208. +#define EPROM_93c56 1
  48209. +
  48210. +#define DEFAULT_FRAG_THRESHOLD 2342U
  48211. +#define MIN_FRAG_THRESHOLD 256U
  48212. +#define DEFAULT_BEACONINTERVAL 0x64U
  48213. +#define DEFAULT_BEACON_ESSID "Rtl8187"
  48214. +
  48215. +#define DEFAULT_SSID ""
  48216. +#define DEFAULT_RETRY_RTS 7
  48217. +#define DEFAULT_RETRY_DATA 7
  48218. +#define PRISM_HDR_SIZE 64
  48219. +
  48220. +typedef enum _WIRELESS_MODE {
  48221. + WIRELESS_MODE_UNKNOWN = 0x00,
  48222. + WIRELESS_MODE_A = 0x01,
  48223. + WIRELESS_MODE_B = 0x02,
  48224. + WIRELESS_MODE_G = 0x04,
  48225. + WIRELESS_MODE_AUTO = 0x08,
  48226. +} WIRELESS_MODE;
  48227. +
  48228. +typedef enum _TR_SWITCH_STATE{
  48229. + TR_HW_CONTROLLED = 0,
  48230. + TR_SW_TX = 1,
  48231. +}TR_SWITCH_STATE, *PTR_SWITCH_STATE;
  48232. +
  48233. +
  48234. +#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
  48235. +
  48236. +typedef struct buffer
  48237. +{
  48238. + struct buffer *next;
  48239. + u32 *buf;
  48240. +
  48241. +} buffer;
  48242. +
  48243. +typedef struct rtl_reg_debug{
  48244. + unsigned int cmd;
  48245. + struct {
  48246. + unsigned char type;
  48247. + unsigned char addr;
  48248. + unsigned char page;
  48249. + unsigned char length;
  48250. + } head;
  48251. + unsigned char buf[0xff];
  48252. +}rtl_reg_debug;
  48253. +typedef struct _CHANNEL_LIST{
  48254. + u8 Channel[MAX_CHANNEL_NUMBER + 1];
  48255. + u8 Len;
  48256. +}CHANNEL_LIST, *PCHANNEL_LIST;
  48257. +
  48258. +#define MAX_LD_SLOT_NUM 10
  48259. +#define DEFAULT_SLOT_NUM 2
  48260. +#define KEEP_ALIVE_INTERVAL 20 // in seconds.
  48261. +#define CHECK_FOR_HANG_PERIOD 2 //be equal to watchdog check time
  48262. +#define DEFAULT_KEEP_ALIVE_LEVEL 1
  48263. +
  48264. +typedef struct _link_detect_t
  48265. +{
  48266. + u32 RxFrameNum[MAX_LD_SLOT_NUM]; // number of Rx Frame / CheckForHang_period to determine link status
  48267. + u16 SlotNum; // number of CheckForHang period to determine link status, default is 2
  48268. + u16 SlotIndex;
  48269. +
  48270. + u32 NumTxOkInPeriod; //number of packet transmitted during CheckForHang
  48271. + u32 NumRxOkInPeriod; //number of packet received during CheckForHang
  48272. +
  48273. + u8 IdleCount; // (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)
  48274. + u32 LastNumTxUnicast;
  48275. + u32 LastNumRxUnicast;
  48276. +
  48277. + bool bBusyTraffic; //when it is set to 1, UI cann't scan at will.
  48278. +}link_detect_t, *plink_detect_t;
  48279. +
  48280. +#if 0
  48281. +
  48282. +typedef struct tx_pendingbuf
  48283. +{
  48284. + struct ieee80211_txb *txb;
  48285. + short ispending;
  48286. + short descfrag;
  48287. +} tx_pendigbuf;
  48288. +
  48289. +#endif
  48290. +
  48291. +typedef struct Stats
  48292. +{
  48293. + unsigned long txrdu;
  48294. +// unsigned long rxrdu;
  48295. + //unsigned long rxnolast;
  48296. + //unsigned long rxnodata;
  48297. +// unsigned long rxreset;
  48298. +// unsigned long rxwrkaround;
  48299. +// unsigned long rxnopointer;
  48300. + unsigned long rxok;
  48301. + unsigned long rxurberr;
  48302. + unsigned long rxstaterr;
  48303. + unsigned long txnperr;
  48304. + unsigned long txnpdrop;
  48305. + unsigned long txresumed;
  48306. +// unsigned long rxerr;
  48307. +// unsigned long rxoverflow;
  48308. +// unsigned long rxint;
  48309. + unsigned long txnpokint;
  48310. +// unsigned long txhpokint;
  48311. +// unsigned long txhperr;
  48312. +// unsigned long ints;
  48313. +// unsigned long shints;
  48314. + unsigned long txoverflow;
  48315. +// unsigned long rxdmafail;
  48316. +// unsigned long txbeacon;
  48317. +// unsigned long txbeaconerr;
  48318. + unsigned long txlpokint;
  48319. + unsigned long txlpdrop;
  48320. + unsigned long txlperr;
  48321. + unsigned long txbeokint;
  48322. + unsigned long txbedrop;
  48323. + unsigned long txbeerr;
  48324. + unsigned long txbkokint;
  48325. + unsigned long txbkdrop;
  48326. + unsigned long txbkerr;
  48327. + unsigned long txviokint;
  48328. + unsigned long txvidrop;
  48329. + unsigned long txvierr;
  48330. + unsigned long txvookint;
  48331. + unsigned long txvodrop;
  48332. + unsigned long txvoerr;
  48333. + unsigned long txbeaconokint;
  48334. + unsigned long txbeacondrop;
  48335. + unsigned long txbeaconerr;
  48336. + unsigned long txmanageokint;
  48337. + unsigned long txmanagedrop;
  48338. + unsigned long txmanageerr;
  48339. + unsigned long txdatapkt;
  48340. +} Stats;
  48341. +
  48342. +typedef struct ChnlAccessSetting {
  48343. + u16 SIFS_Timer;
  48344. + u16 DIFS_Timer;
  48345. + u16 SlotTimeTimer;
  48346. + u16 EIFS_Timer;
  48347. + u16 CWminIndex;
  48348. + u16 CWmaxIndex;
  48349. +}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
  48350. +
  48351. +
  48352. +typedef enum _RT_RF_POWER_STATE
  48353. +{
  48354. + eRfOn,
  48355. + eRfSleep,
  48356. + eRfOff
  48357. +}RT_RF_POWER_STATE;
  48358. +typedef enum _RT_PS_MODE
  48359. +{
  48360. + eActive, // Active/Continuous access.
  48361. + eMaxPs, // Max power save mode.
  48362. + eFastPs // Fast power save mode.
  48363. +}RT_PS_MODE;
  48364. +//
  48365. +// Three wire mode.
  48366. +//
  48367. +#define IC_DEFAULT_THREE_WIRE 0
  48368. +#define SW_THREE_WIRE 1
  48369. +//RTL818xB
  48370. +#define SW_THREE_WIRE_BY_8051 2
  48371. +#define HW_THREE_WIRE 3
  48372. +#define HW_THREE_WIRE_BY_8051 4
  48373. +//lzm add for write time out test
  48374. +typedef struct write_read_register
  48375. +{
  48376. + u32 address;
  48377. + u32 content;
  48378. + u32 flag;
  48379. +} write_read_register;
  48380. +//lzm add for write time out test
  48381. +typedef struct r8180_priv
  48382. +{
  48383. +//lzm add for write time out test
  48384. + struct write_read_register write_read_registers[200];
  48385. + u8 write_read_register_index;
  48386. +//lzm add for write time out test
  48387. +
  48388. + struct usb_device *udev;
  48389. + short epromtype;
  48390. + int irq;
  48391. + struct ieee80211_device *ieee80211;
  48392. +
  48393. + short card_8187; /* O: rtl8180, 1:rtl8185 V B/C, 2:rtl8185 V D */
  48394. + short card_8187_Bversion; /* if TCR reports card V B/C this discriminates */
  48395. + short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
  48396. + short enable_gpio0;
  48397. + enum card_type {PCI,MINIPCI,CARDBUS,USB/*rtl8187*/}card_type;
  48398. + short hw_plcp_len;
  48399. + short plcp_preamble_mode;
  48400. +
  48401. + spinlock_t irq_lock;
  48402. +// spinlock_t irq_th_lock;
  48403. + spinlock_t tx_lock;
  48404. +//by amy for ps
  48405. + spinlock_t rf_ps_lock;
  48406. +//by amy for ps
  48407. +
  48408. + u16 irq_mask;
  48409. +// short irq_enabled;
  48410. + struct net_device *dev;
  48411. + short chan;
  48412. + short sens;
  48413. + short max_sens;
  48414. + u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
  48415. + u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
  48416. + u8 cck_txpwr_base;
  48417. + u8 ofdm_txpwr_base;
  48418. + u8 challow[15]; //channels from 1 to 14, 0 not used
  48419. + short up;
  48420. + short crcmon; //if 1 allow bad crc frame reception in monitor mode
  48421. +// short prism_hdr;
  48422. +
  48423. +// struct timer_list scan_timer;
  48424. + /*short scanpending;
  48425. + short stopscan;*/
  48426. +// spinlock_t scan_lock;
  48427. +// u8 active_probe;
  48428. + //u8 active_scan_num;
  48429. + struct semaphore wx_sem;
  48430. + struct semaphore set_chan_sem;
  48431. +// short hw_wep;
  48432. +
  48433. +// short digphy;
  48434. +// short antb;
  48435. +// short diversity;
  48436. +// u8 cs_treshold;
  48437. +// short rcr_csense;
  48438. + short rf_chip;
  48439. +// u32 key0[4];
  48440. + short (*rf_set_sens)(struct net_device *dev,short sens);
  48441. + void (*rf_set_chan)(struct net_device *dev,short ch);
  48442. + void (*rf_close)(struct net_device *dev);
  48443. + void (*rf_init)(struct net_device *dev);
  48444. + //short rate;
  48445. + short promisc;
  48446. + /*stats*/
  48447. + struct Stats stats;
  48448. + struct _link_detect_t link_detect; //added on 1016.2008
  48449. + struct iw_statistics wstats;
  48450. + struct proc_dir_entry *dir_dev;
  48451. +
  48452. + /*RX stuff*/
  48453. +// u32 *rxring;
  48454. +// u32 *rxringtail;
  48455. +// dma_addr_t rxringdma;
  48456. + struct urb **rx_urb;
  48457. +#ifdef THOMAS_BEACON
  48458. + unsigned long *oldaddr; //lzm for 64bit CPU crash
  48459. +#endif
  48460. +
  48461. +#ifdef THOMAS_TASKLET
  48462. + atomic_t irt_counter;//count for irq_rx_tasklet
  48463. +#endif
  48464. +#ifdef JACKSON_NEW_RX
  48465. + struct sk_buff **pp_rxskb;
  48466. + int rx_inx;
  48467. +#endif
  48468. +
  48469. + short tx_urb_index;
  48470. +
  48471. + //struct buffer *rxbuffer;
  48472. + //struct buffer *rxbufferhead;
  48473. + //int rxringcount;
  48474. + //u16 rxbuffersize;
  48475. +
  48476. + //struct sk_buff *rx_skb;
  48477. +
  48478. + //short rx_skb_complete;
  48479. +
  48480. + //u32 rx_prevlen;
  48481. + //atomic_t tx_lp_pending;
  48482. + //atomic_t tx_np_pending;
  48483. + atomic_t tx_pending[0x10];//UART_PRIORITY+1
  48484. +
  48485. +#if 0
  48486. + /*TX stuff*/
  48487. + u32 *txlpring;
  48488. + u32 *txhpring;
  48489. + u32 *txnpring;
  48490. + dma_addr_t txlpringdma;
  48491. + dma_addr_t txhpringdma;
  48492. + dma_addr_t txnpringdma;
  48493. + u32 *txlpringtail;
  48494. + u32 *txhpringtail;
  48495. + u32 *txnpringtail;
  48496. + u32 *txlpringhead;
  48497. + u32 *txhpringhead;
  48498. + u32 *txnpringhead;
  48499. + struct buffer *txlpbufs;
  48500. + struct buffer *txhpbufs;
  48501. + struct buffer *txnpbufs;
  48502. + struct buffer *txlpbufstail;
  48503. + struct buffer *txhpbufstail;
  48504. + struct buffer *txnpbufstail;
  48505. + int txringcount;
  48506. + int txbuffsize;
  48507. +
  48508. + //struct tx_pendingbuf txnp_pending;
  48509. + struct tasklet_struct irq_tx_tasklet;
  48510. +#endif
  48511. + struct tasklet_struct irq_rx_tasklet;
  48512. + struct urb *rxurb_task;
  48513. +// u8 dma_poll_mask;
  48514. + //short tx_suspend;
  48515. +
  48516. + /* adhoc/master mode stuff */
  48517. +#if 0
  48518. + u32 *txbeacontail;
  48519. + dma_addr_t txbeaconringdma;
  48520. + u32 *txbeaconring;
  48521. + int txbeaconcount;
  48522. +#endif
  48523. +// struct ieee_tx_beacon *beacon_buf;
  48524. + //char *master_essid;
  48525. +// dma_addr_t beacondmabuf;
  48526. + //u16 master_beaconinterval;
  48527. +// u32 master_beaconsize;
  48528. + //u16 beacon_interval;
  48529. +
  48530. + //2 Tx Related variables
  48531. + u16 ShortRetryLimit;
  48532. + u16 LongRetryLimit;
  48533. + u32 TransmitConfig;
  48534. + u8 RegCWinMin; // For turbo mode CW adaptive. Added by Annie, 2005-10-27.
  48535. +
  48536. + //2 Rx Related variables
  48537. + u16 EarlyRxThreshold;
  48538. + u32 ReceiveConfig;
  48539. + u8 AcmControl;
  48540. +
  48541. + u8 RFProgType;
  48542. +
  48543. + u8 retry_data;
  48544. + u8 retry_rts;
  48545. + u16 rts;
  48546. +
  48547. +//by amy
  48548. + long LastSignalStrengthInPercent;
  48549. + long SignalStrength;
  48550. + long SignalQuality;
  48551. + u8 antenna_flag;
  48552. + bool flag_beacon;
  48553. +//by amy
  48554. +//by amy for rate adaptive
  48555. + struct timer_list rateadapter_timer;
  48556. + u16 LastRetryCnt;
  48557. + u16 LastRetryRate;
  48558. + unsigned long LastTxokCnt;
  48559. + unsigned long LastRxokCnt;
  48560. + u16 CurrRetryCnt;
  48561. + long RecvSignalPower;
  48562. + unsigned long LastTxOKBytes;
  48563. + u8 LastFailTxRate;
  48564. + long LastFailTxRateSS;
  48565. + u8 FailTxRateCount;
  48566. + u32 LastTxThroughput;
  48567. + unsigned long txokbytestotal;
  48568. + //for up rate
  48569. + unsigned short bTryuping;
  48570. + u8 CurrTxRate; //the rate before up
  48571. + u16 CurrRetryRate;
  48572. + u16 TryupingCount;
  48573. + u8 TryDownCountLowData;
  48574. + u8 TryupingCountNoData;
  48575. +
  48576. + u8 CurrentOperaRate;
  48577. +// by lizhaoming used for Radio on/off
  48578. +#ifdef POLLING_METHOD_FOR_RADIO
  48579. + struct timer_list gpio_polling_timer;
  48580. + u8 polling_timer_on;
  48581. + u8 wlan_first_up_flag1;
  48582. +#endif
  48583. +//by amy for rate adaptive
  48584. +//by amy for power save
  48585. + struct timer_list watch_dog_timer;
  48586. + bool bInactivePs;
  48587. + bool bSwRfProcessing;
  48588. + RT_RF_POWER_STATE eInactivePowerState;
  48589. + RT_RF_POWER_STATE eRFPowerState;
  48590. + u32 RfOffReason;
  48591. + bool RFChangeInProgress;
  48592. + bool bInHctTest;
  48593. + bool SetRFPowerStateInProgress;
  48594. + //u8 RFProgType;
  48595. + bool bLeisurePs;
  48596. + RT_PS_MODE dot11PowerSaveMode;
  48597. + u32 NumRxOkInPeriod;
  48598. + u32 NumTxOkInPeriod;
  48599. + u8 RegThreeWireMode;
  48600. + bool ps_mode;
  48601. +//by amy for power save
  48602. +//by amy for DIG
  48603. + bool bDigMechanism;
  48604. + bool bCCKThMechanism;
  48605. + u8 InitialGain;
  48606. + u8 StageCCKTh;
  48607. + u8 RegBModeGainStage;
  48608. + u8 RegDigOfdmFaUpTh; //added by david, 2008.3.6
  48609. + u8 DIG_NumberFallbackVote;
  48610. + u8 DIG_NumberUpgradeVote;
  48611. + u16 CCKUpperTh;
  48612. + u16 CCKLowerTh;
  48613. + u32 FalseAlarmRegValue; //added by david, 2008.3.6
  48614. +//by amy for DIG
  48615. +//{ added by david for high power, 2008.3.11
  48616. + int UndecoratedSmoothedSS;
  48617. + bool bRegHighPowerMechanism;
  48618. + bool bToUpdateTxPwr;
  48619. + u8 Z2HiPwrUpperTh;
  48620. + u8 Z2HiPwrLowerTh;
  48621. + u8 Z2RSSIHiPwrUpperTh;
  48622. + u8 Z2RSSIHiPwrLowerTh;
  48623. + // Current CCK RSSI value to determine CCK high power, asked by SD3 DZ, by Bruce, 2007-04-12.
  48624. + u8 CurCCKRSSI;
  48625. + bool bCurCCKPkt;
  48626. + u32 wMacRegRfPinsOutput;
  48627. + u32 wMacRegRfPinsSelect;
  48628. + TR_SWITCH_STATE TrSwitchState;
  48629. +//}
  48630. +//{added by david for radio on/off
  48631. + u8 radion;
  48632. +//}
  48633. + struct ChnlAccessSetting ChannelAccessSetting;
  48634. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
  48635. + struct work_struct reset_wq;
  48636. +#else
  48637. + struct tq_struct reset_wq;
  48638. +#endif
  48639. +
  48640. +#ifdef _RTL8187_EXT_PATCH_
  48641. + struct mshclass *mshobj;
  48642. +#endif
  48643. +
  48644. +#ifdef LED
  48645. + /* add for led controll */
  48646. + u8 EEPROMCustomerID;
  48647. + RT_CID_TYPE CustomerID;
  48648. + LED_8187 Gpio0Led;
  48649. + LED_8187 SwLed0;
  48650. + LED_8187 SwLed1;
  48651. + u8 bEnableLedCtrl;
  48652. + LED_STRATEGY_8187 LedStrategy;
  48653. + u8 PsrValue;
  48654. + struct work_struct Gpio0LedWorkItem;
  48655. + struct work_struct SwLed0WorkItem;
  48656. + struct work_struct SwLed1WorkItem;
  48657. +#endif
  48658. + u8 driver_upping;
  48659. +#ifdef CPU_64BIT
  48660. + u8 *usb_buf;
  48661. + struct dma_pool *usb_pool;
  48662. +#endif
  48663. +
  48664. +
  48665. +#ifdef SW_ANTE_DIVERSITY
  48666. +
  48667. +//#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  48668. +// struct delayed_work SwAntennaWorkItem;
  48669. +//#else
  48670. +// struct work_struct SwAntennaWorkItem;
  48671. +//#endif
  48672. +
  48673. + bool bAntennaDiversityTimerIssued;
  48674. + short antb;
  48675. + short diversity;
  48676. + bool AutoloadFailFlag;
  48677. + u16 EEPROMVersion;
  48678. + u8 EEPROMAntennaDiversity;
  48679. + u16 EEPROMCSThreshold;
  48680. + u8 EEPROMDefaultAntennaB;
  48681. + u8 EEPROMDigitalPhy;
  48682. + u32 EEPROMCSMethod;
  48683. + u8 EEPROMGEPRFOffState;
  48684. + // For HW antenna diversity, added by Roger, 2008.01.30.
  48685. + u32 AdMainAntennaRxOkCnt; // Main antenna Rx OK count.
  48686. + u32 AdAuxAntennaRxOkCnt; // Aux antenna Rx OK count.
  48687. + bool bHWAdSwitched; // TRUE if we has switched default antenna by HW evaluation.
  48688. + u8 EEPROMSwAntennaDiversity;
  48689. + bool EEPROMDefaultAntenna1;
  48690. + u8 RegSwAntennaDiversityMechanism;// 0:default from EEPROM, 1: disable, 2: enable.
  48691. + bool bSwAntennaDiverity;
  48692. + u8 RegDefaultAntenna;// 0: default from EEPROM, 1: main, 2: aux. Added by Roger, 2007.11.05.
  48693. + bool bDefaultAntenna1;
  48694. + //long SignalStrength;
  48695. + long Stats_SignalStrength;
  48696. + //long LastSignalStrengthInPercent; // In percentange, used for smoothing, e.g. Moving Average.
  48697. + //long SignalQuality; // in 0-100 index.
  48698. + long Stats_SignalQuality;
  48699. + //long RecvSignalPower; // in dBm.
  48700. + long Stats_RecvSignalPower;
  48701. + u8 LastRxPktAntenna; // +by amy 080312 Antenn which received the lasted packet. 0: Aux, 1:Main. Added by Roger, 2008.01.25.
  48702. + u32 AdRxOkCnt;
  48703. + long AdRxSignalStrength; // Rx signal strength for Antenna Diversity, which had been smoothing, its valid range is [0,100].
  48704. + u8 CurrAntennaIndex; // Index to current Antenna (both Tx and Rx).
  48705. + u8 AdTickCount; // Times of SwAntennaDiversityTimer happened.
  48706. + u8 AdCheckPeriod; // # of period SwAntennaDiversityTimer to check Rx signal strength for SW Antenna Diversity.
  48707. + u8 AdMinCheckPeriod; // Min value of AdCheckPeriod.
  48708. + u8 AdMaxCheckPeriod; // Max value of AdCheckPeriod.
  48709. + long AdRxSsThreshold; // Signal strength threshold to switch antenna.
  48710. + long AdMaxRxSsThreshold; // Max value of AdRxSsThreshold.
  48711. + bool bAdSwitchedChecking; // TRUE if we shall shall check Rx signal strength for last time switching antenna.
  48712. + long AdRxSsBeforeSwitched; // Rx signal strength before we swithed antenna.
  48713. + struct timer_list SwAntennaDiversityTimer;
  48714. +#endif
  48715. + u8 commit;
  48716. +
  48717. +//#ifdef ENABLE_DOT11D
  48718. + u8 channel_plan;
  48719. +//#endif
  48720. + u8 EEPROMSelectNewGPIO;
  48721. +}r8180_priv;
  48722. +
  48723. +// for rtl8187
  48724. +// now mirging to rtl8187B
  48725. +/*
  48726. +typedef enum{
  48727. + LOW_PRIORITY = 0x02,
  48728. + NORM_PRIORITY
  48729. + } priority_t;
  48730. +*/
  48731. +//for rtl8187B
  48732. +typedef enum{
  48733. + BULK_PRIORITY = 0x01,
  48734. + //RSVD0,
  48735. + //RSVD1,
  48736. + LOW_PRIORITY,
  48737. + NORM_PRIORITY,
  48738. + VO_PRIORITY,
  48739. + VI_PRIORITY, //0x05
  48740. + BE_PRIORITY,
  48741. + BK_PRIORITY,
  48742. + RSVD2,
  48743. + RSVD3,
  48744. + BEACON_PRIORITY, //0x0A
  48745. + HIGH_PRIORITY,
  48746. + MANAGE_PRIORITY,
  48747. + RSVD4,
  48748. + RSVD5,
  48749. + UART_PRIORITY //0x0F
  48750. +} priority_t;
  48751. +
  48752. +typedef enum{
  48753. + NIC_8187 = 1,
  48754. + NIC_8187B
  48755. + } nic_t;
  48756. +
  48757. +
  48758. +typedef u32 AC_CODING;
  48759. +#define AC0_BE 0 // ACI: 0x00 // Best Effort
  48760. +#define AC1_BK 1 // ACI: 0x01 // Background
  48761. +#define AC2_VI 2 // ACI: 0x10 // Video
  48762. +#define AC3_VO 3 // ACI: 0x11 // Voice
  48763. +#define AC_MAX 4 // Max: define total number; Should not to be used as a real enum.
  48764. +
  48765. +//
  48766. +// ECWmin/ECWmax field.
  48767. +// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
  48768. +//
  48769. +typedef union _ECW{
  48770. + u8 charData;
  48771. + struct
  48772. + {
  48773. + u8 ECWmin:4;
  48774. + u8 ECWmax:4;
  48775. + }f; // Field
  48776. +}ECW, *PECW;
  48777. +
  48778. +//
  48779. +// ACI/AIFSN Field.
  48780. +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
  48781. +//
  48782. +typedef union _ACI_AIFSN{
  48783. + u8 charData;
  48784. +
  48785. + struct
  48786. + {
  48787. + u8 AIFSN:4;
  48788. + u8 ACM:1;
  48789. + u8 ACI:2;
  48790. + u8 Reserved:1;
  48791. + }f; // Field
  48792. +}ACI_AIFSN, *PACI_AIFSN;
  48793. +
  48794. +//
  48795. +// AC Parameters Record Format.
  48796. +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
  48797. +//
  48798. +typedef union _AC_PARAM{
  48799. + u32 longData;
  48800. + u8 charData[4];
  48801. +
  48802. + struct
  48803. + {
  48804. + ACI_AIFSN AciAifsn;
  48805. + ECW Ecw;
  48806. + u16 TXOPLimit;
  48807. + }f; // Field
  48808. +}AC_PARAM, *PAC_PARAM;
  48809. +
  48810. +#ifdef JOHN_HWSEC
  48811. +struct ssid_thread {
  48812. + struct net_device *dev;
  48813. + u8 name[IW_ESSID_MAX_SIZE + 1];
  48814. +};
  48815. +#endif
  48816. +
  48817. +short rtl8180_tx(struct net_device *dev,u32* skbuf, int len,priority_t priority,short morefrag,short rate);
  48818. +
  48819. +#ifdef JOHN_TKIP
  48820. +u32 read_cam(struct net_device *dev, u8 addr);
  48821. +void write_cam(struct net_device *dev, u8 addr, u32 data);
  48822. +#endif
  48823. +u8 read_nic_byte(struct net_device *dev, int x);
  48824. +u8 read_nic_byte_E(struct net_device *dev, int x);
  48825. +u32 read_nic_dword(struct net_device *dev, int x);
  48826. +u16 read_nic_word(struct net_device *dev, int x) ;
  48827. +void write_nic_byte(struct net_device *dev, int x,u8 y);
  48828. +void write_nic_byte_E(struct net_device *dev, int x,u8 y);
  48829. +void write_nic_word(struct net_device *dev, int x,u16 y);
  48830. +void write_nic_dword(struct net_device *dev, int x,u32 y);
  48831. +void force_pci_posting(struct net_device *dev);
  48832. +
  48833. +void rtl8180_rtx_disable(struct net_device *);
  48834. +void rtl8180_rx_enable(struct net_device *);
  48835. +void rtl8180_tx_enable(struct net_device *);
  48836. +
  48837. +void rtl8180_disassociate(struct net_device *dev);
  48838. +//void fix_rx_fifo(struct net_device *dev);
  48839. +void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
  48840. +
  48841. +void rtl8180_set_anaparam(struct net_device *dev,u32 a);
  48842. +void rtl8185_set_anaparam2(struct net_device *dev,u32 a);
  48843. +void rtl8180_update_msr(struct net_device *dev);
  48844. +int rtl8180_down(struct net_device *dev);
  48845. +int rtl8180_up(struct net_device *dev);
  48846. +void rtl8180_commit(struct net_device *dev);
  48847. +void rtl8180_set_chan(struct net_device *dev,short ch);
  48848. +void write_phy(struct net_device *dev, u8 adr, u8 data);
  48849. +void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
  48850. +void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
  48851. +void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
  48852. +void rtl8187_set_rxconf(struct net_device *dev);
  48853. +bool MgntActSet_RF_State(struct net_device *dev,RT_RF_POWER_STATE StateToSet,u32 ChangeSource);
  48854. +void IPSEnter(struct net_device *dev);
  48855. +void IPSLeave(struct net_device *dev);
  48856. +#ifdef POLLING_METHOD_FOR_RADIO
  48857. +void gpio_change_polling(unsigned long data);
  48858. +#endif
  48859. +bool SetRFPowerState(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState);
  48860. +void rtl8180_patch_ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
  48861. +#ifdef _RTL8187_EXT_PATCH_
  48862. +extern int r8180_wx_set_channel(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
  48863. +#endif
  48864. +#ifdef JOHN_TKIP
  48865. +void EnableHWSecurityConfig8187(struct net_device *dev);
  48866. +void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent );
  48867. +
  48868. +#endif
  48869. +
  48870. +#endif
  48871. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_led.c linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_led.c
  48872. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_led.c 1970-01-01 01:00:00.000000000 +0100
  48873. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_led.c 2009-08-23 19:01:04.000000000 +0200
  48874. @@ -0,0 +1,1629 @@
  48875. +/*++
  48876. +Copyright (c) Realtek Semiconductor Corp. All rights reserved.
  48877. +
  48878. +Module Name:
  48879. + r8187_led.c
  48880. +
  48881. +Abstract:
  48882. + RTL8187 LED control functions
  48883. +
  48884. +Major Change History:
  48885. + When Who What
  48886. + ---------- --------------- -------------------------------
  48887. + 2006-09-07 Xiong Created
  48888. +
  48889. +Notes:
  48890. +
  48891. +--*/
  48892. +
  48893. +/*--------------------------Include File------------------------------------*/
  48894. +#include "ieee80211/ieee80211.h"
  48895. +#include "r8180_hw.h"
  48896. +#include "r8187.h"
  48897. +#include "r8180_93cx6.h"
  48898. +#include "r8187_led.h"
  48899. +
  48900. +/**
  48901. +*
  48902. +* Initialization function for Sw Leds controll.
  48903. +*
  48904. +* \param dev The net device for this driver.
  48905. +* \return void.
  48906. +*
  48907. +* Note:
  48908. +*
  48909. +*/
  48910. +
  48911. +void
  48912. +InitSwLeds(
  48913. + struct net_device *dev
  48914. + )
  48915. +{
  48916. +
  48917. + struct r8180_priv *priv = ieee80211_priv(dev);
  48918. + u16 usValue;
  48919. +// printk("========>%s()\n", __FUNCTION__);
  48920. +
  48921. +// priv->CustomerID = RT_CID_87B_DELL; //by lizhaoming for DELL 2008.6.3
  48922. + priv->CustomerID = RT_CID_DEFAULT; //just set to default now
  48923. + priv->bEnableLedCtrl = 1;
  48924. + priv->PsrValue = read_nic_byte(dev, PSR);
  48925. + usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET >> 1);
  48926. + priv->EEPROMCustomerID = (u8)( usValue & EEPROM_CID_MASK );
  48927. + DMESG("EEPROM Customer ID: %02X", priv->EEPROMCustomerID);
  48928. +
  48929. + if(priv->CustomerID == RT_CID_DEFAULT)
  48930. + { // If we have not yet change priv->CustomerID in register,
  48931. + // we initialzie it from that of EEPROM with proper translation, 2006.07.03, by rcnjko.
  48932. + switch(priv->EEPROMCustomerID)
  48933. + {
  48934. + case EEPROM_CID_RSVD0:
  48935. + case EEPROM_CID_RSVD1:
  48936. + priv->CustomerID = RT_CID_DEFAULT;
  48937. + break;
  48938. +
  48939. + case EEPROM_CID_ALPHA0:
  48940. + priv->CustomerID = RT_CID_8187_ALPHA0;
  48941. + break;
  48942. +
  48943. + case EEPROM_CID_SERCOMM_PS:
  48944. + priv->CustomerID = RT_CID_8187_SERCOMM_PS;
  48945. + break;
  48946. +
  48947. + case EEPROM_CID_HW_LED:
  48948. + priv->CustomerID = RT_CID_8187_HW_LED;
  48949. + break;
  48950. +
  48951. + case EEPROM_CID_QMI:
  48952. + priv->CustomerID = RT_CID_87B_QMI;
  48953. + break;
  48954. +
  48955. + case EEPROM_CID_DELL:
  48956. + priv->CustomerID = RT_CID_87B_DELL;
  48957. + break;
  48958. +
  48959. + default:
  48960. + // Invalid value, so, we use default value instead.
  48961. + priv->CustomerID = RT_CID_DEFAULT;
  48962. + break;
  48963. + }
  48964. + }
  48965. + switch(priv->CustomerID)
  48966. + {
  48967. + case RT_CID_DEFAULT:
  48968. + priv->LedStrategy = SW_LED_MODE0;
  48969. + break;
  48970. +
  48971. + case RT_CID_8187_ALPHA0:
  48972. + priv->LedStrategy = SW_LED_MODE1;
  48973. + break;
  48974. +
  48975. + case RT_CID_8187_SERCOMM_PS:
  48976. + priv->LedStrategy = SW_LED_MODE3;
  48977. + break;
  48978. +
  48979. + case RT_CID_87B_QMI:
  48980. + priv->LedStrategy = SW_LED_MODE4;
  48981. + break;
  48982. +
  48983. + case RT_CID_87B_DELL:
  48984. + priv->LedStrategy = SW_LED_MODE5;
  48985. + break;
  48986. +
  48987. + case RT_CID_8187_HW_LED:
  48988. + priv->LedStrategy = HW_LED;
  48989. + break;
  48990. +
  48991. + default:
  48992. + priv->LedStrategy = SW_LED_MODE0;
  48993. + break;
  48994. + }
  48995. +
  48996. + InitLed8187(dev,
  48997. + &(priv->Gpio0Led),
  48998. + LED_PIN_GPIO0,
  48999. + Gpio0LedBlinkTimerCallback);
  49000. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  49001. + INIT_WORK(&priv->Gpio0LedWorkItem,
  49002. + (void(*)(void*))Gpio0LedWorkItemCallback, dev);
  49003. +
  49004. + InitLed8187(dev,
  49005. + &(priv->SwLed0),
  49006. + LED_PIN_LED0,
  49007. + SwLed0BlinkTimerCallback);
  49008. + INIT_WORK(&priv->SwLed0WorkItem,
  49009. + (void(*)(void*))SwLed0WorkItemCallback, dev);
  49010. +
  49011. + InitLed8187(dev,
  49012. + &(priv->SwLed1),
  49013. + LED_PIN_LED1,
  49014. + SwLed1BlinkTimerCallback);
  49015. + INIT_WORK(&priv->SwLed1WorkItem,
  49016. + (void(*)(void*))SwLed1WorkItemCallback, dev);
  49017. +#else
  49018. +INIT_WORK(&priv->Gpio0LedWorkItem,
  49019. + Gpio0LedWorkItemCallback);
  49020. +
  49021. + InitLed8187(dev,
  49022. + &(priv->SwLed0),
  49023. + LED_PIN_LED0,
  49024. + SwLed0BlinkTimerCallback);
  49025. + INIT_WORK(&priv->SwLed0WorkItem,
  49026. + SwLed0WorkItemCallback);
  49027. +
  49028. + InitLed8187(dev,
  49029. + &(priv->SwLed1),
  49030. + LED_PIN_LED1,
  49031. + SwLed1BlinkTimerCallback);
  49032. + INIT_WORK(&priv->SwLed1WorkItem,
  49033. + SwLed1WorkItemCallback);
  49034. +#endif
  49035. +}
  49036. +
  49037. +void
  49038. +DeInitSwLeds(
  49039. + struct net_device *dev
  49040. + )
  49041. +{
  49042. + struct r8180_priv *priv = ieee80211_priv(dev);
  49043. +
  49044. +// printk("=========>%s In\n", __FUNCTION__);
  49045. + DeInitLed8187(dev, &(priv->Gpio0Led));
  49046. + DeInitLed8187(dev, &(priv->SwLed0));
  49047. + DeInitLed8187(dev, &(priv->SwLed1));
  49048. +}
  49049. +
  49050. +void
  49051. +InitLed8187(
  49052. + struct net_device *dev,
  49053. + PLED_8187 pLed,
  49054. + LED_PIN_8187 LedPin,
  49055. + void * BlinkCallBackFunc)
  49056. +{
  49057. +// printk("=========>%s In\n", __FUNCTION__);
  49058. + pLed->LedPin = LedPin;
  49059. +
  49060. + pLed->bLedOn = 0;
  49061. + pLed->CurrLedState = LED_OFF;
  49062. +
  49063. + pLed->bLedBlinkInProgress = 0;
  49064. + pLed->BlinkTimes = 0;
  49065. + pLed->BlinkingLedState = LED_OFF;
  49066. +
  49067. + init_timer(&(pLed->BlinkTimer));
  49068. + pLed->BlinkTimer.data = (unsigned long)dev;
  49069. + pLed->BlinkTimer.function = BlinkCallBackFunc;
  49070. + //PlatformInitializeTimer(dev, &(pLed->BlinkTimer), BlinkCallBackFunc);
  49071. +}
  49072. +
  49073. +void
  49074. +DeInitLed8187(
  49075. + struct net_device *dev,
  49076. + PLED_8187 pLed)
  49077. +{
  49078. + //printk("=========>%s In\n", __FUNCTION__);
  49079. + //PlatformCancelTimer(dev, &(pLed->BlinkTimer));
  49080. + del_timer_sync(&(pLed->BlinkTimer));
  49081. + // We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko.
  49082. + pLed->bLedBlinkInProgress = 0;
  49083. +}
  49084. +
  49085. +void
  49086. +LedControl8187(
  49087. + struct net_device *dev,
  49088. + LED_CTL_MODE LedAction
  49089. +)
  49090. +{
  49091. + struct r8180_priv *priv = ieee80211_priv(dev);
  49092. +// printk("=========>%s In\n", __FUNCTION__);
  49093. + if( priv->bEnableLedCtrl == 0)
  49094. + return;
  49095. +
  49096. +
  49097. + if( priv->eRFPowerState != eRfOn &&
  49098. + (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX ||
  49099. + LedAction == LED_CTL_SITE_SURVEY ||
  49100. + LedAction == LED_CTL_LINK ||
  49101. + LedAction == LED_CTL_NO_LINK) )
  49102. + {
  49103. + return;
  49104. + }
  49105. +
  49106. +
  49107. + switch(priv->LedStrategy)
  49108. + {
  49109. + case SW_LED_MODE0:
  49110. + SwLedControlMode0(dev, LedAction);
  49111. + break;
  49112. +
  49113. + case SW_LED_MODE1:
  49114. + SwLedControlMode1(dev, LedAction);
  49115. + break;
  49116. +
  49117. + case SW_LED_MODE2:
  49118. + SwLedControlMode2(dev, LedAction);
  49119. + break;
  49120. +
  49121. + case SW_LED_MODE3:
  49122. + SwLedControlMode3(dev, LedAction);
  49123. + break;
  49124. + case SW_LED_MODE4:
  49125. + SwLedControlMode4(dev, LedAction);
  49126. + break;
  49127. +
  49128. + case SW_LED_MODE5:
  49129. + SwLedControlMode5(dev, LedAction);
  49130. + break;
  49131. +
  49132. + default:
  49133. + break;
  49134. + }
  49135. +}
  49136. +
  49137. +
  49138. +//
  49139. +// Description:
  49140. +// Implement each led action for SW_LED_MODE0.
  49141. +// This is default strategy.
  49142. +//
  49143. +void
  49144. +SwLedControlMode0(
  49145. + struct net_device *dev,
  49146. + LED_CTL_MODE LedAction
  49147. +)
  49148. +{
  49149. + struct r8180_priv *priv = ieee80211_priv(dev);
  49150. + PLED_8187 pLed = &(priv->Gpio0Led);
  49151. +
  49152. +// printk("===+++++++++++++++======>%s In\n", __FUNCTION__);
  49153. + // Decide led state
  49154. + switch(LedAction)
  49155. + {
  49156. + case LED_CTL_TX:
  49157. + case LED_CTL_RX:
  49158. + if( pLed->bLedBlinkInProgress == 0 )
  49159. + {
  49160. + pLed->CurrLedState = LED_BLINK_NORMAL;
  49161. + pLed->BlinkTimes = 2;
  49162. + // printk("===========>LED_CTL_TX/RX \n");
  49163. + }
  49164. + else
  49165. + {
  49166. + return;
  49167. + }
  49168. + break;
  49169. +
  49170. + case LED_CTL_SITE_SURVEY:
  49171. + if( pLed->bLedBlinkInProgress == 0 )
  49172. + {
  49173. + pLed->CurrLedState = LED_BLINK_SLOWLY;
  49174. + // pLed->BlinkTimes = 10;
  49175. + //printk("===========>LED_CTL_SURVEY \n");
  49176. + }
  49177. + else
  49178. + {
  49179. + return;
  49180. + }
  49181. + break;
  49182. +
  49183. + case LED_CTL_LINK:
  49184. + // printk("===========>associate commplite LED_CTL_LINK\n");
  49185. + pLed->CurrLedState = LED_ON;
  49186. + break;
  49187. +
  49188. + case LED_CTL_NO_LINK:
  49189. + pLed->CurrLedState = LED_OFF;
  49190. + break;
  49191. +
  49192. + case LED_CTL_POWER_ON:
  49193. + // printk("===========>LED_CTL_POWER_ON\n");
  49194. + pLed->CurrLedState = LED_POWER_ON_BLINK;
  49195. + break;
  49196. +
  49197. + case LED_CTL_POWER_OFF:
  49198. + pLed->CurrLedState = LED_OFF;
  49199. + break;
  49200. +
  49201. + default:
  49202. + return;
  49203. + break;
  49204. + }
  49205. +
  49206. + // Change led state.
  49207. + switch(pLed->CurrLedState)
  49208. + {
  49209. + case LED_ON:
  49210. + if( pLed->bLedBlinkInProgress == 0 )
  49211. + {
  49212. + SwLedOn(dev, pLed);
  49213. + }
  49214. + break;
  49215. +
  49216. + case LED_OFF://modified by lizhaoming 2008.6.23
  49217. + // if( pLed->bLedBlinkInProgress == 0 )
  49218. + // {
  49219. + // SwLedOff(dev, pLed);
  49220. + // }
  49221. +
  49222. + if(pLed->bLedBlinkInProgress )/////////lizhaoming
  49223. + {
  49224. + del_timer_sync(&(pLed->BlinkTimer));
  49225. + pLed->bLedBlinkInProgress = FALSE;
  49226. + }
  49227. + SwLedOff(dev, pLed);
  49228. + break;
  49229. +
  49230. + case LED_BLINK_NORMAL:
  49231. + if( pLed->bLedBlinkInProgress == 0 )
  49232. + {
  49233. + pLed->bLedBlinkInProgress = 1;
  49234. + if( pLed->bLedOn )
  49235. + pLed->BlinkingLedState = LED_OFF;
  49236. + else
  49237. + pLed->BlinkingLedState = LED_ON;
  49238. +
  49239. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49240. + //add_timer(&(pLed->BlinkTimer));
  49241. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49242. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  49243. + }
  49244. + break;
  49245. +
  49246. + case LED_BLINK_SLOWLY:
  49247. + if( pLed->bLedBlinkInProgress == 0 )
  49248. + {
  49249. + //printk("=======>%s SLOWLY\n", __func__);
  49250. + pLed->bLedBlinkInProgress = 1;
  49251. + // if( pLed->bLedOn )
  49252. + pLed->BlinkingLedState = LED_OFF;//for LED_SHIN is LED on
  49253. + // else
  49254. + // pLed->BlinkingLedState = LED_ON;
  49255. +
  49256. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  49257. + }
  49258. + break;
  49259. +
  49260. + case LED_POWER_ON_BLINK:
  49261. + SwLedOn(dev, pLed);
  49262. +#ifdef LED_SHIN
  49263. + mdelay(100);
  49264. + SwLedOff(dev, pLed);
  49265. +#endif
  49266. + break;
  49267. +
  49268. + default:
  49269. + break;
  49270. + }
  49271. +}
  49272. +
  49273. +//
  49274. +// Description:
  49275. +// Implement each led action for SW_LED_MODE1.
  49276. +// For example, this is applied by ALPHA.
  49277. +//
  49278. +void
  49279. +SwLedControlMode1(
  49280. + struct net_device *dev,
  49281. + LED_CTL_MODE LedAction
  49282. +)
  49283. +{
  49284. + struct r8180_priv *priv = ieee80211_priv(dev);
  49285. + PLED_8187 pLed0 = &(priv->SwLed0);
  49286. + PLED_8187 pLed1 = &(priv->SwLed1);
  49287. +// printk("=====++++++++++++++++++++++====>%s In\n", __FUNCTION__);
  49288. +
  49289. + switch(LedAction)
  49290. + {
  49291. + case LED_CTL_TX:
  49292. + if( pLed0->bLedBlinkInProgress == 0 )
  49293. + {
  49294. + pLed0->CurrLedState = LED_BLINK_NORMAL;
  49295. + pLed0->BlinkTimes = 2;
  49296. + pLed0->bLedBlinkInProgress = 1;
  49297. + if( pLed0->bLedOn )
  49298. + pLed0->BlinkingLedState = LED_OFF;
  49299. + else
  49300. + pLed0->BlinkingLedState = LED_ON;
  49301. +
  49302. + //pLed0->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49303. + //add_timer(&(pLed0->BlinkTimer));
  49304. + mod_timer(&pLed0->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49305. + //PlatformSetTimer(dev, &(pLed0->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  49306. + }
  49307. + break;
  49308. +
  49309. + case LED_CTL_LINK:
  49310. + pLed0->CurrLedState = LED_ON;
  49311. + if( pLed0->bLedBlinkInProgress == 0 )
  49312. + {
  49313. + SwLedOn(dev, pLed0);
  49314. + }
  49315. + break;
  49316. +
  49317. + case LED_CTL_NO_LINK:
  49318. + pLed0->CurrLedState = LED_OFF;
  49319. + if( pLed0->bLedBlinkInProgress == 0 )
  49320. + {
  49321. + SwLedOff(dev, pLed0);
  49322. + }
  49323. + break;
  49324. +
  49325. + case LED_CTL_POWER_ON:
  49326. + pLed0->CurrLedState = LED_OFF;
  49327. + SwLedOff(dev, pLed0);
  49328. +
  49329. + pLed1->CurrLedState = LED_ON;
  49330. + SwLedOn(dev, pLed1);
  49331. +
  49332. + break;
  49333. +
  49334. + case LED_CTL_POWER_OFF:
  49335. + pLed0->CurrLedState = LED_OFF;
  49336. + SwLedOff(dev, pLed0);
  49337. +
  49338. + pLed1->CurrLedState = LED_OFF;
  49339. + SwLedOff(dev, pLed1);
  49340. + break;
  49341. +
  49342. + case LED_CTL_SITE_SURVEY:
  49343. + if( pLed0->bLedBlinkInProgress == 0 )
  49344. + {
  49345. + pLed0->CurrLedState = LED_BLINK_SLOWLY;;
  49346. + pLed0->BlinkTimes = 10;
  49347. + pLed0->bLedBlinkInProgress = 1;
  49348. + if( pLed0->bLedOn )
  49349. + pLed0->BlinkingLedState = LED_OFF;
  49350. + else
  49351. + pLed0->BlinkingLedState = LED_ON;
  49352. +
  49353. + //pLed0->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  49354. + //add_timer(&(pLed0->BlinkTimer));
  49355. + mod_timer(&pLed0->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  49356. + //PlatformSetTimer(dev, &(pLed0->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  49357. + }
  49358. + break;
  49359. +
  49360. + default:
  49361. + break;
  49362. + }
  49363. +}
  49364. +
  49365. +//
  49366. +// Description:
  49367. +// Implement each led action for SW_LED_MODE2,
  49368. +// which is customized for AzWave 8187 minicard.
  49369. +// 2006.04.03, by rcnjko.
  49370. +//
  49371. +void
  49372. +SwLedControlMode2(
  49373. + struct net_device *dev,
  49374. + LED_CTL_MODE LedAction
  49375. +)
  49376. +{
  49377. + struct r8180_priv *priv = ieee80211_priv(dev);
  49378. + PLED_8187 pLed = &(priv->Gpio0Led);
  49379. +
  49380. +// printk("====+++++++++++++++++++++=====>%s In\n", __FUNCTION__);
  49381. + // Decide led state
  49382. + switch(LedAction)
  49383. + {
  49384. + case LED_CTL_TX:
  49385. + case LED_CTL_RX:
  49386. + if( pLed->bLedBlinkInProgress == 0 )
  49387. + {
  49388. + pLed->bLedBlinkInProgress = 1;
  49389. +
  49390. + pLed->CurrLedState = LED_BLINK_NORMAL;
  49391. + pLed->BlinkTimes = 2;
  49392. +
  49393. + if( pLed->bLedOn )
  49394. + pLed->BlinkingLedState = LED_OFF;
  49395. + else
  49396. + pLed->BlinkingLedState = LED_ON;
  49397. +
  49398. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49399. + //add_timer(&(pLed->BlinkTimer));
  49400. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49401. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  49402. + }
  49403. + break;
  49404. +
  49405. + case LED_CTL_SITE_SURVEY:
  49406. + if( pLed->bLedBlinkInProgress == 0 )
  49407. + {
  49408. + pLed->bLedBlinkInProgress = 1;
  49409. +
  49410. + //if( dev->MgntInfo.mAssoc ||
  49411. + // dev->MgntInfo.mIbss )
  49412. + //{
  49413. + pLed->CurrLedState = LED_SCAN_BLINK;
  49414. + pLed->BlinkTimes = 4;
  49415. + //}
  49416. + //else
  49417. + //{
  49418. + // pLed->CurrLedState = LED_NO_LINK_BLINK;
  49419. + // pLed->BlinkTimes = 24;
  49420. + //}
  49421. +
  49422. + if( pLed->bLedOn )
  49423. + {
  49424. + pLed->BlinkingLedState = LED_OFF;
  49425. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
  49426. + //add_timer(&(pLed->BlinkTimer));
  49427. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
  49428. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
  49429. + }
  49430. + else
  49431. + {
  49432. + pLed->BlinkingLedState = LED_ON;
  49433. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
  49434. + //add_timer(&(pLed->BlinkTimer));
  49435. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
  49436. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
  49437. + }
  49438. + }
  49439. + else
  49440. + {
  49441. + if(pLed->CurrLedState != LED_NO_LINK_BLINK)
  49442. + {
  49443. + pLed->CurrLedState = LED_SCAN_BLINK;
  49444. + /*
  49445. + if( dev->MgntInfo.mAssoc ||
  49446. + dev->MgntInfo.mIbss )
  49447. + {
  49448. + pLed->CurrLedState = LED_SCAN_BLINK;
  49449. + }
  49450. + else
  49451. + {
  49452. + pLed->CurrLedState = LED_NO_LINK_BLINK;
  49453. + }
  49454. + */
  49455. + }
  49456. + }
  49457. + break;
  49458. +
  49459. + case LED_CTL_NO_LINK:
  49460. + if( pLed->bLedBlinkInProgress == 0 )
  49461. + {
  49462. + pLed->bLedBlinkInProgress = 1;
  49463. +
  49464. + pLed->CurrLedState = LED_NO_LINK_BLINK;
  49465. + pLed->BlinkTimes = 24;
  49466. +
  49467. + if( pLed->bLedOn )
  49468. + {
  49469. + pLed->BlinkingLedState = LED_OFF;
  49470. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
  49471. + //add_timer(&(pLed->BlinkTimer));
  49472. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
  49473. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
  49474. + }
  49475. + else
  49476. + {
  49477. + pLed->BlinkingLedState = LED_ON;
  49478. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
  49479. + //add_timer(&(pLed->BlinkTimer));
  49480. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
  49481. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
  49482. + }
  49483. + }
  49484. + else
  49485. + {
  49486. + pLed->CurrLedState = LED_NO_LINK_BLINK;
  49487. + }
  49488. + break;
  49489. +
  49490. + case LED_CTL_LINK:
  49491. + pLed->CurrLedState = LED_ON;
  49492. + if( pLed->bLedBlinkInProgress == 0 )
  49493. + {
  49494. + SwLedOn(dev, pLed);
  49495. + }
  49496. + break;
  49497. +
  49498. + case LED_CTL_POWER_OFF:
  49499. + pLed->CurrLedState = LED_OFF;
  49500. + if( pLed->bLedBlinkInProgress == 0 )
  49501. + {
  49502. + SwLedOff(dev, pLed);
  49503. + }
  49504. + break;
  49505. +
  49506. + default:
  49507. + break;
  49508. + }
  49509. +}
  49510. +
  49511. +
  49512. +//
  49513. +// Description:
  49514. +// Implement each led action for SW_LED_MODE3,
  49515. +// which is customized for Sercomm Printer Server case.
  49516. +// 2006.04.21, by rcnjko.
  49517. +//
  49518. +void
  49519. +SwLedControlMode3(
  49520. + struct net_device *dev,
  49521. + LED_CTL_MODE LedAction
  49522. +)
  49523. +{
  49524. + struct r8180_priv *priv = ieee80211_priv(dev);
  49525. + PLED_8187 pLed = &(priv->Gpio0Led);
  49526. +
  49527. +// printk("=====+++++++++++++++++++====>%s In\n", __FUNCTION__);
  49528. + // Decide led state
  49529. + switch(LedAction)
  49530. + {
  49531. + case LED_CTL_TX:
  49532. + case LED_CTL_RX:
  49533. + if( pLed->bLedBlinkInProgress == 0 )
  49534. + {
  49535. + pLed->bLedBlinkInProgress = 1;
  49536. +
  49537. + pLed->CurrLedState = LED_BLINK_CM3;
  49538. + pLed->BlinkTimes = 2;
  49539. +
  49540. + if( pLed->bLedOn )
  49541. + pLed->BlinkingLedState = LED_OFF;
  49542. + else
  49543. + pLed->BlinkingLedState = LED_ON;
  49544. +
  49545. + //pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
  49546. + //add_timer(&(pLed->BlinkTimer));
  49547. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
  49548. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
  49549. + }
  49550. + break;
  49551. +
  49552. + case LED_CTL_SITE_SURVEY:
  49553. + if( pLed->bLedBlinkInProgress == 0 )
  49554. + {
  49555. + pLed->bLedBlinkInProgress = 1;
  49556. +
  49557. + pLed->CurrLedState = LED_BLINK_CM3;
  49558. + pLed->BlinkTimes = 10;
  49559. +
  49560. + if( pLed->bLedOn )
  49561. + pLed->BlinkingLedState = LED_OFF;
  49562. + else
  49563. + pLed->BlinkingLedState = LED_ON;
  49564. +
  49565. + //pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
  49566. + //add_timer(&(pLed->BlinkTimer));
  49567. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
  49568. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
  49569. + }
  49570. + break;
  49571. +
  49572. + case LED_CTL_LINK:
  49573. + pLed->CurrLedState = LED_ON;
  49574. + if( pLed->bLedBlinkInProgress == 0 )
  49575. + {
  49576. + SwLedOn(dev, pLed);
  49577. + }
  49578. + break;
  49579. +
  49580. + case LED_CTL_NO_LINK:
  49581. + pLed->CurrLedState = LED_OFF;
  49582. + if( pLed->bLedBlinkInProgress == 0 )
  49583. + {
  49584. + SwLedOff(dev, pLed);
  49585. + }
  49586. + break;
  49587. +
  49588. + case LED_CTL_POWER_ON:
  49589. + pLed->CurrLedState = LED_POWER_ON_BLINK;
  49590. + SwLedOn(dev, pLed);
  49591. + mdelay(100);
  49592. + SwLedOff(dev, pLed);
  49593. + break;
  49594. +
  49595. + case LED_CTL_POWER_OFF:
  49596. + pLed->CurrLedState = LED_OFF;
  49597. + if( pLed->bLedBlinkInProgress == 0 )
  49598. + {
  49599. + SwLedOff(dev, pLed);
  49600. + }
  49601. + break;
  49602. +
  49603. + default:
  49604. + break;
  49605. + }
  49606. +}
  49607. +
  49608. +// added by lizhaoming 2008.6.2
  49609. +//
  49610. +// Description:
  49611. +// Implement each led action for SW_LED_MODE4,
  49612. +// which is customized for QMI 8187B minicard.
  49613. +// 2008.04.21, by chiyokolin.
  49614. +//
  49615. +void
  49616. +SwLedControlMode4(
  49617. + struct net_device *dev,
  49618. + LED_CTL_MODE LedAction
  49619. + )
  49620. +{
  49621. + struct r8180_priv *priv = ieee80211_priv(dev);
  49622. + PLED_8187 pLed = &(priv->Gpio0Led);
  49623. +
  49624. + //printk("=====+++++++++++++++++++++====>%s In\n", __FUNCTION__);
  49625. + // Decide led state
  49626. + switch(LedAction)
  49627. + {
  49628. + case LED_CTL_TX:
  49629. + case LED_CTL_RX:
  49630. + //if( pLed->bLedBlinkInProgress == false && !priv->bScanInProgress)//?????
  49631. + if( pLed->bLedBlinkInProgress == 0)
  49632. + {
  49633. + pLed->bLedBlinkInProgress = 1;
  49634. +
  49635. + pLed->CurrLedState = LED_BLINK_NORMAL;
  49636. + pLed->BlinkTimes = 2;
  49637. +
  49638. + if( pLed->bLedOn )
  49639. + pLed->BlinkingLedState = LED_OFF;
  49640. + else
  49641. + pLed->BlinkingLedState = LED_ON;
  49642. +
  49643. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49644. + //add_timer(&(pLed->BlinkTimer));
  49645. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49646. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  49647. + }
  49648. + else
  49649. + //printk("----->LED_CTL_RX/TX bLedBlinkInProgress\n");
  49650. +
  49651. + break;
  49652. +
  49653. + case LED_CTL_SITE_SURVEY:
  49654. + if( pLed->bLedBlinkInProgress == 0 )
  49655. + {
  49656. +
  49657. + pLed->bLedBlinkInProgress = 1;
  49658. + //if( priv->MgntInfo.mAssoc || priv->MgntInfo.mIbss )//////////??????
  49659. + //{
  49660. + pLed->CurrLedState = LED_SCAN_BLINK;
  49661. + pLed->BlinkTimes = 10;
  49662. +
  49663. + pLed->BlinkingLedState = LED_ON;
  49664. +
  49665. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49666. + //add_timer(&(pLed->BlinkTimer));
  49667. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49668. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  49669. + //}
  49670. + //else
  49671. + //{
  49672. + // pLed->CurrLedState = LED_NO_LINK_BLINK;
  49673. + // pLed->BlinkTimes = 24;
  49674. + //
  49675. + // if( pLed->bLedOn )
  49676. + // {
  49677. + // pLed->BlinkingLedState = LED_OFF;
  49678. + //
  49679. + // pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
  49680. + // add_timer(&(pLed->BlinkTimer));
  49681. + // //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
  49682. + // }
  49683. + // else
  49684. + // {
  49685. + // pLed->BlinkingLedState = LED_ON;
  49686. +
  49687. + // pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
  49688. + // add_timer(&(pLed->BlinkTimer));
  49689. + // //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
  49690. + // }
  49691. + //}
  49692. + }
  49693. + else
  49694. + {
  49695. + if(pLed->CurrLedState != LED_NO_LINK_BLINK)
  49696. + {
  49697. + //if( priv->MgntInfo.mAssoc || priv->MgntInfo.mIbss )//???????????
  49698. + //{
  49699. + //}
  49700. + //else
  49701. + //{
  49702. + // pLed->CurrLedState = LED_NO_LINK_BLINK;
  49703. + //}
  49704. + }
  49705. +
  49706. + //printk("----->LED_CTL_SITE_SURVEY bLedBlinkInProgress\n");
  49707. + }
  49708. + break;
  49709. +
  49710. + case LED_CTL_NO_LINK:
  49711. + if( pLed->bLedBlinkInProgress == 0 )
  49712. + {
  49713. + pLed->bLedBlinkInProgress = 1;
  49714. +
  49715. + pLed->CurrLedState = LED_NO_LINK_BLINK;
  49716. + pLed->BlinkTimes = 24;
  49717. +
  49718. + if( pLed->bLedOn )
  49719. + {
  49720. + pLed->BlinkingLedState = LED_OFF;
  49721. +
  49722. + //pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
  49723. + //add_timer(&(pLed->BlinkTimer));
  49724. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
  49725. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
  49726. + }
  49727. + else
  49728. + {
  49729. + pLed->BlinkingLedState = LED_ON;
  49730. +
  49731. + //pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
  49732. + //add_timer(&(pLed->BlinkTimer));
  49733. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_OFF_INTERVAL));
  49734. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
  49735. + }
  49736. + }
  49737. + else
  49738. + {
  49739. + pLed->CurrLedState = LED_NO_LINK_BLINK;
  49740. + //printk("----->LED_CTL_NO_LINK bLedBlinkInProgress\n");
  49741. + }
  49742. + break;
  49743. +
  49744. + case LED_CTL_LINK:
  49745. + pLed->CurrLedState = LED_ON;
  49746. + if( pLed->bLedBlinkInProgress == 0)
  49747. + {
  49748. + SwLedOn(dev, pLed);
  49749. + }
  49750. + else
  49751. + ;//printk("----->LED_CTL_LINK bLedBlinkInProgress\n");
  49752. +
  49753. + break;
  49754. +
  49755. + case LED_CTL_POWER_OFF:
  49756. + pLed->CurrLedState = LED_OFF;
  49757. + if(pLed->bLedBlinkInProgress)
  49758. + {
  49759. + printk("----->LED_CTL_POWER_OFF bLedBlinkInProgress\n");
  49760. +
  49761. + //PlatformCancelTimer(Adapter, &(pLed->BlinkTimer));
  49762. + del_timer_sync(&(pLed->BlinkTimer));
  49763. + pLed->bLedBlinkInProgress = 0;
  49764. + }
  49765. + SwLedOff(dev, pLed);
  49766. + break;
  49767. +
  49768. + default:
  49769. + break;
  49770. + }
  49771. +}
  49772. +
  49773. +
  49774. +
  49775. +//added by lizhaoming 2008.6.3
  49776. +//
  49777. +// Description:
  49778. +// Implement each led action for SW_LED_MODE5,
  49779. +// which is customized for DELL 8187B minicard.
  49780. +// 2008.04.24, by chiyokolin.
  49781. +//
  49782. +void
  49783. +SwLedControlMode5(
  49784. + struct net_device *dev,
  49785. + LED_CTL_MODE LedAction
  49786. + )
  49787. +{
  49788. + struct r8180_priv *priv = ieee80211_priv(dev);
  49789. + PLED_8187 pLed = &(priv->Gpio0Led);
  49790. +
  49791. + // Decide led state
  49792. + //printk("====++++++++++++++++++++++=====>%s In\n", __FUNCTION__);
  49793. + switch(LedAction)
  49794. + {
  49795. + case LED_CTL_TX:
  49796. + case LED_CTL_RX:
  49797. + case LED_CTL_SITE_SURVEY:
  49798. + case LED_CTL_POWER_ON:
  49799. + case LED_CTL_NO_LINK:
  49800. + case LED_CTL_LINK:
  49801. + pLed->CurrLedState = LED_ON;
  49802. + if( pLed->bLedBlinkInProgress == 0 )
  49803. + {
  49804. + pLed->bLedBlinkInProgress = 1;
  49805. + if(! pLed->bLedOn )
  49806. + pLed->BlinkingLedState = LED_ON;
  49807. + else
  49808. + break;
  49809. +
  49810. + //printk("====++++++++++++++++++++++=====>%s In LED:%d\n", __FUNCTION__, pLed->bLedOn);
  49811. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  49812. + //add_timer(&(pLed->BlinkTimer));
  49813. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  49814. + // SwLedOn(dev, pLed);
  49815. + }
  49816. + else
  49817. + ;//printk("----->LED_CTL_LINK bLedBlinkInProgress\n");
  49818. +
  49819. + break;
  49820. +
  49821. + case LED_CTL_POWER_OFF:
  49822. + pLed->CurrLedState = LED_OFF;
  49823. + // printk("<====++++++++++++++++++++++=====%s In LED:%d\n", __FUNCTION__, pLed->bLedOn);
  49824. + if(pLed->bLedBlinkInProgress)
  49825. + {
  49826. + // printk("----->LED_CTL_POWER_OFF bLedBlinkInProgress\n");
  49827. +
  49828. + //PlatformCancelTimer(Adapter, &(pLed->BlinkTimer));
  49829. + del_timer_sync(&(pLed->BlinkTimer));
  49830. + pLed->bLedBlinkInProgress = 0;
  49831. + }
  49832. + SwLedOff(dev, pLed);
  49833. + break;
  49834. +
  49835. + default:
  49836. + break;
  49837. + }
  49838. +}
  49839. +
  49840. +//
  49841. +// Callback fuction of the timer, Gpio0Led.BlinkTimer.
  49842. +//
  49843. +void
  49844. +Gpio0LedBlinkTimerCallback(
  49845. + unsigned long data
  49846. + )
  49847. +{
  49848. + struct net_device *dev = (struct net_device *)data;
  49849. + struct r8180_priv *priv = ieee80211_priv(dev);
  49850. +
  49851. +// printk("=========>%s In\n", __FUNCTION__);
  49852. + PlatformSwLedBlink(dev, &(priv->Gpio0Led));
  49853. +}
  49854. +
  49855. +
  49856. +
  49857. +//
  49858. +// Callback fuction of the timer, SwLed0.BlinkTimer.
  49859. +//
  49860. +void
  49861. +SwLed0BlinkTimerCallback(
  49862. + unsigned long data
  49863. + )
  49864. +{
  49865. + struct net_device *dev = (struct net_device *)data;
  49866. + struct r8180_priv *priv = ieee80211_priv(dev);
  49867. +
  49868. +// printk("=========>%s In\n", __FUNCTION__);
  49869. + PlatformSwLedBlink(dev, &(priv->SwLed0));
  49870. +}
  49871. +
  49872. +
  49873. +
  49874. +//
  49875. +// Callback fuction of the timer, SwLed1.BlinkTimer.
  49876. +//
  49877. +void
  49878. +SwLed1BlinkTimerCallback(
  49879. + unsigned long data
  49880. + )
  49881. +{
  49882. + struct net_device *dev = (struct net_device *)data;
  49883. + struct r8180_priv *priv = ieee80211_priv(dev);
  49884. +
  49885. +// printk("=========>%s In\n", __FUNCTION__);
  49886. + PlatformSwLedBlink(dev, &(priv->SwLed1));
  49887. +}
  49888. +
  49889. +void
  49890. +PlatformSwLedBlink(
  49891. + struct net_device *dev,
  49892. + PLED_8187 pLed
  49893. + )
  49894. +{
  49895. + struct r8180_priv *priv = ieee80211_priv(dev);
  49896. +
  49897. +// printk("=========>%s In\n", __FUNCTION__);
  49898. + switch(pLed->LedPin)
  49899. + {
  49900. + case LED_PIN_GPIO0:
  49901. + schedule_work(&(priv->Gpio0LedWorkItem));
  49902. + break;
  49903. +
  49904. + case LED_PIN_LED0:
  49905. + schedule_work(&(priv->SwLed0WorkItem));
  49906. + break;
  49907. +
  49908. + case LED_PIN_LED1:
  49909. + schedule_work(&(priv->SwLed1WorkItem));
  49910. + break;
  49911. +
  49912. + default:
  49913. + break;
  49914. + }
  49915. +}
  49916. +
  49917. +//
  49918. +// Callback fucntion of the workitem for SW LEDs.
  49919. +// 2006.03.01, by rcnjko.
  49920. +//
  49921. +
  49922. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  49923. +void Gpio0LedWorkItemCallback(struct work_struct *work)
  49924. +{
  49925. + struct r8180_priv *priv = container_of(work, struct r8180_priv,Gpio0LedWorkItem);
  49926. + struct net_device *dev = priv->ieee80211->dev;
  49927. +#else
  49928. +void
  49929. +Gpio0LedWorkItemCallback(
  49930. + void * Context
  49931. + )
  49932. +{
  49933. + struct net_device *dev = (struct net_device *)Context;
  49934. + struct r8180_priv *priv = ieee80211_priv(dev);
  49935. +#endif
  49936. + PLED_8187 pLed = &(priv->Gpio0Led);
  49937. + if (priv == NULL || dev == NULL){
  49938. +// printk("=========>%s In\n", __FUNCTION__);
  49939. + //printk("ft=====================>%s()\n", __FUNCTION__);
  49940. + }
  49941. +
  49942. +#if 0 // by lizahoming 2008.6.3
  49943. + if(priv->LedStrategy == SW_LED_MODE2)
  49944. + SwLedCm2Blink(dev, pLed);
  49945. + else
  49946. + SwLedBlink(dev, pLed);
  49947. +#endif
  49948. +
  49949. +#if 1 // by lizahoming 2008.6.3
  49950. + switch(priv->LedStrategy)
  49951. + {
  49952. + case SW_LED_MODE2:
  49953. + SwLedCm2Blink(dev, pLed);
  49954. + break;
  49955. + case SW_LED_MODE4:
  49956. + SwLedCm4Blink(dev, pLed);
  49957. + break;
  49958. + default:
  49959. + SwLedBlink(dev, pLed);
  49960. + break;
  49961. + }
  49962. +#endif
  49963. +
  49964. + //LeaveCallbackOfRtWorkItem( &(usbdevice->Gpio0LedWorkItem) );
  49965. +}
  49966. +
  49967. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  49968. +void SwLed0WorkItemCallback(struct work_struct *work)
  49969. +{
  49970. + //struct r8180_priv *priv = container_of(work, struct r8180_priv, SwLed0WorkItem);
  49971. + //struct net_device *dev = priv->dev;
  49972. +#else
  49973. +void SwLed0WorkItemCallback(void * Context)
  49974. +{
  49975. + //struct net_device *dev = (struct net_device *)Context;
  49976. + //struct r8180_priv *priv = ieee80211_priv(dev);
  49977. +#endif
  49978. + //SwLedBlink(dev, &(priv->SwLed0));
  49979. +// printk("=========>%s In\n", __FUNCTION__);
  49980. +
  49981. + //LeaveCallbackOfRtWorkItem( &(usbdevice->SwLed0WorkItem) );
  49982. +}
  49983. +
  49984. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  49985. +void SwLed1WorkItemCallback(struct work_struct *work)
  49986. +{
  49987. + //struct r8180_priv *priv = container_of(work, struct r8180_priv, SwLed1WorkItem);
  49988. +// struct net_device *dev = priv->dev;
  49989. +#else
  49990. +void
  49991. +SwLed1WorkItemCallback(
  49992. + void * Context
  49993. + )
  49994. +{
  49995. + //struct net_device *dev = (struct net_device *)Context;
  49996. + //struct r8180_priv *priv = ieee80211_priv(dev);
  49997. +#endif
  49998. +// printk("=========>%s In\n", __FUNCTION__);
  49999. + //SwLedBlink(dev, &(priv->SwLed1));
  50000. +
  50001. + //LeaveCallbackOfRtWorkItem( &(usbdevice->SwLed1WorkItem) );
  50002. +}
  50003. +
  50004. +//
  50005. +// Implementation of LED blinking behavior.
  50006. +// It toggle off LED and schedule corresponding timer if necessary.
  50007. +//
  50008. +void
  50009. +SwLedBlink(
  50010. + struct net_device *dev,
  50011. + PLED_8187 pLed
  50012. + )
  50013. +{
  50014. + u8 bStopBlinking = 0;
  50015. +
  50016. + //printk("=========>%s In state:%d\n", __FUNCTION__, pLed->CurrLedState);
  50017. + // Change LED according to BlinkingLedState specified.
  50018. + if( pLed->BlinkingLedState == LED_ON )
  50019. + {
  50020. + SwLedOn(dev, pLed);
  50021. +// printk("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
  50022. + }
  50023. + else
  50024. + {
  50025. + SwLedOff(dev, pLed);
  50026. +// printk("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
  50027. + }
  50028. +
  50029. + // Determine if we shall change LED state again.
  50030. +//by lizhaoming for LED BLINK SLOWLY
  50031. + if(pLed->CurrLedState == LED_BLINK_SLOWLY)
  50032. + {
  50033. + bStopBlinking = 0;
  50034. + } else {
  50035. + pLed->BlinkTimes--;
  50036. + if( pLed->BlinkTimes == 0 )
  50037. + {
  50038. + bStopBlinking = 1;
  50039. + }
  50040. + else
  50041. + {
  50042. + if( pLed->CurrLedState != LED_BLINK_NORMAL &&
  50043. + pLed->CurrLedState != LED_BLINK_SLOWLY &&
  50044. + pLed->CurrLedState != LED_BLINK_CM3 )
  50045. + {
  50046. + bStopBlinking = 1;
  50047. + }
  50048. + }
  50049. + }
  50050. +
  50051. + if(bStopBlinking)
  50052. + {
  50053. + if( pLed->CurrLedState == LED_ON && pLed->bLedOn == 0)
  50054. + {
  50055. + SwLedOn(dev, pLed);
  50056. + }
  50057. + else if(pLed->CurrLedState == LED_OFF && pLed->bLedOn == 1)
  50058. + {
  50059. + SwLedOff(dev, pLed);
  50060. + }
  50061. +
  50062. + pLed->BlinkTimes = 0;
  50063. + pLed->bLedBlinkInProgress = 0;
  50064. + }
  50065. + else
  50066. + {
  50067. + // Assign LED state to toggle.
  50068. + if( pLed->BlinkingLedState == LED_ON )
  50069. + pLed->BlinkingLedState = LED_OFF;
  50070. + else
  50071. + pLed->BlinkingLedState = LED_ON;
  50072. +
  50073. + // Schedule a timer to toggle LED state.
  50074. + switch( pLed->CurrLedState )
  50075. + {
  50076. + case LED_BLINK_NORMAL:
  50077. + //printk("LED_BLINK_NORMAL:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
  50078. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  50079. + //add_timer(&(pLed->BlinkTimer));
  50080. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  50081. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  50082. + break;
  50083. +
  50084. + case LED_BLINK_SLOWLY:
  50085. + if( pLed->bLedOn == 1 )
  50086. + {
  50087. + //printk("LED_BLINK_SLOWLY:turn off\n");
  50088. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL+50;//for pcie mini card spec page 33, 250ms
  50089. + //add_timer(&(pLed->BlinkTimer));
  50090. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL+50));
  50091. + pLed->BlinkingLedState = LED_OFF;
  50092. + } else {
  50093. + //printk("LED_BLINK_SLOWLY:turn on\n");
  50094. + //pLed->BlinkTimer.expires = jiffies + 5000;//for pcie mini card spec page 33, 5s
  50095. + //add_timer(&(pLed->BlinkTimer));
  50096. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(5000));
  50097. + pLed->BlinkingLedState = LED_ON;
  50098. + }
  50099. + break;
  50100. +
  50101. + case LED_BLINK_CM3:
  50102. + //printk("LED_BLINK_CM3:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
  50103. + //pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
  50104. + //add_timer(&(pLed->BlinkTimer));
  50105. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
  50106. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
  50107. + break;
  50108. +
  50109. + default:
  50110. + //printk("LED_BLINK_default:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
  50111. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  50112. + //add_timer(&(pLed->BlinkTimer));
  50113. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  50114. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  50115. + break;
  50116. + }
  50117. + }
  50118. +}
  50119. +
  50120. +
  50121. +
  50122. +//
  50123. +// Implementation of LED blinking behavior for SwLedControlMode2.
  50124. +//
  50125. +void
  50126. +SwLedCm2Blink(
  50127. + struct net_device *dev,
  50128. + PLED_8187 pLed
  50129. + )
  50130. +{
  50131. + struct r8180_priv *priv = ieee80211_priv(dev);
  50132. + //PMGNT_INFO priv = &(dev->MgntInfo);
  50133. + u8 bStopBlinking = 0;
  50134. +
  50135. + //printk("========+++++++++++++=>%s In\n", __FUNCTION__);
  50136. + //To avoid LED blinking when rf is off, add by lizhaoming 2008.6.2
  50137. + if((priv->eRFPowerState == eRfOff) && (priv->RfOffReason>RF_CHANGE_BY_IPS))
  50138. + {
  50139. + SwLedOff(dev, pLed);
  50140. +
  50141. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
  50142. + //add_timer(&(pLed->BlinkTimer));
  50143. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
  50144. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
  50145. + //printk(" Hw/Soft Radio Off, turn off Led\n");
  50146. + return;
  50147. + }
  50148. +
  50149. + // Change LED according to BlinkingLedState specified.
  50150. + if( pLed->BlinkingLedState == LED_ON )
  50151. + {
  50152. + SwLedOn(dev, pLed);
  50153. + //DMESG("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
  50154. + }
  50155. + else
  50156. + {
  50157. + SwLedOff(dev, pLed);
  50158. + //DMESG("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
  50159. + }
  50160. +
  50161. + //Add by lizhaoming for avoid BlinkTimers <0, 2008.6.2
  50162. + if(pLed->BlinkTimes > 0)
  50163. + {//by lizhaoming 2008.6.2
  50164. + // Determine if we shall change LED state again.
  50165. + pLed->BlinkTimes--;
  50166. + }//by lizhaoming 2008.6.2
  50167. +
  50168. + switch(pLed->CurrLedState)
  50169. + {
  50170. + case LED_BLINK_NORMAL:
  50171. + if(pLed->BlinkTimes == 0)
  50172. + {
  50173. + bStopBlinking = 1;
  50174. + }
  50175. + break;
  50176. +/* CM2 scan blink and no link blind now not be supported
  50177. + case LED_SCAN_BLINK:
  50178. + if( (priv->mAssoc || priv->mIbss) && // Linked.
  50179. + (!priv->bScanInProgress) && // Not in scan stage.
  50180. + (pLed->BlinkTimes % 2 == 0)) // Even
  50181. + {
  50182. + bStopBlinking = 1;
  50183. + }
  50184. + break;
  50185. +
  50186. + case LED_NO_LINK_BLINK:
  50187. + //Revised miniCard Ad-hoc mode "Slow Blink" by Isaiah 2006-08-03
  50188. + //if( (priv->mAssoc || priv->mIbss) ) // Linked.
  50189. + if( priv->mAssoc)
  50190. + {
  50191. + bStopBlinking = 1;
  50192. + }
  50193. + else if(priv->mIbss && priv->bMediaConnect )
  50194. + {
  50195. + bStopBlinking = 1;
  50196. + }
  50197. + break;
  50198. +*/
  50199. + default:
  50200. + bStopBlinking = 1;
  50201. + break;
  50202. + }
  50203. +
  50204. + if(bStopBlinking)
  50205. + {
  50206. +/*
  50207. + if( priv->eRFPowerState != eRfOn )
  50208. + {
  50209. + SwLedOff(dev, pLed);
  50210. + }
  50211. + else if( priv->bMediaConnect == 1 && pLed->bLedOn == 0)
  50212. + {
  50213. + SwLedOn(dev, pLed);
  50214. + }
  50215. + else if( priv->bMediaConnect == 0 && pLed->bLedOn == 1)
  50216. + {
  50217. + SwLedOff(dev, pLed);
  50218. + }
  50219. +*/
  50220. + pLed->BlinkTimes = 0;
  50221. + pLed->bLedBlinkInProgress = 0;
  50222. + }
  50223. + else
  50224. + {
  50225. + // Assign LED state to toggle.
  50226. + if( pLed->BlinkingLedState == LED_ON )
  50227. + pLed->BlinkingLedState = LED_OFF;
  50228. + else
  50229. + pLed->BlinkingLedState = LED_ON;
  50230. +
  50231. + // Schedule a timer to toggle LED state.
  50232. + switch( pLed->CurrLedState )
  50233. + {
  50234. + case LED_BLINK_NORMAL:
  50235. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  50236. + //add_timer(&(pLed->BlinkTimer));
  50237. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  50238. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  50239. + break;
  50240. +
  50241. + case LED_BLINK_SLOWLY:
  50242. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  50243. + //add_timer(&(pLed->BlinkTimer));
  50244. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  50245. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  50246. + break;
  50247. +
  50248. + case LED_SCAN_BLINK:
  50249. + case LED_NO_LINK_BLINK:
  50250. + if( pLed->bLedOn ) {
  50251. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
  50252. + //add_timer(&(pLed->BlinkTimer));
  50253. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
  50254. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
  50255. + } else {
  50256. + //pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
  50257. + //add_timer(&(pLed->BlinkTimer));
  50258. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
  50259. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
  50260. + }
  50261. + break;
  50262. +
  50263. + default:
  50264. + //RT_ASSERT(0, ("SwLedCm2Blink(): unexpected state!\n"));
  50265. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  50266. + //add_timer(&(pLed->BlinkTimer));
  50267. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  50268. + //PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  50269. + break;
  50270. + }
  50271. + }
  50272. +}
  50273. +
  50274. +// added by lizhaoming 2008.6.2
  50275. +//
  50276. +// Description:
  50277. +// Implement LED blinking behavior for SW_LED_MODE4.
  50278. +//
  50279. +void
  50280. +SwLedCm4Blink(
  50281. + struct net_device *dev,
  50282. + PLED_8187 pLed
  50283. + )
  50284. +{
  50285. + struct r8180_priv *priv = ieee80211_priv(dev);
  50286. + u8 bStopBlinking = 0;
  50287. +
  50288. + printk("======++++++++++++++++++======>%s In\n", __FUNCTION__);
  50289. + //To avoid LED blinking when rf is off, add by Maddest 20080307
  50290. + if((priv->eRFPowerState == eRfOff) && (priv->RfOffReason>RF_CHANGE_BY_IPS))
  50291. + {
  50292. + SwLedOff(dev, pLed);
  50293. +
  50294. + //pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
  50295. + //add_timer(&(pLed->BlinkTimer));
  50296. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
  50297. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
  50298. + printk(" Hw/Soft Radio Off, turn off Led\n");
  50299. + return;
  50300. + }
  50301. + // Change LED according to BlinkingLedState specified.
  50302. + if( pLed->BlinkingLedState == LED_ON )
  50303. + {
  50304. + if(!pLed->bLedOn)
  50305. + {
  50306. + SwLedOn(dev, pLed);
  50307. + }
  50308. + printk("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
  50309. + }
  50310. + else
  50311. + {
  50312. + SwLedOff(dev, pLed);
  50313. + printk("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
  50314. + }
  50315. +
  50316. + //Add by Maddest for avoid BlinkTimers <0, 20080307;
  50317. + if(pLed->BlinkTimes > 0)
  50318. + {
  50319. + // Determine if we shall change LED state again.
  50320. + pLed->BlinkTimes--;
  50321. + }
  50322. + printk("pLed->CurrLedState %d pLed->BlinkTimes %d\n", pLed->CurrLedState,pLed->BlinkTimes);
  50323. + switch(pLed->CurrLedState)
  50324. + {
  50325. + case LED_BLINK_NORMAL:
  50326. + if(pLed->BlinkTimes == 0)
  50327. + {
  50328. + bStopBlinking = 1;
  50329. + }
  50330. + break;
  50331. +
  50332. +/* CM2 scan blink and no link blind now not be supported
  50333. + case LED_SCAN_BLINK:
  50334. + if( (priv->mAssoc || priv->mIbss) && // Linked.//????????????
  50335. + (!priv->bScanInProgress) && // Not in scan stage.//????????????
  50336. + (pLed->BlinkTimes % 2 == 0)) // Even
  50337. + {
  50338. + bStopBlinking = 1;
  50339. + }
  50340. + break;
  50341. +
  50342. + case LED_NO_LINK_BLINK:
  50343. + //Revised miniCard Ad-hoc mode "Slow Blink" by Isaiah 2006-08-03
  50344. + //if( (pMgntInfo->mAssoc || pMgntInfo->mIbss) ) // Linked.
  50345. + if( priv->mAssoc) //????????????
  50346. + {
  50347. + bStopBlinking = 1;
  50348. + }
  50349. + else if(priv->mIbss && priv->bMediaConnect )//????????????
  50350. + {
  50351. + bStopBlinking = 1;
  50352. + }
  50353. + break;
  50354. +*/
  50355. +
  50356. + default:
  50357. + bStopBlinking = 1;
  50358. + break;
  50359. + }
  50360. +
  50361. + if(bStopBlinking)
  50362. + {
  50363. + /*
  50364. + if( priv->eRFPowerState != eRfOn )
  50365. + {
  50366. + SwLedOff(dev, pLed);
  50367. + }
  50368. + else if( priv->bMediaConnect == true && pLed->bLedOn == false)//????????????
  50369. + {
  50370. + SwLedOn(dev, pLed);
  50371. + }
  50372. + else if( priv->bMediaConnect == false && pLed->bLedOn == true)//????????????
  50373. + {
  50374. + SwLedOff(dev, pLed);
  50375. + }
  50376. + */
  50377. +
  50378. + pLed->BlinkTimes = 0;
  50379. + pLed->bLedBlinkInProgress = 0;
  50380. + }
  50381. + else
  50382. + {
  50383. + // Assign LED state to toggle.
  50384. + if( pLed->BlinkingLedState == LED_ON )
  50385. + pLed->BlinkingLedState = LED_OFF;
  50386. + else
  50387. + pLed->BlinkingLedState = LED_ON;
  50388. +
  50389. + // Schedule a timer to toggle LED state.
  50390. + switch( pLed->CurrLedState )
  50391. + {
  50392. + case LED_BLINK_NORMAL:
  50393. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  50394. + //add_timer(&(pLed->BlinkTimer));
  50395. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  50396. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  50397. + break;
  50398. +
  50399. + case LED_BLINK_SLOWLY:
  50400. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  50401. + //add_timer(&(pLed->BlinkTimer));
  50402. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  50403. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  50404. + break;
  50405. +
  50406. + case LED_SCAN_BLINK:
  50407. + pLed->BlinkingLedState = LED_ON;
  50408. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
  50409. + //add_timer(&(pLed->BlinkTimer));
  50410. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
  50411. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
  50412. +
  50413. + case LED_NO_LINK_BLINK:
  50414. + if( pLed->bLedOn ){
  50415. + //pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
  50416. + //add_timer(&(pLed->BlinkTimer));
  50417. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
  50418. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
  50419. + }else{
  50420. + //pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
  50421. + //add_timer(&(pLed->BlinkTimer));
  50422. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_OFF_INTERVAL));
  50423. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
  50424. + }
  50425. + break;
  50426. +
  50427. + default:
  50428. + printk("SwLedCm2Blink(): unexpected state!\n");
  50429. + //pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
  50430. + //add_timer(&(pLed->BlinkTimer));
  50431. + mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
  50432. + //PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
  50433. + break;
  50434. + }
  50435. + }
  50436. +}
  50437. +
  50438. +void
  50439. +SwLedOn(
  50440. + struct net_device *dev,
  50441. + PLED_8187 pLed
  50442. +)
  50443. +{
  50444. + struct r8180_priv *priv = ieee80211_priv(dev);
  50445. +// printk("=========>%s(), pin:%d\n", __FUNCTION__, pLed->LedPin);
  50446. + switch(pLed->LedPin)
  50447. + {
  50448. + case LED_PIN_GPIO0:
  50449. + write_nic_byte(dev,0x0091,0x01);
  50450. + write_nic_byte(dev,0x0090,0x00); // write 0 : LED on
  50451. + break;
  50452. +
  50453. + case LED_PIN_LED0:
  50454. + priv->PsrValue &= ~(0x01 << 4);
  50455. + write_nic_byte(dev, PSR, priv->PsrValue);
  50456. + break;
  50457. +
  50458. + case LED_PIN_LED1:
  50459. + priv->PsrValue &= ~(0x01 << 5);
  50460. + write_nic_byte(dev, PSR, priv->PsrValue);
  50461. + break;
  50462. +
  50463. + default:
  50464. + break;
  50465. + }
  50466. +
  50467. + pLed->bLedOn = 1;
  50468. +}
  50469. +
  50470. +void
  50471. +SwLedOff(
  50472. + struct net_device *dev,
  50473. + PLED_8187 pLed
  50474. +)
  50475. +{
  50476. + struct r8180_priv *priv = ieee80211_priv(dev);
  50477. +
  50478. +
  50479. + //printk("=========>%s(), pin:%d\n", __FUNCTION__, pLed->LedPin);
  50480. + switch(pLed->LedPin)
  50481. + {
  50482. + case LED_PIN_GPIO0:
  50483. + write_nic_byte(dev,0x0091,0x01);
  50484. + write_nic_byte(dev,0x0090,0x01); // write 1 : LED off
  50485. + break;
  50486. +
  50487. + case LED_PIN_LED0:
  50488. + priv->PsrValue |= (0x01 << 4);
  50489. + write_nic_byte(dev, PSR, priv->PsrValue);
  50490. + break;
  50491. +
  50492. + case LED_PIN_LED1:
  50493. + priv->PsrValue |= (0x01 << 5);
  50494. + write_nic_byte(dev, PSR, priv->PsrValue);
  50495. + break;
  50496. +
  50497. + default:
  50498. + break;
  50499. + }
  50500. +
  50501. + pLed->bLedOn = 0;
  50502. +}
  50503. +
  50504. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_led.h linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_led.h
  50505. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/r8187_led.h 1970-01-01 01:00:00.000000000 +0100
  50506. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/r8187_led.h 2009-08-23 19:01:04.000000000 +0200
  50507. @@ -0,0 +1,276 @@
  50508. +/*++
  50509. +
  50510. +Copyright (c) Microsoft Corporation. All rights reserved.
  50511. +
  50512. +Module Name:
  50513. + r8187_led.h
  50514. +
  50515. +Abstract:
  50516. + definitions and stuctures for rtl8187 led control.
  50517. +
  50518. +Major Change History:
  50519. + When Who What
  50520. + ---------- ------ ----------------------------------------------
  50521. + 2006-09-07 Xiong Created
  50522. +
  50523. +Notes:
  50524. +
  50525. +--*/
  50526. +
  50527. +#ifndef R8187_LED_H
  50528. +#define R8187_LED_H
  50529. +
  50530. +#include <linux/types.h>
  50531. +#include <linux/timer.h>
  50532. +
  50533. +
  50534. +/*--------------------------Define -------------------------------------------*/
  50535. +//
  50536. +// 0x7E-0x7F is reserved for SW customization. 2006.04.21, by rcnjko.
  50537. +//
  50538. +// BIT[0-7] is for CustomerID where value 0x00 and 0xFF is reserved for Realtek.
  50539. +#define EEPROM_SW_REVD_OFFSET 0x7E
  50540. +
  50541. +#define EEPROM_CID_MASK 0x00FF
  50542. +#define EEPROM_CID_RSVD0 0x00
  50543. +#define EEPROM_CID_RSVD1 0xFF
  50544. +#define EEPROM_CID_ALPHA0 0x01
  50545. +#define EEPROM_CID_SERCOMM_PS 0x02
  50546. +#define EEPROM_CID_HW_LED 0x03
  50547. +
  50548. +#define EEPROM_CID_QMI 0x07 //Added by lizhaoming 2008.6.3
  50549. +#define EEPROM_CID_DELL 0x08 //Added by lizhaoming 2008.6.3
  50550. +
  50551. +#define LED_BLINK_NORMAL_INTERVAL 100 //by lizhaoming 50 -> 100
  50552. +#define LED_BLINK_SLOWLY_INTERVAL 200
  50553. +
  50554. +// Customized for AzWave, 2006.04.03, by rcnjko.
  50555. +#define LED_CM2_BLINK_ON_INTERVAL 250
  50556. +#define LED_CM2_BLINK_OFF_INTERVAL 4750
  50557. +//
  50558. +
  50559. +// Customized for Sercomm Printer Server case, 2006.04.21, by rcnjko.
  50560. +#define LED_CM3_BLINK_INTERVAL 1500
  50561. +
  50562. +// by lizhaoming 2008.6.3: Customized for QMI.
  50563. +//
  50564. +#define LED_CM4_BLINK_ON_INTERVAL 500
  50565. +#define LED_CM4_BLINK_OFF_INTERVAL 4500
  50566. +
  50567. +
  50568. +/*--------------------------Define MACRO--------------------------------------*/
  50569. +
  50570. +
  50571. +/*------------------------------Define Struct---------------------------------*/
  50572. +typedef enum _LED_STATE_8187{
  50573. + LED_UNKNOWN = 0,
  50574. + LED_ON = 1,
  50575. + LED_OFF = 2,
  50576. + LED_BLINK_NORMAL = 3,
  50577. + LED_BLINK_SLOWLY = 4,
  50578. + LED_POWER_ON_BLINK = 5,
  50579. + LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning.
  50580. + LED_NO_LINK_BLINK = 7, // LED is blinking during no link state.
  50581. + LED_BLINK_CM3 = 8, // Customzied for Sercomm Printer Server case
  50582. +}LED_STATE_8187;
  50583. +
  50584. +typedef enum _RT_CID_TYPE {
  50585. + RT_CID_DEFAULT,
  50586. + RT_CID_8187_ALPHA0,
  50587. + RT_CID_8187_SERCOMM_PS,
  50588. + RT_CID_8187_HW_LED,
  50589. +
  50590. + RT_CID_87B_QMI , //Added by lizhaoming 2008.6.3
  50591. + RT_CID_87B_DELL, //Added by lizhaoming 2008.6.3
  50592. +
  50593. +} RT_CID_TYPE;
  50594. +
  50595. +typedef enum _LED_STRATEGY_8187{
  50596. + SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
  50597. + SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA.
  50598. + SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard.
  50599. + SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case.
  50600. + SW_LED_MODE4, //added by lizhaoming for bluetooth 2008.6.3
  50601. + SW_LED_MODE5, //added by lizhaoming for bluetooth 2008.6.3
  50602. + HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.)
  50603. +}LED_STRATEGY_8187, *PLED_STRATEGY_8187;
  50604. +
  50605. +typedef enum _LED_PIN_8187{
  50606. + LED_PIN_GPIO0,
  50607. + LED_PIN_LED0,
  50608. + LED_PIN_LED1
  50609. +}LED_PIN_8187;
  50610. +
  50611. +//by lizhaoming for LED 2008.6.23 into ieee80211.h
  50612. +//typedef enum _LED_CTL_MODE {
  50613. +// LED_CTL_POWER_ON,
  50614. +// LED_CTL_POWER_OFF,
  50615. +// LED_CTL_LINK,
  50616. +// LED_CTL_NO_LINK,
  50617. +// LED_CTL_TX,
  50618. +// LED_CTL_RX,
  50619. +// LED_CTL_SITE_SURVEY,
  50620. +//} LED_CTL_MODE;
  50621. +
  50622. +typedef struct _LED_8187{
  50623. + LED_PIN_8187 LedPin; // Identify how to implement this SW led.
  50624. +
  50625. + LED_STATE_8187 CurrLedState; // Current LED state.
  50626. + u8 bLedOn; // TRUE if LED is ON, FALSE if LED is OFF.
  50627. +
  50628. + u8 bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w..
  50629. + u32 BlinkTimes; // Number of times to toggle led state for blinking.
  50630. + LED_STATE_8187 BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are.
  50631. + struct timer_list BlinkTimer; // Timer object for led blinking.
  50632. +} LED_8187, *PLED_8187;
  50633. +
  50634. +
  50635. +
  50636. +/*------------------------Export global variable------------------------------*/
  50637. +
  50638. +
  50639. +/*------------------------------Funciton declaration--------------------------*/
  50640. +void
  50641. +InitSwLeds(
  50642. + struct net_device *dev
  50643. + );
  50644. +
  50645. +void
  50646. +DeInitSwLeds(
  50647. + struct net_device *dev
  50648. + );
  50649. +
  50650. +void
  50651. +InitLed8187(
  50652. + struct net_device *dev,
  50653. + PLED_8187 pLed,
  50654. + LED_PIN_8187 LedPin,
  50655. + void * BlinkCallBackFunc);
  50656. +
  50657. +void
  50658. +DeInitLed8187(
  50659. + struct net_device *dev,
  50660. + PLED_8187 pLed);
  50661. +
  50662. +void
  50663. +LedControl8187(
  50664. + struct net_device *dev,
  50665. + LED_CTL_MODE LedAction
  50666. +);
  50667. +
  50668. +void
  50669. +SwLedControlMode0(
  50670. + struct net_device *dev,
  50671. + LED_CTL_MODE LedAction
  50672. +);
  50673. +
  50674. +void
  50675. +SwLedControlMode1(
  50676. + struct net_device *dev,
  50677. + LED_CTL_MODE LedAction
  50678. +);
  50679. +
  50680. +void
  50681. +SwLedControlMode2(
  50682. + struct net_device *dev,
  50683. + LED_CTL_MODE LedAction
  50684. +);
  50685. +
  50686. +void
  50687. +SwLedControlMode3(
  50688. + struct net_device *dev,
  50689. + LED_CTL_MODE LedAction
  50690. +);
  50691. +
  50692. +
  50693. +void
  50694. +SwLedControlMode4(
  50695. + struct net_device *dev,
  50696. + LED_CTL_MODE LedAction
  50697. +);
  50698. +
  50699. +
  50700. +void
  50701. +SwLedControlMode5(
  50702. + struct net_device *dev,
  50703. + LED_CTL_MODE LedAction
  50704. +);
  50705. +
  50706. +void
  50707. +Gpio0LedBlinkTimerCallback(
  50708. + unsigned long data
  50709. + );
  50710. +
  50711. +void
  50712. +SwLed0BlinkTimerCallback(
  50713. + unsigned long data
  50714. + );
  50715. +
  50716. +void
  50717. +SwLed1BlinkTimerCallback(
  50718. + unsigned long data
  50719. + );
  50720. +
  50721. +void
  50722. +PlatformSwLedBlink(
  50723. + struct net_device *dev,
  50724. + PLED_8187 pLed
  50725. + );
  50726. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  50727. +void
  50728. +Gpio0LedWorkItemCallback(
  50729. + void * Context
  50730. + );
  50731. +
  50732. +void
  50733. +SwLed0WorkItemCallback(
  50734. + void * Context
  50735. + );
  50736. +
  50737. +void
  50738. +SwLed1WorkItemCallback(
  50739. + void * Context
  50740. + );
  50741. +#else
  50742. +void
  50743. +Gpio0LedWorkItemCallback(struct work_struct *work);
  50744. +
  50745. +void
  50746. +SwLed0WorkItemCallback(struct work_struct *work);
  50747. +
  50748. +void
  50749. +SwLed1WorkItemCallback(struct work_struct *work);
  50750. +
  50751. +#endif
  50752. +void
  50753. +SwLedBlink(
  50754. + struct net_device *dev,
  50755. + PLED_8187 pLed
  50756. + );
  50757. +
  50758. +void
  50759. +SwLedCm2Blink(
  50760. + struct net_device *dev,
  50761. + PLED_8187 pLed
  50762. + );
  50763. +
  50764. +void
  50765. +SwLedCm4Blink(
  50766. + struct net_device *dev,
  50767. + PLED_8187 pLed
  50768. + );
  50769. +
  50770. +void
  50771. +SwLedOn(
  50772. + struct net_device *dev,
  50773. + PLED_8187 pLed
  50774. +);
  50775. +
  50776. +void
  50777. +SwLedOff(
  50778. + struct net_device *dev,
  50779. + PLED_8187 pLed
  50780. +);
  50781. +
  50782. +
  50783. +#endif
  50784. diff -Nur linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/readme linux-2.6.30.5/drivers/net/wireless/rtl8187b/readme
  50785. --- linux-2.6.30.5.orig/drivers/net/wireless/rtl8187b/readme 1970-01-01 01:00:00.000000000 +0100
  50786. +++ linux-2.6.30.5/drivers/net/wireless/rtl8187b/readme 2009-08-23 19:01:04.000000000 +0200
  50787. @@ -0,0 +1,124 @@
  50788. +rtl8187 Linux kernel driver
  50789. +Released under the terms of GNU General Public Licence (GPL)
  50790. +Copyright(c) Andrea Merello - 2004,2005
  50791. +
  50792. +Portions of this driver are based on other projects, please see the notes
  50793. +in the source files for detail.
  50794. +A special thanks go to Realtek corp for their support and to David Young
  50795. +------------------------------------------------------------------------------
  50796. +
  50797. +This is an attempt to write somethig that can make rtl8187 usb dongle wifi card
  50798. +on Linux using only opensource stuff.
  50799. +The rtl8225 radio is supported.
  50800. +
  50801. +It's in early development stage so don't expect too much from it
  50802. +(also use it at your own risk!)
  50803. +This should be considered just a fragment of code.. using it on your(any)
  50804. +system is at your own risk! Please note that I never supported the idea to
  50805. +use it in any way, so i cannot be considered responsible in any way for
  50806. +anything deriving by it usage.
  50807. +
  50808. +Anyway for now we have monitor mode and managed mode
  50809. +basically working! This isn't necessary stable, but seems to work..
  50810. +
  50811. +This driver is still under development and very far from perfect. It should work on x86,
  50812. +Other archs are untested..
  50813. +
  50814. +To compile the driver simply run make.
  50815. +
  50816. +The driver contains also the ieee80211.h and ieee80211_crypt.h from the ieee stack.
  50817. +Note that for some reasons this stack is NOT the same that will be included in newer
  50818. +2.6 kernel. I will try to port to this stack as soon as it will have enought features
  50819. +to support 8187 cards.
  50820. +Please note that you will have to make sure the two .h files are the same of the ieee
  50821. +stack.
  50822. +In other words when you download from the CVS this driver and the ieee80211 stack a good
  50823. +idea is to copy the ieee80211.h and ieee80211_crypt.h from the ieee directory to the drv
  50824. +directory
  50825. +
  50826. +Warning during compile are OK
  50827. +
  50828. +To wake up the nic run:
  50829. +
  50830. + ifconfig <ifacename> up
  50831. +
  50832. +(where <ifacename> is your network device for wlan card).
  50833. +
  50834. +Please note that the default interface name is wlanX.
  50835. +
  50836. +Please note thet this will take several seconds..
  50837. +
  50838. +If you would like to set the interface name to something else you may use the
  50839. +'devname=' module parameter. For example:
  50840. +
  50841. + insmod r8187.ko ifname=eth%d
  50842. +
  50843. +will set the interface name of this device to something like eth0.
  50844. +
  50845. +Once the nic is up it can be put in a monitor mode by running:
  50846. +
  50847. + iwconfig <ifacename> mode monitor
  50848. +
  50849. +and channel number may be changed by running:
  50850. +
  50851. + iwconfig <ifacename> channel XX
  50852. +
  50853. +
  50854. +In monitor mode a choice may be made via iwpriv if the nic should pass packets
  50855. +with bad crc or drop them.
  50856. +
  50857. +To put the nic in managed mode run:
  50858. +
  50859. + iwconfig <ifacename> mode managed
  50860. +
  50861. +In managed mode there is support for
  50862. +
  50863. + iwlist scan
  50864. +
  50865. +that should report the currently available networks.
  50866. +Please note that in managed mode channels cannot be changed manually.
  50867. +
  50868. +To associate with a network
  50869. +
  50870. + iwconfig <ifacename> essid XXXXX
  50871. +
  50872. +where XXXXX is the network essid (name) reported by 'iwlist scan'. Please
  50873. +note that essid is case sensitive.
  50874. +
  50875. +If your network is not broadcasting the ESSID, then you need to specify *also*
  50876. +the AP MAC address
  50877. +
  50878. + iwconfig <ifacename> ap XX:XX:XX:XX:XX:XX
  50879. +
  50880. +The driver accepts another boolean parameter: hwseqnum
  50881. +If set to 1 it lets the card HW take care of the sequence number of the TXed
  50882. +frames. Altought in managed mode I can't see an important reason to use HW to
  50883. +do that, when we'll start to TX beacons in master (AP) and ad-hoc modes most
  50884. +probably it will be extremely useful (since most probably we will use two HW
  50885. +queues).
  50886. +
  50887. +I'm unsure if it will work correctly on all NICs.. reports are *VERY, VERY* apreciated..
  50888. +
  50889. +
  50890. + WEP
  50891. + ===
  50892. +
  50893. +WEP encryption should work. For now it's done by host, not by the nic. Key can be set with:
  50894. +Key can be set with
  50895. +
  50896. + iwconfig <ifacename> key 12345...
  50897. +
  50898. +WEP is supported via software thanks to the ipw stack.
  50899. +
  50900. +Shared and open authentication are supported
  50901. +
  50902. + IWPRIV
  50903. + ======
  50904. +
  50905. +This driver supports some private handlers:
  50906. +-badcrc: let you choose to kill or to pass to the upper layer frames with bad crc in monitor mode
  50907. +-activescan: if 0 the driver will avoid to send probe requests, sanning will be only on beacon basis
  50908. +
  50909. +
  50910. +If you have some question/comments please feel free to write me.
  50911. +
  50912. diff -Nur linux-2.6.30.5.orig/drivers/platform/Kconfig linux-2.6.30.5/drivers/platform/Kconfig
  50913. --- linux-2.6.30.5.orig/drivers/platform/Kconfig 2009-08-16 23:19:38.000000000 +0200
  50914. +++ linux-2.6.30.5/drivers/platform/Kconfig 2009-08-23 19:01:04.000000000 +0200
  50915. @@ -3,3 +3,7 @@
  50916. if X86
  50917. source "drivers/platform/x86/Kconfig"
  50918. endif
  50919. +
  50920. +if MACH_LOONGSON
  50921. +source "drivers/platform/loongson/Kconfig"
  50922. +endif
  50923. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_bat.c linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_bat.c
  50924. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_bat.c 1970-01-01 01:00:00.000000000 +0100
  50925. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_bat.c 2009-08-23 19:01:04.000000000 +0200
  50926. @@ -0,0 +1,388 @@
  50927. +/*
  50928. + * EC(Embedded Controller) KB3310B battery management driver on Linux
  50929. + *
  50930. + * Author: liujl <liujl@lemote.com>
  50931. + * Date : 2008-03-17
  50932. + *
  50933. + * NOTE: The SDA0/SCL0 in KB3310B are used to communicate with the battery
  50934. + * IC, Here we use DS2786 IC to handle the battery management. All the
  50935. + * resources for handle battery management in KB3310B are:
  50936. + * 1, one SMBus interface with port 0
  50937. + * 2, gpio40 output for charge enable
  50938. + */
  50939. +
  50940. +#include <linux/module.h>
  50941. +#include <linux/poll.h>
  50942. +#include <linux/proc_fs.h>
  50943. +#include <linux/miscdevice.h>
  50944. +#include <linux/capability.h>
  50945. +#include <linux/sched.h>
  50946. +#include <linux/device.h>
  50947. +#include <linux/kernel.h>
  50948. +#include <linux/list.h>
  50949. +#include <linux/init.h>
  50950. +#include <linux/completion.h>
  50951. +#include <linux/kthread.h>
  50952. +#include <linux/delay.h>
  50953. +#include <linux/timer.h>
  50954. +
  50955. +#include <asm/delay.h>
  50956. +
  50957. +#include "ec.h"
  50958. +#include "ec_misc_fn.h"
  50959. +
  50960. +#ifndef APM_32_BIT_SUPPORT
  50961. +#define APM_32_BIT_SUPPORT 0x0002
  50962. +#endif
  50963. +
  50964. +/* The EC Battery device, here is his minor number. */
  50965. +#define ECBAT_MINOR_DEV MISC_DYNAMIC_MINOR
  50966. +
  50967. +/*
  50968. + * apm threshold : percent unit.
  50969. + */
  50970. +#define BAT_MAX_THRESHOLD 99
  50971. +#define BAT_MIN_THRESHOLD 5
  50972. +
  50973. +/*
  50974. + * This structure gets filled in by the machine specific 'get_power_status'
  50975. + * implementation. Any fields which are not set default to a safe value.
  50976. + */
  50977. +struct apm_pwr_info {
  50978. + unsigned char ac_line_status;
  50979. +#define APM_AC_OFFLINE 0
  50980. +#define APM_AC_ONLINE 1
  50981. +#define APM_AC_BACKUP 2
  50982. +#define APM_AC_UNKNOWN 0xff
  50983. +
  50984. + unsigned char battery_status;
  50985. +#define APM_BATTERY_STATUS_HIGH 0
  50986. +#define APM_BATTERY_STATUS_LOW 1
  50987. +#define APM_BATTERY_STATUS_CRITICAL 2
  50988. +#define APM_BATTERY_STATUS_CHARGING 3
  50989. +#define APM_BATTERY_STATUS_NOT_PRESENT 4
  50990. +#define APM_BATTERY_STATUS_UNKNOWN 0xff
  50991. +
  50992. + unsigned char battery_flag;
  50993. +#define APM_BATTERY_FLAG_HIGH (1 << 0)
  50994. +#define APM_BATTERY_FLAG_LOW (1 << 1)
  50995. +#define APM_BATTERY_FLAG_CRITICAL (1 << 2)
  50996. +#define APM_BATTERY_FLAG_CHARGING (1 << 3)
  50997. +#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7)
  50998. +#define APM_BATTERY_FLAG_UNKNOWN 0xff
  50999. +
  51000. + int battery_life;
  51001. + int time;
  51002. + int units;
  51003. +#define APM_UNITS_MINS 0
  51004. +#define APM_UNITS_SECS 1
  51005. +#define APM_UNITS_UNKNOWN -1
  51006. +
  51007. + /* battery designed capacity */
  51008. + unsigned int bat_design_cap;
  51009. + /* battery designed voltage */
  51010. + unsigned int bat_design_vol;
  51011. + /* battery capacity after full charged */
  51012. + unsigned int bat_full_charged_cap;
  51013. + /* battery vendor number */
  51014. + unsigned char bat_vendor;
  51015. + /* battery cell count */
  51016. + unsigned char bat_cell_count;
  51017. +
  51018. + /* battery dynamic charge/discharge voltage */
  51019. + unsigned int bat_voltage;
  51020. + /* battery dynamic charge/discharge current */
  51021. + int bat_current;
  51022. + /* battery current temperature */
  51023. + unsigned int bat_temperature;
  51024. +};
  51025. +
  51026. +static struct task_struct *battery_tsk;
  51027. +
  51028. +static DEFINE_MUTEX(bat_info_lock);
  51029. +struct bat_info {
  51030. + unsigned int ac_in;
  51031. + unsigned int bat_in;
  51032. + unsigned int bat_flag;
  51033. + /* we use capacity for caculating the life and time */
  51034. + unsigned int curr_bat_cap;
  51035. +
  51036. + /* battery designed capacity */
  51037. + unsigned int bat_design_cap;
  51038. + /* battery designed voltage */
  51039. + unsigned int bat_design_vol;
  51040. + /* battery capacity after full charged */
  51041. + unsigned int bat_full_charged_cap;
  51042. + /* battery vendor number */
  51043. + unsigned char bat_vendor;
  51044. + /* battery cell count */
  51045. + unsigned char bat_cell_count;
  51046. +
  51047. + /* battery dynamic charge/discharge voltage */
  51048. + unsigned int bat_voltage;
  51049. + /* battery dynamic charge/discharge current */
  51050. + int bat_current;
  51051. + /* battery current temperature */
  51052. + unsigned int bat_temperature;
  51053. +} bat_info = {
  51054. + .ac_in = APM_AC_UNKNOWN,
  51055. + .bat_in = APM_BATTERY_STATUS_UNKNOWN,
  51056. + .curr_bat_cap = 0,
  51057. + /* fixed value */
  51058. + .bat_design_cap = 0,
  51059. + .bat_full_charged_cap = 0,
  51060. + .bat_design_vol = 0,
  51061. + .bat_vendor = 0,
  51062. + .bat_cell_count = 0,
  51063. + /* rest variable */
  51064. + .bat_voltage = 0,
  51065. + .bat_current = 0,
  51066. + .bat_temperature = 0
  51067. +};
  51068. +
  51069. +/*
  51070. + * 1.4 :
  51071. + * 1, 89inch basic work version.
  51072. + * 2, you should set xorg.conf ServerFlag of "NoPM" to true
  51073. + * 1.5 :
  51074. + * 1, bat_flag is added to struct bat_info.
  51075. + * 2, BAT_MIN_THRESHOLD is changed to 5%.
  51076. + */
  51077. +static const char driver_version[] = VERSION; /* no spaces */
  51078. +
  51079. +static struct miscdevice apm_device = {
  51080. + .minor = ECBAT_MINOR_DEV,
  51081. + .name = "apm_bios",
  51082. + .fops = NULL
  51083. +};
  51084. +
  51085. +#ifdef CONFIG_PROC_FS
  51086. +static int bat_proc_read(char *page, char **start, off_t off, int count,
  51087. + int *eof, void *data);
  51088. +static struct proc_dir_entry *bat_proc_entry;
  51089. +
  51090. +static int bat_proc_read(char *page, char **start, off_t off, int count,
  51091. + int *eof, void *data)
  51092. +{
  51093. + struct apm_pwr_info info;
  51094. + char *units;
  51095. + int ret;
  51096. +
  51097. + mutex_lock(&bat_info_lock);
  51098. + info.battery_life = bat_info.curr_bat_cap;
  51099. + info.ac_line_status = bat_info.ac_in;
  51100. + info.battery_status = bat_info.bat_in;
  51101. + info.battery_flag = bat_info.bat_flag;
  51102. + info.bat_voltage = bat_info.bat_voltage;
  51103. + if (bat_info.bat_current & 0x8000)
  51104. + info.bat_current = 0xffff - bat_info.bat_current;
  51105. + else
  51106. + info.bat_current = bat_info.bat_current;
  51107. + info.bat_temperature = bat_info.bat_temperature;
  51108. +
  51109. + /* this should be charged according to the capacity-time flow. */
  51110. + if (info.battery_status != APM_BATTERY_STATUS_NOT_PRESENT)
  51111. + info.time = ((bat_info.curr_bat_cap - 3) * 54 + 142) / 60;
  51112. + else
  51113. + info.time = 0x00;
  51114. + info.units = APM_UNITS_MINS;
  51115. +
  51116. + mutex_unlock(&bat_info_lock);
  51117. + switch (info.units) {
  51118. + default:
  51119. + units = "?";
  51120. + break;
  51121. + case 0:
  51122. + units = "min";
  51123. + break;
  51124. + case 1:
  51125. + units = "sec";
  51126. + break;
  51127. + }
  51128. +
  51129. + ret =
  51130. + sprintf(page,
  51131. + "%s 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s %dmV %dmA %d\n",
  51132. + driver_version, APM_32_BIT_SUPPORT, info.ac_line_status,
  51133. + info.battery_status, info.battery_flag, info.battery_life,
  51134. + info.time, units, info.bat_voltage, info.bat_current,
  51135. + info.bat_temperature);
  51136. +
  51137. + ret -= off;
  51138. + if (ret < off + count)
  51139. + *eof = 1;
  51140. + *start = page + off;
  51141. + if (ret > count)
  51142. + ret = count;
  51143. + if (ret < 0)
  51144. + ret = 0;
  51145. +
  51146. + return ret;
  51147. +}
  51148. +#endif
  51149. +
  51150. +static int battery_manager(void *arg)
  51151. +{
  51152. + unsigned char bat_charge;
  51153. + unsigned char power_flag;
  51154. + unsigned char bat_status;
  51155. + unsigned char charge_status;
  51156. +
  51157. + /* read out the fixed value */
  51158. + bat_info.bat_design_cap = (ec_read(REG_BAT_DESIGN_CAP_HIGH) << 8)
  51159. + | ec_read(REG_BAT_DESIGN_CAP_LOW);
  51160. + bat_info.bat_full_charged_cap = (ec_read(REG_BAT_FULLCHG_CAP_HIGH) << 8)
  51161. + | ec_read(REG_BAT_FULLCHG_CAP_LOW);
  51162. + bat_info.bat_design_vol = (ec_read(REG_BAT_DESIGN_VOL_HIGH) << 8)
  51163. + | ec_read(REG_BAT_DESIGN_VOL_LOW);
  51164. + bat_info.bat_vendor = ec_read(REG_BAT_VENDOR);
  51165. + bat_info.bat_cell_count = ec_read(REG_BAT_CELL_COUNT);
  51166. + if (bat_info.bat_vendor != 0) {
  51167. + printk(KERN_INFO
  51168. + "battery vendor(%s), cells count(%d), "
  51169. + "with designed capacity(%d),designed voltage(%d),"
  51170. + " full charged capacity(%d)\n",
  51171. + (bat_info.bat_vendor ==
  51172. + FLAG_BAT_VENDOR_SANYO) ? "SANYO" : "SIMPLO",
  51173. + (bat_info.bat_cell_count == FLAG_BAT_CELL_3S1P) ? 3 : 6,
  51174. + bat_info.bat_design_cap, bat_info.bat_design_vol,
  51175. + bat_info.bat_full_charged_cap);
  51176. + }
  51177. +
  51178. + PRINTK_DBG(KERN_DEBUG "Battery manager thread started.\n");
  51179. + while (1) {
  51180. + set_current_state(TASK_INTERRUPTIBLE);
  51181. + /* schedule every 1s, it is better for changed to 1s. */
  51182. + schedule_timeout(HZ * 1);
  51183. +
  51184. + if (kthread_should_stop())
  51185. + break;
  51186. +
  51187. + mutex_lock(&bat_info_lock);
  51188. +
  51189. + bat_charge = ec_read(REG_BAT_CHARGE);
  51190. + power_flag = ec_read(REG_BAT_POWER);
  51191. + bat_status = ec_read(REG_BAT_STATUS);
  51192. + charge_status = ec_read(REG_BAT_CHARGE_STATUS);
  51193. + bat_info.bat_voltage =
  51194. + (ec_read(REG_BAT_VOLTAGE_HIGH) << 8) |
  51195. + (ec_read(REG_BAT_VOLTAGE_LOW));
  51196. + bat_info.bat_current =
  51197. + (ec_read(REG_BAT_CURRENT_HIGH) << 8) |
  51198. + (ec_read(REG_BAT_CURRENT_LOW));
  51199. + bat_info.bat_temperature =
  51200. + (ec_read(REG_BAT_TEMPERATURE_HIGH) << 8) |
  51201. + (ec_read(REG_BAT_TEMPERATURE_LOW));
  51202. + bat_info.curr_bat_cap =
  51203. + (ec_read(REG_BAT_RELATIVE_CAP_HIGH) << 8) |
  51204. + (ec_read(REG_BAT_RELATIVE_CAP_LOW));
  51205. +
  51206. + bat_info.ac_in =
  51207. + (power_flag & BIT_BAT_POWER_ACIN) ? APM_AC_ONLINE :
  51208. + APM_AC_OFFLINE;
  51209. + if (!(bat_status & BIT_BAT_STATUS_IN)) {
  51210. + /* there is no battery inserted */
  51211. + bat_info.bat_in = APM_BATTERY_STATUS_NOT_PRESENT;
  51212. + bat_info.bat_flag = APM_BATTERY_FLAG_NOT_PRESENT;
  51213. + } else {
  51214. + /* there is adapter inserted */
  51215. + if (bat_info.ac_in == APM_AC_ONLINE) {
  51216. + /* if the battery is not fully charged */
  51217. + if (!(bat_status & BIT_BAT_STATUS_FULL)) {
  51218. + bat_info.bat_in =
  51219. + APM_BATTERY_STATUS_CHARGING;
  51220. + bat_info.bat_flag =
  51221. + APM_BATTERY_FLAG_CHARGING;
  51222. + } else {
  51223. + /* if the battery is fully charged */
  51224. + bat_info.bat_in =
  51225. + APM_BATTERY_STATUS_HIGH;
  51226. + bat_info.bat_flag =
  51227. + APM_BATTERY_FLAG_HIGH;
  51228. + bat_info.curr_bat_cap = 100;
  51229. + }
  51230. + } else {
  51231. + /* if the battery is too low */
  51232. + if (bat_status & BIT_BAT_STATUS_LOW) {
  51233. + bat_info.bat_in =
  51234. + APM_BATTERY_STATUS_LOW;
  51235. + bat_info.bat_flag =
  51236. + APM_BATTERY_FLAG_LOW;
  51237. + if (bat_info.curr_bat_cap <=
  51238. + BAT_MIN_THRESHOLD) {
  51239. + bat_info.bat_in =
  51240. + APM_BATTERY_STATUS_CRITICAL;
  51241. + bat_info.bat_flag =
  51242. + APM_BATTERY_FLAG_CRITICAL;
  51243. + }
  51244. + /* we should power off the system now */
  51245. + } else {
  51246. + /* assume the battery is high enough. */
  51247. + bat_info.bat_in =
  51248. + APM_BATTERY_STATUS_HIGH;
  51249. + bat_info.bat_flag =
  51250. + APM_BATTERY_FLAG_HIGH;
  51251. + }
  51252. + }
  51253. + }
  51254. + mutex_unlock(&bat_info_lock);
  51255. + }
  51256. +
  51257. + PRINTK_DBG(KERN_DEBUG "Battery Management thread exit.\n");
  51258. + return 0;
  51259. +}
  51260. +
  51261. +static int __init apm_init(void)
  51262. +{
  51263. + int ret;
  51264. +
  51265. + printk(KERN_ERR
  51266. + "APM of battery on KB3310B Embedded Controller init.\n");
  51267. +
  51268. + battery_tsk = kthread_create(battery_manager, NULL, "battery_manager");
  51269. + if (IS_ERR(battery_tsk)) {
  51270. + ret = PTR_ERR(battery_tsk);
  51271. + kthread_stop(battery_tsk);
  51272. + battery_tsk = NULL;
  51273. + printk(KERN_ERR "ecbat : battery management error.\n");
  51274. + return ret;
  51275. + }
  51276. + battery_tsk->flags |= PF_NOFREEZE;
  51277. + wake_up_process(battery_tsk);
  51278. +
  51279. +#ifdef CONFIG_PROC_FS
  51280. + bat_proc_entry = NULL;
  51281. + bat_proc_entry = create_proc_entry("apm", S_IWUSR | S_IRUGO, NULL);
  51282. + if (bat_proc_entry == NULL) {
  51283. + printk(KERN_ERR "EC BAT : register /proc/apm failed.\n");
  51284. + return -EINVAL;
  51285. + }
  51286. + bat_proc_entry->read_proc = bat_proc_read;
  51287. + bat_proc_entry->write_proc = NULL;
  51288. + bat_proc_entry->data = NULL;
  51289. +#endif
  51290. +
  51291. + ret = misc_register(&apm_device);
  51292. + if (ret != 0) {
  51293. + remove_proc_entry("apm", NULL);
  51294. + kthread_stop(battery_tsk);
  51295. + printk(KERN_ERR "ecbat : misc register error.\n");
  51296. + }
  51297. + return ret;
  51298. +}
  51299. +
  51300. +static void __exit apm_exit(void)
  51301. +{
  51302. + misc_deregister(&apm_device);
  51303. +#ifdef CONFIG_PROC_FS
  51304. + remove_proc_entry("apm", NULL);
  51305. +#endif
  51306. + kthread_stop(battery_tsk);
  51307. +}
  51308. +
  51309. +module_init(apm_init);
  51310. +module_exit(apm_exit);
  51311. +
  51312. +MODULE_AUTHOR("liujl <liujl@lemote.com>");
  51313. +MODULE_DESCRIPTION("Advanced Power Management For Kb3310");
  51314. +MODULE_LICENSE("GPL");
  51315. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_ft.c linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_ft.c
  51316. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_ft.c 1970-01-01 01:00:00.000000000 +0100
  51317. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_ft.c 2009-08-23 19:01:04.000000000 +0200
  51318. @@ -0,0 +1,216 @@
  51319. +/*
  51320. + * EC(Embedded Controller) KB3310B Fan and Temperature management driver on
  51321. + * Linux
  51322. + *
  51323. + * Author: liujl <liujl@lemote.com>
  51324. + * Date : 2008-06-23
  51325. + *
  51326. + * NOTE: The SDA1/SCL1 in KB3310B are used to communicate with the
  51327. + * Temperature IC, Here we use ADT75 IC to handle the temperature management.
  51328. + * and the Fan is controller by ADT75AZ, but the status is reflected to the
  51329. + * KB3310 FANFB All the resources for handle battery management in KB3310B:
  51330. + * 1, one SMBus interface with port 1
  51331. + * 2, gpio14 input alternate for FANFB
  51332. + */
  51333. +
  51334. +#include <linux/module.h>
  51335. +#include <linux/poll.h>
  51336. +#include <linux/slab.h>
  51337. +#include <linux/proc_fs.h>
  51338. +#include <linux/miscdevice.h>
  51339. +#include <linux/capability.h>
  51340. +#include <linux/sched.h>
  51341. +#include <linux/device.h>
  51342. +#include <linux/kernel.h>
  51343. +#include <linux/list.h>
  51344. +#include <linux/init.h>
  51345. +#include <linux/completion.h>
  51346. +#include <linux/kthread.h>
  51347. +#include <linux/delay.h>
  51348. +#include <linux/timer.h>
  51349. +#include <asm/delay.h>
  51350. +
  51351. +#include "ec.h"
  51352. +#include "ec_misc_fn.h"
  51353. +
  51354. +#define EC_FT_DEV "ft"
  51355. +/* The EC Battery device is one of the misc device, here is his minor number. */
  51356. +#define ECFT_MINOR_DEV MISC_DYNAMIC_MINOR
  51357. +#define PROC_FT_DIR "ft"
  51358. +
  51359. +static struct task_struct *ft_tsk;
  51360. +static DEFINE_MUTEX(ft_info_lock);
  51361. +
  51362. +/* driver version */
  51363. +static const char driver_version[] = VERSION;
  51364. +
  51365. +/* fan speed divider */
  51366. +#define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/
  51367. +
  51368. +/* fan status : on or off */
  51369. +#define FAN_STATUS_ON 0x01
  51370. +#define FAN_STATUS_OFF 0x00
  51371. +/* fan is not running */
  51372. +#define FAN_SPEED_NONE 0x00
  51373. +/* temperature negative or positive */
  51374. +#define TEMPERATURE_POSITIVE 0x00
  51375. +#define TEMPERATURE_NEGATIVE 0x01
  51376. +/* temperature value is zero */
  51377. +#define TEMPERATURE_NONE 0x00
  51378. +struct ft_info {
  51379. + u8 fan_on;
  51380. + u16 fan_speed;
  51381. + u8 temperature_pn;
  51382. + u8 temperature;
  51383. +} ft_info = {
  51384. + .fan_on = FAN_STATUS_ON,
  51385. + .fan_speed = FAN_SPEED_NONE,
  51386. + .temperature_pn = TEMPERATURE_POSITIVE,
  51387. + .temperature = TEMPERATURE_NONE
  51388. +};
  51389. +
  51390. +static struct miscdevice ft_device = {
  51391. + .minor = ECFT_MINOR_DEV,
  51392. + .name = EC_FT_DEV,
  51393. + .fops = NULL
  51394. +};
  51395. +
  51396. +#ifdef CONFIG_PROC_FS
  51397. +static int ft_proc_read(char *page, char **start, off_t off, int count,
  51398. + int *eof, void *data);
  51399. +static struct proc_dir_entry *ft_proc_entry;
  51400. +
  51401. +static int ft_proc_read(char *page, char **start, off_t off, int count,
  51402. + int *eof, void *data)
  51403. +{
  51404. + struct ft_info info;
  51405. + int ret;
  51406. +
  51407. + mutex_lock(&ft_info_lock);
  51408. + info.fan_on = ft_info.fan_on;
  51409. + if (info.fan_on == FAN_STATUS_ON)
  51410. + info.fan_speed = ft_info.fan_speed;
  51411. + else
  51412. + info.fan_speed = 0x00;
  51413. + info.temperature_pn = ft_info.temperature_pn;
  51414. + info.temperature = ft_info.temperature;
  51415. + mutex_unlock(&ft_info_lock);
  51416. +
  51417. + ret =
  51418. + sprintf(page, "%s 0x%02x %d 0x%02x %d\n", driver_version,
  51419. + info.fan_on, info.fan_speed, info.temperature_pn,
  51420. + info.temperature);
  51421. +
  51422. + ret -= off;
  51423. + if (ret < off + count)
  51424. + *eof = 1;
  51425. +
  51426. + *start = page + off;
  51427. + if (ret > count)
  51428. + ret = count;
  51429. + if (ret < 0)
  51430. + ret = 0;
  51431. +
  51432. + return ret;
  51433. +}
  51434. +#endif
  51435. +
  51436. +static int ft_manager(void *arg)
  51437. +{
  51438. + u8 val, reg_val;
  51439. +
  51440. + PRINTK_DBG(KERN_DEBUG "Fan & Temperature Management thread started.\n");
  51441. + while (1) {
  51442. + set_current_state(TASK_INTERRUPTIBLE);
  51443. + /* schedule every 1s */
  51444. + schedule_timeout(HZ); /* 1s */
  51445. +
  51446. + if (kthread_should_stop())
  51447. + break;
  51448. +
  51449. + mutex_lock(&ft_info_lock);
  51450. +
  51451. + val = ec_read(REG_FAN_STATUS);
  51452. + ft_info.fan_speed =
  51453. + FAN_SPEED_DIVIDER /
  51454. + (((ec_read(REG_FAN_SPEED_HIGH) & 0x0f) << 8) |
  51455. + ec_read(REG_FAN_SPEED_LOW));
  51456. + reg_val = ec_read(REG_TEMPERATURE_VALUE);
  51457. +
  51458. + if (val)
  51459. + ft_info.fan_on = FAN_STATUS_ON;
  51460. + else
  51461. + ft_info.fan_on = FAN_STATUS_OFF;
  51462. +
  51463. + if (reg_val & (1 << 7)) {
  51464. + ft_info.temperature = (reg_val & 0x7f) - 128;
  51465. + ft_info.temperature_pn = TEMPERATURE_NEGATIVE;
  51466. + } else {
  51467. + ft_info.temperature = (reg_val & 0xff);
  51468. + ft_info.temperature_pn = TEMPERATURE_POSITIVE;
  51469. + }
  51470. + mutex_unlock(&ft_info_lock);
  51471. + }
  51472. +
  51473. + PRINTK_DBG(KERN_DEBUG "Fan and Temperature Management thread exit.\n");
  51474. +
  51475. + return 0;
  51476. +
  51477. +}
  51478. +
  51479. +static int __init ft_init(void)
  51480. +{
  51481. + int ret;
  51482. +
  51483. + printk(KERN_INFO
  51484. + "Fan and Temperature on KB3310B Embedded Controller init.\n");
  51485. + ft_tsk = kthread_create(ft_manager, NULL, "ft_manager");
  51486. + if (IS_ERR(ft_tsk)) {
  51487. + ret = PTR_ERR(ft_tsk);
  51488. + kthread_stop(ft_tsk);
  51489. + ft_tsk = NULL;
  51490. + printk(KERN_ERR "ecft : ft management error.\n");
  51491. + return ret;
  51492. + }
  51493. + ft_tsk->flags |= PF_NOFREEZE;
  51494. + wake_up_process(ft_tsk);
  51495. +
  51496. +#ifdef CONFIG_PROC_FS
  51497. + ft_proc_entry = NULL;
  51498. + ft_proc_entry = create_proc_entry(EC_FT_DEV, S_IWUSR | S_IRUGO, NULL);
  51499. + if (ft_proc_entry == NULL) {
  51500. + printk(KERN_ERR "EC FT : register /proc/ft failed.\n");
  51501. + return -EINVAL;
  51502. + }
  51503. + ft_proc_entry->read_proc = ft_proc_read;
  51504. + ft_proc_entry->write_proc = NULL;
  51505. + ft_proc_entry->data = NULL;
  51506. +#endif
  51507. +
  51508. + ret = misc_register(&ft_device);
  51509. + if (ret != 0) {
  51510. +#ifdef CONFIG_PROC_FS
  51511. + remove_proc_entry(EC_FT_DEV, NULL);
  51512. +#endif
  51513. + kthread_stop(ft_tsk);
  51514. + printk(KERN_ERR "ecft : fan&temperature register error.\n");
  51515. + }
  51516. +
  51517. + return ret;
  51518. +}
  51519. +
  51520. +static void __exit ft_exit(void)
  51521. +{
  51522. + misc_deregister(&ft_device);
  51523. +#ifdef CONFIG_PROC_FS
  51524. + remove_proc_entry(EC_FT_DEV, NULL);
  51525. +#endif
  51526. + kthread_stop(ft_tsk);
  51527. +}
  51528. +
  51529. +module_init(ft_init);
  51530. +module_exit(ft_exit);
  51531. +
  51532. +MODULE_AUTHOR("liujl <liujl@lemote.com>");
  51533. +MODULE_DESCRIPTION("Advanced Fan and Temperature Management For Kb3310");
  51534. +MODULE_LICENSE("GPL");
  51535. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec.h linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec.h
  51536. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec.h 1970-01-01 01:00:00.000000000 +0100
  51537. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec.h 2009-08-23 19:01:04.000000000 +0200
  51538. @@ -0,0 +1,218 @@
  51539. +/*
  51540. + * EC(Embedded Controller) KB3310B misc device driver header for Linux
  51541. + * Author: liujl <liujl@lemote.com>
  51542. + * Date : 2008-03-14
  51543. + *
  51544. + * EC relative header file. All the EC registers should be defined here.
  51545. + */
  51546. +
  51547. +#include <asm/uaccess.h>
  51548. +#include <asm/io.h>
  51549. +#include <asm/system.h>
  51550. +
  51551. +#define VERSION "1.37"
  51552. +
  51553. +/*
  51554. + * The following registers are determined by the EC index configuration.
  51555. + * 1, fill the PORT_HIGH as EC register high part.
  51556. + * 2, fill the PORT_LOW as EC register low part.
  51557. + * 3, fill the PORT_DATA as EC register write data or get the data from it.
  51558. + */
  51559. +#define EC_IO_PORT_HIGH 0x0381
  51560. +#define EC_IO_PORT_LOW 0x0382
  51561. +#define EC_IO_PORT_DATA 0x0383
  51562. +
  51563. +/* ec registers range */
  51564. +#define EC_MAX_REGADDR 0xFFFF
  51565. +#define EC_MIN_REGADDR 0xF000
  51566. +/* #define EC_RAM_ADDR 0xF400 */
  51567. +#define EC_RAM_ADDR 0xF800
  51568. +
  51569. +/* temperature & fan registers */
  51570. +#define REG_TEMPERATURE_VALUE 0xF458 /* current temperature value */
  51571. +#define REG_FAN_CONTROL 0xF4D2 /* fan control */
  51572. +#define BIT_FAN_CONTROL_ON (1 << 0)
  51573. +#define BIT_FAN_CONTROL_OFF (0 << 0)
  51574. +#define REG_FAN_STATUS 0xF4DA /* fan status */
  51575. +#define BIT_FAN_STATUS_ON (1 << 0)
  51576. +#define BIT_FAN_STATUS_OFF (0 << 0)
  51577. +#define REG_FAN_SPEED_HIGH 0xFE22 /* fan speed high byte */
  51578. +#define REG_FAN_SPEED_LOW 0xFE23 /* fan speed low byte */
  51579. +#define REG_FAN_SPEED_LEVEL 0xF4E4 /* fan speed level, from 1 to 5 */
  51580. +
  51581. +/* battery registers */
  51582. +#define REG_BAT_DESIGN_CAP_HIGH 0xF77D /* design capacity high byte */
  51583. +#define REG_BAT_DESIGN_CAP_LOW 0xF77E /* design capacity low byte */
  51584. +#define REG_BAT_FULLCHG_CAP_HIGH 0xF780 /* full charged capacity high byte */
  51585. +#define REG_BAT_FULLCHG_CAP_LOW 0xF781 /* full charged capacity low byte */
  51586. +#define REG_BAT_DESIGN_VOL_HIGH 0xF782 /* design voltage high byte */
  51587. +#define REG_BAT_DESIGN_VOL_LOW 0xF783 /* design voltage low byte */
  51588. +#define REG_BAT_CURRENT_HIGH 0xF784 /* battery in/out current high byte */
  51589. +#define REG_BAT_CURRENT_LOW 0xF785 /* battery in/out current low byte */
  51590. +#define REG_BAT_VOLTAGE_HIGH 0xF786 /* battery current voltage high byte */
  51591. +#define REG_BAT_VOLTAGE_LOW 0xF787 /* battery current voltage low byte */
  51592. +#define REG_BAT_TEMPERATURE_HIGH 0xF788 /* battery current temperature high byte */
  51593. +#define REG_BAT_TEMPERATURE_LOW 0xF789 /* battery current temperature low byte */
  51594. +#define REG_BAT_RELATIVE_CAP_HIGH 0xF492 /* relative capacity high byte */
  51595. +#define REG_BAT_RELATIVE_CAP_LOW 0xF493 /* relative capacity low byte */
  51596. +#define REG_BAT_VENDOR 0xF4C4 /* battery vendor number */
  51597. +#define FLAG_BAT_VENDOR_SANYO 0x01
  51598. +#define FLAG_BAT_VENDOR_SIMPLO 0x02
  51599. +#define REG_BAT_CELL_COUNT 0xF4C6 /* how many cells in one battery */
  51600. +#define FLAG_BAT_CELL_3S1P 0x03
  51601. +#define FLAG_BAT_CELL_3S2P 0x06
  51602. +#define REG_BAT_CHARGE 0xF4A2 /* macroscope battery charging */
  51603. +#define FLAG_BAT_CHARGE_DISCHARGE 0x01
  51604. +#define FLAG_BAT_CHARGE_CHARGE 0x02
  51605. +#define FLAG_BAT_CHARGE_ACPOWER 0x00
  51606. +#define REG_BAT_STATUS 0xF4B0
  51607. +#define BIT_BAT_STATUS_LOW (1 << 5)
  51608. +#define BIT_BAT_STATUS_DESTROY (1 << 2)
  51609. +#define BIT_BAT_STATUS_FULL (1 << 1)
  51610. +#define BIT_BAT_STATUS_IN (1 << 0)
  51611. +#define REG_BAT_CHARGE_STATUS 0xF4B1
  51612. +#define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) /* over temperature */
  51613. +#define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) /* pre-charge the battery */
  51614. +#define REG_BAT_STATE 0xF482
  51615. +#define BIT_BAT_STATE_CHARGING (1 << 1)
  51616. +#define BIT_BAT_STATE_DISCHARGING (1 << 0)
  51617. +#define REG_BAT_POWER 0xF440
  51618. +#define BIT_BAT_POWER_S3 (1 << 2) /* enter s3 standby mode */
  51619. +#define BIT_BAT_POWER_ON (1 << 1) /* system is on */
  51620. +#define BIT_BAT_POWER_ACIN (1 << 0) /* adapter is inserted */
  51621. +
  51622. +/* other registers */
  51623. +#define REG_AUDIO_MUTE 0xF4E7 /* audio mute : rd/wr */
  51624. +#define BIT_AUDIO_MUTE_ON (1 << 0)
  51625. +#define BIT_AUDIO_MUTE_OFF (0 << 0)
  51626. +#define REG_AUDIO_BEEP 0xF4D0 /* audio beep and reset : rd/wr */
  51627. +#define BIT_AUDIO_BEEP_ON (1 << 0)
  51628. +#define BIT_AUDIO_BEEP_OFF (0 << 0)
  51629. +#define REG_USB0_FLAG 0xF461 /* usb0 port power or not : rd/wr */
  51630. +#define BIT_USB0_FLAG_ON (1 << 0)
  51631. +#define BIT_USB0_FLAG_OFF (0 << 0)
  51632. +#define REG_USB1_FLAG 0xF462 /* usb1 port power or not : rd/wr */
  51633. +#define BIT_USB1_FLAG_ON (1 << 0)
  51634. +#define BIT_USB1_FLAG_OFF (0 << 0)
  51635. +#define REG_USB2_FLAG 0xF463 /* usb2 port power or not : rd/wr */
  51636. +#define BIT_USB2_FLAG_ON (1 << 0)
  51637. +#define BIT_USB2_FLAG_OFF (0 << 0)
  51638. +#define REG_CRT_DETECT 0xF4AD /* detected CRT exist or not */
  51639. +#define BIT_CRT_DETECT_PLUG (1 << 0)
  51640. +#define BIT_CRT_DETECT_UNPLUG (0 << 0)
  51641. +#define REG_LID_DETECT 0xF4BD /* detected LID is on or not */
  51642. +#define BIT_LID_DETECT_ON (1 << 0)
  51643. +#define BIT_LID_DETECT_OFF (0 << 0)
  51644. +#define REG_RESET 0xF4EC /* reset the machine auto-clear : rd/wr */
  51645. +#define BIT_RESET_ON (1 << 0)
  51646. +#define BIT_RESET_OFF (0 << 0)
  51647. +#define REG_LED 0xF4C8 /* light the led : rd/wr */
  51648. +#define BIT_LED_RED_POWER (1 << 0)
  51649. +#define BIT_LED_ORANGE_POWER (1 << 1)
  51650. +#define BIT_LED_GREEN_CHARGE (1 << 2)
  51651. +#define BIT_LED_RED_CHARGE (1 << 3)
  51652. +#define BIT_LED_NUMLOCK (1 << 4)
  51653. +#define REG_LED_TEST 0xF4C2 /* test led mode, all led on or off */
  51654. +#define BIT_LED_TEST_IN (1 << 0)
  51655. +#define BIT_LED_TEST_OUT (0 << 0)
  51656. +#define REG_DISPLAY_BRIGHTNESS 0xF4F5 /* 9 stages LCD backlight brightness adjust */
  51657. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_0 0
  51658. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_1 1
  51659. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_2 2
  51660. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_3 3
  51661. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_4 4
  51662. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_5 5
  51663. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_6 6
  51664. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_7 7
  51665. +#define FLAG_DISPLAY_BRIGHTNESS_LEVEL_8 8
  51666. +#define REG_CAMERA_STATUS 0xF46A /* camera is in ON/OFF status. */
  51667. +#define BIT_CAMERA_STATUS_ON (1 << 0)
  51668. +#define BIT_CAMERA_STATUS_OFF (0 << 0)
  51669. +#define REG_CAMERA_CONTROL 0xF7B7 /* control camera to ON/OFF. */
  51670. +#define BIT_CAMERA_CONTROL_OFF (1 << 1)
  51671. +#define BIT_CAMERA_CONTROL_ON (1 << 1)
  51672. +#define REG_AUDIO_VOLUME 0xF46C /* The register to show volume level */
  51673. +#define FLAG_AUDIO_VOLUME_LEVEL_0 0
  51674. +#define FLAG_AUDIO_VOLUME_LEVEL_1 1
  51675. +#define FLAG_AUDIO_VOLUME_LEVEL_2 2
  51676. +#define FLAG_AUDIO_VOLUME_LEVEL_3 3
  51677. +#define FLAG_AUDIO_VOLUME_LEVEL_4 4
  51678. +#define FLAG_AUDIO_VOLUME_LEVEL_5 5
  51679. +#define FLAG_AUDIO_VOLUME_LEVEL_6 6
  51680. +#define FLAG_AUDIO_VOLUME_LEVEL_7 7
  51681. +#define FLAG_AUDIO_VOLUME_LEVEL_8 8
  51682. +#define FLAG_AUDIO_VOLUME_LEVEL_9 9
  51683. +#define FLAG_AUDIO_VOLUME_LEVEL_10 0x0A
  51684. +#define REG_WLAN_STATUS 0xF4FA /* Wlan Status */
  51685. +#define BIT_WLAN_STATUS_ON (1 << 0)
  51686. +#define BIT_WLAN_STATUS_OFF (0 << 0)
  51687. +#define REG_DISPLAY_LCD 0xF79F /* Black screen Status */
  51688. +#define BIT_DISPLAY_LCD_ON (1 << 0)
  51689. +#define BIT_DISPLAY_LCD_OFF (0 << 0)
  51690. +#define REG_BACKLIGHT_CTRL 0xF7BD /* LCD backlight control: off/restore */
  51691. +#define BIT_BACKLIGHT_ON (1 << 0)
  51692. +#define BIT_BACKLIGHT_OFF (0 << 0)
  51693. +
  51694. +/* SCI Event Number from EC */
  51695. +#define SCI_EVENT_NUM_LID 0x23 /* press the lid or not */
  51696. +#define SCI_EVENT_NUM_DISPLAY_TOGGLE 0x24 /* Fn+F3 for display switch */
  51697. +#define SCI_EVENT_NUM_SLEEP 0x25 /* Fn+F1 for entering sleep mode */
  51698. +#define SCI_EVENT_NUM_OVERTEMP 0x26 /* Over-temperature happened */
  51699. +#define SCI_EVENT_NUM_CRT_DETECT 0x27 /* CRT is connected */
  51700. +#define SCI_EVENT_NUM_CAMERA 0x28 /* Camera is on or off */
  51701. +#define SCI_EVENT_NUM_USB_OC2 0x29 /* USB2 Over Current occurred */
  51702. +#define SCI_EVENT_NUM_USB_OC0 0x2A /* USB0 Over Current occurred */
  51703. +#define SCI_EVENT_NUM_AC_BAT 0x2E /* ac & battery relative issue */
  51704. +#define BIT_AC_BAT_BAT_IN 0
  51705. +#define BIT_AC_BAT_AC_IN 1
  51706. +#define BIT_AC_BAT_INIT_CAP 2
  51707. +#define BIT_AC_BAT_CHARGE_MODE 3
  51708. +#define BIT_AC_BAT_STOP_CHARGE 4
  51709. +#define BIT_AC_BAT_BAT_LOW 5
  51710. +#define BIT_AC_BAT_BAT_FULL 6
  51711. +#define SCI_EVENT_NUM_DISPLAY_BRIGHTNESS 0x2D /* LCD backlight brightness adjust */
  51712. +#define SCI_EVENT_NUM_AUDIO_VOLUME 0x2F /* Volume adjust */
  51713. +#define SCI_EVENT_NUM_WLAN 0x30 /* Wlan is on or off */
  51714. +#define SCI_EVENT_NUM_AUDIO_MUTE 0x2C /* Mute is on or off */
  51715. +#define SCI_EVENT_NUM_BLACK_SCREEN 0x2B /* Black screen is on or off */
  51716. +
  51717. +#define SCI_INDEX_LID 0x00
  51718. +#define SCI_INDEX_DISPLAY_TOGGLE 0x01
  51719. +#define SCI_INDEX_SLEEP 0x02
  51720. +#define SCI_INDEX_OVERTEMP 0x03
  51721. +#define SCI_INDEX_CRT_DETECT 0x04
  51722. +#define SCI_INDEX_CAMERA 0x05
  51723. +#define SCI_INDEX_USB_OC2 0x06
  51724. +#define SCI_INDEX_USB_OC0 0x07
  51725. +#define SCI_INDEX_AC_BAT 0x08
  51726. +#define SCI_INDEX_DISPLAY_BRIGHTNESS_INC 0x09
  51727. +#define SCI_INDEX_DISPLAY_BRIGHTNESS_DEC 0x0A
  51728. +#define SCI_INDEX_AUDIO_VOLUME_INC 0x0B
  51729. +#define SCI_INDEX_AUDIO_VOLUME_DEC 0x0C
  51730. +#define SCI_INDEX_WLAN 0x0D
  51731. +#define SCI_INDEX_AUDIO_MUTE 0x0E
  51732. +#define SCI_INDEX_BLACK_SCREEN 0x0F
  51733. +
  51734. +#define SCI_MAX_EVENT_COUNT 0x10
  51735. +
  51736. +/* EC access port for sci communication */
  51737. +#define EC_CMD_PORT 0x66
  51738. +#define EC_STS_PORT 0x66
  51739. +#define EC_DAT_PORT 0x62
  51740. +#define CMD_INIT_IDLE_MODE 0xdd
  51741. +#define CMD_EXIT_IDLE_MODE 0xdf
  51742. +#define CMD_INIT_RESET_MODE 0xd8
  51743. +#define CMD_REBOOT_SYSTEM 0x8c
  51744. +#define CMD_GET_EVENT_NUM 0x84
  51745. +#define CMD_PROGRAM_PIECE 0xda
  51746. +
  51747. +/* #define DEBUG_PRINTK */
  51748. +
  51749. +#ifdef DEBUG_PRINTK
  51750. +#define PRINTK_DBG(args...) printk(args)
  51751. +#else
  51752. +#define PRINTK_DBG(args...)
  51753. +#endif
  51754. +
  51755. +extern void _rdmsr(u32 addr, u32 *hi, u32 *lo);
  51756. +extern void _wrmsr(u32 addr, u32 hi, u32 lo);
  51757. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc.c linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc.c
  51758. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc.c 1970-01-01 01:00:00.000000000 +0100
  51759. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc.c 2009-08-23 19:01:04.000000000 +0200
  51760. @@ -0,0 +1,913 @@
  51761. +/*
  51762. + * EC(Embedded Controller) KB3310B misc device driver on Linux
  51763. + * Author: liujl <liujl@lemote.com>
  51764. + * Date : 2008-04-20
  51765. + *
  51766. + * NOTE :
  51767. + * 1, The EC resources accessing and programming are supported.
  51768. + */
  51769. +
  51770. +#include <linux/module.h>
  51771. +#include <linux/poll.h>
  51772. +#include <linux/slab.h>
  51773. +#include <linux/proc_fs.h>
  51774. +#include <linux/miscdevice.h>
  51775. +#include <linux/apm_bios.h>
  51776. +#include <linux/capability.h>
  51777. +#include <linux/sched.h>
  51778. +#include <linux/pm.h>
  51779. +#include <linux/apm-emulation.h>
  51780. +#include <linux/device.h>
  51781. +#include <linux/kernel.h>
  51782. +#include <linux/list.h>
  51783. +#include <linux/init.h>
  51784. +#include <linux/completion.h>
  51785. +#include <linux/kthread.h>
  51786. +#include <linux/delay.h>
  51787. +#include <linux/timer.h>
  51788. +
  51789. +#include <asm/delay.h>
  51790. +
  51791. +#include "ec.h"
  51792. +#include "ec_misc.h"
  51793. +
  51794. +/* open for using rom protection action */
  51795. +#define EC_ROM_PROTECTION
  51796. +
  51797. +/* this spinlock is dedicated for ec_read & ec_write function */
  51798. +DEFINE_SPINLOCK(index_access_lock);
  51799. +/* this spinlock is dedicated for 62&66 ports access */
  51800. +DEFINE_SPINLOCK(port_access_lock);
  51801. +/* information used for programming */
  51802. +struct ec_info ecinfo;
  51803. +
  51804. +/* read a byte from EC registers throught index-io */
  51805. +unsigned char ec_read(unsigned short addr)
  51806. +{
  51807. + unsigned char value;
  51808. + unsigned long flags;
  51809. +
  51810. + spin_lock_irqsave(&index_access_lock, flags);
  51811. + outb((addr & 0xff00) >> 8, EC_IO_PORT_HIGH);
  51812. + outb((addr & 0x00ff), EC_IO_PORT_LOW);
  51813. + value = inb(EC_IO_PORT_DATA);
  51814. + spin_unlock_irqrestore(&index_access_lock, flags);
  51815. +
  51816. + return value;
  51817. +}
  51818. +EXPORT_SYMBOL_GPL(ec_read);
  51819. +
  51820. +/* write a byte to EC registers throught index-io */
  51821. +void ec_write(unsigned short addr, unsigned char val)
  51822. +{
  51823. + unsigned long flags;
  51824. +
  51825. + spin_lock_irqsave(&index_access_lock, flags);
  51826. + outb((addr & 0xff00) >> 8, EC_IO_PORT_HIGH);
  51827. + outb((addr & 0x00ff), EC_IO_PORT_LOW);
  51828. + outb(val, EC_IO_PORT_DATA);
  51829. + inb(EC_IO_PORT_DATA); /* flush the write action */
  51830. + spin_unlock_irqrestore(&index_access_lock, flags);
  51831. +
  51832. + return;
  51833. +}
  51834. +EXPORT_SYMBOL_GPL(ec_write);
  51835. +
  51836. +/*
  51837. + * ec_query_seq
  51838. + * this function is used for ec command writing and corresponding status query
  51839. + */
  51840. +int ec_query_seq(unsigned char cmd)
  51841. +{
  51842. + int timeout;
  51843. + unsigned char status;
  51844. + unsigned long flags;
  51845. + int ret = 0;
  51846. +
  51847. + spin_lock_irqsave(&port_access_lock, flags);
  51848. +
  51849. + /* make chip goto reset mode */
  51850. + udelay(EC_REG_DELAY);
  51851. + outb(cmd, EC_CMD_PORT);
  51852. + udelay(EC_REG_DELAY);
  51853. +
  51854. + /* check if the command is received by ec */
  51855. + timeout = EC_CMD_TIMEOUT;
  51856. + status = inb(EC_STS_PORT);
  51857. + while (timeout--) {
  51858. + if (status & (1 << 1)) {
  51859. + status = inb(EC_STS_PORT);
  51860. + udelay(EC_REG_DELAY);
  51861. + continue;
  51862. + }
  51863. + break;
  51864. + }
  51865. +
  51866. + if (timeout <= 0) {
  51867. + printk(KERN_ERR "EC QUERY SEQ : deadable error : timeout...\n");
  51868. + ret = -EINVAL;
  51869. + } else {
  51870. + PRINTK_DBG(KERN_INFO
  51871. + "(%x/%d)ec issued command %d status : 0x%x\n",
  51872. + timeout, EC_CMD_TIMEOUT - timeout, cmd, status);
  51873. + }
  51874. +
  51875. + spin_unlock_irqrestore(&port_access_lock, flags);
  51876. +
  51877. + return ret;
  51878. +}
  51879. +EXPORT_SYMBOL_GPL(ec_query_seq);
  51880. +
  51881. +/* enable the chip reset mode */
  51882. +static int ec_init_reset_mode(void)
  51883. +{
  51884. + int timeout;
  51885. + unsigned char status = 0;
  51886. + int ret = 0;
  51887. +
  51888. + /* make chip goto reset mode */
  51889. + ret = ec_query_seq(CMD_INIT_RESET_MODE);
  51890. + if (ret < 0) {
  51891. + printk(KERN_ERR "ec init reset mode failed.\n");
  51892. + goto out;
  51893. + }
  51894. +
  51895. + /* make the action take active */
  51896. + timeout = EC_CMD_TIMEOUT;
  51897. + status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
  51898. + while (timeout--) {
  51899. + if (status) {
  51900. + udelay(EC_REG_DELAY);
  51901. + break;
  51902. + }
  51903. + status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
  51904. + udelay(EC_REG_DELAY);
  51905. + }
  51906. + if (timeout <= 0) {
  51907. + printk(KERN_ERR "ec rom fixup : can't check reset status.\n");
  51908. + ret = -EINVAL;
  51909. + } else {
  51910. + PRINTK_DBG(KERN_INFO "(%d/%d)reset 0xf710 : 0x%x\n", timeout,
  51911. + EC_CMD_TIMEOUT - timeout, status);
  51912. + }
  51913. +
  51914. + /* set MCU to reset mode */
  51915. + udelay(EC_REG_DELAY);
  51916. + status = ec_read(REG_PXCFG);
  51917. + status |= (1 << 0);
  51918. + ec_write(REG_PXCFG, status);
  51919. + udelay(EC_REG_DELAY);
  51920. +
  51921. + /* disable FWH/LPC */
  51922. + udelay(EC_REG_DELAY);
  51923. + status = ec_read(REG_LPCCFG);
  51924. + status &= ~(1 << 7);
  51925. + ec_write(REG_LPCCFG, status);
  51926. + udelay(EC_REG_DELAY);
  51927. +
  51928. + PRINTK_DBG(KERN_INFO "entering reset mode ok..............\n");
  51929. +
  51930. + out:
  51931. + return ret;
  51932. +}
  51933. +
  51934. +/* make ec exit from reset mode */
  51935. +static void ec_exit_reset_mode(void)
  51936. +{
  51937. + unsigned char regval;
  51938. +
  51939. + udelay(EC_REG_DELAY);
  51940. + regval = ec_read(REG_LPCCFG);
  51941. + regval |= (1 << 7);
  51942. + ec_write(REG_LPCCFG, regval);
  51943. + regval = ec_read(REG_PXCFG);
  51944. + regval &= ~(1 << 0);
  51945. + ec_write(REG_PXCFG, regval);
  51946. + PRINTK_DBG(KERN_INFO "exit reset mode ok..................\n");
  51947. +
  51948. + return;
  51949. +}
  51950. +
  51951. +/* make ec disable WDD */
  51952. +static void ec_disable_WDD(void)
  51953. +{
  51954. + unsigned char status;
  51955. +
  51956. + udelay(EC_REG_DELAY);
  51957. + status = ec_read(REG_WDTCFG);
  51958. + ec_write(REG_WDTPF, 0x03);
  51959. + ec_write(REG_WDTCFG, (status & 0x80) | 0x48);
  51960. + PRINTK_DBG(KERN_INFO "Disable WDD ok..................\n");
  51961. +
  51962. + return;
  51963. +}
  51964. +
  51965. +/* make ec enable WDD */
  51966. +static void ec_enable_WDD(void)
  51967. +{
  51968. + unsigned char status;
  51969. +
  51970. + udelay(EC_REG_DELAY);
  51971. + status = ec_read(REG_WDTCFG);
  51972. + ec_write(REG_WDT, 0x28); /* set WDT 5sec(0x28) */
  51973. + ec_write(REG_WDTCFG, (status & 0x80) | 0x03);
  51974. + PRINTK_DBG(KERN_INFO "Enable WDD ok..................\n");
  51975. +
  51976. + return;
  51977. +}
  51978. +
  51979. +/* make ec goto idle mode */
  51980. +static int ec_init_idle_mode(void)
  51981. +{
  51982. + int timeout;
  51983. + unsigned char status = 0;
  51984. + int ret = 0;
  51985. +
  51986. + ec_query_seq(CMD_INIT_IDLE_MODE);
  51987. +
  51988. + /* make the action take active */
  51989. + timeout = EC_CMD_TIMEOUT;
  51990. + status = ec_read(REG_POWER_MODE) & FLAG_IDLE_MODE;
  51991. + while (timeout--) {
  51992. + if (status) {
  51993. + udelay(EC_REG_DELAY);
  51994. + break;
  51995. + }
  51996. + status = ec_read(REG_POWER_MODE) & FLAG_IDLE_MODE;
  51997. + udelay(EC_REG_DELAY);
  51998. + }
  51999. + if (timeout <= 0) {
  52000. + printk(KERN_ERR "ec rom fixup : can't check out the status.\n");
  52001. + ret = -EINVAL;
  52002. + } else {
  52003. + PRINTK_DBG(KERN_INFO "(%d/%d)0xf710 : 0x%x\n", timeout,
  52004. + EC_CMD_TIMEOUT - timeout, ec_read(REG_POWER_MODE));
  52005. + }
  52006. +
  52007. + PRINTK_DBG(KERN_INFO "entering idle mode ok...................\n");
  52008. +
  52009. + return ret;
  52010. +}
  52011. +
  52012. +/* make ec exit from idle mode */
  52013. +static int ec_exit_idle_mode(void)
  52014. +{
  52015. +
  52016. + ec_query_seq(CMD_EXIT_IDLE_MODE);
  52017. +
  52018. + PRINTK_DBG(KERN_INFO "exit idle mode ok...................\n");
  52019. +
  52020. + return 0;
  52021. +}
  52022. +
  52023. +static int ec_instruction_cycle(void)
  52024. +{
  52025. + unsigned long timeout;
  52026. + int ret = 0;
  52027. +
  52028. + timeout = EC_FLASH_TIMEOUT;
  52029. + while (timeout-- >= 0) {
  52030. + if (!(ec_read(REG_XBISPICFG) & SPICFG_SPI_BUSY))
  52031. + break;
  52032. + }
  52033. + if (timeout <= 0) {
  52034. + printk(KERN_ERR
  52035. + "EC_INSTRUCTION_CYCLE : timeout for check flag.\n");
  52036. + ret = -EINVAL;
  52037. + goto out;
  52038. + }
  52039. +
  52040. + out:
  52041. + return ret;
  52042. +}
  52043. +
  52044. +/* To see if the ec is in busy state or not. */
  52045. +static inline int ec_flash_busy(unsigned long timeout)
  52046. +{
  52047. + /* assurance the first command be going to rom */
  52048. + if (ec_instruction_cycle() < 0)
  52049. + return EC_STATE_BUSY;
  52050. +#if 1
  52051. + timeout = timeout / EC_MAX_DELAY_UNIT;
  52052. + while (timeout-- > 0) {
  52053. + /* check the rom's status of busy flag */
  52054. + ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
  52055. + if (ec_instruction_cycle() < 0)
  52056. + return EC_STATE_BUSY;
  52057. + if ((ec_read(REG_XBISPIDAT) & 0x01) == 0x00)
  52058. + return EC_STATE_IDLE;
  52059. + udelay(EC_MAX_DELAY_UNIT);
  52060. + }
  52061. + if (timeout <= 0) {
  52062. + printk(KERN_ERR
  52063. + "EC_FLASH_BUSY : timeout for check rom flag.\n");
  52064. + return EC_STATE_BUSY;
  52065. + }
  52066. +#else
  52067. + /* check the rom's status of busy flag */
  52068. + ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
  52069. + if (ec_instruction_cycle() < 0)
  52070. + return EC_STATE_BUSY;
  52071. +
  52072. + timeout = timeout / EC_MAX_DELAY_UNIT;
  52073. + while (timeout-- > 0) {
  52074. + if ((ec_read(REG_XBISPIDAT) & 0x01) == 0x00)
  52075. + return EC_STATE_IDLE;
  52076. + udelay(EC_MAX_DELAY_UNIT);
  52077. + }
  52078. + if (timeout <= 0) {
  52079. + printk(KERN_ERR
  52080. + "EC_FLASH_BUSY : timeout for check rom flag.\n");
  52081. + return EC_STATE_BUSY;
  52082. + }
  52083. +#endif
  52084. +
  52085. + return EC_STATE_IDLE;
  52086. +}
  52087. +
  52088. +static int rom_instruction_cycle(unsigned char cmd)
  52089. +{
  52090. + unsigned long timeout = 0;
  52091. +
  52092. + switch (cmd) {
  52093. + case SPICMD_READ_STATUS:
  52094. + case SPICMD_WRITE_ENABLE:
  52095. + case SPICMD_WRITE_DISABLE:
  52096. + case SPICMD_READ_BYTE:
  52097. + case SPICMD_HIGH_SPEED_READ:
  52098. + timeout = 0;
  52099. + break;
  52100. + case SPICMD_WRITE_STATUS:
  52101. + timeout = 300 * 1000;
  52102. + break;
  52103. + case SPICMD_BYTE_PROGRAM:
  52104. + timeout = 5 * 1000;
  52105. + break;
  52106. + case SPICMD_SST_SEC_ERASE:
  52107. + case SPICMD_SEC_ERASE:
  52108. + timeout = 1000 * 1000;
  52109. + break;
  52110. + case SPICMD_SST_BLK_ERASE:
  52111. + case SPICMD_BLK_ERASE:
  52112. + timeout = 3 * 1000 * 1000;
  52113. + break;
  52114. + case SPICMD_SST_CHIP_ERASE:
  52115. + case SPICMD_CHIP_ERASE:
  52116. + timeout = 20 * 1000 * 1000;
  52117. + break;
  52118. + default:
  52119. + timeout = EC_SPICMD_STANDARD_TIMEOUT;
  52120. + }
  52121. + if (timeout == 0)
  52122. + return ec_instruction_cycle();
  52123. + if (timeout < EC_SPICMD_STANDARD_TIMEOUT)
  52124. + timeout = EC_SPICMD_STANDARD_TIMEOUT;
  52125. +
  52126. + return ec_flash_busy(timeout);
  52127. +}
  52128. +
  52129. +/* delay for start/stop action */
  52130. +static void delay_spi(int n)
  52131. +{
  52132. + while (n--)
  52133. + inb(EC_IO_PORT_HIGH);
  52134. +}
  52135. +
  52136. +/* start the action to spi rom function */
  52137. +static void ec_start_spi(void)
  52138. +{
  52139. + unsigned char val;
  52140. +
  52141. + delay_spi(SPI_FINISH_WAIT_TIME);
  52142. + val = ec_read(REG_XBISPICFG) | SPICFG_EN_SPICMD | SPICFG_AUTO_CHECK;
  52143. + ec_write(REG_XBISPICFG, val);
  52144. + delay_spi(SPI_FINISH_WAIT_TIME);
  52145. +}
  52146. +
  52147. +/* stop the action to spi rom function */
  52148. +static void ec_stop_spi(void)
  52149. +{
  52150. + unsigned char val;
  52151. +
  52152. + delay_spi(SPI_FINISH_WAIT_TIME);
  52153. + val =
  52154. + ec_read(REG_XBISPICFG) & (~(SPICFG_EN_SPICMD | SPICFG_AUTO_CHECK));
  52155. + ec_write(REG_XBISPICFG, val);
  52156. + delay_spi(SPI_FINISH_WAIT_TIME);
  52157. +}
  52158. +
  52159. +/* read one byte from xbi interface */
  52160. +static int ec_read_byte(unsigned int addr, unsigned char *byte)
  52161. +{
  52162. + int ret = 0;
  52163. +
  52164. + /* enable spicmd writing. */
  52165. + ec_start_spi();
  52166. +
  52167. + /* enable write spi flash */
  52168. + ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
  52169. + if (rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY) {
  52170. + printk(KERN_ERR "EC_READ_BYTE : SPICMD_WRITE_ENABLE failed.\n");
  52171. + ret = -EINVAL;
  52172. + goto out;
  52173. + }
  52174. +
  52175. + /* write the address */
  52176. + ec_write(REG_XBISPIA2, (addr & 0xff0000) >> 16);
  52177. + ec_write(REG_XBISPIA1, (addr & 0x00ff00) >> 8);
  52178. + ec_write(REG_XBISPIA0, (addr & 0x0000ff) >> 0);
  52179. + /* start action */
  52180. + ec_write(REG_XBISPICMD, SPICMD_HIGH_SPEED_READ);
  52181. + if (rom_instruction_cycle(SPICMD_HIGH_SPEED_READ) == EC_STATE_BUSY) {
  52182. + printk(KERN_ERR
  52183. + "EC_READ_BYTE : SPICMD_HIGH_SPEED_READ failed.\n");
  52184. + ret = -EINVAL;
  52185. + goto out;
  52186. + }
  52187. +
  52188. + *byte = ec_read(REG_XBISPIDAT);
  52189. +
  52190. + out:
  52191. + /* disable spicmd writing. */
  52192. + ec_stop_spi();
  52193. +
  52194. + return ret;
  52195. +}
  52196. +
  52197. +/* write one byte to ec rom */
  52198. +static int ec_write_byte(unsigned int addr, unsigned char byte)
  52199. +{
  52200. + int ret = 0;
  52201. +
  52202. + /* enable spicmd writing. */
  52203. + ec_start_spi();
  52204. +
  52205. + /* enable write spi flash */
  52206. + ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
  52207. + if (rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY) {
  52208. + printk(KERN_ERR
  52209. + "EC_WRITE_BYTE : SPICMD_WRITE_ENABLE failed.\n");
  52210. + ret = -EINVAL;
  52211. + goto out;
  52212. + }
  52213. +
  52214. + /* write the address */
  52215. + ec_write(REG_XBISPIA2, (addr & 0xff0000) >> 16);
  52216. + ec_write(REG_XBISPIA1, (addr & 0x00ff00) >> 8);
  52217. + ec_write(REG_XBISPIA0, (addr & 0x0000ff) >> 0);
  52218. + ec_write(REG_XBISPIDAT, byte);
  52219. + /* start action */
  52220. + ec_write(REG_XBISPICMD, SPICMD_BYTE_PROGRAM);
  52221. + if (rom_instruction_cycle(SPICMD_BYTE_PROGRAM) == EC_STATE_BUSY) {
  52222. + printk(KERN_ERR
  52223. + "EC_WRITE_BYTE : SPICMD_BYTE_PROGRAM failed.\n");
  52224. + ret = -EINVAL;
  52225. + goto out;
  52226. + }
  52227. +
  52228. + out:
  52229. + /* disable spicmd writing. */
  52230. + ec_stop_spi();
  52231. +
  52232. + return ret;
  52233. +}
  52234. +
  52235. +/* unprotect SPI ROM */
  52236. +/* EC_ROM_unprotect function code */
  52237. +static int EC_ROM_unprotect(void)
  52238. +{
  52239. + unsigned char status;
  52240. +
  52241. + /* enable write spi flash */
  52242. + ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
  52243. + if (rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY) {
  52244. + printk(KERN_ERR
  52245. + "EC_UNIT_ERASE : SPICMD_WRITE_ENABLE failed.\n");
  52246. + return 1;
  52247. + }
  52248. +
  52249. + /* unprotect the status register of rom */
  52250. + ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
  52251. + if (rom_instruction_cycle(SPICMD_READ_STATUS) == EC_STATE_BUSY) {
  52252. + printk(KERN_ERR "EC_UNIT_ERASE : SPICMD_READ_STATUS failed.\n");
  52253. + return 1;
  52254. + }
  52255. + status = ec_read(REG_XBISPIDAT);
  52256. + ec_write(REG_XBISPIDAT, status & 0x02);
  52257. + if (ec_instruction_cycle() < 0) {
  52258. + printk(KERN_ERR "EC_UNIT_ERASE : write status value failed.\n");
  52259. + return 1;
  52260. + }
  52261. +
  52262. + ec_write(REG_XBISPICMD, SPICMD_WRITE_STATUS);
  52263. + if (rom_instruction_cycle(SPICMD_WRITE_STATUS) == EC_STATE_BUSY) {
  52264. + printk(KERN_ERR
  52265. + "EC_UNIT_ERASE : SPICMD_WRITE_STATUS failed.\n");
  52266. + return 1;
  52267. + }
  52268. +
  52269. + /* enable write spi flash */
  52270. + ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
  52271. + if (rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY) {
  52272. + printk(KERN_ERR
  52273. + "EC_UNIT_ERASE : SPICMD_WRITE_ENABLE failed.\n");
  52274. + return 1;
  52275. + }
  52276. +
  52277. + return 0;
  52278. +}
  52279. +
  52280. +/* erase one block or chip or sector as needed */
  52281. +static int ec_unit_erase(unsigned char erase_cmd, unsigned int addr)
  52282. +{
  52283. + unsigned char status;
  52284. + int ret = 0, i = 0;
  52285. + int unprotect_count = 3;
  52286. + int check_flag = 0;
  52287. +
  52288. + /* enable spicmd writing. */
  52289. + ec_start_spi();
  52290. +
  52291. +#ifdef EC_ROM_PROTECTION
  52292. + /* added for re-check SPICMD_READ_STATUS */
  52293. + while (unprotect_count-- > 0) {
  52294. + if (EC_ROM_unprotect()) {
  52295. + ret = -EINVAL;
  52296. + goto out;
  52297. + }
  52298. +
  52299. + /* first time:500ms --> 5.5sec -->10.5sec */
  52300. + for (i = 0; i < ((2 - unprotect_count) * 100 + 10); i++)
  52301. + udelay(50000);
  52302. + ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
  52303. + if (rom_instruction_cycle(SPICMD_READ_STATUS)
  52304. + == EC_STATE_BUSY) {
  52305. + printk(KERN_ERR
  52306. + "EC_PROGRAM_ROM : SPICMD_READ_STATUS failed.\n");
  52307. + } else {
  52308. + status = ec_read(REG_XBISPIDAT);
  52309. + PRINTK_DBG(KERN_INFO "Read unprotect status : 0x%x\n",
  52310. + status);
  52311. + if ((status & 0x1C) == 0x00) {
  52312. + PRINTK_DBG(KERN_INFO
  52313. + "Read unprotect status OK1 : 0x%x\n",
  52314. + status & 0x1C);
  52315. + check_flag = 1;
  52316. + break;
  52317. + }
  52318. + }
  52319. + }
  52320. +
  52321. + if (!check_flag) {
  52322. + printk(KERN_INFO "SPI ROM unprotect fail.\n");
  52323. + return 1;
  52324. + }
  52325. +#endif
  52326. +
  52327. + /* block address fill */
  52328. + if (erase_cmd == SPICMD_BLK_ERASE) {
  52329. + ec_write(REG_XBISPIA2, (addr & 0x00ff0000) >> 16);
  52330. + ec_write(REG_XBISPIA1, (addr & 0x0000ff00) >> 8);
  52331. + ec_write(REG_XBISPIA0, (addr & 0x000000ff) >> 0);
  52332. + }
  52333. +
  52334. + /* erase the whole chip first */
  52335. + ec_write(REG_XBISPICMD, erase_cmd);
  52336. + if (rom_instruction_cycle(erase_cmd) == EC_STATE_BUSY) {
  52337. + printk(KERN_ERR "EC_UNIT_ERASE : erase failed.\n");
  52338. + ret = -EINVAL;
  52339. + goto out;
  52340. + }
  52341. +
  52342. + out:
  52343. + /* disable spicmd writing. */
  52344. + ec_stop_spi();
  52345. +
  52346. + return ret;
  52347. +}
  52348. +
  52349. +/* update the whole rom content with H/W mode
  52350. + * PLEASE USING ec_unit_erase() FIRSTLY
  52351. + */
  52352. +static int ec_program_rom(struct ec_info *info, int flag)
  52353. +{
  52354. + unsigned int addr = 0;
  52355. + unsigned long size = 0;
  52356. + unsigned char *ptr = NULL;
  52357. + unsigned char data;
  52358. + unsigned char val = 0;
  52359. + int ret = 0;
  52360. + int i, j;
  52361. + unsigned char status;
  52362. +
  52363. + /* modify for program serial No.
  52364. + * set IE_START_ADDR & use idle mode,
  52365. + * disable WDD
  52366. + */
  52367. + if (flag == PROGRAM_FLAG_ROM) {
  52368. + ret = ec_init_reset_mode();
  52369. + addr = info->start_addr + EC_START_ADDR;
  52370. + PRINTK_DBG(KERN_INFO "PROGRAM_FLAG_ROM..............\n");
  52371. + } else if (flag == PROGRAM_FLAG_IE) {
  52372. + ret = ec_init_idle_mode();
  52373. + ec_disable_WDD();
  52374. + addr = info->start_addr + IE_START_ADDR;
  52375. + PRINTK_DBG(KERN_INFO "PROGRAM_FLAG_IE..............\n");
  52376. + } else {
  52377. + return 0;
  52378. + }
  52379. +
  52380. + if (ret < 0) {
  52381. + if (flag == PROGRAM_FLAG_IE)
  52382. + ec_enable_WDD();
  52383. + return ret;
  52384. + }
  52385. +
  52386. + size = info->size;
  52387. + ptr = info->buf;
  52388. + PRINTK_DBG(KERN_INFO "starting update ec ROM..............\n");
  52389. +
  52390. + ret = ec_unit_erase(SPICMD_BLK_ERASE, addr);
  52391. + if (ret) {
  52392. + printk(KERN_ERR "program ec : erase block failed.\n");
  52393. + goto out;
  52394. + }
  52395. + PRINTK_DBG(KERN_ERR "program ec : erase block OK.\n");
  52396. +
  52397. + i = 0;
  52398. + while (i < size) {
  52399. + data = *(ptr + i);
  52400. + ec_write_byte(addr, data);
  52401. + ec_read_byte(addr, &val);
  52402. + if (val != data) {
  52403. + ec_write_byte(addr, data);
  52404. + ec_read_byte(addr, &val);
  52405. + if (val != data) {
  52406. + printk(KERN_INFO
  52407. + "EC : Second flash program failed at:\t");
  52408. + printk(KERN_INFO
  52409. + "addr : 0x%x, source : 0x%x, dest: 0x%x\n",
  52410. + addr, data, val);
  52411. + printk(KERN_INFO "This should not happen... STOP\n");
  52412. + break;
  52413. + }
  52414. + }
  52415. + i++;
  52416. + addr++;
  52417. + }
  52418. +
  52419. +#ifdef EC_ROM_PROTECTION
  52420. + /* we should start spi access firstly */
  52421. + ec_start_spi();
  52422. +
  52423. + /* enable write spi flash */
  52424. + ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
  52425. + if (rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY) {
  52426. + printk(KERN_ERR
  52427. + "EC_PROGRAM_ROM : SPICMD_WRITE_ENABLE failed.\n");
  52428. + goto out1;
  52429. + }
  52430. +
  52431. + /* protect the status register of rom */
  52432. + ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
  52433. + if (rom_instruction_cycle(SPICMD_READ_STATUS) == EC_STATE_BUSY) {
  52434. + printk(KERN_ERR
  52435. + "EC_PROGRAM_ROM : SPICMD_READ_STATUS failed.\n");
  52436. + goto out1;
  52437. + }
  52438. + status = ec_read(REG_XBISPIDAT);
  52439. +
  52440. + ec_write(REG_XBISPIDAT, status | 0x1C);
  52441. + if (ec_instruction_cycle() < 0) {
  52442. + printk(KERN_ERR
  52443. + "EC_PROGRAM_ROM : write status value failed.\n");
  52444. + goto out1;
  52445. + }
  52446. +
  52447. + ec_write(REG_XBISPICMD, SPICMD_WRITE_STATUS);
  52448. + if (rom_instruction_cycle(SPICMD_WRITE_STATUS) == EC_STATE_BUSY) {
  52449. + printk(KERN_ERR
  52450. + "EC_PROGRAM_ROM : SPICMD_WRITE_STATUS failed.\n");
  52451. + goto out1;
  52452. + }
  52453. +#endif
  52454. +
  52455. + /* disable the write action to spi rom */
  52456. + ec_write(REG_XBISPICMD, SPICMD_WRITE_DISABLE);
  52457. + if (rom_instruction_cycle(SPICMD_WRITE_DISABLE) == EC_STATE_BUSY) {
  52458. + printk(KERN_ERR
  52459. + "EC_PROGRAM_ROM : SPICMD_WRITE_DISABLE failed.\n");
  52460. + goto out1;
  52461. + }
  52462. +
  52463. + out1:
  52464. + /* we should stop spi access firstly */
  52465. + ec_stop_spi();
  52466. + out:
  52467. + /* for security */
  52468. + for (j = 0; j < 2000; j++)
  52469. + udelay(1000);
  52470. +
  52471. + /* modify for program serial No.
  52472. + * after program No exit idle mode
  52473. + * and enable WDD
  52474. + */
  52475. + if (flag == PROGRAM_FLAG_ROM) {
  52476. + /* exit from the reset mode */
  52477. + ec_exit_reset_mode();
  52478. + } else {
  52479. + /* ec exit from idle mode */
  52480. + ret = ec_exit_idle_mode();
  52481. + ec_enable_WDD();
  52482. + if (ret < 0)
  52483. + return ret;
  52484. + }
  52485. +
  52486. + return 0;
  52487. +}
  52488. +
  52489. +/* ioctl */
  52490. +static int misc_ioctl(struct inode *inode, struct file *filp, u_int cmd,
  52491. + u_long arg)
  52492. +{
  52493. + void __user *ptr = (void __user *)arg;
  52494. + struct ec_reg *ecreg = (struct ec_reg *)(filp->private_data);
  52495. + int ret = 0;
  52496. +
  52497. + switch (cmd) {
  52498. + case IOCTL_RDREG:
  52499. + ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
  52500. + if (ret) {
  52501. + printk(KERN_ERR "reg read : copy from user error.\n");
  52502. + return -EFAULT;
  52503. + }
  52504. + if ((ecreg->addr > EC_MAX_REGADDR)
  52505. + || (ecreg->addr < EC_MIN_REGADDR)) {
  52506. + printk(KERN_ERR
  52507. + "reg read : out of register address range.\n");
  52508. + return -EINVAL;
  52509. + }
  52510. + ecreg->val = ec_read(ecreg->addr);
  52511. + ret = copy_to_user(ptr, ecreg, sizeof(struct ec_reg));
  52512. + if (ret) {
  52513. + printk(KERN_ERR "reg read : copy to user error.\n");
  52514. + return -EFAULT;
  52515. + }
  52516. + break;
  52517. + case IOCTL_WRREG:
  52518. + ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
  52519. + if (ret) {
  52520. + printk(KERN_ERR "reg write : copy from user error.\n");
  52521. + return -EFAULT;
  52522. + }
  52523. + if ((ecreg->addr > EC_MAX_REGADDR)
  52524. + || (ecreg->addr < EC_MIN_REGADDR)) {
  52525. + printk(KERN_ERR
  52526. + "reg write : out of register address range.\n");
  52527. + return -EINVAL;
  52528. + }
  52529. + ec_write(ecreg->addr, ecreg->val);
  52530. + break;
  52531. + case IOCTL_READ_EC:
  52532. + ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
  52533. + if (ret) {
  52534. + printk(KERN_ERR "spi read : copy from user error.\n");
  52535. + return -EFAULT;
  52536. + }
  52537. + if ((ecreg->addr > EC_RAM_ADDR)
  52538. + && (ecreg->addr < EC_MAX_REGADDR)) {
  52539. + printk(KERN_ERR
  52540. + "spi read : out of register address range.\n");
  52541. + return -EINVAL;
  52542. + }
  52543. + ec_read_byte(ecreg->addr, &(ecreg->val));
  52544. + ret = copy_to_user(ptr, ecreg, sizeof(struct ec_reg));
  52545. + if (ret) {
  52546. + printk(KERN_ERR "spi read : copy to user error.\n");
  52547. + return -EFAULT;
  52548. + }
  52549. + break;
  52550. + case IOCTL_PROGRAM_IE:
  52551. + ecinfo.start_addr = EC_START_ADDR;
  52552. + ecinfo.size = EC_CONTENT_MAX_SIZE;
  52553. + ecinfo.buf = (u8 *) kmalloc(ecinfo.size, GFP_KERNEL);
  52554. + if (ecinfo.buf == NULL) {
  52555. + printk(KERN_ERR "program ie : kmalloc failed.\n");
  52556. + return -ENOMEM;
  52557. + }
  52558. + ret = copy_from_user(ecinfo.buf, (u8 *) ptr, ecinfo.size);
  52559. + if (ret) {
  52560. + printk(KERN_ERR "program ie : copy from user error.\n");
  52561. + kfree(ecinfo.buf);
  52562. + ecinfo.buf = NULL;
  52563. + return -EFAULT;
  52564. + }
  52565. +
  52566. + /* use ec_program_rom to write serial No */
  52567. + ec_program_rom(&ecinfo, PROGRAM_FLAG_IE);
  52568. +
  52569. + kfree(ecinfo.buf);
  52570. + ecinfo.buf = NULL;
  52571. + break;
  52572. + case IOCTL_PROGRAM_EC:
  52573. + ecinfo.start_addr = EC_START_ADDR;
  52574. + if (get_user((ecinfo.size), (u32 *) ptr)) {
  52575. + printk(KERN_ERR "program ec : get user error.\n");
  52576. + return -EFAULT;
  52577. + }
  52578. + if ((ecinfo.size) > EC_CONTENT_MAX_SIZE) {
  52579. + printk(KERN_ERR "program ec : size out of limited.\n");
  52580. + return -EINVAL;
  52581. + }
  52582. + ecinfo.buf = (u8 *) kmalloc(ecinfo.size, GFP_KERNEL);
  52583. + if (ecinfo.buf == NULL) {
  52584. + printk(KERN_ERR "program ec : kmalloc failed.\n");
  52585. + return -ENOMEM;
  52586. + }
  52587. + ret = copy_from_user(ecinfo.buf, ((u8 *) ptr + 4), ecinfo.size);
  52588. + if (ret) {
  52589. + printk(KERN_ERR "program ec : copy from user error.\n");
  52590. + kfree(ecinfo.buf);
  52591. + ecinfo.buf = NULL;
  52592. + return -EFAULT;
  52593. + }
  52594. +
  52595. + ec_program_rom(&ecinfo, PROGRAM_FLAG_ROM);
  52596. +
  52597. + kfree(ecinfo.buf);
  52598. + ecinfo.buf = NULL;
  52599. + break;
  52600. +
  52601. + default:
  52602. + break;
  52603. + }
  52604. +
  52605. + return 0;
  52606. +}
  52607. +
  52608. +static long misc_compat_ioctl(struct file *file, unsigned int cmd,
  52609. + unsigned long arg)
  52610. +{
  52611. + return misc_ioctl(file->f_dentry->d_inode, file, cmd, arg);
  52612. +}
  52613. +
  52614. +static int misc_open(struct inode *inode, struct file *filp)
  52615. +{
  52616. + struct ec_reg *ecreg = NULL;
  52617. + ecreg = kmalloc(sizeof(struct ec_reg), GFP_KERNEL);
  52618. + if (ecreg)
  52619. + filp->private_data = ecreg;
  52620. +
  52621. + return ecreg ? 0 : -ENOMEM;
  52622. +}
  52623. +
  52624. +static int misc_release(struct inode *inode, struct file *filp)
  52625. +{
  52626. + struct ec_reg *ecreg = (struct ec_reg *)(filp->private_data);
  52627. +
  52628. + filp->private_data = NULL;
  52629. + kfree(ecreg);
  52630. +
  52631. + return 0;
  52632. +}
  52633. +
  52634. +static const struct file_operations ecmisc_fops = {
  52635. + .open = misc_open,
  52636. + .release = misc_release,
  52637. + .read = NULL,
  52638. + .write = NULL,
  52639. +#ifdef CONFIG_64BIT
  52640. + .compat_ioctl = misc_compat_ioctl,
  52641. +#else
  52642. + .ioctl = misc_ioctl,
  52643. +#endif
  52644. +};
  52645. +
  52646. +static struct miscdevice ecmisc_device = {
  52647. + .minor = ECMISC_MINOR_DEV,
  52648. + .name = EC_MISC_DEV,
  52649. + .fops = &ecmisc_fops
  52650. +};
  52651. +
  52652. +static int __init ecmisc_init(void)
  52653. +{
  52654. + int ret;
  52655. +
  52656. + printk(KERN_INFO "EC misc device init.\n");
  52657. + ret = misc_register(&ecmisc_device);
  52658. +
  52659. + return ret;
  52660. +}
  52661. +
  52662. +static void __exit ecmisc_exit(void)
  52663. +{
  52664. + printk(KERN_INFO "EC misc device exit.\n");
  52665. + misc_deregister(&ecmisc_device);
  52666. +}
  52667. +
  52668. +module_init(ecmisc_init);
  52669. +module_exit(ecmisc_exit);
  52670. +
  52671. +MODULE_AUTHOR("liujl <liujl@lemote.com>");
  52672. +MODULE_DESCRIPTION("KB3310 resources misc Management");
  52673. +MODULE_LICENSE("GPL");
  52674. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc_fn.h linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc_fn.h
  52675. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc_fn.h 1970-01-01 01:00:00.000000000 +0100
  52676. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc_fn.h 2009-08-23 19:01:04.000000000 +0200
  52677. @@ -0,0 +1,16 @@
  52678. +
  52679. +/*
  52680. + * EC(Embedded Controller) KB3310B misc device export functions header file
  52681. + *
  52682. + * Author: liujl <liujl@lemote.com>
  52683. + * Date : 2009-03-16
  52684. + *
  52685. + * EC relative export header file.
  52686. + */
  52687. +
  52688. +/* the general ec index-io port read action */
  52689. +extern unsigned char ec_read(unsigned short addr);
  52690. +/* the general ec index-io port write action */
  52691. +extern void ec_write(unsigned short addr, unsigned char val);
  52692. +/* query sequence of 62/66 port access routine */
  52693. +extern int ec_query_seq(unsigned char cmd);
  52694. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc.h linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc.h
  52695. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_misc.h 1970-01-01 01:00:00.000000000 +0100
  52696. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_misc.h 2009-08-23 19:01:04.000000000 +0200
  52697. @@ -0,0 +1,191 @@
  52698. +/*
  52699. + * EC(Embedded Controller) KB3310B Misc device driver header file in linux
  52700. + * Author : liujl <liujl@lemote.com>
  52701. + * Date : 2008-04-20
  52702. + *
  52703. + * NOTE :
  52704. + * 1, The application layer for reading, writing ec registers and code
  52705. + * program are supported.
  52706. + */
  52707. +
  52708. +/* ec delay time 500us for register and status access */
  52709. +#define EC_REG_DELAY 500 /* unit : us */
  52710. +
  52711. +/* version burned address */
  52712. +#define VER_ADDR 0xf7a1
  52713. +#define VER_MAX_SIZE 7
  52714. +#define EC_ROM_MAX_SIZE 0x10000
  52715. +
  52716. +/* ec internal register */
  52717. +#define REG_POWER_MODE 0xF710
  52718. +#define FLAG_NORMAL_MODE 0x00
  52719. +#define FLAG_IDLE_MODE 0x01
  52720. +#define FLAG_RESET_MODE 0x02
  52721. +
  52722. +/* ec update program flag */
  52723. +#define PROGRAM_FLAG_NONE 0x00
  52724. +#define PROGRAM_FLAG_IE 0x01
  52725. +#define PROGRAM_FLAG_ROM 0x02
  52726. +
  52727. +/* XBI relative registers */
  52728. +#define REG_XBISEG0 0xFEA0
  52729. +#define REG_XBISEG1 0xFEA1
  52730. +#define REG_XBIRSV2 0xFEA2
  52731. +#define REG_XBIRSV3 0xFEA3
  52732. +#define REG_XBIRSV4 0xFEA4
  52733. +#define REG_XBICFG 0xFEA5
  52734. +#define REG_XBICS 0xFEA6
  52735. +#define REG_XBIWE 0xFEA7
  52736. +#define REG_XBISPIA0 0xFEA8
  52737. +#define REG_XBISPIA1 0xFEA9
  52738. +#define REG_XBISPIA2 0xFEAA
  52739. +#define REG_XBISPIDAT 0xFEAB
  52740. +#define REG_XBISPICMD 0xFEAC
  52741. +#define REG_XBISPICFG 0xFEAD
  52742. +#define REG_XBISPIDATR 0xFEAE
  52743. +#define REG_XBISPICFG2 0xFEAF
  52744. +
  52745. +/* commands definition for REG_XBISPICMD */
  52746. +#define SPICMD_WRITE_STATUS 0x01
  52747. +#define SPICMD_BYTE_PROGRAM 0x02
  52748. +#define SPICMD_READ_BYTE 0x03
  52749. +#define SPICMD_WRITE_DISABLE 0x04
  52750. +#define SPICMD_READ_STATUS 0x05
  52751. +#define SPICMD_WRITE_ENABLE 0x06
  52752. +#define SPICMD_HIGH_SPEED_READ 0x0B
  52753. +#define SPICMD_POWER_DOWN 0xB9
  52754. +#define SPICMD_SST_EWSR 0x50
  52755. +#define SPICMD_SST_SEC_ERASE 0x20
  52756. +#define SPICMD_SST_BLK_ERASE 0x52
  52757. +#define SPICMD_SST_CHIP_ERASE 0x60
  52758. +#define SPICMD_FRDO 0x3B
  52759. +#define SPICMD_SEC_ERASE 0xD7
  52760. +#define SPICMD_BLK_ERASE 0xD8
  52761. +#define SPICMD_CHIP_ERASE 0xC7
  52762. +
  52763. +/* bits definition for REG_XBISPICFG */
  52764. +#define SPICFG_AUTO_CHECK 0x01
  52765. +#define SPICFG_SPI_BUSY 0x02
  52766. +#define SPICFG_DUMMY_READ 0x04
  52767. +#define SPICFG_EN_SPICMD 0x08
  52768. +#define SPICFG_LOW_SPICS 0x10
  52769. +#define SPICFG_EN_SHORT_READ 0x20
  52770. +#define SPICFG_EN_OFFSET_READ 0x40
  52771. +#define SPICFG_EN_FAST_READ 0x80
  52772. +
  52773. +/* SMBUS relative register block according to the EC datasheet. */
  52774. +#define REG_SMBTCRC 0xff92
  52775. +#define REG_SMBPIN 0xff93
  52776. +#define REG_SMBCFG 0xff94
  52777. +#define REG_SMBEN 0xff95
  52778. +#define REG_SMBPF 0xff96
  52779. +#define REG_SMBRCRC 0xff97
  52780. +#define REG_SMBPRTCL 0xff98
  52781. +#define REG_SMBSTS 0xff99
  52782. +#define REG_SMBADR 0xff9a
  52783. +#define REG_SMBCMD 0xff9b
  52784. +#define REG_SMBDAT_START 0xff9c
  52785. +#define REG_SMBDAT_END 0xffa3
  52786. +#define SMBDAT_SIZE 8
  52787. +#define REG_SMBRSA 0xffa4
  52788. +#define REG_SMBCNT 0xffbc
  52789. +#define REG_SMBAADR 0xffbd
  52790. +#define REG_SMBADAT0 0xffbe
  52791. +#define REG_SMBADAT1 0xffbf
  52792. +
  52793. +/* watchdog timer registers */
  52794. +#define REG_WDTCFG 0xfe80
  52795. +#define REG_WDTPF 0xfe81
  52796. +#define REG_WDT 0xfe82
  52797. +
  52798. +/* lpc configure register */
  52799. +#define REG_LPCCFG 0xfe95
  52800. +
  52801. +/* 8051 reg */
  52802. +#define REG_PXCFG 0xff14
  52803. +
  52804. +/* Fan register in KB3310 */
  52805. +#define REG_ECFAN_SPEED_LEVEL 0xf4e4
  52806. +#define REG_ECFAN_SWITCH 0xf4d2
  52807. +
  52808. +/* the ec flash rom id number */
  52809. +#define EC_ROM_PRODUCT_ID_SPANSION 0x01
  52810. +#define EC_ROM_PRODUCT_ID_MXIC 0xC2
  52811. +#define EC_ROM_PRODUCT_ID_AMIC 0x37
  52812. +#define EC_ROM_PRODUCT_ID_EONIC 0x1C
  52813. +
  52814. +/* Ec misc device name */
  52815. +#define EC_MISC_DEV "ec_misc"
  52816. +
  52817. +/* Ec misc device minor number */
  52818. +#define ECMISC_MINOR_DEV MISC_DYNAMIC_MINOR
  52819. +
  52820. +#define EC_IOC_MAGIC 'E'
  52821. +/* misc ioctl operations */
  52822. +#define IOCTL_RDREG _IOR(EC_IOC_MAGIC, 1, int)
  52823. +#define IOCTL_WRREG _IOW(EC_IOC_MAGIC, 2, int)
  52824. +#define IOCTL_READ_EC _IOR(EC_IOC_MAGIC, 3, int)
  52825. +#define IOCTL_PROGRAM_IE _IOW(EC_IOC_MAGIC, 4, int)
  52826. +#define IOCTL_PROGRAM_EC _IOW(EC_IOC_MAGIC, 5, int)
  52827. +
  52828. +/* start address for programming of EC content or IE */
  52829. +/* ec running code start address */
  52830. +#define EC_START_ADDR 0x00000000
  52831. +/* ec information element storing address */
  52832. +#define IE_START_ADDR 0x00020000
  52833. +
  52834. +/* EC state */
  52835. +#define EC_STATE_IDLE 0x00 /* ec in idle state */
  52836. +#define EC_STATE_BUSY 0x01 /* ec in busy state */
  52837. +
  52838. +/* timeout value for programming */
  52839. +#define EC_FLASH_TIMEOUT 0x1000 /* ec program timeout */
  52840. +/* command checkout timeout including cmd to port or state flag check */
  52841. +#define EC_CMD_TIMEOUT 0x1000
  52842. +#define EC_SPICMD_STANDARD_TIMEOUT (4 * 1000) /* unit : us */
  52843. +#define EC_MAX_DELAY_UNIT (10) /* every time for polling */
  52844. +#define SPI_FINISH_WAIT_TIME 10
  52845. +/* EC content max size */
  52846. +#define EC_CONTENT_MAX_SIZE (64 * 1024)
  52847. +#define IE_CONTENT_MAX_SIZE (0x100000 - IE_START_ADDR)
  52848. +
  52849. +/*
  52850. + * piece structure :
  52851. + * ------------------------------
  52852. + * | 1byte | 3 bytes | 28 bytes |
  52853. + * | flag | addr | data |
  52854. + * ------------------------------
  52855. + * flag :
  52856. + * bit0 : '1' for first piece, '0' for other
  52857. + * addr :
  52858. + * address for EC to burn the data to(rom address)
  52859. + * data :
  52860. + * data which we should burn to the ec rom
  52861. + *
  52862. + * NOTE:
  52863. + * so far max size should be 256B, or we should change the address-1 value.
  52864. + * piece is used for IE program
  52865. + */
  52866. +#define PIECE_SIZE (32 - 1 - 3)
  52867. +#define FIRST_PIECE_YES 1
  52868. +#define FIRST_PIECE_NO 0
  52869. +/* piece program status reg from ec firmware */
  52870. +#define PIECE_STATUS_REG 0xF77C
  52871. +/* piece program status reg done flag */
  52872. +#define PIECE_STATUS_PROGRAM_DONE 0x80
  52873. +/* piece program status reg error flag */
  52874. +#define PIECE_STATUS_PROGRAM_ERROR 0x40
  52875. +/* 32bytes should be stored here */
  52876. +#define PIECE_START_ADDR 0xF800
  52877. +
  52878. +/* the register operation access struct */
  52879. +struct ec_reg {
  52880. + u32 addr; /* the address of kb3310 registers */
  52881. + u8 val; /* the register value */
  52882. +};
  52883. +
  52884. +struct ec_info {
  52885. + u32 start_addr;
  52886. + u32 size;
  52887. + u8 *buf;
  52888. +};
  52889. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_sci.c linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_sci.c
  52890. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/ec_sci.c 1970-01-01 01:00:00.000000000 +0100
  52891. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/ec_sci.c 2009-08-23 19:01:04.000000000 +0200
  52892. @@ -0,0 +1,1026 @@
  52893. +/*
  52894. + * EC(Embedded Controller) KB3310B SCI EVENT management driver on Linux
  52895. + * Author : liujl <liujl@lemote.com>
  52896. + * Date : 2008-10-22
  52897. + *
  52898. + * NOTE : Until now, I have no idea for setting the interrupt to edge sensitive
  52899. + * mode, amd's help should be needed for handling this problem
  52900. + * So, I assume that the interrupt width is 120us
  52901. + */
  52902. +
  52903. +#include <linux/interrupt.h>
  52904. +#include <linux/module.h>
  52905. +#include <linux/slab.h>
  52906. +#include <linux/proc_fs.h>
  52907. +#include <linux/miscdevice.h>
  52908. +#include <linux/capability.h>
  52909. +#include <linux/sched.h>
  52910. +#include <linux/device.h>
  52911. +#include <linux/kernel.h>
  52912. +#include <linux/list.h>
  52913. +#include <linux/init.h>
  52914. +#include <linux/completion.h>
  52915. +#include <linux/kthread.h>
  52916. +#include <linux/delay.h>
  52917. +#include <linux/timer.h>
  52918. +#include <linux/errno.h>
  52919. +#include <linux/pci.h>
  52920. +#include <linux/ioport.h>
  52921. +#include <linux/poll.h>
  52922. +#include <linux/mutex.h>
  52923. +#include <linux/wait.h>
  52924. +#include <linux/spinlock.h>
  52925. +
  52926. +#include <asm/delay.h>
  52927. +
  52928. +#include "ec.h"
  52929. +#include "ec_misc_fn.h"
  52930. +
  52931. +/* inode information */
  52932. +#define EC_SCI_MINOR_DEV MISC_DYNAMIC_MINOR
  52933. +#define EC_SCI_DEV "sci"
  52934. +#define SCI_IRQ_NUM 0x0A
  52935. +#define CS5536_GPIO_SIZE 256
  52936. +
  52937. +/* ec delay time 500us for register and status access */
  52938. +/* unit : us */
  52939. +#define EC_REG_DELAY 300
  52940. +
  52941. +struct ec_sci_reg {
  52942. + u32 addr;
  52943. + u8 val;
  52944. +};
  52945. +struct ec_sci_reg ecreg;
  52946. +
  52947. +struct sci_device {
  52948. + /* the sci number get from ec */
  52949. + unsigned char sci_number;
  52950. +
  52951. + /* sci count */
  52952. + unsigned char sci_num_array[SCI_MAX_EVENT_COUNT];
  52953. +
  52954. + /* irq relative */
  52955. + unsigned char irq;
  52956. + unsigned char irq_data;
  52957. +
  52958. + /* device name */
  52959. + unsigned char name[10];
  52960. +
  52961. + /* gpio base registers and length */
  52962. + unsigned long gpio_base;
  52963. + unsigned long gpio_size;
  52964. +
  52965. + /* lock & wait_queue */
  52966. + wait_queue_head_t wq;
  52967. + spinlock_t lock;
  52968. +
  52969. + /* storage initial value of sci status register
  52970. + * sci_init_value[0] as brightness
  52971. + * sci_init_value[1] as volume
  52972. + */
  52973. + unsigned char sci_init_value[2];
  52974. +};
  52975. +struct sci_device *sci_device;
  52976. +
  52977. +#ifdef CONFIG_PROC_FS
  52978. +static ssize_t sci_proc_read(struct file *file, char *buf, size_t len,
  52979. + loff_t *ppos);
  52980. +static ssize_t sci_proc_write(struct file *file, const char *buf, size_t len,
  52981. + loff_t *ppos);
  52982. +static unsigned int sci_poll(struct file *fp, poll_table *wait);
  52983. +static struct proc_dir_entry *sci_proc_entry;
  52984. +static const struct file_operations sci_proc_fops = {
  52985. + .read = sci_proc_read,
  52986. + .poll = sci_poll,
  52987. + .write = sci_proc_write,
  52988. +};
  52989. +
  52990. +#define SCI_ACTION_COUNT 15
  52991. +#define SCI_ACTION_WIDTH 14
  52992. +char sci_action[SCI_ACTION_COUNT][SCI_ACTION_WIDTH] = {
  52993. + "DISPLAY : LCD",
  52994. + "DISPLAY : CRT",
  52995. + "DISPLAY : ALL",
  52996. + "DISPLAY : CHG",
  52997. + "AUDIO : CHG",
  52998. + "MACHINE : OFF",
  52999. + "MACHINE : RES",
  53000. + "CAMERA : ON",
  53001. + "CAMERA : OFF",
  53002. + "LCDLED : ON",
  53003. + "LCDLED : OFF",
  53004. + "LCDBL : ON",
  53005. + "LCDBL : OFF",
  53006. + "NONE",
  53007. + "NONE"
  53008. +};
  53009. +
  53010. +static enum {
  53011. + CMD_DISPLAY_LCD = 0,
  53012. + CMD_DISPLAY_CRT,
  53013. + CMD_DISPLAY_ALL,
  53014. + CMD_DISPLAY_CHANGE_BRIGHTNESS,
  53015. + CMD_AUDIO_CHANGE_VOLUME,
  53016. + CMD_MACHINE_OFF,
  53017. + CMD_MACHINE_RESET,
  53018. + CMD_CAMERA_ON,
  53019. + CMD_CAMERA_OFF,
  53020. + CMD_LCDLED_PWRON,
  53021. + CMD_LCDLED_PWROFF,
  53022. + CMD_LCDBL_ON,
  53023. + CMD_LCDBL_OFF,
  53024. + CMD_NONE
  53025. +} sci_cmd;
  53026. +
  53027. +#endif
  53028. +
  53029. +static void sci_display_lcd(void)
  53030. +{
  53031. + unsigned char value;
  53032. +
  53033. + outb(0x21, 0x3c4);
  53034. + value = inb(0x3c5);
  53035. + value |= (1 << 7);
  53036. + outb(0x21, 0x3c4);
  53037. + outb(value, 0x3c5);
  53038. +
  53039. + outb(0x31, 0x3c4);
  53040. + value = inb(0x3c5);
  53041. + value = (value & 0xf8) | 0x01;
  53042. + outb(0x31, 0x3c4);
  53043. + outb(value, 0x3c5);
  53044. +
  53045. + return;
  53046. +}
  53047. +
  53048. +static void sci_display_crt(void)
  53049. +{
  53050. + unsigned char value;
  53051. +
  53052. + outb(0x21, 0x3c4);
  53053. + value = inb(0x3c5);
  53054. + value &= ~(1 << 7);
  53055. + outb(0x21, 0x3c4);
  53056. + outb(value, 0x3c5);
  53057. +
  53058. + outb(0x31, 0x3c4);
  53059. + value = inb(0x3c5);
  53060. + value = (value & 0xf8) | 0x02;
  53061. + outb(0x31, 0x3c4);
  53062. + outb(value, 0x3c5);
  53063. +
  53064. + return;
  53065. +}
  53066. +
  53067. +static void sci_display_all(void)
  53068. +{
  53069. + unsigned char value;
  53070. +
  53071. + outb(0x21, 0x3c4);
  53072. + value = inb(0x3c5);
  53073. + value &= ~(1 << 7);
  53074. + outb(0x21, 0x3c4);
  53075. + outb(value, 0x3c5);
  53076. +
  53077. + outb(0x31, 0x3c4);
  53078. + value = inb(0x3c5);
  53079. + value = (value & 0xf8) | 0x03;
  53080. + outb(0x31, 0x3c4);
  53081. + outb(value, 0x3c5);
  53082. +
  53083. + return;
  53084. +}
  53085. +
  53086. +static void sci_lcd_op(unsigned char flag)
  53087. +{
  53088. + unsigned char value;
  53089. +
  53090. + /* default display crt */
  53091. + outb(0x21, 0x3c4);
  53092. + value = inb(0x3c5);
  53093. + value &= ~(1 << 7);
  53094. + outb(0x21, 0x3c4);
  53095. + outb(value, 0x3c5);
  53096. +
  53097. + if (flag == CMD_LCDLED_PWRON) {
  53098. + /* open lcd output */
  53099. + outb(0x31, 0x3c4);
  53100. + value = inb(0x3c5);
  53101. + value = (value & 0xf8) | 0x03;
  53102. + outb(0x31, 0x3c4);
  53103. + outb(value, 0x3c5);
  53104. + } else if (flag == CMD_LCDLED_PWROFF) {
  53105. + /* close lcd output */
  53106. + outb(0x31, 0x3c4);
  53107. + value = inb(0x3c5);
  53108. + value = (value & 0xf8) | 0x02;
  53109. + outb(0x31, 0x3c4);
  53110. + outb(value, 0x3c5);
  53111. + } else if (flag == CMD_LCDBL_ON)
  53112. + /* LCD backlight on */
  53113. + ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
  53114. + else if (flag == CMD_LCDBL_OFF)
  53115. + /* LCD backlight off */
  53116. + ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
  53117. +
  53118. + return;
  53119. +}
  53120. +
  53121. +static void sci_display_change_brightness(void)
  53122. +{
  53123. + ec_write(REG_DISPLAY_BRIGHTNESS, FLAG_DISPLAY_BRIGHTNESS_LEVEL_4);
  53124. + return;
  53125. +}
  53126. +
  53127. +static void sci_audio_change_volume(void)
  53128. +{
  53129. + ec_write(REG_AUDIO_VOLUME, FLAG_AUDIO_VOLUME_LEVEL_5);
  53130. + return;
  53131. +}
  53132. +
  53133. +static void sci_camera_on_off(void)
  53134. +{
  53135. + unsigned char val;
  53136. + val = ec_read(REG_CAMERA_CONTROL);
  53137. + ec_write(REG_CAMERA_CONTROL, val | (1 << 1));
  53138. + return;
  53139. +}
  53140. +
  53141. +static void sci_machine_off(void)
  53142. +{
  53143. +#ifdef CONFIG_64BIT
  53144. + /* cpu-gpio0 output low */
  53145. + *((unsigned int *)(0xffffffffbfe0011c)) &= ~0x00000001;
  53146. + /* cpu-gpio0 as output */
  53147. + *((unsigned int *)(0xffffffffbfe00120)) &= ~0x00000001;
  53148. +#else
  53149. + /* cpu-gpio0 output low */
  53150. + *((unsigned int *)(0xbfe0011c)) &= ~0x00000001;
  53151. + /* cpu-gpio0 as output */
  53152. + *((unsigned int *)(0xbfe00120)) &= ~0x00000001;
  53153. +#endif /* end ifdef CONFIG_64BIT */
  53154. + return;
  53155. +}
  53156. +
  53157. +static void sci_machine_reset(void)
  53158. +{
  53159. + ec_write(REG_RESET, BIT_RESET_ON);
  53160. + return;
  53161. +}
  53162. +
  53163. +/* static const char driver_version[] = "1.0"; */
  53164. +static const char driver_version[] = VERSION;
  53165. +
  53166. +#ifdef CONFIG_PROC_FS
  53167. +#define PROC_BUF_SIZE 128
  53168. +unsigned char proc_buf[PROC_BUF_SIZE];
  53169. +
  53170. +/*
  53171. + * sci_proc_read :
  53172. + * read information from sci device and suppied to upper layer
  53173. + * The format is as following :
  53174. + * driver_version 1.0
  53175. + * DISPLAY BRIGHTNESS INCREASE
  53176. + * DISPLAY BRIGHTNESS DECREASE
  53177. + * AUDIO VOLUME INCREASE
  53178. + * AUDIO VOLUME DECREASE
  53179. + * MUTE 0x00 close, 0x01 open
  53180. + * WLAN 0x00 close, 0x01 open
  53181. + * LID 0x00 close, 0x01 open
  53182. + * DISPLAY TOGGLE
  53183. + * BLACK SCREEN
  53184. + * SLEEP
  53185. + * OVER TEMPERATURE
  53186. + * CRT DETECT
  53187. + * CAMERA 0x00 close, 0x01 open
  53188. + * USB OC2
  53189. + * USB OC0
  53190. + * BAT IN
  53191. + * AC IN
  53192. + * INIT CAP
  53193. + * CHARGE MODE
  53194. + * STOP CHARGE
  53195. + * BAT LOW
  53196. + * BAT FULL
  53197. + */
  53198. +static ssize_t sci_proc_read(struct file *file, char *buf, size_t len,
  53199. + loff_t *ppos)
  53200. +{
  53201. + unsigned char event[SCI_MAX_EVENT_COUNT];
  53202. + int ret = 0;
  53203. + int i;
  53204. + int count = 0;
  53205. + DECLARE_WAITQUEUE(wait, current);
  53206. +
  53207. + PRINTK_DBG("0 irq_data %d\n", sci_device->irq_data);
  53208. +
  53209. + if (sci_device->irq_data == 0) {
  53210. + add_wait_queue(&(sci_device->wq), &wait);
  53211. +
  53212. + while (!sci_device->irq_data) {
  53213. + set_current_state(TASK_INTERRUPTIBLE);
  53214. + schedule();
  53215. + }
  53216. + remove_wait_queue(&(sci_device->wq), &wait);
  53217. + }
  53218. +
  53219. + PRINTK_DBG("1 irq_data %d\n", sci_device->irq_data);
  53220. + __set_current_state(TASK_RUNNING);
  53221. +
  53222. + for (i = 0; i < SCI_MAX_EVENT_COUNT; i++)
  53223. + event[i] = sci_device->sci_num_array[i];
  53224. +
  53225. + ret = sprintf(proc_buf,
  53226. + "%s 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
  53227. + "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
  53228. + "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",
  53229. + driver_version, event[SCI_INDEX_DISPLAY_BRIGHTNESS_INC],
  53230. + event[SCI_INDEX_DISPLAY_BRIGHTNESS_DEC],
  53231. + event[SCI_INDEX_AUDIO_VOLUME_INC],
  53232. + event[SCI_INDEX_AUDIO_VOLUME_DEC],
  53233. + event[SCI_INDEX_AUDIO_MUTE], event[SCI_INDEX_WLAN],
  53234. + event[SCI_INDEX_LID], event[SCI_INDEX_DISPLAY_TOGGLE],
  53235. + event[SCI_INDEX_BLACK_SCREEN], event[SCI_INDEX_SLEEP],
  53236. + event[SCI_INDEX_OVERTEMP], event[SCI_INDEX_CRT_DETECT],
  53237. + event[SCI_INDEX_CAMERA], event[SCI_INDEX_USB_OC2],
  53238. + event[SCI_INDEX_USB_OC0],
  53239. + (event[SCI_INDEX_AC_BAT] & 0x01) >> BIT_AC_BAT_BAT_IN,
  53240. + (event[SCI_INDEX_AC_BAT] & 0x02) >> BIT_AC_BAT_AC_IN,
  53241. + (event[SCI_INDEX_AC_BAT] & 0x04) >> BIT_AC_BAT_INIT_CAP,
  53242. + (event[SCI_INDEX_AC_BAT] & 0x08) >>
  53243. + BIT_AC_BAT_CHARGE_MODE,
  53244. + (event[SCI_INDEX_AC_BAT] & 0x10) >>
  53245. + BIT_AC_BAT_STOP_CHARGE,
  53246. + (event[SCI_INDEX_AC_BAT] & 0x20) >> BIT_AC_BAT_BAT_LOW,
  53247. + (event[SCI_INDEX_AC_BAT] & 0x40) >> BIT_AC_BAT_BAT_FULL);
  53248. +
  53249. + count = strlen(proc_buf);
  53250. + sci_device->irq_data = 0;
  53251. +
  53252. + if (len < count)
  53253. + return -ENOMEM;
  53254. + if (PROC_BUF_SIZE < count)
  53255. + return -ENOMEM;
  53256. +
  53257. + if (copy_to_user(buf, proc_buf, count))
  53258. + return -EFAULT;
  53259. +
  53260. + return count;
  53261. +}
  53262. +
  53263. +/*
  53264. + * sci_proc_write :
  53265. + * get the upper layer's action and take action.
  53266. + */
  53267. +static ssize_t sci_proc_write(struct file *file, const char *buf, size_t len,
  53268. + loff_t *ppos)
  53269. +{
  53270. + int i;
  53271. +
  53272. + if (len > PROC_BUF_SIZE)
  53273. + return -ENOMEM;
  53274. + if (copy_from_user(proc_buf, buf, len))
  53275. + return -EFAULT;
  53276. + proc_buf[len] = '\0';
  53277. +
  53278. + PRINTK_DBG("proc_buf : %s\n", proc_buf);
  53279. + for (i = 0; i < SCI_ACTION_COUNT; i++) {
  53280. + if (strncmp(proc_buf, sci_action[i], strlen(sci_action[i])) ==
  53281. + 0) {
  53282. + sci_cmd = i;
  53283. + break;
  53284. + }
  53285. + }
  53286. + if (i == SCI_ACTION_COUNT)
  53287. + sci_cmd = CMD_NONE;
  53288. + PRINTK_DBG("sci_cmd: %d\n", sci_cmd);
  53289. + switch (sci_cmd) {
  53290. + case CMD_DISPLAY_LCD:
  53291. + sci_display_lcd();
  53292. + PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_LCD");
  53293. + break;
  53294. + case CMD_DISPLAY_CRT:
  53295. + sci_display_crt();
  53296. + PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_CRT");
  53297. + break;
  53298. + case CMD_DISPLAY_ALL:
  53299. + sci_display_all();
  53300. + PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_ALL");
  53301. + break;
  53302. + case CMD_DISPLAY_CHANGE_BRIGHTNESS:
  53303. + sci_display_change_brightness();
  53304. + PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_CHANGE_BRIGHTNESS");
  53305. + break;
  53306. + case CMD_AUDIO_CHANGE_VOLUME:
  53307. + sci_audio_change_volume();
  53308. + PRINTK_DBG(KERN_DEBUG "CMD_AUDIO_CHANGE_VOLUME");
  53309. + break;
  53310. + case CMD_MACHINE_OFF:
  53311. + sci_machine_off();
  53312. + PRINTK_DBG(KERN_DEBUG "CMD_MACHINE_OFF");
  53313. + break;
  53314. + case CMD_MACHINE_RESET:
  53315. + sci_machine_reset();
  53316. + PRINTK_DBG(KERN_DEBUG "CMD_MACHINE_RESET");
  53317. + break;
  53318. + case CMD_CAMERA_ON:
  53319. + sci_camera_on_off();
  53320. + PRINTK_DBG(KERN_DEBUG "CMD_CAMERA_ON");
  53321. + break;
  53322. + case CMD_CAMERA_OFF:
  53323. + sci_camera_on_off();
  53324. + PRINTK_DBG(KERN_DEBUG "CMD_CAMERA_OFF");
  53325. + break;
  53326. + case CMD_LCDLED_PWRON:
  53327. + sci_lcd_op(CMD_LCDLED_PWRON);
  53328. + PRINTK_DBG(KERN_DEBUG "CMD_LCDLED_PWRON");
  53329. + break;
  53330. + case CMD_LCDLED_PWROFF:
  53331. + sci_lcd_op(CMD_LCDLED_PWROFF);
  53332. + PRINTK_DBG(KERN_DEBUG "CMD_LCDLED_PWROFF");
  53333. + break;
  53334. + case CMD_LCDBL_ON:
  53335. + sci_lcd_op(CMD_LCDBL_ON);
  53336. + PRINTK_DBG(KERN_DEBUG "CMD_LCDBL_ON");
  53337. + break;
  53338. + case CMD_LCDBL_OFF:
  53339. + sci_lcd_op(CMD_LCDBL_OFF);
  53340. + PRINTK_DBG(KERN_DEBUG "CMD_LCDBL_OFF");
  53341. + break;
  53342. + default:
  53343. + printk(KERN_ERR "EC SCI : Not supported cmd.\n");
  53344. + return -EINVAL;
  53345. + }
  53346. +
  53347. + return len;
  53348. +}
  53349. +#endif
  53350. +
  53351. +/*
  53352. + * sci_query_event_num :
  53353. + * using query command to ec to get the proper event number
  53354. + */
  53355. +static int sci_query_event_num(void)
  53356. +{
  53357. + int ret = 0;
  53358. +
  53359. + ret = ec_query_seq(CMD_GET_EVENT_NUM);
  53360. + return ret;
  53361. +}
  53362. +
  53363. +/*
  53364. + * sci_get_event_num :
  53365. + * get sci event number from ec
  53366. + * NOTE : this routine must follow the sci_query_event_num
  53367. + * function in the interrupt
  53368. + */
  53369. +int sci_get_event_num(void)
  53370. +{
  53371. + int timeout = 100;
  53372. + unsigned char value;
  53373. + unsigned char status;
  53374. +
  53375. + udelay(EC_REG_DELAY);
  53376. + status = inb(EC_STS_PORT);
  53377. + udelay(EC_REG_DELAY);
  53378. + while (timeout--) {
  53379. + if (!(status & (1 << 0))) {
  53380. + status = inb(EC_STS_PORT);
  53381. + udelay(EC_REG_DELAY);
  53382. + continue;
  53383. + }
  53384. + break;
  53385. + }
  53386. + if (timeout <= 0) {
  53387. + PRINTK_DBG("fixup sci : get event number timeout.\n");
  53388. + return -EINVAL;
  53389. + }
  53390. + value = inb(EC_DAT_PORT);
  53391. + udelay(EC_REG_DELAY);
  53392. +
  53393. + return value;
  53394. +}
  53395. +EXPORT_SYMBOL(sci_get_event_num);
  53396. +
  53397. +/*
  53398. + * sci_parse_num :
  53399. + * parse the event number routine, and store all the information
  53400. + * to the sci_num_array[] for upper layer using
  53401. + */
  53402. +static int sci_parse_num(struct sci_device *sci_device)
  53403. +{
  53404. + unsigned char val;
  53405. +
  53406. + sci_device->sci_num_array[SCI_INDEX_DISPLAY_TOGGLE] = 0x0;
  53407. + sci_device->sci_num_array[SCI_INDEX_SLEEP] = 0x0;
  53408. + sci_device->sci_num_array[SCI_INDEX_DISPLAY_BRIGHTNESS_DEC] = 0;
  53409. + sci_device->sci_num_array[SCI_INDEX_DISPLAY_BRIGHTNESS_INC] = 0;
  53410. + sci_device->sci_num_array[SCI_INDEX_AUDIO_VOLUME_INC] = 0;
  53411. + sci_device->sci_num_array[SCI_INDEX_AUDIO_VOLUME_DEC] = 0;
  53412. +
  53413. + sci_device->sci_num_array[SCI_INDEX_CAMERA] = 0x0;
  53414. + sci_device->sci_num_array[SCI_INDEX_WLAN] = ec_read(REG_WLAN_STATUS);
  53415. + sci_device->sci_num_array[SCI_INDEX_AUDIO_MUTE] =
  53416. + ec_read(REG_AUDIO_MUTE);
  53417. + sci_device->sci_num_array[SCI_INDEX_BLACK_SCREEN] =
  53418. + ec_read(REG_DISPLAY_LCD);
  53419. + sci_device->sci_num_array[SCI_INDEX_CRT_DETECT] =
  53420. + ec_read(REG_CRT_DETECT);
  53421. + if (ec_read(REG_BAT_POWER) & BIT_BAT_POWER_ACIN) {
  53422. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53423. + 1 << BIT_AC_BAT_AC_IN;
  53424. + } else {
  53425. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53426. + ~(1 << BIT_AC_BAT_AC_IN);
  53427. + }
  53428. +
  53429. + switch (sci_device->sci_number) {
  53430. + case SCI_EVENT_NUM_LID:
  53431. + sci_device->sci_num_array[SCI_INDEX_LID] =
  53432. + ec_read(REG_LID_DETECT);
  53433. + break;
  53434. + case SCI_EVENT_NUM_DISPLAY_TOGGLE:
  53435. + sci_device->sci_num_array[SCI_INDEX_DISPLAY_TOGGLE] = 0x01;
  53436. + break;
  53437. + case SCI_EVENT_NUM_SLEEP:
  53438. + sci_device->sci_num_array[SCI_INDEX_SLEEP] = 0x01;
  53439. + break;
  53440. + case SCI_EVENT_NUM_OVERTEMP:
  53441. + sci_device->sci_num_array[SCI_INDEX_OVERTEMP] =
  53442. + (ec_read(REG_BAT_CHARGE_STATUS) &
  53443. + BIT_BAT_CHARGE_STATUS_OVERTEMP) >> 2;
  53444. + break;
  53445. + case SCI_EVENT_NUM_CRT_DETECT:
  53446. + sci_device->sci_num_array[SCI_INDEX_CRT_DETECT] =
  53447. + ec_read(REG_CRT_DETECT);
  53448. + break;
  53449. + case SCI_EVENT_NUM_CAMERA:
  53450. + sci_device->sci_num_array[SCI_INDEX_CAMERA] = 0x1;
  53451. + break;
  53452. + case SCI_EVENT_NUM_USB_OC2:
  53453. + sci_device->sci_num_array[SCI_INDEX_USB_OC2] =
  53454. + ec_read(REG_USB2_FLAG);
  53455. + break;
  53456. + case SCI_EVENT_NUM_USB_OC0:
  53457. + sci_device->sci_num_array[SCI_INDEX_USB_OC0] =
  53458. + ec_read(REG_USB0_FLAG);
  53459. + break;
  53460. + case SCI_EVENT_NUM_AC_BAT:
  53461. + if (ec_read(REG_BAT_STATUS) & BIT_BAT_STATUS_IN) {
  53462. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53463. + 1 << BIT_AC_BAT_BAT_IN;
  53464. + } else {
  53465. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53466. + ~(1 << BIT_AC_BAT_BAT_IN);
  53467. + }
  53468. +
  53469. + if (ec_read(REG_BAT_POWER) & BIT_BAT_POWER_ACIN) {
  53470. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53471. + 1 << BIT_AC_BAT_AC_IN;
  53472. + } else {
  53473. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53474. + ~(1 << BIT_AC_BAT_AC_IN);
  53475. + }
  53476. +
  53477. + /* init_bat_cap will not be included here. */
  53478. +
  53479. + if (ec_read(REG_BAT_CHARGE_STATUS) &
  53480. + BIT_BAT_CHARGE_STATUS_PRECHG) {
  53481. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53482. + 1 << BIT_AC_BAT_CHARGE_MODE;
  53483. + } else {
  53484. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53485. + ~(1 << BIT_AC_BAT_CHARGE_MODE);
  53486. + }
  53487. +
  53488. + if (ec_read(REG_BAT_STATE) & BIT_BAT_STATE_DISCHARGING) {
  53489. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53490. + 1 << BIT_AC_BAT_STOP_CHARGE;
  53491. + } else {
  53492. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53493. + ~(1 << BIT_AC_BAT_STOP_CHARGE);
  53494. + }
  53495. +
  53496. + if (ec_read(REG_BAT_STATUS) & BIT_BAT_STATUS_LOW) {
  53497. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53498. + 1 << BIT_AC_BAT_BAT_LOW;
  53499. + } else {
  53500. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53501. + ~(1 << BIT_AC_BAT_BAT_LOW);
  53502. + }
  53503. +
  53504. + if (ec_read(REG_BAT_STATUS) & BIT_BAT_STATUS_FULL) {
  53505. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] |=
  53506. + 1 << BIT_AC_BAT_BAT_FULL;
  53507. + } else {
  53508. + sci_device->sci_num_array[SCI_INDEX_AC_BAT] &=
  53509. + ~(1 << BIT_AC_BAT_BAT_FULL);
  53510. + }
  53511. + break;
  53512. + case SCI_EVENT_NUM_DISPLAY_BRIGHTNESS:
  53513. + val = ec_read(REG_DISPLAY_BRIGHTNESS);
  53514. + if ((val == 0x00) || (val < sci_device->sci_init_value[0])) {
  53515. + sci_device->
  53516. + sci_num_array[SCI_INDEX_DISPLAY_BRIGHTNESS_DEC] = 1;
  53517. + sci_device->sci_init_value[0] = val;
  53518. + } else if ((val == 0x08)
  53519. + || (val > sci_device->sci_init_value[0])) {
  53520. + sci_device->
  53521. + sci_num_array[SCI_INDEX_DISPLAY_BRIGHTNESS_INC] = 1;
  53522. + sci_device->sci_init_value[0] = val;
  53523. + }
  53524. + break;
  53525. + case SCI_EVENT_NUM_AUDIO_VOLUME:
  53526. + val = ec_read(REG_AUDIO_VOLUME);
  53527. + if ((val == 0x00) || (val < sci_device->sci_init_value[1])) {
  53528. + sci_device->sci_num_array[SCI_INDEX_AUDIO_VOLUME_DEC] =
  53529. + 1;
  53530. + sci_device->sci_init_value[1] = val;
  53531. + } else if ((val == 0x0a)
  53532. + || (val > sci_device->sci_init_value[1])) {
  53533. + sci_device->sci_num_array[SCI_INDEX_AUDIO_VOLUME_INC] =
  53534. + 1;
  53535. + sci_device->sci_init_value[1] = val;
  53536. + }
  53537. + break;
  53538. + case SCI_EVENT_NUM_WLAN:
  53539. + sci_device->sci_num_array[SCI_INDEX_WLAN] =
  53540. + ec_read(REG_WLAN_STATUS);
  53541. + break;
  53542. + case SCI_EVENT_NUM_AUDIO_MUTE:
  53543. + sci_device->sci_num_array[SCI_INDEX_AUDIO_MUTE] =
  53544. + ec_read(REG_AUDIO_MUTE);
  53545. + break;
  53546. + case SCI_EVENT_NUM_BLACK_SCREEN:
  53547. + sci_device->sci_num_array[SCI_INDEX_BLACK_SCREEN] =
  53548. + ec_read(REG_DISPLAY_LCD);
  53549. + break;
  53550. +
  53551. + default:
  53552. + PRINTK_DBG(KERN_ERR "EC SCI : not supported SCI NUMBER.\n");
  53553. + return -EINVAL;
  53554. + break;
  53555. + }
  53556. +
  53557. + return 0;
  53558. +}
  53559. +
  53560. +/*
  53561. + * sci_int_routine : sci main interrupt routine
  53562. + * we will do the query and get event number together
  53563. + * so the interrupt routine should be longer than 120us
  53564. + * now at least 3ms elpase for it.
  53565. + */
  53566. +static irqreturn_t sci_int_routine(int irq, void *dev_id)
  53567. +{
  53568. + int ret;
  53569. +
  53570. + if (sci_device->irq != irq) {
  53571. + PRINTK_DBG(KERN_ERR "EC SCI :spurious irq.\n");
  53572. + return IRQ_NONE;
  53573. + }
  53574. +
  53575. + /* query the event number */
  53576. + ret = sci_query_event_num();
  53577. + if (ret < 0) {
  53578. + PRINTK_DBG("ret 1: %d\n", ret);
  53579. + return IRQ_NONE;
  53580. + }
  53581. +
  53582. + ret = sci_get_event_num();
  53583. + if (ret < 0) {
  53584. + PRINTK_DBG("ret 2: %d\n", ret);
  53585. + return IRQ_NONE;
  53586. + }
  53587. + sci_device->sci_number = ret;
  53588. +
  53589. + PRINTK_DBG(KERN_INFO "sci_number :0x%x\n", sci_device->sci_number);
  53590. +
  53591. + /* parse the event number and wake the queue */
  53592. + if ((sci_device->sci_number != 0x00)
  53593. + && (sci_device->sci_number != 0xff)) {
  53594. + ret = sci_parse_num(sci_device);
  53595. + PRINTK_DBG("ret 3: %d\n", ret);
  53596. + if (!ret)
  53597. + sci_device->irq_data = 1;
  53598. + else
  53599. + sci_device->irq_data = 0;
  53600. +
  53601. + wake_up_interruptible(&(sci_device->wq));
  53602. + PRINTK_DBG("interrupitble\n");
  53603. + }
  53604. +
  53605. + return IRQ_HANDLED;
  53606. +}
  53607. +
  53608. +static int sci_open(struct inode *inode, struct file *filp)
  53609. +{
  53610. + PRINTK_DBG(KERN_INFO "SCI : open ok.\n");
  53611. + return 0;
  53612. +}
  53613. +
  53614. +static int sci_release(struct inode *inode, struct file *filp)
  53615. +{
  53616. + PRINTK_DBG(KERN_INFO "SCI : close ok.\n");
  53617. + return 0;
  53618. +}
  53619. +
  53620. +/*
  53621. + * sci_poll : poll routine for upper layer using
  53622. + */
  53623. +static unsigned int sci_poll(struct file *fp, poll_table * wait)
  53624. +{
  53625. + int mask = 0;
  53626. +
  53627. + /* printk("current task %p\n", current); */
  53628. + poll_wait(fp, &(sci_device->wq), wait);
  53629. + if (sci_device->irq_data) {
  53630. + /* printk("current task 1 %p\n", current); */
  53631. + mask = POLLIN | POLLRDNORM;
  53632. + }
  53633. +
  53634. + return mask;
  53635. +}
  53636. +
  53637. +static int sci_ioctl(struct inode *inode, struct file *filp, unsigned long cmd,
  53638. + unsigned long arg)
  53639. +{
  53640. + void __user *ptr = (void __user *)arg;
  53641. + int ret = 0;
  53642. +
  53643. + switch (cmd) {
  53644. +/* case IOCTL_GET_INIT_STATE : */
  53645. + case 1:
  53646. + ret = copy_from_user(&ecreg, ptr, sizeof(struct ec_sci_reg));
  53647. + if (ret) {
  53648. + printk(KERN_ERR "read from user error.\n");
  53649. + return -EFAULT;
  53650. + }
  53651. + if (ecreg.addr < 0xf400 || ecreg.addr > 0xffff)
  53652. + return -EINVAL;
  53653. + ecreg.val = ec_read(ecreg.addr);
  53654. + ret = copy_to_user(ptr, &ecreg, sizeof(struct ec_sci_reg));
  53655. + if (ret) {
  53656. + printk(KERN_ERR "reg read : copy to user error.\n");
  53657. + return -EFAULT;
  53658. + }
  53659. + break;
  53660. + default:
  53661. + break;
  53662. + }
  53663. +
  53664. + return 0;
  53665. +}
  53666. +
  53667. +static long sci_compat_ioctl(struct file *file, unsigned int cmd,
  53668. + unsigned long arg)
  53669. +{
  53670. + return sci_ioctl(file->f_dentry->d_inode, file, cmd, arg);
  53671. +}
  53672. +
  53673. +static const struct file_operations sci_fops = {
  53674. +#ifdef CONFIG_64BIT
  53675. + .compat_ioctl = sci_compat_ioctl,
  53676. +#else
  53677. + .ioclt = sci_ioctl,
  53678. +#endif
  53679. + .open = sci_open,
  53680. + .poll = sci_poll,
  53681. + .release = sci_release,
  53682. +};
  53683. +
  53684. +static struct miscdevice sci_dev = {
  53685. + .minor = EC_SCI_MINOR_DEV,
  53686. + .name = EC_SCI_DEV,
  53687. + .fops = &sci_fops
  53688. +};
  53689. +
  53690. +static struct pci_device_id sci_pci_tbl[] = {
  53691. + {PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA)},
  53692. + {}
  53693. +};
  53694. +
  53695. +MODULE_DEVICE_TABLE(pci, sci_pci_tbl);
  53696. +
  53697. +/*
  53698. + * sci_low_level_init :
  53699. + * config and init some msr and gpio register properly.
  53700. + */
  53701. +static int sci_low_level_init(struct sci_device *scidev)
  53702. +{
  53703. + u32 hi, lo;
  53704. + u32 gpio_base = scidev->gpio_base;
  53705. + int ret = 0;
  53706. + unsigned long flags;
  53707. +
  53708. + /* filter the former kb3310 interrupt for security */
  53709. + ret = sci_query_event_num();
  53710. + if (ret) {
  53711. + PRINTK_DBG(KERN_ERR
  53712. + "sci low level init query event num failed.\n");
  53713. + return ret;
  53714. + }
  53715. +
  53716. + /* for filtering next number interrupt */
  53717. + udelay(10000);
  53718. +
  53719. + /* set gpio native registers and msrs for GPIO27 SCI EVENT PIN
  53720. + * gpio :
  53721. + * input, pull-up, no-invert, event-count and value 0,
  53722. + * no-filter, no edge mode
  53723. + * gpio27 map to Virtual gpio0
  53724. + * msr :
  53725. + * no primary and lpc
  53726. + * Unrestricted Z input to IG10 from Virtual gpio 0.
  53727. + */
  53728. + local_irq_save(flags);
  53729. + _rdmsr(0x80000024, &hi, &lo);
  53730. + lo &= ~(1 << 10);
  53731. + _wrmsr(0x80000024, hi, lo);
  53732. + _rdmsr(0x80000025, &hi, &lo);
  53733. + lo &= ~(1 << 10);
  53734. + _wrmsr(0x80000025, hi, lo);
  53735. + _rdmsr(0x80000023, &hi, &lo);
  53736. + lo |= (0x0a << 0);
  53737. + _wrmsr(0x80000023, hi, lo);
  53738. + local_irq_restore(flags);
  53739. +
  53740. + /* set gpio27 as sci interrupt :
  53741. + * input, pull-up, no-fliter, no-negedge, invert
  53742. + * the sci event is just about 120us
  53743. + */
  53744. + asm(".set noreorder\n");
  53745. + /* input enable */
  53746. + outl(0x00000800, (gpio_base | 0xA0));
  53747. + /* revert the input */
  53748. + outl(0x00000800, (gpio_base | 0xA4));
  53749. + /* event-int enable */
  53750. + outl(0x00000800, (gpio_base | 0xB8));
  53751. + asm(".set reorder\n");
  53752. +
  53753. + return 0;
  53754. +}
  53755. +
  53756. +/*
  53757. + * sci_pci_init :
  53758. + * pci init routine
  53759. + */
  53760. +static int __devinit sci_pci_init(struct pci_dev *pdev,
  53761. + const struct pci_device_id *ent)
  53762. +{
  53763. + u32 gpio_base;
  53764. + int ret = -EIO;
  53765. + int i;
  53766. +
  53767. + /* init the sci device */
  53768. + sci_device = kmalloc(sizeof(struct sci_device), GFP_KERNEL);
  53769. + if (sci_device == NULL) {
  53770. + PRINTK_DBG(KERN_ERR
  53771. + "EC SCI : get memory for sci_device failed.\n");
  53772. + return -ENOMEM;
  53773. + }
  53774. + init_waitqueue_head(&(sci_device->wq));
  53775. + spin_lock_init(&sci_device->lock);
  53776. + sci_device->irq = SCI_IRQ_NUM;
  53777. + sci_device->irq_data = 0x00;
  53778. + sci_device->sci_number = 0x00;
  53779. + strcpy(sci_device->name, EC_SCI_DEV);
  53780. +
  53781. + sci_device->sci_init_value[0] = ec_read(REG_DISPLAY_BRIGHTNESS);
  53782. + sci_device->sci_init_value[1] = ec_read(REG_AUDIO_VOLUME);
  53783. +
  53784. + for (i = 0; i < SCI_MAX_EVENT_COUNT; i++)
  53785. + sci_device->sci_num_array[i] = 0x00;
  53786. +
  53787. + /* enable pci device and get the GPIO resources */
  53788. + ret = pci_enable_device(pdev);
  53789. + if (ret) {
  53790. + PRINTK_DBG(KERN_ERR "EC SCI : enable pci device failed.\n");
  53791. + ret = -ENODEV;
  53792. + goto out_pdev;
  53793. + }
  53794. +
  53795. + gpio_base = 0x0000;
  53796. + gpio_base = pci_resource_start(pdev, 1);
  53797. + gpio_base &= ~0x0003;
  53798. + if (gpio_base == 0x0000) {
  53799. + PRINTK_DBG(KERN_ERR "EC SCI : get resource failed.\n");
  53800. + ret = -ENODEV;
  53801. + goto out_resource;
  53802. + }
  53803. + if (request_region(gpio_base, CS5536_GPIO_SIZE, EC_SCI_DEV) == NULL) {
  53804. + PRINTK_DBG(KERN_ERR
  53805. + "EC SCI : base 0x%x, length 0x%x already in use.\n",
  53806. + gpio_base, CS5536_GPIO_SIZE);
  53807. + goto out_resource;
  53808. + }
  53809. + sci_device->gpio_base = gpio_base;
  53810. + sci_device->gpio_size = CS5536_GPIO_SIZE;
  53811. +
  53812. + /* init the relative gpio and msrs */
  53813. + ret = sci_low_level_init(sci_device);
  53814. + if (ret < 0) {
  53815. + printk(KERN_ERR "EC SCI : low level init failed.\n");
  53816. + goto out_irq;
  53817. + }
  53818. +
  53819. + /* alloc the interrupt for sci not pci */
  53820. + ret =
  53821. + request_irq(sci_device->irq, sci_int_routine, IRQF_SHARED,
  53822. + sci_device->name, sci_device);
  53823. + if (ret) {
  53824. + printk(KERN_ERR "EC SCI : request irq %d failed.\n",
  53825. + sci_device->irq);
  53826. + ret = -EFAULT;
  53827. + goto out_irq;
  53828. + }
  53829. +
  53830. + /* register the misc device */
  53831. + ret = misc_register(&sci_dev);
  53832. + if (ret != 0) {
  53833. + printk(KERN_ERR "EC SCI : misc register failed.\n");
  53834. + ret = -EFAULT;
  53835. + goto out_misc;
  53836. + }
  53837. +
  53838. + ret = 0;
  53839. + PRINTK_DBG(KERN_INFO "sci probe ok...\n");
  53840. + goto out;
  53841. +
  53842. + out_misc:
  53843. + free_irq(sci_device->irq, sci_device);
  53844. + out_irq:
  53845. + release_region(sci_device->gpio_base, sci_device->gpio_size);
  53846. + out_resource:
  53847. + pci_disable_device(pdev);
  53848. + out_pdev:
  53849. + kfree(sci_device);
  53850. + out:
  53851. + return ret;
  53852. +}
  53853. +
  53854. +static void __devexit sci_pci_remove(struct pci_dev *pdev)
  53855. +{
  53856. + misc_deregister(&sci_dev);
  53857. + free_irq(sci_device->irq, sci_device);
  53858. + release_region(sci_device->gpio_base, sci_device->gpio_size);
  53859. + pci_disable_device(pdev);
  53860. + kfree(sci_device);
  53861. +
  53862. + return;
  53863. +}
  53864. +
  53865. +static struct pci_driver sci_driver = {
  53866. + .name = EC_SCI_DEV,
  53867. + .id_table = sci_pci_tbl,
  53868. + .probe = sci_pci_init,
  53869. + .remove = __devexit_p(sci_pci_remove),
  53870. +};
  53871. +
  53872. +static int __init sci_init(void)
  53873. +{
  53874. + int ret = 0;
  53875. +
  53876. +#ifdef CONFIG_PROC_FS
  53877. + sci_proc_entry = NULL;
  53878. + sci_proc_entry = create_proc_entry(EC_SCI_DEV, S_IWUSR | S_IRUGO, NULL);
  53879. + if (sci_proc_entry == NULL) {
  53880. + printk(KERN_ERR "EC SCI : register /proc/sci failed.\n");
  53881. + return -EINVAL;
  53882. + }
  53883. + sci_proc_entry->proc_fops = &sci_proc_fops;
  53884. +#endif
  53885. +
  53886. + ret = pci_register_driver(&sci_driver);
  53887. + if (ret) {
  53888. + printk(KERN_ERR "EC SCI : registrer pci driver error.\n");
  53889. +#ifdef CONFIG_PROC_FS
  53890. + remove_proc_entry(EC_SCI_DEV, NULL);
  53891. +#endif
  53892. + return ret;
  53893. + }
  53894. +
  53895. + printk(KERN_INFO
  53896. + "SCI event handler on KB3310B Embedded Controller init.\n");
  53897. +
  53898. + return ret;
  53899. +}
  53900. +
  53901. +static void __exit sci_exit(void)
  53902. +{
  53903. +#ifdef CONFIG_PROC_FS
  53904. + remove_proc_entry(EC_SCI_DEV, NULL);
  53905. +#endif
  53906. + pci_unregister_driver(&sci_driver);
  53907. + printk(KERN_INFO
  53908. + "SCI event handler on KB3310B Embedded Controller exit.\n");
  53909. +
  53910. + return;
  53911. +}
  53912. +
  53913. +module_init(sci_init);
  53914. +module_exit(sci_exit);
  53915. +
  53916. +MODULE_AUTHOR("liujl <liujl@lemote.com>");
  53917. +MODULE_DESCRIPTION("SCI Event Management for KB3310");
  53918. +MODULE_LICENSE("GPL");
  53919. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/io_msr_debug.c linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/io_msr_debug.c
  53920. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/io_msr_debug.c 1970-01-01 01:00:00.000000000 +0100
  53921. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/io_msr_debug.c 2009-08-23 19:01:04.000000000 +0200
  53922. @@ -0,0 +1,198 @@
  53923. +/*
  53924. + * Debug IO and MSR resources driver on Linux
  53925. + *
  53926. + * Author: liujl <liujl@lemote.com>
  53927. + * huangw <huangw@lemote.com>
  53928. + * Date : 2009-03-03
  53929. + *
  53930. + * NOTE :
  53931. + * 1, The IO and the MSR resources accessing read/write are supported.
  53932. + */
  53933. +
  53934. +#include <linux/module.h>
  53935. +#include <linux/poll.h>
  53936. +#include <linux/slab.h>
  53937. +#include <linux/proc_fs.h>
  53938. +#include <linux/miscdevice.h>
  53939. +#include <linux/apm_bios.h>
  53940. +#include <linux/capability.h>
  53941. +#include <linux/sched.h>
  53942. +#include <linux/pm.h>
  53943. +#include <linux/apm-emulation.h>
  53944. +#include <linux/device.h>
  53945. +#include <linux/kernel.h>
  53946. +#include <linux/list.h>
  53947. +#include <linux/init.h>
  53948. +#include <linux/completion.h>
  53949. +#include <linux/kthread.h>
  53950. +#include <linux/delay.h>
  53951. +#include <linux/timer.h>
  53952. +
  53953. +#include <asm/delay.h>
  53954. +
  53955. +#include "ec.h"
  53956. +
  53957. +struct io_msr_reg {
  53958. + u32 addr; /* the address of IO and MSR registers */
  53959. + u8 val; /* the register value for IO */
  53960. + u32 hi; /* the register value for MSR's high part */
  53961. + u32 lo; /* the register value for MSR's low part */
  53962. +};
  53963. +
  53964. +#define IOCTL_RDMSR _IOR('F', 5, int)
  53965. +#define IOCTL_WRMSR _IOR('F', 6, int)
  53966. +#define IOCTL_RDIO _IOR('F', 7, int)
  53967. +#define IOCTL_WRIO _IOR('F', 8, int)
  53968. +
  53969. +/* ec io space range */
  53970. +#define IO_MAX_ADDR 0xBFD0FFFF
  53971. +#define IO_MIN_ADDR 0xBFD00000
  53972. +
  53973. +static int io_msr_ioctl(struct inode *inode, struct file *filp, u_int cmd,
  53974. + u_long arg)
  53975. +{
  53976. + void __user *ptr = (void __user *)arg;
  53977. + struct io_msr_reg *iomsrreg = (struct io_msr_reg *)(filp->private_data);
  53978. + int ret = 0;
  53979. +
  53980. + switch (cmd) {
  53981. + case IOCTL_RDIO:
  53982. + ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
  53983. + if (ret) {
  53984. + printk(KERN_ERR "IO read : copy from user error.\n");
  53985. + return -EFAULT;
  53986. + }
  53987. +
  53988. + if (iomsrreg->addr > IO_MAX_ADDR
  53989. + || iomsrreg->addr < IO_MIN_ADDR) {
  53990. + printk(KERN_ERR "IO read : out of IO address range.\n");
  53991. + return -EINVAL;
  53992. + }
  53993. +#ifdef CONFIG_64BIT
  53994. + iomsrreg->val =
  53995. + *((unsigned char *)(iomsrreg->
  53996. + addr | 0xffffffff00000000));
  53997. +#else
  53998. + iomsrreg->val = *((unsigned char *)(iomsrreg->addr));
  53999. +#endif
  54000. + ret = copy_to_user(ptr, iomsrreg, sizeof(struct io_msr_reg));
  54001. + if (ret) {
  54002. + printk(KERN_ERR "IO read : copy to user error.\n");
  54003. + return -EFAULT;
  54004. + }
  54005. + break;
  54006. + case IOCTL_WRIO:
  54007. + ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
  54008. + if (ret) {
  54009. + printk(KERN_ERR "IO write : copy from user error.\n");
  54010. + return -EFAULT;
  54011. + }
  54012. +
  54013. + if (iomsrreg->addr > IO_MAX_ADDR
  54014. + || iomsrreg->addr < IO_MIN_ADDR) {
  54015. + printk(KERN_ERR
  54016. + "IO write : out of IO address range.\n");
  54017. + return -EINVAL;
  54018. + }
  54019. +#ifdef CONFIG_64BIT
  54020. + *((unsigned char *)(iomsrreg->addr | 0xffffffff00000000)) =
  54021. + iomsrreg->val;
  54022. +#else
  54023. + *((unsigned char *)(iomsrreg->addr)) = iomsrreg->val;
  54024. +#endif
  54025. + break;
  54026. + case IOCTL_RDMSR:
  54027. + ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
  54028. + if (ret) {
  54029. + printk(KERN_ERR "MSR read : copy from user error.\n");
  54030. + return -EFAULT;
  54031. + }
  54032. + _rdmsr(iomsrreg->addr, &(iomsrreg->hi), &(iomsrreg->lo));
  54033. + ret = copy_to_user(ptr, iomsrreg, sizeof(struct io_msr_reg));
  54034. + if (ret) {
  54035. + printk(KERN_ERR "MSR read : copy to user error.\n");
  54036. + return -EFAULT;
  54037. + }
  54038. + break;
  54039. + case IOCTL_WRMSR:
  54040. + ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
  54041. + if (ret) {
  54042. + printk(KERN_ERR "MSR write : copy from user error.\n");
  54043. + return -EFAULT;
  54044. + }
  54045. + _wrmsr(iomsrreg->addr, iomsrreg->hi, iomsrreg->lo);
  54046. + break;
  54047. +
  54048. + default:
  54049. + break;
  54050. + }
  54051. +
  54052. + return 0;
  54053. +}
  54054. +
  54055. +static long io_msr_compat_ioctl(struct file *file, unsigned int cmd,
  54056. + unsigned long arg)
  54057. +{
  54058. + return io_msr_ioctl(file->f_dentry->d_inode, file, cmd, arg);
  54059. +}
  54060. +
  54061. +static int io_msr_open(struct inode *inode, struct file *filp)
  54062. +{
  54063. + struct io_msr_reg *iomsrreg = NULL;
  54064. + iomsrreg = kmalloc(sizeof(struct io_msr_reg), GFP_KERNEL);
  54065. + if (iomsrreg)
  54066. + filp->private_data = iomsrreg;
  54067. +
  54068. + return iomsrreg ? 0 : -ENOMEM;
  54069. +}
  54070. +
  54071. +static int io_msr_release(struct inode *inode, struct file *filp)
  54072. +{
  54073. + struct io_msr_reg *iomsrreg = (struct io_msr_reg *)(filp->private_data);
  54074. +
  54075. + filp->private_data = NULL;
  54076. + kfree(iomsrreg);
  54077. +
  54078. + return 0;
  54079. +}
  54080. +
  54081. +static const struct file_operations io_msr_fops = {
  54082. + .open = io_msr_open,
  54083. + .release = io_msr_release,
  54084. + .read = NULL,
  54085. + .write = NULL,
  54086. +#ifdef CONFIG_64BIT
  54087. + .compat_ioctl = io_msr_compat_ioctl,
  54088. +#else
  54089. + .ioctl = io_msr_ioctl,
  54090. +#endif
  54091. +};
  54092. +
  54093. +static struct miscdevice io_msr_device = {
  54094. + .minor = MISC_DYNAMIC_MINOR,
  54095. + .name = "io_msr_dev",
  54096. + .fops = &io_msr_fops
  54097. +};
  54098. +
  54099. +static int __init io_msr_init(void)
  54100. +{
  54101. + int ret;
  54102. +
  54103. + printk(KERN_INFO "IO and MSR read/write device init.\n");
  54104. + ret = misc_register(&io_msr_device);
  54105. +
  54106. + return ret;
  54107. +}
  54108. +
  54109. +static void __exit io_msr_exit(void)
  54110. +{
  54111. + printk(KERN_INFO "IO and MSR read/write device exit.\n");
  54112. + misc_deregister(&io_msr_device);
  54113. +}
  54114. +
  54115. +module_init(io_msr_init);
  54116. +module_exit(io_msr_exit);
  54117. +
  54118. +MODULE_AUTHOR("liujl <liujl@lemote.com>");
  54119. +MODULE_DESCRIPTION("IO and MSR resources debug");
  54120. +MODULE_LICENSE("GPL");
  54121. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/Makefile linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/Makefile
  54122. --- linux-2.6.30.5.orig/drivers/platform/loongson/ec_kb3310b/Makefile 1970-01-01 01:00:00.000000000 +0100
  54123. +++ linux-2.6.30.5/drivers/platform/loongson/ec_kb3310b/Makefile 2009-08-23 19:01:04.000000000 +0200
  54124. @@ -0,0 +1,14 @@
  54125. +#
  54126. +# Embedded Controller(kb3310b) Driver for Yeeloong laptop
  54127. +#
  54128. +
  54129. +obj-$(CONFIG_EC_KB3310B) += ec_miscd.o ec_batd.o ec_ftd.o ec_scid.o
  54130. +
  54131. +ec_miscd-objs := ec_misc.o
  54132. +ec_batd-objs := ec_bat.o
  54133. +ec_ftd-objs := ec_ft.o
  54134. +ec_scid-objs := ec_sci.o
  54135. +
  54136. +obj-$(CONFIG_EC_KB3310B_DEBUG) += io_msr_debugd.o
  54137. +
  54138. +io_msr_debugd-objs := io_msr_debug.o
  54139. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/Kconfig linux-2.6.30.5/drivers/platform/loongson/Kconfig
  54140. --- linux-2.6.30.5.orig/drivers/platform/loongson/Kconfig 1970-01-01 01:00:00.000000000 +0100
  54141. +++ linux-2.6.30.5/drivers/platform/loongson/Kconfig 2009-08-23 19:01:04.000000000 +0200
  54142. @@ -0,0 +1,68 @@
  54143. +#
  54144. +# Loongson Platform Specific Drivers
  54145. +#
  54146. +
  54147. +menuconfig LOONGSON_PLATFORM_DEVICES
  54148. + bool "Loongson Platform Specific Device Drivers"
  54149. + default y
  54150. + ---help---
  54151. + Say Y here to get to see options for device drivers for various
  54152. + loongson platforms, including vendor-specific laptop extension drivers.
  54153. + This option alone does not add any kernel code.
  54154. +
  54155. + If you say N, all options in this submenu will be skipped and disabled.
  54156. +
  54157. +if LOONGSON_PLATFORM_DEVICES
  54158. +
  54159. +config EC_KB3310B
  54160. + tristate "Embedded Controller: Kb3310b support"
  54161. + depends on LEMOTE_YEELOONG2F
  54162. + default y
  54163. + ---help---
  54164. + This is a driver for yeeloong laptops. It adds the kb3310b support:
  54165. + i.e. battery management, fan & temperature mangement, sci event
  54166. + management and ec rom flushing.
  54167. +
  54168. + This driver is orignally written by Liu junliang <liujl@lemote.com>
  54169. + and maintained by huangwei <huangw@lemote.com> currently.
  54170. +
  54171. + The original git repository is: http://dev.lemote.com/code/ec_module
  54172. +
  54173. +config EC_KB3310B_DEBUG
  54174. + tristate "Embedded Controller: Kb3310b debug support"
  54175. + depends on EC_KB3310B
  54176. + default n
  54177. + ---help---
  54178. + This is a driver for yeeloong laptops. It adds the kb3310b debug
  54179. + support.
  54180. +
  54181. + This driver is orignally written by Liu junliang <liujl@lemote.com>
  54182. + and maintained by huangwei <huangw@lemote.com> currently.
  54183. +
  54184. + The original git repository is: http://dev.lemote.com/code/ec_module
  54185. +
  54186. +config PMON_FLASH
  54187. + tristate "MTD map driver for flushing PMON in Linux"
  54188. + depends on MTD && MTD_PARTITIONS
  54189. + default y
  54190. + ---help---
  54191. + This is a driver for flushing the bootloader(pmon) of
  54192. + fuloong2e,fuloong2f,yeeloong2f in Linux.
  54193. +
  54194. + Here is a basic usage:
  54195. +
  54196. + 1. load necessary modules
  54197. +
  54198. + $ modprobe mtd
  54199. + $ modprobe mtdblock
  54200. + $ modprobe pmon_flashd
  54201. +
  54202. + 2. read the flash
  54203. +
  54204. + $ dd if=/dev/mtdblock0 of=pmon.bin
  54205. +
  54206. + 3. write the falsh
  54207. +
  54208. + $ dd if=pmon.bin of=/dev/mtdblock0
  54209. +
  54210. +endif # LOONGSON_PLATFORM_DEVICES
  54211. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/Makefile linux-2.6.30.5/drivers/platform/loongson/Makefile
  54212. --- linux-2.6.30.5.orig/drivers/platform/loongson/Makefile 1970-01-01 01:00:00.000000000 +0100
  54213. +++ linux-2.6.30.5/drivers/platform/loongson/Makefile 2009-08-23 19:01:04.000000000 +0200
  54214. @@ -0,0 +1,6 @@
  54215. +#
  54216. +# loongson platform specific drivers
  54217. +#
  54218. +
  54219. +obj-$(CONFIG_EC_KB3310B) += ec_kb3310b/
  54220. +obj-$(CONFIG_PMON_FLASH) += pmon_flash/
  54221. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/pmon_flash/Makefile linux-2.6.30.5/drivers/platform/loongson/pmon_flash/Makefile
  54222. --- linux-2.6.30.5.orig/drivers/platform/loongson/pmon_flash/Makefile 1970-01-01 01:00:00.000000000 +0100
  54223. +++ linux-2.6.30.5/drivers/platform/loongson/pmon_flash/Makefile 2009-08-23 19:01:04.000000000 +0200
  54224. @@ -0,0 +1,7 @@
  54225. +#
  54226. +# MTD map driver for flushing pmon flash
  54227. +#
  54228. +
  54229. +obj-$(CONFIG_PMON_FLASH) += pmon_flashd.o
  54230. +
  54231. +pmon_flashd-objs := pmon_flash.o
  54232. diff -Nur linux-2.6.30.5.orig/drivers/platform/loongson/pmon_flash/pmon_flash.c linux-2.6.30.5/drivers/platform/loongson/pmon_flash/pmon_flash.c
  54233. --- linux-2.6.30.5.orig/drivers/platform/loongson/pmon_flash/pmon_flash.c 1970-01-01 01:00:00.000000000 +0100
  54234. +++ linux-2.6.30.5/drivers/platform/loongson/pmon_flash/pmon_flash.c 2009-08-23 19:01:04.000000000 +0200
  54235. @@ -0,0 +1,85 @@
  54236. +/*
  54237. + * Copyright www.lemote.com
  54238. + *
  54239. + * This program is free software; you can redistribute it and/or modify it
  54240. + * under the terms of the GNU General Public License as published by the
  54241. + * Free Software Foundation; either version 2 of the License, or (at your
  54242. + * option) any later version.
  54243. + */
  54244. +
  54245. +#include <linux/module.h>
  54246. +#include <linux/types.h>
  54247. +#include <linux/kernel.h>
  54248. +#include <linux/init.h>
  54249. +#include <asm/io.h>
  54250. +#include <linux/mtd/mtd.h>
  54251. +#include <linux/mtd/map.h>
  54252. +#include <linux/mtd/partitions.h>
  54253. +
  54254. +#define FLASH_PHYS_ADDR 0x1fc00000
  54255. +#define FLASH_SIZE 0x080000
  54256. +
  54257. +#define FLASH_PARTITION0_ADDR 0x00000000
  54258. +#define FLASH_PARTITION0_SIZE 0x00080000
  54259. +
  54260. +struct map_info flash_map = {
  54261. + .name = "flash device",
  54262. + .size = FLASH_SIZE,
  54263. + .bankwidth = 1,
  54264. +};
  54265. +
  54266. +struct mtd_partition flash_parts[] = {
  54267. + {
  54268. + .name = "Bootloader",
  54269. + .offset = FLASH_PARTITION0_ADDR,
  54270. + .size = FLASH_PARTITION0_SIZE},
  54271. +};
  54272. +
  54273. +#define PARTITION_COUNT ARRAY_SIZE(flash_parts)
  54274. +
  54275. +static struct mtd_info *mymtd;
  54276. +
  54277. +int __init init_flash(void)
  54278. +{
  54279. + printk(KERN_NOTICE "Flash flash device: %x at %x\n",
  54280. + FLASH_SIZE, FLASH_PHYS_ADDR);
  54281. +
  54282. + flash_map.phys = FLASH_PHYS_ADDR;
  54283. + flash_map.virt = ioremap(FLASH_PHYS_ADDR, FLASH_SIZE);
  54284. +
  54285. + if (!flash_map.virt) {
  54286. + printk(KERN_NOTICE "Failed to ioremap\n");
  54287. + return -EIO;
  54288. + }
  54289. +
  54290. + simple_map_init(&flash_map);
  54291. +
  54292. + mymtd = do_map_probe("cfi_probe", &flash_map);
  54293. + if (mymtd) {
  54294. + add_mtd_partitions(mymtd, flash_parts, PARTITION_COUNT);
  54295. + printk(KERN_NOTICE "pmon flash device initialized\n");
  54296. + return 0;
  54297. + }
  54298. +
  54299. + iounmap((void *)flash_map.virt);
  54300. + return -ENXIO;
  54301. +}
  54302. +
  54303. +static void __exit cleanup_flash(void)
  54304. +{
  54305. + if (mymtd) {
  54306. + del_mtd_partitions(mymtd);
  54307. + map_destroy(mymtd);
  54308. + }
  54309. + if (flash_map.virt) {
  54310. + iounmap((void *)flash_map.virt);
  54311. + flash_map.virt = 0;
  54312. + }
  54313. +}
  54314. +
  54315. +module_init(init_flash);
  54316. +module_exit(cleanup_flash);
  54317. +
  54318. +MODULE_LICENSE("GPL");
  54319. +MODULE_AUTHOR("Yanhua");
  54320. +MODULE_DESCRIPTION("MTD map driver for pmon programming module");
  54321. diff -Nur linux-2.6.30.5.orig/drivers/platform/Makefile linux-2.6.30.5/drivers/platform/Makefile
  54322. --- linux-2.6.30.5.orig/drivers/platform/Makefile 2009-08-16 23:19:38.000000000 +0200
  54323. +++ linux-2.6.30.5/drivers/platform/Makefile 2009-08-23 19:01:04.000000000 +0200
  54324. @@ -3,3 +3,4 @@
  54325. #
  54326. obj-$(CONFIG_X86) += x86/
  54327. +obj-$(CONFIG_MACH_LOONGSON) += loongson/
  54328. diff -Nur linux-2.6.30.5.orig/drivers/rtc/rtc-cmos.c linux-2.6.30.5/drivers/rtc/rtc-cmos.c
  54329. --- linux-2.6.30.5.orig/drivers/rtc/rtc-cmos.c 2009-08-16 23:19:38.000000000 +0200
  54330. +++ linux-2.6.30.5/drivers/rtc/rtc-cmos.c 2009-08-23 19:01:04.000000000 +0200
  54331. @@ -691,7 +691,8 @@
  54332. */
  54333. #if defined(CONFIG_ATARI)
  54334. address_space = 64;
  54335. -#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
  54336. +#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  54337. + || defined(__sparc__) || defined(__mips__)
  54338. address_space = 128;
  54339. #else
  54340. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  54341. @@ -756,9 +757,8 @@
  54342. /* FIXME teach the alarm code how to handle binary mode;
  54343. * <asm-generic/rtc.h> doesn't know 12-hour mode either.
  54344. */
  54345. - if (is_valid_irq(rtc_irq) &&
  54346. - (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
  54347. - dev_dbg(dev, "only 24-hr BCD mode supported\n");
  54348. + if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  54349. + dev_dbg(dev, "only 24-hr supported\n");
  54350. retval = -ENXIO;
  54351. goto cleanup1;
  54352. }
  54353. diff -Nur linux-2.6.30.5.orig/drivers/video/Kconfig linux-2.6.30.5/drivers/video/Kconfig
  54354. --- linux-2.6.30.5.orig/drivers/video/Kconfig 2009-08-16 23:19:38.000000000 +0200
  54355. +++ linux-2.6.30.5/drivers/video/Kconfig 2009-08-23 19:01:04.000000000 +0200
  54356. @@ -1930,6 +1930,28 @@
  54357. Turn on debugging messages. Note that you can set/unset at run time
  54358. through sysfs
  54359. +config FB_SM7XX
  54360. + tristate "Silicon Motion SM7XX Frame Buffer Support"
  54361. + depends on FB
  54362. + select FB_CFB_FILLRECT
  54363. + select FB_CFB_COPYAREA
  54364. + select FB_CFB_IMAGEBLIT
  54365. + help
  54366. + Frame Buffer driver for the Silicon Motion SM7XX serial graphic card.
  54367. +
  54368. +config FB_SM7XX_ACCEL
  54369. + bool "Siliconmotion Acceleration functions (EXPERIMENTAL)"
  54370. + depends on FB_SM7XX && EXPERIMENTAL
  54371. + help
  54372. + This will compile the Trident frame buffer device with
  54373. + acceleration functions.
  54374. +
  54375. +config FB_SM7XX_DUALHEAD
  54376. + bool "Siliconmotion dualhead support (EXPERIMENTAL)"
  54377. + depends on FB_SM7XX && EXPERIMENTAL
  54378. + help
  54379. + This will enable the dualhead support of SM7XX
  54380. +
  54381. config FB_SM501
  54382. tristate "Silicon Motion SM501 framebuffer support"
  54383. depends on FB && MFD_SM501
  54384. diff -Nur linux-2.6.30.5.orig/drivers/video/Makefile linux-2.6.30.5/drivers/video/Makefile
  54385. --- linux-2.6.30.5.orig/drivers/video/Makefile 2009-08-16 23:19:38.000000000 +0200
  54386. +++ linux-2.6.30.5/drivers/video/Makefile 2009-08-23 19:01:04.000000000 +0200
  54387. @@ -70,6 +70,7 @@
  54388. obj-$(CONFIG_FB_TCX) += tcx.o sbuslib.o
  54389. obj-$(CONFIG_FB_LEO) += leo.o sbuslib.o
  54390. obj-$(CONFIG_FB_SGIVW) += sgivwfb.o
  54391. +obj-$(CONFIG_FB_SM7XX) += sm7xx/
  54392. obj-$(CONFIG_FB_ACORN) += acornfb.o
  54393. obj-$(CONFIG_FB_ATARI) += atafb.o c2p_iplan2.o atafb_mfb.o \
  54394. atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
  54395. diff -Nur linux-2.6.30.5.orig/drivers/video/sm7xx/Makefile linux-2.6.30.5/drivers/video/sm7xx/Makefile
  54396. --- linux-2.6.30.5.orig/drivers/video/sm7xx/Makefile 1970-01-01 01:00:00.000000000 +0100
  54397. +++ linux-2.6.30.5/drivers/video/sm7xx/Makefile 2009-08-23 19:01:04.000000000 +0200
  54398. @@ -0,0 +1,3 @@
  54399. +obj-$(CONFIG_FB_SM7XX) += sm7xx.o
  54400. +
  54401. +sm7xx-y := smtcfb.o
  54402. diff -Nur linux-2.6.30.5.orig/drivers/video/sm7xx/smtc2d.c linux-2.6.30.5/drivers/video/sm7xx/smtc2d.c
  54403. --- linux-2.6.30.5.orig/drivers/video/sm7xx/smtc2d.c 1970-01-01 01:00:00.000000000 +0100
  54404. +++ linux-2.6.30.5/drivers/video/sm7xx/smtc2d.c 2009-08-23 19:01:04.000000000 +0200
  54405. @@ -0,0 +1,979 @@
  54406. +/*
  54407. + * smtc2d.c -- Silicon Motion SM7xx 2D drawing engine functions.
  54408. + *
  54409. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  54410. + * Author: Boyod boyod.yang@siliconmotion.com.cn
  54411. + *
  54412. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  54413. + * Author: Wu Zhangjin, wuzj@lemote.com
  54414. + *
  54415. + * This file is subject to the terms and conditions of the GNU General Public
  54416. + * License. See the file COPYING in the main directory of this archive for
  54417. + * more details.
  54418. + *
  54419. + * Version 0.10.26192.21.01
  54420. + * - Add PowerPC support
  54421. + * - Add 2D support for Lynx -
  54422. + * Verified on 2.6.19.2
  54423. + * Boyod.yang <boyod.yang@siliconmotion.com.cn>
  54424. + */
  54425. +
  54426. +unsigned char smtc_de_busy;
  54427. +
  54428. +void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData)
  54429. +{
  54430. + writel(nData, smtc_2DBaseAddress + nOffset);
  54431. +}
  54432. +
  54433. +unsigned long SMTC_read2Dreg(unsigned long nOffset)
  54434. +{
  54435. + return readl(smtc_2DBaseAddress + nOffset);
  54436. +}
  54437. +
  54438. +void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData)
  54439. +{
  54440. + writel(nData, smtc_2Ddataport + nOffset);
  54441. +}
  54442. +
  54443. +/**********************************************************************
  54444. + *
  54445. + * deInit
  54446. + *
  54447. + * Purpose
  54448. + * Drawing engine initialization.
  54449. + *
  54450. + **********************************************************************/
  54451. +
  54452. +void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
  54453. + unsigned int bpp)
  54454. +{
  54455. + /* Get current power configuration. */
  54456. + unsigned char clock;
  54457. + clock = smtc_seqr(0x21);
  54458. +
  54459. + /* initialize global 'mutex lock' variable */
  54460. + smtc_de_busy = 0;
  54461. +
  54462. + /* Enable 2D Drawing Engine */
  54463. + smtc_seqw(0x21, clock & 0xF8);
  54464. +
  54465. + SMTC_write2Dreg(DE_CLIP_TL,
  54466. + FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) |
  54467. + FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) |
  54468. + FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
  54469. + FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0));
  54470. +
  54471. + if (bpp >= 24) {
  54472. + SMTC_write2Dreg(DE_PITCH,
  54473. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  54474. + nModeWidth * 3) | FIELD_VALUE(0,
  54475. + DE_PITCH,
  54476. + SOURCE,
  54477. + nModeWidth
  54478. + * 3));
  54479. + } else {
  54480. + SMTC_write2Dreg(DE_PITCH,
  54481. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  54482. + nModeWidth) | FIELD_VALUE(0,
  54483. + DE_PITCH,
  54484. + SOURCE,
  54485. + nModeWidth));
  54486. + }
  54487. +
  54488. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54489. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54490. + nModeWidth) | FIELD_VALUE(0,
  54491. + DE_WINDOW_WIDTH,
  54492. + SOURCE,
  54493. + nModeWidth));
  54494. +
  54495. + switch (bpp) {
  54496. + case 8:
  54497. + SMTC_write2Dreg(DE_STRETCH_FORMAT,
  54498. + FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
  54499. + NORMAL) | FIELD_VALUE(0,
  54500. + DE_STRETCH_FORMAT,
  54501. + PATTERN_Y,
  54502. + 0) |
  54503. + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
  54504. + 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
  54505. + PIXEL_FORMAT,
  54506. + 8) | FIELD_SET(0,
  54507. + DE_STRETCH_FORMAT,
  54508. + ADDRESSING,
  54509. + XY) |
  54510. + FIELD_VALUE(0, DE_STRETCH_FORMAT,
  54511. + SOURCE_HEIGHT, 3));
  54512. + break;
  54513. + case 24:
  54514. + SMTC_write2Dreg(DE_STRETCH_FORMAT,
  54515. + FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
  54516. + NORMAL) | FIELD_VALUE(0,
  54517. + DE_STRETCH_FORMAT,
  54518. + PATTERN_Y,
  54519. + 0) |
  54520. + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
  54521. + 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
  54522. + PIXEL_FORMAT,
  54523. + 24) | FIELD_SET(0,
  54524. + DE_STRETCH_FORMAT,
  54525. + ADDRESSING,
  54526. + XY) |
  54527. + FIELD_VALUE(0, DE_STRETCH_FORMAT,
  54528. + SOURCE_HEIGHT, 3));
  54529. + break;
  54530. + case 16:
  54531. + default:
  54532. + SMTC_write2Dreg(DE_STRETCH_FORMAT,
  54533. + FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
  54534. + NORMAL) | FIELD_VALUE(0,
  54535. + DE_STRETCH_FORMAT,
  54536. + PATTERN_Y,
  54537. + 0) |
  54538. + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
  54539. + 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
  54540. + PIXEL_FORMAT,
  54541. + 16) | FIELD_SET(0,
  54542. + DE_STRETCH_FORMAT,
  54543. + ADDRESSING,
  54544. + XY) |
  54545. + FIELD_VALUE(0, DE_STRETCH_FORMAT,
  54546. + SOURCE_HEIGHT, 3));
  54547. + break;
  54548. + }
  54549. +
  54550. + SMTC_write2Dreg(DE_MASKS,
  54551. + FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
  54552. + FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF));
  54553. + SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
  54554. + FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \
  54555. + 0xFFFFFF));
  54556. + SMTC_write2Dreg(DE_COLOR_COMPARE,
  54557. + FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
  54558. +}
  54559. +
  54560. +void deVerticalLine(unsigned long dst_base,
  54561. + unsigned long dst_pitch,
  54562. + unsigned long nX,
  54563. + unsigned long nY,
  54564. + unsigned long dst_height, unsigned long nColor)
  54565. +{
  54566. + deWaitForNotBusy();
  54567. +
  54568. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  54569. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
  54570. + dst_base));
  54571. +
  54572. + SMTC_write2Dreg(DE_PITCH,
  54573. + FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
  54574. + FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
  54575. +
  54576. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54577. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54578. + dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
  54579. + SOURCE,
  54580. + dst_pitch));
  54581. +
  54582. + SMTC_write2Dreg(DE_FOREGROUND,
  54583. + FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
  54584. +
  54585. + SMTC_write2Dreg(DE_DESTINATION,
  54586. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  54587. + FIELD_VALUE(0, DE_DESTINATION, X, nX) |
  54588. + FIELD_VALUE(0, DE_DESTINATION, Y, nY));
  54589. +
  54590. + SMTC_write2Dreg(DE_DIMENSION,
  54591. + FIELD_VALUE(0, DE_DIMENSION, X, 1) |
  54592. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
  54593. +
  54594. + SMTC_write2Dreg(DE_CONTROL,
  54595. + FIELD_SET(0, DE_CONTROL, STATUS, START) |
  54596. + FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
  54597. + FIELD_SET(0, DE_CONTROL, MAJOR, Y) |
  54598. + FIELD_SET(0, DE_CONTROL, STEP_X, NEGATIVE) |
  54599. + FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
  54600. + FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
  54601. + FIELD_SET(0, DE_CONTROL, COMMAND, SHORT_STROKE) |
  54602. + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
  54603. + FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
  54604. +
  54605. + smtc_de_busy = 1;
  54606. +}
  54607. +
  54608. +void deHorizontalLine(unsigned long dst_base,
  54609. + unsigned long dst_pitch,
  54610. + unsigned long nX,
  54611. + unsigned long nY,
  54612. + unsigned long dst_width, unsigned long nColor)
  54613. +{
  54614. + deWaitForNotBusy();
  54615. +
  54616. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  54617. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
  54618. + dst_base));
  54619. +
  54620. + SMTC_write2Dreg(DE_PITCH,
  54621. + FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
  54622. + FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
  54623. +
  54624. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54625. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54626. + dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
  54627. + SOURCE,
  54628. + dst_pitch));
  54629. + SMTC_write2Dreg(DE_FOREGROUND,
  54630. + FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
  54631. + SMTC_write2Dreg(DE_DESTINATION,
  54632. + FIELD_SET(0, DE_DESTINATION, WRAP,
  54633. + DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X,
  54634. + nX) | FIELD_VALUE(0,
  54635. + DE_DESTINATION,
  54636. + Y,
  54637. + nY));
  54638. + SMTC_write2Dreg(DE_DIMENSION,
  54639. + FIELD_VALUE(0, DE_DIMENSION, X,
  54640. + dst_width) | FIELD_VALUE(0, DE_DIMENSION,
  54641. + Y_ET, 1));
  54642. + SMTC_write2Dreg(DE_CONTROL,
  54643. + FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0,
  54644. + DE_CONTROL,
  54645. + DIRECTION,
  54646. + RIGHT_TO_LEFT)
  54647. + | FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0,
  54648. + DE_CONTROL,
  54649. + STEP_X,
  54650. + POSITIVE)
  54651. + | FIELD_SET(0, DE_CONTROL, STEP_Y,
  54652. + NEGATIVE) | FIELD_SET(0, DE_CONTROL,
  54653. + LAST_PIXEL,
  54654. + OFF) | FIELD_SET(0,
  54655. + DE_CONTROL,
  54656. + COMMAND,
  54657. + SHORT_STROKE)
  54658. + | FIELD_SET(0, DE_CONTROL, ROP_SELECT,
  54659. + ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP,
  54660. + 0x0C));
  54661. +
  54662. + smtc_de_busy = 1;
  54663. +}
  54664. +
  54665. +void deLine(unsigned long dst_base,
  54666. + unsigned long dst_pitch,
  54667. + unsigned long nX1,
  54668. + unsigned long nY1,
  54669. + unsigned long nX2, unsigned long nY2, unsigned long nColor)
  54670. +{
  54671. + unsigned long nCommand =
  54672. + FIELD_SET(0, DE_CONTROL, STATUS, START) |
  54673. + FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
  54674. + FIELD_SET(0, DE_CONTROL, MAJOR, X) |
  54675. + FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) |
  54676. + FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
  54677. + FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
  54678. + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
  54679. + FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C);
  54680. + unsigned long DeltaX;
  54681. + unsigned long DeltaY;
  54682. +
  54683. + /* Calculate delta X */
  54684. + if (nX1 <= nX2)
  54685. + DeltaX = nX2 - nX1;
  54686. + else {
  54687. + DeltaX = nX1 - nX2;
  54688. + nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
  54689. + }
  54690. +
  54691. + /* Calculate delta Y */
  54692. + if (nY1 <= nY2)
  54693. + DeltaY = nY2 - nY1;
  54694. + else {
  54695. + DeltaY = nY1 - nY2;
  54696. + nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
  54697. + }
  54698. +
  54699. + /* Determine the major axis */
  54700. + if (DeltaX < DeltaY)
  54701. + nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
  54702. +
  54703. + /* Vertical line? */
  54704. + if (nX1 == nX2)
  54705. + deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
  54706. +
  54707. + /* Horizontal line? */
  54708. + else if (nY1 == nY2)
  54709. + deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \
  54710. + DeltaX, nColor);
  54711. +
  54712. + /* Diagonal line? */
  54713. + else if (DeltaX == DeltaY) {
  54714. + deWaitForNotBusy();
  54715. +
  54716. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  54717. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
  54718. + ADDRESS, dst_base));
  54719. +
  54720. + SMTC_write2Dreg(DE_PITCH,
  54721. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  54722. + dst_pitch) | FIELD_VALUE(0,
  54723. + DE_PITCH,
  54724. + SOURCE,
  54725. + dst_pitch));
  54726. +
  54727. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54728. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54729. + dst_pitch) | FIELD_VALUE(0,
  54730. + DE_WINDOW_WIDTH,
  54731. + SOURCE,
  54732. + dst_pitch));
  54733. +
  54734. + SMTC_write2Dreg(DE_FOREGROUND,
  54735. + FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
  54736. +
  54737. + SMTC_write2Dreg(DE_DESTINATION,
  54738. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  54739. + FIELD_VALUE(0, DE_DESTINATION, X, 1) |
  54740. + FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
  54741. +
  54742. + SMTC_write2Dreg(DE_DIMENSION,
  54743. + FIELD_VALUE(0, DE_DIMENSION, X, 1) |
  54744. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
  54745. +
  54746. + SMTC_write2Dreg(DE_CONTROL,
  54747. + FIELD_SET(nCommand, DE_CONTROL, COMMAND,
  54748. + SHORT_STROKE));
  54749. + }
  54750. +
  54751. + /* Generic line */
  54752. + else {
  54753. + unsigned int k1, k2, et, w;
  54754. + if (DeltaX < DeltaY) {
  54755. + k1 = 2 * DeltaX;
  54756. + et = k1 - DeltaY;
  54757. + k2 = et - DeltaY;
  54758. + w = DeltaY + 1;
  54759. + } else {
  54760. + k1 = 2 * DeltaY;
  54761. + et = k1 - DeltaX;
  54762. + k2 = et - DeltaX;
  54763. + w = DeltaX + 1;
  54764. + }
  54765. +
  54766. + deWaitForNotBusy();
  54767. +
  54768. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  54769. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
  54770. + ADDRESS, dst_base));
  54771. +
  54772. + SMTC_write2Dreg(DE_PITCH,
  54773. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  54774. + dst_pitch) | FIELD_VALUE(0,
  54775. + DE_PITCH,
  54776. + SOURCE,
  54777. + dst_pitch));
  54778. +
  54779. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54780. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54781. + dst_pitch) | FIELD_VALUE(0,
  54782. + DE_WINDOW_WIDTH,
  54783. + SOURCE,
  54784. + dst_pitch));
  54785. +
  54786. + SMTC_write2Dreg(DE_FOREGROUND,
  54787. + FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
  54788. +
  54789. + SMTC_write2Dreg(DE_SOURCE,
  54790. + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
  54791. + FIELD_VALUE(0, DE_SOURCE, X_K1, k1) |
  54792. + FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
  54793. +
  54794. + SMTC_write2Dreg(DE_DESTINATION,
  54795. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  54796. + FIELD_VALUE(0, DE_DESTINATION, X, nX1) |
  54797. + FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
  54798. +
  54799. + SMTC_write2Dreg(DE_DIMENSION,
  54800. + FIELD_VALUE(0, DE_DIMENSION, X, w) |
  54801. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
  54802. +
  54803. + SMTC_write2Dreg(DE_CONTROL,
  54804. + FIELD_SET(nCommand, DE_CONTROL, COMMAND,
  54805. + LINE_DRAW));
  54806. + }
  54807. +
  54808. + smtc_de_busy = 1;
  54809. +}
  54810. +
  54811. +void deFillRect(unsigned long dst_base,
  54812. + unsigned long dst_pitch,
  54813. + unsigned long dst_X,
  54814. + unsigned long dst_Y,
  54815. + unsigned long dst_width,
  54816. + unsigned long dst_height, unsigned long nColor)
  54817. +{
  54818. + deWaitForNotBusy();
  54819. +
  54820. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  54821. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
  54822. + dst_base));
  54823. +
  54824. + if (dst_pitch) {
  54825. + SMTC_write2Dreg(DE_PITCH,
  54826. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  54827. + dst_pitch) | FIELD_VALUE(0,
  54828. + DE_PITCH,
  54829. + SOURCE,
  54830. + dst_pitch));
  54831. +
  54832. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  54833. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  54834. + dst_pitch) | FIELD_VALUE(0,
  54835. + DE_WINDOW_WIDTH,
  54836. + SOURCE,
  54837. + dst_pitch));
  54838. + }
  54839. +
  54840. + SMTC_write2Dreg(DE_FOREGROUND,
  54841. + FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
  54842. +
  54843. + SMTC_write2Dreg(DE_DESTINATION,
  54844. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  54845. + FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
  54846. + FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
  54847. +
  54848. + SMTC_write2Dreg(DE_DIMENSION,
  54849. + FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
  54850. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
  54851. +
  54852. + SMTC_write2Dreg(DE_CONTROL,
  54853. + FIELD_SET(0, DE_CONTROL, STATUS, START) |
  54854. + FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
  54855. + FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
  54856. + FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) |
  54857. + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
  54858. + FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
  54859. +
  54860. + smtc_de_busy = 1;
  54861. +}
  54862. +
  54863. +/**********************************************************************
  54864. + *
  54865. + * deRotatePattern
  54866. + *
  54867. + * Purpose
  54868. + * Rotate the given pattern if necessary
  54869. + *
  54870. + * Parameters
  54871. + * [in]
  54872. + * pPattern - Pointer to DE_SURFACE structure containing
  54873. + * pattern attributes
  54874. + * patternX - X position (0-7) of pattern origin
  54875. + * patternY - Y position (0-7) of pattern origin
  54876. + *
  54877. + * [out]
  54878. + * pattern_dstaddr - Pointer to pre-allocated buffer containing
  54879. + * rotated pattern
  54880. + *
  54881. + **********************************************************************/
  54882. +void deRotatePattern(unsigned char *pattern_dstaddr,
  54883. + unsigned long pattern_src_addr,
  54884. + unsigned long pattern_BPP,
  54885. + unsigned long pattern_stride, int patternX, int patternY)
  54886. +{
  54887. + unsigned int i;
  54888. + unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT];
  54889. + unsigned int x, y;
  54890. + unsigned char *pjPatByte;
  54891. +
  54892. + if (pattern_dstaddr != NULL) {
  54893. + deWaitForNotBusy();
  54894. +
  54895. + if (patternX || patternY) {
  54896. + /* Rotate pattern */
  54897. + pjPatByte = (unsigned char *)pattern;
  54898. +
  54899. + switch (pattern_BPP) {
  54900. + case 8:
  54901. + {
  54902. + for (y = 0; y < 8; y++) {
  54903. + unsigned char *pjBuffer =
  54904. + pattern_dstaddr +
  54905. + ((patternY + y) & 7) * 8;
  54906. + for (x = 0; x < 8; x++) {
  54907. + pjBuffer[(patternX +
  54908. + x) & 7] =
  54909. + pjPatByte[x];
  54910. + }
  54911. + pjPatByte += pattern_stride;
  54912. + }
  54913. + break;
  54914. + }
  54915. +
  54916. + case 16:
  54917. + {
  54918. + for (y = 0; y < 8; y++) {
  54919. + unsigned short *pjBuffer =
  54920. + (unsigned short *)
  54921. + pattern_dstaddr +
  54922. + ((patternY + y) & 7) * 8;
  54923. + for (x = 0; x < 8; x++) {
  54924. + pjBuffer[(patternX +
  54925. + x) & 7] =
  54926. + ((unsigned short *)
  54927. + pjPatByte)[x];
  54928. + }
  54929. + pjPatByte += pattern_stride;
  54930. + }
  54931. + break;
  54932. + }
  54933. +
  54934. + case 32:
  54935. + {
  54936. + for (y = 0; y < 8; y++) {
  54937. + unsigned long *pjBuffer =
  54938. + (unsigned long *)
  54939. + pattern_dstaddr +
  54940. + ((patternY + y) & 7) * 8;
  54941. + for (x = 0; x < 8; x++) {
  54942. + pjBuffer[(patternX +
  54943. + x) & 7] =
  54944. + ((unsigned long *)
  54945. + pjPatByte)[x];
  54946. + }
  54947. + pjPatByte += pattern_stride;
  54948. + }
  54949. + break;
  54950. + }
  54951. + }
  54952. + } else {
  54953. + /*Don't rotate,just copy pattern into pattern_dstaddr*/
  54954. + for (i = 0; i < (pattern_BPP * 2); i++) {
  54955. + ((unsigned long *)pattern_dstaddr)[i] =
  54956. + pattern[i];
  54957. + }
  54958. + }
  54959. +
  54960. + }
  54961. +}
  54962. +
  54963. +/**********************************************************************
  54964. + *
  54965. + * deCopy
  54966. + *
  54967. + * Purpose
  54968. + * Copy a rectangular area of the source surface to a destination surface
  54969. + *
  54970. + * Remarks
  54971. + * Source bitmap must have the same color depth (BPP) as the destination
  54972. + * bitmap.
  54973. + *
  54974. +**********************************************************************/
  54975. +void deCopy(unsigned long dst_base,
  54976. + unsigned long dst_pitch,
  54977. + unsigned long dst_BPP,
  54978. + unsigned long dst_X,
  54979. + unsigned long dst_Y,
  54980. + unsigned long dst_width,
  54981. + unsigned long dst_height,
  54982. + unsigned long src_base,
  54983. + unsigned long src_pitch,
  54984. + unsigned long src_X,
  54985. + unsigned long src_Y, pTransparent pTransp, unsigned char nROP2)
  54986. +{
  54987. + unsigned long nDirection = 0;
  54988. + unsigned long nTransparent = 0;
  54989. + /* Direction of ROP2 operation:
  54990. + * 1 = Left to Right,
  54991. + * (-1) = Right to Left
  54992. + */
  54993. + unsigned long opSign = 1;
  54994. + /* xWidth is in pixels */
  54995. + unsigned long xWidth = 192 / (dst_BPP / 8);
  54996. + unsigned long de_ctrl = 0;
  54997. +
  54998. + deWaitForNotBusy();
  54999. +
  55000. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
  55001. + FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
  55002. + dst_base));
  55003. +
  55004. + SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE,
  55005. + FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS,
  55006. + src_base));
  55007. +
  55008. + if (dst_pitch && src_pitch) {
  55009. + SMTC_write2Dreg(DE_PITCH,
  55010. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  55011. + dst_pitch) | FIELD_VALUE(0,
  55012. + DE_PITCH,
  55013. + SOURCE,
  55014. + src_pitch));
  55015. +
  55016. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  55017. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  55018. + dst_pitch) | FIELD_VALUE(0,
  55019. + DE_WINDOW_WIDTH,
  55020. + SOURCE,
  55021. + src_pitch));
  55022. + }
  55023. +
  55024. + /* Set transparent bits if necessary */
  55025. + if (pTransp != NULL) {
  55026. + nTransparent =
  55027. + pTransp->match | pTransp->select | pTransp->control;
  55028. +
  55029. + /* Set color compare register */
  55030. + SMTC_write2Dreg(DE_COLOR_COMPARE,
  55031. + FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR,
  55032. + pTransp->color));
  55033. + }
  55034. +
  55035. + /* Determine direction of operation */
  55036. + if (src_Y < dst_Y) {
  55037. + /* +----------+
  55038. + |S |
  55039. + | +----------+
  55040. + | | | |
  55041. + | | | |
  55042. + +---|------+ |
  55043. + | D |
  55044. + +----------+ */
  55045. +
  55046. + nDirection = BOTTOM_TO_TOP;
  55047. + } else if (src_Y > dst_Y) {
  55048. + /* +----------+
  55049. + |D |
  55050. + | +----------+
  55051. + | | | |
  55052. + | | | |
  55053. + +---|------+ |
  55054. + | S |
  55055. + +----------+ */
  55056. +
  55057. + nDirection = TOP_TO_BOTTOM;
  55058. + } else {
  55059. + /* src_Y == dst_Y */
  55060. +
  55061. + if (src_X <= dst_X) {
  55062. + /* +------+---+------+
  55063. + |S | | D|
  55064. + | | | |
  55065. + | | | |
  55066. + | | | |
  55067. + +------+---+------+ */
  55068. +
  55069. + nDirection = RIGHT_TO_LEFT;
  55070. + } else {
  55071. + /* src_X > dst_X */
  55072. +
  55073. + /* +------+---+------+
  55074. + |D | | S|
  55075. + | | | |
  55076. + | | | |
  55077. + | | | |
  55078. + +------+---+------+ */
  55079. +
  55080. + nDirection = LEFT_TO_RIGHT;
  55081. + }
  55082. + }
  55083. +
  55084. + if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
  55085. + src_X += dst_width - 1;
  55086. + src_Y += dst_height - 1;
  55087. + dst_X += dst_width - 1;
  55088. + dst_Y += dst_height - 1;
  55089. + opSign = (-1);
  55090. + }
  55091. +
  55092. + if (dst_BPP >= 24) {
  55093. + src_X *= 3;
  55094. + src_Y *= 3;
  55095. + dst_X *= 3;
  55096. + dst_Y *= 3;
  55097. + dst_width *= 3;
  55098. + if ((nDirection == BOTTOM_TO_TOP)
  55099. + || (nDirection == RIGHT_TO_LEFT)) {
  55100. + src_X += 2;
  55101. + dst_X += 2;
  55102. + }
  55103. + }
  55104. +
  55105. + /* Workaround for 192 byte hw bug */
  55106. + if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) {
  55107. + /*
  55108. + * Perform the ROP2 operation in chunks of (xWidth *
  55109. + * dst_height)
  55110. + */
  55111. + while (1) {
  55112. + deWaitForNotBusy();
  55113. +
  55114. + SMTC_write2Dreg(DE_SOURCE,
  55115. + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
  55116. + FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
  55117. + FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
  55118. +
  55119. + SMTC_write2Dreg(DE_DESTINATION,
  55120. + FIELD_SET(0, DE_DESTINATION, WRAP,
  55121. + DISABLE) | FIELD_VALUE(0,
  55122. + DE_DESTINATION,
  55123. + X,
  55124. + dst_X)
  55125. + | FIELD_VALUE(0, DE_DESTINATION, Y,
  55126. + dst_Y));
  55127. +
  55128. + SMTC_write2Dreg(DE_DIMENSION,
  55129. + FIELD_VALUE(0, DE_DIMENSION, X,
  55130. + xWidth) | FIELD_VALUE(0,
  55131. + DE_DIMENSION,
  55132. + Y_ET,
  55133. + dst_height));
  55134. +
  55135. + de_ctrl =
  55136. + FIELD_VALUE(0, DE_CONTROL, ROP,
  55137. + nROP2) | nTransparent | FIELD_SET(0,
  55138. + DE_CONTROL,
  55139. + ROP_SELECT,
  55140. + ROP2)
  55141. + | FIELD_SET(0, DE_CONTROL, COMMAND,
  55142. + BITBLT) | ((nDirection ==
  55143. + 1) ? FIELD_SET(0,
  55144. + DE_CONTROL,
  55145. + DIRECTION,
  55146. + RIGHT_TO_LEFT)
  55147. + : FIELD_SET(0, DE_CONTROL,
  55148. + DIRECTION,
  55149. + LEFT_TO_RIGHT)) |
  55150. + FIELD_SET(0, DE_CONTROL, STATUS, START);
  55151. +
  55152. + SMTC_write2Dreg(DE_CONTROL, de_ctrl);
  55153. +
  55154. + src_X += (opSign * xWidth);
  55155. + dst_X += (opSign * xWidth);
  55156. + dst_width -= xWidth;
  55157. +
  55158. + if (dst_width <= 0) {
  55159. + /* ROP2 operation is complete */
  55160. + break;
  55161. + }
  55162. +
  55163. + if (xWidth > dst_width)
  55164. + xWidth = dst_width;
  55165. + }
  55166. + } else {
  55167. + deWaitForNotBusy();
  55168. + SMTC_write2Dreg(DE_SOURCE,
  55169. + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
  55170. + FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
  55171. + FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
  55172. +
  55173. + SMTC_write2Dreg(DE_DESTINATION,
  55174. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  55175. + FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
  55176. + FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
  55177. +
  55178. + SMTC_write2Dreg(DE_DIMENSION,
  55179. + FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
  55180. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
  55181. +
  55182. + de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
  55183. + nTransparent |
  55184. + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
  55185. + FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
  55186. + ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION,
  55187. + RIGHT_TO_LEFT)
  55188. + : FIELD_SET(0, DE_CONTROL, DIRECTION,
  55189. + LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL,
  55190. + STATUS, START);
  55191. + SMTC_write2Dreg(DE_CONTROL, de_ctrl);
  55192. + }
  55193. +
  55194. + smtc_de_busy = 1;
  55195. +}
  55196. +
  55197. +/*
  55198. + * This function sets the pixel format that will apply to the 2D Engine.
  55199. + */
  55200. +void deSetPixelFormat(unsigned long bpp)
  55201. +{
  55202. + unsigned long de_format;
  55203. +
  55204. + de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT);
  55205. +
  55206. + switch (bpp) {
  55207. + case 8:
  55208. + de_format =
  55209. + FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8);
  55210. + break;
  55211. + default:
  55212. + case 16:
  55213. + de_format =
  55214. + FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16);
  55215. + break;
  55216. + case 32:
  55217. + de_format =
  55218. + FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32);
  55219. + break;
  55220. + }
  55221. +
  55222. + SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format);
  55223. +}
  55224. +
  55225. +/*
  55226. + * System memory to Video memory monochrome expansion.
  55227. + *
  55228. + * Source is monochrome image in system memory. This function expands the
  55229. + * monochrome data to color image in video memory.
  55230. + */
  55231. +
  55232. +long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf,
  55233. + long srcDelta,
  55234. + unsigned long startBit,
  55235. + unsigned long dBase,
  55236. + unsigned long dPitch,
  55237. + unsigned long bpp,
  55238. + unsigned long dx, unsigned long dy,
  55239. + unsigned long width, unsigned long height,
  55240. + unsigned long fColor,
  55241. + unsigned long bColor,
  55242. + unsigned long rop2) {
  55243. + unsigned long bytePerPixel;
  55244. + unsigned long ulBytesPerScan;
  55245. + unsigned long ul4BytesPerScan;
  55246. + unsigned long ulBytesRemain;
  55247. + unsigned long de_ctrl = 0;
  55248. + unsigned char ajRemain[4];
  55249. + long i, j;
  55250. +
  55251. + bytePerPixel = bpp / 8;
  55252. +
  55253. + /* Just make sure the start bit is within legal range */
  55254. + startBit &= 7;
  55255. +
  55256. + ulBytesPerScan = (width + startBit + 7) / 8;
  55257. + ul4BytesPerScan = ulBytesPerScan & ~3;
  55258. + ulBytesRemain = ulBytesPerScan & 3;
  55259. +
  55260. + if (smtc_de_busy)
  55261. + deWaitForNotBusy();
  55262. +
  55263. + /*
  55264. + * 2D Source Base. Use 0 for HOST Blt.
  55265. + */
  55266. +
  55267. + SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
  55268. +
  55269. + /*
  55270. + * 2D Destination Base.
  55271. + *
  55272. + * It is an address offset (128 bit aligned) from the beginning of
  55273. + * frame buffer.
  55274. + */
  55275. +
  55276. + SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
  55277. +
  55278. + if (dPitch) {
  55279. +
  55280. + /*
  55281. + * Program pitch (distance between the 1st points of two
  55282. + * adjacent lines).
  55283. + *
  55284. + * Note that input pitch is BYTE value, but the 2D Pitch
  55285. + * register uses pixel values. Need Byte to pixel convertion.
  55286. + */
  55287. +
  55288. + SMTC_write2Dreg(DE_PITCH,
  55289. + FIELD_VALUE(0, DE_PITCH, DESTINATION,
  55290. + dPitch /
  55291. + bytePerPixel) | FIELD_VALUE(0,
  55292. + DE_PITCH,
  55293. + SOURCE,
  55294. + dPitch /
  55295. + bytePerPixel));
  55296. +
  55297. + /* Screen Window width in Pixels.
  55298. + *
  55299. + * 2D engine uses this value to calculate the linear address in
  55300. + * frame buffer for a given point.
  55301. + */
  55302. +
  55303. + SMTC_write2Dreg(DE_WINDOW_WIDTH,
  55304. + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
  55305. + (dPitch /
  55306. + bytePerPixel)) | FIELD_VALUE(0,
  55307. + DE_WINDOW_WIDTH,
  55308. + SOURCE,
  55309. + (dPitch
  55310. + /
  55311. + bytePerPixel)));
  55312. + }
  55313. + /* Note: For 2D Source in Host Write, only X_K1 field is needed, and
  55314. + * Y_K2 field is not used. For mono bitmap, use startBit for X_K1.
  55315. + */
  55316. +
  55317. + SMTC_write2Dreg(DE_SOURCE,
  55318. + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
  55319. + FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
  55320. + FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
  55321. +
  55322. + SMTC_write2Dreg(DE_DESTINATION,
  55323. + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
  55324. + FIELD_VALUE(0, DE_DESTINATION, X, dx) |
  55325. + FIELD_VALUE(0, DE_DESTINATION, Y, dy));
  55326. +
  55327. + SMTC_write2Dreg(DE_DIMENSION,
  55328. + FIELD_VALUE(0, DE_DIMENSION, X, width) |
  55329. + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
  55330. +
  55331. + SMTC_write2Dreg(DE_FOREGROUND, fColor);
  55332. + SMTC_write2Dreg(DE_BACKGROUND, bColor);
  55333. +
  55334. + if (bpp)
  55335. + deSetPixelFormat(bpp);
  55336. + /* Set the pixel format of the destination */
  55337. +
  55338. + de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
  55339. + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
  55340. + FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
  55341. + FIELD_SET(0, DE_CONTROL, HOST, MONO) |
  55342. + FIELD_SET(0, DE_CONTROL, STATUS, START);
  55343. +
  55344. + SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
  55345. +
  55346. + /* Write MONO data (line by line) to 2D Engine data port */
  55347. + for (i = 0; i < height; i++) {
  55348. + /* For each line, send the data in chunks of 4 bytes */
  55349. + for (j = 0; j < (ul4BytesPerScan / 4); j++)
  55350. + SMTC_write2Ddataport(0,
  55351. + *(unsigned long *)(pSrcbuf +
  55352. + (j * 4)));
  55353. +
  55354. + if (ulBytesRemain) {
  55355. + memcpy(ajRemain, pSrcbuf + ul4BytesPerScan,
  55356. + ulBytesRemain);
  55357. + SMTC_write2Ddataport(0, *(unsigned long *)ajRemain);
  55358. + }
  55359. +
  55360. + pSrcbuf += srcDelta;
  55361. + }
  55362. + smtc_de_busy = 1;
  55363. +
  55364. + return 0;
  55365. +}
  55366. +
  55367. +/*
  55368. + * This function gets the transparency status from DE_CONTROL register.
  55369. + * It returns a double word with the transparent fields properly set,
  55370. + * while other fields are 0.
  55371. + */
  55372. +unsigned long deGetTransparency(void)
  55373. +{
  55374. + unsigned long de_ctrl;
  55375. +
  55376. + de_ctrl = SMTC_read2Dreg(DE_CONTROL);
  55377. +
  55378. + de_ctrl &=
  55379. + FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
  55380. + FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT) |
  55381. + FIELD_MASK(DE_CONTROL_TRANSPARENCY);
  55382. +
  55383. + return de_ctrl;
  55384. +}
  55385. diff -Nur linux-2.6.30.5.orig/drivers/video/sm7xx/smtc2d.h linux-2.6.30.5/drivers/video/sm7xx/smtc2d.h
  55386. --- linux-2.6.30.5.orig/drivers/video/sm7xx/smtc2d.h 1970-01-01 01:00:00.000000000 +0100
  55387. +++ linux-2.6.30.5/drivers/video/sm7xx/smtc2d.h 2009-08-23 19:01:04.000000000 +0200
  55388. @@ -0,0 +1,530 @@
  55389. +/*
  55390. + * smtc2d.h -- Silicon Motion SM7xx 2D drawing engine functions.
  55391. + *
  55392. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  55393. + * Author: Ge Wang, gewang@siliconmotion.com
  55394. + *
  55395. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  55396. + * Author: Wu Zhangjin, wuzj@lemote.com
  55397. + *
  55398. + * This file is subject to the terms and conditions of the GNU General Public
  55399. + * License. See the file COPYING in the main directory of this archive for
  55400. + * more details.
  55401. + */
  55402. +
  55403. +#ifndef NULL
  55404. +#define NULL 0
  55405. +#endif
  55406. +
  55407. +/* Internal macros */
  55408. +
  55409. +#define _F_START(f) (0 ? f)
  55410. +#define _F_END(f) (1 ? f)
  55411. +#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
  55412. +#define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
  55413. +#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
  55414. +#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
  55415. +
  55416. +/* Global macros */
  55417. +
  55418. +#define FIELD_GET(x, reg, field) \
  55419. +( \
  55420. + _F_NORMALIZE((x), reg ## _ ## field) \
  55421. +)
  55422. +
  55423. +#define FIELD_SET(x, reg, field, value) \
  55424. +( \
  55425. + (x & ~_F_MASK(reg ## _ ## field)) \
  55426. + | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
  55427. +)
  55428. +
  55429. +#define FIELD_VALUE(x, reg, field, value) \
  55430. +( \
  55431. + (x & ~_F_MASK(reg ## _ ## field)) \
  55432. + | _F_DENORMALIZE(value, reg ## _ ## field) \
  55433. +)
  55434. +
  55435. +#define FIELD_CLEAR(reg, field) \
  55436. +( \
  55437. + ~_F_MASK(reg ## _ ## field) \
  55438. +)
  55439. +
  55440. +/* Field Macros */
  55441. +
  55442. +#define FIELD_START(field) (0 ? field)
  55443. +#define FIELD_END(field) (1 ? field)
  55444. +#define FIELD_SIZE(field) \
  55445. + (1 + FIELD_END(field) - FIELD_START(field))
  55446. +
  55447. +#define FIELD_MASK(field) \
  55448. + (((1 << (FIELD_SIZE(field)-1)) \
  55449. + | ((1 << (FIELD_SIZE(field)-1)) - 1)) \
  55450. + << FIELD_START(field))
  55451. +
  55452. +#define FIELD_NORMALIZE(reg, field) \
  55453. + (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
  55454. +
  55455. +#define FIELD_DENORMALIZE(field, value) \
  55456. + (((value) << FIELD_START(field)) & FIELD_MASK(field))
  55457. +
  55458. +#define FIELD_INIT(reg, field, value) \
  55459. + FIELD_DENORMALIZE(reg ## _ ## field, \
  55460. + reg ## _ ## field ## _ ## value)
  55461. +
  55462. +#define FIELD_INIT_VAL(reg, field, value) \
  55463. + (FIELD_DENORMALIZE(reg ## _ ## field, value))
  55464. +
  55465. +#define FIELD_VAL_SET(x, r, f, v) ({ \
  55466. + x = (x & ~FIELD_MASK(r ## _ ## f)) \
  55467. + | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) \
  55468. +})
  55469. +
  55470. +#define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b)))
  55471. +
  55472. +/* Transparent info definition */
  55473. +typedef struct {
  55474. + unsigned long match; /* Matching pixel is OPAQUE/TRANSPARENT */
  55475. + unsigned long select; /* Transparency controlled by SRC/DST */
  55476. + unsigned long control; /* ENABLE/DISABLE transparency */
  55477. + unsigned long color; /* Transparent color */
  55478. +} Transparent, *pTransparent;
  55479. +
  55480. +#define PIXEL_DEPTH_1_BP 0 /* 1 bit per pixel */
  55481. +#define PIXEL_DEPTH_8_BPP 1 /* 8 bits per pixel */
  55482. +#define PIXEL_DEPTH_16_BPP 2 /* 16 bits per pixel */
  55483. +#define PIXEL_DEPTH_32_BPP 3 /* 32 bits per pixel */
  55484. +#define PIXEL_DEPTH_YUV422 8 /* 16 bits per pixel YUV422 */
  55485. +#define PIXEL_DEPTH_YUV420 9 /* 16 bits per pixel YUV420 */
  55486. +
  55487. +#define PATTERN_WIDTH 8
  55488. +#define PATTERN_HEIGHT 8
  55489. +
  55490. +#define TOP_TO_BOTTOM 0
  55491. +#define BOTTOM_TO_TOP 1
  55492. +#define RIGHT_TO_LEFT BOTTOM_TO_TOP
  55493. +#define LEFT_TO_RIGHT TOP_TO_BOTTOM
  55494. +
  55495. +/* Constants used in Transparent structure */
  55496. +#define MATCH_OPAQUE 0x00000000
  55497. +#define MATCH_TRANSPARENT 0x00000400
  55498. +#define SOURCE 0x00000000
  55499. +#define DESTINATION 0x00000200
  55500. +
  55501. +/* 2D registers. */
  55502. +
  55503. +#define DE_SOURCE 0x000000
  55504. +#define DE_SOURCE_WRAP 31 : 31
  55505. +#define DE_SOURCE_WRAP_DISABLE 0
  55506. +#define DE_SOURCE_WRAP_ENABLE 1
  55507. +#define DE_SOURCE_X_K1 29 : 16
  55508. +#define DE_SOURCE_Y_K2 15 : 0
  55509. +
  55510. +#define DE_DESTINATION 0x000004
  55511. +#define DE_DESTINATION_WRAP 31 : 31
  55512. +#define DE_DESTINATION_WRAP_DISABLE 0
  55513. +#define DE_DESTINATION_WRAP_ENABLE 1
  55514. +#define DE_DESTINATION_X 28 : 16
  55515. +#define DE_DESTINATION_Y 15 : 0
  55516. +
  55517. +#define DE_DIMENSION 0x000008
  55518. +#define DE_DIMENSION_X 28 : 16
  55519. +#define DE_DIMENSION_Y_ET 15 : 0
  55520. +
  55521. +#define DE_CONTROL 0x00000C
  55522. +#define DE_CONTROL_STATUS 31 : 31
  55523. +#define DE_CONTROL_STATUS_STOP 0
  55524. +#define DE_CONTROL_STATUS_START 1
  55525. +#define DE_CONTROL_PATTERN 30 : 30
  55526. +#define DE_CONTROL_PATTERN_MONO 0
  55527. +#define DE_CONTROL_PATTERN_COLOR 1
  55528. +#define DE_CONTROL_UPDATE_DESTINATION_X 29 : 29
  55529. +#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
  55530. +#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
  55531. +#define DE_CONTROL_QUICK_START 28 : 28
  55532. +#define DE_CONTROL_QUICK_START_DISABLE 0
  55533. +#define DE_CONTROL_QUICK_START_ENABLE 1
  55534. +#define DE_CONTROL_DIRECTION 27 : 27
  55535. +#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
  55536. +#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
  55537. +#define DE_CONTROL_MAJOR 26 : 26
  55538. +#define DE_CONTROL_MAJOR_X 0
  55539. +#define DE_CONTROL_MAJOR_Y 1
  55540. +#define DE_CONTROL_STEP_X 25 : 25
  55541. +#define DE_CONTROL_STEP_X_POSITIVE 1
  55542. +#define DE_CONTROL_STEP_X_NEGATIVE 0
  55543. +#define DE_CONTROL_STEP_Y 24 : 24
  55544. +#define DE_CONTROL_STEP_Y_POSITIVE 1
  55545. +#define DE_CONTROL_STEP_Y_NEGATIVE 0
  55546. +#define DE_CONTROL_STRETCH 23 : 23
  55547. +#define DE_CONTROL_STRETCH_DISABLE 0
  55548. +#define DE_CONTROL_STRETCH_ENABLE 1
  55549. +#define DE_CONTROL_HOST 22 : 22
  55550. +#define DE_CONTROL_HOST_COLOR 0
  55551. +#define DE_CONTROL_HOST_MONO 1
  55552. +#define DE_CONTROL_LAST_PIXEL 21 : 21
  55553. +#define DE_CONTROL_LAST_PIXEL_OFF 0
  55554. +#define DE_CONTROL_LAST_PIXEL_ON 1
  55555. +#define DE_CONTROL_COMMAND 20 : 16
  55556. +#define DE_CONTROL_COMMAND_BITBLT 0
  55557. +#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
  55558. +#define DE_CONTROL_COMMAND_DE_TILE 2
  55559. +#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
  55560. +#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
  55561. +#define DE_CONTROL_COMMAND_RLE_STRIP 5
  55562. +#define DE_CONTROL_COMMAND_SHORT_STROKE 6
  55563. +#define DE_CONTROL_COMMAND_LINE_DRAW 7
  55564. +#define DE_CONTROL_COMMAND_HOST_WRITE 8
  55565. +#define DE_CONTROL_COMMAND_HOST_READ 9
  55566. +#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
  55567. +#define DE_CONTROL_COMMAND_ROTATE 11
  55568. +#define DE_CONTROL_COMMAND_FONT 12
  55569. +#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
  55570. +#define DE_CONTROL_ROP_SELECT 15 : 15
  55571. +#define DE_CONTROL_ROP_SELECT_ROP3 0
  55572. +#define DE_CONTROL_ROP_SELECT_ROP2 1
  55573. +#define DE_CONTROL_ROP2_SOURCE 14 : 14
  55574. +#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
  55575. +#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
  55576. +#define DE_CONTROL_MONO_DATA 13 : 12
  55577. +#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
  55578. +#define DE_CONTROL_MONO_DATA_8_PACKED 1
  55579. +#define DE_CONTROL_MONO_DATA_16_PACKED 2
  55580. +#define DE_CONTROL_MONO_DATA_32_PACKED 3
  55581. +#define DE_CONTROL_REPEAT_ROTATE 11 : 11
  55582. +#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
  55583. +#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
  55584. +#define DE_CONTROL_TRANSPARENCY_MATCH 10 : 10
  55585. +#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
  55586. +#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
  55587. +#define DE_CONTROL_TRANSPARENCY_SELECT 9 : 9
  55588. +#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
  55589. +#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
  55590. +#define DE_CONTROL_TRANSPARENCY 8 : 8
  55591. +#define DE_CONTROL_TRANSPARENCY_DISABLE 0
  55592. +#define DE_CONTROL_TRANSPARENCY_ENABLE 1
  55593. +#define DE_CONTROL_ROP 7 : 0
  55594. +
  55595. +/* Pseudo fields. */
  55596. +
  55597. +#define DE_CONTROL_SHORT_STROKE_DIR 27 : 24
  55598. +#define DE_CONTROL_SHORT_STROKE_DIR_225 0
  55599. +#define DE_CONTROL_SHORT_STROKE_DIR_135 1
  55600. +#define DE_CONTROL_SHORT_STROKE_DIR_315 2
  55601. +#define DE_CONTROL_SHORT_STROKE_DIR_45 3
  55602. +#define DE_CONTROL_SHORT_STROKE_DIR_270 4
  55603. +#define DE_CONTROL_SHORT_STROKE_DIR_90 5
  55604. +#define DE_CONTROL_SHORT_STROKE_DIR_180 8
  55605. +#define DE_CONTROL_SHORT_STROKE_DIR_0 10
  55606. +#define DE_CONTROL_ROTATION 25 : 24
  55607. +#define DE_CONTROL_ROTATION_0 0
  55608. +#define DE_CONTROL_ROTATION_270 1
  55609. +#define DE_CONTROL_ROTATION_90 2
  55610. +#define DE_CONTROL_ROTATION_180 3
  55611. +
  55612. +#define DE_PITCH 0x000010
  55613. +#define DE_PITCH_DESTINATION 28 : 16
  55614. +#define DE_PITCH_SOURCE 12 : 0
  55615. +
  55616. +#define DE_FOREGROUND 0x000014
  55617. +#define DE_FOREGROUND_COLOR 31 : 0
  55618. +
  55619. +#define DE_BACKGROUND 0x000018
  55620. +#define DE_BACKGROUND_COLOR 31 : 0
  55621. +
  55622. +#define DE_STRETCH_FORMAT 0x00001C
  55623. +#define DE_STRETCH_FORMAT_PATTERN_XY 30 : 30
  55624. +#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
  55625. +#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
  55626. +#define DE_STRETCH_FORMAT_PATTERN_Y 29 : 27
  55627. +#define DE_STRETCH_FORMAT_PATTERN_X 25 : 23
  55628. +#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21 : 20
  55629. +#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
  55630. +#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
  55631. +#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
  55632. +#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
  55633. +#define DE_STRETCH_FORMAT_ADDRESSING 19 : 16
  55634. +#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
  55635. +#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
  55636. +#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11 : 0
  55637. +
  55638. +#define DE_COLOR_COMPARE 0x000020
  55639. +#define DE_COLOR_COMPARE_COLOR 23 : 0
  55640. +
  55641. +#define DE_COLOR_COMPARE_MASK 0x000024
  55642. +#define DE_COLOR_COMPARE_MASK_MASKS 23 : 0
  55643. +
  55644. +#define DE_MASKS 0x000028
  55645. +#define DE_MASKS_BYTE_MASK 31 : 16
  55646. +#define DE_MASKS_BIT_MASK 15 : 0
  55647. +
  55648. +#define DE_CLIP_TL 0x00002C
  55649. +#define DE_CLIP_TL_TOP 31 : 16
  55650. +#define DE_CLIP_TL_STATUS 13 : 13
  55651. +#define DE_CLIP_TL_STATUS_DISABLE 0
  55652. +#define DE_CLIP_TL_STATUS_ENABLE 1
  55653. +#define DE_CLIP_TL_INHIBIT 12 : 12
  55654. +#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
  55655. +#define DE_CLIP_TL_INHIBIT_INSIDE 1
  55656. +#define DE_CLIP_TL_LEFT 11 : 0
  55657. +
  55658. +#define DE_CLIP_BR 0x000030
  55659. +#define DE_CLIP_BR_BOTTOM 31 : 16
  55660. +#define DE_CLIP_BR_RIGHT 12 : 0
  55661. +
  55662. +#define DE_MONO_PATTERN_LOW 0x000034
  55663. +#define DE_MONO_PATTERN_LOW_PATTERN 31 : 0
  55664. +
  55665. +#define DE_MONO_PATTERN_HIGH 0x000038
  55666. +#define DE_MONO_PATTERN_HIGH_PATTERN 31 : 0
  55667. +
  55668. +#define DE_WINDOW_WIDTH 0x00003C
  55669. +#define DE_WINDOW_WIDTH_DESTINATION 28 : 16
  55670. +#define DE_WINDOW_WIDTH_SOURCE 12 : 0
  55671. +
  55672. +#define DE_WINDOW_SOURCE_BASE 0x000040
  55673. +#define DE_WINDOW_SOURCE_BASE_EXT 27 : 27
  55674. +#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
  55675. +#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
  55676. +#define DE_WINDOW_SOURCE_BASE_CS 26 : 26
  55677. +#define DE_WINDOW_SOURCE_BASE_CS_0 0
  55678. +#define DE_WINDOW_SOURCE_BASE_CS_1 1
  55679. +#define DE_WINDOW_SOURCE_BASE_ADDRESS 25 : 0
  55680. +
  55681. +#define DE_WINDOW_DESTINATION_BASE 0x000044
  55682. +#define DE_WINDOW_DESTINATION_BASE_EXT 27 : 27
  55683. +#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
  55684. +#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
  55685. +#define DE_WINDOW_DESTINATION_BASE_CS 26 : 26
  55686. +#define DE_WINDOW_DESTINATION_BASE_CS_0 0
  55687. +#define DE_WINDOW_DESTINATION_BASE_CS_1 1
  55688. +#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25 : 0
  55689. +
  55690. +#define DE_ALPHA 0x000048
  55691. +#define DE_ALPHA_VALUE 7 : 0
  55692. +
  55693. +#define DE_WRAP 0x00004C
  55694. +#define DE_WRAP_X 31 : 16
  55695. +#define DE_WRAP_Y 15 : 0
  55696. +
  55697. +#define DE_STATUS 0x000050
  55698. +#define DE_STATUS_CSC 1 : 1
  55699. +#define DE_STATUS_CSC_CLEAR 0
  55700. +#define DE_STATUS_CSC_NOT_ACTIVE 0
  55701. +#define DE_STATUS_CSC_ACTIVE 1
  55702. +#define DE_STATUS_2D 0 : 0
  55703. +#define DE_STATUS_2D_CLEAR 0
  55704. +#define DE_STATUS_2D_NOT_ACTIVE 0
  55705. +#define DE_STATUS_2D_ACTIVE 1
  55706. +
  55707. +/* Color Space Conversion registers. */
  55708. +
  55709. +#define CSC_Y_SOURCE_BASE 0x0000C8
  55710. +#define CSC_Y_SOURCE_BASE_EXT 27 : 27
  55711. +#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
  55712. +#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
  55713. +#define CSC_Y_SOURCE_BASE_CS 26 : 26
  55714. +#define CSC_Y_SOURCE_BASE_CS_0 0
  55715. +#define CSC_Y_SOURCE_BASE_CS_1 1
  55716. +#define CSC_Y_SOURCE_BASE_ADDRESS 25 : 0
  55717. +
  55718. +#define CSC_CONSTANTS 0x0000CC
  55719. +#define CSC_CONSTANTS_Y 31 : 24
  55720. +#define CSC_CONSTANTS_R 23 : 16
  55721. +#define CSC_CONSTANTS_G 15 : 8
  55722. +#define CSC_CONSTANTS_B 7 : 0
  55723. +
  55724. +#define CSC_Y_SOURCE_X 0x0000D0
  55725. +#define CSC_Y_SOURCE_X_INTEGER 26 : 16
  55726. +#define CSC_Y_SOURCE_X_FRACTION 15 : 3
  55727. +
  55728. +#define CSC_Y_SOURCE_Y 0x0000D4
  55729. +#define CSC_Y_SOURCE_Y_INTEGER 27 : 16
  55730. +#define CSC_Y_SOURCE_Y_FRACTION 15 : 3
  55731. +
  55732. +#define CSC_U_SOURCE_BASE 0x0000D8
  55733. +#define CSC_U_SOURCE_BASE_EXT 27 : 27
  55734. +#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
  55735. +#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
  55736. +#define CSC_U_SOURCE_BASE_CS 26 : 26
  55737. +#define CSC_U_SOURCE_BASE_CS_0 0
  55738. +#define CSC_U_SOURCE_BASE_CS_1 1
  55739. +#define CSC_U_SOURCE_BASE_ADDRESS 25 : 0
  55740. +
  55741. +#define CSC_V_SOURCE_BASE 0x0000DC
  55742. +#define CSC_V_SOURCE_BASE_EXT 27 : 27
  55743. +#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
  55744. +#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
  55745. +#define CSC_V_SOURCE_BASE_CS 26 : 26
  55746. +#define CSC_V_SOURCE_BASE_CS_0 0
  55747. +#define CSC_V_SOURCE_BASE_CS_1 1
  55748. +#define CSC_V_SOURCE_BASE_ADDRESS 25 : 0
  55749. +
  55750. +#define CSC_SOURCE_DIMENSION 0x0000E0
  55751. +#define CSC_SOURCE_DIMENSION_X 31 : 16
  55752. +#define CSC_SOURCE_DIMENSION_Y 15 : 0
  55753. +
  55754. +#define CSC_SOURCE_PITCH 0x0000E4
  55755. +#define CSC_SOURCE_PITCH_Y 31 : 16
  55756. +#define CSC_SOURCE_PITCH_UV 15 : 0
  55757. +
  55758. +#define CSC_DESTINATION 0x0000E8
  55759. +#define CSC_DESTINATION_WRAP 31 : 31
  55760. +#define CSC_DESTINATION_WRAP_DISABLE 0
  55761. +#define CSC_DESTINATION_WRAP_ENABLE 1
  55762. +#define CSC_DESTINATION_X 27 : 16
  55763. +#define CSC_DESTINATION_Y 11 : 0
  55764. +
  55765. +#define CSC_DESTINATION_DIMENSION 0x0000EC
  55766. +#define CSC_DESTINATION_DIMENSION_X 31 : 16
  55767. +#define CSC_DESTINATION_DIMENSION_Y 15 : 0
  55768. +
  55769. +#define CSC_DESTINATION_PITCH 0x0000F0
  55770. +#define CSC_DESTINATION_PITCH_X 31 : 16
  55771. +#define CSC_DESTINATION_PITCH_Y 15 : 0
  55772. +
  55773. +#define CSC_SCALE_FACTOR 0x0000F4
  55774. +#define CSC_SCALE_FACTOR_HORIZONTAL 31 : 16
  55775. +#define CSC_SCALE_FACTOR_VERTICAL 15 : 0
  55776. +
  55777. +#define CSC_DESTINATION_BASE 0x0000F8
  55778. +#define CSC_DESTINATION_BASE_EXT 27 : 27
  55779. +#define CSC_DESTINATION_BASE_EXT_LOCAL 0
  55780. +#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
  55781. +#define CSC_DESTINATION_BASE_CS 26 : 26
  55782. +#define CSC_DESTINATION_BASE_CS_0 0
  55783. +#define CSC_DESTINATION_BASE_CS_1 1
  55784. +#define CSC_DESTINATION_BASE_ADDRESS 25 : 0
  55785. +
  55786. +#define CSC_CONTROL 0x0000FC
  55787. +#define CSC_CONTROL_STATUS 31 : 31
  55788. +#define CSC_CONTROL_STATUS_STOP 0
  55789. +#define CSC_CONTROL_STATUS_START 1
  55790. +#define CSC_CONTROL_SOURCE_FORMAT 30 : 28
  55791. +#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
  55792. +#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
  55793. +#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
  55794. +#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
  55795. +#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
  55796. +#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
  55797. +#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
  55798. +#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
  55799. +#define CSC_CONTROL_DESTINATION_FORMAT 27 : 26
  55800. +#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
  55801. +#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
  55802. +#define CSC_CONTROL_HORIZONTAL_FILTER 25 : 25
  55803. +#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
  55804. +#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
  55805. +#define CSC_CONTROL_VERTICAL_FILTER 24 : 24
  55806. +#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
  55807. +#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
  55808. +#define CSC_CONTROL_BYTE_ORDER 23 : 23
  55809. +#define CSC_CONTROL_BYTE_ORDER_YUYV 0
  55810. +#define CSC_CONTROL_BYTE_ORDER_UYVY 1
  55811. +
  55812. +#define DE_DATA_PORT_501 0x110000
  55813. +#define DE_DATA_PORT_712 0x400000
  55814. +#define DE_DATA_PORT_722 0x6000
  55815. +
  55816. +/* point to virtual Memory Map IO starting address */
  55817. +extern char *smtc_RegBaseAddress;
  55818. +/* point to virtual video memory starting address */
  55819. +extern char *smtc_VRAMBaseAddress;
  55820. +extern unsigned char smtc_de_busy;
  55821. +
  55822. +extern unsigned long memRead32(unsigned long nOffset);
  55823. +extern void memWrite32(unsigned long nOffset, unsigned long nData);
  55824. +extern unsigned long SMTC_read2Dreg(unsigned long nOffset);
  55825. +
  55826. +/* 2D functions */
  55827. +extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
  55828. + unsigned int bpp);
  55829. +
  55830. +extern void deWaitForNotBusy(void);
  55831. +
  55832. +extern void deVerticalLine(unsigned long dst_base,
  55833. + unsigned long dst_pitch,
  55834. + unsigned long nX,
  55835. + unsigned long nY,
  55836. + unsigned long dst_height,
  55837. + unsigned long nColor);
  55838. +
  55839. +extern void deHorizontalLine(unsigned long dst_base,
  55840. + unsigned long dst_pitch,
  55841. + unsigned long nX,
  55842. + unsigned long nY,
  55843. + unsigned long dst_width,
  55844. + unsigned long nColor);
  55845. +
  55846. +extern void deLine(unsigned long dst_base,
  55847. + unsigned long dst_pitch,
  55848. + unsigned long nX1,
  55849. + unsigned long nY1,
  55850. + unsigned long nX2,
  55851. + unsigned long nY2,
  55852. + unsigned long nColor);
  55853. +
  55854. +extern void deFillRect(unsigned long dst_base,
  55855. + unsigned long dst_pitch,
  55856. + unsigned long dst_X,
  55857. + unsigned long dst_Y,
  55858. + unsigned long dst_width,
  55859. + unsigned long dst_height,
  55860. + unsigned long nColor);
  55861. +
  55862. +extern void deRotatePattern(unsigned char *pattern_dstaddr,
  55863. + unsigned long pattern_src_addr,
  55864. + unsigned long pattern_BPP,
  55865. + unsigned long pattern_stride,
  55866. + int patternX,
  55867. + int patternY);
  55868. +
  55869. +extern void deCopy(unsigned long dst_base,
  55870. + unsigned long dst_pitch,
  55871. + unsigned long dst_BPP,
  55872. + unsigned long dst_X,
  55873. + unsigned long dst_Y,
  55874. + unsigned long dst_width,
  55875. + unsigned long dst_height,
  55876. + unsigned long src_base,
  55877. + unsigned long src_pitch,
  55878. + unsigned long src_X,
  55879. + unsigned long src_Y,
  55880. + pTransparent pTransp,
  55881. + unsigned char nROP2);
  55882. +
  55883. +/*
  55884. + * System memory to Video memory monochrome expansion.
  55885. + *
  55886. + * Source is monochrome image in system memory. This function expands the
  55887. + * monochrome data to color image in video memory.
  55888. + *
  55889. + * @pSrcbuf: pointer to start of source buffer in system memory
  55890. + * @srcDelta: Pitch value (in bytes) of the source buffer, +ive means top
  55891. + * down and -ive mean button up
  55892. + * @startBit: Mono data can start at any bit in a byte, this value should
  55893. + * be 0 to 7
  55894. + * @dBase: Address of destination : offset in frame buffer
  55895. + * @dPitch: Pitch value of destination surface in BYTE
  55896. + * @bpp: Color depth of destination surface
  55897. + * @dx, dy: Starting coordinate of destination surface
  55898. + * @width, height: width and height of rectange in pixel value
  55899. + * @fColor,bColor: Foreground, Background color (corresponding to a 1, 0 in
  55900. + * the monochrome data)
  55901. + * @rop2: ROP value
  55902. + */
  55903. +
  55904. +extern long deSystemMem2VideoMemMonoBlt(
  55905. + const char *pSrcbuf,
  55906. + long srcDelta,
  55907. + unsigned long startBit,
  55908. + unsigned long dBase,
  55909. + unsigned long dPitch,
  55910. + unsigned long bpp,
  55911. + unsigned long dx, unsigned long dy,
  55912. + unsigned long width, unsigned long height,
  55913. + unsigned long fColor,
  55914. + unsigned long bColor,
  55915. + unsigned long rop2);
  55916. +
  55917. +extern unsigned long deGetTransparency(void);
  55918. +extern void deSetPixelFormat(unsigned long bpp);
  55919. diff -Nur linux-2.6.30.5.orig/drivers/video/sm7xx/smtcfb.c linux-2.6.30.5/drivers/video/sm7xx/smtcfb.c
  55920. --- linux-2.6.30.5.orig/drivers/video/sm7xx/smtcfb.c 1970-01-01 01:00:00.000000000 +0100
  55921. +++ linux-2.6.30.5/drivers/video/sm7xx/smtcfb.c 2009-08-23 19:01:04.000000000 +0200
  55922. @@ -0,0 +1,1138 @@
  55923. +/*
  55924. + * smtcfb.c -- Silicon Motion SM7xx frame buffer device
  55925. + *
  55926. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  55927. + * Authors: Ge Wang, gewang@siliconmotion.com
  55928. + * Boyod boyod.yang@siliconmotion.com.cn
  55929. + *
  55930. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  55931. + * Author: Wu Zhangjin, wuzj@lemote.com
  55932. + *
  55933. + * This file is subject to the terms and conditions of the GNU General Public
  55934. + * License. See the file COPYING in the main directory of this archive for
  55935. + * more details.
  55936. + *
  55937. + * Version 0.10.26192.21.01
  55938. + * - Add PowerPC/Big endian support
  55939. + * - Add 2D support for Lynx
  55940. + * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn>
  55941. + *
  55942. + * Version 0.09.2621.00.01
  55943. + * - Only support Linux Kernel's version 2.6.21.
  55944. + * Boyod.yang <boyod.yang@siliconmotion.com.cn>
  55945. + *
  55946. + * Version 0.09
  55947. + * - Only support Linux Kernel's version 2.6.12.
  55948. + * Boyod.yang <boyod.yang@siliconmotion.com.cn>
  55949. + */
  55950. +
  55951. +#ifndef __KERNEL__
  55952. +#define __KERNEL__
  55953. +#endif
  55954. +
  55955. +#include <linux/io.h>
  55956. +#include <linux/fb.h>
  55957. +#include <linux/pci.h>
  55958. +#include <linux/init.h>
  55959. +#include <linux/uaccess.h>
  55960. +#include <linux/screen_info.h>
  55961. +
  55962. +#ifdef CONFIG_PM
  55963. +#include <linux/pm.h>
  55964. +#endif
  55965. +
  55966. +struct screen_info smtc_screen_info;
  55967. +
  55968. +#include "smtcfb.h"
  55969. +#include "smtc2d.h"
  55970. +
  55971. +#ifdef DEBUG
  55972. +#define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg)
  55973. +#else
  55974. +#define smdbg(format, arg...)
  55975. +#endif
  55976. +
  55977. +/*
  55978. +* Private structure
  55979. +*/
  55980. +struct smtcfb_info {
  55981. + /*
  55982. + * The following is a pointer to be passed into the
  55983. + * functions below. The modules outside the main
  55984. + * voyager.c driver have no knowledge as to what
  55985. + * is within this structure.
  55986. + */
  55987. + struct fb_info fb;
  55988. + struct display_switch *dispsw;
  55989. + struct pci_dev *dev;
  55990. + signed int currcon;
  55991. +
  55992. + struct {
  55993. + u8 red, green, blue;
  55994. + } palette[NR_RGB];
  55995. +
  55996. + u_int palette_size;
  55997. +};
  55998. +
  55999. +struct par_info {
  56000. + /*
  56001. + * Hardware
  56002. + */
  56003. + u16 chipID;
  56004. + unsigned char __iomem *m_pMMIO;
  56005. + char __iomem *m_pLFB;
  56006. + char *m_pDPR;
  56007. + char *m_pVPR;
  56008. + char *m_pCPR;
  56009. +
  56010. + u_int width;
  56011. + u_int height;
  56012. + u_int hz;
  56013. + u_long BaseAddressInVRAM;
  56014. + u8 chipRevID;
  56015. +};
  56016. +
  56017. +struct vesa_mode_table {
  56018. + char mode_index[15];
  56019. + u16 lfb_width;
  56020. + u16 lfb_height;
  56021. + u16 lfb_depth;
  56022. +};
  56023. +
  56024. +static struct vesa_mode_table vesa_mode[] = {
  56025. + {"640x480x8", 640, 480, 8},
  56026. + {"800x480x8", 800, 480, 8},
  56027. + {"800x600x8", 800, 600, 8},
  56028. + {"1024x768x8", 1024, 768, 8},
  56029. + {"1280x1024x8", 1280, 1024, 8},
  56030. +
  56031. + {"640x480x16", 640, 480, 16},
  56032. + {"800x480x16", 800, 480, 16},
  56033. + {"800x600x16", 800, 600, 16},
  56034. + {"1024x768x16", 1024, 768, 16},
  56035. + {"1280x1024x16", 1280, 1024, 16},
  56036. +
  56037. + {"640x480x24", 640, 480, 24},
  56038. + {"800x480x24", 800, 480, 24},
  56039. + {"800x600x24", 800, 600, 24},
  56040. + {"1024x768x24", 1024, 768, 24},
  56041. + {"1280x1024x24", 1280, 1024, 24},
  56042. +};
  56043. +
  56044. +char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
  56045. +char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
  56046. +
  56047. +char *smtc_2DBaseAddress; /* 2D engine starting address */
  56048. +char *smtc_2Ddataport; /* 2D data port offset */
  56049. +short smtc_2Dacceleration;
  56050. +
  56051. +static u32 colreg[17];
  56052. +static struct par_info hw; /* hardware information */
  56053. +
  56054. +#if defined(CONFIG_FB_SM7XX_DUALHEAD)
  56055. +
  56056. +static u32 colreg2[17];
  56057. +/* hardware information for second display (CRT) */
  56058. +static struct par_info hw2;
  56059. +/* fb_info for second display (CRT) */
  56060. +struct smtcfb_info smtcfb_info2;
  56061. +
  56062. +#endif /* CONFIG_FB_SM501_DUALHEAD */
  56063. +
  56064. +u16 smtc_ChipIDs[] = {
  56065. + 0x710,
  56066. + 0x712,
  56067. + 0x720
  56068. +};
  56069. +
  56070. +int sm712be_flag;
  56071. +
  56072. +#define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16))
  56073. +
  56074. +void deWaitForNotBusy(void)
  56075. +{
  56076. + unsigned long i = 0x1000000;
  56077. + while (i--) {
  56078. + if ((smtc_seqr(0x16) & 0x18) == 0x10)
  56079. + break;
  56080. + }
  56081. + smtc_de_busy = 0;
  56082. +}
  56083. +
  56084. +static void sm712_set_timing(struct smtcfb_info *sfb,
  56085. + struct par_info *ppar_info)
  56086. +{
  56087. + int i = 0, j = 0;
  56088. + u32 m_nScreenStride;
  56089. +
  56090. + smdbg("\nppar_info->width = %d ppar_info->height = %d"
  56091. + "sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n",
  56092. + ppar_info->width, ppar_info->height,
  56093. + sfb->fb.var.bits_per_pixel, ppar_info->hz);
  56094. +
  56095. + for (j = 0; j < numVGAModes; j++) {
  56096. + if (VGAMode[j].mmSizeX == ppar_info->width &&
  56097. + VGAMode[j].mmSizeY == ppar_info->height &&
  56098. + VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
  56099. + VGAMode[j].hz == ppar_info->hz) {
  56100. +
  56101. + smdbg("\nVGAMode[j].mmSizeX = %d VGAMode[j].mmSizeY ="
  56102. + "%d VGAMode[j].bpp = %d"
  56103. + "VGAMode[j].hz=%d\n",
  56104. + VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
  56105. + VGAMode[j].bpp, VGAMode[j].hz);
  56106. +
  56107. + smdbg("VGAMode index=%d\n", j);
  56108. +
  56109. + smtc_mmiowb(0x0, 0x3c6);
  56110. +
  56111. + smtc_seqw(0, 0x1);
  56112. +
  56113. + smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
  56114. +
  56115. + /* init SEQ register SR00 - SR04 */
  56116. + for (i = 0; i < SIZE_SR00_SR04; i++)
  56117. + smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
  56118. +
  56119. + /* init SEQ register SR10 - SR24 */
  56120. + for (i = 0; i < SIZE_SR10_SR24; i++)
  56121. + smtc_seqw(i + 0x10,
  56122. + VGAMode[j].Init_SR10_SR24[i]);
  56123. +
  56124. + /* init SEQ register SR30 - SR75 */
  56125. + for (i = 0; i < SIZE_SR30_SR75; i++)
  56126. + if (((i + 0x30) != 0x62) \
  56127. + && ((i + 0x30) != 0x6a) \
  56128. + && ((i + 0x30) != 0x6b))
  56129. + smtc_seqw(i + 0x30,
  56130. + VGAMode[j].Init_SR30_SR75[i]);
  56131. +
  56132. + /* init SEQ register SR80 - SR93 */
  56133. + for (i = 0; i < SIZE_SR80_SR93; i++)
  56134. + smtc_seqw(i + 0x80,
  56135. + VGAMode[j].Init_SR80_SR93[i]);
  56136. +
  56137. + /* init SEQ register SRA0 - SRAF */
  56138. + for (i = 0; i < SIZE_SRA0_SRAF; i++)
  56139. + smtc_seqw(i + 0xa0,
  56140. + VGAMode[j].Init_SRA0_SRAF[i]);
  56141. +
  56142. + /* init Graphic register GR00 - GR08 */
  56143. + for (i = 0; i < SIZE_GR00_GR08; i++)
  56144. + smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
  56145. +
  56146. + /* init Attribute register AR00 - AR14 */
  56147. + for (i = 0; i < SIZE_AR00_AR14; i++)
  56148. + smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
  56149. +
  56150. + /* init CRTC register CR00 - CR18 */
  56151. + for (i = 0; i < SIZE_CR00_CR18; i++)
  56152. + smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
  56153. +
  56154. + /* init CRTC register CR30 - CR4D */
  56155. + for (i = 0; i < SIZE_CR30_CR4D; i++)
  56156. + smtc_crtcw(i + 0x30,
  56157. + VGAMode[j].Init_CR30_CR4D[i]);
  56158. +
  56159. + /* init CRTC register CR90 - CRA7 */
  56160. + for (i = 0; i < SIZE_CR90_CRA7; i++)
  56161. + smtc_crtcw(i + 0x90,
  56162. + VGAMode[j].Init_CR90_CRA7[i]);
  56163. + }
  56164. + }
  56165. + smtc_mmiowb(0x67, 0x3c2);
  56166. +
  56167. + /* set VPR registers */
  56168. + writel(0x0, ppar_info->m_pVPR + 0x0C);
  56169. + writel(0x0, ppar_info->m_pVPR + 0x40);
  56170. +
  56171. + /* set data width */
  56172. + m_nScreenStride =
  56173. + (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
  56174. + switch (sfb->fb.var.bits_per_pixel) {
  56175. + case 8:
  56176. + writel(0x0, ppar_info->m_pVPR + 0x0);
  56177. + break;
  56178. + case 16:
  56179. + writel(0x00020000, ppar_info->m_pVPR + 0x0);
  56180. + break;
  56181. + case 24:
  56182. + writel(0x00040000, ppar_info->m_pVPR + 0x0);
  56183. + break;
  56184. + case 32:
  56185. + writel(0x00030000, ppar_info->m_pVPR + 0x0);
  56186. + break;
  56187. + }
  56188. + writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
  56189. + ppar_info->m_pVPR + 0x10);
  56190. +
  56191. +}
  56192. +
  56193. +static void sm712_setpalette(int regno, unsigned red, unsigned green,
  56194. + unsigned blue, struct fb_info *info)
  56195. +{
  56196. + struct par_info *cur_par = (struct par_info *)info->par;
  56197. +
  56198. + if (cur_par->BaseAddressInVRAM)
  56199. + /*
  56200. + * second display palette for dual head. Enable CRT RAM, 6-bit
  56201. + * RAM
  56202. + */
  56203. + smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x20);
  56204. + else
  56205. + /* primary display palette. Enable LCD RAM only, 6-bit RAM */
  56206. + smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
  56207. + smtc_mmiowb(regno, dac_reg);
  56208. + smtc_mmiowb(red >> 10, dac_val);
  56209. + smtc_mmiowb(green >> 10, dac_val);
  56210. + smtc_mmiowb(blue >> 10, dac_val);
  56211. +}
  56212. +
  56213. +static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
  56214. + *ppar_info)
  56215. +{
  56216. + switch (ppar_info->chipID) {
  56217. + case 0x710:
  56218. + case 0x712:
  56219. + case 0x720:
  56220. + sm712_set_timing(sfb, ppar_info);
  56221. + break;
  56222. + }
  56223. +}
  56224. +
  56225. +static struct fb_var_screeninfo smtcfb_var = {
  56226. + .xres = 1024,
  56227. + .yres = 600,
  56228. + .xres_virtual = 1024,
  56229. + .yres_virtual = 600,
  56230. + .bits_per_pixel = 16,
  56231. + .red = {16, 8, 0},
  56232. + .green = {8, 8, 0},
  56233. + .blue = {0, 8, 0},
  56234. + .activate = FB_ACTIVATE_NOW,
  56235. + .height = -1,
  56236. + .width = -1,
  56237. + .vmode = FB_VMODE_NONINTERLACED,
  56238. +};
  56239. +
  56240. +static struct fb_fix_screeninfo smtcfb_fix = {
  56241. + .id = "sm712fb",
  56242. + .type = FB_TYPE_PACKED_PIXELS,
  56243. + .visual = FB_VISUAL_TRUECOLOR,
  56244. + .line_length = 800 * 3,
  56245. + .accel = FB_ACCEL_SMI_LYNX,
  56246. +};
  56247. +
  56248. +/* chan_to_field
  56249. + *
  56250. + * convert a colour value into a field position
  56251. + *
  56252. + * from pxafb.c
  56253. + */
  56254. +
  56255. +static inline unsigned int chan_to_field(unsigned int chan,
  56256. + struct fb_bitfield *bf)
  56257. +{
  56258. + chan &= 0xffff;
  56259. + chan >>= 16 - bf->length;
  56260. + return chan << bf->offset;
  56261. +}
  56262. +
  56263. +static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
  56264. + unsigned blue, unsigned trans, struct fb_info *info)
  56265. +{
  56266. + struct smtcfb_info *sfb = (struct smtcfb_info *)info;
  56267. + u32 val;
  56268. +
  56269. + if (regno > 255)
  56270. + return 1;
  56271. +
  56272. + switch (sfb->fb.fix.visual) {
  56273. + case FB_VISUAL_DIRECTCOLOR:
  56274. + case FB_VISUAL_TRUECOLOR:
  56275. + /*
  56276. + * 16/32 bit true-colour, use pseuo-palette for 16 base color
  56277. + */
  56278. + if (regno < 16) {
  56279. + if (sfb->fb.var.bits_per_pixel == 16) {
  56280. + u32 *pal = sfb->fb.pseudo_palette;
  56281. + val = chan_to_field(red, &sfb->fb.var.red);
  56282. + val |= chan_to_field(green, \
  56283. + &sfb->fb.var.green);
  56284. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  56285. +#ifdef __BIG_ENDIAN
  56286. + pal[regno] =
  56287. + ((red & 0xf800) >> 8) |
  56288. + ((green & 0xe000) >> 13) |
  56289. + ((green & 0x1c00) << 3) |
  56290. + ((blue & 0xf800) >> 3);
  56291. +#else
  56292. + pal[regno] = val;
  56293. +#endif
  56294. + } else {
  56295. + u32 *pal = sfb->fb.pseudo_palette;
  56296. + val = chan_to_field(red, &sfb->fb.var.red);
  56297. + val |= chan_to_field(green, \
  56298. + &sfb->fb.var.green);
  56299. + val |= chan_to_field(blue, &sfb->fb.var.blue);
  56300. +#ifdef __BIG_ENDIAN
  56301. + val =
  56302. + (val & 0xff00ff00 >> 8) |
  56303. + (val & 0x00ff00ff << 8);
  56304. +#endif
  56305. + pal[regno] = val;
  56306. + }
  56307. + }
  56308. + break;
  56309. +
  56310. + case FB_VISUAL_PSEUDOCOLOR:
  56311. + /* color depth 8 bit */
  56312. + sm712_setpalette(regno, red, green, blue, info);
  56313. + break;
  56314. +
  56315. + default:
  56316. + return 1; /* unknown type */
  56317. + }
  56318. +
  56319. + return 0;
  56320. +
  56321. +}
  56322. +
  56323. +#ifdef __BIG_ENDIAN
  56324. +static ssize_t smtcfb_read(struct fb_info *info, char __user * buf, size_t
  56325. + count, loff_t *ppos)
  56326. +{
  56327. + unsigned long p = *ppos;
  56328. +
  56329. + u32 *buffer, *dst;
  56330. + u32 __iomem *src;
  56331. + int c, i, cnt = 0, err = 0;
  56332. + unsigned long total_size;
  56333. +
  56334. + if (!info || !info->screen_base)
  56335. + return -ENODEV;
  56336. +
  56337. + if (info->state != FBINFO_STATE_RUNNING)
  56338. + return -EPERM;
  56339. +
  56340. + total_size = info->screen_size;
  56341. +
  56342. + if (total_size == 0)
  56343. + total_size = info->fix.smem_len;
  56344. +
  56345. + if (p >= total_size)
  56346. + return 0;
  56347. +
  56348. + if (count >= total_size)
  56349. + count = total_size;
  56350. +
  56351. + if (count + p > total_size)
  56352. + count = total_size - p;
  56353. +
  56354. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  56355. + if (!buffer)
  56356. + return -ENOMEM;
  56357. +
  56358. + src = (u32 __iomem *) (info->screen_base + p);
  56359. +
  56360. + if (info->fbops->fb_sync)
  56361. + info->fbops->fb_sync(info);
  56362. +
  56363. + while (count) {
  56364. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  56365. + dst = buffer;
  56366. + for (i = c >> 2; i--;) {
  56367. + *dst = fb_readl(src++);
  56368. + *dst =
  56369. + (*dst & 0xff00ff00 >> 8) |
  56370. + (*dst & 0x00ff00ff << 8);
  56371. + dst++;
  56372. + }
  56373. + if (c & 3) {
  56374. + u8 *dst8 = (u8 *) dst;
  56375. + u8 __iomem *src8 = (u8 __iomem *) src;
  56376. +
  56377. + for (i = c & 3; i--;) {
  56378. + if (i & 1) {
  56379. + *dst8++ = fb_readb(++src8);
  56380. + } else {
  56381. + *dst8++ = fb_readb(--src8);
  56382. + src8 += 2;
  56383. + }
  56384. + }
  56385. + src = (u32 __iomem *) src8;
  56386. + }
  56387. +
  56388. + if (copy_to_user(buf, buffer, c)) {
  56389. + err = -EFAULT;
  56390. + break;
  56391. + }
  56392. + *ppos += c;
  56393. + buf += c;
  56394. + cnt += c;
  56395. + count -= c;
  56396. + }
  56397. +
  56398. + kfree(buffer);
  56399. +
  56400. + return (err) ? err : cnt;
  56401. +}
  56402. +
  56403. +static ssize_t
  56404. +smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
  56405. + loff_t *ppos)
  56406. +{
  56407. + unsigned long p = *ppos;
  56408. +
  56409. + u32 *buffer, *src;
  56410. + u32 __iomem *dst;
  56411. + int c, i, cnt = 0, err = 0;
  56412. + unsigned long total_size;
  56413. +
  56414. + if (!info || !info->screen_base)
  56415. + return -ENODEV;
  56416. +
  56417. + if (info->state != FBINFO_STATE_RUNNING)
  56418. + return -EPERM;
  56419. +
  56420. + total_size = info->screen_size;
  56421. +
  56422. + if (total_size == 0)
  56423. + total_size = info->fix.smem_len;
  56424. +
  56425. + if (p > total_size)
  56426. + return -EFBIG;
  56427. +
  56428. + if (count > total_size) {
  56429. + err = -EFBIG;
  56430. + count = total_size;
  56431. + }
  56432. +
  56433. + if (count + p > total_size) {
  56434. + if (!err)
  56435. + err = -ENOSPC;
  56436. +
  56437. + count = total_size - p;
  56438. + }
  56439. +
  56440. + buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  56441. + if (!buffer)
  56442. + return -ENOMEM;
  56443. +
  56444. + dst = (u32 __iomem *) (info->screen_base + p);
  56445. +
  56446. + if (info->fbops->fb_sync)
  56447. + info->fbops->fb_sync(info);
  56448. +
  56449. + while (count) {
  56450. + c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  56451. + src = buffer;
  56452. +
  56453. + if (copy_from_user(src, buf, c)) {
  56454. + err = -EFAULT;
  56455. + break;
  56456. + }
  56457. +
  56458. + for (i = c >> 2; i--;) {
  56459. + fb_writel((*src & 0xff00ff00 >> 8) |
  56460. + (*src & 0x00ff00ff << 8), dst++);
  56461. + src++;
  56462. + }
  56463. + if (c & 3) {
  56464. + u8 *src8 = (u8 *) src;
  56465. + u8 __iomem *dst8 = (u8 __iomem *) dst;
  56466. +
  56467. + for (i = c & 3; i--;) {
  56468. + if (i & 1) {
  56469. + fb_writeb(*src8++, ++dst8);
  56470. + } else {
  56471. + fb_writeb(*src8++, --dst8);
  56472. + dst8 += 2;
  56473. + }
  56474. + }
  56475. + dst = (u32 __iomem *) dst8;
  56476. + }
  56477. +
  56478. + *ppos += c;
  56479. + buf += c;
  56480. + cnt += c;
  56481. + count -= c;
  56482. + }
  56483. +
  56484. + kfree(buffer);
  56485. +
  56486. + return (cnt) ? cnt : err;
  56487. +}
  56488. +#endif /* ! __BIG_ENDIAN */
  56489. +
  56490. +#include "smtc2d.c"
  56491. +
  56492. +void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
  56493. +{
  56494. + struct par_info *p = (struct par_info *)info->par;
  56495. +
  56496. + if (smtc_2Dacceleration) {
  56497. + if (!area->width || !area->height)
  56498. + return;
  56499. +
  56500. + deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel,
  56501. + area->dx, area->dy, area->width, area->height,
  56502. + p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC);
  56503. +
  56504. + } else
  56505. + cfb_copyarea(info, area);
  56506. +}
  56507. +
  56508. +void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
  56509. +{
  56510. + struct par_info *p = (struct par_info *)info->par;
  56511. +
  56512. + if (smtc_2Dacceleration) {
  56513. + if (!rect->width || !rect->height)
  56514. + return;
  56515. + if (info->var.bits_per_pixel >= 24)
  56516. + deFillRect(p->BaseAddressInVRAM, 0, rect->dx * 3,
  56517. + rect->dy * 3, rect->width * 3, rect->height,
  56518. + rect->color);
  56519. + else
  56520. + deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy,
  56521. + rect->width, rect->height, rect->color);
  56522. + } else
  56523. + cfb_fillrect(info, rect);
  56524. +}
  56525. +
  56526. +void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image)
  56527. +{
  56528. + struct par_info *p = (struct par_info *)info->par;
  56529. + u32 bg_col = 0, fg_col = 0;
  56530. +
  56531. + if ((smtc_2Dacceleration) && (image->depth == 1)) {
  56532. + if (smtc_de_busy)
  56533. + deWaitForNotBusy();
  56534. +
  56535. + switch (info->var.bits_per_pixel) {
  56536. + case 8:
  56537. + bg_col = image->bg_color;
  56538. + fg_col = image->fg_color;
  56539. + break;
  56540. + case 16:
  56541. + bg_col =
  56542. + ((u32 *) (info->pseudo_palette))[image->bg_color];
  56543. + fg_col =
  56544. + ((u32 *) (info->pseudo_palette))[image->fg_color];
  56545. + break;
  56546. + case 32:
  56547. + bg_col =
  56548. + ((u32 *) (info->pseudo_palette))[image->bg_color];
  56549. + fg_col =
  56550. + ((u32 *) (info->pseudo_palette))[image->fg_color];
  56551. + break;
  56552. + }
  56553. +
  56554. + deSystemMem2VideoMemMonoBlt(
  56555. + image->data,
  56556. + image->width / 8,
  56557. + 0,
  56558. + p->BaseAddressInVRAM,
  56559. + 0,
  56560. + 0,
  56561. + image->dx, image->dy,
  56562. + image->width, image->height,
  56563. + fg_col, bg_col,
  56564. + 0x0C);
  56565. +
  56566. + } else
  56567. + cfb_imageblit(info, image);
  56568. +}
  56569. +
  56570. +static struct fb_ops smtcfb_ops = {
  56571. + .owner = THIS_MODULE,
  56572. + .fb_setcolreg = smtc_setcolreg,
  56573. + .fb_fillrect = smtcfb_fillrect,
  56574. + .fb_imageblit = smtcfb_imageblit,
  56575. + .fb_copyarea = smtcfb_copyarea,
  56576. +#ifdef __BIG_ENDIAN
  56577. + .fb_read = smtcfb_read,
  56578. + .fb_write = smtcfb_write,
  56579. +#endif
  56580. +
  56581. +};
  56582. +
  56583. +void smtcfb_setmode(struct smtcfb_info *sfb)
  56584. +{
  56585. + switch (sfb->fb.var.bits_per_pixel) {
  56586. + case 32:
  56587. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  56588. + sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
  56589. + sfb->fb.var.red.length = 8;
  56590. + sfb->fb.var.green.length = 8;
  56591. + sfb->fb.var.blue.length = 8;
  56592. + sfb->fb.var.red.offset = 16;
  56593. + sfb->fb.var.green.offset = 8;
  56594. + sfb->fb.var.blue.offset = 0;
  56595. +
  56596. + break;
  56597. + case 8:
  56598. + sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  56599. + sfb->fb.fix.line_length = sfb->fb.var.xres;
  56600. + sfb->fb.var.red.offset = 5;
  56601. + sfb->fb.var.red.length = 3;
  56602. + sfb->fb.var.green.offset = 2;
  56603. + sfb->fb.var.green.length = 3;
  56604. + sfb->fb.var.blue.offset = 0;
  56605. + sfb->fb.var.blue.length = 2;
  56606. + break;
  56607. + case 24:
  56608. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  56609. + sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
  56610. + sfb->fb.var.red.length = 8;
  56611. + sfb->fb.var.green.length = 8;
  56612. + sfb->fb.var.blue.length = 8;
  56613. +
  56614. + sfb->fb.var.red.offset = 16;
  56615. + sfb->fb.var.green.offset = 8;
  56616. + sfb->fb.var.blue.offset = 0;
  56617. +
  56618. + break;
  56619. + case 16:
  56620. + default:
  56621. + sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  56622. + sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
  56623. +
  56624. + sfb->fb.var.red.length = 5;
  56625. + sfb->fb.var.green.length = 6;
  56626. + sfb->fb.var.blue.length = 5;
  56627. +
  56628. + sfb->fb.var.red.offset = 11;
  56629. + sfb->fb.var.green.offset = 5;
  56630. + sfb->fb.var.blue.offset = 0;
  56631. +
  56632. + break;
  56633. + }
  56634. +
  56635. + hw.width = sfb->fb.var.xres;
  56636. + hw.height = sfb->fb.var.yres;
  56637. + hw.hz = 60;
  56638. + smtc_set_timing(sfb, &hw);
  56639. + if (smtc_2Dacceleration) {
  56640. + printk("2D acceleration enabled!\n");
  56641. + /* Init smtc drawing engine */
  56642. + deInit(sfb->fb.var.xres, sfb->fb.var.yres,
  56643. + sfb->fb.var.bits_per_pixel);
  56644. + }
  56645. +}
  56646. +
  56647. +#if defined(CONFIG_FB_SM7XX_DUALHEAD)
  56648. +void smtc_head2_init(struct smtcfb_info *sfb)
  56649. +{
  56650. + smtcfb_info2 = *sfb;
  56651. + smtcfb_info2.fb.pseudo_palette = &colreg2;
  56652. + smtcfb_info2.fb.par = &hw2;
  56653. + sprintf(smtcfb_info2.fb.fix.id, "sm%Xfb2", hw.chipID);
  56654. + hw2.chipID = hw.chipID;
  56655. + hw2.chipRevID = hw.chipRevID;
  56656. + hw2.width = smtcfb_info2.fb.var.xres;
  56657. + hw2.height = smtcfb_info2.fb.var.yres;
  56658. + hw2.hz = 60;
  56659. + hw2.m_pMMIO = smtc_RegBaseAddress;
  56660. +
  56661. + /*hard code 2nd head starting from half VRAM size postion */
  56662. + hw2.BaseAddressInVRAM = smtcfb_info2.fb.fix.smem_len / 2;
  56663. +
  56664. + hw2.m_pLFB = smtc_VRAMBaseAddress + hw2.BaseAddressInVRAM;
  56665. + smtcfb_info2.fb.screen_base = hw2.m_pLFB;
  56666. +
  56667. + writel(hw2.BaseAddressInVRAM >> 3, hw2.m_pVPR + 0x10);
  56668. +}
  56669. +#endif
  56670. +
  56671. +/*
  56672. + * Alloc struct smtcfb_info and assign the default value
  56673. + */
  56674. +static struct smtcfb_info *__devinit smtc_alloc_fb_info(struct pci_dev *dev,
  56675. + char *name)
  56676. +{
  56677. + struct smtcfb_info *sfb;
  56678. +
  56679. + sfb = kmalloc(sizeof(struct smtcfb_info), GFP_KERNEL);
  56680. +
  56681. + if (!sfb)
  56682. + return NULL;
  56683. +
  56684. + memset(sfb, 0, sizeof(struct smtcfb_info));
  56685. +
  56686. + sfb->currcon = -1;
  56687. + sfb->dev = dev;
  56688. +
  56689. + /*** Init sfb->fb with default value ***/
  56690. + sfb->fb.flags = FBINFO_FLAG_DEFAULT;
  56691. + sfb->fb.fbops = &smtcfb_ops;
  56692. + sfb->fb.var = smtcfb_var;
  56693. + sfb->fb.fix = smtcfb_fix;
  56694. +
  56695. + strcpy(sfb->fb.fix.id, name);
  56696. +
  56697. + sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
  56698. + sfb->fb.fix.type_aux = 0;
  56699. + sfb->fb.fix.xpanstep = 0;
  56700. + sfb->fb.fix.ypanstep = 0;
  56701. + sfb->fb.fix.ywrapstep = 0;
  56702. + sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
  56703. +
  56704. + sfb->fb.var.nonstd = 0;
  56705. + sfb->fb.var.activate = FB_ACTIVATE_NOW;
  56706. + sfb->fb.var.height = -1;
  56707. + sfb->fb.var.width = -1;
  56708. + /* text mode acceleration */
  56709. + sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
  56710. + sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
  56711. + sfb->fb.par = &hw;
  56712. + sfb->fb.pseudo_palette = colreg;
  56713. +
  56714. + return sfb;
  56715. +}
  56716. +
  56717. +/*
  56718. + * Unmap in the memory mapped IO registers
  56719. + */
  56720. +
  56721. +static void __devinit smtc_unmap_mmio(struct smtcfb_info *sfb)
  56722. +{
  56723. + if (sfb && smtc_RegBaseAddress)
  56724. + smtc_RegBaseAddress = NULL;
  56725. +}
  56726. +
  56727. +/*
  56728. + * Map in the screen memory
  56729. + */
  56730. +
  56731. +static int __devinit smtc_map_smem(struct smtcfb_info *sfb,
  56732. + struct pci_dev *dev, u_long smem_len)
  56733. +{
  56734. + if (sfb->fb.var.bits_per_pixel == 32) {
  56735. +#ifdef __BIG_ENDIAN
  56736. + sfb->fb.fix.smem_start = pci_resource_start(dev, 0)
  56737. + + 0x800000;
  56738. +#else
  56739. + sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
  56740. +#endif
  56741. + } else {
  56742. + sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
  56743. + }
  56744. +
  56745. + sfb->fb.fix.smem_len = smem_len;
  56746. +
  56747. + sfb->fb.screen_base = smtc_VRAMBaseAddress;
  56748. +
  56749. + if (!sfb->fb.screen_base) {
  56750. + printk(KERN_INFO "%s: unable to map screen memory\n",
  56751. + sfb->fb.fix.id);
  56752. + return -ENOMEM;
  56753. + }
  56754. +
  56755. + return 0;
  56756. +}
  56757. +
  56758. +/*
  56759. + * Unmap in the screen memory
  56760. + *
  56761. + */
  56762. +static void __devinit smtc_unmap_smem(struct smtcfb_info *sfb)
  56763. +{
  56764. + if (sfb && sfb->fb.screen_base) {
  56765. + iounmap(sfb->fb.screen_base);
  56766. + sfb->fb.screen_base = NULL;
  56767. + }
  56768. +}
  56769. +
  56770. +/*
  56771. + * We need to wake up the LynxEM+, and make sure its in linear memory mode.
  56772. + */
  56773. +static inline void __devinit sm7xx_init_hw(void)
  56774. +{
  56775. + outb_p(0x18, 0x3c4);
  56776. + outb_p(0x11, 0x3c5);
  56777. +}
  56778. +
  56779. +static void __devinit smtc_free_fb_info(struct smtcfb_info *sfb)
  56780. +{
  56781. + if (sfb) {
  56782. + fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
  56783. + kfree(sfb);
  56784. + }
  56785. +}
  56786. +
  56787. +static int __init smtcfb_init(void)
  56788. +{
  56789. + struct smtcfb_info *sfb;
  56790. + u_long smem_size = 0x00800000; /* default 8MB */
  56791. + char name[16];
  56792. + int err, i = 0;
  56793. + unsigned long pFramebufferPhysical;
  56794. + struct pci_dev *pdev = NULL;
  56795. +
  56796. + printk(KERN_INFO
  56797. + "Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
  56798. +
  56799. + /* init the global variable */
  56800. + smtc_2Dacceleration = 0; /* default no 2D acceleration */
  56801. +
  56802. + do {
  56803. + pdev = pci_get_device(0x126f, smtc_ChipIDs[i], pdev);
  56804. + if (pdev == NULL) {
  56805. + i++;
  56806. + } else {
  56807. + hw.chipID = smtc_ChipIDs[i];
  56808. + break;
  56809. + }
  56810. + } while (i < numSMTCchipIDs);
  56811. +
  56812. + err = pci_enable_device(pdev); /* enable SMTC chip */
  56813. +
  56814. + if (err)
  56815. + return err;
  56816. +
  56817. + err = -ENOMEM;
  56818. +
  56819. + sprintf(name, "sm%Xfb", hw.chipID);
  56820. +
  56821. + sfb = smtc_alloc_fb_info(pdev, name);
  56822. +
  56823. + if (!sfb)
  56824. + goto failed;
  56825. +
  56826. + sm7xx_init_hw();
  56827. +
  56828. + /*get mode parameter from smtc_screen_info */
  56829. + if (smtc_screen_info.lfb_width != 0) {
  56830. + sfb->fb.var.xres = smtc_screen_info.lfb_width;
  56831. + sfb->fb.var.yres = smtc_screen_info.lfb_height;
  56832. + sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
  56833. + } else {
  56834. + /* default resolution 1024x600 16bit mode */
  56835. + sfb->fb.var.xres = SCREEN_X_RES;
  56836. + sfb->fb.var.yres = SCREEN_Y_RES;
  56837. + sfb->fb.var.bits_per_pixel = SCREEN_BPP;
  56838. + }
  56839. +
  56840. + smdbg("\nsfb->fb.var.bits_per_pixel = %d sm712be_flag = %d\n",
  56841. + sfb->fb.var.bits_per_pixel, sm712be_flag);
  56842. +#ifdef __BIG_ENDIAN
  56843. + if (sm712be_flag == 1 && sfb->fb.var.bits_per_pixel == 24)
  56844. + sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
  56845. +#endif
  56846. + /* Map address and memory detection */
  56847. + pFramebufferPhysical = pci_resource_start(pdev, 0);
  56848. + pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
  56849. +
  56850. + switch (hw.chipID) {
  56851. + case 0x710:
  56852. + case 0x712:
  56853. + sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
  56854. + sfb->fb.fix.mmio_len = 0x00400000;
  56855. + smem_size = SM712_VIDEOMEMORYSIZE;
  56856. +#ifdef __BIG_ENDIAN
  56857. + hw.m_pLFB = (smtc_VRAMBaseAddress =
  56858. + ioremap(pFramebufferPhysical, 0x00c00000));
  56859. +#else
  56860. + hw.m_pLFB = (smtc_VRAMBaseAddress =
  56861. + ioremap(pFramebufferPhysical, 0x00800000));
  56862. +#endif
  56863. + hw.m_pMMIO = (smtc_RegBaseAddress =
  56864. + smtc_VRAMBaseAddress + 0x00700000);
  56865. + smtc_2DBaseAddress = (hw.m_pDPR =
  56866. + smtc_VRAMBaseAddress + 0x00408000);
  56867. + smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
  56868. + hw.m_pVPR = hw.m_pLFB + 0x0040c000;
  56869. + if (sfb->fb.var.bits_per_pixel == 32) {
  56870. +#ifdef __BIG_ENDIAN
  56871. + smtc_VRAMBaseAddress += 0x800000;
  56872. + hw.m_pLFB += 0x800000;
  56873. + printk(KERN_INFO
  56874. + "\nsmtc_VRAMBaseAddress=%p hw.m_pLFB=%p\n",
  56875. + smtc_VRAMBaseAddress, hw.m_pLFB);
  56876. +#endif
  56877. + }
  56878. + if (!smtc_RegBaseAddress) {
  56879. +
  56880. + printk(KERN_INFO
  56881. + "%s: unable to map memory mapped IO\n",
  56882. + sfb->fb.fix.id);
  56883. +
  56884. + return -ENOMEM;
  56885. + }
  56886. +
  56887. + /* set MCLK = 14.31818 * (0x16 / 0x2) */
  56888. + smtc_seqw(0x6a, 0x16);
  56889. + smtc_seqw(0x6b, 0x02);
  56890. + smtc_seqw(0x62, 0x3e);
  56891. + /* enable PCI burst */
  56892. + smtc_seqw(0x17, 0x20);
  56893. + /* enabel word swap */
  56894. + if (sfb->fb.var.bits_per_pixel == 32) {
  56895. +#ifdef __BIG_ENDIAN
  56896. + smtc_seqw(0x17, 0x30);
  56897. +#endif
  56898. + }
  56899. +#ifdef CONFIG_FB_SM7XX_ACCEL
  56900. + smtc_2Dacceleration = 1;
  56901. +#endif
  56902. +
  56903. + break;
  56904. +
  56905. + case 0x720:
  56906. + sfb->fb.fix.mmio_start = pFramebufferPhysical;
  56907. + sfb->fb.fix.mmio_len = 0x00200000;
  56908. + smem_size = SM722_VIDEOMEMORYSIZE;
  56909. + smtc_2DBaseAddress = (hw.m_pDPR =
  56910. + ioremap(pFramebufferPhysical, 0x00a00000));
  56911. + hw.m_pLFB = (smtc_VRAMBaseAddress =
  56912. + smtc_2DBaseAddress + 0x00200000);
  56913. + hw.m_pMMIO = (smtc_RegBaseAddress =
  56914. + smtc_2DBaseAddress + 0x000c0000);
  56915. + smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722;
  56916. + hw.m_pVPR = smtc_2DBaseAddress + 0x800;
  56917. +
  56918. + smtc_seqw(0x62, 0xff);
  56919. + smtc_seqw(0x6a, 0x0d);
  56920. + smtc_seqw(0x6b, 0x02);
  56921. + smtc_2Dacceleration = 0;
  56922. + break;
  56923. + default:
  56924. + printk(KERN_INFO
  56925. + "No valid Silicon Motion display chip was detected!\n");
  56926. +
  56927. + smtc_free_fb_info(sfb);
  56928. + return err;
  56929. + }
  56930. +
  56931. + /* can support 32 bpp */
  56932. + if (15 == sfb->fb.var.bits_per_pixel)
  56933. + sfb->fb.var.bits_per_pixel = 16;
  56934. +
  56935. + sfb->fb.var.xres_virtual = sfb->fb.var.xres;
  56936. +
  56937. + sfb->fb.var.yres_virtual = sfb->fb.var.yres;
  56938. + err = smtc_map_smem(sfb, pdev, smem_size);
  56939. + if (err)
  56940. + goto failed;
  56941. +
  56942. + smtcfb_setmode(sfb);
  56943. + /* Primary display starting from 0 postion */
  56944. + hw.BaseAddressInVRAM = 0;
  56945. + sfb->fb.par = &hw;
  56946. +
  56947. + mutex_init(&sfb->fb.lock);
  56948. + mutex_init(&sfb->fb.mm_lock);
  56949. +
  56950. + err = register_framebuffer(&sfb->fb);
  56951. + if (err < 0)
  56952. + goto failed;
  56953. +
  56954. + printk(KERN_INFO "Silicon Motion SM%X Rev%X primary display mode"
  56955. + "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
  56956. + sfb->fb.var.xres, sfb->fb.var.yres,
  56957. + sfb->fb.var.bits_per_pixel);
  56958. +
  56959. +#if defined(CONFIG_FB_SM7XX_DUALHEAD)
  56960. + smtc_head2_init(sfb);
  56961. + err = register_framebuffer(&smtcfb_info2.fb);
  56962. +
  56963. + /* if second head display fails, also fails the primary display */
  56964. + if (err < 0) {
  56965. + printk(KERN_INFO
  56966. + "Silicon Motion, Inc. second head init fail\n");
  56967. + goto failed;
  56968. + }
  56969. +
  56970. + printk(KERN_INFO "Silicon Motion SM%X Rev%X secondary display mode"
  56971. + "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
  56972. + hw2.width, hw2.height,
  56973. + smtcfb_info2.fb.var.bits_per_pixel);
  56974. +#endif
  56975. +
  56976. + return 0;
  56977. +
  56978. + failed:
  56979. + printk(KERN_INFO "Silicon Motion, Inc. primary display init fail\n");
  56980. +
  56981. + smtc_unmap_smem(sfb);
  56982. + smtc_unmap_mmio(sfb);
  56983. + smtc_free_fb_info(sfb);
  56984. +
  56985. + return err;
  56986. +}
  56987. +
  56988. +static void __exit smtcfb_exit(void)
  56989. +{
  56990. +}
  56991. +
  56992. +module_init(smtcfb_init);
  56993. +module_exit(smtcfb_exit);
  56994. +
  56995. +/*
  56996. + * sm712be_setup - process command line options
  56997. + * @options: string of options
  56998. + * Returns zero.
  56999. + *
  57000. + */
  57001. +static int __init sm712be_setup(char *options)
  57002. +{
  57003. + sm712be_flag = 0;
  57004. + if (!options || !*options) {
  57005. + smdbg("\n No sm712be parameter\n");
  57006. + return -EINVAL;
  57007. + }
  57008. + if (strstr(options, "enable") != NULL)
  57009. + sm712be_flag = 1;
  57010. +
  57011. + smdbg("\nsm712be_setup = %s sm712be_flag = %d\n", options,
  57012. + sm712be_flag);
  57013. +
  57014. + return 0;
  57015. +}
  57016. +
  57017. +__setup("sm712be=", sm712be_setup);
  57018. +
  57019. +/*
  57020. + * sm712vga_setup - process command line options, get vga parameter
  57021. + * @options: string of options
  57022. + * Returns zero.
  57023. + *
  57024. + */
  57025. +static int __init sm712vga_setup(char *options)
  57026. +{
  57027. + int index;
  57028. + sm712be_flag = 0;
  57029. +
  57030. + if (!options || !*options) {
  57031. + smdbg("\n No vga parameter\n");
  57032. + return -EINVAL;
  57033. + }
  57034. +
  57035. + smtc_screen_info.lfb_width = 0;
  57036. + smtc_screen_info.lfb_height = 0;
  57037. + smtc_screen_info.lfb_depth = 0;
  57038. +
  57039. + smdbg("\nsm712vga_setup = %s\n", options);
  57040. +
  57041. + for (index = 0;
  57042. + index < (sizeof(vesa_mode) / sizeof(struct vesa_mode_table));
  57043. + index++) {
  57044. + if (strstr(options, vesa_mode[index].mode_index)) {
  57045. + smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
  57046. + smtc_screen_info.lfb_height =
  57047. + vesa_mode[index].lfb_height;
  57048. + smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
  57049. + return 0;
  57050. + }
  57051. + }
  57052. +
  57053. + return -1;
  57054. +}
  57055. +
  57056. +__setup("vga=", sm712vga_setup);
  57057. +
  57058. +MODULE_AUTHOR("Siliconmotion ");
  57059. +MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
  57060. +MODULE_LICENSE("GPL");
  57061. diff -Nur linux-2.6.30.5.orig/drivers/video/sm7xx/smtcfb.h linux-2.6.30.5/drivers/video/sm7xx/smtcfb.h
  57062. --- linux-2.6.30.5.orig/drivers/video/sm7xx/smtcfb.h 1970-01-01 01:00:00.000000000 +0100
  57063. +++ linux-2.6.30.5/drivers/video/sm7xx/smtcfb.h 2009-08-23 19:01:04.000000000 +0200
  57064. @@ -0,0 +1,793 @@
  57065. +/*
  57066. + * smtcfb.h -- Silicon Motion SM7xx frame buffer device
  57067. + *
  57068. + * Copyright (C) 2006 Silicon Motion Technology Corp.
  57069. + * Authors: Ge Wang, gewang@siliconmotion.com
  57070. + * Boyod boyod.yang@siliconmotion.com.cn
  57071. + *
  57072. + * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
  57073. + * Author: Wu Zhangjin, wuzj@lemote.com
  57074. + *
  57075. + * This file is subject to the terms and conditions of the GNU General Public
  57076. + * License. See the file COPYING in the main directory of this archive for
  57077. + * more details.
  57078. + */
  57079. +
  57080. +#define SMTC_LINUX_FB_VERSION "version 0.11.2619.21.01 July 27, 2008"
  57081. +
  57082. +#define NR_PALETTE 256
  57083. +#define NR_RGB 2
  57084. +
  57085. +#define FB_ACCEL_SMI_LYNX 88
  57086. +
  57087. +#ifdef __BIG_ENDIAN
  57088. +#define PC_VGA 0
  57089. +#else
  57090. +#define PC_VGA 1
  57091. +#endif
  57092. +
  57093. +#define SCREEN_X_RES 1024
  57094. +#define SCREEN_Y_RES 600
  57095. +#define SCREEN_BPP 16
  57096. +
  57097. +#ifndef FIELD_OFFSET
  57098. +#define FIELD_OFSFET(type, field) \
  57099. + ((unsigned long) (PUCHAR) & (((type *)0)->field))
  57100. +#endif
  57101. +
  57102. +/*Assume SM712 graphics chip has 4MB VRAM */
  57103. +#define SM712_VIDEOMEMORYSIZE 0x00400000
  57104. +/*Assume SM722 graphics chip has 8MB VRAM */
  57105. +#define SM722_VIDEOMEMORYSIZE 0x00800000
  57106. +
  57107. +#define dac_reg (0x3c8)
  57108. +#define dac_val (0x3c9)
  57109. +
  57110. +extern char *smtc_RegBaseAddress;
  57111. +#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
  57112. +#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
  57113. +#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
  57114. +
  57115. +#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
  57116. +#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
  57117. +#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
  57118. +
  57119. +#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
  57120. +#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
  57121. +#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
  57122. +#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
  57123. +#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
  57124. +#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
  57125. +#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
  57126. +#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
  57127. +#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
  57128. +#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
  57129. +#define SIZE_VPR (0x6C + 1)
  57130. +#define SIZE_DPR (0x44 + 1)
  57131. +
  57132. +static inline void smtc_crtcw(int reg, int val)
  57133. +{
  57134. + smtc_mmiowb(reg, 0x3d4);
  57135. + smtc_mmiowb(val, 0x3d5);
  57136. +}
  57137. +
  57138. +static inline unsigned int smtc_crtcr(int reg)
  57139. +{
  57140. + smtc_mmiowb(reg, 0x3d4);
  57141. + return smtc_mmiorb(0x3d5);
  57142. +}
  57143. +
  57144. +static inline void smtc_grphw(int reg, int val)
  57145. +{
  57146. + smtc_mmiowb(reg, 0x3ce);
  57147. + smtc_mmiowb(val, 0x3cf);
  57148. +}
  57149. +
  57150. +static inline unsigned int smtc_grphr(int reg)
  57151. +{
  57152. + smtc_mmiowb(reg, 0x3ce);
  57153. + return smtc_mmiorb(0x3cf);
  57154. +}
  57155. +
  57156. +static inline void smtc_attrw(int reg, int val)
  57157. +{
  57158. + smtc_mmiorb(0x3da);
  57159. + smtc_mmiowb(reg, 0x3c0);
  57160. + smtc_mmiorb(0x3c1);
  57161. + smtc_mmiowb(val, 0x3c0);
  57162. +}
  57163. +
  57164. +static inline void smtc_seqw(int reg, int val)
  57165. +{
  57166. + smtc_mmiowb(reg, 0x3c4);
  57167. + smtc_mmiowb(val, 0x3c5);
  57168. +}
  57169. +
  57170. +static inline unsigned int smtc_seqr(int reg)
  57171. +{
  57172. + smtc_mmiowb(reg, 0x3c4);
  57173. + return smtc_mmiorb(0x3c5);
  57174. +}
  57175. +
  57176. +/* The next structure holds all information relevant for a specific video mode.
  57177. + */
  57178. +
  57179. +struct ModeInit {
  57180. + int mmSizeX;
  57181. + int mmSizeY;
  57182. + int bpp;
  57183. + int hz;
  57184. + unsigned char Init_MISC;
  57185. + unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
  57186. + unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
  57187. + unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
  57188. + unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
  57189. + unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
  57190. + unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
  57191. + unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
  57192. + unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
  57193. + unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
  57194. + unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
  57195. +};
  57196. +
  57197. +/**********************************************************************
  57198. + SM712 Mode table.
  57199. + **********************************************************************/
  57200. +struct ModeInit VGAMode[] = {
  57201. + {
  57202. + /* mode#0: 640 x 480 16Bpp 60Hz */
  57203. + 640, 480, 16, 60,
  57204. + /* Init_MISC */
  57205. + 0xE3,
  57206. + { /* Init_SR0_SR4 */
  57207. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  57208. + },
  57209. + { /* Init_SR10_SR24 */
  57210. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57211. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57212. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57213. + },
  57214. + { /* Init_SR30_SR75 */
  57215. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  57216. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  57217. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57218. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  57219. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  57220. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  57221. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57222. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  57223. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  57224. + },
  57225. + { /* Init_SR80_SR93 */
  57226. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  57227. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  57228. + 0x00, 0x00, 0x00, 0x00,
  57229. + },
  57230. + { /* Init_SRA0_SRAF */
  57231. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57232. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  57233. + },
  57234. + { /* Init_GR00_GR08 */
  57235. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57236. + 0xFF,
  57237. + },
  57238. + { /* Init_AR00_AR14 */
  57239. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57240. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57241. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57242. + },
  57243. + { /* Init_CR00_CR18 */
  57244. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  57245. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57246. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  57247. + 0xFF,
  57248. + },
  57249. + { /* Init_CR30_CR4D */
  57250. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  57251. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  57252. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  57253. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  57254. + },
  57255. + { /* Init_CR90_CRA7 */
  57256. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  57257. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  57258. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  57259. + },
  57260. + },
  57261. + {
  57262. + /* mode#1: 640 x 480 24Bpp 60Hz */
  57263. + 640, 480, 24, 60,
  57264. + /* Init_MISC */
  57265. + 0xE3,
  57266. + { /* Init_SR0_SR4 */
  57267. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  57268. + },
  57269. + { /* Init_SR10_SR24 */
  57270. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57271. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57272. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57273. + },
  57274. + { /* Init_SR30_SR75 */
  57275. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  57276. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  57277. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57278. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  57279. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  57280. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  57281. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57282. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  57283. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  57284. + },
  57285. + { /* Init_SR80_SR93 */
  57286. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  57287. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  57288. + 0x00, 0x00, 0x00, 0x00,
  57289. + },
  57290. + { /* Init_SRA0_SRAF */
  57291. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57292. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  57293. + },
  57294. + { /* Init_GR00_GR08 */
  57295. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57296. + 0xFF,
  57297. + },
  57298. + { /* Init_AR00_AR14 */
  57299. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57300. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57301. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57302. + },
  57303. + { /* Init_CR00_CR18 */
  57304. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  57305. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57306. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  57307. + 0xFF,
  57308. + },
  57309. + { /* Init_CR30_CR4D */
  57310. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  57311. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  57312. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  57313. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  57314. + },
  57315. + { /* Init_CR90_CRA7 */
  57316. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  57317. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  57318. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  57319. + },
  57320. + },
  57321. + {
  57322. + /* mode#0: 640 x 480 32Bpp 60Hz */
  57323. + 640, 480, 32, 60,
  57324. + /* Init_MISC */
  57325. + 0xE3,
  57326. + { /* Init_SR0_SR4 */
  57327. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  57328. + },
  57329. + { /* Init_SR10_SR24 */
  57330. + 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57331. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57332. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57333. + },
  57334. + { /* Init_SR30_SR75 */
  57335. + 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  57336. + 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  57337. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57338. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  57339. + 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  57340. + 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  57341. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57342. + 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  57343. + 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  57344. + },
  57345. + { /* Init_SR80_SR93 */
  57346. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  57347. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  57348. + 0x00, 0x00, 0x00, 0x00,
  57349. + },
  57350. + { /* Init_SRA0_SRAF */
  57351. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57352. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  57353. + },
  57354. + { /* Init_GR00_GR08 */
  57355. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57356. + 0xFF,
  57357. + },
  57358. + { /* Init_AR00_AR14 */
  57359. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57360. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57361. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57362. + },
  57363. + { /* Init_CR00_CR18 */
  57364. + 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  57365. + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57366. + 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  57367. + 0xFF,
  57368. + },
  57369. + { /* Init_CR30_CR4D */
  57370. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  57371. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  57372. + 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  57373. + 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  57374. + },
  57375. + { /* Init_CR90_CRA7 */
  57376. + 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  57377. + 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  57378. + 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  57379. + },
  57380. + },
  57381. +
  57382. + { /* mode#2: 800 x 600 16Bpp 60Hz */
  57383. + 800, 600, 16, 60,
  57384. + /* Init_MISC */
  57385. + 0x2B,
  57386. + { /* Init_SR0_SR4 */
  57387. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57388. + },
  57389. + { /* Init_SR10_SR24 */
  57390. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57391. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57392. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57393. + },
  57394. + { /* Init_SR30_SR75 */
  57395. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  57396. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  57397. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  57398. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  57399. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  57400. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  57401. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57402. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  57403. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  57404. + },
  57405. + { /* Init_SR80_SR93 */
  57406. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  57407. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  57408. + 0x00, 0x00, 0x00, 0x00,
  57409. + },
  57410. + { /* Init_SRA0_SRAF */
  57411. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57412. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  57413. + },
  57414. + { /* Init_GR00_GR08 */
  57415. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57416. + 0xFF,
  57417. + },
  57418. + { /* Init_AR00_AR14 */
  57419. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57420. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57421. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57422. + },
  57423. + { /* Init_CR00_CR18 */
  57424. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  57425. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57426. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  57427. + 0xFF,
  57428. + },
  57429. + { /* Init_CR30_CR4D */
  57430. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  57431. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  57432. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  57433. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  57434. + },
  57435. + { /* Init_CR90_CRA7 */
  57436. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  57437. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  57438. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  57439. + },
  57440. + },
  57441. + { /* mode#3: 800 x 600 24Bpp 60Hz */
  57442. + 800, 600, 24, 60,
  57443. + 0x2B,
  57444. + { /* Init_SR0_SR4 */
  57445. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57446. + },
  57447. + { /* Init_SR10_SR24 */
  57448. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57449. + 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57450. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57451. + },
  57452. + { /* Init_SR30_SR75 */
  57453. + 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
  57454. + 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
  57455. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57456. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
  57457. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  57458. + 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
  57459. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57460. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  57461. + 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
  57462. + },
  57463. + { /* Init_SR80_SR93 */
  57464. + 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
  57465. + 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
  57466. + 0x00, 0x00, 0x00, 0x00,
  57467. + },
  57468. + { /* Init_SRA0_SRAF */
  57469. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57470. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  57471. + },
  57472. + { /* Init_GR00_GR08 */
  57473. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57474. + 0xFF,
  57475. + },
  57476. + { /* Init_AR00_AR14 */
  57477. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57478. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57479. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57480. + },
  57481. + { /* Init_CR00_CR18 */
  57482. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  57483. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57484. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  57485. + 0xFF,
  57486. + },
  57487. + { /* Init_CR30_CR4D */
  57488. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  57489. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  57490. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  57491. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  57492. + },
  57493. + { /* Init_CR90_CRA7 */
  57494. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  57495. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  57496. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  57497. + },
  57498. + },
  57499. + { /* mode#7: 800 x 600 32Bpp 60Hz */
  57500. + 800, 600, 32, 60,
  57501. + /* Init_MISC */
  57502. + 0x2B,
  57503. + { /* Init_SR0_SR4 */
  57504. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57505. + },
  57506. + { /* Init_SR10_SR24 */
  57507. + 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  57508. + 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57509. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57510. + },
  57511. + { /* Init_SR30_SR75 */
  57512. + 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  57513. + 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  57514. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  57515. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  57516. + 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  57517. + 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  57518. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57519. + 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  57520. + 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  57521. + },
  57522. + { /* Init_SR80_SR93 */
  57523. + 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  57524. + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  57525. + 0x00, 0x00, 0x00, 0x00,
  57526. + },
  57527. + { /* Init_SRA0_SRAF */
  57528. + 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  57529. + 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  57530. + },
  57531. + { /* Init_GR00_GR08 */
  57532. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57533. + 0xFF,
  57534. + },
  57535. + { /* Init_AR00_AR14 */
  57536. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57537. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57538. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57539. + },
  57540. + { /* Init_CR00_CR18 */
  57541. + 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  57542. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57543. + 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  57544. + 0xFF,
  57545. + },
  57546. + { /* Init_CR30_CR4D */
  57547. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  57548. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  57549. + 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  57550. + 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  57551. + },
  57552. + { /* Init_CR90_CRA7 */
  57553. + 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  57554. + 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  57555. + 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  57556. + },
  57557. + },
  57558. + /* We use 1024x768 table to light 1024x600 panel for lemote */
  57559. + { /* mode#4: 1024 x 600 16Bpp 60Hz */
  57560. + 1024, 600, 16, 60,
  57561. + /* Init_MISC */
  57562. + 0xEB,
  57563. + { /* Init_SR0_SR4 */
  57564. + 0x03, 0x01, 0x0F, 0x00, 0x0E,
  57565. + },
  57566. + { /* Init_SR10_SR24 */
  57567. + 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
  57568. + 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57569. + 0xC4, 0x30, 0x02, 0x00, 0x01,
  57570. + },
  57571. + { /* Init_SR30_SR75 */
  57572. + 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
  57573. + 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
  57574. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57575. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
  57576. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  57577. + 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
  57578. + 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57579. + 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
  57580. + 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
  57581. + },
  57582. + { /* Init_SR80_SR93 */
  57583. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  57584. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  57585. + 0x00, 0x00, 0x00, 0x00,
  57586. + },
  57587. + { /* Init_SRA0_SRAF */
  57588. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  57589. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  57590. + },
  57591. + { /* Init_GR00_GR08 */
  57592. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57593. + 0xFF,
  57594. + },
  57595. + { /* Init_AR00_AR14 */
  57596. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57597. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57598. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57599. + },
  57600. + { /* Init_CR00_CR18 */
  57601. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  57602. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57603. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  57604. + 0xFF,
  57605. + },
  57606. + { /* Init_CR30_CR4D */
  57607. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  57608. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  57609. + 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
  57610. + 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
  57611. + },
  57612. + { /* Init_CR90_CRA7 */
  57613. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  57614. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  57615. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  57616. + },
  57617. + },
  57618. + { /* mode#5: 1024 x 768 24Bpp 60Hz */
  57619. + 1024, 768, 24, 60,
  57620. + /* Init_MISC */
  57621. + 0xEB,
  57622. + { /* Init_SR0_SR4 */
  57623. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57624. + },
  57625. + { /* Init_SR10_SR24 */
  57626. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  57627. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57628. + 0xC4, 0x30, 0x02, 0x01, 0x01,
  57629. + },
  57630. + { /* Init_SR30_SR75 */
  57631. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  57632. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  57633. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57634. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  57635. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  57636. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  57637. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57638. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  57639. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  57640. + },
  57641. + { /* Init_SR80_SR93 */
  57642. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  57643. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  57644. + 0x00, 0x00, 0x00, 0x00,
  57645. + },
  57646. + { /* Init_SRA0_SRAF */
  57647. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  57648. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  57649. + },
  57650. + { /* Init_GR00_GR08 */
  57651. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57652. + 0xFF,
  57653. + },
  57654. + { /* Init_AR00_AR14 */
  57655. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57656. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57657. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57658. + },
  57659. + { /* Init_CR00_CR18 */
  57660. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  57661. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57662. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  57663. + 0xFF,
  57664. + },
  57665. + { /* Init_CR30_CR4D */
  57666. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  57667. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  57668. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  57669. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  57670. + },
  57671. + { /* Init_CR90_CRA7 */
  57672. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  57673. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  57674. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  57675. + },
  57676. + },
  57677. + { /* mode#4: 1024 x 768 32Bpp 60Hz */
  57678. + 1024, 768, 32, 60,
  57679. + /* Init_MISC */
  57680. + 0xEB,
  57681. + { /* Init_SR0_SR4 */
  57682. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57683. + },
  57684. + { /* Init_SR10_SR24 */
  57685. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  57686. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57687. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  57688. + },
  57689. + { /* Init_SR30_SR75 */
  57690. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  57691. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  57692. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57693. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  57694. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  57695. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  57696. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57697. + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  57698. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  57699. + },
  57700. + { /* Init_SR80_SR93 */
  57701. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  57702. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  57703. + 0x00, 0x00, 0x00, 0x00,
  57704. + },
  57705. + { /* Init_SRA0_SRAF */
  57706. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  57707. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  57708. + },
  57709. + { /* Init_GR00_GR08 */
  57710. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57711. + 0xFF,
  57712. + },
  57713. + { /* Init_AR00_AR14 */
  57714. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57715. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57716. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57717. + },
  57718. + { /* Init_CR00_CR18 */
  57719. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  57720. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57721. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  57722. + 0xFF,
  57723. + },
  57724. + { /* Init_CR30_CR4D */
  57725. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  57726. + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  57727. + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  57728. + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  57729. + },
  57730. + { /* Init_CR90_CRA7 */
  57731. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  57732. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  57733. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  57734. + },
  57735. + },
  57736. + { /* mode#6: 320 x 240 16Bpp 60Hz */
  57737. + 320, 240, 16, 60,
  57738. + /* Init_MISC */
  57739. + 0xEB,
  57740. + { /* Init_SR0_SR4 */
  57741. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57742. + },
  57743. + { /* Init_SR10_SR24 */
  57744. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  57745. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57746. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  57747. + },
  57748. + { /* Init_SR30_SR75 */
  57749. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  57750. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  57751. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57752. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  57753. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  57754. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  57755. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57756. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  57757. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  57758. + },
  57759. + { /* Init_SR80_SR93 */
  57760. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  57761. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  57762. + 0x00, 0x00, 0x00, 0x00,
  57763. + },
  57764. + { /* Init_SRA0_SRAF */
  57765. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  57766. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  57767. + },
  57768. + { /* Init_GR00_GR08 */
  57769. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57770. + 0xFF,
  57771. + },
  57772. + { /* Init_AR00_AR14 */
  57773. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57774. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57775. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57776. + },
  57777. + { /* Init_CR00_CR18 */
  57778. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  57779. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57780. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  57781. + 0xFF,
  57782. + },
  57783. + { /* Init_CR30_CR4D */
  57784. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  57785. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  57786. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  57787. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  57788. + },
  57789. + { /* Init_CR90_CRA7 */
  57790. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  57791. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  57792. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  57793. + },
  57794. + },
  57795. +
  57796. + { /* mode#8: 320 x 240 32Bpp 60Hz */
  57797. + 320, 240, 32, 60,
  57798. + /* Init_MISC */
  57799. + 0xEB,
  57800. + { /* Init_SR0_SR4 */
  57801. + 0x03, 0x01, 0x0F, 0x03, 0x0E,
  57802. + },
  57803. + { /* Init_SR10_SR24 */
  57804. + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  57805. + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  57806. + 0xC4, 0x32, 0x02, 0x01, 0x01,
  57807. + },
  57808. + { /* Init_SR30_SR75 */
  57809. + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  57810. + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  57811. + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  57812. + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  57813. + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  57814. + 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  57815. + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  57816. + 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  57817. + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  57818. + },
  57819. + { /* Init_SR80_SR93 */
  57820. + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  57821. + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  57822. + 0x00, 0x00, 0x00, 0x00,
  57823. + },
  57824. + { /* Init_SRA0_SRAF */
  57825. + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  57826. + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  57827. + },
  57828. + { /* Init_GR00_GR08 */
  57829. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  57830. + 0xFF,
  57831. + },
  57832. + { /* Init_AR00_AR14 */
  57833. + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  57834. + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  57835. + 0x41, 0x00, 0x0F, 0x00, 0x00,
  57836. + },
  57837. + { /* Init_CR00_CR18 */
  57838. + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  57839. + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  57840. + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  57841. + 0xFF,
  57842. + },
  57843. + { /* Init_CR30_CR4D */
  57844. + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  57845. + 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  57846. + 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  57847. + 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  57848. + },
  57849. + { /* Init_CR90_CRA7 */
  57850. + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  57851. + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  57852. + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  57853. + },
  57854. + },
  57855. +};
  57856. +
  57857. +#define numVGAModes (sizeof(VGAMode) / sizeof(struct ModeInit))
  57858. diff -Nur linux-2.6.30.5.orig/include/linux/fb.h linux-2.6.30.5/include/linux/fb.h
  57859. --- linux-2.6.30.5.orig/include/linux/fb.h 2009-08-16 23:19:38.000000000 +0200
  57860. +++ linux-2.6.30.5/include/linux/fb.h 2009-08-23 19:01:04.000000000 +0200
  57861. @@ -814,6 +814,7 @@
  57862. int node;
  57863. int flags;
  57864. struct mutex lock; /* Lock for open/release/ioctl funcs */
  57865. + struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */
  57866. struct fb_var_screeninfo var; /* Current var */
  57867. struct fb_fix_screeninfo fix; /* Current fix */
  57868. struct fb_monspecs monspecs; /* Current Monitor specs */
  57869. diff -Nur linux-2.6.30.5.orig/sound/core/pcm_native.c linux-2.6.30.5/sound/core/pcm_native.c
  57870. --- linux-2.6.30.5.orig/sound/core/pcm_native.c 2009-08-16 23:19:38.000000000 +0200
  57871. +++ linux-2.6.30.5/sound/core/pcm_native.c 2009-08-23 19:01:04.000000000 +0200
  57872. @@ -3091,7 +3091,11 @@
  57873. return VM_FAULT_SIGBUS;
  57874. } else {
  57875. vaddr = runtime->dma_area + offset;
  57876. +#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
  57877. + page = virt_to_page(CAC_ADDR(vaddr));
  57878. +#else
  57879. page = virt_to_page(vaddr);
  57880. +#endif
  57881. }
  57882. get_page(page);
  57883. vmf->page = page;
  57884. @@ -3206,6 +3210,11 @@
  57885. if (PCM_RUNTIME_CHECK(substream))
  57886. return -ENXIO;
  57887. +#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
  57888. + /* all mmap using uncached mode */
  57889. + area->vm_page_prot = pgprot_noncached(area->vm_page_prot);
  57890. + area->vm_flags |= (VM_RESERVED | VM_IO);
  57891. +#endif
  57892. offset = area->vm_pgoff << PAGE_SHIFT;
  57893. switch (offset) {
  57894. case SNDRV_PCM_MMAP_OFFSET_STATUS:
  57895. diff -Nur linux-2.6.30.5.orig/sound/core/sgbuf.c linux-2.6.30.5/sound/core/sgbuf.c
  57896. --- linux-2.6.30.5.orig/sound/core/sgbuf.c 2009-08-16 23:19:38.000000000 +0200
  57897. +++ linux-2.6.30.5/sound/core/sgbuf.c 2009-08-23 19:01:04.000000000 +0200
  57898. @@ -114,7 +114,11 @@
  57899. if (!i)
  57900. table->addr |= chunk; /* mark head */
  57901. table++;
  57902. +#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
  57903. + *pgtable++ = virt_to_page(CAC_ADDR(tmpb.area));
  57904. +#else
  57905. *pgtable++ = virt_to_page(tmpb.area);
  57906. +#endif
  57907. tmpb.area += PAGE_SIZE;
  57908. tmpb.addr += PAGE_SIZE;
  57909. }
  57910. @@ -125,7 +129,12 @@
  57911. }
  57912. sgbuf->size = size;
  57913. +#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
  57914. + dmab->area = vmap(sgbuf->page_table, sgbuf->pages, \
  57915. + VM_MAP | VM_IO, pgprot_noncached(PAGE_KERNEL));
  57916. +#else
  57917. dmab->area = vmap(sgbuf->page_table, sgbuf->pages, VM_MAP, PAGE_KERNEL);
  57918. +#endif
  57919. if (! dmab->area)
  57920. goto _failed;
  57921. if (res_size)
  57922. diff -Nur linux-2.6.30.5.orig/sound/pci/Kconfig linux-2.6.30.5/sound/pci/Kconfig
  57923. --- linux-2.6.30.5.orig/sound/pci/Kconfig 2009-08-16 23:19:38.000000000 +0200
  57924. +++ linux-2.6.30.5/sound/pci/Kconfig 2009-08-23 19:01:04.000000000 +0200
  57925. @@ -259,7 +259,6 @@
  57926. config SND_CS5535AUDIO
  57927. tristate "CS5535/CS5536 Audio"
  57928. - depends on X86 && !X86_64
  57929. select SND_PCM
  57930. select SND_AC97_CODEC
  57931. help