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@@ -1,52 +0,0 @@
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-From 6df2a016c0c8a3d0933ef33dd192ea6606b115e3 Mon Sep 17 00:00:00 2001
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-From: Aurelien Jarno <aurelien@aurel32.net>
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-Date: Wed, 26 Jan 2022 18:14:42 +0100
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-Subject: riscv: fix build with binutils 2.38
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-
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-From version 2.38, binutils default to ISA spec version 20191213. This
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-means that the csr read/write (csrr*/csrw*) instructions and fence.i
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-instruction has separated from the `I` extension, become two standalone
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-extensions: Zicsr and Zifencei. As the kernel uses those instruction,
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-this causes the following build failure:
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-
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- CC arch/riscv/kernel/vdso/vgettimeofday.o
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- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages:
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- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
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- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
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- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
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- <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
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-
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-The fix is to specify those extensions explicitely in -march. However as
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-older binutils version do not support this, we first need to detect
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-that.
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-
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-Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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-Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
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-Cc: stable@vger.kernel.org
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-Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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----
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- arch/riscv/Makefile | 6 ++++++
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- 1 file changed, 6 insertions(+)
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-
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-(limited to 'arch/riscv')
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-
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-diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
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-index 8a107ed18b0dc..7d81102cffd48 100644
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---- a/arch/riscv/Makefile
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-+++ b/arch/riscv/Makefile
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-@@ -50,6 +50,12 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
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- riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
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- riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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- riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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-+
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-+# Newer binutils versions default to ISA spec version 20191213 which moves some
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-+# instructions from the I extension to the Zicsr and Zifencei extensions.
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-+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
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-+riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
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-+
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- KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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- KBUILD_AFLAGS += -march=$(riscv-march-y)
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-
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---
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-cgit
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-
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